; -------------------------------------------------------------------------------- ; @Title: TPS325M On-Chip Peripherals ; @Props: Released ; @Author: KRZ ; @Changelog: 2024-03-28 KRZ ; @Manufacturer: 3PEAK - 3PEAK INCORPORATED ; @Doc: Generated (TRACE32, build: 168038.), based on: ; TPS325M0x.svd (Ver. 1.0), TPS325M5x.svd (Ver. 1.0) ; @Core: STAR ; @Chip: TPS325M0A57QQP5T, TPS325M5A57QQP5T, TPS325M0155QQP5T, TPS325M0155QQP6T, ; TPS325M0156QQP7T, TPS325M0166QQP5T, TPS325M0166QQP6T, TPS325M0166QQP7T, ; TPS325M0177QQP5T, TPS325M0177QQP6T, TPS325M0177QQP7T, TPS325M5155QQP5T, ; TPS325M5155QQP6T, TPS325M5155QQP7T, TPS325M5156IFSDR, TPS325M5156QQP5T, ; TPS325M5156QQP6T, TPS325M5156QQP7T, TPS325M5165QQP5T, TPS325M5165QQP6T, ; TPS325M5165QQP7T, TPS325M5166IFSDR, TPS325M5166QQP5T, TPS325M5166QQP6T, ; TPS325M5166QQP7T, TPS325M5167QQP5T, TPS325M5167QQP6T, TPS325M5167QQP7T, ; TPS325M5177IFSDR, TPS325M5177QFSDR, TPS325M5177QQP5T, TPS325M5177QQP6T, ; TPS325M5177QQP7T ; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pertps325m.per 17701 2024-03-29 10:56:12Z kwisniewski $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 tree.close "Core Registers (STAR)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes" bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes" bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes" textline " " bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes" group.long 0x0C++0x0F line.long 0x00 "CPPWR,Coprocessor Power Control Register" bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted" textline " " bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted" textline " " bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted" line.long 0x04 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x08 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x0C "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPUID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x63=Arm China" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main Extension" newline abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0x132=STAR-MC1" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control and State Register" setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" textline " " bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure" rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled" rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending" textline " " hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt" rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent" hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key" rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian" bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled" line.long 0x14 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV" hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending" bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending" bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled" textline " " bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active" bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active" textline " " bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active" bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "UFSR,Usage Fault Status Register" eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error" textline " " eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" textline " " eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x03 line.long 0x00 "HFSR,HardFault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full" if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48) group.long 0xD8C++0x03 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled" bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled" bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled" bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled" bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled" bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled" bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled" else hgroup.long 0xD8C++0x03 hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)" endif wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Triggered Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended" tree "Memory System" width 10. rgroup.long 0xD78++0x03 line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest" bitfld.long 0x00 27.--29. " LOU ,LOUU" "With no caches,Inst or Data cache,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "With no caches,Inst or Data cache,?..." textline " " bitfld.long 0x00 24.--26. " LoUIS ,Level of unification inner sharable" "With no caches,Inst or Data cache,?..." bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..." rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..." rgroup.long 0xD80++0x03 line.long 0x00 "CCSIDR,Cache Size ID Register" bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported" bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported" bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSET ,Indicates the number of sets as (number of sets) - 1" bitfld.long 0x00 3.--12. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways)" ",2-way set associativity,,4-way set associativity,?..." textline " " bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" ",32 byte,?..." group.long 0xD84++0x03 line.long 0x00 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..." bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data,Instruction" wgroup.long 0xF50++0x03 line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU" wgroup.long 0xF58++0x23 line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU" line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC" line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way" hexmask.long 0x08 5.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU" line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC" line.long 0x14 "DCCSW,D-Cache Clean by Set-Way" hexmask.long 0x14 5.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC" line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way" hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" line.long 0x20 "BPIALL,Branch Predictor Invalidate All" group.long 0x10000++0x03 line.long 0x00 "CACR,L1 Cache Control Register" bitfld.long 0x000 16.--16. " DCCLEAN ,Data cache state and clean operation" "Dirty,Clean" bitfld.long 0x000 13.--13. " ICACTIVE ,Instruction cache state" "Inactive,Active" bitfld.long 0x000 12.--12. " DCACTIVE ,Data cache state" "Inactive,Active" textline " " bitfld.long 0x000 2.--2. " FORCEWT ,Enables Force Write-Through in th edata cache" "Disabled,Enabled" bitfld.long 0x000 0.--0. " SIWT ,Shared cachable-is-WT for data cache" "Disabled,Enabled" group.long 0x10010++0x07 line.long 0x00 "ITCMCR,ITCM Control Register" bitfld.long 0x000 3.--6. " SZ ,TCM size" "Not impl.,Res,Res,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB" bitfld.long 0x000 0.--0. " EN ,TCM enabled" "Disable,Enable" line.long 0x04 "DTCMCR,DTCM Control Register" bitfld.long 0x004 3.--6. " SZ ,TCM size" "Not impl.,Res,Res,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB" bitfld.long 0x004 0.--0. " EN ,TCM enabled" "Disable,Enable" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10210)&0x00000001)==0x00000000) rgroup.long 0x10200++0x03 line.long 0x000 "DCADCRR,Direct Cache Access Data Cache Read Register" bitfld.long 0x000 24.--24. " DIRY ,Dirty State of the Data Cache line" "No,Yes" bitfld.long 0x000 23.--23. " NS ,None-Secure state of the Data cache line" "Secure,Non-secure" textline " " bitfld.long 0x000 22.--22. " Valid ,Valid State of the Data Cache line" "No,Yes" hexmask.long 0x000 0.--20. 1. " TAG ,Tag Address" else rgroup.long 0x10200++0x03 line.long 0x000 "DCADCRR,Direct Cache Access Data Cache Read Register" hexmask.long 0x000 0.--31. 1. " DATA ,Data cache data entry" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10214)&0x00000001)==0x00000000) rgroup.long 0x10204++0x03 line.long 0x000 "DCAICRR,Direct Cache Access Instruction Cache Read Register" bitfld.long 0x000 22.--22. " Valid ,Valid State of the Instruction Cache line" "No,Yes" hexmask.long 0x000 0.--20. 1. " TAG ,Tag Address" else rgroup.long 0x10204++0x03 line.long 0x000 "DCAICRR,Direct Cache Access Data Cache Read Register" hexmask.long 0x000 0.--31. 1. " DATA ,Instruction cache data entry" endif group.long 0x10210++0x07 line.long 0x00 "DCADCLR,Direct Cache Access Data Cache Location Register" bitfld.long 0x000 30.--31. " WAY ,Cache Way" "0,1,2,3" hexmask.long 0x000 5.--13. 1. " SET ,Cache Set Index" hexmask.long 0x000 2.--4. 1. " OFFSET ,Data Offset (Data RAM only)" textline " " bitfld.long 0x000 0.--0. " RAMTYPE ,RAM Type" "Tag RAM,Data RAM" line.long 0x04 "DCAICLR,Direct Cache Access Instruction Cache Location Register" bitfld.long 0x004 30.--30. " WAY ,Cache Way" "0,1" hexmask.long 0x004 5.--14. 1. " SET ,Cache Set Index" hexmask.long 0x004 2.--4. 1. " OFFSET ,Data Offset (Data RAM only)" textline " " bitfld.long 0x004 0.--0. " RAMTYPE ,RAM Type" "Tag RAM,Data RAM" group.long 0x10500++0x03 line.long 0x00 "ITGU_CTRL,ITCM Gate Control Register" bitfld.long 0x000 1.--1. " DEREN ,Enable AHBT error response for ITGU fault" "disabled,enabled" bitfld.long 0x000 0.--0. " DBFEN ,Enable Data access BusFault for ITGU fault" "disabled,enabled" rgroup.long 0x10504++0x03 line.long 0x00 "ITGU_CFG,ITCM Gate Configuration Register" bitfld.long 0x000 31.--31. " PRESENT ,TGU present" "no,yes" bitfld.long 0x000 8.--11. " NUMBLKS ,Number of blocks" "1,2,4,8,16,32,64,128,256,512,1K,2K,4K,8K,16K,32K" bitfld.long 0x000 0.--3. " BLKSZ ,Block size in bytes" "32B,64B,128B,256B,512B,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB" tree "ITCM Gate Look-up Table Registers" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)==0x00000000) group.long 0x10510++0x03 line.long 0x000 "ITGU_LUT0,ITCM Gate Look-up Table Register 0" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)==0x00000100) group.long 0x10510++0x03 line.long 0x000 "ITGU_LUT0,ITCM Gate Look-up Table Register 0" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)==0x00000200) group.long 0x10510++0x03 line.long 0x000 "ITGU_LUT0,ITCM Gate Look-up Table Register 0" bitfld.long 0x000 3.--3. " BLK[3] ,Block 3 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[2] ,Block 2 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)==0x00000300) group.long 0x10510++0x03 line.long 0x000 "ITGU_LUT0,ITCM Gate Look-up Table Register 0" bitfld.long 0x000 7.--7. " BLK[7] ,Block 7 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[6] ,Block 6 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[5] ,Block 5 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[4] ,Block 4 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[3] ,Block 3 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[2] ,Block 2 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)==0x00000400) group.long 0x10510++0x03 line.long 0x000 "ITGU_LUT0,ITCM Gate Look-up Table Register 0" bitfld.long 0x000 15.--15. " BLK[15] ,Block 15 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[14] ,Block 14 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[13] ,Block 13 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[12] ,Block 12 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[11] ,Block 11 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[10] ,Block 10 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[9] ,Block 9 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[8] ,Block 8 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[7] ,Block 7 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[6] ,Block 6 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[5] ,Block 5 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[4] ,Block 4 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[3] ,Block 3 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[2] ,Block 2 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)>=0x00000500) group.long 0x10510++0x03 line.long 0x000 "ITGU_LUT0,ITCM Gate Look-up Table Register 0" bitfld.long 0x000 31.--31. " BLK[31] ,Block 31 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[30] ,Block 30 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[29] ,Block 29 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[28] ,Block 28 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[27] ,Block 27 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[26] ,Block 26 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[25] ,Block 25 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[24] ,Block 24 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[23] ,Block 23 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[32] ,Block 22 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[21] ,Block 21 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[20] ,Block 20 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[19] ,Block 19 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[18] ,Block 18 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[17] ,Block 17 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[16] ,Block 16 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[15] ,Block 15 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[14] ,Block 14 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[13] ,Block 13 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[12] ,Block 12 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[11] ,Block 11 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[10] ,Block 10, security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[9] ,Block 9 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[8] ,Block 8 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[7] ,Block 7 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[6] ,Block 6 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[5] ,Block 5 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[4] ,Block 4 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[3] ,Block 3 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[2] ,Block 2 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)>=0x00000600) group.long 0x10514++0x03 line.long 0x000 "ITGU_LUT1,ITCM Gate Look-up Table Register 1" bitfld.long 0x000 31.--31. " BLK[63] ,Block 63 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[62] ,Block 62 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[61] ,Block 61 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[60] ,Block 60 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[59] ,Block 59 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[58] ,Block 58 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[57] ,Block 57 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[56] ,Block 56 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[55] ,Block 55 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[54] ,Block 54 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[53] ,Block 53 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[52] ,Block 52 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[51] ,Block 51 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[50] ,Block 50 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[49] ,Block 49 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[48] ,Block 48 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[47] ,Block 47 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[46] ,Block 46 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[45] ,Block 45 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[44] ,Block 44 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[43] ,Block 43 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[42] ,Block 42 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[41] ,Block 41 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[40] ,Block 40 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[39] ,Block 39 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[38] ,Block 38 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[37] ,Block 37 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[36] ,Block 36 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[35] ,Block 35 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[34] ,Block 34 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[33] ,Block 33 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[32] ,Block 32 security mapping" "secure,non-secure" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)>=0x00000700) group.long 0x10518++0x03 line.long 0x000 "ITGU_LUT2,ITCM Gate Look-up Table Register 2" bitfld.long 0x000 31.--31. " BLK[95] ,Block 95 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[94] ,Block 94 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[93] ,Block 93 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[92] ,Block 92 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[91] ,Block 91 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[90] ,Block 90 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[89] ,Block 89 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[88] ,Block 88 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[87] ,Block 87 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[86] ,Block 86 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[85] ,Block 85 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[84] ,Block 84 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[83] ,Block 83 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[82] ,Block 82 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[81] ,Block 81 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[80] ,Block 80 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[79] ,Block 79 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[78] ,Block 78 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[77] ,Block 77 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[76] ,Block 76 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[75] ,Block 75 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[74] ,Block 74 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[73] ,Block 73 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[72] ,Block 72 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[71] ,Block 71 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[70] ,Block 70 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[69] ,Block 69 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[68] ,Block 68 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[67] ,Block 67 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[66] ,Block 66 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[65] ,Block 65 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[64] ,Block 64 security mapping" "secure,non-secure" group.long 0x1051c++0x03 line.long 0x000 "ITGU_LUT3,ITCM Gate Look-up Table Register 3" bitfld.long 0x000 31.--31. " BLK[127] ,Block 127 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[126] ,Block 126 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[125] ,Block 125 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[124] ,Block 124 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[123] ,Block 123 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[122] ,Block 122 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[121] ,Block 121 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[120] ,Block 120 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[119] ,Block 119 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[118] ,Block 118 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[117] ,Block 117 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[116] ,Block 116 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[115] ,Block 115 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[114] ,Block 114 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[113] ,Block 113 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[112] ,Block 112 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[111] ,Block 111 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[110] ,Block 110 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[109] ,Block 109 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[108] ,Block 108 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[107] ,Block 107 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[106] ,Block 106 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[105] ,Block 105 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[104] ,Block 104 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[103] ,Block 103 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[102] ,Block 102 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[101] ,Block 101 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[100] ,Block 100 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[99] ,Block 99 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[98] ,Block 98 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[97] ,Block 97 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[96] ,Block 96 security mapping" "secure,non-secure" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)>=0x00000800) group.long 0x10520++0x03 line.long 0x000 "ITGU_LUT4,ITCM Gate Look-up Table Register 4" bitfld.long 0x000 31.--31. " BLK[159] ,Block 159 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[158] ,Block 158 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[157] ,Block 157 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[156] ,Block 156 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[155] ,Block 155 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[154] ,Block 154 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[153] ,Block 153 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[152] ,Block 152 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[151] ,Block 151 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[150] ,Block 150 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[149] ,Block 149 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[148] ,Block 148 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[147] ,Block 147 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[146] ,Block 146 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[145] ,Block 145 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[144] ,Block 144 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[143] ,Block 143 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[142] ,Block 142 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[141] ,Block 141 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[140] ,Block 140 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[139] ,Block 139 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[138] ,Block 138 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[137] ,Block 137 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[136] ,Block 136 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[135] ,Block 135 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[134] ,Block 134 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[133] ,Block 133 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[132] ,Block 132 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[131] ,Block 131 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[130] ,Block 130 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[129] ,Block 129 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[128] ,Block 128 security mapping" "secure,non-secure" group.long 0x10524++0x03 line.long 0x000 "ITGU_LUT5,ITCM Gate Look-up Table Register 5" bitfld.long 0x000 31.--31. " BLK[191] ,Block 191 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[190] ,Block 190 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[189] ,Block 189 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[188] ,Block 188 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[187] ,Block 187 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[186] ,Block 186 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[185] ,Block 185 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[184] ,Block 184 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[183] ,Block 183 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[182] ,Block 182 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[181] ,Block 181 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[180] ,Block 180 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[179] ,Block 179 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[178] ,Block 178 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[177] ,Block 177 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[176] ,Block 176 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[175] ,Block 175 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[174] ,Block 174 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[173] ,Block 173 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[172] ,Block 172 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[171] ,Block 171 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[170] ,Block 170 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[169] ,Block 169 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[168] ,Block 168 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[167] ,Block 167 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[166] ,Block 166 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[165] ,Block 165 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[164] ,Block 164 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[163] ,Block 163 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[162] ,Block 162 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[161] ,Block 161 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[160] ,Block 160 security mapping" "secure,non-secure" group.long 0x10528++0x03 line.long 0x000 "ITGU_LUT6,ITCM Gate Look-up Table Register 6" bitfld.long 0x000 31.--31. " BLK[223] ,Block 223 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[222] ,Block 222 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[221] ,Block 221 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[220] ,Block 220 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[219] ,Block 219 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[218] ,Block 218 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[217] ,Block 217 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[216] ,Block 216 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[215] ,Block 215 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[214] ,Block 214 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[213] ,Block 213 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[212] ,Block 212 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[211] ,Block 211 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[210] ,Block 210 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[209] ,Block 209 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[208] ,Block 208 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[207] ,Block 207 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[206] ,Block 206 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[205] ,Block 205 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[204] ,Block 204 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[203] ,Block 203 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[202] ,Block 202 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[201] ,Block 201 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[200] ,Block 200 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[199] ,Block 199 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[198] ,Block 198 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[197] ,Block 197 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[196] ,Block 196 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[195] ,Block 195 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[194] ,Block 194 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[193] ,Block 193 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[192] ,Block 192 security mapping" "secure,non-secure" group.long 0x1052c++0x03 line.long 0x000 "ITGU_LUT7,ITCM Gate Look-up Table Register 7" bitfld.long 0x000 31.--31. " BLK[255] ,Block 255 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[254] ,Block 254 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[253] ,Block 253 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[252] ,Block 252 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[251] ,Block 251 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[250] ,Block 250 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[249] ,Block 249 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[248] ,Block 248 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[247] ,Block 247 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[246] ,Block 246 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[245] ,Block 245 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[244] ,Block 244 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[243] ,Block 243 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[242] ,Block 242 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[241] ,Block 241 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[240] ,Block 240 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[239] ,Block 239 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[238] ,Block 238 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[237] ,Block 237 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[236] ,Block 236 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[235] ,Block 235 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[234] ,Block 234 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[233] ,Block 233 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[232] ,Block 232 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[231] ,Block 231 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[230] ,Block 230 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[229] ,Block 229 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[228] ,Block 228 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[227] ,Block 227 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[226] ,Block 226 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[225] ,Block 225 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[224] ,Block 224 security mapping" "secure,non-secure" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10504)&0x00000F00)>=0x00000900) group.long 0x10530++0x03 line.long 0x000 "ITGU_LUT8,ITCM Gate Look-up Table Register 8" bitfld.long 0x000 31.--31. " BLK[287] ,Block 287 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[286] ,Block 286 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[285] ,Block 285 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[284] ,Block 284 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[283] ,Block 283 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[282] ,Block 282 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[281] ,Block 281 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[280] ,Block 280 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[279] ,Block 279 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[278] ,Block 278 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[277] ,Block 277 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[276] ,Block 276 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[275] ,Block 275 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[274] ,Block 274 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[273] ,Block 273 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[272] ,Block 272 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[271] ,Block 271 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[270] ,Block 270 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[269] ,Block 269 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[268] ,Block 268 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[267] ,Block 267 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[266] ,Block 266 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[265] ,Block 265 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[264] ,Block 264 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[263] ,Block 263 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[262] ,Block 262 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[261] ,Block 261 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[260] ,Block 260 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[259] ,Block 259 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[258] ,Block 258 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[257] ,Block 257 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[256] ,Block 256 security mapping" "secure,non-secure" group.long 0x10534++0x03 line.long 0x000 "ITGU_LUT9,ITCM Gate Look-up Table Register 9" bitfld.long 0x000 31.--31. " BLK[319] ,Block 319 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[318] ,Block 318 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[317] ,Block 317 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[316] ,Block 316 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[315] ,Block 315 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[314] ,Block 314 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[313] ,Block 313 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[312] ,Block 312 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[311] ,Block 311 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[310] ,Block 310 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[309] ,Block 309 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[308] ,Block 308 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[307] ,Block 307 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[306] ,Block 306 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[305] ,Block 305 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[304] ,Block 304 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[303] ,Block 303 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[302] ,Block 302 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[301] ,Block 301 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[300] ,Block 300 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[299] ,Block 299 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[298] ,Block 298 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[297] ,Block 297 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[296] ,Block 296 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[295] ,Block 295 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[294] ,Block 294 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[293] ,Block 293 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[292] ,Block 292 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[291] ,Block 291 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[290] ,Block 290 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[289] ,Block 289 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[288] ,Block 288 security mapping" "secure,non-secure" group.long 0x10538++0x03 line.long 0x000 "ITGU_LUT10,ITCM Gate Look-up Table Register 10" bitfld.long 0x000 31.--31. " BLK[351] ,Block 351 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[350] ,Block 350 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[349] ,Block 349 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[348] ,Block 348 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[347] ,Block 347 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[346] ,Block 346 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[345] ,Block 345 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[344] ,Block 344 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[343] ,Block 343 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[342] ,Block 342 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[341] ,Block 341 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[340] ,Block 340 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[339] ,Block 339 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[338] ,Block 338 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[337] ,Block 337 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[336] ,Block 336 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[335] ,Block 335 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[334] ,Block 334 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[333] ,Block 333 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[332] ,Block 332 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[331] ,Block 331 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[330] ,Block 330 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[329] ,Block 329 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[328] ,Block 328 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[327] ,Block 327 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[326] ,Block 326 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[325] ,Block 325 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[324] ,Block 324 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[323] ,Block 323 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[322] ,Block 322 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[321] ,Block 321 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[320] ,Block 320 security mapping" "secure,non-secure" group.long 0x1053c++0x03 line.long 0x000 "ITGU_LUT11,ITCM Gate Look-up Table Register 11" bitfld.long 0x000 31.--31. " BLK[383] ,Block 383 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[382] ,Block 382 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[381] ,Block 381 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[380] ,Block 380 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[379] ,Block 379 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[378] ,Block 378 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[377] ,Block 377 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[376] ,Block 376 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[375] ,Block 375 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[374] ,Block 374 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[373] ,Block 373 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[372] ,Block 372 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[371] ,Block 371 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[370] ,Block 370 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[369] ,Block 369 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[368] ,Block 368 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[367] ,Block 367 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[366] ,Block 366 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[365] ,Block 365 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[364] ,Block 364 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[363] ,Block 363 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[362] ,Block 362 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[361] ,Block 361 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[360] ,Block 360 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[359] ,Block 359 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[358] ,Block 358 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[357] ,Block 357 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[356] ,Block 356 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[355] ,Block 355 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[354] ,Block 354 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[353] ,Block 353 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[352] ,Block 352 security mapping" "secure,non-secure" group.long 0x10540++0x03 line.long 0x000 "ITGU_LUT12,ITCM Gate Look-up Table Register 12" bitfld.long 0x000 31.--31. " BLK[415] ,Block 415 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[414] ,Block 414 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[413] ,Block 413 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[412] ,Block 412 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[411] ,Block 411 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[410] ,Block 410 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[409] ,Block 409 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[408] ,Block 408 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[407] ,Block 407 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[406] ,Block 406 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[405] ,Block 405 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[404] ,Block 404 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[403] ,Block 403 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[402] ,Block 402 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[401] ,Block 401 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[400] ,Block 400 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[399] ,Block 399 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[398] ,Block 398 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[397] ,Block 397 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[396] ,Block 396 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[395] ,Block 395 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[394] ,Block 394 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[393] ,Block 393 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[392] ,Block 392 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[391] ,Block 391 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[390] ,Block 390 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[389] ,Block 389 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[388] ,Block 388 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[387] ,Block 387 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[386] ,Block 386 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[385] ,Block 385 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[384] ,Block 384 security mapping" "secure,non-secure" group.long 0x10544++0x03 line.long 0x000 "ITGU_LUT13,ITCM Gate Look-up Table Register 13" bitfld.long 0x000 31.--31. " BLK[447] ,Block 447 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[446] ,Block 446 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[445] ,Block 445 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[444] ,Block 444 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[443] ,Block 443 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[442] ,Block 442 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[441] ,Block 441 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[440] ,Block 440 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[439] ,Block 439 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[438] ,Block 438 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[437] ,Block 437 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[436] ,Block 436 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[435] ,Block 435 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[434] ,Block 434 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[433] ,Block 433 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[432] ,Block 432 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[431] ,Block 431 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[430] ,Block 430 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[429] ,Block 429 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[428] ,Block 428 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[427] ,Block 427 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[426] ,Block 426 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[425] ,Block 425 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[424] ,Block 424 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[423] ,Block 423 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[422] ,Block 422 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[421] ,Block 421 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[420] ,Block 420 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[419] ,Block 419 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[418] ,Block 418 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[417] ,Block 417 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[416] ,Block 416 security mapping" "secure,non-secure" group.long 0x10548++0x03 line.long 0x000 "ITGU_LUT14,ITCM Gate Look-up Table Register 14" bitfld.long 0x000 31.--31. " BLK[479] ,Block 479 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[478] ,Block 478 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[477] ,Block 477 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[476] ,Block 476 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[475] ,Block 475 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[474] ,Block 474 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[473] ,Block 473 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[472] ,Block 472 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[471] ,Block 471 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[470] ,Block 470 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[469] ,Block 469 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[468] ,Block 468 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[467] ,Block 467 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[466] ,Block 466 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[465] ,Block 465 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[464] ,Block 464 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[463] ,Block 463 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[462] ,Block 462 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[461] ,Block 461 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[460] ,Block 460 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[459] ,Block 459 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[458] ,Block 458 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[457] ,Block 457 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[456] ,Block 456 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[455] ,Block 455 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[454] ,Block 454 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[453] ,Block 453 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[452] ,Block 452 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[451] ,Block 451 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[450] ,Block 450 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[449] ,Block 449 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[448] ,Block 448 security mapping" "secure,non-secure" group.long 0x1054c++0x03 line.long 0x000 "ITGU_LUT15,ITCM Gate Look-up Table Register 15" bitfld.long 0x000 31.--31. " BLK[511] ,Block 511 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[510] ,Block 510 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[509] ,Block 509 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[508] ,Block 508 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[507] ,Block 507 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[506] ,Block 506 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[505] ,Block 505 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[504] ,Block 504 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[503] ,Block 503 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[502] ,Block 502 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[501] ,Block 501 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[500] ,Block 500 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[499] ,Block 499 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[498] ,Block 498 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[497] ,Block 497 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[496] ,Block 496 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[495] ,Block 495 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[494] ,Block 494 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[493] ,Block 493 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[492] ,Block 492 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[491] ,Block 491 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[490] ,Block 490 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[489] ,Block 489 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[488] ,Block 488 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[487] ,Block 487 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[486] ,Block 486 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[485] ,Block 485 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[484] ,Block 484 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[483] ,Block 483 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[482] ,Block 482 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[481] ,Block 481 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[480] ,Block 480 security mapping" "secure,non-secure" endif tree.end textline " " group.long 0x10600++0x03 line.long 0x000 "DTGU_CTRL,DTCM Gate Control Register" bitfld.long 0x000 1.--1. " DEREN ,Enable AHBT error response for DTGU fault" "disabled,enabled" bitfld.long 0x000 0.--0. " DBFEN ,Enable Data access BusFault for DTGU fault" "disabled,enabled" rgroup.long 0x10604++0x03 line.long 0x000 "DTGU_CFG,DTCM Gate Configuration Register" bitfld.long 0x000 31.--31. " PRESENT ,TGU present" "no,yes" bitfld.long 0x000 8.--11. " NUMBLKS ,Number of blocks" "1,2,4,8,16,32,64,128,256,512,1K,2K,4K,8K,16K,32K" bitfld.long 0x000 0.--3. " BLKSZ ,Block size in bytes" "32B,64B,128B,256B,512B,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB" tree "DTCM Gate Look-up Table Registers" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)==0x00000000) group.long 0x10610++0x03 line.long 0x000 "DTGU_LUT0,DTCM Gate Look-up Table Register 0" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)==0x00000100) group.long 0x10610++0x03 line.long 0x000 "DTGU_LUT0,DTCM Gate Look-up Table Register 0" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)==0x00000200) group.long 0x10610++0x03 line.long 0x000 "DTGU_LUT0,DTCM Gate Look-up Table Register 0" bitfld.long 0x000 3.--3. " BLK[3] ,Block 3 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[2] ,Block 2 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)==0x00000300) group.long 0x10610++0x03 line.long 0x000 "DTGU_LUT0,DTCM Gate Look-up Table Register 0" bitfld.long 0x000 7.--7. " BLK[7] ,Block 7 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[6] ,Block 6 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[5] ,Block 5 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[4] ,Block 4 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[3] ,Block 3 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[2] ,Block 2 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)==0x00000400) group.long 0x10610++0x03 line.long 0x000 "DTGU_LUT0,DTCM Gate Look-up Table Register 0" bitfld.long 0x000 15.--15. " BLK[15] ,Block 15 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[14] ,Block 14 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[13] ,Block 13 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[12] ,Block 12 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[11] ,Block 11 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[10] ,Block 10 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[9] ,Block 9 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[8] ,Block 8 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[7] ,Block 7 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[6] ,Block 6 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[5] ,Block 5 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[4] ,Block 4 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[3] ,Block 3 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[2] ,Block 2 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)>=0x00000500) group.long 0x10610++0x03 line.long 0x000 "DTGU_LUT0,DTCM Gate Look-up Table Register 0" bitfld.long 0x000 31.--31. " BLK[31] ,Block 31 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[30] ,Block 30 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[29] ,Block 29 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[28] ,Block 28 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[27] ,Block 27 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[26] ,Block 26 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[25] ,Block 25 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[24] ,Block 24 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[23] ,Block 23 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[32] ,Block 22 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[21] ,Block 21 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[20] ,Block 20 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[19] ,Block 19 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[18] ,Block 18 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[17] ,Block 17 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[16] ,Block 16 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[15] ,Block 15 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[14] ,Block 14 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[13] ,Block 13 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[12] ,Block 12 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[11] ,Block 11 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[10] ,Block 10, security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[9] ,Block 9 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[8] ,Block 8 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[7] ,Block 7 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[6] ,Block 6 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[5] ,Block 5 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[4] ,Block 4 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[3] ,Block 3 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[2] ,Block 2 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[1] ,Block 1 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[0] ,Block 0 security mapping" "secure,non-secure" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)>=0x00000600) group.long 0x10614++0x03 line.long 0x000 "DTGU_LUT1,DTCM Gate Look-up Table Register 1" bitfld.long 0x000 31.--31. " BLK[63] ,Block 63 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[62] ,Block 62 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[61] ,Block 61 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[60] ,Block 60 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[59] ,Block 59 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[58] ,Block 58 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[57] ,Block 57 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[56] ,Block 56 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[55] ,Block 55 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[54] ,Block 54 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[53] ,Block 53 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[52] ,Block 52 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[51] ,Block 51 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[50] ,Block 50 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[49] ,Block 49 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[48] ,Block 48 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[47] ,Block 47 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[46] ,Block 46 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[45] ,Block 45 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[44] ,Block 44 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[43] ,Block 43 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[42] ,Block 42 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[41] ,Block 41 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[40] ,Block 40 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[39] ,Block 39 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[38] ,Block 38 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[37] ,Block 37 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[36] ,Block 36 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[35] ,Block 35 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[34] ,Block 34 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[33] ,Block 33 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[32] ,Block 32 security mapping" "secure,non-secure" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)>=0x00000700) group.long 0x10618++0x03 line.long 0x000 "DTGU_LUT2,DTCM Gate Look-up Table Register 2" bitfld.long 0x000 31.--31. " BLK[95] ,Block 95 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[94] ,Block 94 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[93] ,Block 93 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[92] ,Block 92 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[91] ,Block 91 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[90] ,Block 90 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[89] ,Block 89 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[88] ,Block 88 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[87] ,Block 87 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[86] ,Block 86 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[85] ,Block 85 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[84] ,Block 84 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[83] ,Block 83 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[82] ,Block 82 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[81] ,Block 81 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[80] ,Block 80 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[79] ,Block 79 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[78] ,Block 78 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[77] ,Block 77 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[76] ,Block 76 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[75] ,Block 75 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[74] ,Block 74 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[73] ,Block 73 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[72] ,Block 72 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[71] ,Block 71 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[70] ,Block 70 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[69] ,Block 69 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[68] ,Block 68 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[67] ,Block 67 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[66] ,Block 66 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[65] ,Block 65 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[64] ,Block 64 security mapping" "secure,non-secure" group.long 0x1061c++0x03 line.long 0x000 "DTGU_LUT3,DTCM Gate Look-up Table Register 3" bitfld.long 0x000 31.--31. " BLK[127] ,Block 127 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[126] ,Block 126 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[125] ,Block 125 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[124] ,Block 124 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[123] ,Block 123 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[122] ,Block 122 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[121] ,Block 121 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[120] ,Block 120 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[119] ,Block 119 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[118] ,Block 118 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[117] ,Block 117 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[116] ,Block 116 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[115] ,Block 115 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[114] ,Block 114 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[113] ,Block 113 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[112] ,Block 112 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[111] ,Block 111 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[110] ,Block 110 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[109] ,Block 109 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[108] ,Block 108 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[107] ,Block 107 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[106] ,Block 106 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[105] ,Block 105 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[104] ,Block 104 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[103] ,Block 103 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[102] ,Block 102 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[101] ,Block 101 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[100] ,Block 100 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[99] ,Block 99 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[98] ,Block 98 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[97] ,Block 97 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[96] ,Block 96 security mapping" "secure,non-secure" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)>=0x00000800) group.long 0x10620++0x03 line.long 0x000 "DTGU_LUT4,DTCM Gate Look-up Table Register 4" bitfld.long 0x000 31.--31. " BLK[159] ,Block 159 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[158] ,Block 158 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[157] ,Block 157 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[156] ,Block 156 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[155] ,Block 155 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[154] ,Block 154 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[153] ,Block 153 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[152] ,Block 152 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[151] ,Block 151 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[150] ,Block 150 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[149] ,Block 149 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[148] ,Block 148 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[147] ,Block 147 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[146] ,Block 146 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[145] ,Block 145 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[144] ,Block 144 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[143] ,Block 143 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[142] ,Block 142 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[141] ,Block 141 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[140] ,Block 140 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[139] ,Block 139 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[138] ,Block 138 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[137] ,Block 137 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[136] ,Block 136 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[135] ,Block 135 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[134] ,Block 134 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[133] ,Block 133 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[132] ,Block 132 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[131] ,Block 131 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[130] ,Block 130 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[129] ,Block 129 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[128] ,Block 128 security mapping" "secure,non-secure" group.long 0x10624++0x03 line.long 0x000 "DTGU_LUT5,DTCM Gate Look-up Table Register 5" bitfld.long 0x000 31.--31. " BLK[191] ,Block 191 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[190] ,Block 190 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[189] ,Block 189 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[188] ,Block 188 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[187] ,Block 187 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[186] ,Block 186 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[185] ,Block 185 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[184] ,Block 184 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[183] ,Block 183 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[182] ,Block 182 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[181] ,Block 181 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[180] ,Block 180 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[179] ,Block 179 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[178] ,Block 178 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[177] ,Block 177 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[176] ,Block 176 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[175] ,Block 175 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[174] ,Block 174 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[173] ,Block 173 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[172] ,Block 172 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[171] ,Block 171 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[170] ,Block 170 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[169] ,Block 169 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[168] ,Block 168 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[167] ,Block 167 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[166] ,Block 166 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[165] ,Block 165 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[164] ,Block 164 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[163] ,Block 163 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[162] ,Block 162 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[161] ,Block 161 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[160] ,Block 160 security mapping" "secure,non-secure" group.long 0x10628++0x03 line.long 0x000 "DTGU_LUT6,DTCM Gate Look-up Table Register 6" bitfld.long 0x000 31.--31. " BLK[223] ,Block 223 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[222] ,Block 222 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[221] ,Block 221 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[220] ,Block 220 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[219] ,Block 219 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[218] ,Block 218 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[217] ,Block 217 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[216] ,Block 216 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[215] ,Block 215 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[214] ,Block 214 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[213] ,Block 213 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[212] ,Block 212 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[211] ,Block 211 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[210] ,Block 210 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[209] ,Block 209 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[208] ,Block 208 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[207] ,Block 207 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[206] ,Block 206 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[205] ,Block 205 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[204] ,Block 204 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[203] ,Block 203 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[202] ,Block 202 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[201] ,Block 201 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[200] ,Block 200 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[199] ,Block 199 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[198] ,Block 198 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[197] ,Block 197 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[196] ,Block 196 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[195] ,Block 195 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[194] ,Block 194 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[193] ,Block 193 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[192] ,Block 192 security mapping" "secure,non-secure" group.long 0x1062c++0x03 line.long 0x000 "DTGU_LUT7,DTCM Gate Look-up Table Register 7" bitfld.long 0x000 31.--31. " BLK[255] ,Block 255 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[254] ,Block 254 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[253] ,Block 253 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[252] ,Block 252 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[251] ,Block 251 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[250] ,Block 250 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[249] ,Block 249 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[248] ,Block 248 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[247] ,Block 247 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[246] ,Block 246 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[245] ,Block 245 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[244] ,Block 244 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[243] ,Block 243 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[242] ,Block 242 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[241] ,Block 241 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[240] ,Block 240 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[239] ,Block 239 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[238] ,Block 238 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[237] ,Block 237 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[236] ,Block 236 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[235] ,Block 235 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[234] ,Block 234 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[233] ,Block 233 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[232] ,Block 232 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[231] ,Block 231 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[230] ,Block 230 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[229] ,Block 229 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[228] ,Block 228 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[227] ,Block 227 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[226] ,Block 226 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[225] ,Block 225 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[224] ,Block 224 security mapping" "secure,non-secure" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x10604)&0x00000F00)>=0x00000900) group.long 0x10630++0x03 line.long 0x000 "DTGU_LUT8,DTCM Gate Look-up Table Register 8" bitfld.long 0x000 31.--31. " BLK[287] ,Block 287 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[286] ,Block 286 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[285] ,Block 285 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[284] ,Block 284 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[283] ,Block 283 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[282] ,Block 282 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[281] ,Block 281 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[280] ,Block 280 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[279] ,Block 279 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[278] ,Block 278 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[277] ,Block 277 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[276] ,Block 276 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[275] ,Block 275 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[274] ,Block 274 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[273] ,Block 273 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[272] ,Block 272 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[271] ,Block 271 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[270] ,Block 270 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[269] ,Block 269 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[268] ,Block 268 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[267] ,Block 267 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[266] ,Block 266 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[265] ,Block 265 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[264] ,Block 264 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[263] ,Block 263 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[262] ,Block 262 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[261] ,Block 261 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[260] ,Block 260 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[259] ,Block 259 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[258] ,Block 258 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[257] ,Block 257 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[256] ,Block 256 security mapping" "secure,non-secure" group.long 0x10634++0x03 line.long 0x000 "DTGU_LUT9,DTCM Gate Look-up Table Register 9" bitfld.long 0x000 31.--31. " BLK[319] ,Block 319 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[318] ,Block 318 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[317] ,Block 317 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[316] ,Block 316 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[315] ,Block 315 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[314] ,Block 314 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[313] ,Block 313 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[312] ,Block 312 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[311] ,Block 311 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[310] ,Block 310 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[309] ,Block 309 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[308] ,Block 308 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[307] ,Block 307 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[306] ,Block 306 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[305] ,Block 305 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[304] ,Block 304 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[303] ,Block 303 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[302] ,Block 302 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[301] ,Block 301 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[300] ,Block 300 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[299] ,Block 299 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[298] ,Block 298 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[297] ,Block 297 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[296] ,Block 296 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[295] ,Block 295 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[294] ,Block 294 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[293] ,Block 293 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[292] ,Block 292 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[291] ,Block 291 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[290] ,Block 290 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[289] ,Block 289 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[288] ,Block 288 security mapping" "secure,non-secure" group.long 0x10638++0x03 line.long 0x000 "DTGU_LUT10,DTCM Gate Look-up Table Register 10" bitfld.long 0x000 31.--31. " BLK[351] ,Block 351 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[350] ,Block 350 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[349] ,Block 349 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[348] ,Block 348 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[347] ,Block 347 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[346] ,Block 346 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[345] ,Block 345 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[344] ,Block 344 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[343] ,Block 343 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[342] ,Block 342 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[341] ,Block 341 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[340] ,Block 340 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[339] ,Block 339 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[338] ,Block 338 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[337] ,Block 337 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[336] ,Block 336 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[335] ,Block 335 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[334] ,Block 334 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[333] ,Block 333 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[332] ,Block 332 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[331] ,Block 331 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[330] ,Block 330 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[329] ,Block 329 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[328] ,Block 328 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[327] ,Block 327 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[326] ,Block 326 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[325] ,Block 325 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[324] ,Block 324 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[323] ,Block 323 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[322] ,Block 322 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[321] ,Block 321 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[320] ,Block 320 security mapping" "secure,non-secure" group.long 0x1063c++0x03 line.long 0x000 "DTGU_LUT11,DTCM Gate Look-up Table Register 11" bitfld.long 0x000 31.--31. " BLK[383] ,Block 383 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[382] ,Block 382 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[381] ,Block 381 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[380] ,Block 380 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[379] ,Block 379 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[378] ,Block 378 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[377] ,Block 377 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[376] ,Block 376 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[375] ,Block 375 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[374] ,Block 374 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[373] ,Block 373 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[372] ,Block 372 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[371] ,Block 371 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[370] ,Block 370 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[369] ,Block 369 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[368] ,Block 368 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[367] ,Block 367 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[366] ,Block 366 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[365] ,Block 365 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[364] ,Block 364 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[363] ,Block 363 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[362] ,Block 362 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[361] ,Block 361 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[360] ,Block 360 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[359] ,Block 359 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[358] ,Block 358 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[357] ,Block 357 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[356] ,Block 356 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[355] ,Block 355 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[354] ,Block 354 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[353] ,Block 353 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[352] ,Block 352 security mapping" "secure,non-secure" group.long 0x10640++0x03 line.long 0x000 "DTGU_LUT12,DTCM Gate Look-up Table Register 12" bitfld.long 0x000 31.--31. " BLK[415] ,Block 415 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[414] ,Block 414 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[413] ,Block 413 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[412] ,Block 412 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[411] ,Block 411 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[410] ,Block 410 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[409] ,Block 409 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[408] ,Block 408 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[407] ,Block 407 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[406] ,Block 406 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[405] ,Block 405 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[404] ,Block 404 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[403] ,Block 403 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[402] ,Block 402 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[401] ,Block 401 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[400] ,Block 400 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[399] ,Block 399 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[398] ,Block 398 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[397] ,Block 397 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[396] ,Block 396 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[395] ,Block 395 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[394] ,Block 394 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[393] ,Block 393 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[392] ,Block 392 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[391] ,Block 391 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[390] ,Block 390 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[389] ,Block 389 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[388] ,Block 388 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[387] ,Block 387 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[386] ,Block 386 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[385] ,Block 385 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[384] ,Block 384 security mapping" "secure,non-secure" group.long 0x10644++0x03 line.long 0x000 "DTGU_LUT13,DTCM Gate Look-up Table Register 13" bitfld.long 0x000 31.--31. " BLK[447] ,Block 447 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[446] ,Block 446 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[445] ,Block 445 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[444] ,Block 444 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[443] ,Block 443 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[442] ,Block 442 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[441] ,Block 441 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[440] ,Block 440 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[439] ,Block 439 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[438] ,Block 438 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[437] ,Block 437 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[436] ,Block 436 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[435] ,Block 435 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[434] ,Block 434 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[433] ,Block 433 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[432] ,Block 432 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[431] ,Block 431 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[430] ,Block 430 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[429] ,Block 429 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[428] ,Block 428 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[427] ,Block 427 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[426] ,Block 426 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[425] ,Block 425 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[424] ,Block 424 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[423] ,Block 423 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[422] ,Block 422 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[421] ,Block 421 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[420] ,Block 420 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[419] ,Block 419 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[418] ,Block 418 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[417] ,Block 417 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[416] ,Block 416 security mapping" "secure,non-secure" group.long 0x10648++0x03 line.long 0x000 "DTGU_LUT14,DTCM Gate Look-up Table Register 14" bitfld.long 0x000 31.--31. " BLK[479] ,Block 479 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[478] ,Block 478 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[477] ,Block 477 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[476] ,Block 476 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[475] ,Block 475 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[474] ,Block 474 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[473] ,Block 473 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[472] ,Block 472 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[471] ,Block 471 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[470] ,Block 470 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[469] ,Block 469 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[468] ,Block 468 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[467] ,Block 467 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[466] ,Block 466 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[465] ,Block 465 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[464] ,Block 464 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[463] ,Block 463 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[462] ,Block 462 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[461] ,Block 461 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[460] ,Block 460 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[459] ,Block 459 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[458] ,Block 458 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[457] ,Block 457 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[456] ,Block 456 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[455] ,Block 455 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[454] ,Block 454 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[453] ,Block 453 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[452] ,Block 452 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[451] ,Block 451 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[450] ,Block 450 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[449] ,Block 449 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[448] ,Block 448 security mapping" "secure,non-secure" group.long 0x1064c++0x03 line.long 0x000 "DTGU_LUT15,DTCM Gate Look-up Table Register 15" bitfld.long 0x000 31.--31. " BLK[511] ,Block 511 security mapping" "secure,non-secure" bitfld.long 0x000 30.--30. " BLK[510] ,Block 510 security mapping" "secure,non-secure" bitfld.long 0x000 29.--29. " BLK[509] ,Block 509 security mapping" "secure,non-secure" bitfld.long 0x000 28.--28. " BLK[508] ,Block 508 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 27.--27. " BLK[507] ,Block 507 security mapping" "secure,non-secure" bitfld.long 0x000 26.--26. " BLK[506] ,Block 506 security mapping" "secure,non-secure" bitfld.long 0x000 25.--25. " BLK[505] ,Block 505 security mapping" "secure,non-secure" bitfld.long 0x000 24.--24. " BLK[504] ,Block 504 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 23.--23. " BLK[503] ,Block 503 security mapping" "secure,non-secure" bitfld.long 0x000 22.--22. " BLK[502] ,Block 502 security mapping" "secure,non-secure" bitfld.long 0x000 21.--21. " BLK[501] ,Block 501 security mapping" "secure,non-secure" bitfld.long 0x000 20.--20. " BLK[500] ,Block 500 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 19.--19. " BLK[499] ,Block 499 security mapping" "secure,non-secure" bitfld.long 0x000 18.--18. " BLK[498] ,Block 498 security mapping" "secure,non-secure" bitfld.long 0x000 17.--17. " BLK[497] ,Block 497 security mapping" "secure,non-secure" bitfld.long 0x000 16.--16. " BLK[496] ,Block 496 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 15.--15. " BLK[495] ,Block 495 security mapping" "secure,non-secure" bitfld.long 0x000 14.--14. " BLK[494] ,Block 494 security mapping" "secure,non-secure" bitfld.long 0x000 13.--13. " BLK[493] ,Block 493 security mapping" "secure,non-secure" bitfld.long 0x000 12.--12. " BLK[492] ,Block 492 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 11.--11. " BLK[491] ,Block 491 security mapping" "secure,non-secure" bitfld.long 0x000 10.--10. " BLK[490] ,Block 490 security mapping" "secure,non-secure" bitfld.long 0x000 9.--9. " BLK[489] ,Block 489 security mapping" "secure,non-secure" bitfld.long 0x000 8.--8. " BLK[488] ,Block 488 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 7.--7. " BLK[487] ,Block 487 security mapping" "secure,non-secure" bitfld.long 0x000 6.--6. " BLK[486] ,Block 486 security mapping" "secure,non-secure" bitfld.long 0x000 5.--5. " BLK[485] ,Block 485 security mapping" "secure,non-secure" bitfld.long 0x000 4.--4. " BLK[484] ,Block 484 security mapping" "secure,non-secure" textline " " bitfld.long 0x000 3.--3. " BLK[483] ,Block 483 security mapping" "secure,non-secure" bitfld.long 0x000 2.--2. " BLK[482] ,Block 482 security mapping" "secure,non-secure" bitfld.long 0x000 1.--1. " BLK[481] ,Block 481 security mapping" "secure,non-secure" bitfld.long 0x000 0.--0. " BLK[480] ,Block 480 security mapping" "secure,non-secure" endif tree.end textline " " tree.end tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..." rgroup.long 0xD4C++0x03 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..." rgroup.long 0xD54++0x03 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD5C++0x03 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..." rgroup.long 0xD60++0x03 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." rgroup.long 0xD64++0x03 line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..." rgroup.long 0xD68++0x03 line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..." textline " " bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..." rgroup.long 0xD6C++0x03 line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..." textline " " bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..." rgroup.long 0xD70++0x03 line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..." bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..." bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..." textline " " bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..." bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..." tree.end tree "CoreSight Identification Registers" base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "DPIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DPIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DPIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DPIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DCIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DCIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DCIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DCIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" endif tree.end newline group.long 0xDC0++0x07 line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1" bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Security Attribution Unit (SAU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. group.long 0xDD0++0x03 line.long 0x00 "SAU_CTRL,SAU Control Register" bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure" bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled" rgroup.long 0xDD4++0x03 line.long 0x00 "SAU_TYPE,SAU Type Register" bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..." group.long 0xDD8++0x03 line.long 0x00 "SAU_RNR,SAU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR" tree.close "SAU regions" if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0) if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0 group.long 0xDDC++0x03 "Region 0" saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 0 (not implemented)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1 group.long 0xDDC++0x03 "Region 1" saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 1 (not implemented)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2 group.long 0xDDC++0x03 "Region 2" saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 2 (not implemented)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3 group.long 0xDDC++0x03 "Region 3" saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 3 (not implemented)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4 group.long 0xDDC++0x03 "Region 4" saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 4 (not implemented)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5 group.long 0xDDC++0x03 "Region 5" saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 5 (not implemented)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6 group.long 0xDDC++0x03 "Region 6" saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 6 (not implemented)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7 group.long 0xDDC++0x03 "Region 7" saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 7 (not implemented)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif else hgroup.long 0xDDC++0x03 "Region 0 (not accessible)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hgroup.long 0xDDC++0x03 "Region 1 (not accessible)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hgroup.long 0xDDC++0x03 "Region 2 (not accessible)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hgroup.long 0xDDC++0x03 "Region 3 (not accessible)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hgroup.long 0xDDC++0x03 "Region 4 (not accessible)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hgroup.long 0xDDC++0x03 "Region 5 (not accessible)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hgroup.long 0xDDC++0x03 "Region 6 (not accessible)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hgroup.long 0xDDC++0x03 "Region 7 (not accessible)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif tree.end group.long 0xDE4++0x03 line.long 0x00 "SFSR,Secure Fault Status Register" bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred" bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid" bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred" bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred" bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred" bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred" group.long 0xDE8++0x03 line.long 0x00 "SFAR,Secure Fault Address Register" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. group.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511" width 24. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x104++0x03 line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x104++0x03 hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x108++0x03 line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x108++0x03 hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x10C++0x03 line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x10C++0x03 hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x110++0x03 line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x110++0x03 hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x114++0x03 line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x114++0x03 hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x118++0x03 line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x118++0x03 hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x11C++0x03 line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x11C++0x03 hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x120++0x03 line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x120++0x03 hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x124++0x03 line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x124++0x03 hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x128++0x03 line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x128++0x03 hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x12C++0x03 line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x12C++0x03 hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x130++0x03 line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x130++0x03 hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x134++0x03 line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x134++0x03 hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x138++0x03 line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x138++0x03 hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) group.long 0x13C++0x03 line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x13C++0x03 hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register" endif tree.end width 24. tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x204++0x03 line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x204++0x03 hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x208++0x03 line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x208++0x03 hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x20C++0x03 line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x20C++0x03 hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x210++0x03 line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x210++0x03 hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x214++0x03 line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x214++0x03 hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x218++0x03 line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x218++0x03 hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x21C++0x03 line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x21C++0x03 hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x220++0x03 line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x220++0x03 hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x224++0x03 line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x224++0x03 hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x228++0x03 line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x228++0x03 hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x22C++0x03 line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x22C++0x03 hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x230++0x03 line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x230++0x03 hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x234++0x03 line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x234++0x03 hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x238++0x03 line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x238++0x03 hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) group.long 0x23C++0x03 line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x23C++0x03 hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register" endif tree.end width 11. tree "Interrupt Active Bit Registers" rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE0,Active Bit Register 0" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) rgroup.long 0x304++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x304++0x03 hide.long 0x00 "ACTIVE1,Active Bit Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) rgroup.long 0x308++0x03 line.long 0x00 "ACTIVE2,Active Bit Register 2" bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x308++0x03 hide.long 0x00 "ACTIVE2,Active Bit Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) rgroup.long 0x30C++0x03 line.long 0x00 "ACTIVE3,Active Bit Register 3" bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x30C++0x03 hide.long 0x00 "ACTIVE3,Active Bit Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) rgroup.long 0x310++0x03 line.long 0x00 "ACTIVE4,Active Bit Register 4" bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x310++0x03 hide.long 0x00 "ACTIVE4,Active Bit Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) rgroup.long 0x314++0x03 line.long 0x00 "ACTIVE5,Active Bit Register 5" bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x314++0x03 hide.long 0x00 "ACTIVE5,Active Bit Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) rgroup.long 0x318++0x03 line.long 0x00 "ACTIVE6,Active Bit Register 6" bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x318++0x03 hide.long 0x00 "ACTIVE6,Active Bit Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) rgroup.long 0x31C++0x03 line.long 0x00 "ACTIVE7,Active Bit Register 7" bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x31C++0x03 hide.long 0x00 "ACTIVE7,Active Bit Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) rgroup.long 0x320++0x03 line.long 0x00 "ACTIVE8,Active Bit Register 8" bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x320++0x03 hide.long 0x00 "ACTIVE8,Active Bit Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) rgroup.long 0x324++0x03 line.long 0x00 "ACTIVE9,Active Bit Register 9" bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x324++0x03 hide.long 0x00 "ACTIVE9,Active Bit Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) rgroup.long 0x328++0x03 line.long 0x00 "ACTIVE10,Active Bit Register 10" bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x328++0x03 hide.long 0x00 "ACTIVE10,Active Bit Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) rgroup.long 0x32C++0x03 line.long 0x00 "ACTIVE11,Active Bit Register 11" bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x32C++0x03 hide.long 0x00 "ACTIVE11,Active Bit Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) rgroup.long 0x330++0x03 line.long 0x00 "ACTIVE12,Active Bit Register 12" bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x330++0x03 hide.long 0x00 "ACTIVE12,Active Bit Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) rgroup.long 0x334++0x03 line.long 0x00 "ACTIVE13,Active Bit Register 13" bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x334++0x03 hide.long 0x00 "ACTIVE13,Active Bit Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) rgroup.long 0x338++0x03 line.long 0x00 "ACTIVE14,Active Bit Register 14" bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x338++0x03 hide.long 0x00 "ACTIVE14,Active Bit Register 14" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) rgroup.long 0x33C++0x03 line.long 0x00 "ACTIVE15,Active Bit Register 15" bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x33C++0x03 hide.long 0x00 "ACTIVE15,Active Bit Register 15" endif tree.end width 13. tree "Interrupt Target Non-Secure Registers" group.long 0x380++0x03 line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0" bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x384++0x03 line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure" else hgroup.long 0x384++0x03 hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x388++0x03 line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure" else hgroup.long 0x388++0x03 hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x38C++0x03 line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure" else hgroup.long 0x38C++0x03 hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x390++0x03 line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure" else hgroup.long 0x390++0x03 hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x394++0x03 line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure" else hgroup.long 0x394++0x03 hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x398++0x03 line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure" else hgroup.long 0x398++0x03 hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x39C++0x03 line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure" else hgroup.long 0x39C++0x03 hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x3A0++0x03 line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure" else hgroup.long 0x3A0++0x03 hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x3A4++0x03 line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure" else hgroup.long 0x3A4++0x03 hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x3A8++0x03 line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure" else hgroup.long 0x3A8++0x03 hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x3AC++0x03 line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure" else hgroup.long 0x3AC++0x03 hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x3B0++0x03 line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure" else hgroup.long 0x3B0++0x03 hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x3B4++0x03 line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure" else hgroup.long 0x3B4++0x03 hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x3B8++0x03 line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure" else hgroup.long 0x3B8++0x03 hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F) group.long 0x3BC++0x03 line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15" bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure" else hgroup.long 0x3BC++0x03 hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15" endif tree.end tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x420++0x1F line.long 0x0 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x4 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x8 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0xC "IPR11,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x10 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x14 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x18 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x1C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" else hgroup.long 0x420++0x1F hide.long 0x0 "IPR8,Interrupt Priority Register" hide.long 0x4 "IPR9,Interrupt Priority Register" hide.long 0x8 "IPR10,Interrupt Priority Register" hide.long 0xC "IPR11,Interrupt Priority Register" hide.long 0x10 "IPR12,Interrupt Priority Register" hide.long 0x14 "IPR13,Interrupt Priority Register" hide.long 0x18 "IPR14,Interrupt Priority Register" hide.long 0x1C "IPR15,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x440++0x1F line.long 0x0 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x4 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x8 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0xC "IPR19,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x10 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x14 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x18 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x1C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" else hgroup.long 0x440++0x1F hide.long 0x0 "IPR16,Interrupt Priority Register" hide.long 0x4 "IPR17,Interrupt Priority Register" hide.long 0x8 "IPR18,Interrupt Priority Register" hide.long 0xC "IPR19,Interrupt Priority Register" hide.long 0x10 "IPR20,Interrupt Priority Register" hide.long 0x14 "IPR21,Interrupt Priority Register" hide.long 0x18 "IPR22,Interrupt Priority Register" hide.long 0x1C "IPR23,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x460++0x1F line.long 0x0 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x4 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x8 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0xC "IPR27,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x10 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x14 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x18 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x1C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" else hgroup.long 0x460++0x1F hide.long 0x0 "IPR24,Interrupt Priority Register" hide.long 0x4 "IPR25,Interrupt Priority Register" hide.long 0x8 "IPR26,Interrupt Priority Register" hide.long 0xC "IPR27,Interrupt Priority Register" hide.long 0x10 "IPR28,Interrupt Priority Register" hide.long 0x14 "IPR29,Interrupt Priority Register" hide.long 0x18 "IPR30,Interrupt Priority Register" hide.long 0x1C "IPR31,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x480++0x1F line.long 0x0 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x4 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x8 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0xC "IPR35,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x10 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x14 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x18 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x1C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" else hgroup.long 0x480++0x1F hide.long 0x0 "IPR32,Interrupt Priority Register" hide.long 0x4 "IPR33,Interrupt Priority Register" hide.long 0x8 "IPR34,Interrupt Priority Register" hide.long 0xC "IPR35,Interrupt Priority Register" hide.long 0x10 "IPR36,Interrupt Priority Register" hide.long 0x14 "IPR37,Interrupt Priority Register" hide.long 0x18 "IPR38,Interrupt Priority Register" hide.long 0x1C "IPR39,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x4A0++0x1F line.long 0x0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0x4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0x8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0x10 "IPR44,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0x14 "IPR45,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0x18 "IPR46,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0x1C "IPR47,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" else hgroup.long 0x4A0++0x1F hide.long 0x0 "IPR40,Interrupt Priority Register" hide.long 0x4 "IPR41,Interrupt Priority Register" hide.long 0x8 "IPR42,Interrupt Priority Register" hide.long 0xC "IPR43,Interrupt Priority Register" hide.long 0x10 "IPR44,Interrupt Priority Register" hide.long 0x14 "IPR45,Interrupt Priority Register" hide.long 0x18 "IPR46,Interrupt Priority Register" hide.long 0x1C "IPR47,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x4C0++0x1F line.long 0x0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0x4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0x8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0x10 "IPR52,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0x14 "IPR53,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0x18 "IPR54,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0x1C "IPR55,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" else hgroup.long 0x4C0++0x1F hide.long 0x0 "IPR48,Interrupt Priority Register" hide.long 0x4 "IPR49,Interrupt Priority Register" hide.long 0x8 "IPR50,Interrupt Priority Register" hide.long 0xC "IPR51,Interrupt Priority Register" hide.long 0x10 "IPR52,Interrupt Priority Register" hide.long 0x14 "IPR53,Interrupt Priority Register" hide.long 0x18 "IPR54,Interrupt Priority Register" hide.long 0x1C "IPR55,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x4E0++0x1F line.long 0x0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0x4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0x8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" line.long 0x10 "IPR60,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority" line.long 0x14 "IPR61,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority" line.long 0x18 "IPR62,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority" line.long 0x1C "IPR63,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority" else hgroup.long 0x4E0++0x1F hide.long 0x0 "IPR56,Interrupt Priority Register" hide.long 0x4 "IPR57,Interrupt Priority Register" hide.long 0x8 "IPR58,Interrupt Priority Register" hide.long 0xC "IPR59,Interrupt Priority Register" hide.long 0x10 "IPR60,Interrupt Priority Register" hide.long 0x14 "IPR61,Interrupt Priority Register" hide.long 0x18 "IPR62,Interrupt Priority Register" hide.long 0x1C "IPR63,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x500++0x1F line.long 0x0 "IPR64,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority" line.long 0x4 "IPR65,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority" line.long 0x8 "IPR66,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority" line.long 0xC "IPR67,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority" line.long 0x10 "IPR68,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority" line.long 0x14 "IPR69,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority" line.long 0x18 "IPR70,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority" line.long 0x1C "IPR71,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority" else hgroup.long 0x500++0x1F hide.long 0x0 "IPR64,Interrupt Priority Register" hide.long 0x4 "IPR65,Interrupt Priority Register" hide.long 0x8 "IPR66,Interrupt Priority Register" hide.long 0xC "IPR67,Interrupt Priority Register" hide.long 0x10 "IPR68,Interrupt Priority Register" hide.long 0x14 "IPR69,Interrupt Priority Register" hide.long 0x18 "IPR70,Interrupt Priority Register" hide.long 0x1C "IPR71,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x520++0x1F line.long 0x0 "IPR72,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority" line.long 0x4 "IPR73,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority" line.long 0x8 "IPR74,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority" line.long 0xC "IPR75,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority" line.long 0x10 "IPR76,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority" line.long 0x14 "IPR77,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority" line.long 0x18 "IPR78,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority" line.long 0x1C "IPR79,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority" else hgroup.long 0x520++0x1F hide.long 0x0 "IPR72,Interrupt Priority Register" hide.long 0x4 "IPR73,Interrupt Priority Register" hide.long 0x8 "IPR74,Interrupt Priority Register" hide.long 0xC "IPR75,Interrupt Priority Register" hide.long 0x10 "IPR76,Interrupt Priority Register" hide.long 0x14 "IPR77,Interrupt Priority Register" hide.long 0x18 "IPR78,Interrupt Priority Register" hide.long 0x1C "IPR79,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x540++0x1F line.long 0x0 "IPR80,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority" line.long 0x4 "IPR81,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority" line.long 0x8 "IPR82,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority" line.long 0xC "IPR83,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority" line.long 0x10 "IPR84,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority" line.long 0x14 "IPR85,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority" line.long 0x18 "IPR86,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority" line.long 0x1C "IPR87,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority" else hgroup.long 0x540++0x1F hide.long 0x0 "IPR80,Interrupt Priority Register" hide.long 0x4 "IPR81,Interrupt Priority Register" hide.long 0x8 "IPR82,Interrupt Priority Register" hide.long 0xC "IPR83,Interrupt Priority Register" hide.long 0x10 "IPR84,Interrupt Priority Register" hide.long 0x14 "IPR85,Interrupt Priority Register" hide.long 0x18 "IPR86,Interrupt Priority Register" hide.long 0x1C "IPR87,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x560++0x1F line.long 0x0 "IPR88,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority" line.long 0x4 "IPR89,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority" line.long 0x8 "IPR90,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority" line.long 0xC "IPR91,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority" line.long 0x10 "IPR92,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority" line.long 0x14 "IPR93,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority" line.long 0x18 "IPR94,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority" line.long 0x1C "IPR95,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority" else hgroup.long 0x560++0x1F hide.long 0x0 "IPR88,Interrupt Priority Register" hide.long 0x4 "IPR89,Interrupt Priority Register" hide.long 0x8 "IPR90,Interrupt Priority Register" hide.long 0xC "IPR91,Interrupt Priority Register" hide.long 0x10 "IPR92,Interrupt Priority Register" hide.long 0x14 "IPR93,Interrupt Priority Register" hide.long 0x18 "IPR94,Interrupt Priority Register" hide.long 0x1C "IPR95,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x580++0x1F line.long 0x0 "IPR96,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority" line.long 0x4 "IPR97,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority" line.long 0x8 "IPR98,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority" line.long 0xC "IPR99,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority" line.long 0x10 "IPR100,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority" line.long 0x14 "IPR101,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority" line.long 0x18 "IPR102,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority" line.long 0x1C "IPR103,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority" else hgroup.long 0x580++0x1F hide.long 0x0 "IPR96,Interrupt Priority Register" hide.long 0x4 "IPR97,Interrupt Priority Register" hide.long 0x8 "IPR98,Interrupt Priority Register" hide.long 0xC "IPR99,Interrupt Priority Register" hide.long 0x10 "IPR100,Interrupt Priority Register" hide.long 0x14 "IPR101,Interrupt Priority Register" hide.long 0x18 "IPR102,Interrupt Priority Register" hide.long 0x1C "IPR103,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x5A0++0x1F line.long 0x0 "IPR104,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority" line.long 0x4 "IPR105,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority" line.long 0x8 "IPR106,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority" line.long 0xC "IPR107,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority" line.long 0x10 "IPR108,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority" line.long 0x14 "IPR109,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority" line.long 0x18 "IPR110,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority" line.long 0x1C "IPR111,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority" else hgroup.long 0x5A0++0x1F hide.long 0x0 "IPR104,Interrupt Priority Register" hide.long 0x4 "IPR105,Interrupt Priority Register" hide.long 0x8 "IPR106,Interrupt Priority Register" hide.long 0xC "IPR107,Interrupt Priority Register" hide.long 0x10 "IPR108,Interrupt Priority Register" hide.long 0x14 "IPR109,Interrupt Priority Register" hide.long 0x18 "IPR110,Interrupt Priority Register" hide.long 0x1C "IPR111,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x5C0++0x1F line.long 0x0 "IPR112,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority" line.long 0x4 "IPR113,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority" line.long 0x8 "IPR114,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority" line.long 0xC "IPR115,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority" line.long 0x10 "IPR116,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority" line.long 0x14 "IPR117,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority" line.long 0x18 "IPR118,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority" line.long 0x1C "IPR119,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority" else hgroup.long 0x5C0++0x1F hide.long 0x0 "IPR112,Interrupt Priority Register" hide.long 0x4 "IPR113,Interrupt Priority Register" hide.long 0x8 "IPR114,Interrupt Priority Register" hide.long 0xC "IPR115,Interrupt Priority Register" hide.long 0x10 "IPR116,Interrupt Priority Register" hide.long 0x14 "IPR117,Interrupt Priority Register" hide.long 0x18 "IPR118,Interrupt Priority Register" hide.long 0x1C "IPR119,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif (CORENAME()=="STARF") tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored" newline bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled" bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only" bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled" newline bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able" bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" newline bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able" bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" newline bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure" newline bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" newline bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x0B line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." newline bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." newline bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..." line.long 0x08 "MVFR2,Media and FP Feature Register 2" bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 13. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" newline bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" newline bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif newline group.long 0xE04++0x07 line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register" bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN" bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN" line.long 0x04 "DSCSR,Debug Security Control and Status Register" bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure" bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure" bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled" rgroup.long 0xFB8++0x03 line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1" bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1" newline bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1" bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 12. group.long 0x00++0x03 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..." rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline " " if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000) rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported" hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address" else rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif tree "CoreSight Identification Registers" width 12. rgroup.long 0xFCC++0x03 line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register" hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type" hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "FP_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "FP_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "FP_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "FP_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "FP_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "FP_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "FP_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 16. group.long 0x00++0x03 line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..." rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" textline " " rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000) group.long 0x04++0x03 line.long 0x00 "DWT_CYCCNT,Cycle Count register" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000) group.long 0x08++0x17 line.long 0x00 "DWT_CPICNT,CPI Count register" hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter" line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x10 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter" line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register" hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter" endif rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" endif group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" endif group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" endif group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" tree "CoreSight Identification Registers" width 13. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFCC++0x03 line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register" hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type" hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type" rgroup.long 0xFE0++0x0F line.long 0x00 "DWT_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DWT_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DWT_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DWT_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DWT_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DWT_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DWT_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end tree "ADC (Analog-to-Digital Converter)" base ad:0x48000C00 group.long 0x0++0x33 line.long 0x0 "ISR,ISR" rbitfld.long 0x0 31. "AWDHFG,awd high flag" "0,1" rbitfld.long 0x0 30. "AWDLFG,awd low flag" "0,1" bitfld.long 0x0 5. "AWD,Analog watchdog interrupt" "0,1" newline bitfld.long 0x0 4. "OVR,ADC overrun interrupt" "0,1" bitfld.long 0x0 3. "EOS,ADC end of sequence convert interrupt" "0,1" bitfld.long 0x0 2. "EOC,ADC end of channel convert interrupt" "0,1" newline bitfld.long 0x0 1. "EOSMP,ADC end of sample interrupt" "0,1" bitfld.long 0x0 0. "ADRDY,ADC ready interrupt" "0,1" line.long 0x4 "IER,IER" bitfld.long 0x4 5. "AWDIE,Analog watchdog interrupt enable write this bit when ad_start disable" "0: Disable,1: Enable" bitfld.long 0x4 4. "OVRIE,ADC overrun interrupt enable write this bit when ad_start disable" "0: Disable,1: Enable" bitfld.long 0x4 3. "EOSIE,ADC sequence convert done interrupt enable write this bit when ad_start disable" "0: Disable,1: Enable" newline bitfld.long 0x4 2. "EOCIE,ADC channel convert done interrupt enable write this bit when ad_start disable" "0: Disable,1: Enable" bitfld.long 0x4 1. "EOSMPIE,ADC end of sample interrupt enable write this bit when ad_start disable" "0: Disable,1: Enable" bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable write this bit when ad_start disable" "0: Disable,1: Enable" line.long 0x8 "CR,CR" bitfld.long 0x8 31. "OSADCALI,ADC offset calibration enable write this bit when ADC disable" "0: Disable,1: Enable" bitfld.long 0x8 30. "GAINADCALI,ADC gain calibration enable write this bit when ADC disable" "0: Disable,1: Enable" bitfld.long 0x8 29. "ADCALIDIF,ADC difference calibration enable write this bit when ADC disable and calibration disable" "0: Single,1: Difference" newline bitfld.long 0x8 8. "BOOSTEN,Boost enable" "0: Disable,1: Enable" bitfld.long 0x8 3. "ADSTOP,ADC stop control bit" "0,1" bitfld.long 0x8 2. "ADSTART,ADC start control bit it is a software trigger or hardware trigger enable" "0,1" newline bitfld.long 0x8 1. "ADDIS,ADC disable bit clear dac enable" "0,1" bitfld.long 0x8 0. "ADCEN,ADC enable" "0,1" line.long 0xC "CFGR,CFGR" bitfld.long 0xC 18.--20. "DISCNUM,n channel converted after once trigger in discontinuous mode write these bits when ad_start = 0" "0,1,2,3,4,5,6,7" bitfld.long 0xC 17. "DISCEN,Discontinuous mode enable cannot configure discontinuous mode and continuous mode at same time; write these bits when ad_start = 0" "0,1" bitfld.long 0xC 16. "ALIGN,Data align write these bits when ad_start = 0" "0: Right,1: Left" newline bitfld.long 0xC 15. "AUTOOFF,Auto off mode enable write these bits when ad_start = 0" "0,1" bitfld.long 0xC 14. "AUTODLY,Auto delay mode enable write these bits when ad_start = 0" "0,1" bitfld.long 0xC 13. "CONT,Continuous mode enable write these bits when ad_start = 0" "0,1" newline bitfld.long 0xC 12. "OVRMOD,Overrun over write enable write these bits when ad_start = 0" "0: disable write data when overrun,1: overwrite data when overrun" bitfld.long 0xC 10.--11. "EXTEN,Trigger polar select write these bits when ad_start = 0" "0: Software trigger,1: Hardware posedge trigger,2: Hardware negedge trigger,3: Hardware posedge trigger or negedge trigger" hexmask.long.byte 0xC 5.--9. 1. "EXTSEL,External trigger channel select write these bits when ad_start = 0" newline bitfld.long 0xC 3.--4. "RES,Resolution write these bits when ad_start =0" "0: 12bit,1: 10bit,2: 8bit,?" bitfld.long 0xC 0. "DMAEN,DMA enable write this bit when ad_start = 0" "0: Disable,1: Enable" line.long 0x10 "CFGR2,CFGR2" bitfld.long 0x10 18. "SMPPLUS,Sample time increase one cycle enable write this bit when ad_start = 0" "0,1" bitfld.long 0x10 9. "OVSMPTEN,Over sample trigger mode" "0,1" hexmask.long.byte 0x10 5.--8. 1. "OVSS,Over sample right shift bits write these bits when ad_start = 0" newline bitfld.long 0x10 1.--3. "OVSR,Over sample rate write these bits when ad_start = 0" "0: 2x,1: 4x,2: OVSR8,3: OVSR16,4: OVSR32,5: OVSR64,6: OVSR128,7: OVSR256" bitfld.long 0x10 0. "OVSMPEN,Over sample enable write this bit when ad_start = 0" "0,1" line.long 0x14 "SMPR1,SMPR1" bitfld.long 0x14 27.--29. "SMP9,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x14 24.--26. "SMP8,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x14 21.--23. "SMP7,Refer to SMP0 description" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 18.--20. "SMP6,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x14 15.--17. "SMP5,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x14 12.--14. "SMP4,Refer to SMP0 description" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 9.--11. "SMP3,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x14 6.--8. "SMP2,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x14 3.--5. "SMP1,Refer to SMP0 description" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 0.--2. "SMP0,Channel x Sample time control bits write these bits when ad_start = 0" "0: 3 cycle,1: 5 cycle,2: 11 cycle,3: 25 cycle,4: 45 cycle,5: 165 cycle,6: 345 cycle,7: 705 cycle" line.long 0x18 "SMPR2,SMPR2" bitfld.long 0x18 27.--29. "SMP19,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x18 24.--26. "SMP18,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x18 21.--23. "SMP17,Refer to SMP0 description" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 18.--20. "SMP16,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x18 15.--17. "SMP15,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x18 12.--14. "SMP14,Refer to SMP0 description" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 9.--11. "SMP13,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "SMP12,Refer to SMP0 description" "0,1,2,3,4,5,6,7" bitfld.long 0x18 3.--5. "SMP11,Refer to SMP0 description" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0.--2. "SMP10,Refer to SMP0 description" "0,1,2,3,4,5,6,7" line.long 0x1C "AWDCR,AWDCR" hexmask.long.tbyte 0x1C 0.--19. 1. "AWDCH,Analog watchdog channel enable write these bits when ad_start = 0" line.long 0x20 "AWDTR,AWDTR" bitfld.long 0x20 27. "AWDDMAEN,Analog watchdog support dma enable write this bit when ad_start = 0" "0,1" bitfld.long 0x20 24.--26. "AWDFILT,Analog watch filter number valid monitor single channel write these bits when ad_start = 0" "0: 1,1: 2,2: FILT3,3: FILT4,4: FILT5,5: FILT6,6: FILT7,7: FILT8" hexmask.long.word 0x20 12.--23. 1. "HTH,Analog watchdog high threshold write these bits when ad_start = 0" newline hexmask.long.word 0x20 0.--11. 1. "LTH,Analog watchdog low threshold write these bits when ad_start = 0" line.long 0x24 "SQR1,SQR1" hexmask.long.byte 0x24 24.--28. 1. "SQ3,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x24 18.--22. 1. "SQ2,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x24 12.--16. 1. "SQ1,ADC channel index write these bits when ad_start = 0" newline hexmask.long.byte 0x24 6.--10. 1. "SQ0,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x24 0.--3. 1. "CHLENGTH,ADC channel length write these bits when ad_start = 0" line.long 0x28 "SQR2,SQR2" hexmask.long.byte 0x28 24.--28. 1. "SQ8,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x28 18.--22. 1. "SQ7,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x28 12.--16. 1. "SQ6,ADC channel index write these bits when ad_start = 0" newline hexmask.long.byte 0x28 6.--10. 1. "SQ5,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x28 0.--4. 1. "SQ4,ADC channel index write these bits when ad_start = 0" line.long 0x2C "SQR3,SQR3" hexmask.long.byte 0x2C 24.--28. 1. "SQ13,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x2C 18.--22. 1. "SQ12,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x2C 12.--16. 1. "SQ11,ADC channel index write these bits when ad_start = 0" newline hexmask.long.byte 0x2C 6.--10. 1. "SQ10,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x2C 0.--4. 1. "SQ9,ADC channel index write these bits when ad_start = 0" line.long 0x30 "SQR4,SQR4" hexmask.long.byte 0x30 6.--10. 1. "SQ15,ADC channel index write these bits when ad_start = 0" hexmask.long.byte 0x30 0.--4. 1. "SQ14,ADC channel index write these bits when ad_start = 0" rgroup.long 0x34++0x53 line.long 0x0 "DR,DR" hexmask.long.word 0x0 0.--15. 1. "CONVDATA,ADC convert result" line.long 0x4 "DR0,DR0" hexmask.long.word 0x4 0.--15. 1. "CONVDATA0,ADC channel 0 convert result" line.long 0x8 "DR1,DR1" hexmask.long.word 0x8 0.--15. 1. "CONVDATA1,ADC channel 1 convert result" line.long 0xC "DR2,DR2" hexmask.long.word 0xC 0.--15. 1. "CONVDATA2,ADC channel 2 convert result" line.long 0x10 "DR3,DR3" hexmask.long.word 0x10 0.--15. 1. "CONVDATA3,ADC channel 3 convert result" line.long 0x14 "DR4,DR4" hexmask.long.word 0x14 0.--15. 1. "CONVDATA4,ADC channel 4 convert result" line.long 0x18 "DR5,DR5" hexmask.long.word 0x18 0.--15. 1. "CONVDATA5,ADC channel 5 convert result" line.long 0x1C "DR6,DR6" hexmask.long.word 0x1C 0.--15. 1. "CONVDATA6,ADC channel 6 convert result" line.long 0x20 "DR7,DR7" hexmask.long.word 0x20 0.--15. 1. "CONVDATA7,ADC channel 7 convert result" line.long 0x24 "DR8,DR8" hexmask.long.word 0x24 0.--15. 1. "CONVDATA8,ADC channel 8 convert result" line.long 0x28 "DR9,DR9" hexmask.long.word 0x28 0.--15. 1. "CONVDATA9,ADC channel 9 convert result" line.long 0x2C "DR10,DR10" hexmask.long.word 0x2C 0.--15. 1. "CONVDATA10,ADC channel 10 convert result" line.long 0x30 "DR11,DR11" hexmask.long.word 0x30 0.--15. 1. "CONVDATA11,ADC channel 11 convert result" line.long 0x34 "DR12,DR12" hexmask.long.word 0x34 0.--15. 1. "CONVDATA12,ADC channel 12 convert result" line.long 0x38 "DR13,DR13" hexmask.long.word 0x38 0.--15. 1. "CONVDATA13,ADC channel 13 convert result" line.long 0x3C "DR14,DR14" hexmask.long.word 0x3C 0.--15. 1. "CONVDATA14,ADC channel 14 convert result" line.long 0x40 "DR15,DR15" hexmask.long.word 0x40 0.--15. 1. "CONVDATA15,ADC channel 15 convert result" line.long 0x44 "DR16,DR16" hexmask.long.word 0x44 0.--15. 1. "CONVDATA16,ADC channel 16 convert result" line.long 0x48 "DR17,DR17" hexmask.long.word 0x48 0.--15. 1. "CONVDATA17,ADC channel 17 convert result" line.long 0x4C "DR18,DR18" hexmask.long.word 0x4C 0.--15. 1. "CONVDATA18,ADC channel 18 convert result" line.long 0x50 "DR19,DR19" hexmask.long.word 0x50 0.--15. 1. "CONVDATA19,ADC channel 19 convert result" group.long 0x88++0x1F line.long 0x0 "OFR1,OFR1" bitfld.long 0x0 31. "OFFSET1EN,Offset calculate enable write this bit when ad_start = 0" "0,1" hexmask.long.byte 0x0 26.--30. 1. "OFFSET1CH,Offset channel index write these bits when ad_start = 0" bitfld.long 0x0 25. "SATEN,Data saturation enable write this bit when ad_start = 0" "0,1" newline bitfld.long 0x0 24. "OFFSETPOS,Offset positive enable write this bit when ad_start = 0" "0: negative,1: positive" hexmask.long.word 0x0 0.--11. 1. "OFFSET1,Offset value write these bits when ad_start = 0" line.long 0x4 "OFR2,OFR2" bitfld.long 0x4 31. "OFFSET2EN,Offset calculate enable write this bit when ad_start = 0" "0,1" hexmask.long.byte 0x4 26.--30. 1. "OFFSET2CH,Offset channel index write these bits when ad_start = 0" hexmask.long.word 0x4 0.--11. 1. "OFFSET2,Offset value write these bits when ad_start = 0" line.long 0x8 "OFR3,OFR3" bitfld.long 0x8 31. "OFFSET3EN,Offset calculate enable write this bit when ad_start = 0" "0,1" hexmask.long.byte 0x8 26.--30. 1. "OFFSET3CH,Offset channel index write these bits when ad_start = 0" hexmask.long.word 0x8 0.--11. 1. "OFFSET3,Offset value write these bits when ad_start = 0" line.long 0xC "OFR4,OFR4" bitfld.long 0xC 31. "OFFSET4EN,Offset calculate enable write this bit when ad_start = 0" "0,1" hexmask.long.byte 0xC 26.--30. 1. "OFFSET4CH,Offset channel index write these bits when ad_start = 0" hexmask.long.word 0xC 0.--11. 1. "OFFSET4,Offset value write these bits when ad_start = 0" line.long 0x10 "DIFSEL,DIFSEL" hexmask.long.tbyte 0x10 0.--19. 1. "DIFSEL,Difference channel enable write these bits when ADC disable" line.long 0x14 "CALFACT,CALFACT" hexmask.long.byte 0x14 21.--25. 1. "GAINTRIMS,Single channel gain calibration value write these bits when ad_start = 0" hexmask.long.byte 0x14 16.--20. 1. "GAINTRIMD,Difference channel gain calibration value write these bits when ad_start = 0" hexmask.long.byte 0x14 5.--9. 1. "OSTRIMS,Single channel offset calibration value write these bits when ad_start = 0" newline hexmask.long.byte 0x14 0.--4. 1. "OSTRIMD,Difference channel offset calibration value write these bits when ad_start = 0" line.long 0x18 "GCOMP,GCOMP" bitfld.long 0x18 16. "GAINEN,Convert result gain compensation enable write these bits when ad_start = 0" "0,1" hexmask.long.word 0x18 0.--13. 1. "GAINCOEF,Gain compensation value write these bits when ad_start = 0" line.long 0x1C "CCR,CCR" bitfld.long 0x1C 11. "HSMODE,ADC high speed mode enable configure this bit when fclk > 24M; write this bit when ADC disable" "0,1" bitfld.long 0x1C 10. "VREFSEL,Reference voltage select write this bit when ADC disable" "0: Vref+/Vref-,1: VDD/VSS" bitfld.long 0x1C 9. "HALFVDDEN,Half vdd channel enable wirte this bit when ADC disable" "0,1" newline bitfld.long 0x1C 8. "VSENSEEN,Temparature enable write this bit when ADC disable" "0,1" bitfld.long 0x1C 7. "VBATEN,VBAT/2 channel enable write this bit when ADC disable" "0,1" hexmask.long.byte 0x1C 2.--5. 1. "PRESC,adc_pclk divider coefficient write this bit when adc disable" newline bitfld.long 0x1C 0.--1. "CKMODE,clk select write this bit when adc disable" "0: adc_pclk,1: adc_hclk/1,2: adc_hclk/2,3: adc_hclk/4" rgroup.long 0xA8++0x3 line.long 0x0 "TSR,TSR" hexmask.long.word 0x0 16.--27. 1. "TS125C,Temperature sensor calibration value in 125" hexmask.long.word 0x0 0.--11. 1. "TS25C,Temperature sensor calibration value in 25" tree.end tree "ADVTMR (Advanced-Control Timer)" base ad:0x0 tree "ADVTMR0" base ad:0x40013400 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" newline bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" newline bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" newline bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." newline bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRL1BIT3,The bit 3 of mst_mode_ctrl1" "0,1" newline hexmask.long.byte 0x4 20.--23. 1. "MSTMODECTRL2,Master mode selection 2" newline bitfld.long 0x4 18. "CH5OIS,ch5 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 16. "CH4OIS,ch4 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" newline bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL1,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" newline bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" newline bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" newline bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" newline bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" newline bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" newline bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" newline hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" newline bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" newline bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" newline bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" newline bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" newline bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" newline bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" newline bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" newline bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" newline bitfld.long 0x10 17. "CH5IF,Compare 5 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 16. "CH4IF,Compare 4 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 8. "BRK2IF,Break 2 interrupt flag" "0: No break event occurred,1: An active level has been detected on the break 2.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." newline bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" newline bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred" newline bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 8. "SWBRK2GEN,Break 2 generation" "0: No action,1: A break 2 event is generated" newline bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" newline bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set in INT_STS register" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When 'cc_shwd_en' bit is set" newline bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" newline bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: If channel CC1 is configured as output: the.." newline bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x4F line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 21. "CH5P,CH5 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 20. "CH5EN,CH5 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 17. "CH4P,CH4 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 16. "CH4EN,CH4 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" newline bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." newline bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" rbitfld.long 0xC 31. "UPDIFCPY,UPD_IF copy" "0,1" newline hexmask.long.word 0xC 0.--15. 1. "TCNT,Counter valueThe register holds the counter value." line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 0.--15. 1. "ARR,Auto-reload value" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" newline hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVAL,CH 0 Capture/Compare valueIf channel CH0 is configured as output:CCR0 is the value to be loaded in the actual capture/compare 0 register (preload value)." line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVAL,CH 1 Capture/Compare value. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVAL,CH 2 Capture/Compare value. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVAL,CH 3 Capture/Compare value. Refer to CCR0" line.long 0x2C "BDTR,BDTR" bitfld.long 0x2C 25. "BRK2P,Break 2 polarity" "0: Break input tmr_brk2 is active low,1: Break input tmr_brk2 is active highNote: This.." newline bitfld.long 0x2C 24. "BRK2EN,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabledNote: The BRKIN2 must.." newline hexmask.long.byte 0x2C 20.--23. 1. "BRK2FILTCFG,Break 2 filter" newline hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" newline bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." newline bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active highNote: This bit.." newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabledNote: This bit cannot be.." newline bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits inBDTRregister,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CCR4,CCR4" bitfld.long 0x30 31. "GC4C2,Group Channel 4 and Channel 2Distortion on channel 2 output:" "0: No effect of tmr_oc4ref on tmr_oc2refc,1: tmr_oc2refc is the logical AND of tmr_oc2ref and.." newline bitfld.long 0x30 30. "GC4C1,Group Channel 4 and Channel 1Distortion on channel 1 output:" "0: No effect of oc4ref on oc1refc,1: oc1refc is the logical AND of oc1ref and oc4ref" newline bitfld.long 0x30 29. "GC4C0,Group Channel 4 and Channel 0Distortion on channel 0 output:" "0: No effect of tmr_oc4ref on tmr_oc0refc,1: tmr_oc0refc is the logical AND of tmr_oc0ref and.." newline hexmask.long.word 0x30 0.--15. 1. "CH4CCRVAL,CH 4 Capture/Compare value. Refer to CCR0" line.long 0x34 "CCR5,CCR5" hexmask.long.word 0x34 0.--15. 1. "CH5CCRVAL,CH 5 Capture/Compare value. Refer to CCR0" line.long 0x38 "CHXMODECTRL3,CHXMODECTRL3" bitfld.long 0x38 24. "CH5OCMODEBIT3,The bit3 of ch5_oc_mode" "0,1" newline bitfld.long 0x38 16. "CH4OCMODEBIT3,The bit3 of ch4_oc_mode" "0,1" newline bitfld.long 0x38 15. "CH5OCREFCLREN,CH5 Output Compare OCxREF clear enable. Refer to CH0OCREFCLREN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 12.--14. "CH5OCMODE,CH5 Output Compare mode selection. Refer to CH0OCMODE" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 11. "CH5CCRSHDWEN,CH5 Output Compare shadow enable. Refer to CH0CCRSHDWEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 10. "CH5OCFASTEN,CH5 Output Compare fast enable. Refer to CH0OCFASTEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 7. "CH4OCREFCLREN,CH4 Output Compare OCxREF clear enable. Refer to CH0OCREFCLREN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 4.--6. "CH4OCMODE,CH4 Output Compare mode selection. Refer to CH0OCMODE" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3. "CH4CCRSHDWEN,CH4 Output Compare shadow enable. Refer to CH0CCRSHDWEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 2. "CH4OCFASTEN,CH4 Output Compare fast enable. Refer to CH0OCFASTEN" "0: DISABLE,1: ENABLE" line.long 0x3C "CHXSEL,CHXSEL" bitfld.long 0x3C 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x40 "AF1,AF1" hexmask.long.byte 0x40 20.--23. 1. "SYSBRKEN,System Break enable" newline bitfld.long 0x40 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x40 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" newline bitfld.long 0x40 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x40 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" newline bitfld.long 0x40 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x40 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" newline bitfld.long 0x40 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x40 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" newline bitfld.long 0x40 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x44 "AF2,AF2" bitfld.long 0x44 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" newline bitfld.long 0x44 11. "BRK2COMP3P,tmr_brk2_cmp3 input polarity" "0: tmr_brk2_cmp3 input polarity is not inverted,1: tmr_brk2_cmp3 input polarity is inverted" newline bitfld.long 0x44 10. "BRK2COMP2P,tmr_brk2_cmp2 input polarity" "0: tmr_brk2_cmp2 input polarity is not inverted,1: tmr_brk2_cmp2 input polarity is inverted" newline bitfld.long 0x44 9. "BRK2COMP1P,tmr_brk2_cmp1 input polarity" "0: tmr_brk2_cmp1 input polarity is not inverted,1: tmr_brk2_cmp1 input polarity is inverted" newline bitfld.long 0x44 8. "BRK2INP,TIMx_BKIN2 input polarity" "0: TIMx_BKIN2 input polarity is not inverted,1: TIMx_BKIN2 input polarity is inverted" newline bitfld.long 0x44 3. "BRK2COMP3EN,tmr_brk2_cmp3 enable" "0: tmr_brk2_cmp3 input disabled,1: tmr_brk2_cmp3 input enabled" newline bitfld.long 0x44 2. "BRK2COMP2EN,tmr_brk2_cmp2 enable" "0: tmr_brk2_cmp2 input disabled,1: tmr_brk2_cmp2 input enabled" newline bitfld.long 0x44 1. "BRK2COMP1EN,tmr_brk2_cmp1 enable" "0: tmr_brk2_cmp1 input disabled,1: tmr_brk2_cmp1 input enabled" newline bitfld.long 0x44 0. "BRK2INEN,TIMx_BKIN2 input enable" "0: TIMx_BKIN2 input disabled,1: TIMx_BKIN2 input enabled" line.long 0x48 "DMACFG,DMACFG" hexmask.long.byte 0x48 8.--13. 1. "DBL,DMA burst length" newline hexmask.long.byte 0x48 0.--5. 1. "DBA,DMA base address" line.long 0x4C "DMAR,DMAR" hexmask.long 0x4C 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree "ADVTMR1" base ad:0x40013800 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" newline bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" newline bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" newline bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." newline bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRL1BIT3,The bit 3 of mst_mode_ctrl1" "0,1" newline hexmask.long.byte 0x4 20.--23. 1. "MSTMODECTRL2,Master mode selection 2" newline bitfld.long 0x4 18. "CH5OIS,ch5 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 16. "CH4OIS,ch4 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" newline bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL1,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" newline bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" newline bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" newline bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" newline bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" newline bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" newline bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" newline hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" newline bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" newline bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" newline bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" newline bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" newline bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" newline bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" newline bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" newline bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" newline bitfld.long 0x10 17. "CH5IF,Compare 5 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 16. "CH4IF,Compare 4 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 8. "BRK2IF,Break 2 interrupt flag" "0: No break event occurred,1: An active level has been detected on the break 2.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." newline bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" newline bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred" newline bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 8. "SWBRK2GEN,Break 2 generation" "0: No action,1: A break 2 event is generated" newline bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" newline bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set in INT_STS register" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When 'cc_shwd_en' bit is set" newline bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" newline bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: If channel CC1 is configured as output: the.." newline bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x4F line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 21. "CH5P,CH5 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 20. "CH5EN,CH5 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 17. "CH4P,CH4 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 16. "CH4EN,CH4 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" newline bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." newline bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" rbitfld.long 0xC 31. "UPDIFCPY,UPD_IF copy" "0,1" newline hexmask.long.word 0xC 0.--15. 1. "TCNT,Counter valueThe register holds the counter value." line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 0.--15. 1. "ARR,Auto-reload value" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" newline hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVAL,CH 0 Capture/Compare valueIf channel CH0 is configured as output:CCR0 is the value to be loaded in the actual capture/compare 0 register (preload value)." line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVAL,CH 1 Capture/Compare value. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVAL,CH 2 Capture/Compare value. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVAL,CH 3 Capture/Compare value. Refer to CCR0" line.long 0x2C "BDTR,BDTR" bitfld.long 0x2C 25. "BRK2P,Break 2 polarity" "0: Break input tmr_brk2 is active low,1: Break input tmr_brk2 is active highNote: This.." newline bitfld.long 0x2C 24. "BRK2EN,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabledNote: The BRKIN2 must.." newline hexmask.long.byte 0x2C 20.--23. 1. "BRK2FILTCFG,Break 2 filter" newline hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" newline bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." newline bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active highNote: This bit.." newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabledNote: This bit cannot be.." newline bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits inBDTRregister,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CCR4,CCR4" bitfld.long 0x30 31. "GC4C2,Group Channel 4 and Channel 2Distortion on channel 2 output:" "0: No effect of tmr_oc4ref on tmr_oc2refc,1: tmr_oc2refc is the logical AND of tmr_oc2ref and.." newline bitfld.long 0x30 30. "GC4C1,Group Channel 4 and Channel 1Distortion on channel 1 output:" "0: No effect of oc4ref on oc1refc,1: oc1refc is the logical AND of oc1ref and oc4ref" newline bitfld.long 0x30 29. "GC4C0,Group Channel 4 and Channel 0Distortion on channel 0 output:" "0: No effect of tmr_oc4ref on tmr_oc0refc,1: tmr_oc0refc is the logical AND of tmr_oc0ref and.." newline hexmask.long.word 0x30 0.--15. 1. "CH4CCRVAL,CH 4 Capture/Compare value. Refer to CCR0" line.long 0x34 "CCR5,CCR5" hexmask.long.word 0x34 0.--15. 1. "CH5CCRVAL,CH 5 Capture/Compare value. Refer to CCR0" line.long 0x38 "CHXMODECTRL3,CHXMODECTRL3" bitfld.long 0x38 24. "CH5OCMODEBIT3,The bit3 of ch5_oc_mode" "0,1" newline bitfld.long 0x38 16. "CH4OCMODEBIT3,The bit3 of ch4_oc_mode" "0,1" newline bitfld.long 0x38 15. "CH5OCREFCLREN,CH5 Output Compare OCxREF clear enable. Refer to CH0OCREFCLREN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 12.--14. "CH5OCMODE,CH5 Output Compare mode selection. Refer to CH0OCMODE" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 11. "CH5CCRSHDWEN,CH5 Output Compare shadow enable. Refer to CH0CCRSHDWEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 10. "CH5OCFASTEN,CH5 Output Compare fast enable. Refer to CH0OCFASTEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 7. "CH4OCREFCLREN,CH4 Output Compare OCxREF clear enable. Refer to CH0OCREFCLREN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 4.--6. "CH4OCMODE,CH4 Output Compare mode selection. Refer to CH0OCMODE" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3. "CH4CCRSHDWEN,CH4 Output Compare shadow enable. Refer to CH0CCRSHDWEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 2. "CH4OCFASTEN,CH4 Output Compare fast enable. Refer to CH0OCFASTEN" "0: DISABLE,1: ENABLE" line.long 0x3C "CHXSEL,CHXSEL" bitfld.long 0x3C 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x40 "AF1,AF1" hexmask.long.byte 0x40 20.--23. 1. "SYSBRKEN,System Break enable" newline bitfld.long 0x40 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x40 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" newline bitfld.long 0x40 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x40 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" newline bitfld.long 0x40 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x40 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" newline bitfld.long 0x40 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x40 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" newline bitfld.long 0x40 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x44 "AF2,AF2" bitfld.long 0x44 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" newline bitfld.long 0x44 11. "BRK2COMP3P,tmr_brk2_cmp3 input polarity" "0: tmr_brk2_cmp3 input polarity is not inverted,1: tmr_brk2_cmp3 input polarity is inverted" newline bitfld.long 0x44 10. "BRK2COMP2P,tmr_brk2_cmp2 input polarity" "0: tmr_brk2_cmp2 input polarity is not inverted,1: tmr_brk2_cmp2 input polarity is inverted" newline bitfld.long 0x44 9. "BRK2COMP1P,tmr_brk2_cmp1 input polarity" "0: tmr_brk2_cmp1 input polarity is not inverted,1: tmr_brk2_cmp1 input polarity is inverted" newline bitfld.long 0x44 8. "BRK2INP,TIMx_BKIN2 input polarity" "0: TIMx_BKIN2 input polarity is not inverted,1: TIMx_BKIN2 input polarity is inverted" newline bitfld.long 0x44 3. "BRK2COMP3EN,tmr_brk2_cmp3 enable" "0: tmr_brk2_cmp3 input disabled,1: tmr_brk2_cmp3 input enabled" newline bitfld.long 0x44 2. "BRK2COMP2EN,tmr_brk2_cmp2 enable" "0: tmr_brk2_cmp2 input disabled,1: tmr_brk2_cmp2 input enabled" newline bitfld.long 0x44 1. "BRK2COMP1EN,tmr_brk2_cmp1 enable" "0: tmr_brk2_cmp1 input disabled,1: tmr_brk2_cmp1 input enabled" newline bitfld.long 0x44 0. "BRK2INEN,TIMx_BKIN2 input enable" "0: TIMx_BKIN2 input disabled,1: TIMx_BKIN2 input enabled" line.long 0x48 "DMACFG,DMACFG" hexmask.long.byte 0x48 8.--13. 1. "DBL,DMA burst length" newline hexmask.long.byte 0x48 0.--5. 1. "DBA,DMA base address" line.long 0x4C "DMAR,DMAR" hexmask.long 0x4C 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree "ADVTMR2" base ad:0x40013C00 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" newline bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" newline bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" newline bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." newline bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRL1BIT3,The bit 3 of mst_mode_ctrl1" "0,1" newline hexmask.long.byte 0x4 20.--23. 1. "MSTMODECTRL2,Master mode selection 2" newline bitfld.long 0x4 18. "CH5OIS,ch5 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 16. "CH4OIS,ch4 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" newline bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL1,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" newline bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" newline bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" newline bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" newline bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" newline bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" newline bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" newline hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" newline bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" newline bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" newline bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" newline bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" newline bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" newline bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" newline bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" newline bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" newline bitfld.long 0x10 17. "CH5IF,Compare 5 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 16. "CH4IF,Compare 4 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 8. "BRK2IF,Break 2 interrupt flag" "0: No break event occurred,1: An active level has been detected on the break 2.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." newline bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" newline bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred" newline bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 8. "SWBRK2GEN,Break 2 generation" "0: No action,1: A break 2 event is generated" newline bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" newline bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set in INT_STS register" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When 'cc_shwd_en' bit is set" newline bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" newline bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: If channel CC1 is configured as output: the.." newline bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x4F line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 21. "CH5P,CH5 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 20. "CH5EN,CH5 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 17. "CH4P,CH4 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 16. "CH4EN,CH4 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" newline bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" newline bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." newline bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" rbitfld.long 0xC 31. "UPDIFCPY,UPD_IF copy" "0,1" newline hexmask.long.word 0xC 0.--15. 1. "TCNT,Counter valueThe register holds the counter value." line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 0.--15. 1. "ARR,Auto-reload value" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" newline hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVAL,CH 0 Capture/Compare valueIf channel CH0 is configured as output:CCR0 is the value to be loaded in the actual capture/compare 0 register (preload value)." line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVAL,CH 1 Capture/Compare value. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVAL,CH 2 Capture/Compare value. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVAL,CH 3 Capture/Compare value. Refer to CCR0" line.long 0x2C "BDTR,BDTR" bitfld.long 0x2C 25. "BRK2P,Break 2 polarity" "0: Break input tmr_brk2 is active low,1: Break input tmr_brk2 is active highNote: This.." newline bitfld.long 0x2C 24. "BRK2EN,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabledNote: The BRKIN2 must.." newline hexmask.long.byte 0x2C 20.--23. 1. "BRK2FILTCFG,Break 2 filter" newline hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" newline bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." newline bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active highNote: This bit.." newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabledNote: This bit cannot be.." newline bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits inBDTRregister,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CCR4,CCR4" bitfld.long 0x30 31. "GC4C2,Group Channel 4 and Channel 2Distortion on channel 2 output:" "0: No effect of tmr_oc4ref on tmr_oc2refc,1: tmr_oc2refc is the logical AND of tmr_oc2ref and.." newline bitfld.long 0x30 30. "GC4C1,Group Channel 4 and Channel 1Distortion on channel 1 output:" "0: No effect of oc4ref on oc1refc,1: oc1refc is the logical AND of oc1ref and oc4ref" newline bitfld.long 0x30 29. "GC4C0,Group Channel 4 and Channel 0Distortion on channel 0 output:" "0: No effect of tmr_oc4ref on tmr_oc0refc,1: tmr_oc0refc is the logical AND of tmr_oc0ref and.." newline hexmask.long.word 0x30 0.--15. 1. "CH4CCRVAL,CH 4 Capture/Compare value. Refer to CCR0" line.long 0x34 "CCR5,CCR5" hexmask.long.word 0x34 0.--15. 1. "CH5CCRVAL,CH 5 Capture/Compare value. Refer to CCR0" line.long 0x38 "CHXMODECTRL3,CHXMODECTRL3" bitfld.long 0x38 24. "CH5OCMODEBIT3,The bit3 of ch5_oc_mode" "0,1" newline bitfld.long 0x38 16. "CH4OCMODEBIT3,The bit3 of ch4_oc_mode" "0,1" newline bitfld.long 0x38 15. "CH5OCREFCLREN,CH5 Output Compare OCxREF clear enable. Refer to CH0OCREFCLREN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 12.--14. "CH5OCMODE,CH5 Output Compare mode selection. Refer to CH0OCMODE" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 11. "CH5CCRSHDWEN,CH5 Output Compare shadow enable. Refer to CH0CCRSHDWEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 10. "CH5OCFASTEN,CH5 Output Compare fast enable. Refer to CH0OCFASTEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 7. "CH4OCREFCLREN,CH4 Output Compare OCxREF clear enable. Refer to CH0OCREFCLREN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 4.--6. "CH4OCMODE,CH4 Output Compare mode selection. Refer to CH0OCMODE" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3. "CH4CCRSHDWEN,CH4 Output Compare shadow enable. Refer to CH0CCRSHDWEN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 2. "CH4OCFASTEN,CH4 Output Compare fast enable. Refer to CH0OCFASTEN" "0: DISABLE,1: ENABLE" line.long 0x3C "CHXSEL,CHXSEL" bitfld.long 0x3C 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x3C 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x40 "AF1,AF1" hexmask.long.byte 0x40 20.--23. 1. "SYSBRKEN,System Break enable" newline bitfld.long 0x40 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x40 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" newline bitfld.long 0x40 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x40 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" newline bitfld.long 0x40 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x40 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" newline bitfld.long 0x40 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x40 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" newline bitfld.long 0x40 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x44 "AF2,AF2" bitfld.long 0x44 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" newline bitfld.long 0x44 11. "BRK2COMP3P,tmr_brk2_cmp3 input polarity" "0: tmr_brk2_cmp3 input polarity is not inverted,1: tmr_brk2_cmp3 input polarity is inverted" newline bitfld.long 0x44 10. "BRK2COMP2P,tmr_brk2_cmp2 input polarity" "0: tmr_brk2_cmp2 input polarity is not inverted,1: tmr_brk2_cmp2 input polarity is inverted" newline bitfld.long 0x44 9. "BRK2COMP1P,tmr_brk2_cmp1 input polarity" "0: tmr_brk2_cmp1 input polarity is not inverted,1: tmr_brk2_cmp1 input polarity is inverted" newline bitfld.long 0x44 8. "BRK2INP,TIMx_BKIN2 input polarity" "0: TIMx_BKIN2 input polarity is not inverted,1: TIMx_BKIN2 input polarity is inverted" newline bitfld.long 0x44 3. "BRK2COMP3EN,tmr_brk2_cmp3 enable" "0: tmr_brk2_cmp3 input disabled,1: tmr_brk2_cmp3 input enabled" newline bitfld.long 0x44 2. "BRK2COMP2EN,tmr_brk2_cmp2 enable" "0: tmr_brk2_cmp2 input disabled,1: tmr_brk2_cmp2 input enabled" newline bitfld.long 0x44 1. "BRK2COMP1EN,tmr_brk2_cmp1 enable" "0: tmr_brk2_cmp1 input disabled,1: tmr_brk2_cmp1 input enabled" newline bitfld.long 0x44 0. "BRK2INEN,TIMx_BKIN2 input enable" "0: TIMx_BKIN2 input disabled,1: TIMx_BKIN2 input enabled" line.long 0x48 "DMACFG,DMACFG" hexmask.long.byte 0x48 8.--13. 1. "DBL,DMA burst length" newline hexmask.long.byte 0x48 0.--5. 1. "DBA,DMA base address" line.long 0x4C "DMAR,DMAR" hexmask.long 0x4C 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree.end tree "AES (AES Encrypt Module)" base ad:0x48000400 group.long 0x0++0x3 line.long 0x0 "CR,CR" bitfld.long 0x0 24. "ENMASK,AES enable mask" "0: the key will be discard when the EN bit of the..,1: the key will be kept when the EN bit of the.." hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block" newline bitfld.long 0x0 18.--19. "KEYSIZE,Key size selection" "0: 128,1: 192,2: 256,?" bitfld.long 0x0 15. "CCFC,Computation complete flag clear" "0: No effect,1: Clear CCF" newline bitfld.long 0x0 14. "ODATSWAP,Output data swap" "0: Output data no change,1: Output data swap by DATATYPE configuration" bitfld.long 0x0 13. "IDATSWAP,Input data swap" "0: Input data no change,1: Input data swap by DATATYPE configuration" newline bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: Disable,1: Enable" bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "ERRIE,Error interrupt enable" "0: Disable,1: Enable" bitfld.long 0x0 9. "CCFIE,CCF interrupt enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "ERRC,Error flag clear" "0: No effect,1: Clear RDERR and WRERR flags" bitfld.long 0x0 5.--7. "CHMOD,Chaining mode selection" "0: Electronic codebook,1: Cipher-block chaining,2: CTR,3: CFB,4: OFB,?,?,?" newline bitfld.long 0x0 3. "MODE,AES operating mode" "0: encryption,1: decryption" bitfld.long 0x0 1.--2. "DATATYPE,Data type selection" "0: None,1: Half-word,2: BYTE,3: BIT" newline bitfld.long 0x0 0. "EN,AES enable" "0: Disable,1: Enable" rgroup.long 0x4++0x3 line.long 0x0 "SR,SR" bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy" bitfld.long 0x0 2. "WRERR,Write error" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "RDERR,Read error flag" "0: Not detected,1: Detected" bitfld.long 0x0 0. "CCF,Computation completed flag" "0: Not completed,1: Completed" group.long 0x8++0x3 line.long 0x0 "DINR,DINR" hexmask.long 0x0 0.--31. 1. "DIN,Input data word" rgroup.long 0xC++0x3 line.long 0x0 "DOUT,DOUT" hexmask.long 0x0 0.--31. 1. "DOUT,Output data word" group.long 0x10++0x2F line.long 0x0 "KEY0,KEY0" hexmask.long 0x0 0.--31. 1. "KEY0,KEY[31:0]: Cryptographic key bits [31:0]" line.long 0x4 "KEY1,KEY1" hexmask.long 0x4 0.--31. 1. "KEY1,KEY[63:32]: Cryptographic key bits [63:32]" line.long 0x8 "KEY2,KEY2" hexmask.long 0x8 0.--31. 1. "KEY2,KEY[95:64]: Cryptographic key bits [95:64]" line.long 0xC "KEY3,KEY3" hexmask.long 0xC 0.--31. 1. "KEY3,KEY[127:96]: Cryptographic key bits [127:96]" line.long 0x10 "IVR0,IVR0" hexmask.long 0x10 0.--31. 1. "IV0,IVI[31:0]: Initialization vector input bits [31:0]" line.long 0x14 "IVR1,IVR1" hexmask.long 0x14 0.--31. 1. "IV1,IVI[63:32]: Initialization vector input bits [63:32]" line.long 0x18 "IVR2,IVR2" hexmask.long 0x18 0.--31. 1. "IV2,IVI[95:64]: Initialization vector input bits [95:64]" line.long 0x1C "IVR3,IVR3" hexmask.long 0x1C 0.--31. 1. "IV3,IVI[127:96]: Initialization vector input bits [127:96]" line.long 0x20 "KEY4,KEY4" hexmask.long 0x20 0.--31. 1. "KEY4,KEY[31:0]: Cryptographic key bits [31:0]" line.long 0x24 "KEY5,KEY5" hexmask.long 0x24 0.--31. 1. "KEY5,KEY[63:32]: Cryptographic key bits [63:32]" line.long 0x28 "KEY6,KEY6" hexmask.long 0x28 0.--31. 1. "KEY6,KEY[95:64]: Cryptographic key bits [95:64]" line.long 0x2C "KEY7,KEY7" hexmask.long 0x2C 0.--31. 1. "KEY7,KEY[127:96]: Cryptographic key bits [127:96]" tree.end tree "CAN (Controller Area Network)" base ad:0x40014000 group.long 0x0++0x7 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25. "TSPOS,TIME-stamping POSition" "0: SOF,1: EOF" bitfld.long 0x0 24. "TSEN,TIME-stamping ENable" "0: disabled,1: enabled" newline bitfld.long 0x0 17. "ROP,Restricted Operation" "0: Restricted operation disabled,1: Restricted operation enabled" bitfld.long 0x0 16. "CES,CAN Error Signaling" "0: Error signaling disabled,1: Error signaling enabled" newline hexmask.long.byte 0x0 8.--15. 1. "VER1,Version of CAN-CTRL. VER_1 holds the major version and VER_0 the minor version" hexmask.long.byte 0x0 0.--7. 1. "VER0,Version of CAN-CTRL. VER_1 holds the major version and VER_0 the minor version" line.long 0x4 "BITTIME,BITTIME" hexmask.long.byte 0x4 24.--30. 1. "ACSJW,Synchronization Jump Width" hexmask.long.byte 0x4 16.--22. 1. "ACSEG2,Bit Timing Segment 2" newline hexmask.long.word 0x4 0.--8. 1. "ACSEG1,Bit Timing Segment 1" group.long 0x10++0xF line.long 0x0 "CLKCTRL,CLKCTRL" bitfld.long 0x0 28.--30. "RETLIM,Retransmission Limit" "0: 1 attempt,?,?,?,?,?,?,?" bitfld.long 0x0 24.--26. "REALIM,Re-arbitration Limit" "0: 1 attempt,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 0.--4. 1. "PRESC,Prescaler" line.long 0x4 "INTF,INTF" rbitfld.long 0x4 31. "EWARN,Error Warning limit reached" "0: The values in both counters are less than EWL,1: One of the error counters RECNT or TECNT is.." rbitfld.long 0x4 30. "EPASS,Error Passive status" "0: Node is error active,1: Node is error passive" newline bitfld.long 0x4 10. "EPIF,Error Passive Interrupt Flag. EPIF will be activated if EPASS changes and if EPIE=1." "0,1" bitfld.long 0x4 9. "ALIF,Arbitration Lost Interrupt Flag" "0,1" newline bitfld.long 0x4 8. "BEIF,Bus Error Interrupt Flag" "0,1" bitfld.long 0x4 7. "RIF,Receive Interrupt Flag" "0: No frame has been received,1: Data or a remote frame has been received and is.." newline bitfld.long 0x4 6. "ROIF,RB Overflow Interrupt Flag" "0: No RB overwritten,1: At least one received frame has been overwritten.." bitfld.long 0x4 5. "RFIF,RB Full Interrupt Flag" "0: The RB FIFO is not full,1: All RBs are full" newline bitfld.long 0x4 4. "RAFIF,RB Almost Full Interrupt Flag" "0: NUmber of filled RB slots is less than AFWL_i,1: Number of filled RB slots is greater than or.." bitfld.long 0x4 3. "TPIF,Transmission Primary Interrupt Flag" "0: No transmission of the PTB has been completed,1: The requested transmission of the PTB has been.." newline bitfld.long 0x4 2. "TSIF,Transmission Secondary Interrupt Flag" "0: No transmission of the STB has been completed..,1: The requested transmission of the STB has been.." bitfld.long 0x4 1. "EIF,Error Interrupt Flag" "0: There has been no change,1: The border of the error warning limit has been.." newline bitfld.long 0x4 0. "AIF,Abort Interrupt Flag" "0: No abort has been executed,1: After setting TPA or TSA the appropriated frames.." line.long 0x8 "INTE,INTE" bitfld.long 0x8 10. "EPIE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x8 9. "ALIE,Arbitration Lost Interrupt Enable" "0,1" newline bitfld.long 0x8 8. "BEIE,Bus Error Interrupt Enable" "0,1" bitfld.long 0x8 7. "RIE,Receive Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "ROIE,RB Overflow Interrupt Enable" "0: Disabled,1: Enabled" bitfld.long 0x8 5. "RFIE,RB Full Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 4. "RAFIE,RB Almost Full Interrupt Enable" "0: Disabled,1: Enabled" bitfld.long 0x8 3. "TPIE,Transmission Primary Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 2. "TSIE,Transmission Secondary Interrupt Enable" "0: Disabled,1: Enabled" bitfld.long 0x8 1. "EIE,Error Interrupt Enable" "0: Disabled,1: Enabled" line.long 0xC "TSTAT,TSTAT" bitfld.long 0xC 24.--26. "TSTAT2,Transmission Status Code:" "0: IDEL,1: ONGOING,?,?,?,?,?,?" hexmask.long.byte 0xC 16.--23. 1. "HANDLE2,Handle for frame identification" newline bitfld.long 0xC 8.--10. "TSTAT1,Transmission Status Code:" "0: IDEL,1: ONGOING,?,?,?,?,?,?" hexmask.long.byte 0xC 0.--7. 1. "HANDLE1,Handle for frame identification" rgroup.long 0x20++0x3 line.long 0x0 "TSCSR,TSCSR" hexmask.long.word 0x0 0.--15. 1. "TTS,Transmission Time Stamp TTS holds the time stamp of the last transmitted frame for CiA 603 time stamping. Every new" group.long 0x28++0x7 line.long 0x0 "CMD,CMD" bitfld.long 0x0 31. "SACK,Self-Acknowledge" "0: No self-ACK,1: Self-ACK when LBME=1" bitfld.long 0x0 30. "ROM,Receive Buffer Overflow Mode" "0: The oldest frame will be overwritten,1: The new frame will not be stored" newline rbitfld.long 0x0 29. "ROV,Receive Buffer Overflow" "0: No Overflow,1: Overflow" bitfld.long 0x0 28. "RREL,Receive Buffer Release" "0: No release,1: Release" newline bitfld.long 0x0 27. "RBALL,Receive Buffer stores ALL data frames" "0: Normal operation,1: RB stores correct data frames as well as data.." rbitfld.long 0x0 24.--25. "RSTAT,Receive Buffer level status" "0: Empty,1: higher than empty and lower than almost full level,?,?" newline bitfld.long 0x0 22. "TSNEXT,Transmit buffer Secondary NEXT" "0: no action,1: STB slot filled" bitfld.long 0x0 21. "TSMODE,Transmit buffer Secondary operation MODE" "0: FIFO mode,1: priority decision mode" newline bitfld.long 0x0 18. "TSFF,Transmit Secondary Buffer Full Flag" "0: The STB is not filled with the maximal number of..,1: The STB is filled with the maximal number of.." rbitfld.long 0x0 16.--17. "TSSTAT,Transmission Secondary Status bits" "0: STB is empty,1: STB is less than or equal to half full,?,?" newline bitfld.long 0x0 15. "TBSEL,Transmit Buffer Select" "0: PTB,1: STB" bitfld.long 0x0 14. "LOM,Listen Only Mode" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "STBY,Transceiver Standby Mode" "0: Disabled,1: Enabled" bitfld.long 0x0 12. "TPE,Transmit Primary Enable" "0: No transmission for the PTB,1: Transmission enable for the frame in the.." newline bitfld.long 0x0 11. "TPA,Transmit Primary Abort" "0: No abort,1: Aborts a transmission from PTB" bitfld.long 0x0 10. "TSONE,Transmit Secondary One Frame" "0: No transmission for the STB,1: Transmission enables one in the STB" newline bitfld.long 0x0 9. "TSALL,Transmit Secondary All Frames" "0: No transmission for the STB,1: Transmission enables all frames in the STB" bitfld.long 0x0 8. "TSA,Transmit Secondary Abort" "0: No abort,1: Aborts a transmission from STB" newline bitfld.long 0x0 7. "RESET,Reset Request Bit" "0: No local reset of CAN-CTRL,1: The host controller performs a local reset of.." bitfld.long 0x0 6. "LBME,Loop Back Mode External" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "LBMI,Loop Back Mode Internal" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "BUSOFF,Bus Off (Bus Status Bit)" "0: The controller status is 'bus on',1: The controller status is 'bus off'" line.long 0x4 "ERRSTATS,ERRSTATS" hexmask.long.byte 0x4 24.--31. 1. "TECNT,Transmit Error Count (Number of errors during transmission)" hexmask.long.byte 0x4 16.--23. 1. "RECNT,Receive Error Count (Number of errors during reception)" newline rbitfld.long 0x4 13.--15. "KOER,Kind of Error (Error code)" "0: NO ERROR,1: BIT ERROR,?,?,?,?,?,?" hexmask.long.byte 0x4 8.--12. 1. "ALC,Arbitration Lost Capture(bit position in the frame where the arbitration has been lost)" newline hexmask.long.byte 0x4 4.--7. 1. "AFWL,Receive buffer Almost Full Warning Limit" hexmask.long.byte 0x4 0.--3. 1. "EWL,Programmable Error Warning Limit" group.long 0x44++0xB line.long 0x0 "ACF,ACF" bitfld.long 0x0 19. "AE3,Acceptance filter3 enable" "0: DISABLE,1: Acceptance filter disabled" bitfld.long 0x0 18. "AE2,Acceptance filter2 enable" "0: Acceptance filter disabled,1: Acceptance filter enabled" newline bitfld.long 0x0 17. "AE1,Acceptance filter1 enable" "0: DISABLE,1: Acceptance filter disabled" bitfld.long 0x0 16. "AE0,Acceptance filter0 enable" "0: Acceptance filter disabled,1: Acceptance filter enabled" newline bitfld.long 0x0 0.--1. "ACFADR,Acceptance filter address" "0,1,2,3" line.long 0x4 "ACFIDENTREG,ACFIDENTREG" hexmask.long 0x4 0.--28. 1. "ACFID,Frame Identifier" line.long 0x8 "ACFFORMAT,ACFFORMAT" bitfld.long 0x8 28. "ACFLBF,Loop-Back Frame" "0,1" bitfld.long 0x8 27. "ACFESI,Error State Indicator" "0,1" newline bitfld.long 0x8 21. "ACFSEC,Simple or Extended Content" "0: Simple content,1: Extended content" bitfld.long 0x8 20. "ACFRMF,Remote Frame" "0: Data frame,1: Remote frame" newline bitfld.long 0x8 16. "ACFIDE,Identifier Extension" "0: Standard Format: ID,1: Extended Format: ID" hexmask.long.byte 0x8 0.--3. 1. "ACFDLC,Data Length Code" group.long 0x58++0x7 line.long 0x0 "ACMIDENTREG,ACMIDENTREG" hexmask.long 0x0 0.--28. 1. "ACMID,Frame Identifier" line.long 0x4 "ACMFORMAT,ACMFORMAT" bitfld.long 0x4 28. "ACMLBF,Loop-Back Frame" "0,1" bitfld.long 0x4 27. "ACMESI,Error State Indicator" "0,1" newline bitfld.long 0x4 21. "ACMSEC,Simple or Extended Content" "0: Simple content,1: Extended content" bitfld.long 0x4 20. "ACMRMF,Remote Frame" "0: Data frame,1: Remote frame" newline bitfld.long 0x4 16. "ACMIDE,Identifier Extension" "0: Standard Format: ID,1: Extended Format: ID" hexmask.long.byte 0x4 0.--3. 1. "ACMDLC,Data Length Code" group.long 0x70++0x7 line.long 0x0 "RBID,RBID" hexmask.long 0x0 0.--28. 1. "RBID,Frame Identifier" line.long 0x4 "RBFORMAT,RBFORMAT" bitfld.long 0x4 28. "RBLBF,Loop-Back Frame" "0,1" bitfld.long 0x4 27. "RBESI,Error State Indicator" "0,1" newline rbitfld.long 0x4 24.--26. "RKOER,Kind of Error" "0,1,2,3,4,5,6,7" bitfld.long 0x4 21. "RBSEC,Simple or Extended Content" "0: Simple content,1: Extended content" newline bitfld.long 0x4 20. "RMF,Remote Frame" "0: Data frame,1: Remote frame" bitfld.long 0x4 16. "RBIDE,Identifier Extension" "0: Standard Format: ID,1: Extended Format: ID" newline hexmask.long.byte 0x4 0.--3. 1. "DLC,Data Length Code" group.long 0x80++0x3 line.long 0x0 "RBTSREG,RBTSREG" hexmask.long.word 0x0 0.--15. 1. "RBRTS,Reception Time Stamp for CiA 603 time-stamping" group.long 0x8C++0x7 line.long 0x0 "RBDATAREG0,RBDATAREG0" hexmask.long 0x0 0.--31. 1. "RBPAYLOADDATA0,Payload data of the frame" line.long 0x4 "RBDATAREG1,RBDATAREG1" hexmask.long 0x4 0.--31. 1. "RBPAYLOADDATA1,Payload data of the frame" group.long 0x890++0x7 line.long 0x0 "TBID,TBID" bitfld.long 0x0 31. "TBTTSEN,Transmit Time-Stamp Enable" "0: No acquisition of a transmit time stamp for this..,1: TTS update enabled" hexmask.long 0x0 0.--28. 1. "TBID,Frame Identifier" line.long 0x4 "TBFORMAT,TBFORMAT" bitfld.long 0x4 21. "TBSEC,Simple or Extended Content" "0: Simple content,1: Extended content" bitfld.long 0x4 20. "TBRMF,Remote Frame" "0: Data frame,1: Remote frame" newline bitfld.long 0x4 16. "TBIDE,Identifier Extension" "0: Standard Format: ID,1: Extended Format: ID" hexmask.long.byte 0x4 0.--3. 1. "TBDLC,Data Length Code" group.long 0x8AC++0x7 line.long 0x0 "TBDATAREG0,TBDATAREG0" hexmask.long 0x0 0.--31. 1. "PAYLOAD0,Payload data of the frame" line.long 0x4 "TBDATAREG1,TBDATAREG1" hexmask.long 0x4 0.--31. 1. "PAYLOAD1,Payload data of the frame" tree.end tree "CMP (Comparator)" base ad:0x0 tree "CMP0" base ad:0x40018C00 group.long 0x0++0x3 line.long 0x0 "CSR,CSR" bitfld.long 0x0 31. "LOCK,Register lock" "0: unlock,1: lock" rbitfld.long 0x0 30. "VALUE,CMP output status" "0,1" hexmask.long.byte 0x0 21.--26. 1. "DAC6BDATAIN,DAC6B data input" bitfld.long 0x0 20. "DAC6BEN,DAC6B enable" "0: disable,1: enable" newline bitfld.long 0x0 17.--19. "BLANKSEL,CMP blanking signal select" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "BLANKINGEN,CMP blanking enable" "0: disable,1: enable" bitfld.long 0x0 13.--15. "HYST,CMP hysteresis" "0: No hysteresis voltage,1: 5mV,2: 10MV,3: 15MV,4: 20MV,5: 25MV,6: 30MV,?" bitfld.long 0x0 12. "POL,CMP polarity" "0: non-inverted,1: inverted" newline bitfld.long 0x0 8.--10. "INPSEL,000: CMP_INP=A2A_CMP_INP[0]" "0: CMP_INP=A2A_CMP_INP[0],1: CMP_INP=A2A_CMP_INP[1],2: CMP_INP2,3: CMP_INP3,4: CMP_INP4,5: CMP_INP5,6: CMP_INP6,7: CMP_INP7_DAC6B" bitfld.long 0x0 4.--6. "INNSEL,000: CMP_INN=A2A_CMP_INN[0]" "0: CMP_INN=A2A_CMP_INN[0],1: CMP_INN=A2A_CMP_INN[1],2: CMP_INN2,3: CMP_INN3,4: CMP_INN4,5: CMP_INN5,6: CMP_INN6,7: CMP_INN7_DAC6B" bitfld.long 0x0 0. "CMPEN,CMP enable/disable control" "0: CMP disable,1: CMP enable" tree.end tree "CMP1" base ad:0x40019000 group.long 0x0++0x3 line.long 0x0 "CSR,CSR" bitfld.long 0x0 31. "LOCK,Register lock" "0: unlock,1: lock" rbitfld.long 0x0 30. "VALUE,CMP output status" "0,1" hexmask.long.byte 0x0 21.--26. 1. "DAC6BDATAIN,DAC6B data input" bitfld.long 0x0 20. "DAC6BEN,DAC6B enable" "0: disable,1: enable" newline bitfld.long 0x0 17.--19. "BLANKSEL,CMP blanking signal select" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "BLANKINGEN,CMP blanking enable" "0: disable,1: enable" bitfld.long 0x0 13.--15. "HYST,CMP hysteresis" "0: No hysteresis voltage,1: 5mV,2: 10MV,3: 15MV,4: 20MV,5: 25MV,6: 30MV,?" bitfld.long 0x0 12. "POL,CMP polarity" "0: non-inverted,1: inverted" newline bitfld.long 0x0 8.--10. "INPSEL,000: CMP_INP=A2A_CMP_INP[0]" "0: CMP_INP=A2A_CMP_INP[0],1: CMP_INP=A2A_CMP_INP[1],2: CMP_INP2,3: CMP_INP3,4: CMP_INP4,5: CMP_INP5,6: CMP_INP6,7: CMP_INP7_DAC6B" bitfld.long 0x0 4.--6. "INNSEL,000: CMP_INN=A2A_CMP_INN[0]" "0: CMP_INN=A2A_CMP_INN[0],1: CMP_INN=A2A_CMP_INN[1],2: CMP_INN2,3: CMP_INN3,4: CMP_INN4,5: CMP_INN5,6: CMP_INN6,7: CMP_INN7_DAC6B" bitfld.long 0x0 0. "CMPEN,CMP enable/disable control" "0: CMP disable,1: CMP enable" tree.end tree.end tree "CRC (Cyclic Redundancy Check)" base ad:0x48001C00 group.long 0x0++0x13 line.long 0x0 "DR,DR" hexmask.long 0x0 0.--31. 1. "DR,CRC data register" line.long 0x4 "IDR,IDR" hexmask.long.byte 0x4 0.--7. 1. "IDR,These bits can be used as a temporary storage location for 1 bytes." line.long 0x8 "CR,CR" bitfld.long 0x8 18. "XOROUT,1: CRC result output with xor" "0: CRC result output without xor proc,1: CRC result output with xor" bitfld.long 0x8 14. "DATASIZEMODE,CRC data size mode" "0: defined by bits[13:12] CR-DATASIZE,1: ahb bus HSIZE" newline bitfld.long 0x8 12.--13. "DATASIZE,CRC data size mode" "0: WORD32,1: reserved_not_used,2: 16 bits,3: 8 bits" bitfld.long 0x8 7. "REVOUT,1:CRC result ouput with reversed out proc" "0: CRC result ouput without reversed out proc,1: CRC result ouput with reversed out proc" newline bitfld.long 0x8 5.--6. "REVIN,CRC data input with reversed in" "0: no swapped with input data,1: swapped the input data with byte,2: swapped the input data with half word,3: swapped the input data with word" bitfld.long 0x8 3.--4. "POLYSIZE,CRC polynomial size" "0: CRC-32,1: CRC-16,2: CRC-8,3: CRC-7" newline bitfld.long 0x8 0. "RST,Used to init the crc with POLYINIT regs by writing 1 to this bit and it will be auto-clear;" "0: DISABLE,1: ENABLE" line.long 0xC "INIT,INIT" hexmask.long 0xC 0.--31. 1. "POLYINIT,Programmable initial CRC value" line.long 0x10 "POLY,POLY" hexmask.long 0x10 0.--31. 1. "POLY,This register is used to write the coefficients of the polynomial to be used for CRC calculation." tree.end tree "DAC (Digital-to-Analog Converter)" base ad:0x40006400 group.long 0x0++0x13 line.long 0x0 "CR,CR" bitfld.long 0x0 14. "CEN,DAC calibration enable" "0: disable,1: enable" bitfld.long 0x0 13. "DMAUDRIE,DAC DMA underrun interrupt enable" "0: disable,1: enable" bitfld.long 0x0 12. "DMAEN,DAC DMA enable" "0: disable,1: enable" hexmask.long.byte 0x0 8.--11. 1. "MAMP,DAC LFSR mask / triangle amp; configure these bits before DAC enable" newline bitfld.long 0x0 6.--7. "WAVE,Noise waveform control bits" "0: DISABLE,1: LFSR,2: TRIANGLE,?" hexmask.long.byte 0x0 2.--5. 1. "TSEL,Trigger select bits configure these bits before DAC enable" bitfld.long 0x0 1. "TEN,DAC trigger enable; configure this bit after trigger select bits configured." "0: disable,1: enable" bitfld.long 0x0 0. "EN,DAC enable" "0,1" line.long 0x4 "SWTRGR,SWTRGR" bitfld.long 0x4 0. "SWTRIG,DAC software trigger cleared by hardware" "0,1" line.long 0x8 "DHR12R,DHR12R" hexmask.long.word 0x8 16.--27. 1. "DACDHRB,DAC double data mode 12bit right align register double mode valid" hexmask.long.word 0x8 0.--11. 1. "DACDHR,DAC double data mode 12bit right align register" line.long 0xC "DHR12L,DHR12L" hexmask.long.word 0xC 20.--31. 1. "DACDHRB,DAC double data mode 12bit left align register double mode valid" hexmask.long.word 0xC 4.--15. 1. "DACDHR,DAC double data mode 12bit left align register" line.long 0x10 "DHR8R,DHR8R" hexmask.long.byte 0x10 8.--15. 1. "DACDHRB,DAC double data mode 8bit right align register double mode valid" hexmask.long.byte 0x10 0.--7. 1. "DACDHR,DAC double data mode 8bit right align register" rgroup.long 0x14++0x3 line.long 0x0 "DOR,DOR" hexmask.long.word 0x0 16.--27. 1. "DACDORB,DAC DOR register double mode valid" hexmask.long.word 0x0 0.--11. 1. "DACDOR,DAC DOR register" group.long 0x18++0xB line.long 0x0 "SR,SR" rbitfld.long 0x0 14. "CALFLAG,Calibration flag calibartion done when this bit reversed." "0,1" bitfld.long 0x0 13. "DMAUDR,DAC dma underrun interrupt" "0,1" rbitfld.long 0x0 12. "DORSTATUS,DAC double data mode flag valid in double mode" "0: low range bits flag,1: high range bits flag" rbitfld.long 0x0 9.--11. "FIFODEPTH,DAC data FIFO depth" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 8. "FIFOOVF,DAC data FIFO overflow flag" "0,1" bitfld.long 0x0 7. "FIFOUDF,DAC data FIFO underflow flag" "0,1" rbitfld.long 0x0 6. "FIFOEMPTY,DAC data FIFO empty flag" "0,1" rbitfld.long 0x0 5. "FIFOFULL,DAC_data FIFO full flag" "0,1" line.long 0x4 "MCR,MCR" bitfld.long 0x4 9. "SINFORMAT,DAC signed data flag" "0,1" bitfld.long 0x4 8. "DMADOUBLE,DAC DMA double data mode enable; configure this bit before DAC enable and dma enable" "0: disable,1: enable" bitfld.long 0x4 7. "FIFOOVFIE,DAC data FIFO overflow interrupt" "0,1" bitfld.long 0x4 6. "FIFOUDFIE,DAC data FIFO underflow interrtpt" "0,1" newline bitfld.long 0x4 3. "CHSEL,DAC output channel selection" "0: DAC output channel 0 selected,1: DAC output channel 1 selected" bitfld.long 0x4 0.--1. "MODE,DAC work mode can not write these bits when DAC enable or calibration enable" "0: EXT_BUF,1: EXT_INTER_BUF,2: EXT,3: INNER_BUF" line.long 0x8 "CCR,CCR" hexmask.long.byte 0x8 0.--4. 1. "OFFSET,DAC user calibration register" tree.end tree "DBG_MCU (Debug)" base ad:0xE0045000 group.long 0x0++0x7 line.long 0x0 "CR,CR" bitfld.long 0x0 3. "DBGSTOP,Debug stop mode" "0: FCLK=Off,1: FCLK=On" bitfld.long 0x0 2. "DBGSHUTDOWN,Debug shutdown mode" "0: FCLK=Off,1: FCLK=On" newline bitfld.long 0x0 1. "DBGSTANDBY,Debug standby mode" "0: FCLK=Off,1: FCLK=On" bitfld.long 0x0 0. "DBGSLEEP,Debug sleep mode" "0: FCLK=On,1: FCLK=On" line.long 0x4 "APBFZR,APBFZR" bitfld.long 0x4 22. "DBGI2C1STOP,I2C1 SMBUS timeout counter stopped when core is halted" "0: Same behavior as in normal mode,1: The I2C1 SMBus timeout is frozen" bitfld.long 0x4 21. "DBGI2C0STOP,I2C0 SMBUS timeout counter stopped when core is halted" "0: Same behavior as in normal mode,1: The I2C0 SMBus timeout is frozen" newline bitfld.long 0x4 12. "DBGIWDGSTOP,Independent watchdog counter stopped when core is halted" "0: The independent watchdog counter clock continues..,1: The independent watchdog counter clock is.." bitfld.long 0x4 11. "DBGWWDGSTOP,Window watchdog counter stopped when core is halted" "0: The window watchdog counter clock continues even..,1: The window watchdog counter clock is stopped.." newline bitfld.long 0x4 10. "DBGRTCSTOP,RTC counter stopped when core is halted" "0: The clock of the RTC counter is fed even if the..,1: The clock of the RTC counter is stopped when the.." bitfld.long 0x4 8. "DBGADVTMR2STOP,ADVTMR2 counter stopped when core is halted" "0: The counter clock of ADVTMR2 is fed even if the..,1: The counter clock of ADVTMR2 is stopped when the.." newline bitfld.long 0x4 7. "DBGADVTMR1STOP,ADVTMR1 counter stopped when core is halted" "0: The counter clock of ADVTMR1 is fed even if the..,1: The counter clock of ADVTMR1 is stopped when the.." bitfld.long 0x4 6. "DBGADVTMR0STOP,ADVTMR0 counter stopped when core is halted" "0: The counter clock of ADVTMR0 is fed even if the..,1: The counter clock of ADVTMR0 is stopped when the.." newline bitfld.long 0x4 5. "DBGGPTMR5STOP,GPTMR5 counter stopped when core is halted" "0: The counter clock of GPTMR5 is fed even if the..,1: The counter clock of GPTMR5 is stopped when the.." bitfld.long 0x4 4. "DBGGPTMR4STOP,GPTMR4 counter stopped when core is halted" "0: The counter clock of GPTMR4 is fed even if the..,1: The counter clock of GPTMR4 is stopped when the.." newline bitfld.long 0x4 3. "DBGGPTMR3STOP,GPTMR3 counter stopped when core is halted" "0: The counter clock of GPTMR3 is fed even if the..,1: The counter clock of GPTMR3 is stopped when the.." bitfld.long 0x4 2. "DBGGPTMR2STOP,GPTMR2 counter stopped when core is halted" "0: The counter clock of GPTMR2 is fed even if the..,1: The counter clock of GPTMR2 is stopped when the.." newline bitfld.long 0x4 1. "DBGGPTMR1STOP,GPTMR1 counter stopped when core is halted" "0: The counter clock of GPTMR1 is fed even if the..,1: The counter clock of GPTMR1 is stopped when the.." bitfld.long 0x4 0. "DBGGPTMR0STOP,GPTMR0 counter stopped when core is halted" "0: The counter clock of GPTMR0 is fed even if the..,1: The counter clock of GPTMR0 is stopped when the.." tree.end tree "DMA (Direct Memory Access Controller)" base ad:0x0 tree "DMA0" sif (cpuis("TPS325M0*")) tree "DMA0" base ad:0x48001400 rgroup.long 0x0++0x7 line.long 0x0 "INTSTS0,INTSTS0" bitfld.long 0x0 27. "CH3FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 26. "CH3HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 25. "CH3TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 24. "CH3DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 22. "CH3FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 21. "CH2FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 20. "CH2HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 19. "CH2TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 18. "CH2DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 16. "CH2FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 11. "CH1FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 10. "CH1HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 9. "CH1TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 8. "CH1DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 6. "CH1FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 5. "CH0FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 4. "CH0HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 3. "CH0TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 2. "CH0DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 0. "CH0FIFOERRINT,FIFO Error interrupt flag" "0,1" line.long 0x4 "INTSTS1,INTSTS1" bitfld.long 0x4 27. "CH7FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 26. "CH7HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 25. "CH7TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 24. "CH7DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 22. "CH7FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 21. "CH6FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 20. "CH6HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 19. "CH6TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 18. "CH6DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 16. "CH6FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 11. "CH5FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 10. "CH5HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 9. "CH5TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 8. "CH5DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 6. "CH5FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 5. "CH4FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 4. "CH4HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 3. "CH4TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 2. "CH4DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 0. "CH4FIFOERRINT,FIFO Error interrupt flag" "0,1" wgroup.long 0x8++0x7 line.long 0x0 "INTCLR0,INTCLR0" bitfld.long 0x0 27. "CH3FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 26. "CH3HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 25. "CH3TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 24. "CH3DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 22. "CH3FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x0 21. "CH2FULLTRANSFERINTCLR,CH2FULLTRANSFERINTCLR" "0,1" bitfld.long 0x0 20. "CH2HALFTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 19. "CH2TRANSFERERRINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 18. "CH2DIRECTMODEERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 16. "CH2FIFOERRINTCLR,CH2FIFOERRINTCLR" "0,1" newline bitfld.long 0x0 11. "CH1FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 10. "CH1HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 9. "CH1TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 8. "CH1DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 6. "CH1FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x0 5. "CH0FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 4. "CH0HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 3. "CH0TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 2. "CH0DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 0. "CH0FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" line.long 0x4 "INTCLR1,INTCLRCLR1" bitfld.long 0x4 27. "CH7FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 26. "CH7HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 25. "CH7TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 24. "CH7DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 22. "CH7FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 21. "CH6FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 20. "CH6HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 19. "CH6TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 18. "CH6DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 16. "CH6FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 11. "CH5FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 10. "CH5HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 9. "CH5TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 8. "CH5DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 6. "CH5FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 5. "CH4FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 4. "CH4HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 3. "CH4TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 2. "CH4DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 0. "CH4FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" tree.end endif tree "DMA0_CH0" base ad:0x48001410 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA0_CH1" base ad:0x48001428 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA0_CH2" base ad:0x48001440 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA0_CH3" base ad:0x48001458 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA0_CH4" base ad:0x48001470 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA0_CH5" base ad:0x48001488 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA0_CH6" base ad:0x480014A0 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA0_CH7" base ad:0x480014B8 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end sif (cpuis("TPS325M5*")) tree "DMA0" base ad:0x48001400 rgroup.long 0x0++0x7 line.long 0x0 "INTSTS0,INTSTS0" bitfld.long 0x0 27. "CH3FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 26. "CH3HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 25. "CH3TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 24. "CH3DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 22. "CH3FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 21. "CH2FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 20. "CH2HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 19. "CH2TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 18. "CH2DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 16. "CH2FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 11. "CH1FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 10. "CH1HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 9. "CH1TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 8. "CH1DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 6. "CH1FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 5. "CH0FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 4. "CH0HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 3. "CH0TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 2. "CH0DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 0. "CH0FIFOERRINT,FIFO Error interrupt flag" "0,1" line.long 0x4 "INTSTS1,INTSTS1" bitfld.long 0x4 27. "CH7FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 26. "CH7HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 25. "CH7TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 24. "CH7DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 22. "CH7FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 21. "CH6FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 20. "CH6HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 19. "CH6TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 18. "CH6DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 16. "CH6FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 11. "CH5FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 10. "CH5HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 9. "CH5TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 8. "CH5DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 6. "CH5FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 5. "CH4FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 4. "CH4HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 3. "CH4TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 2. "CH4DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 0. "CH4FIFOERRINT,FIFO Error interrupt flag" "0,1" wgroup.long 0x8++0x7 line.long 0x0 "INTCLR0,INTCLR0" bitfld.long 0x0 27. "CH3FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 26. "CH3HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 25. "CH3TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 24. "CH3DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 22. "CH3FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x0 21. "CH2FULLTRANSFERINTCLR,CH2FULLTRANSFERINTCLR" "0,1" bitfld.long 0x0 20. "CH2HALFTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 19. "CH2TRANSFERERRINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 18. "CH2DIRECTMODEERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 16. "CH2FIFOERRINTCLR,CH2FIFOERRINTCLR" "0,1" newline bitfld.long 0x0 11. "CH1FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 10. "CH1HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 9. "CH1TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 8. "CH1DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 6. "CH1FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x0 5. "CH0FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 4. "CH0HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 3. "CH0TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 2. "CH0DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 0. "CH0FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" line.long 0x4 "INTCLRCLR1,INTCLRCLR1" bitfld.long 0x4 27. "CH7FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 26. "CH7HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 25. "CH7TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 24. "CH7DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 22. "CH7FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 21. "CH6FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 20. "CH6HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 19. "CH6TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 18. "CH6DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 16. "CH6FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 11. "CH5FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 10. "CH5HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 9. "CH5TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 8. "CH5DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 6. "CH5FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 5. "CH4FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 4. "CH4HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 3. "CH4TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 2. "CH4DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 0. "CH4FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" tree.end endif tree.end tree "DMA1" sif (cpuis("TPS325M0*")) tree "DMA1" base ad:0x48001800 rgroup.long 0x0++0x7 line.long 0x0 "INTSTS0,INTSTS0" bitfld.long 0x0 27. "CH3FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 26. "CH3HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 25. "CH3TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 24. "CH3DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 22. "CH3FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 21. "CH2FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 20. "CH2HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 19. "CH2TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 18. "CH2DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 16. "CH2FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 11. "CH1FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 10. "CH1HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 9. "CH1TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 8. "CH1DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 6. "CH1FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 5. "CH0FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 4. "CH0HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 3. "CH0TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 2. "CH0DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 0. "CH0FIFOERRINT,FIFO Error interrupt flag" "0,1" line.long 0x4 "INTSTS1,INTSTS1" bitfld.long 0x4 27. "CH7FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 26. "CH7HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 25. "CH7TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 24. "CH7DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 22. "CH7FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 21. "CH6FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 20. "CH6HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 19. "CH6TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 18. "CH6DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 16. "CH6FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 11. "CH5FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 10. "CH5HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 9. "CH5TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 8. "CH5DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 6. "CH5FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 5. "CH4FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 4. "CH4HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 3. "CH4TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 2. "CH4DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 0. "CH4FIFOERRINT,FIFO Error interrupt flag" "0,1" wgroup.long 0x8++0x7 line.long 0x0 "INTCLR0,INTCLR0" bitfld.long 0x0 27. "CH3FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 26. "CH3HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 25. "CH3TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 24. "CH3DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 22. "CH3FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x0 21. "CH2FULLTRANSFERINTCLR,CH2FULLTRANSFERINTCLR" "0,1" bitfld.long 0x0 20. "CH2HALFTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 19. "CH2TRANSFERERRINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 18. "CH2DIRECTMODEERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 16. "CH2FIFOERRINTCLR,CH2FIFOERRINTCLR" "0,1" newline bitfld.long 0x0 11. "CH1FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 10. "CH1HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 9. "CH1TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 8. "CH1DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 6. "CH1FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x0 5. "CH0FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 4. "CH0HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 3. "CH0TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 2. "CH0DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 0. "CH0FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" line.long 0x4 "INTCLR1,INTCLRCLR1" bitfld.long 0x4 27. "CH7FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 26. "CH7HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 25. "CH7TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 24. "CH7DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 22. "CH7FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 21. "CH6FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 20. "CH6HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 19. "CH6TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 18. "CH6DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 16. "CH6FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 11. "CH5FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 10. "CH5HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 9. "CH5TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 8. "CH5DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 6. "CH5FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 5. "CH4FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 4. "CH4HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 3. "CH4TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 2. "CH4DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 0. "CH4FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" tree.end endif tree "DMA1_CH0" base ad:0x48001810 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA1_CH1" base ad:0x48001828 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA1_CH2" base ad:0x48001840 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA1_CH3" base ad:0x48001858 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA1_CH4" base ad:0x48001870 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA1_CH5" base ad:0x48001888 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA1_CH6" base ad:0x480018A0 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end tree "DMA1_CH7" base ad:0x480018B8 group.long 0x0++0x17 line.long 0x0 "CFG,CFG" bitfld.long 0x0 25.--27. "PERISRCSEL,Channel selection" "0: request source 0 selected,1: request source 1 selected,?,?,?,?,?,?" bitfld.long 0x0 23.--24. "MBURST,MEM burst transfer configuration these bits are set and cleared by software." "0: single transfer,1: INCR4,2: INCR8,3: INCR16" newline bitfld.long 0x0 21.--22. "PBURST,In peripheral burst transfer configuration these bits are set and cleared by software." "0: single Transfer,1: Transfer with Burst Len 4,2: BURSTLEN8,3: BURSTLEN16" bitfld.long 0x0 19. "CURRENTMEM,This field is only valid in MEMSWITCHMODE." "0: MEM0 is the current target memory,1: MEM1 is the current target memory" newline bitfld.long 0x0 18. "MEMSWITCHMODE,0: Current target memory will not be switched at the end of transfer." "0: Current target memory will not be switched at..,1: Current target memory will be switched at the.." bitfld.long 0x0 16.--17. "PRIORITYLEVEL,00: Low Priority" "0: Low Priority,1: Medium Priority,2: HIGHPRIORITY,3: SUPERHIGHPRIORITY" newline bitfld.long 0x0 15. "PERIINCOFFSETSIZE,0: Peripheral Address increment is related to PERIDATASIZE." "0: Peripheral Address increment is related to..,1: Peripheral Address increment is fixed to 4" bitfld.long 0x0 13.--14. "MEMDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" newline bitfld.long 0x0 11.--12. "PERIDATASIZE,These bits are set and cleared by software." "0: Byte,1: Half Word,2: WORD,3: reserved_not_used" bitfld.long 0x0 10. "MEMINCEN,These bits are set and cleared by software." "0: Memory Address Fixed,1: The Memory Address is incremented at the end of.." newline bitfld.long 0x0 9. "PERIINCEN,These bits are set and cleared by software." "0: Peripheral Address Fixed,1: The Peripheral Address is incremented at the end.." bitfld.long 0x0 8. "CIRCULARMODE,These bits are set and cleared by software and can be also cleared by HW." "0: Disable Cycle Mode,1: Enable Cycle Mode" newline bitfld.long 0x0 6.--7. "TRANSFERDIRECTION,These bits are set and cleared by software." "0: Peripheral to Memory,1: Memroy to Peripheral,2: M2M,3: reserved_not_used" bitfld.long 0x0 5. "TRANSFERCONTROLLERSEL,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 4. "FULLTRANSFERINTEN,0: Disable transfer complete interrupt" "0: Disable transfer complete interrupt,1: Enable transfer complete interrupt" bitfld.long 0x0 3. "HALFTRANSFERINTEN,0: Disable half of transfer complete interrupt" "0: Disable half of transfer complete interrupt,1: Enable half of transfer complete interrupt" newline bitfld.long 0x0 2. "TRANSFERERRINTEN,0: Disable transfer error interrupt" "0: Disable transfer error interrupt,1: Enable transfer error interrupt" bitfld.long 0x0 1. "DIRECTMODEERRINTEN,0: DMA is the transfer controller" "0: DMA is the transfer controller,1: Peripheral is the transfer controller" newline bitfld.long 0x0 0. "EN,These bits are set and cleared by software." "0: Disable channel,1: Enable channel" line.long 0x4 "DATANUM,DATANUM" hexmask.long.word 0x4 0.--15. 1. "DATANUM,Number of data to be transfered (0~65535)" line.long 0x8 "PERIADDR,PERIADDR" hexmask.long 0x8 0.--31. 1. "PERIADDR,The base address of the peripheral data register for reading/writing data." line.long 0xC "MEM0ADDR,MEM0ADDR" hexmask.long 0xC 0.--31. 1. "MEM0ADDR,The base address of the MEM0 for reading/writing data" line.long 0x10 "MEM1ADDR,MEM1ADDR" hexmask.long 0x10 0.--31. 1. "MEM1ADDR,The base address of the MEM1 for reading/writing data" line.long 0x14 "FIFOCTRL,FIFOCTRL" bitfld.long 0x14 7. "FIFOERRINTEN,These bits are set and cleared by software." "0: Disable FIFO Error Interrupt,1: Enable FIFO Error Interrupt" rbitfld.long 0x14 3.--5. "FIFODEPTHSTS,These bits are set and cleared by hardware." "0: FIFO is not empty and the data is less than 1 word,1: FIFO is not empty and the data is less than 2..,?,?,?,?,?,?" newline bitfld.long 0x14 2. "DIRECTMODEDISABLE,These bits are set and cleared by software and can be set by hardware if Memory to Memory mode is enabled." "0: Enable Direct Mode,1: Disable Direct Mode" bitfld.long 0x14 0.--1. "FIFOTH,00: 1 word" "0: 1 word,1: 2 words,2: 3_WORDS,3: 4_WORDS" tree.end sif (cpuis("TPS325M5*")) tree "DMA1" base ad:0x48001800 rgroup.long 0x0++0x7 line.long 0x0 "INTSTS0,INTSTS0" bitfld.long 0x0 27. "CH3FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 26. "CH3HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 25. "CH3TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 24. "CH3DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 22. "CH3FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 21. "CH2FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 20. "CH2HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 19. "CH2TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 18. "CH2DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 16. "CH2FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 11. "CH1FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 10. "CH1HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 9. "CH1TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 8. "CH1DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 6. "CH1FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x0 5. "CH0FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x0 4. "CH0HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x0 3. "CH0TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x0 2. "CH0DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x0 0. "CH0FIFOERRINT,FIFO Error interrupt flag" "0,1" line.long 0x4 "INTSTS1,INTSTS1" bitfld.long 0x4 27. "CH7FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 26. "CH7HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 25. "CH7TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 24. "CH7DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 22. "CH7FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 21. "CH6FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 20. "CH6HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 19. "CH6TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 18. "CH6DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 16. "CH6FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 11. "CH5FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 10. "CH5HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 9. "CH5TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 8. "CH5DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 6. "CH5FIFOERRINT,FIFO Error interrupt flag" "0,1" newline bitfld.long 0x4 5. "CH4FULLTRANSFERINT,Full Transfer interrupt flag" "0,1" bitfld.long 0x4 4. "CH4HALFTRANSFERINT,Half Transfer interrupt flag" "0,1" bitfld.long 0x4 3. "CH4TRANSFERERRINT,Transfer Error interrupt flag" "0,1" bitfld.long 0x4 2. "CH4DIRECTMODEERRINT,Direct mode Error interrupt flag" "0,1" bitfld.long 0x4 0. "CH4FIFOERRINT,FIFO Error interrupt flag" "0,1" wgroup.long 0x8++0x7 line.long 0x0 "INTCLR0,INTCLR0" bitfld.long 0x0 27. "CH3FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 26. "CH3HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 25. "CH3TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 24. "CH3DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 22. "CH3FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x0 21. "CH2FULLTRANSFERINTCLR,CH2FULLTRANSFERINTCLR" "0,1" bitfld.long 0x0 20. "CH2HALFTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 19. "CH2TRANSFERERRINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 18. "CH2DIRECTMODEERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 16. "CH2FIFOERRINTCLR,CH2FIFOERRINTCLR" "0,1" newline bitfld.long 0x0 11. "CH1FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 10. "CH1HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 9. "CH1TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 8. "CH1DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 6. "CH1FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x0 5. "CH0FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x0 4. "CH0HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x0 3. "CH0TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x0 2. "CH0DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x0 0. "CH0FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" line.long 0x4 "INTCLRCLR1,INTCLRCLR1" bitfld.long 0x4 27. "CH7FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 26. "CH7HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 25. "CH7TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 24. "CH7DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 22. "CH7FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 21. "CH6FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 20. "CH6HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 19. "CH6TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 18. "CH6DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 16. "CH6FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 11. "CH5FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 10. "CH5HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 9. "CH5TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 8. "CH5DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 6. "CH5FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" newline bitfld.long 0x4 5. "CH4FULLTRANSFERINTCLR,Full Transfer interrupt flag clear" "0,1" bitfld.long 0x4 4. "CH4HALFTRANSFERINTCLR,Half Transfer interrupt flag clear" "0,1" bitfld.long 0x4 3. "CH4TRANSFERERRINTCLR,Transfer Error interrupt flag clear" "0,1" bitfld.long 0x4 2. "CH4DIRECTMODEERRINTCLR,Direct mode Error interrupt flag clear" "0,1" bitfld.long 0x4 0. "CH4FIFOERRINTCLR,FIFO Error interrupt flag clear" "0,1" tree.end endif tree.end tree.end tree "EXTI (Extended Interrupts and Events Controller)" base ad:0x4001CC00 group.long 0x0++0x17 line.long 0x0 "IMR1,IMR1" bitfld.long 0x0 31. "IM31,Interrupt Mask on line 31" "0: Interrupt request from Line 31 is masked,1: Interrupt request from Line 31 is not masked" bitfld.long 0x0 30. "IM30,Interrupt Mask on line 30" "0: Interrupt request from Line 30 is masked,1: Interrupt request from Line 30 is not masked" newline bitfld.long 0x0 29. "IM29,Interrupt Mask on line 29" "0: Interrupt request from Line 29 is masked,1: Interrupt request from Line 29 is not masked" bitfld.long 0x0 28. "IM28,Interrupt Mask on line 28" "0: Interrupt request from Line 28 is masked,1: Interrupt request from Line 28 is not masked" newline bitfld.long 0x0 27. "IM27,Interrupt Mask on line 27" "0: Interrupt request from Line 27 is masked,1: Interrupt request from Line 27 is not masked" bitfld.long 0x0 26. "IM26,Interrupt Mask on line 26" "0: Interrupt request from Line 26 is masked,1: Interrupt request from Line 26 is not masked" newline bitfld.long 0x0 25. "IM25,Interrupt Mask on line 25" "0: Interrupt request from Line 25 is masked,1: Interrupt request from Line 25 is not masked" bitfld.long 0x0 24. "IM24,Interrupt Mask on line 24" "0: Interrupt request from Line 24 is masked,1: Interrupt request from Line 24 is not masked" newline bitfld.long 0x0 23. "IM23,Interrupt Mask on line 23" "0: Interrupt request from Line 23 is masked,1: Interrupt request from Line 23 is not masked" bitfld.long 0x0 22. "IM22,Interrupt Mask on line 22" "0: Interrupt request from Line 22 is masked,1: Interrupt request from Line 22 is not masked" newline bitfld.long 0x0 21. "IM21,Interrupt Mask on line 21" "0: Interrupt request from Line 21 is masked,1: Interrupt request from Line 21 is not masked" bitfld.long 0x0 20. "IM20,Interrupt Mask on line 20" "0: Interrupt request from Line 20 is masked,1: Interrupt request from Line 20 is not masked" newline bitfld.long 0x0 19. "IM19,Interrupt Mask on line 19" "0: Interrupt request from Line 19 is masked,1: Interrupt request from Line 19 is not masked" bitfld.long 0x0 18. "IM18,Interrupt Mask on line 18" "0: Interrupt request from Line 18 is masked,1: Interrupt request from Line 18 is not masked" newline bitfld.long 0x0 17. "IM17,Interrupt Mask on line 17" "0: Interrupt request from Line 17 is masked,1: Interrupt request from Line 17 is not masked" bitfld.long 0x0 16. "IM16,Interrupt Mask on line 16" "0: Interrupt request from Line 16 is masked,1: Interrupt request from Line 16 is not masked" newline bitfld.long 0x0 15. "IM15,Interrupt Mask on line 15" "0: Interrupt request from Line 15 is masked,1: Interrupt request from Line 15 is not masked" bitfld.long 0x0 14. "IM14,Interrupt Mask on line 14" "0: Interrupt request from Line 14 is masked,1: Interrupt request from Line 14 is not masked" newline bitfld.long 0x0 13. "IM13,Interrupt Mask on line 13" "0: Interrupt request from Line 13 is masked,1: Interrupt request from Line 13 is not masked" bitfld.long 0x0 12. "IM12,Interrupt Mask on line 12" "0: Interrupt request from Line 12 is masked,1: Interrupt request from Line 12 is not masked" newline bitfld.long 0x0 11. "IM11,Interrupt Mask on line 11" "0: Interrupt request from Line 11 is masked,1: Interrupt request from Line 11 is not masked" bitfld.long 0x0 10. "IM10,Interrupt Mask on line 10" "0: Interrupt request from Line 10 is masked,1: Interrupt request from Line 10 is not masked" newline bitfld.long 0x0 9. "IM9,Interrupt Mask on line 9" "0: Interrupt request from Line 9 is masked,1: Interrupt request from Line 9 is not masked" bitfld.long 0x0 8. "IM8,Interrupt Mask on line 8" "0: Interrupt request from Line 8 is masked,1: Interrupt request from Line 8 is not masked" newline bitfld.long 0x0 7. "IM7,Interrupt Mask on line 7" "0: Interrupt request from Line 7 is masked,1: Interrupt request from Line 7 is not masked" bitfld.long 0x0 6. "IM6,Interrupt Mask on line 6" "0: Interrupt request from Line 6 is masked,1: Interrupt request from Line 6 is not masked" newline bitfld.long 0x0 5. "IM5,Interrupt Mask on line 5" "0: Interrupt request from Line 5 is masked,1: Interrupt request from Line 5 is not masked" bitfld.long 0x0 4. "IM4,Interrupt Mask on line 4" "0: Interrupt request from Line 4 is masked,1: Interrupt request from Line 4 is not masked" newline bitfld.long 0x0 3. "IM3,Interrupt Mask on line 3" "0: Interrupt request from Line 3 is masked,1: Interrupt request from Line 3 is not masked" bitfld.long 0x0 2. "IM2,Interrupt Mask on line 2" "0: Interrupt request from Line 2 is masked,1: Interrupt request from Line 2 is not masked" newline bitfld.long 0x0 1. "IM1,Interrupt Mask on line 1" "0: Interrupt request from Line 1 is masked,1: Interrupt request from Line 1 is not masked" bitfld.long 0x0 0. "IM0,Interrupt Mask on line 0" "0: Interrupt request from Line 0 is masked,1: Interrupt request from Line 0 is not masked" line.long 0x4 "EMR1,EMR1" bitfld.long 0x4 31. "EM31,Event Mask on line 31" "0: Event request from Line 31 is masked,1: Event request from Line 31 is not masked" bitfld.long 0x4 30. "EM30,Event Mask on line 30" "0: Event request from Line 30 is masked,1: Event request from Line 30 is not masked" newline bitfld.long 0x4 29. "EM29,Event Mask on line 29" "0: Event request from Line 29 is masked,1: Event request from Line 29 is not masked" bitfld.long 0x4 28. "EM28,Event Mask on line 28" "0: Event request from Line 28 is masked,1: Event request from Line 28 is not masked" newline bitfld.long 0x4 27. "EM27,Event Mask on line 27" "0: Event request from Line 27 is masked,1: Event request from Line 27 is not masked" bitfld.long 0x4 26. "EM26,Event Mask on line 26" "0: Event request from Line 26 is masked,1: Event request from Line 26 is not masked" newline bitfld.long 0x4 25. "EM25,Event Mask on line 25" "0: Event request from Line 25 is masked,1: Event request from Line 25 is not masked" bitfld.long 0x4 24. "EM24,Event Mask on line 24" "0: Event request from Line 24 is masked,1: Event request from Line 24 is not masked" newline bitfld.long 0x4 23. "EM23,Event Mask on line 23" "0: Event request from Line 23 is masked,1: Event request from Line 23 is not masked" bitfld.long 0x4 22. "EM22,Event Mask on line 22" "0: Event request from Line 22 is masked,1: Event request from Line 22 is not masked" newline bitfld.long 0x4 21. "EM21,Event Mask on line 21" "0: Event request from Line 21 is masked,1: Event request from Line 21 is not masked" bitfld.long 0x4 20. "EM20,Event Mask on line 20" "0: Event request from Line 20 is masked,1: Event request from Line 20 is not masked" newline bitfld.long 0x4 19. "EM19,Event Mask on line 19" "0: Event request from Line 19 is masked,1: Event request from Line 19 is not masked" bitfld.long 0x4 18. "EM18,Event Mask on line 18" "0: Event request from Line 18 is masked,1: Event request from Line 18 is not masked" newline bitfld.long 0x4 17. "EM17,Event Mask on line 17" "0: Event request from Line 17 is masked,1: Event request from Line 17 is not masked" bitfld.long 0x4 16. "EM16,Event Mask on line 16" "0: Event request from Line 16 is masked,1: Event request from Line 16 is not masked" newline bitfld.long 0x4 15. "EM15,Event Mask on line 15" "0: Event request from Line 15 is masked,1: Event request from Line 15 is not masked" bitfld.long 0x4 14. "EM14,Event Mask on line 14" "0: Event request from Line 14 is masked,1: Event request from Line 14 is not masked" newline bitfld.long 0x4 13. "EM13,Event Mask on line 13" "0: Event request from Line 13 is masked,1: Event request from Line 13 is not masked" bitfld.long 0x4 12. "EM12,Event Mask on line 12" "0: Event request from Line 12 is masked,1: Event request from Line 12 is not masked" newline bitfld.long 0x4 11. "EM11,Event Mask on line 11" "0: Event request from Line 11 is masked,1: Event request from Line 11 is not masked" bitfld.long 0x4 10. "EM10,Event Mask on line 10" "0: Event request from Line 10 is masked,1: Event request from Line 10 is not masked" newline bitfld.long 0x4 9. "EM9,Event Mask on line 9" "0: Event request from Line 9 is masked,1: Event request from Line 9 is not masked" bitfld.long 0x4 8. "EM8,Event Mask on line 8" "0: Event request from Line 8 is masked,1: Event request from Line 8 is not masked" newline bitfld.long 0x4 7. "EM7,Event Mask on line 7" "0: Event request from Line 7 is masked,1: Event request from Line 7 is not masked" bitfld.long 0x4 6. "EM6,Event Mask on line 6" "0: Event request from Line 6 is masked,1: Event request from Line 6 is not masked" newline bitfld.long 0x4 5. "EM5,Event Mask on line 5" "0: Event request from Line 5 is masked,1: Event request from Line 5 is not masked" bitfld.long 0x4 4. "EM4,Event Mask on line 4" "0: Event request from Line 4 is masked,1: Event request from Line 4 is not masked" newline bitfld.long 0x4 3. "EM3,Event Mask on line 3" "0: Event request from Line 3 is masked,1: Event request from Line 3 is not masked" bitfld.long 0x4 2. "EM2,Event Mask on line 2" "0: Event request from Line 2 is masked,1: Event request from Line 2 is not masked" newline bitfld.long 0x4 1. "EM1,Event Mask on line 1" "0: Event request from Line 1 is masked,1: Event request from Line 1 is not masked" bitfld.long 0x4 0. "EM0,Event Mask on line 0" "0: Event request from Line 0 is masked,1: Event request from Line 0 is not masked" line.long 0x8 "RTSR1,RTSR1" bitfld.long 0x8 31. "RT31,Rising trigger event configuration bit of line 31" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 21. "RT21,Rising trigger event configuration bit of line 21" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 20. "RT20,Rising trigger event configuration bit of line 20" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 19. "RT19,Rising trigger event configuration bit of line 19" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 18. "RT18,Rising trigger event configuration bit of line 18" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 17. "RT17,Rising trigger event configuration bit of line 17" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 16. "RT16,Rising trigger event configuration bit of line 16" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 15. "RT15,Rising trigger event configuration bit of line 15" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 14. "RT14,Rising trigger event configuration bit of line 14" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 13. "RT13,Rising trigger event configuration bit of line 13" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 12. "RT12,Rising trigger event configuration bit of line 12" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 11. "RT11,Rising trigger event configuration bit of line 11" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 10. "RT10,Rising trigger event configuration bit of line 10" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 9. "RT9,Rising trigger event configuration bit of line 9" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 8. "RT8,Rising trigger event configuration bit of line 8" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 7. "RT7,Rising trigger event configuration bit of line 7" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 6. "RT6,Rising trigger event configuration bit of line 6" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 5. "RT5,Rising trigger event configuration bit of line 5" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 4. "RT4,Rising trigger event configuration bit of line 4" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 3. "RT3,Rising trigger event configuration bit of line 3" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 2. "RT2,Rising trigger event configuration bit of line 2" "0: rising trigger disabled,1: rising trigger enabled" bitfld.long 0x8 1. "RT1,Rising trigger event configuration bit of line 1" "0: rising trigger disabled,1: rising trigger enabled" newline bitfld.long 0x8 0. "RT0,Rising trigger event configuration bit of line 0" "0: rising trigger disabled,1: rising trigger enabled" line.long 0xC "FTSR1,FTSR1" bitfld.long 0xC 31. "FT31,Falling trigger event configuration bit of line 31" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 21. "FT21,Falling trigger event configuration bit of line 21" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 20. "FT20,Falling trigger event configuration bit of line 20" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 19. "FT19,Falling trigger event configuration bit of line 19" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 18. "FT18,Falling trigger event configuration bit of line 18" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 17. "FT17,Falling trigger event configuration bit of line 17" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 16. "FT16,Falling trigger event configuration bit of line 16" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 15. "FT15,Falling trigger event configuration bit of line 15" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 14. "FT14,Falling trigger event configuration bit of line 14" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 13. "FT13,Falling trigger event configuration bit of line 13" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 12. "FT12,Falling trigger event configuration bit of line 12" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 11. "FT11,Falling trigger event configuration bit of line 11" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 10. "FT10,Falling trigger event configuration bit of line 10" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 9. "FT9,Falling trigger event configuration bit of line 9" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 8. "FT8,Falling trigger event configuration bit of line 8" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 7. "FT7,Falling trigger event configuration bit of line 7" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 6. "FT6,Falling trigger event configuration bit of line 6" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 5. "FT5,Falling trigger event configuration bit of line 5" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 4. "FT4,Falling trigger event configuration bit of line 4" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 3. "FT3,Falling trigger event configuration bit of line 3" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 2. "FT2,Falling trigger event configuration bit of line 2" "0: falling trigger disabled,1: falling trigger enabled" bitfld.long 0xC 1. "FT1,Falling trigger event configuration bit of line 1" "0: falling trigger disabled,1: falling trigger enabled" newline bitfld.long 0xC 0. "FT0,Falling trigger event configuration bit of line 0" "0: falling trigger disabled,1: falling trigger enabled" line.long 0x10 "SWIER1,SWIER1" bitfld.long 0x10 31. "SWI31,Software rising edge event trigger on line 31" "?,1: LINE31_SW_TRG_SET" bitfld.long 0x10 21. "SWI21,Software rising edge event trigger on line 21" "?,1: LINE21_SW_TRG_SET" newline bitfld.long 0x10 20. "SWI20,Software rising edge event trigger on line 20" "?,1: LINE20_SW_TRG_SET" bitfld.long 0x10 19. "SWI19,Software rising edge event trigger on line 19" "?,1: LINE19_SW_TRG_SET" newline bitfld.long 0x10 18. "SWI18,Software rising edge event trigger on line 18" "?,1: LINE18_SW_TRG_SET" bitfld.long 0x10 17. "SWI17,Software rising edge event trigger on line 17" "?,1: LINE17_SW_TRG_SET" newline bitfld.long 0x10 16. "SWI16,Software rising edge event trigger on line 16" "?,1: LINE16_SW_TRG_SET" bitfld.long 0x10 15. "SWI15,Software rising edge event trigger on line 15" "?,1: LINE15_SW_TRG_SET" newline bitfld.long 0x10 14. "SWI14,Software rising edge event trigger on line 14" "?,1: LINE14_SW_TRG_SET" bitfld.long 0x10 13. "SWI13,Software rising edge event trigger on line 13" "?,1: LINE13_SW_TRG_SET" newline bitfld.long 0x10 12. "SWI12,Software rising edge event trigger on line 12" "?,1: LINE12_SW_TRG_SET" bitfld.long 0x10 11. "SWI11,Software rising edge event trigger on line 11" "?,1: LINE11_SW_TRG_SET" newline bitfld.long 0x10 10. "SWI10,Software rising edge event trigger on line 10" "?,1: LINE10_SW_TRG_SET" bitfld.long 0x10 9. "SWI9,Software rising edge event trigger on line 9" "?,1: LINE9_SW_TRG_SET" newline bitfld.long 0x10 8. "SWI8,Software rising edge event trigger on line 8" "?,1: LINE8_SW_TRG_SET" bitfld.long 0x10 7. "SWI7,Software rising edge event trigger on line 7" "?,1: LINE7_SW_TRG_SET" newline bitfld.long 0x10 6. "SWI6,Software rising edge event trigger on line 6" "?,1: LINE6_SW_TRG_SET" bitfld.long 0x10 5. "SWI5,Software rising edge event trigger on line 5" "?,1: LINE5_SW_TRG_SET" newline bitfld.long 0x10 4. "SWI4,Software rising edge event trigger on line 4" "?,1: LINE4_SW_TRG_SET" bitfld.long 0x10 3. "SWI3,Software rising edge event trigger on line 3" "?,1: LINE3_SW_TRG_SET" newline bitfld.long 0x10 2. "SWI2,Software rising edge event trigger on line 2" "?,1: LINE2_SW_TRG_SET" bitfld.long 0x10 1. "SWI1,Software rising edge event trigger on line 1" "?,1: LINE1_SW_TRG_SET" newline bitfld.long 0x10 0. "SWI0,Software rising edge event trigger on line 0" "?,1: LINE0_SW_TRG_SET" line.long 0x14 "PR1,PR1" bitfld.long 0x14 31. "PIF31,Pending interrupt flag on line 31" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 21. "PIF21,Pending interrupt flag on line 21" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 20. "PIF20,Pending interrupt flag on line 20" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 19. "PIF19,Pending interrupt flag on line 19" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 18. "PIF18,Pending interrupt flag on line 18" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 17. "PIF17,Pending interrupt flag on line 17" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 16. "PIF16,Pending interrupt flag on line 16" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 15. "PIF15,Pending interrupt flag on line 15" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 14. "PIF14,Pending interrupt flag on line 14" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 13. "PIF13,Pending interrupt flag on line 13" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 12. "PIF12,Pending interrupt flag on line 12" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 11. "PIF11,Pending interrupt flag on line 11" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 10. "PIF10,Pending interrupt flag on line 10" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 9. "PIF9,Pending interrupt flag on line 9" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 8. "PIF8,Pending interrupt flag on line 8" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 7. "PIF7,Pending interrupt flag on line 7" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 6. "PIF6,Pending interrupt flag on line 6" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 5. "PIF5,Pending interrupt flag on line 5" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 4. "PIF4,Pending interrupt flag on line 4" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 3. "PIF3,Pending interrupt flag on line 3" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 2. "PIF2,Pending interrupt flag on line 2" "0: No trigger request occurred,1: Selected trigger request occurred" bitfld.long 0x14 1. "PIF1,Pending interrupt flag on line 1" "0: No trigger request occurred,1: Selected trigger request occurred" newline bitfld.long 0x14 0. "PIF0,Pending interrupt flag on line 0" "0: No trigger request occurred,1: Selected trigger request occurred" tree.end tree "FMC (Flash Memory Controller)" base ad:0x48002000 group.long 0x0++0x17 line.long 0x0 "ACR,ACR" bitfld.long 0x0 25. "LVCTL,1:FMC low voltage mode(Low power run) enable(1.0v)" "0: FMC ow voltage mode,1: FMC low voltage mode" bitfld.long 0x0 24. "WCLKMODE,1: wclk (IHS) autogate enable" "0: wclk,1: wclk" newline bitfld.long 0x0 16.--17. "WMODE,WCLK (wr clock) clock frequency divider." "0: 8M,1: 4M,2: 2M,3: 1M" bitfld.long 0x0 15. "RCLKMODE,1: flash clock autogating disable" "0: flash clock autogating enable,1: flash clock autogating disable" newline bitfld.long 0x0 14. "SLPPD,Flash Power-down mode during Sleep or Low-power sleep mode." "0: Flash in Idle mode during Sleep and Low-power..,1: Flash in Power-down mode during Sleep and.." bitfld.long 0x0 13. "RUNPD,Flash Power-down mode during Run or Low-power run mode" "0: Flash in Idle mode,1: Flash in Power-down modeNOTE:The flash must not.." newline bitfld.long 0x0 8. "PRFTEN,1: prefetch en" "0: prefetch disable,1: prefetch en" hexmask.long.byte 0x0 0.--4. 1. "RMODE,System clock frequency." line.long 0x4 "PDKEYR,PDKEYR" hexmask.long 0x4 0.--31. 1. "PDKEY,FLASH key register." line.long 0x8 "KEYR,KEYR" hexmask.long 0x8 0.--31. 1. "KEY,FLASH key register. The following val should be set consecutively to" line.long 0xC "OPTKEYR,OPTKEYR" hexmask.long 0xC 0.--31. 1. "OPTKEY,FLASH option byte key register." line.long 0x10 "SR,SR" bitfld.long 0x10 17. "PGINT,1: program interrupt raw status valid" "0: program interrupt raw status unvalid,1: program interrupt raw status valid" rbitfld.long 0x10 16. "BUSY,This indicates that a Flash operation is in progress. This is set on the beginning" "0,1" newline bitfld.long 0x10 15. "OPTVERR,Set by hardware when the options read may not be the one configured by the" "?,1: W1C" bitfld.long 0x10 14. "RDERR,Set by hardware when an address to be read through the C-bus data access belongs to a" "?,1: W1C" newline bitfld.long 0x10 9. "FASTERR,Set by hardware when a fast programming sequence (activated by FSTPG) is" "?,1: W1C" bitfld.long 0x10 8. "MISSERR,In Fast programming mode 32 double words must be sent to flash successively " "?,1: W1C" newline bitfld.long 0x10 7. "PGSERR,Set by hardware when write access to the Flash memory is performed by the" "?,1: W1C" bitfld.long 0x10 6. "SIZERR,Set by hardware when the size of the access is a byte or half-word during a" "?,1: W1C" newline bitfld.long 0x10 5. "PGAERR,Set by hardware when the data to program cannot be contained in the same 64-" "?,1: W1C" bitfld.long 0x10 4. "WRPERR,Set by hardware when an address to be erased/programmed belongs to a write-protected part (by WRP PCROP or RDP level 1) of the Flash memory." "?,1: W1C" newline bitfld.long 0x10 3. "PROGERR,Set by hardware when a double-word address to be programmed contains a" "?,1: W1C" bitfld.long 0x10 1. "OPERR,Set by hardware when a Flash memory operation (program / erase) completes unsuccessfully." "?,1: W1C" newline bitfld.long 0x10 0. "EOP,Set by hardware when one or more Flash memory operations (programming/erase) have been completed successfully." "?,1: W1C" line.long 0x14 "CR,CR" bitfld.long 0x14 31. "LOCK,This bit is set only. When set the FMC_CR register is locked. It is cleared by" "?,1: SET" bitfld.long 0x14 30. "OPTLOCK,This bit is set only. When set all bits concerning user option in FMC_CR" "?,1: SET" newline bitfld.long 0x14 29. "PGIE,1: program interrupt enable" "0: program interrupt disable,1: program interrupt enable" bitfld.long 0x14 28. "DMAEN,1: program by DMA enable" "0: program by DMA disable,1: program by DMA enable" newline bitfld.long 0x14 27. "OBLLAUNCH,When set to 1 this bit forces the option byte reloading. This bit is cleared only" "0: Option byte loading complete,1: Option byte loading requested" bitfld.long 0x14 26. "RDERRIE,This bit enables the interrupt generation when the RDERR bit in the FMC_SR" "0: PCROP read error interrupt disabled,1: PCROP read error interrupt enabled" newline bitfld.long 0x14 25. "ERRIE,This bit enables the interrupt generation when the OPERR bit in the FMC_SR" "0: OPERR error interrupt disabled,1: OPERR error interrupt enabled" bitfld.long 0x14 24. "EOPIE,This bit enables the interrupt generation when the EOP bit in the FMC_SR is" "0: EOP Interrupt disabled,1: EOP Interrupt enabled" newline bitfld.long 0x14 18. "FSTPG,0: Fast programming disabled" "0: Fast programming disabled,1: Fast programming enabled" bitfld.long 0x14 17. "OPTSTRT,This bit triggers an options operation when set." "?,1: SET" newline bitfld.long 0x14 16. "STRT,This bit triggers an erase operation when set. If MER1 MER2 and SER bits are" "?,1: SET" bitfld.long 0x14 15. "MER1,This bit triggers the bank 1 mass erase (all bank 1 user sectors) when set." "0: DISABLE,1: ENABLE" newline bitfld.long 0x14 14. "NVR,bank1 nvr sector erase enable.Only used for redundancy" "0: DISABLE,1: ENABLE" bitfld.long 0x14 11. "BKER,Bank erase" "0: bank 0 is selected for sector erase,1: bank 1 is selected for sector erase" newline hexmask.long.byte 0x14 3.--10. 1. "SNB,sector number" bitfld.long 0x14 2. "MER0,bank 0 Mass erase" "0: DISABLE,1: ENABLE" newline bitfld.long 0x14 1. "SER,sector erase" "0: sector erase disabled,1: sector erase enabled" bitfld.long 0x14 0. "PG,Programming" "0: Flash programming disabled,1: Flash programming enabled" wgroup.long 0x18++0x3 line.long 0x0 "PESR,PESR" bitfld.long 0x0 0. "FERFLAG,1: when mass erase is done once this bit will be auto set 1 by HW. Once assert 1 only if all the fast program work is done(SW decide) then SW can clear this bit by write 1 on this bit." "0: default val and no mass erase been done ever,1: when mass erase is done once" group.long 0x20++0x13 line.long 0x0 "OPTR,OPTR" bitfld.long 0x0 31. "IHSGATEDIS,0: gate IHS clock when trim his (default)" "0: gate IHS clock when trim his,1: not gate IHS when trim his" bitfld.long 0x0 28.--29. "NRSTMODE,00: Reserved" "0: Reserved,1: Reset input only,?,?" newline bitfld.long 0x0 27. "NBOOT0,NBOOT0 option bit" "0: NBOOT0 = 0,1: NBOOT0 = 1" bitfld.long 0x0 26. "NSWBOOT0,Software BOOT0" "0: BOOT0 taken from the option bit NBOOT0,1: BOOT0 taken from PB8/BOOT0 pin" newline bitfld.long 0x0 23. "NBOOT1,Boot configuration" "0,1" bitfld.long 0x0 22. "DBANK,0: Single bank mode with 128 bits data read width" "0: Single bank mode with 128 bits data read width,1: Dual bank mode with 64 bits of data" newline bitfld.long 0x0 20. "SWAPBANK,DBANK is 1:" "0: This bit no used,1: boot from bank1" bitfld.long 0x0 19. "WWDGSW,Window watchdog selection" "0: Hardware window watchdog,1: Software window watchdog" newline bitfld.long 0x0 18. "IWDGSTDBY,Independent watchdog counter freeze in Standby mode" "0: Independent watchdog counter is running in..,1: Independent watchdog counter is frozen in.." bitfld.long 0x0 17. "IWDGSTOP,Independent watchdog counter freeze in Stop mode" "0: Independent watchdog counter is running in Stop..,1: Independent watchdog counter is frozen in Stop.." newline bitfld.long 0x0 16. "IWDGSW,Independent watchdog selection" "0: Hardware independent watchdog,1: Software independent watchdog" bitfld.long 0x0 15. "NRSTLVL,0: NRST as system reset (default)" "0: NRST as system reset,1: NRST as por reset" newline bitfld.long 0x0 14. "NRSTSHDW,1: Reset generated when entering the Shutdown mode" "0: No reset generated when entering the Shutdown mode,1: Reset generated when entering the Shutdown mode" bitfld.long 0x0 13. "NRSTSTDBY,1: Reset generated when entering the Standby mode" "0: No reset generated when entering the Standby mode,1: Reset generated when entering the Standby mode" newline bitfld.long 0x0 12. "NRSTSTOP,1: Reset generated when entering the Stop mode" "0: No reset generated when entering the Stop mode,1: Reset generated when entering the Stop mode" bitfld.long 0x0 8.--10. "BORLEV,These bits contain the VDD supply level threshold that activates/releases the" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--7. 1. "RDP,0xAA: Level 0 read protection not active" line.long 0x4 "PCROP1SR,PCROP1SR" hexmask.long.tbyte 0x4 0.--16. 1. "PCROP1STRT,PCROP area start offset" line.long 0x8 "PCROP1ER,PCROP1ER" bitfld.long 0x8 31. "PCROPRDP,PCROP area preserved when RDP level decreased" "0: PCROP area is not erased when the RDP level is..,1: PCROP area is erased when the RDP level is.." hexmask.long.tbyte 0x8 0.--16. 1. "PCROP1END,bank 0 PCROP area end offset" line.long 0xC "WRP1AR,WRP1AR" hexmask.long.byte 0xC 16.--23. 1. "WRP1AEND,WRP first area 'A' end offset" hexmask.long.byte 0xC 0.--7. 1. "WRP1ASTRT,WRP first area 'A' start offset" line.long 0x10 "WRP1BR,WRP1BR" hexmask.long.byte 0x10 16.--23. 1. "WRP1BEND,WRP second area 'B' end offset" hexmask.long.byte 0x10 0.--7. 1. "WRP1BSTRT,WRP second area 'B' start offset" group.long 0x44++0xF line.long 0x0 "PCROP2SR,PCROP2SR" hexmask.long.tbyte 0x0 0.--16. 1. "PCROP2STRT,PCROP area start offset" line.long 0x4 "PCROP2ER,PCROP2ER" hexmask.long.tbyte 0x4 0.--16. 1. "PCROP2END,PCROP area end offset" line.long 0x8 "WRP2AR,WRP2AR" hexmask.long.byte 0x8 16.--23. 1. "WRP2AEND,WRP first area 'A' end offset" hexmask.long.byte 0x8 0.--7. 1. "WRP2ASTRT,WRP first area 'A' start offset" line.long 0xC "WRP2BR,WRP2BR" hexmask.long.byte 0xC 16.--23. 1. "WRP2BEND,WRP second area 'B' end offset" hexmask.long.byte 0xC 0.--7. 1. "WRP2BSTRT,WRP second area 'B' start offset" group.long 0x70++0x3 line.long 0x0 "BOOTR,BOOTR" bitfld.long 0x0 16. "BOOTLOCK,It is used to force boot from the user Flash area." "0: Boot based on the pad/option bit configuration,1: Boot forced from Main Flash memory" tree.end tree "GPIO (General-Purpose I/Os)" base ad:0x0 tree "GPIOA" base ad:0x40020000 group.long 0x0++0x13 line.long 0x0 "MODER,MODER" bitfld.long 0x0 30.--31. "MODE15,Port15 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT15_AF_MODE,3: PORT15_ANALOG_MODE" bitfld.long 0x0 28.--29. "MODE14,Port14 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT14_AF_MODE,3: PORT14_ANALOG_MODE" newline bitfld.long 0x0 26.--27. "MODE13,Port13 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT13_AF_MODE,3: PORT13_ANALOG_MODE" bitfld.long 0x0 24.--25. "MODE12,Port12 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT12_AF_MODE,3: PORT12_ANALOG_MODE" newline bitfld.long 0x0 22.--23. "MODE11,Port11 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT11_AF_MODE,3: PORT11_ANALOG_MODE" bitfld.long 0x0 20.--21. "MODE10,Port10 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT10_AF_MODE,3: PORT10_ANALOG_MODE" newline bitfld.long 0x0 18.--19. "MODE9,Port9 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT9_AF_MODE,3: PORT9_ANALOG_MODE" bitfld.long 0x0 16.--17. "MODE8,Port8 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT8_AF_MODE,3: PORT8_ANALOG_MODE" newline bitfld.long 0x0 14.--15. "MODE7,Port7 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT7_AF_MODE,3: PORT7_ANALOG_MODE" bitfld.long 0x0 12.--13. "MODE6,Port6 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT6_AF_MODE,3: PORT6_ANALOG_MODE" newline bitfld.long 0x0 10.--11. "MODE5,Port5 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT5_AF_MODE,3: PORT5_ANALOG_MODE" bitfld.long 0x0 8.--9. "MODE4,Port4 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT4_AF_MODE,3: PORT4_ANALOG_MODE" newline bitfld.long 0x0 6.--7. "MODE3,Port3 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT3_AF_MODE,3: PORT3_ANALOG_MODE" bitfld.long 0x0 4.--5. "MODE2,Port2 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT2_AF_MODE,3: PORT2_ANALOG_MODE" newline bitfld.long 0x0 2.--3. "MODE1,Port1 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT1_AF_MODE,3: PORT1_ANALOG_MODE" bitfld.long 0x0 0.--1. "MODE0,Port0 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT0_AF_MODE,3: PORT0_ANALOG_MODE" line.long 0x4 "OTYPER,OTYPER" bitfld.long 0x4 15. "OT15,Port15 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 14. "OT14,Port14 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 13. "OT13,Port13 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 12. "OT12,Port12 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 11. "OT11,Port11 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 10. "OT10,Port10 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 9. "OT9,Port9 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 8. "OT8,Port8 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 7. "OT7,Port7 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 6. "OT6,Port6 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 5. "OT5,Port5 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 4. "OT4,Port4 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 3. "OT3,Port3 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 2. "OT2,Port2 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 1. "OT1,Port1 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 0. "OT0,Port0 input data type:" "0: Output push-pull,1: Output open-drain" line.long 0x8 "OSPEEDR,OSPEEDR" bitfld.long 0x8 30.--31. "OSPEED15,Port15 output speed:" "0: 24MHz,1: 48MHz,2: PORT15_96MHZ,3: PORT15_120MHZ" bitfld.long 0x8 28.--29. "OSPEED14,Port14 output speed:" "0: 24MHz,1: 48MHz,2: PORT14_96MHZ,3: PORT14_120MHZ" newline bitfld.long 0x8 26.--27. "OSPEED13,Port13 output speed:" "0: 24MHz,1: 48MHz,2: PORT13_96MHZ,3: PORT13_120MHZ" bitfld.long 0x8 24.--25. "OSPEED12,Port12 output speed:" "0: 24MHz,1: 48MHz,2: PORT12_96MHZ,3: PORT12_120MHZ" newline bitfld.long 0x8 22.--23. "OSPEED11,Port11 output speed:" "0: 24MHz,1: 48MHz,2: PORT11_96MHZ,3: PORT11_120MHZ" bitfld.long 0x8 20.--21. "OSPEED10,Port10 output speed:" "0: 24MHz,1: 48MHz,2: PORT10_96MHZ,3: PORT10_120MHZ" newline bitfld.long 0x8 18.--19. "OSPEED9,Port9 output speed:" "0: 24MHz,1: 48MHz,2: PORT9_96MHZ,3: PORT9_120MHZ" bitfld.long 0x8 16.--17. "OSPEED8,Port8 output speed:" "0: 24MHz,1: 48MHz,2: PORT8_96MHZ,3: PORT8_120MHZ" newline bitfld.long 0x8 14.--15. "OSPEED7,Port7 output speed:" "0: 24MHz,1: 48MHz,2: PORT7_96MHZ,3: PORT7_120MHZ" bitfld.long 0x8 12.--13. "OSPEED6,Port6 output speed:" "0: 24MHz,1: 48MHz,2: PORT6_96MHZ,3: PORT6_120MHZ" newline bitfld.long 0x8 10.--11. "OSPEED5,Port5 output speed:" "0: 24MHz,1: 48MHz,2: PORT5_96MHZ,3: PORT5_120MHZ" bitfld.long 0x8 8.--9. "OSPEED4,Port4 output speed:" "0: 24MHz,1: 48MHz,2: PORT4_96MHZ,3: PORT4_120MHZ" newline bitfld.long 0x8 6.--7. "OSPEED3,Port3 output speed:" "0: 24MHz,1: 48MHz,2: PORT3_96MHZ,3: PORT3_120MHZ" bitfld.long 0x8 4.--5. "OSPEED2,Port2 output speed:" "0: 24MHz,1: 48MHz,2: PORT2_96MHZ,3: PORT2_120MHZ" newline bitfld.long 0x8 2.--3. "OSPEED1,Port1 output speed:" "0: 24MHz,1: 48MHz,2: PORT1_96MHZ,3: PORT1_120MHZ" bitfld.long 0x8 0.--1. "OSPEED0,Port0 output speed:" "0: 24MHz,1: 48MHz,2: PORT0_96MHZ,3: PORT0_120MHZ" line.long 0xC "PUPDR,PUPDR" bitfld.long 0xC 30.--31. "PUPD15,Port15 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT15_PD,?" bitfld.long 0xC 28.--29. "PUPD14,Port14 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT14_PD,?" newline bitfld.long 0xC 26.--27. "PUPD13,Port13 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT13_PD,?" bitfld.long 0xC 24.--25. "PUPD12,Port12 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT12_PD,?" newline bitfld.long 0xC 22.--23. "PUPD11,Port11 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT11_PD,?" bitfld.long 0xC 20.--21. "PUPD10,Port10 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT10_PD,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port9 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT9_PD,?" bitfld.long 0xC 16.--17. "PUPD8,Port8 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT8_PD,?" newline bitfld.long 0xC 14.--15. "PUPD7,Port7 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT7_PD,?" bitfld.long 0xC 12.--13. "PUPD6,Port6 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT6_PD,?" newline bitfld.long 0xC 10.--11. "PUPD5,Port5 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT5_PD,?" bitfld.long 0xC 8.--9. "PUPD4,Port4 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT4_PD,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port3 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT3_PD,?" bitfld.long 0xC 4.--5. "PUPD2,Port2 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT2_PD,?" newline bitfld.long 0xC 2.--3. "PUPD1,Port1 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT1_PD,?" bitfld.long 0xC 0.--1. "PUPD0,Port0 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT0_PD,?" line.long 0x10 "DRR,DRR" bitfld.long 0x10 15. "DR15,Port15 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 14. "DR14,Port14 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 13. "DR13,Port13 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 12. "DR12,Port12 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 11. "DR11,Port11 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 10. "DR10,Port10 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 9. "DR9,Port9 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 8. "DR8,Port8 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 7. "DR7,Port7 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 6. "DR6,Port6 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 5. "DR5,Port5 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 4. "DR4,Port4 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 3. "DR3,Port3 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 2. "DR2,Port2 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 1. "DR1,Port1 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 0. "DR0,Port0 driving strength control:" "0: 10mA,1: 20mA" rgroup.long 0x14++0x3 line.long 0x0 "IDR,IDR" bitfld.long 0x0 15. "IDR15,Port15 input data" "0,1" bitfld.long 0x0 14. "IDR14,Port14 input data" "0,1" newline bitfld.long 0x0 13. "IDR13,Port13 input data" "0,1" bitfld.long 0x0 12. "IDR12,Port12 input data" "0,1" newline bitfld.long 0x0 11. "IDR11,Port11 input data" "0,1" bitfld.long 0x0 10. "IDR10,Port10 input data" "0,1" newline bitfld.long 0x0 9. "IDR9,Port9 input data" "0,1" bitfld.long 0x0 8. "IDR8,Port8 input data" "0,1" newline bitfld.long 0x0 7. "IDR7,Port7 input data" "0,1" bitfld.long 0x0 6. "IDR6,Port6 input data" "0,1" newline bitfld.long 0x0 5. "IDR5,Port5 input data" "0,1" bitfld.long 0x0 4. "IDR4,Port4 input data" "0,1" newline bitfld.long 0x0 3. "IDR3,Port3 input data" "0,1" bitfld.long 0x0 2. "IDR2,Port2 input data" "0,1" newline bitfld.long 0x0 1. "IDR1,Port1 input data" "0,1" bitfld.long 0x0 0. "IDR0,Port0 input data" "0,1" group.long 0x18++0x3 line.long 0x0 "ODR,ODR" bitfld.long 0x0 15. "ODR15,Port15 output data" "0: PORT15_OUTPUT_LOW,1: PORT15_OUTPUT_HIGH" bitfld.long 0x0 14. "ODR14,Port14 output data" "0: PORT14_OUTPUT_LOW,1: PORT14_OUTPUT_HIGH" newline bitfld.long 0x0 13. "ODR13,Port13 output data" "0: PORT13_OUTPUT_LOW,1: PORT13_OUTPUT_HIGH" bitfld.long 0x0 12. "ODR12,Port12 output data" "0: PORT12_OUTPUT_LOW,1: PORT12_OUTPUT_HIGH" newline bitfld.long 0x0 11. "ODR11,Port11 output data" "0: PORT11_OUTPUT_LOW,1: PORT11_OUTPUT_HIGH" bitfld.long 0x0 10. "ODR10,Port10 output data" "0: PORT10_OUTPUT_LOW,1: PORT10_OUTPUT_HIGH" newline bitfld.long 0x0 9. "ODR9,Port9 output data" "0: PORT9_OUTPUT_LOW,1: PORT9_OUTPUT_HIGH" bitfld.long 0x0 8. "ODR8,Port8 output data" "0: PORT8_OUTPUT_LOW,1: PORT8_OUTPUT_HIGH" newline bitfld.long 0x0 7. "ODR7,Port7 output data" "0: PORT7_OUTPUT_LOW,1: PORT7_OUTPUT_HIGH" bitfld.long 0x0 6. "ODR6,Port6 output data" "0: PORT6_OUTPUT_LOW,1: PORT6_OUTPUT_HIGH" newline bitfld.long 0x0 5. "ODR5,Port5 output data" "0: PORT5_OUTPUT_LOW,1: PORT5_OUTPUT_HIGH" bitfld.long 0x0 4. "ODR4,Port4 output data" "0: PORT4_OUTPUT_LOW,1: PORT4_OUTPUT_HIGH" newline bitfld.long 0x0 3. "ODR3,Port3 output data" "0: PORT3_OUTPUT_LOW,1: PORT3_OUTPUT_HIGH" bitfld.long 0x0 2. "ODR2,Port2 output data" "0: PORT2_OUTPUT_LOW,1: PORT2_OUTPUT_HIGH" newline bitfld.long 0x0 1. "ODR1,Port1 output data" "0: PORT1_OUTPUT_LOW,1: PORT1_OUTPUT_HIGH" bitfld.long 0x0 0. "ODR0,Port0 output data" "0: PORT0_OUTPUT_LOW,1: PORT0_OUTPUT_HIGH" wgroup.long 0x1C++0x3 line.long 0x0 "BSRR,BSRR" bitfld.long 0x0 31. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 30. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 29. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 28. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 27. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 26. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 25. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 24. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 23. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 22. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 21. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 20. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 19. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 18. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 17. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 16. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 15. "BS15,Port15 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 14. "BS14,Port14 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 13. "BS13,Port13 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 12. "BS12,Port12 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 11. "BS11,Port11 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 10. "BS10,Port10 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 9. "BS9,Port9 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 8. "BS8,Port8 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 7. "BS7,Port7 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 6. "BS6,Port6 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 5. "BS5,Port5 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 4. "BS4,Port4 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 3. "BS3,Port3 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 2. "BS2,Port2 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 1. "BS1,Port1 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 0. "BS0,Port0 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" group.long 0x20++0xB line.long 0x0 "LCKR,LCKR" bitfld.long 0x0 16. "LCKK,Lock key:" "0: port configuration lock key not active,1: port configuration lock key active" bitfld.long 0x0 15. "LCK15,Port15 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 14. "LCK14,Port14 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 13. "LCK13,Port13 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 12. "LCK12,Port12 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 11. "LCK11,Port11 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 10. "LCK10,Port10 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 9. "LCK9,Port9 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 8. "LCK8,Port8 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 7. "LCK7,Port7 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 6. "LCK6,Port6 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 5. "LCK5,Port5 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 4. "LCK4,Port4 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 3. "LCK3,Port3 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 2. "LCK2,Port2 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 1. "LCK1,Port1 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 0. "LCK0,Port0 lock bit:" "0: port configuration not locked,1: port configuration locked" line.long 0x4 "AFRL,AFRL" hexmask.long.byte 0x4 28.--31. 1. "AF7,Alternate function selection for port 7 pin" hexmask.long.byte 0x4 24.--27. 1. "AF6,Alternate function selection for port 6 pin" newline hexmask.long.byte 0x4 20.--23. 1. "AF5,Alternate function selection for port 5 pin" hexmask.long.byte 0x4 16.--19. 1. "AF4,Alternate function selection for port 4 pin" newline hexmask.long.byte 0x4 12.--15. 1. "AF3,Alternate function selection for port 3 pin" hexmask.long.byte 0x4 8.--11. 1. "AF2,Alternate function selection for port 2 pin" newline hexmask.long.byte 0x4 4.--7. 1. "AF1,Alternate function selection for port 1 pin" hexmask.long.byte 0x4 0.--3. 1. "AF0,Alternate function selection for port 0 pin" line.long 0x8 "AFRH,AFRH" hexmask.long.byte 0x8 28.--31. 1. "AF15,Alternate function selection for port 15 pin" hexmask.long.byte 0x8 24.--27. 1. "AF14,Alternate function selection for port 14 pin" newline hexmask.long.byte 0x8 20.--23. 1. "AF13,Alternate function selection for port 13 pin" hexmask.long.byte 0x8 16.--19. 1. "AF12,Alternate function selection for port 12 pin" newline hexmask.long.byte 0x8 12.--15. 1. "AF11,Alternate function selection for port 11 pin" hexmask.long.byte 0x8 8.--11. 1. "AF10,Alternate function selection for port 10 pin" newline hexmask.long.byte 0x8 4.--7. 1. "AF9,Alternate function selection for port 9 pin" hexmask.long.byte 0x8 0.--3. 1. "AF8,Alternate function selection for port 8 pin" wgroup.long 0x2C++0x3 line.long 0x0 "BRR,BRR" bitfld.long 0x0 15. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 14. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 13. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 12. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 11. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 10. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 9. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 8. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 7. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 6. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 5. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 4. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 3. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 2. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 1. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 0. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" group.long 0x30++0xB line.long 0x0 "DFR,DFR" bitfld.long 0x0 15. "DF15,Port15 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 14. "DF14,Port14 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 13. "DF13,Port13 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 12. "DF12,Port12 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 11. "DF11,Port11 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 10. "DF10,Port10 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 9. "DF9,Port9 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 8. "DF8,Port8 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 7. "DF7,Port7 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 6. "DF6,Port6 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 5. "DF5,Port5 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 4. "DF4,Port4 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 3. "DF3,Port3 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 2. "DF2,Port2 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 1. "DF1,Port1 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 0. "DF0,Port0 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" line.long 0x4 "ASR,ASR" bitfld.long 0x4 15. "AS15,Port15 analog switch" "0: disable,1: enable" bitfld.long 0x4 14. "AS14,Port14 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 13. "AS13,Port13 analog switch" "0: disable,1: enable" bitfld.long 0x4 12. "AS12,Port12 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 11. "AS11,Port11 analog switch" "0: disable,1: enable" bitfld.long 0x4 10. "AS10,Port10 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 9. "AS9,Port9 analog switch" "0: disable,1: enable" bitfld.long 0x4 8. "AS8,Port8 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 7. "AS7,Port7 analog switch" "0: disable,1: enable" bitfld.long 0x4 6. "AS6,Port6 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 5. "AS5,Port5 analog switch" "0: disable,1: enable" bitfld.long 0x4 4. "AS4,Port4 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 3. "AS3,Port3 analog switch" "0: disable,1: enable" bitfld.long 0x4 2. "AS2,Port2 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 1. "AS1,Port1 analog switch" "0: disable,1: enable" bitfld.long 0x4 0. "AS0,Port0 analog switch" "0: disable,1: enable" line.long 0x8 "CSR,CSR" bitfld.long 0x8 15. "CS15,Port15 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 14. "CS14,Port14 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 13. "CS13,Port13 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 12. "CS12,Port12 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 11. "CS11,Port11 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 10. "CS10,Port10 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 9. "CS9,Port9 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 8. "CS8,Port8 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 7. "CS7,Port7 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 6. "CS6,Port6 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 5. "CS5,Port5 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 4. "CS4,Port4 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 3. "CS3,Port3 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 2. "CS2,Port2 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 1. "CS1,Port1 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 0. "CS0,Port0 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" tree.end tree "GPIOB" base ad:0x40020400 group.long 0x0++0x13 line.long 0x0 "MODER,MODER" bitfld.long 0x0 30.--31. "MODE15,Port15 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT15_AF_MODE,3: PORT15_ANALOG_MODE" bitfld.long 0x0 28.--29. "MODE14,Port14 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT14_AF_MODE,3: PORT14_ANALOG_MODE" newline bitfld.long 0x0 26.--27. "MODE13,Port13 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT13_AF_MODE,3: PORT13_ANALOG_MODE" bitfld.long 0x0 24.--25. "MODE12,Port12 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT12_AF_MODE,3: PORT12_ANALOG_MODE" newline bitfld.long 0x0 22.--23. "MODE11,Port11 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT11_AF_MODE,3: PORT11_ANALOG_MODE" bitfld.long 0x0 20.--21. "MODE10,Port10 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT10_AF_MODE,3: PORT10_ANALOG_MODE" newline bitfld.long 0x0 18.--19. "MODE9,Port9 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT9_AF_MODE,3: PORT9_ANALOG_MODE" bitfld.long 0x0 16.--17. "MODE8,Port8 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT8_AF_MODE,3: PORT8_ANALOG_MODE" newline bitfld.long 0x0 14.--15. "MODE7,Port7 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT7_AF_MODE,3: PORT7_ANALOG_MODE" bitfld.long 0x0 12.--13. "MODE6,Port6 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT6_AF_MODE,3: PORT6_ANALOG_MODE" newline bitfld.long 0x0 10.--11. "MODE5,Port5 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT5_AF_MODE,3: PORT5_ANALOG_MODE" bitfld.long 0x0 8.--9. "MODE4,Port4 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT4_AF_MODE,3: PORT4_ANALOG_MODE" newline bitfld.long 0x0 6.--7. "MODE3,Port3 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT3_AF_MODE,3: PORT3_ANALOG_MODE" bitfld.long 0x0 4.--5. "MODE2,Port2 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT2_AF_MODE,3: PORT2_ANALOG_MODE" newline bitfld.long 0x0 2.--3. "MODE1,Port1 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT1_AF_MODE,3: PORT1_ANALOG_MODE" bitfld.long 0x0 0.--1. "MODE0,Port0 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT0_AF_MODE,3: PORT0_ANALOG_MODE" line.long 0x4 "OTYPER,OTYPER" bitfld.long 0x4 15. "OT15,Port15 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 14. "OT14,Port14 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 13. "OT13,Port13 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 12. "OT12,Port12 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 11. "OT11,Port11 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 10. "OT10,Port10 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 9. "OT9,Port9 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 8. "OT8,Port8 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 7. "OT7,Port7 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 6. "OT6,Port6 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 5. "OT5,Port5 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 4. "OT4,Port4 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 3. "OT3,Port3 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 2. "OT2,Port2 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 1. "OT1,Port1 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 0. "OT0,Port0 input data type:" "0: Output push-pull,1: Output open-drain" line.long 0x8 "OSPEEDR,OSPEEDR" bitfld.long 0x8 30.--31. "OSPEED15,Port15 output speed:" "0: 24MHz,1: 48MHz,2: PORT15_96MHZ,3: PORT15_120MHZ" bitfld.long 0x8 28.--29. "OSPEED14,Port14 output speed:" "0: 24MHz,1: 48MHz,2: PORT14_96MHZ,3: PORT14_120MHZ" newline bitfld.long 0x8 26.--27. "OSPEED13,Port13 output speed:" "0: 24MHz,1: 48MHz,2: PORT13_96MHZ,3: PORT13_120MHZ" bitfld.long 0x8 24.--25. "OSPEED12,Port12 output speed:" "0: 24MHz,1: 48MHz,2: PORT12_96MHZ,3: PORT12_120MHZ" newline bitfld.long 0x8 22.--23. "OSPEED11,Port11 output speed:" "0: 24MHz,1: 48MHz,2: PORT11_96MHZ,3: PORT11_120MHZ" bitfld.long 0x8 20.--21. "OSPEED10,Port10 output speed:" "0: 24MHz,1: 48MHz,2: PORT10_96MHZ,3: PORT10_120MHZ" newline bitfld.long 0x8 18.--19. "OSPEED9,Port9 output speed:" "0: 24MHz,1: 48MHz,2: PORT9_96MHZ,3: PORT9_120MHZ" bitfld.long 0x8 16.--17. "OSPEED8,Port8 output speed:" "0: 24MHz,1: 48MHz,2: PORT8_96MHZ,3: PORT8_120MHZ" newline bitfld.long 0x8 14.--15. "OSPEED7,Port7 output speed:" "0: 24MHz,1: 48MHz,2: PORT7_96MHZ,3: PORT7_120MHZ" bitfld.long 0x8 12.--13. "OSPEED6,Port6 output speed:" "0: 24MHz,1: 48MHz,2: PORT6_96MHZ,3: PORT6_120MHZ" newline bitfld.long 0x8 10.--11. "OSPEED5,Port5 output speed:" "0: 24MHz,1: 48MHz,2: PORT5_96MHZ,3: PORT5_120MHZ" bitfld.long 0x8 8.--9. "OSPEED4,Port4 output speed:" "0: 24MHz,1: 48MHz,2: PORT4_96MHZ,3: PORT4_120MHZ" newline bitfld.long 0x8 6.--7. "OSPEED3,Port3 output speed:" "0: 24MHz,1: 48MHz,2: PORT3_96MHZ,3: PORT3_120MHZ" bitfld.long 0x8 4.--5. "OSPEED2,Port2 output speed:" "0: 24MHz,1: 48MHz,2: PORT2_96MHZ,3: PORT2_120MHZ" newline bitfld.long 0x8 2.--3. "OSPEED1,Port1 output speed:" "0: 24MHz,1: 48MHz,2: PORT1_96MHZ,3: PORT1_120MHZ" bitfld.long 0x8 0.--1. "OSPEED0,Port0 output speed:" "0: 24MHz,1: 48MHz,2: PORT0_96MHZ,3: PORT0_120MHZ" line.long 0xC "PUPDR,PUPDR" bitfld.long 0xC 30.--31. "PUPD15,Port15 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT15_PD,?" bitfld.long 0xC 28.--29. "PUPD14,Port14 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT14_PD,?" newline bitfld.long 0xC 26.--27. "PUPD13,Port13 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT13_PD,?" bitfld.long 0xC 24.--25. "PUPD12,Port12 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT12_PD,?" newline bitfld.long 0xC 22.--23. "PUPD11,Port11 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT11_PD,?" bitfld.long 0xC 20.--21. "PUPD10,Port10 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT10_PD,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port9 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT9_PD,?" bitfld.long 0xC 16.--17. "PUPD8,Port8 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT8_PD,?" newline bitfld.long 0xC 14.--15. "PUPD7,Port7 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT7_PD,?" bitfld.long 0xC 12.--13. "PUPD6,Port6 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT6_PD,?" newline bitfld.long 0xC 10.--11. "PUPD5,Port5 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT5_PD,?" bitfld.long 0xC 8.--9. "PUPD4,Port4 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT4_PD,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port3 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT3_PD,?" bitfld.long 0xC 4.--5. "PUPD2,Port2 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT2_PD,?" newline bitfld.long 0xC 2.--3. "PUPD1,Port1 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT1_PD,?" bitfld.long 0xC 0.--1. "PUPD0,Port0 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT0_PD,?" line.long 0x10 "DRR,DRR" bitfld.long 0x10 15. "DR15,Port15 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 14. "DR14,Port14 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 13. "DR13,Port13 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 12. "DR12,Port12 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 11. "DR11,Port11 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 10. "DR10,Port10 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 9. "DR9,Port9 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 8. "DR8,Port8 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 7. "DR7,Port7 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 6. "DR6,Port6 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 5. "DR5,Port5 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 4. "DR4,Port4 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 3. "DR3,Port3 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 2. "DR2,Port2 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 1. "DR1,Port1 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 0. "DR0,Port0 driving strength control:" "0: 10mA,1: 20mA" rgroup.long 0x14++0x3 line.long 0x0 "IDR,IDR" bitfld.long 0x0 15. "IDR15,Port15 input data" "0,1" bitfld.long 0x0 14. "IDR14,Port14 input data" "0,1" newline bitfld.long 0x0 13. "IDR13,Port13 input data" "0,1" bitfld.long 0x0 12. "IDR12,Port12 input data" "0,1" newline bitfld.long 0x0 11. "IDR11,Port11 input data" "0,1" bitfld.long 0x0 10. "IDR10,Port10 input data" "0,1" newline bitfld.long 0x0 9. "IDR9,Port9 input data" "0,1" bitfld.long 0x0 8. "IDR8,Port8 input data" "0,1" newline bitfld.long 0x0 7. "IDR7,Port7 input data" "0,1" bitfld.long 0x0 6. "IDR6,Port6 input data" "0,1" newline bitfld.long 0x0 5. "IDR5,Port5 input data" "0,1" bitfld.long 0x0 4. "IDR4,Port4 input data" "0,1" newline bitfld.long 0x0 3. "IDR3,Port3 input data" "0,1" bitfld.long 0x0 2. "IDR2,Port2 input data" "0,1" newline bitfld.long 0x0 1. "IDR1,Port1 input data" "0,1" bitfld.long 0x0 0. "IDR0,Port0 input data" "0,1" group.long 0x18++0x3 line.long 0x0 "ODR,ODR" bitfld.long 0x0 15. "ODR15,Port15 output data" "0: PORT15_OUTPUT_LOW,1: PORT15_OUTPUT_HIGH" bitfld.long 0x0 14. "ODR14,Port14 output data" "0: PORT14_OUTPUT_LOW,1: PORT14_OUTPUT_HIGH" newline bitfld.long 0x0 13. "ODR13,Port13 output data" "0: PORT13_OUTPUT_LOW,1: PORT13_OUTPUT_HIGH" bitfld.long 0x0 12. "ODR12,Port12 output data" "0: PORT12_OUTPUT_LOW,1: PORT12_OUTPUT_HIGH" newline bitfld.long 0x0 11. "ODR11,Port11 output data" "0: PORT11_OUTPUT_LOW,1: PORT11_OUTPUT_HIGH" bitfld.long 0x0 10. "ODR10,Port10 output data" "0: PORT10_OUTPUT_LOW,1: PORT10_OUTPUT_HIGH" newline bitfld.long 0x0 9. "ODR9,Port9 output data" "0: PORT9_OUTPUT_LOW,1: PORT9_OUTPUT_HIGH" bitfld.long 0x0 8. "ODR8,Port8 output data" "0: PORT8_OUTPUT_LOW,1: PORT8_OUTPUT_HIGH" newline bitfld.long 0x0 7. "ODR7,Port7 output data" "0: PORT7_OUTPUT_LOW,1: PORT7_OUTPUT_HIGH" bitfld.long 0x0 6. "ODR6,Port6 output data" "0: PORT6_OUTPUT_LOW,1: PORT6_OUTPUT_HIGH" newline bitfld.long 0x0 5. "ODR5,Port5 output data" "0: PORT5_OUTPUT_LOW,1: PORT5_OUTPUT_HIGH" bitfld.long 0x0 4. "ODR4,Port4 output data" "0: PORT4_OUTPUT_LOW,1: PORT4_OUTPUT_HIGH" newline bitfld.long 0x0 3. "ODR3,Port3 output data" "0: PORT3_OUTPUT_LOW,1: PORT3_OUTPUT_HIGH" bitfld.long 0x0 2. "ODR2,Port2 output data" "0: PORT2_OUTPUT_LOW,1: PORT2_OUTPUT_HIGH" newline bitfld.long 0x0 1. "ODR1,Port1 output data" "0: PORT1_OUTPUT_LOW,1: PORT1_OUTPUT_HIGH" bitfld.long 0x0 0. "ODR0,Port0 output data" "0: PORT0_OUTPUT_LOW,1: PORT0_OUTPUT_HIGH" wgroup.long 0x1C++0x3 line.long 0x0 "BSRR,BSRR" bitfld.long 0x0 31. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 30. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 29. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 28. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 27. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 26. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 25. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 24. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 23. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 22. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 21. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 20. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 19. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 18. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 17. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 16. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 15. "BS15,Port15 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 14. "BS14,Port14 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 13. "BS13,Port13 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 12. "BS12,Port12 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 11. "BS11,Port11 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 10. "BS10,Port10 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 9. "BS9,Port9 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 8. "BS8,Port8 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 7. "BS7,Port7 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 6. "BS6,Port6 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 5. "BS5,Port5 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 4. "BS4,Port4 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 3. "BS3,Port3 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 2. "BS2,Port2 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 1. "BS1,Port1 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 0. "BS0,Port0 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" group.long 0x20++0xB line.long 0x0 "LCKR,LCKR" bitfld.long 0x0 16. "LCKK,Lock key:" "0: port configuration lock key not active,1: port configuration lock key active" bitfld.long 0x0 15. "LCK15,Port15 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 14. "LCK14,Port14 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 13. "LCK13,Port13 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 12. "LCK12,Port12 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 11. "LCK11,Port11 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 10. "LCK10,Port10 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 9. "LCK9,Port9 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 8. "LCK8,Port8 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 7. "LCK7,Port7 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 6. "LCK6,Port6 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 5. "LCK5,Port5 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 4. "LCK4,Port4 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 3. "LCK3,Port3 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 2. "LCK2,Port2 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 1. "LCK1,Port1 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 0. "LCK0,Port0 lock bit:" "0: port configuration not locked,1: port configuration locked" line.long 0x4 "AFRL,AFRL" hexmask.long.byte 0x4 28.--31. 1. "AF7,Alternate function selection for port 7 pin" hexmask.long.byte 0x4 24.--27. 1. "AF6,Alternate function selection for port 6 pin" newline hexmask.long.byte 0x4 20.--23. 1. "AF5,Alternate function selection for port 5 pin" hexmask.long.byte 0x4 16.--19. 1. "AF4,Alternate function selection for port 4 pin" newline hexmask.long.byte 0x4 12.--15. 1. "AF3,Alternate function selection for port 3 pin" hexmask.long.byte 0x4 8.--11. 1. "AF2,Alternate function selection for port 2 pin" newline hexmask.long.byte 0x4 4.--7. 1. "AF1,Alternate function selection for port 1 pin" hexmask.long.byte 0x4 0.--3. 1. "AF0,Alternate function selection for port 0 pin" line.long 0x8 "AFRH,AFRH" hexmask.long.byte 0x8 28.--31. 1. "AF15,Alternate function selection for port 15 pin" hexmask.long.byte 0x8 24.--27. 1. "AF14,Alternate function selection for port 14 pin" newline hexmask.long.byte 0x8 20.--23. 1. "AF13,Alternate function selection for port 13 pin" hexmask.long.byte 0x8 16.--19. 1. "AF12,Alternate function selection for port 12 pin" newline hexmask.long.byte 0x8 12.--15. 1. "AF11,Alternate function selection for port 11 pin" hexmask.long.byte 0x8 8.--11. 1. "AF10,Alternate function selection for port 10 pin" newline hexmask.long.byte 0x8 4.--7. 1. "AF9,Alternate function selection for port 9 pin" hexmask.long.byte 0x8 0.--3. 1. "AF8,Alternate function selection for port 8 pin" wgroup.long 0x2C++0x3 line.long 0x0 "BRR,BRR" bitfld.long 0x0 15. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 14. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 13. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 12. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 11. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 10. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 9. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 8. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 7. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 6. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 5. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 4. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 3. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 2. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 1. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 0. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" group.long 0x30++0xB line.long 0x0 "DFR,DFR" bitfld.long 0x0 15. "DF15,Port15 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 14. "DF14,Port14 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 13. "DF13,Port13 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 12. "DF12,Port12 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 11. "DF11,Port11 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 10. "DF10,Port10 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 9. "DF9,Port9 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 8. "DF8,Port8 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 7. "DF7,Port7 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 6. "DF6,Port6 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 5. "DF5,Port5 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 4. "DF4,Port4 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 3. "DF3,Port3 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 2. "DF2,Port2 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 1. "DF1,Port1 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 0. "DF0,Port0 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" line.long 0x4 "ASR,ASR" bitfld.long 0x4 15. "AS15,Port15 analog switch" "0: disable,1: enable" bitfld.long 0x4 14. "AS14,Port14 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 13. "AS13,Port13 analog switch" "0: disable,1: enable" bitfld.long 0x4 12. "AS12,Port12 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 11. "AS11,Port11 analog switch" "0: disable,1: enable" bitfld.long 0x4 10. "AS10,Port10 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 9. "AS9,Port9 analog switch" "0: disable,1: enable" bitfld.long 0x4 8. "AS8,Port8 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 7. "AS7,Port7 analog switch" "0: disable,1: enable" bitfld.long 0x4 6. "AS6,Port6 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 5. "AS5,Port5 analog switch" "0: disable,1: enable" bitfld.long 0x4 4. "AS4,Port4 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 3. "AS3,Port3 analog switch" "0: disable,1: enable" bitfld.long 0x4 2. "AS2,Port2 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 1. "AS1,Port1 analog switch" "0: disable,1: enable" bitfld.long 0x4 0. "AS0,Port0 analog switch" "0: disable,1: enable" line.long 0x8 "CSR,CSR" bitfld.long 0x8 15. "CS15,Port15 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 14. "CS14,Port14 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 13. "CS13,Port13 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 12. "CS12,Port12 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 11. "CS11,Port11 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 10. "CS10,Port10 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 9. "CS9,Port9 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 8. "CS8,Port8 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 7. "CS7,Port7 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 6. "CS6,Port6 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 5. "CS5,Port5 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 4. "CS4,Port4 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 3. "CS3,Port3 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 2. "CS2,Port2 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 1. "CS1,Port1 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 0. "CS0,Port0 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" tree.end tree "GPIOC" base ad:0x40020800 group.long 0x0++0x13 line.long 0x0 "MODER,MODER" bitfld.long 0x0 30.--31. "MODE15,Port15 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT15_AF_MODE,3: PORT15_ANALOG_MODE" bitfld.long 0x0 28.--29. "MODE14,Port14 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT14_AF_MODE,3: PORT14_ANALOG_MODE" newline bitfld.long 0x0 26.--27. "MODE13,Port13 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT13_AF_MODE,3: PORT13_ANALOG_MODE" bitfld.long 0x0 24.--25. "MODE12,Port12 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT12_AF_MODE,3: PORT12_ANALOG_MODE" newline bitfld.long 0x0 22.--23. "MODE11,Port11 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT11_AF_MODE,3: PORT11_ANALOG_MODE" bitfld.long 0x0 20.--21. "MODE10,Port10 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT10_AF_MODE,3: PORT10_ANALOG_MODE" newline bitfld.long 0x0 18.--19. "MODE9,Port9 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT9_AF_MODE,3: PORT9_ANALOG_MODE" bitfld.long 0x0 16.--17. "MODE8,Port8 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT8_AF_MODE,3: PORT8_ANALOG_MODE" newline bitfld.long 0x0 14.--15. "MODE7,Port7 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT7_AF_MODE,3: PORT7_ANALOG_MODE" bitfld.long 0x0 12.--13. "MODE6,Port6 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT6_AF_MODE,3: PORT6_ANALOG_MODE" newline bitfld.long 0x0 10.--11. "MODE5,Port5 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT5_AF_MODE,3: PORT5_ANALOG_MODE" bitfld.long 0x0 8.--9. "MODE4,Port4 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT4_AF_MODE,3: PORT4_ANALOG_MODE" newline bitfld.long 0x0 6.--7. "MODE3,Port3 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT3_AF_MODE,3: PORT3_ANALOG_MODE" bitfld.long 0x0 4.--5. "MODE2,Port2 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT2_AF_MODE,3: PORT2_ANALOG_MODE" newline bitfld.long 0x0 2.--3. "MODE1,Port1 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT1_AF_MODE,3: PORT1_ANALOG_MODE" bitfld.long 0x0 0.--1. "MODE0,Port0 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT0_AF_MODE,3: PORT0_ANALOG_MODE" line.long 0x4 "OTYPER,OTYPER" bitfld.long 0x4 15. "OT15,Port15 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 14. "OT14,Port14 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 13. "OT13,Port13 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 12. "OT12,Port12 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 11. "OT11,Port11 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 10. "OT10,Port10 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 9. "OT9,Port9 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 8. "OT8,Port8 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 7. "OT7,Port7 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 6. "OT6,Port6 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 5. "OT5,Port5 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 4. "OT4,Port4 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 3. "OT3,Port3 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 2. "OT2,Port2 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 1. "OT1,Port1 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 0. "OT0,Port0 input data type:" "0: Output push-pull,1: Output open-drain" line.long 0x8 "OSPEEDR,OSPEEDR" bitfld.long 0x8 30.--31. "OSPEED15,Port15 output speed:" "0: 24MHz,1: 48MHz,2: PORT15_96MHZ,3: PORT15_120MHZ" bitfld.long 0x8 28.--29. "OSPEED14,Port14 output speed:" "0: 24MHz,1: 48MHz,2: PORT14_96MHZ,3: PORT14_120MHZ" newline bitfld.long 0x8 26.--27. "OSPEED13,Port13 output speed:" "0: 24MHz,1: 48MHz,2: PORT13_96MHZ,3: PORT13_120MHZ" bitfld.long 0x8 24.--25. "OSPEED12,Port12 output speed:" "0: 24MHz,1: 48MHz,2: PORT12_96MHZ,3: PORT12_120MHZ" newline bitfld.long 0x8 22.--23. "OSPEED11,Port11 output speed:" "0: 24MHz,1: 48MHz,2: PORT11_96MHZ,3: PORT11_120MHZ" bitfld.long 0x8 20.--21. "OSPEED10,Port10 output speed:" "0: 24MHz,1: 48MHz,2: PORT10_96MHZ,3: PORT10_120MHZ" newline bitfld.long 0x8 18.--19. "OSPEED9,Port9 output speed:" "0: 24MHz,1: 48MHz,2: PORT9_96MHZ,3: PORT9_120MHZ" bitfld.long 0x8 16.--17. "OSPEED8,Port8 output speed:" "0: 24MHz,1: 48MHz,2: PORT8_96MHZ,3: PORT8_120MHZ" newline bitfld.long 0x8 14.--15. "OSPEED7,Port7 output speed:" "0: 24MHz,1: 48MHz,2: PORT7_96MHZ,3: PORT7_120MHZ" bitfld.long 0x8 12.--13. "OSPEED6,Port6 output speed:" "0: 24MHz,1: 48MHz,2: PORT6_96MHZ,3: PORT6_120MHZ" newline bitfld.long 0x8 10.--11. "OSPEED5,Port5 output speed:" "0: 24MHz,1: 48MHz,2: PORT5_96MHZ,3: PORT5_120MHZ" bitfld.long 0x8 8.--9. "OSPEED4,Port4 output speed:" "0: 24MHz,1: 48MHz,2: PORT4_96MHZ,3: PORT4_120MHZ" newline bitfld.long 0x8 6.--7. "OSPEED3,Port3 output speed:" "0: 24MHz,1: 48MHz,2: PORT3_96MHZ,3: PORT3_120MHZ" bitfld.long 0x8 4.--5. "OSPEED2,Port2 output speed:" "0: 24MHz,1: 48MHz,2: PORT2_96MHZ,3: PORT2_120MHZ" newline bitfld.long 0x8 2.--3. "OSPEED1,Port1 output speed:" "0: 24MHz,1: 48MHz,2: PORT1_96MHZ,3: PORT1_120MHZ" bitfld.long 0x8 0.--1. "OSPEED0,Port0 output speed:" "0: 24MHz,1: 48MHz,2: PORT0_96MHZ,3: PORT0_120MHZ" line.long 0xC "PUPDR,PUPDR" bitfld.long 0xC 30.--31. "PUPD15,Port15 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT15_PD,?" bitfld.long 0xC 28.--29. "PUPD14,Port14 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT14_PD,?" newline bitfld.long 0xC 26.--27. "PUPD13,Port13 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT13_PD,?" bitfld.long 0xC 24.--25. "PUPD12,Port12 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT12_PD,?" newline bitfld.long 0xC 22.--23. "PUPD11,Port11 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT11_PD,?" bitfld.long 0xC 20.--21. "PUPD10,Port10 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT10_PD,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port9 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT9_PD,?" bitfld.long 0xC 16.--17. "PUPD8,Port8 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT8_PD,?" newline bitfld.long 0xC 14.--15. "PUPD7,Port7 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT7_PD,?" bitfld.long 0xC 12.--13. "PUPD6,Port6 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT6_PD,?" newline bitfld.long 0xC 10.--11. "PUPD5,Port5 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT5_PD,?" bitfld.long 0xC 8.--9. "PUPD4,Port4 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT4_PD,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port3 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT3_PD,?" bitfld.long 0xC 4.--5. "PUPD2,Port2 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT2_PD,?" newline bitfld.long 0xC 2.--3. "PUPD1,Port1 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT1_PD,?" bitfld.long 0xC 0.--1. "PUPD0,Port0 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT0_PD,?" line.long 0x10 "DRR,DRR" bitfld.long 0x10 15. "DR15,Port15 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 14. "DR14,Port14 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 13. "DR13,Port13 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 12. "DR12,Port12 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 11. "DR11,Port11 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 10. "DR10,Port10 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 9. "DR9,Port9 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 8. "DR8,Port8 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 7. "DR7,Port7 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 6. "DR6,Port6 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 5. "DR5,Port5 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 4. "DR4,Port4 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 3. "DR3,Port3 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 2. "DR2,Port2 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 1. "DR1,Port1 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 0. "DR0,Port0 driving strength control:" "0: 10mA,1: 20mA" rgroup.long 0x14++0x3 line.long 0x0 "IDR,IDR" bitfld.long 0x0 15. "IDR15,Port15 input data" "0,1" bitfld.long 0x0 14. "IDR14,Port14 input data" "0,1" newline bitfld.long 0x0 13. "IDR13,Port13 input data" "0,1" bitfld.long 0x0 12. "IDR12,Port12 input data" "0,1" newline bitfld.long 0x0 11. "IDR11,Port11 input data" "0,1" bitfld.long 0x0 10. "IDR10,Port10 input data" "0,1" newline bitfld.long 0x0 9. "IDR9,Port9 input data" "0,1" bitfld.long 0x0 8. "IDR8,Port8 input data" "0,1" newline bitfld.long 0x0 7. "IDR7,Port7 input data" "0,1" bitfld.long 0x0 6. "IDR6,Port6 input data" "0,1" newline bitfld.long 0x0 5. "IDR5,Port5 input data" "0,1" bitfld.long 0x0 4. "IDR4,Port4 input data" "0,1" newline bitfld.long 0x0 3. "IDR3,Port3 input data" "0,1" bitfld.long 0x0 2. "IDR2,Port2 input data" "0,1" newline bitfld.long 0x0 1. "IDR1,Port1 input data" "0,1" bitfld.long 0x0 0. "IDR0,Port0 input data" "0,1" group.long 0x18++0x3 line.long 0x0 "ODR,ODR" bitfld.long 0x0 15. "ODR15,Port15 output data" "0: PORT15_OUTPUT_LOW,1: PORT15_OUTPUT_HIGH" bitfld.long 0x0 14. "ODR14,Port14 output data" "0: PORT14_OUTPUT_LOW,1: PORT14_OUTPUT_HIGH" newline bitfld.long 0x0 13. "ODR13,Port13 output data" "0: PORT13_OUTPUT_LOW,1: PORT13_OUTPUT_HIGH" bitfld.long 0x0 12. "ODR12,Port12 output data" "0: PORT12_OUTPUT_LOW,1: PORT12_OUTPUT_HIGH" newline bitfld.long 0x0 11. "ODR11,Port11 output data" "0: PORT11_OUTPUT_LOW,1: PORT11_OUTPUT_HIGH" bitfld.long 0x0 10. "ODR10,Port10 output data" "0: PORT10_OUTPUT_LOW,1: PORT10_OUTPUT_HIGH" newline bitfld.long 0x0 9. "ODR9,Port9 output data" "0: PORT9_OUTPUT_LOW,1: PORT9_OUTPUT_HIGH" bitfld.long 0x0 8. "ODR8,Port8 output data" "0: PORT8_OUTPUT_LOW,1: PORT8_OUTPUT_HIGH" newline bitfld.long 0x0 7. "ODR7,Port7 output data" "0: PORT7_OUTPUT_LOW,1: PORT7_OUTPUT_HIGH" bitfld.long 0x0 6. "ODR6,Port6 output data" "0: PORT6_OUTPUT_LOW,1: PORT6_OUTPUT_HIGH" newline bitfld.long 0x0 5. "ODR5,Port5 output data" "0: PORT5_OUTPUT_LOW,1: PORT5_OUTPUT_HIGH" bitfld.long 0x0 4. "ODR4,Port4 output data" "0: PORT4_OUTPUT_LOW,1: PORT4_OUTPUT_HIGH" newline bitfld.long 0x0 3. "ODR3,Port3 output data" "0: PORT3_OUTPUT_LOW,1: PORT3_OUTPUT_HIGH" bitfld.long 0x0 2. "ODR2,Port2 output data" "0: PORT2_OUTPUT_LOW,1: PORT2_OUTPUT_HIGH" newline bitfld.long 0x0 1. "ODR1,Port1 output data" "0: PORT1_OUTPUT_LOW,1: PORT1_OUTPUT_HIGH" bitfld.long 0x0 0. "ODR0,Port0 output data" "0: PORT0_OUTPUT_LOW,1: PORT0_OUTPUT_HIGH" wgroup.long 0x1C++0x3 line.long 0x0 "BSRR,BSRR" bitfld.long 0x0 31. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 30. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 29. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 28. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 27. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 26. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 25. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 24. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 23. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 22. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 21. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 20. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 19. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 18. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 17. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 16. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 15. "BS15,Port15 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 14. "BS14,Port14 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 13. "BS13,Port13 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 12. "BS12,Port12 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 11. "BS11,Port11 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 10. "BS10,Port10 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 9. "BS9,Port9 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 8. "BS8,Port8 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 7. "BS7,Port7 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 6. "BS6,Port6 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 5. "BS5,Port5 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 4. "BS4,Port4 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 3. "BS3,Port3 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 2. "BS2,Port2 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 1. "BS1,Port1 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 0. "BS0,Port0 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" group.long 0x20++0xB line.long 0x0 "LCKR,LCKR" bitfld.long 0x0 16. "LCKK,Lock key:" "0: port configuration lock key not active,1: port configuration lock key active" bitfld.long 0x0 15. "LCK15,Port15 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 14. "LCK14,Port14 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 13. "LCK13,Port13 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 12. "LCK12,Port12 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 11. "LCK11,Port11 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 10. "LCK10,Port10 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 9. "LCK9,Port9 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 8. "LCK8,Port8 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 7. "LCK7,Port7 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 6. "LCK6,Port6 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 5. "LCK5,Port5 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 4. "LCK4,Port4 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 3. "LCK3,Port3 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 2. "LCK2,Port2 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 1. "LCK1,Port1 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 0. "LCK0,Port0 lock bit:" "0: port configuration not locked,1: port configuration locked" line.long 0x4 "AFRL,AFRL" hexmask.long.byte 0x4 28.--31. 1. "AF7,Alternate function selection for port 7 pin" hexmask.long.byte 0x4 24.--27. 1. "AF6,Alternate function selection for port 6 pin" newline hexmask.long.byte 0x4 20.--23. 1. "AF5,Alternate function selection for port 5 pin" hexmask.long.byte 0x4 16.--19. 1. "AF4,Alternate function selection for port 4 pin" newline hexmask.long.byte 0x4 12.--15. 1. "AF3,Alternate function selection for port 3 pin" hexmask.long.byte 0x4 8.--11. 1. "AF2,Alternate function selection for port 2 pin" newline hexmask.long.byte 0x4 4.--7. 1. "AF1,Alternate function selection for port 1 pin" hexmask.long.byte 0x4 0.--3. 1. "AF0,Alternate function selection for port 0 pin" line.long 0x8 "AFRH,AFRH" hexmask.long.byte 0x8 28.--31. 1. "AF15,Alternate function selection for port 15 pin" hexmask.long.byte 0x8 24.--27. 1. "AF14,Alternate function selection for port 14 pin" newline hexmask.long.byte 0x8 20.--23. 1. "AF13,Alternate function selection for port 13 pin" hexmask.long.byte 0x8 16.--19. 1. "AF12,Alternate function selection for port 12 pin" newline hexmask.long.byte 0x8 12.--15. 1. "AF11,Alternate function selection for port 11 pin" hexmask.long.byte 0x8 8.--11. 1. "AF10,Alternate function selection for port 10 pin" newline hexmask.long.byte 0x8 4.--7. 1. "AF9,Alternate function selection for port 9 pin" hexmask.long.byte 0x8 0.--3. 1. "AF8,Alternate function selection for port 8 pin" wgroup.long 0x2C++0x3 line.long 0x0 "BRR,BRR" bitfld.long 0x0 15. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 14. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 13. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 12. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 11. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 10. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 9. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 8. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 7. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 6. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 5. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 4. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 3. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 2. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 1. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 0. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" group.long 0x30++0xB line.long 0x0 "DFR,DFR" bitfld.long 0x0 15. "DF15,Port15 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 14. "DF14,Port14 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 13. "DF13,Port13 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 12. "DF12,Port12 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 11. "DF11,Port11 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 10. "DF10,Port10 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 9. "DF9,Port9 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 8. "DF8,Port8 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 7. "DF7,Port7 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 6. "DF6,Port6 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 5. "DF5,Port5 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 4. "DF4,Port4 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 3. "DF3,Port3 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 2. "DF2,Port2 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 1. "DF1,Port1 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 0. "DF0,Port0 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" line.long 0x4 "ASR,ASR" bitfld.long 0x4 15. "AS15,Port15 analog switch" "0: disable,1: enable" bitfld.long 0x4 14. "AS14,Port14 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 13. "AS13,Port13 analog switch" "0: disable,1: enable" bitfld.long 0x4 12. "AS12,Port12 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 11. "AS11,Port11 analog switch" "0: disable,1: enable" bitfld.long 0x4 10. "AS10,Port10 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 9. "AS9,Port9 analog switch" "0: disable,1: enable" bitfld.long 0x4 8. "AS8,Port8 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 7. "AS7,Port7 analog switch" "0: disable,1: enable" bitfld.long 0x4 6. "AS6,Port6 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 5. "AS5,Port5 analog switch" "0: disable,1: enable" bitfld.long 0x4 4. "AS4,Port4 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 3. "AS3,Port3 analog switch" "0: disable,1: enable" bitfld.long 0x4 2. "AS2,Port2 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 1. "AS1,Port1 analog switch" "0: disable,1: enable" bitfld.long 0x4 0. "AS0,Port0 analog switch" "0: disable,1: enable" line.long 0x8 "CSR,CSR" bitfld.long 0x8 15. "CS15,Port15 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 14. "CS14,Port14 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 13. "CS13,Port13 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 12. "CS12,Port12 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 11. "CS11,Port11 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 10. "CS10,Port10 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 9. "CS9,Port9 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 8. "CS8,Port8 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 7. "CS7,Port7 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 6. "CS6,Port6 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 5. "CS5,Port5 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 4. "CS4,Port4 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 3. "CS3,Port3 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 2. "CS2,Port2 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 1. "CS1,Port1 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 0. "CS0,Port0 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" tree.end tree "GPIOD" base ad:0x40020C00 group.long 0x0++0x13 line.long 0x0 "MODER,MODER" bitfld.long 0x0 30.--31. "MODE15,Port15 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT15_AF_MODE,3: PORT15_ANALOG_MODE" bitfld.long 0x0 28.--29. "MODE14,Port14 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT14_AF_MODE,3: PORT14_ANALOG_MODE" newline bitfld.long 0x0 26.--27. "MODE13,Port13 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT13_AF_MODE,3: PORT13_ANALOG_MODE" bitfld.long 0x0 24.--25. "MODE12,Port12 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT12_AF_MODE,3: PORT12_ANALOG_MODE" newline bitfld.long 0x0 22.--23. "MODE11,Port11 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT11_AF_MODE,3: PORT11_ANALOG_MODE" bitfld.long 0x0 20.--21. "MODE10,Port10 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT10_AF_MODE,3: PORT10_ANALOG_MODE" newline bitfld.long 0x0 18.--19. "MODE9,Port9 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT9_AF_MODE,3: PORT9_ANALOG_MODE" bitfld.long 0x0 16.--17. "MODE8,Port8 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT8_AF_MODE,3: PORT8_ANALOG_MODE" newline bitfld.long 0x0 14.--15. "MODE7,Port7 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT7_AF_MODE,3: PORT7_ANALOG_MODE" bitfld.long 0x0 12.--13. "MODE6,Port6 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT6_AF_MODE,3: PORT6_ANALOG_MODE" newline bitfld.long 0x0 10.--11. "MODE5,Port5 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT5_AF_MODE,3: PORT5_ANALOG_MODE" bitfld.long 0x0 8.--9. "MODE4,Port4 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT4_AF_MODE,3: PORT4_ANALOG_MODE" newline bitfld.long 0x0 6.--7. "MODE3,Port3 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT3_AF_MODE,3: PORT3_ANALOG_MODE" bitfld.long 0x0 4.--5. "MODE2,Port2 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT2_AF_MODE,3: PORT2_ANALOG_MODE" newline bitfld.long 0x0 2.--3. "MODE1,Port1 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT1_AF_MODE,3: PORT1_ANALOG_MODE" bitfld.long 0x0 0.--1. "MODE0,Port0 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT0_AF_MODE,3: PORT0_ANALOG_MODE" line.long 0x4 "OTYPER,OTYPER" bitfld.long 0x4 15. "OT15,Port15 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 14. "OT14,Port14 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 13. "OT13,Port13 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 12. "OT12,Port12 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 11. "OT11,Port11 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 10. "OT10,Port10 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 9. "OT9,Port9 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 8. "OT8,Port8 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 7. "OT7,Port7 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 6. "OT6,Port6 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 5. "OT5,Port5 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 4. "OT4,Port4 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 3. "OT3,Port3 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 2. "OT2,Port2 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 1. "OT1,Port1 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 0. "OT0,Port0 input data type:" "0: Output push-pull,1: Output open-drain" line.long 0x8 "OSPEEDR,OSPEEDR" bitfld.long 0x8 30.--31. "OSPEED15,Port15 output speed:" "0: 24MHz,1: 48MHz,2: PORT15_96MHZ,3: PORT15_120MHZ" bitfld.long 0x8 28.--29. "OSPEED14,Port14 output speed:" "0: 24MHz,1: 48MHz,2: PORT14_96MHZ,3: PORT14_120MHZ" newline bitfld.long 0x8 26.--27. "OSPEED13,Port13 output speed:" "0: 24MHz,1: 48MHz,2: PORT13_96MHZ,3: PORT13_120MHZ" bitfld.long 0x8 24.--25. "OSPEED12,Port12 output speed:" "0: 24MHz,1: 48MHz,2: PORT12_96MHZ,3: PORT12_120MHZ" newline bitfld.long 0x8 22.--23. "OSPEED11,Port11 output speed:" "0: 24MHz,1: 48MHz,2: PORT11_96MHZ,3: PORT11_120MHZ" bitfld.long 0x8 20.--21. "OSPEED10,Port10 output speed:" "0: 24MHz,1: 48MHz,2: PORT10_96MHZ,3: PORT10_120MHZ" newline bitfld.long 0x8 18.--19. "OSPEED9,Port9 output speed:" "0: 24MHz,1: 48MHz,2: PORT9_96MHZ,3: PORT9_120MHZ" bitfld.long 0x8 16.--17. "OSPEED8,Port8 output speed:" "0: 24MHz,1: 48MHz,2: PORT8_96MHZ,3: PORT8_120MHZ" newline bitfld.long 0x8 14.--15. "OSPEED7,Port7 output speed:" "0: 24MHz,1: 48MHz,2: PORT7_96MHZ,3: PORT7_120MHZ" bitfld.long 0x8 12.--13. "OSPEED6,Port6 output speed:" "0: 24MHz,1: 48MHz,2: PORT6_96MHZ,3: PORT6_120MHZ" newline bitfld.long 0x8 10.--11. "OSPEED5,Port5 output speed:" "0: 24MHz,1: 48MHz,2: PORT5_96MHZ,3: PORT5_120MHZ" bitfld.long 0x8 8.--9. "OSPEED4,Port4 output speed:" "0: 24MHz,1: 48MHz,2: PORT4_96MHZ,3: PORT4_120MHZ" newline bitfld.long 0x8 6.--7. "OSPEED3,Port3 output speed:" "0: 24MHz,1: 48MHz,2: PORT3_96MHZ,3: PORT3_120MHZ" bitfld.long 0x8 4.--5. "OSPEED2,Port2 output speed:" "0: 24MHz,1: 48MHz,2: PORT2_96MHZ,3: PORT2_120MHZ" newline bitfld.long 0x8 2.--3. "OSPEED1,Port1 output speed:" "0: 24MHz,1: 48MHz,2: PORT1_96MHZ,3: PORT1_120MHZ" bitfld.long 0x8 0.--1. "OSPEED0,Port0 output speed:" "0: 24MHz,1: 48MHz,2: PORT0_96MHZ,3: PORT0_120MHZ" line.long 0xC "PUPDR,PUPDR" bitfld.long 0xC 30.--31. "PUPD15,Port15 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT15_PD,?" bitfld.long 0xC 28.--29. "PUPD14,Port14 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT14_PD,?" newline bitfld.long 0xC 26.--27. "PUPD13,Port13 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT13_PD,?" bitfld.long 0xC 24.--25. "PUPD12,Port12 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT12_PD,?" newline bitfld.long 0xC 22.--23. "PUPD11,Port11 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT11_PD,?" bitfld.long 0xC 20.--21. "PUPD10,Port10 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT10_PD,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port9 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT9_PD,?" bitfld.long 0xC 16.--17. "PUPD8,Port8 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT8_PD,?" newline bitfld.long 0xC 14.--15. "PUPD7,Port7 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT7_PD,?" bitfld.long 0xC 12.--13. "PUPD6,Port6 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT6_PD,?" newline bitfld.long 0xC 10.--11. "PUPD5,Port5 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT5_PD,?" bitfld.long 0xC 8.--9. "PUPD4,Port4 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT4_PD,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port3 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT3_PD,?" bitfld.long 0xC 4.--5. "PUPD2,Port2 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT2_PD,?" newline bitfld.long 0xC 2.--3. "PUPD1,Port1 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT1_PD,?" bitfld.long 0xC 0.--1. "PUPD0,Port0 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT0_PD,?" line.long 0x10 "DRR,DRR" bitfld.long 0x10 15. "DR15,Port15 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 14. "DR14,Port14 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 13. "DR13,Port13 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 12. "DR12,Port12 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 11. "DR11,Port11 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 10. "DR10,Port10 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 9. "DR9,Port9 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 8. "DR8,Port8 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 7. "DR7,Port7 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 6. "DR6,Port6 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 5. "DR5,Port5 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 4. "DR4,Port4 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 3. "DR3,Port3 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 2. "DR2,Port2 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 1. "DR1,Port1 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 0. "DR0,Port0 driving strength control:" "0: 10mA,1: 20mA" rgroup.long 0x14++0x3 line.long 0x0 "IDR,IDR" bitfld.long 0x0 15. "IDR15,Port15 input data" "0,1" bitfld.long 0x0 14. "IDR14,Port14 input data" "0,1" newline bitfld.long 0x0 13. "IDR13,Port13 input data" "0,1" bitfld.long 0x0 12. "IDR12,Port12 input data" "0,1" newline bitfld.long 0x0 11. "IDR11,Port11 input data" "0,1" bitfld.long 0x0 10. "IDR10,Port10 input data" "0,1" newline bitfld.long 0x0 9. "IDR9,Port9 input data" "0,1" bitfld.long 0x0 8. "IDR8,Port8 input data" "0,1" newline bitfld.long 0x0 7. "IDR7,Port7 input data" "0,1" bitfld.long 0x0 6. "IDR6,Port6 input data" "0,1" newline bitfld.long 0x0 5. "IDR5,Port5 input data" "0,1" bitfld.long 0x0 4. "IDR4,Port4 input data" "0,1" newline bitfld.long 0x0 3. "IDR3,Port3 input data" "0,1" bitfld.long 0x0 2. "IDR2,Port2 input data" "0,1" newline bitfld.long 0x0 1. "IDR1,Port1 input data" "0,1" bitfld.long 0x0 0. "IDR0,Port0 input data" "0,1" group.long 0x18++0x3 line.long 0x0 "ODR,ODR" bitfld.long 0x0 15. "ODR15,Port15 output data" "0: PORT15_OUTPUT_LOW,1: PORT15_OUTPUT_HIGH" bitfld.long 0x0 14. "ODR14,Port14 output data" "0: PORT14_OUTPUT_LOW,1: PORT14_OUTPUT_HIGH" newline bitfld.long 0x0 13. "ODR13,Port13 output data" "0: PORT13_OUTPUT_LOW,1: PORT13_OUTPUT_HIGH" bitfld.long 0x0 12. "ODR12,Port12 output data" "0: PORT12_OUTPUT_LOW,1: PORT12_OUTPUT_HIGH" newline bitfld.long 0x0 11. "ODR11,Port11 output data" "0: PORT11_OUTPUT_LOW,1: PORT11_OUTPUT_HIGH" bitfld.long 0x0 10. "ODR10,Port10 output data" "0: PORT10_OUTPUT_LOW,1: PORT10_OUTPUT_HIGH" newline bitfld.long 0x0 9. "ODR9,Port9 output data" "0: PORT9_OUTPUT_LOW,1: PORT9_OUTPUT_HIGH" bitfld.long 0x0 8. "ODR8,Port8 output data" "0: PORT8_OUTPUT_LOW,1: PORT8_OUTPUT_HIGH" newline bitfld.long 0x0 7. "ODR7,Port7 output data" "0: PORT7_OUTPUT_LOW,1: PORT7_OUTPUT_HIGH" bitfld.long 0x0 6. "ODR6,Port6 output data" "0: PORT6_OUTPUT_LOW,1: PORT6_OUTPUT_HIGH" newline bitfld.long 0x0 5. "ODR5,Port5 output data" "0: PORT5_OUTPUT_LOW,1: PORT5_OUTPUT_HIGH" bitfld.long 0x0 4. "ODR4,Port4 output data" "0: PORT4_OUTPUT_LOW,1: PORT4_OUTPUT_HIGH" newline bitfld.long 0x0 3. "ODR3,Port3 output data" "0: PORT3_OUTPUT_LOW,1: PORT3_OUTPUT_HIGH" bitfld.long 0x0 2. "ODR2,Port2 output data" "0: PORT2_OUTPUT_LOW,1: PORT2_OUTPUT_HIGH" newline bitfld.long 0x0 1. "ODR1,Port1 output data" "0: PORT1_OUTPUT_LOW,1: PORT1_OUTPUT_HIGH" bitfld.long 0x0 0. "ODR0,Port0 output data" "0: PORT0_OUTPUT_LOW,1: PORT0_OUTPUT_HIGH" wgroup.long 0x1C++0x3 line.long 0x0 "BSRR,BSRR" bitfld.long 0x0 31. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 30. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 29. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 28. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 27. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 26. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 25. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 24. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 23. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 22. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 21. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 20. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 19. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 18. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 17. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 16. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 15. "BS15,Port15 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 14. "BS14,Port14 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 13. "BS13,Port13 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 12. "BS12,Port12 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 11. "BS11,Port11 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 10. "BS10,Port10 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 9. "BS9,Port9 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 8. "BS8,Port8 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 7. "BS7,Port7 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 6. "BS6,Port6 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 5. "BS5,Port5 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 4. "BS4,Port4 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 3. "BS3,Port3 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 2. "BS2,Port2 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 1. "BS1,Port1 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 0. "BS0,Port0 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" group.long 0x20++0xB line.long 0x0 "LCKR,LCKR" bitfld.long 0x0 16. "LCKK,Lock key:" "0: port configuration lock key not active,1: port configuration lock key active" bitfld.long 0x0 15. "LCK15,Port15 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 14. "LCK14,Port14 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 13. "LCK13,Port13 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 12. "LCK12,Port12 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 11. "LCK11,Port11 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 10. "LCK10,Port10 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 9. "LCK9,Port9 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 8. "LCK8,Port8 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 7. "LCK7,Port7 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 6. "LCK6,Port6 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 5. "LCK5,Port5 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 4. "LCK4,Port4 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 3. "LCK3,Port3 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 2. "LCK2,Port2 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 1. "LCK1,Port1 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 0. "LCK0,Port0 lock bit:" "0: port configuration not locked,1: port configuration locked" line.long 0x4 "AFRL,AFRL" hexmask.long.byte 0x4 28.--31. 1. "AF7,Alternate function selection for port 7 pin" hexmask.long.byte 0x4 24.--27. 1. "AF6,Alternate function selection for port 6 pin" newline hexmask.long.byte 0x4 20.--23. 1. "AF5,Alternate function selection for port 5 pin" hexmask.long.byte 0x4 16.--19. 1. "AF4,Alternate function selection for port 4 pin" newline hexmask.long.byte 0x4 12.--15. 1. "AF3,Alternate function selection for port 3 pin" hexmask.long.byte 0x4 8.--11. 1. "AF2,Alternate function selection for port 2 pin" newline hexmask.long.byte 0x4 4.--7. 1. "AF1,Alternate function selection for port 1 pin" hexmask.long.byte 0x4 0.--3. 1. "AF0,Alternate function selection for port 0 pin" line.long 0x8 "AFRH,AFRH" hexmask.long.byte 0x8 28.--31. 1. "AF15,Alternate function selection for port 15 pin" hexmask.long.byte 0x8 24.--27. 1. "AF14,Alternate function selection for port 14 pin" newline hexmask.long.byte 0x8 20.--23. 1. "AF13,Alternate function selection for port 13 pin" hexmask.long.byte 0x8 16.--19. 1. "AF12,Alternate function selection for port 12 pin" newline hexmask.long.byte 0x8 12.--15. 1. "AF11,Alternate function selection for port 11 pin" hexmask.long.byte 0x8 8.--11. 1. "AF10,Alternate function selection for port 10 pin" newline hexmask.long.byte 0x8 4.--7. 1. "AF9,Alternate function selection for port 9 pin" hexmask.long.byte 0x8 0.--3. 1. "AF8,Alternate function selection for port 8 pin" wgroup.long 0x2C++0x3 line.long 0x0 "BRR,BRR" bitfld.long 0x0 15. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 14. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 13. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 12. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 11. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 10. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 9. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 8. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 7. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 6. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 5. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 4. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 3. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 2. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 1. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 0. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" group.long 0x30++0xB line.long 0x0 "DFR,DFR" bitfld.long 0x0 15. "DF15,Port15 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 14. "DF14,Port14 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 13. "DF13,Port13 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 12. "DF12,Port12 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 11. "DF11,Port11 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 10. "DF10,Port10 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 9. "DF9,Port9 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 8. "DF8,Port8 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 7. "DF7,Port7 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 6. "DF6,Port6 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 5. "DF5,Port5 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 4. "DF4,Port4 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 3. "DF3,Port3 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 2. "DF2,Port2 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 1. "DF1,Port1 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 0. "DF0,Port0 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" line.long 0x4 "ASR,ASR" bitfld.long 0x4 15. "AS15,Port15 analog switch" "0: disable,1: enable" bitfld.long 0x4 14. "AS14,Port14 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 13. "AS13,Port13 analog switch" "0: disable,1: enable" bitfld.long 0x4 12. "AS12,Port12 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 11. "AS11,Port11 analog switch" "0: disable,1: enable" bitfld.long 0x4 10. "AS10,Port10 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 9. "AS9,Port9 analog switch" "0: disable,1: enable" bitfld.long 0x4 8. "AS8,Port8 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 7. "AS7,Port7 analog switch" "0: disable,1: enable" bitfld.long 0x4 6. "AS6,Port6 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 5. "AS5,Port5 analog switch" "0: disable,1: enable" bitfld.long 0x4 4. "AS4,Port4 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 3. "AS3,Port3 analog switch" "0: disable,1: enable" bitfld.long 0x4 2. "AS2,Port2 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 1. "AS1,Port1 analog switch" "0: disable,1: enable" bitfld.long 0x4 0. "AS0,Port0 analog switch" "0: disable,1: enable" line.long 0x8 "CSR,CSR" bitfld.long 0x8 15. "CS15,Port15 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 14. "CS14,Port14 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 13. "CS13,Port13 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 12. "CS12,Port12 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 11. "CS11,Port11 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 10. "CS10,Port10 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 9. "CS9,Port9 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 8. "CS8,Port8 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 7. "CS7,Port7 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 6. "CS6,Port6 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 5. "CS5,Port5 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 4. "CS4,Port4 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 3. "CS3,Port3 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 2. "CS2,Port2 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 1. "CS1,Port1 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 0. "CS0,Port0 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" tree.end tree "GPIOE" base ad:0x40021000 group.long 0x0++0x13 line.long 0x0 "MODER,MODER" bitfld.long 0x0 30.--31. "MODE15,Port15 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT15_AF_MODE,3: PORT15_ANALOG_MODE" bitfld.long 0x0 28.--29. "MODE14,Port14 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT14_AF_MODE,3: PORT14_ANALOG_MODE" newline bitfld.long 0x0 26.--27. "MODE13,Port13 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT13_AF_MODE,3: PORT13_ANALOG_MODE" bitfld.long 0x0 24.--25. "MODE12,Port12 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT12_AF_MODE,3: PORT12_ANALOG_MODE" newline bitfld.long 0x0 22.--23. "MODE11,Port11 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT11_AF_MODE,3: PORT11_ANALOG_MODE" bitfld.long 0x0 20.--21. "MODE10,Port10 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT10_AF_MODE,3: PORT10_ANALOG_MODE" newline bitfld.long 0x0 18.--19. "MODE9,Port9 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT9_AF_MODE,3: PORT9_ANALOG_MODE" bitfld.long 0x0 16.--17. "MODE8,Port8 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT8_AF_MODE,3: PORT8_ANALOG_MODE" newline bitfld.long 0x0 14.--15. "MODE7,Port7 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT7_AF_MODE,3: PORT7_ANALOG_MODE" bitfld.long 0x0 12.--13. "MODE6,Port6 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT6_AF_MODE,3: PORT6_ANALOG_MODE" newline bitfld.long 0x0 10.--11. "MODE5,Port5 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT5_AF_MODE,3: PORT5_ANALOG_MODE" bitfld.long 0x0 8.--9. "MODE4,Port4 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT4_AF_MODE,3: PORT4_ANALOG_MODE" newline bitfld.long 0x0 6.--7. "MODE3,Port3 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT3_AF_MODE,3: PORT3_ANALOG_MODE" bitfld.long 0x0 4.--5. "MODE2,Port2 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT2_AF_MODE,3: PORT2_ANALOG_MODE" newline bitfld.long 0x0 2.--3. "MODE1,Port1 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT1_AF_MODE,3: PORT1_ANALOG_MODE" bitfld.long 0x0 0.--1. "MODE0,Port0 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT0_AF_MODE,3: PORT0_ANALOG_MODE" line.long 0x4 "OTYPER,OTYPER" bitfld.long 0x4 15. "OT15,Port15 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 14. "OT14,Port14 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 13. "OT13,Port13 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 12. "OT12,Port12 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 11. "OT11,Port11 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 10. "OT10,Port10 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 9. "OT9,Port9 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 8. "OT8,Port8 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 7. "OT7,Port7 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 6. "OT6,Port6 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 5. "OT5,Port5 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 4. "OT4,Port4 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 3. "OT3,Port3 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 2. "OT2,Port2 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 1. "OT1,Port1 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 0. "OT0,Port0 input data type:" "0: Output push-pull,1: Output open-drain" line.long 0x8 "OSPEEDR,OSPEEDR" bitfld.long 0x8 30.--31. "OSPEED15,Port15 output speed:" "0: 24MHz,1: 48MHz,2: PORT15_96MHZ,3: PORT15_120MHZ" bitfld.long 0x8 28.--29. "OSPEED14,Port14 output speed:" "0: 24MHz,1: 48MHz,2: PORT14_96MHZ,3: PORT14_120MHZ" newline bitfld.long 0x8 26.--27. "OSPEED13,Port13 output speed:" "0: 24MHz,1: 48MHz,2: PORT13_96MHZ,3: PORT13_120MHZ" bitfld.long 0x8 24.--25. "OSPEED12,Port12 output speed:" "0: 24MHz,1: 48MHz,2: PORT12_96MHZ,3: PORT12_120MHZ" newline bitfld.long 0x8 22.--23. "OSPEED11,Port11 output speed:" "0: 24MHz,1: 48MHz,2: PORT11_96MHZ,3: PORT11_120MHZ" bitfld.long 0x8 20.--21. "OSPEED10,Port10 output speed:" "0: 24MHz,1: 48MHz,2: PORT10_96MHZ,3: PORT10_120MHZ" newline bitfld.long 0x8 18.--19. "OSPEED9,Port9 output speed:" "0: 24MHz,1: 48MHz,2: PORT9_96MHZ,3: PORT9_120MHZ" bitfld.long 0x8 16.--17. "OSPEED8,Port8 output speed:" "0: 24MHz,1: 48MHz,2: PORT8_96MHZ,3: PORT8_120MHZ" newline bitfld.long 0x8 14.--15. "OSPEED7,Port7 output speed:" "0: 24MHz,1: 48MHz,2: PORT7_96MHZ,3: PORT7_120MHZ" bitfld.long 0x8 12.--13. "OSPEED6,Port6 output speed:" "0: 24MHz,1: 48MHz,2: PORT6_96MHZ,3: PORT6_120MHZ" newline bitfld.long 0x8 10.--11. "OSPEED5,Port5 output speed:" "0: 24MHz,1: 48MHz,2: PORT5_96MHZ,3: PORT5_120MHZ" bitfld.long 0x8 8.--9. "OSPEED4,Port4 output speed:" "0: 24MHz,1: 48MHz,2: PORT4_96MHZ,3: PORT4_120MHZ" newline bitfld.long 0x8 6.--7. "OSPEED3,Port3 output speed:" "0: 24MHz,1: 48MHz,2: PORT3_96MHZ,3: PORT3_120MHZ" bitfld.long 0x8 4.--5. "OSPEED2,Port2 output speed:" "0: 24MHz,1: 48MHz,2: PORT2_96MHZ,3: PORT2_120MHZ" newline bitfld.long 0x8 2.--3. "OSPEED1,Port1 output speed:" "0: 24MHz,1: 48MHz,2: PORT1_96MHZ,3: PORT1_120MHZ" bitfld.long 0x8 0.--1. "OSPEED0,Port0 output speed:" "0: 24MHz,1: 48MHz,2: PORT0_96MHZ,3: PORT0_120MHZ" line.long 0xC "PUPDR,PUPDR" bitfld.long 0xC 30.--31. "PUPD15,Port15 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT15_PD,?" bitfld.long 0xC 28.--29. "PUPD14,Port14 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT14_PD,?" newline bitfld.long 0xC 26.--27. "PUPD13,Port13 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT13_PD,?" bitfld.long 0xC 24.--25. "PUPD12,Port12 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT12_PD,?" newline bitfld.long 0xC 22.--23. "PUPD11,Port11 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT11_PD,?" bitfld.long 0xC 20.--21. "PUPD10,Port10 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT10_PD,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port9 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT9_PD,?" bitfld.long 0xC 16.--17. "PUPD8,Port8 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT8_PD,?" newline bitfld.long 0xC 14.--15. "PUPD7,Port7 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT7_PD,?" bitfld.long 0xC 12.--13. "PUPD6,Port6 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT6_PD,?" newline bitfld.long 0xC 10.--11. "PUPD5,Port5 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT5_PD,?" bitfld.long 0xC 8.--9. "PUPD4,Port4 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT4_PD,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port3 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT3_PD,?" bitfld.long 0xC 4.--5. "PUPD2,Port2 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT2_PD,?" newline bitfld.long 0xC 2.--3. "PUPD1,Port1 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT1_PD,?" bitfld.long 0xC 0.--1. "PUPD0,Port0 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT0_PD,?" line.long 0x10 "DRR,DRR" bitfld.long 0x10 15. "DR15,Port15 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 14. "DR14,Port14 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 13. "DR13,Port13 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 12. "DR12,Port12 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 11. "DR11,Port11 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 10. "DR10,Port10 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 9. "DR9,Port9 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 8. "DR8,Port8 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 7. "DR7,Port7 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 6. "DR6,Port6 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 5. "DR5,Port5 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 4. "DR4,Port4 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 3. "DR3,Port3 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 2. "DR2,Port2 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 1. "DR1,Port1 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 0. "DR0,Port0 driving strength control:" "0: 10mA,1: 20mA" rgroup.long 0x14++0x3 line.long 0x0 "IDR,IDR" bitfld.long 0x0 15. "IDR15,Port15 input data" "0,1" bitfld.long 0x0 14. "IDR14,Port14 input data" "0,1" newline bitfld.long 0x0 13. "IDR13,Port13 input data" "0,1" bitfld.long 0x0 12. "IDR12,Port12 input data" "0,1" newline bitfld.long 0x0 11. "IDR11,Port11 input data" "0,1" bitfld.long 0x0 10. "IDR10,Port10 input data" "0,1" newline bitfld.long 0x0 9. "IDR9,Port9 input data" "0,1" bitfld.long 0x0 8. "IDR8,Port8 input data" "0,1" newline bitfld.long 0x0 7. "IDR7,Port7 input data" "0,1" bitfld.long 0x0 6. "IDR6,Port6 input data" "0,1" newline bitfld.long 0x0 5. "IDR5,Port5 input data" "0,1" bitfld.long 0x0 4. "IDR4,Port4 input data" "0,1" newline bitfld.long 0x0 3. "IDR3,Port3 input data" "0,1" bitfld.long 0x0 2. "IDR2,Port2 input data" "0,1" newline bitfld.long 0x0 1. "IDR1,Port1 input data" "0,1" bitfld.long 0x0 0. "IDR0,Port0 input data" "0,1" group.long 0x18++0x3 line.long 0x0 "ODR,ODR" bitfld.long 0x0 15. "ODR15,Port15 output data" "0: PORT15_OUTPUT_LOW,1: PORT15_OUTPUT_HIGH" bitfld.long 0x0 14. "ODR14,Port14 output data" "0: PORT14_OUTPUT_LOW,1: PORT14_OUTPUT_HIGH" newline bitfld.long 0x0 13. "ODR13,Port13 output data" "0: PORT13_OUTPUT_LOW,1: PORT13_OUTPUT_HIGH" bitfld.long 0x0 12. "ODR12,Port12 output data" "0: PORT12_OUTPUT_LOW,1: PORT12_OUTPUT_HIGH" newline bitfld.long 0x0 11. "ODR11,Port11 output data" "0: PORT11_OUTPUT_LOW,1: PORT11_OUTPUT_HIGH" bitfld.long 0x0 10. "ODR10,Port10 output data" "0: PORT10_OUTPUT_LOW,1: PORT10_OUTPUT_HIGH" newline bitfld.long 0x0 9. "ODR9,Port9 output data" "0: PORT9_OUTPUT_LOW,1: PORT9_OUTPUT_HIGH" bitfld.long 0x0 8. "ODR8,Port8 output data" "0: PORT8_OUTPUT_LOW,1: PORT8_OUTPUT_HIGH" newline bitfld.long 0x0 7. "ODR7,Port7 output data" "0: PORT7_OUTPUT_LOW,1: PORT7_OUTPUT_HIGH" bitfld.long 0x0 6. "ODR6,Port6 output data" "0: PORT6_OUTPUT_LOW,1: PORT6_OUTPUT_HIGH" newline bitfld.long 0x0 5. "ODR5,Port5 output data" "0: PORT5_OUTPUT_LOW,1: PORT5_OUTPUT_HIGH" bitfld.long 0x0 4. "ODR4,Port4 output data" "0: PORT4_OUTPUT_LOW,1: PORT4_OUTPUT_HIGH" newline bitfld.long 0x0 3. "ODR3,Port3 output data" "0: PORT3_OUTPUT_LOW,1: PORT3_OUTPUT_HIGH" bitfld.long 0x0 2. "ODR2,Port2 output data" "0: PORT2_OUTPUT_LOW,1: PORT2_OUTPUT_HIGH" newline bitfld.long 0x0 1. "ODR1,Port1 output data" "0: PORT1_OUTPUT_LOW,1: PORT1_OUTPUT_HIGH" bitfld.long 0x0 0. "ODR0,Port0 output data" "0: PORT0_OUTPUT_LOW,1: PORT0_OUTPUT_HIGH" wgroup.long 0x1C++0x3 line.long 0x0 "BSRR,BSRR" bitfld.long 0x0 31. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 30. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 29. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 28. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 27. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 26. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 25. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 24. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 23. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 22. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 21. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 20. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 19. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 18. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 17. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 16. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 15. "BS15,Port15 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 14. "BS14,Port14 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 13. "BS13,Port13 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 12. "BS12,Port12 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 11. "BS11,Port11 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 10. "BS10,Port10 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 9. "BS9,Port9 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 8. "BS8,Port8 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 7. "BS7,Port7 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 6. "BS6,Port6 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 5. "BS5,Port5 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 4. "BS4,Port4 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 3. "BS3,Port3 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 2. "BS2,Port2 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 1. "BS1,Port1 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 0. "BS0,Port0 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" group.long 0x20++0xB line.long 0x0 "LCKR,LCKR" bitfld.long 0x0 16. "LCKK,Lock key:" "0: port configuration lock key not active,1: port configuration lock key active" bitfld.long 0x0 15. "LCK15,Port15 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 14. "LCK14,Port14 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 13. "LCK13,Port13 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 12. "LCK12,Port12 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 11. "LCK11,Port11 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 10. "LCK10,Port10 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 9. "LCK9,Port9 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 8. "LCK8,Port8 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 7. "LCK7,Port7 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 6. "LCK6,Port6 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 5. "LCK5,Port5 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 4. "LCK4,Port4 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 3. "LCK3,Port3 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 2. "LCK2,Port2 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 1. "LCK1,Port1 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 0. "LCK0,Port0 lock bit:" "0: port configuration not locked,1: port configuration locked" line.long 0x4 "AFRL,AFRL" hexmask.long.byte 0x4 28.--31. 1. "AF7,Alternate function selection for port 7 pin" hexmask.long.byte 0x4 24.--27. 1. "AF6,Alternate function selection for port 6 pin" newline hexmask.long.byte 0x4 20.--23. 1. "AF5,Alternate function selection for port 5 pin" hexmask.long.byte 0x4 16.--19. 1. "AF4,Alternate function selection for port 4 pin" newline hexmask.long.byte 0x4 12.--15. 1. "AF3,Alternate function selection for port 3 pin" hexmask.long.byte 0x4 8.--11. 1. "AF2,Alternate function selection for port 2 pin" newline hexmask.long.byte 0x4 4.--7. 1. "AF1,Alternate function selection for port 1 pin" hexmask.long.byte 0x4 0.--3. 1. "AF0,Alternate function selection for port 0 pin" line.long 0x8 "AFRH,AFRH" hexmask.long.byte 0x8 28.--31. 1. "AF15,Alternate function selection for port 15 pin" hexmask.long.byte 0x8 24.--27. 1. "AF14,Alternate function selection for port 14 pin" newline hexmask.long.byte 0x8 20.--23. 1. "AF13,Alternate function selection for port 13 pin" hexmask.long.byte 0x8 16.--19. 1. "AF12,Alternate function selection for port 12 pin" newline hexmask.long.byte 0x8 12.--15. 1. "AF11,Alternate function selection for port 11 pin" hexmask.long.byte 0x8 8.--11. 1. "AF10,Alternate function selection for port 10 pin" newline hexmask.long.byte 0x8 4.--7. 1. "AF9,Alternate function selection for port 9 pin" hexmask.long.byte 0x8 0.--3. 1. "AF8,Alternate function selection for port 8 pin" wgroup.long 0x2C++0x3 line.long 0x0 "BRR,BRR" bitfld.long 0x0 15. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 14. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 13. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 12. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 11. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 10. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 9. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 8. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 7. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 6. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 5. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 4. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 3. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 2. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 1. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 0. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" group.long 0x30++0xB line.long 0x0 "DFR,DFR" bitfld.long 0x0 15. "DF15,Port15 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 14. "DF14,Port14 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 13. "DF13,Port13 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 12. "DF12,Port12 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 11. "DF11,Port11 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 10. "DF10,Port10 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 9. "DF9,Port9 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 8. "DF8,Port8 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 7. "DF7,Port7 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 6. "DF6,Port6 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 5. "DF5,Port5 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 4. "DF4,Port4 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 3. "DF3,Port3 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 2. "DF2,Port2 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 1. "DF1,Port1 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 0. "DF0,Port0 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" line.long 0x4 "ASR,ASR" bitfld.long 0x4 15. "AS15,Port15 analog switch" "0: disable,1: enable" bitfld.long 0x4 14. "AS14,Port14 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 13. "AS13,Port13 analog switch" "0: disable,1: enable" bitfld.long 0x4 12. "AS12,Port12 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 11. "AS11,Port11 analog switch" "0: disable,1: enable" bitfld.long 0x4 10. "AS10,Port10 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 9. "AS9,Port9 analog switch" "0: disable,1: enable" bitfld.long 0x4 8. "AS8,Port8 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 7. "AS7,Port7 analog switch" "0: disable,1: enable" bitfld.long 0x4 6. "AS6,Port6 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 5. "AS5,Port5 analog switch" "0: disable,1: enable" bitfld.long 0x4 4. "AS4,Port4 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 3. "AS3,Port3 analog switch" "0: disable,1: enable" bitfld.long 0x4 2. "AS2,Port2 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 1. "AS1,Port1 analog switch" "0: disable,1: enable" bitfld.long 0x4 0. "AS0,Port0 analog switch" "0: disable,1: enable" line.long 0x8 "CSR,CSR" bitfld.long 0x8 15. "CS15,Port15 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 14. "CS14,Port14 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 13. "CS13,Port13 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 12. "CS12,Port12 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 11. "CS11,Port11 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 10. "CS10,Port10 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 9. "CS9,Port9 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 8. "CS8,Port8 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 7. "CS7,Port7 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 6. "CS6,Port6 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 5. "CS5,Port5 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 4. "CS4,Port4 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 3. "CS3,Port3 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 2. "CS2,Port2 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 1. "CS1,Port1 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 0. "CS0,Port0 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" tree.end tree "GPIOF" base ad:0x40021400 group.long 0x0++0x13 line.long 0x0 "MODER,MODER" bitfld.long 0x0 30.--31. "MODE15,Port15 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT15_AF_MODE,3: PORT15_ANALOG_MODE" bitfld.long 0x0 28.--29. "MODE14,Port14 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT14_AF_MODE,3: PORT14_ANALOG_MODE" newline bitfld.long 0x0 26.--27. "MODE13,Port13 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT13_AF_MODE,3: PORT13_ANALOG_MODE" bitfld.long 0x0 24.--25. "MODE12,Port12 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT12_AF_MODE,3: PORT12_ANALOG_MODE" newline bitfld.long 0x0 22.--23. "MODE11,Port11 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT11_AF_MODE,3: PORT11_ANALOG_MODE" bitfld.long 0x0 20.--21. "MODE10,Port10 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT10_AF_MODE,3: PORT10_ANALOG_MODE" newline bitfld.long 0x0 18.--19. "MODE9,Port9 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT9_AF_MODE,3: PORT9_ANALOG_MODE" bitfld.long 0x0 16.--17. "MODE8,Port8 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT8_AF_MODE,3: PORT8_ANALOG_MODE" newline bitfld.long 0x0 14.--15. "MODE7,Port7 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT7_AF_MODE,3: PORT7_ANALOG_MODE" bitfld.long 0x0 12.--13. "MODE6,Port6 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT6_AF_MODE,3: PORT6_ANALOG_MODE" newline bitfld.long 0x0 10.--11. "MODE5,Port5 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT5_AF_MODE,3: PORT5_ANALOG_MODE" bitfld.long 0x0 8.--9. "MODE4,Port4 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT4_AF_MODE,3: PORT4_ANALOG_MODE" newline bitfld.long 0x0 6.--7. "MODE3,Port3 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT3_AF_MODE,3: PORT3_ANALOG_MODE" bitfld.long 0x0 4.--5. "MODE2,Port2 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT2_AF_MODE,3: PORT2_ANALOG_MODE" newline bitfld.long 0x0 2.--3. "MODE1,Port1 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT1_AF_MODE,3: PORT1_ANALOG_MODE" bitfld.long 0x0 0.--1. "MODE0,Port0 mode bits:" "0: Input mode,1: General purpose output mode,2: PORT0_AF_MODE,3: PORT0_ANALOG_MODE" line.long 0x4 "OTYPER,OTYPER" bitfld.long 0x4 15. "OT15,Port15 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 14. "OT14,Port14 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 13. "OT13,Port13 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 12. "OT12,Port12 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 11. "OT11,Port11 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 10. "OT10,Port10 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 9. "OT9,Port9 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 8. "OT8,Port8 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 7. "OT7,Port7 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 6. "OT6,Port6 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 5. "OT5,Port5 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 4. "OT4,Port4 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 3. "OT3,Port3 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 2. "OT2,Port2 input data type:" "0: Output push-pull,1: Output open-drain" newline bitfld.long 0x4 1. "OT1,Port1 input data type:" "0: Output push-pull,1: Output open-drain" bitfld.long 0x4 0. "OT0,Port0 input data type:" "0: Output push-pull,1: Output open-drain" line.long 0x8 "OSPEEDR,OSPEEDR" bitfld.long 0x8 30.--31. "OSPEED15,Port15 output speed:" "0: 24MHz,1: 48MHz,2: PORT15_96MHZ,3: PORT15_120MHZ" bitfld.long 0x8 28.--29. "OSPEED14,Port14 output speed:" "0: 24MHz,1: 48MHz,2: PORT14_96MHZ,3: PORT14_120MHZ" newline bitfld.long 0x8 26.--27. "OSPEED13,Port13 output speed:" "0: 24MHz,1: 48MHz,2: PORT13_96MHZ,3: PORT13_120MHZ" bitfld.long 0x8 24.--25. "OSPEED12,Port12 output speed:" "0: 24MHz,1: 48MHz,2: PORT12_96MHZ,3: PORT12_120MHZ" newline bitfld.long 0x8 22.--23. "OSPEED11,Port11 output speed:" "0: 24MHz,1: 48MHz,2: PORT11_96MHZ,3: PORT11_120MHZ" bitfld.long 0x8 20.--21. "OSPEED10,Port10 output speed:" "0: 24MHz,1: 48MHz,2: PORT10_96MHZ,3: PORT10_120MHZ" newline bitfld.long 0x8 18.--19. "OSPEED9,Port9 output speed:" "0: 24MHz,1: 48MHz,2: PORT9_96MHZ,3: PORT9_120MHZ" bitfld.long 0x8 16.--17. "OSPEED8,Port8 output speed:" "0: 24MHz,1: 48MHz,2: PORT8_96MHZ,3: PORT8_120MHZ" newline bitfld.long 0x8 14.--15. "OSPEED7,Port7 output speed:" "0: 24MHz,1: 48MHz,2: PORT7_96MHZ,3: PORT7_120MHZ" bitfld.long 0x8 12.--13. "OSPEED6,Port6 output speed:" "0: 24MHz,1: 48MHz,2: PORT6_96MHZ,3: PORT6_120MHZ" newline bitfld.long 0x8 10.--11. "OSPEED5,Port5 output speed:" "0: 24MHz,1: 48MHz,2: PORT5_96MHZ,3: PORT5_120MHZ" bitfld.long 0x8 8.--9. "OSPEED4,Port4 output speed:" "0: 24MHz,1: 48MHz,2: PORT4_96MHZ,3: PORT4_120MHZ" newline bitfld.long 0x8 6.--7. "OSPEED3,Port3 output speed:" "0: 24MHz,1: 48MHz,2: PORT3_96MHZ,3: PORT3_120MHZ" bitfld.long 0x8 4.--5. "OSPEED2,Port2 output speed:" "0: 24MHz,1: 48MHz,2: PORT2_96MHZ,3: PORT2_120MHZ" newline bitfld.long 0x8 2.--3. "OSPEED1,Port1 output speed:" "0: 24MHz,1: 48MHz,2: PORT1_96MHZ,3: PORT1_120MHZ" bitfld.long 0x8 0.--1. "OSPEED0,Port0 output speed:" "0: 24MHz,1: 48MHz,2: PORT0_96MHZ,3: PORT0_120MHZ" line.long 0xC "PUPDR,PUPDR" bitfld.long 0xC 30.--31. "PUPD15,Port15 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT15_PD,?" bitfld.long 0xC 28.--29. "PUPD14,Port14 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT14_PD,?" newline bitfld.long 0xC 26.--27. "PUPD13,Port13 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT13_PD,?" bitfld.long 0xC 24.--25. "PUPD12,Port12 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT12_PD,?" newline bitfld.long 0xC 22.--23. "PUPD11,Port11 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT11_PD,?" bitfld.long 0xC 20.--21. "PUPD10,Port10 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT10_PD,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port9 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT9_PD,?" bitfld.long 0xC 16.--17. "PUPD8,Port8 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT8_PD,?" newline bitfld.long 0xC 14.--15. "PUPD7,Port7 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT7_PD,?" bitfld.long 0xC 12.--13. "PUPD6,Port6 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT6_PD,?" newline bitfld.long 0xC 10.--11. "PUPD5,Port5 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT5_PD,?" bitfld.long 0xC 8.--9. "PUPD4,Port4 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT4_PD,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port3 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT3_PD,?" bitfld.long 0xC 4.--5. "PUPD2,Port2 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT2_PD,?" newline bitfld.long 0xC 2.--3. "PUPD1,Port1 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT1_PD,?" bitfld.long 0xC 0.--1. "PUPD0,Port0 pull-up/pull-down configuration bits" "0: no pull-up,1: pull-up,2: PORT0_PD,?" line.long 0x10 "DRR,DRR" bitfld.long 0x10 15. "DR15,Port15 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 14. "DR14,Port14 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 13. "DR13,Port13 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 12. "DR12,Port12 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 11. "DR11,Port11 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 10. "DR10,Port10 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 9. "DR9,Port9 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 8. "DR8,Port8 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 7. "DR7,Port7 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 6. "DR6,Port6 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 5. "DR5,Port5 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 4. "DR4,Port4 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 3. "DR3,Port3 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 2. "DR2,Port2 driving strength control:" "0: 10mA,1: 20mA" newline bitfld.long 0x10 1. "DR1,Port1 driving strength control:" "0: 10mA,1: 20mA" bitfld.long 0x10 0. "DR0,Port0 driving strength control:" "0: 10mA,1: 20mA" rgroup.long 0x14++0x3 line.long 0x0 "IDR,IDR" bitfld.long 0x0 15. "IDR15,Port15 input data" "0,1" bitfld.long 0x0 14. "IDR14,Port14 input data" "0,1" newline bitfld.long 0x0 13. "IDR13,Port13 input data" "0,1" bitfld.long 0x0 12. "IDR12,Port12 input data" "0,1" newline bitfld.long 0x0 11. "IDR11,Port11 input data" "0,1" bitfld.long 0x0 10. "IDR10,Port10 input data" "0,1" newline bitfld.long 0x0 9. "IDR9,Port9 input data" "0,1" bitfld.long 0x0 8. "IDR8,Port8 input data" "0,1" newline bitfld.long 0x0 7. "IDR7,Port7 input data" "0,1" bitfld.long 0x0 6. "IDR6,Port6 input data" "0,1" newline bitfld.long 0x0 5. "IDR5,Port5 input data" "0,1" bitfld.long 0x0 4. "IDR4,Port4 input data" "0,1" newline bitfld.long 0x0 3. "IDR3,Port3 input data" "0,1" bitfld.long 0x0 2. "IDR2,Port2 input data" "0,1" newline bitfld.long 0x0 1. "IDR1,Port1 input data" "0,1" bitfld.long 0x0 0. "IDR0,Port0 input data" "0,1" group.long 0x18++0x3 line.long 0x0 "ODR,ODR" bitfld.long 0x0 15. "ODR15,Port15 output data" "0: PORT15_OUTPUT_LOW,1: PORT15_OUTPUT_HIGH" bitfld.long 0x0 14. "ODR14,Port14 output data" "0: PORT14_OUTPUT_LOW,1: PORT14_OUTPUT_HIGH" newline bitfld.long 0x0 13. "ODR13,Port13 output data" "0: PORT13_OUTPUT_LOW,1: PORT13_OUTPUT_HIGH" bitfld.long 0x0 12. "ODR12,Port12 output data" "0: PORT12_OUTPUT_LOW,1: PORT12_OUTPUT_HIGH" newline bitfld.long 0x0 11. "ODR11,Port11 output data" "0: PORT11_OUTPUT_LOW,1: PORT11_OUTPUT_HIGH" bitfld.long 0x0 10. "ODR10,Port10 output data" "0: PORT10_OUTPUT_LOW,1: PORT10_OUTPUT_HIGH" newline bitfld.long 0x0 9. "ODR9,Port9 output data" "0: PORT9_OUTPUT_LOW,1: PORT9_OUTPUT_HIGH" bitfld.long 0x0 8. "ODR8,Port8 output data" "0: PORT8_OUTPUT_LOW,1: PORT8_OUTPUT_HIGH" newline bitfld.long 0x0 7. "ODR7,Port7 output data" "0: PORT7_OUTPUT_LOW,1: PORT7_OUTPUT_HIGH" bitfld.long 0x0 6. "ODR6,Port6 output data" "0: PORT6_OUTPUT_LOW,1: PORT6_OUTPUT_HIGH" newline bitfld.long 0x0 5. "ODR5,Port5 output data" "0: PORT5_OUTPUT_LOW,1: PORT5_OUTPUT_HIGH" bitfld.long 0x0 4. "ODR4,Port4 output data" "0: PORT4_OUTPUT_LOW,1: PORT4_OUTPUT_HIGH" newline bitfld.long 0x0 3. "ODR3,Port3 output data" "0: PORT3_OUTPUT_LOW,1: PORT3_OUTPUT_HIGH" bitfld.long 0x0 2. "ODR2,Port2 output data" "0: PORT2_OUTPUT_LOW,1: PORT2_OUTPUT_HIGH" newline bitfld.long 0x0 1. "ODR1,Port1 output data" "0: PORT1_OUTPUT_LOW,1: PORT1_OUTPUT_HIGH" bitfld.long 0x0 0. "ODR0,Port0 output data" "0: PORT0_OUTPUT_LOW,1: PORT0_OUTPUT_HIGH" wgroup.long 0x1C++0x3 line.long 0x0 "BSRR,BSRR" bitfld.long 0x0 31. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 30. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 29. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 28. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 27. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 26. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 25. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 24. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 23. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 22. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 21. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 20. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 19. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 18. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 17. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 16. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 15. "BS15,Port15 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 14. "BS14,Port14 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 13. "BS13,Port13 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 12. "BS12,Port12 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 11. "BS11,Port11 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 10. "BS10,Port10 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 9. "BS9,Port9 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 8. "BS8,Port8 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 7. "BS7,Port7 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 6. "BS6,Port6 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 5. "BS5,Port5 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 4. "BS4,Port4 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 3. "BS3,Port3 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 2. "BS2,Port2 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" newline bitfld.long 0x0 1. "BS1,Port1 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" bitfld.long 0x0 0. "BS0,Port0 set bit:" "0: No action on the corresponding od bit,1: Set the corresponding od bit" group.long 0x20++0xB line.long 0x0 "LCKR,LCKR" bitfld.long 0x0 16. "LCKK,Lock key:" "0: port configuration lock key not active,1: port configuration lock key active" bitfld.long 0x0 15. "LCK15,Port15 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 14. "LCK14,Port14 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 13. "LCK13,Port13 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 12. "LCK12,Port12 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 11. "LCK11,Port11 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 10. "LCK10,Port10 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 9. "LCK9,Port9 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 8. "LCK8,Port8 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 7. "LCK7,Port7 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 6. "LCK6,Port6 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 5. "LCK5,Port5 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 4. "LCK4,Port4 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 3. "LCK3,Port3 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 2. "LCK2,Port2 lock bit:" "0: port configuration not locked,1: port configuration locked" bitfld.long 0x0 1. "LCK1,Port1 lock bit:" "0: port configuration not locked,1: port configuration locked" newline bitfld.long 0x0 0. "LCK0,Port0 lock bit:" "0: port configuration not locked,1: port configuration locked" line.long 0x4 "AFRL,AFRL" hexmask.long.byte 0x4 28.--31. 1. "AF7,Alternate function selection for port 7 pin" hexmask.long.byte 0x4 24.--27. 1. "AF6,Alternate function selection for port 6 pin" newline hexmask.long.byte 0x4 20.--23. 1. "AF5,Alternate function selection for port 5 pin" hexmask.long.byte 0x4 16.--19. 1. "AF4,Alternate function selection for port 4 pin" newline hexmask.long.byte 0x4 12.--15. 1. "AF3,Alternate function selection for port 3 pin" hexmask.long.byte 0x4 8.--11. 1. "AF2,Alternate function selection for port 2 pin" newline hexmask.long.byte 0x4 4.--7. 1. "AF1,Alternate function selection for port 1 pin" hexmask.long.byte 0x4 0.--3. 1. "AF0,Alternate function selection for port 0 pin" line.long 0x8 "AFRH,AFRH" hexmask.long.byte 0x8 28.--31. 1. "AF15,Alternate function selection for port 15 pin" hexmask.long.byte 0x8 24.--27. 1. "AF14,Alternate function selection for port 14 pin" newline hexmask.long.byte 0x8 20.--23. 1. "AF13,Alternate function selection for port 13 pin" hexmask.long.byte 0x8 16.--19. 1. "AF12,Alternate function selection for port 12 pin" newline hexmask.long.byte 0x8 12.--15. 1. "AF11,Alternate function selection for port 11 pin" hexmask.long.byte 0x8 8.--11. 1. "AF10,Alternate function selection for port 10 pin" newline hexmask.long.byte 0x8 4.--7. 1. "AF9,Alternate function selection for port 9 pin" hexmask.long.byte 0x8 0.--3. 1. "AF8,Alternate function selection for port 8 pin" wgroup.long 0x2C++0x3 line.long 0x0 "BRR,BRR" bitfld.long 0x0 15. "BR15,Port15 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 14. "BR14,Port14 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 13. "BR13,Port13 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 12. "BR12,Port12 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 11. "BR11,Port11 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 10. "BR10,Port10 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 9. "BR9,Port9 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 8. "BR8,Port8 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 7. "BR7,Port7 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 6. "BR6,Port6 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 5. "BR5,Port5 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 4. "BR4,Port4 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 3. "BR3,Port3 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 2. "BR2,Port2 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" newline bitfld.long 0x0 1. "BR1,Port1 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" bitfld.long 0x0 0. "BR0,Port0 reset bit:" "0: No action on the corresponding od bit,1: Reset the corresponding od bit" group.long 0x30++0xB line.long 0x0 "DFR,DFR" bitfld.long 0x0 15. "DF15,Port15 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 14. "DF14,Port14 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 13. "DF13,Port13 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 12. "DF12,Port12 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 11. "DF11,Port11 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 10. "DF10,Port10 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 9. "DF9,Port9 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 8. "DF8,Port8 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 7. "DF7,Port7 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 6. "DF6,Port6 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 5. "DF5,Port5 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 4. "DF4,Port4 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 3. "DF3,Port3 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 2. "DF2,Port2 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" newline bitfld.long 0x0 1. "DF1,Port1 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" bitfld.long 0x0 0. "DF0,Port0 deglitch filter" "0: With deglitch filter,1: Without deglitch filter" line.long 0x4 "ASR,ASR" bitfld.long 0x4 15. "AS15,Port15 analog switch" "0: disable,1: enable" bitfld.long 0x4 14. "AS14,Port14 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 13. "AS13,Port13 analog switch" "0: disable,1: enable" bitfld.long 0x4 12. "AS12,Port12 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 11. "AS11,Port11 analog switch" "0: disable,1: enable" bitfld.long 0x4 10. "AS10,Port10 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 9. "AS9,Port9 analog switch" "0: disable,1: enable" bitfld.long 0x4 8. "AS8,Port8 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 7. "AS7,Port7 analog switch" "0: disable,1: enable" bitfld.long 0x4 6. "AS6,Port6 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 5. "AS5,Port5 analog switch" "0: disable,1: enable" bitfld.long 0x4 4. "AS4,Port4 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 3. "AS3,Port3 analog switch" "0: disable,1: enable" bitfld.long 0x4 2. "AS2,Port2 analog switch" "0: disable,1: enable" newline bitfld.long 0x4 1. "AS1,Port1 analog switch" "0: disable,1: enable" bitfld.long 0x4 0. "AS0,Port0 analog switch" "0: disable,1: enable" line.long 0x8 "CSR,CSR" bitfld.long 0x8 15. "CS15,Port15 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 14. "CS14,Port14 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 13. "CS13,Port13 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 12. "CS12,Port12 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 11. "CS11,Port11 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 10. "CS10,Port10 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 9. "CS9,Port9 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 8. "CS8,Port8 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 7. "CS7,Port7 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 6. "CS6,Port6 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 5. "CS5,Port5 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 4. "CS4,Port4 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 3. "CS3,Port3 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 2. "CS2,Port2 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" newline bitfld.long 0x8 1. "CS1,Port1 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" bitfld.long 0x8 0. "CS0,Port0 CMOS/Schmitt trigger input buffer configuration:" "0: Schmitt trigger input buffer,1: CMOS input buffer" tree.end tree.end tree "GPTMR (General-Purpose Timer)" base ad:0x0 tree "GPTMR0" base ad:0x40000000 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRLBIT3,The bit 3 of mst_mode_ctrl1" "0,1" bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match or input capture occurred,1: A compare match or an input capture occurred" bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set inINT_STSregister" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When the 'cc_shwd_en' bit is set" bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: A capture/compare event is generated on channel 1" bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x43 line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" bitfld.long 0xC 31. "UPDIFCPY,TCNT[31] or UIFCPY: Value depends on 'upd_if_remap' bit in theCTRL1.If 'upd_if_remap' = 0" "0,1" hexmask.long.word 0xC 16.--30. 1. "TCNTH,The register holds the Counter value[30:16] 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" newline hexmask.long.word 0xC 0.--15. 1. "TCNTL,The register holds the Counter value[15:0]" line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 16.--31. 1. "ARRH,Auto-reload register value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.' ARR is the value to be loaded in the actual auto-reload register." hexmask.long.word 0x14 0.--15. 1. "ARRL,Auto-reload register value LSB" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 16.--31. 1. "CH0CCRVALH,CH0 Capture/Compare value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVALL,CH0 Capture/Compare value LSB" line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 16.--31. 1. "CH1CCRVALH,CH1 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVALL,CH1 Capture/Compare value LSB. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 16.--31. 1. "CH2CCRVALH,CH2 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVALL,CH2 Capture/Compare value LSB. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 16.--31. 1. "CH3CCRVALH,CH3 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVALL,CH3 Capture/Compare value LSB.Refer to CCR0" line.long 0x2C "BDTR,BDTR" hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active high" newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabled" bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits in BDTR register,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CHXSEL,CHxSEL" bitfld.long 0x30 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x30 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x34 "AF1,AF1" hexmask.long.byte 0x34 20.--23. 1. "SYSBRKEN,System Break enable" bitfld.long 0x34 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x34 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" bitfld.long 0x34 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x34 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" bitfld.long 0x34 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x34 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" bitfld.long 0x34 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x34 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" bitfld.long 0x34 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x38 "AF2,AF2" bitfld.long 0x38 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" line.long 0x3C "DMACFG,DMACFG" hexmask.long.byte 0x3C 8.--13. 1. "DBL,DMA burst length" hexmask.long.byte 0x3C 0.--5. 1. "DBA,DMA base address" line.long 0x40 "DMAR,DMAR" hexmask.long 0x40 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree "GPTMR1" base ad:0x40000400 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRLBIT3,The bit 3 of mst_mode_ctrl1" "0,1" bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match or input capture occurred,1: A compare match or an input capture occurred" bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set inINT_STSregister" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When the 'cc_shwd_en' bit is set" bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: A capture/compare event is generated on channel 1" bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x43 line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" bitfld.long 0xC 31. "UPDIFCPY,TCNT[31] or UIFCPY: Value depends on 'upd_if_remap' bit in theCTRL1.If 'upd_if_remap' = 0" "0,1" hexmask.long.word 0xC 16.--30. 1. "TCNTH,The register holds the Counter value[30:16] 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" newline hexmask.long.word 0xC 0.--15. 1. "TCNTL,The register holds the Counter value[15:0]" line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 16.--31. 1. "ARRH,Auto-reload register value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.' ARR is the value to be loaded in the actual auto-reload register." hexmask.long.word 0x14 0.--15. 1. "ARRL,Auto-reload register value LSB" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 16.--31. 1. "CH0CCRVALH,CH0 Capture/Compare value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVALL,CH0 Capture/Compare value LSB" line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 16.--31. 1. "CH1CCRVALH,CH1 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVALL,CH1 Capture/Compare value LSB. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 16.--31. 1. "CH2CCRVALH,CH2 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVALL,CH2 Capture/Compare value LSB. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 16.--31. 1. "CH3CCRVALH,CH3 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVALL,CH3 Capture/Compare value LSB.Refer to CCR0" line.long 0x2C "BDTR,BDTR" hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active high" newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabled" bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits in BDTR register,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CHXSEL,CHxSEL" bitfld.long 0x30 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x30 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x34 "AF1,AF1" hexmask.long.byte 0x34 20.--23. 1. "SYSBRKEN,System Break enable" bitfld.long 0x34 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x34 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" bitfld.long 0x34 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x34 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" bitfld.long 0x34 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x34 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" bitfld.long 0x34 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x34 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" bitfld.long 0x34 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x38 "AF2,AF2" bitfld.long 0x38 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" line.long 0x3C "DMACFG,DMACFG" hexmask.long.byte 0x3C 8.--13. 1. "DBL,DMA burst length" hexmask.long.byte 0x3C 0.--5. 1. "DBA,DMA base address" line.long 0x40 "DMAR,DMAR" hexmask.long 0x40 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree "GPTMR2" base ad:0x40000800 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRLBIT3,The bit 3 of mst_mode_ctrl1" "0,1" bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match or input capture occurred,1: A compare match or an input capture occurred" bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set inINT_STSregister" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When the 'cc_shwd_en' bit is set" bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: A capture/compare event is generated on channel 1" bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x43 line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" bitfld.long 0xC 31. "UPDIFCPY,TCNT[31] or UIFCPY: Value depends on 'upd_if_remap' bit in theCTRL1.If 'upd_if_remap' = 0" "0,1" hexmask.long.word 0xC 16.--30. 1. "TCNTH,The register holds the Counter value[30:16] 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" newline hexmask.long.word 0xC 0.--15. 1. "TCNTL,The register holds the Counter value[15:0]" line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 16.--31. 1. "ARRH,Auto-reload register value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.' ARR is the value to be loaded in the actual auto-reload register." hexmask.long.word 0x14 0.--15. 1. "ARRL,Auto-reload register value LSB" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 16.--31. 1. "CH0CCRVALH,CH0 Capture/Compare value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVALL,CH0 Capture/Compare value LSB" line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 16.--31. 1. "CH1CCRVALH,CH1 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVALL,CH1 Capture/Compare value LSB. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 16.--31. 1. "CH2CCRVALH,CH2 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVALL,CH2 Capture/Compare value LSB. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 16.--31. 1. "CH3CCRVALH,CH3 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVALL,CH3 Capture/Compare value LSB.Refer to CCR0" line.long 0x2C "BDTR,BDTR" hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active high" newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabled" bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits in BDTR register,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CHXSEL,CHxSEL" bitfld.long 0x30 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x30 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x34 "AF1,AF1" hexmask.long.byte 0x34 20.--23. 1. "SYSBRKEN,System Break enable" bitfld.long 0x34 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x34 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" bitfld.long 0x34 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x34 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" bitfld.long 0x34 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x34 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" bitfld.long 0x34 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x34 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" bitfld.long 0x34 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x38 "AF2,AF2" bitfld.long 0x38 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" line.long 0x3C "DMACFG,DMACFG" hexmask.long.byte 0x3C 8.--13. 1. "DBL,DMA burst length" hexmask.long.byte 0x3C 0.--5. 1. "DBA,DMA base address" line.long 0x40 "DMAR,DMAR" hexmask.long 0x40 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree "GPTMR3" base ad:0x40000C00 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRLBIT3,The bit 3 of mst_mode_ctrl1" "0,1" bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match or input capture occurred,1: A compare match or an input capture occurred" bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set inINT_STSregister" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When the 'cc_shwd_en' bit is set" bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: A capture/compare event is generated on channel 1" bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x43 line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" bitfld.long 0xC 31. "UPDIFCPY,TCNT[31] or UIFCPY: Value depends on 'upd_if_remap' bit in theCTRL1.If 'upd_if_remap' = 0" "0,1" hexmask.long.word 0xC 16.--30. 1. "TCNTH,The register holds the Counter value[30:16] 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" newline hexmask.long.word 0xC 0.--15. 1. "TCNTL,The register holds the Counter value[15:0]" line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 16.--31. 1. "ARRH,Auto-reload register value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.' ARR is the value to be loaded in the actual auto-reload register." hexmask.long.word 0x14 0.--15. 1. "ARRL,Auto-reload register value LSB" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 16.--31. 1. "CH0CCRVALH,CH0 Capture/Compare value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVALL,CH0 Capture/Compare value LSB" line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 16.--31. 1. "CH1CCRVALH,CH1 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVALL,CH1 Capture/Compare value LSB. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 16.--31. 1. "CH2CCRVALH,CH2 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVALL,CH2 Capture/Compare value LSB. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 16.--31. 1. "CH3CCRVALH,CH3 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVALL,CH3 Capture/Compare value LSB.Refer to CCR0" line.long 0x2C "BDTR,BDTR" hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active high" newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabled" bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits in BDTR register,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CHXSEL,CHxSEL" bitfld.long 0x30 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x30 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x34 "AF1,AF1" hexmask.long.byte 0x34 20.--23. 1. "SYSBRKEN,System Break enable" bitfld.long 0x34 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x34 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" bitfld.long 0x34 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x34 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" bitfld.long 0x34 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x34 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" bitfld.long 0x34 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x34 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" bitfld.long 0x34 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x38 "AF2,AF2" bitfld.long 0x38 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" line.long 0x3C "DMACFG,DMACFG" hexmask.long.byte 0x3C 8.--13. 1. "DBL,DMA burst length" hexmask.long.byte 0x3C 0.--5. 1. "DBA,DMA base address" line.long 0x40 "DMAR,DMAR" hexmask.long 0x40 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree "GPTMR4" base ad:0x40001000 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRLBIT3,The bit 3 of mst_mode_ctrl1" "0,1" bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match or input capture occurred,1: A compare match or an input capture occurred" bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set inINT_STSregister" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When the 'cc_shwd_en' bit is set" bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: A capture/compare event is generated on channel 1" bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x43 line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" bitfld.long 0xC 31. "UPDIFCPY,TCNT[31] or UIFCPY: Value depends on 'upd_if_remap' bit in theCTRL1.If 'upd_if_remap' = 0" "0,1" hexmask.long.word 0xC 16.--30. 1. "TCNTH,The register holds the Counter value[30:16] 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" newline hexmask.long.word 0xC 0.--15. 1. "TCNTL,The register holds the Counter value[15:0]" line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 16.--31. 1. "ARRH,Auto-reload register value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.' ARR is the value to be loaded in the actual auto-reload register." hexmask.long.word 0x14 0.--15. 1. "ARRL,Auto-reload register value LSB" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 16.--31. 1. "CH0CCRVALH,CH0 Capture/Compare value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVALL,CH0 Capture/Compare value LSB" line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 16.--31. 1. "CH1CCRVALH,CH1 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVALL,CH1 Capture/Compare value LSB. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 16.--31. 1. "CH2CCRVALH,CH2 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVALL,CH2 Capture/Compare value LSB. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 16.--31. 1. "CH3CCRVALH,CH3 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVALL,CH3 Capture/Compare value LSB.Refer to CCR0" line.long 0x2C "BDTR,BDTR" hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active high" newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabled" bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits in BDTR register,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CHXSEL,CHxSEL" bitfld.long 0x30 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x30 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x34 "AF1,AF1" hexmask.long.byte 0x34 20.--23. 1. "SYSBRKEN,System Break enable" bitfld.long 0x34 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x34 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" bitfld.long 0x34 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x34 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" bitfld.long 0x34 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x34 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" bitfld.long 0x34 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x34 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" bitfld.long 0x34 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x38 "AF2,AF2" bitfld.long 0x38 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" line.long 0x3C "DMACFG,DMACFG" hexmask.long.byte 0x3C 8.--13. 1. "DBL,DMA burst length" hexmask.long.byte 0x3C 0.--5. 1. "DBA,DMA base address" line.long 0x40 "DMAR,DMAR" hexmask.long 0x40 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree "GPTMR5" base ad:0x40001400 group.long 0x0++0x13 line.long 0x0 "CTRL1,CTRL1" bitfld.long 0x0 11. "UPDIFREMAP,UPD_IF status bit remapping" "0: No remapping,1: Remapping enabled" bitfld.long 0x0 8.--9. "CLKDTFDIV,Clock division" "0: tDTS= tCLK_TMR,1: tDTS= 2 x tCLK_TMR,2: CK_KER_DIV4,?" newline bitfld.long 0x0 7. "ARRSHDWEN,Auto-reload register shadow enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered" bitfld.long 0x0 5.--6. "TCNTALIGNMODE,Center-aligned mode selection" "0: Edge-aligned mode,1: Center-aligned mode 1,2: CENTER_ALIGN2,3: CENTER_ALIGN3" newline bitfld.long 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter" bitfld.long 0x0 3. "SINGLEPLSMODE,Single pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event" newline bitfld.long 0x0 2. "UPDREQSRC,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.." bitfld.long 0x0 1. "UPDDIS,Update disable" "0: UEV enabled,1: UEV disabled" newline bitfld.long 0x0 0. "TCNTEN,Counter enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 24. "MSTMODECTRLBIT3,The bit 3 of mst_mode_ctrl1" "0,1" bitfld.long 0x4 15. "CH3NOIS,ch3n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 14. "CH3OIS,ch3 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 13. "CH2NOIS,ch2n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 12. "CH2OIS,ch2 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 11. "CH1NOIS,ch1n output Idle state" "0: LOW,1: HIGH" newline bitfld.long 0x4 10. "CH1OIS,ch1 output Idle state" "0: LOW,1: HIGH" bitfld.long 0x4 9. "CH0NOIS,ch0n output Idle state" "0: tmr_oc1n=0 after a dead-tmre when MOE=0,1: tmr_oc1n=1 after a dead-tmre when MOE=0" newline bitfld.long 0x4 8. "CH0OIS,ch0 output Idle state" "0: tmr_oc1=0,1: tmr_oc1=1" bitfld.long 0x4 7. "TI0SEL,TI0 selection" "0: The tmr_ti0_in[7,1: tmr_ti0_in[7" newline bitfld.long 0x4 4.--6. "MSTMODECTRL,Master mode selection" "0: Reset,1: Enable,?,?,?,?,?,?" bitfld.long 0x4 3. "CCDMAREQSRC,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs" newline bitfld.long 0x4 2. "CCUPDSRC,Capture/compare control update selection" "0: When capture/compare control bits are preloaded,1: When capture/compare control bits are preloaded" bitfld.long 0x4 0. "CCSHWDEN,Capture/compare preloaded control" "0: CHx_EN,1: CHx_EN" line.long 0x8 "SMCFG,SMCFG" bitfld.long 0x8 21. "ITRGSELBIT4,Trigger selection - bit 4" "0,1" bitfld.long 0x8 20. "ITRGSELBIT3,Trigger selection - bit 3" "0,1" newline bitfld.long 0x8 16. "OCREFCLRSEL,OCREF clear selection" "0: tmr_ocref_clr_int is connected to the..,1: tmr_ocref_clr_int is connected to tmr_etrf" bitfld.long 0x8 15. "ETRGP,External trigger polarity" "0: tmr_etr_in is non-inverted,1: tmr_etr_in is inverted" newline bitfld.long 0x8 14. "EXTCLKMODE1EN,External clock enable" "0: External clock mode 1 disabled,1: External clock mode 1 enabled" bitfld.long 0x8 12.--13. "ETRGFDIVCFG,External trigger prescaler" "0: Prescaler OFF,1: tmr_etr_in frequency divided by 2,2: DIV4,3: DIV8" newline hexmask.long.byte 0x8 8.--11. 1. "ETRGFILTCFG,External trigger filter" bitfld.long 0x8 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input" newline bitfld.long 0x8 4.--6. "ITRGSEL,Trigger selection" "0: Internal Trigger 0,1: Internal Trigger 1,?,?,?,?,?,?" hexmask.long.byte 0x8 0.--3. 1. "SLVMODECTRL,Slave mode selection" line.long 0xC "DMAINTEN,DMAINTEN" bitfld.long 0xC 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled" bitfld.long 0xC 14. "TRGDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled" newline bitfld.long 0xC 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled" bitfld.long 0xC 12. "CH3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled" newline bitfld.long 0xC 11. "CH2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled" bitfld.long 0xC 10. "CH1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled" newline bitfld.long 0xC 9. "CH0DE,Capture/compare 0 DMA request enable" "0: CC0 DMA request disabled,1: CC0 DMA request enabled" bitfld.long 0xC 8. "UPDDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled" newline bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled" newline bitfld.long 0xC 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled" bitfld.long 0xC 4. "CH3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled" newline bitfld.long 0xC 3. "CH2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled" bitfld.long 0xC 2. "CH1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled" newline bitfld.long 0xC 1. "CH0IE,Capture/compare 0 interrupt enable" "0: CC0 interrupt disabled,1: CC0 interrupt enabled" bitfld.long 0xC 0. "UPDIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled" line.long 0x10 "INTSTS,INTSTS" bitfld.long 0x10 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change" bitfld.long 0x10 13. "SYSBRKIF,System break interrupt flag" "0: No break event occurred,1: An active level has been detected on the system.." newline bitfld.long 0x10 12. "CH3OF,Capture/compare 3 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 11. "CH2OF,Capture/compare 2 overcapture flag" "0: CLEAR,?" newline bitfld.long 0x10 10. "CH1OF,Capture/compare 1 overcapture flag" "0: CLEAR,?" bitfld.long 0x10 9. "CH0OF,Capture/compare 0 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in CCR0.." newline bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.." bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending" newline bitfld.long 0x10 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending" bitfld.long 0x10 4. "CH3IF,Capture/compare 3 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 3. "CH2IF,Capture/compare 2 interrupt flag" "0: CLEAR,?" bitfld.long 0x10 2. "CH1IF,Capture/compare 1 interrupt flag" "0: CLEAR,?" newline bitfld.long 0x10 1. "CH0IF,Capture/compare 0 interrupt flag" "0: No compare match or input capture occurred,1: A compare match or an input capture occurred" bitfld.long 0x10 0. "UPDIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending" wgroup.long 0x14++0x3 line.long 0x0 "SWEVTGEN,SWEVTGEN" bitfld.long 0x0 7. "SWBRKGEN,Break generation" "0: No action,1: A break event is generated" bitfld.long 0x0 6. "SWTRGGEN,Trigger generation" "0: No action,1: The trg_if flag is set inINT_STSregister" newline bitfld.long 0x0 5. "SWCOMGEN,Capture/compare control update generation" "0: No action,1: When the 'cc_shwd_en' bit is set" bitfld.long 0x0 4. "SWCH3CCGEN,Capture/compare 3 generation" "?,1: ENABLE" newline bitfld.long 0x0 3. "SWCH2CCGEN,Capture/compare 2 generation" "?,1: ENABLE" bitfld.long 0x0 2. "SWCH1CCGEN,Capture/compare 1 generation" "?,1: ENABLE" newline bitfld.long 0x0 1. "SWCH0CCGEN,Capture/compare 0 generation" "0: No action,1: A capture/compare event is generated on channel 1" bitfld.long 0x0 0. "SWUPDGEN,Update generation" "0: No action,1: Reinitialize the counter and generates an update.." group.long 0x18++0x43 line.long 0x0 "CHXMODECTRL1,CHXMODECTRL1" hexmask.long 0x0 0.--24. 1. "CCMR1,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x4 "CHXMODECTRL2,CHXMODECTRL2" hexmask.long 0x4 0.--24. 1. "CCMR2,The field of this register will have different functions when the Channel is in different modes (Input capture/Output compare)" line.long 0x8 "CCER,CCER" bitfld.long 0x8 15. "CH3NP,CH3 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 14. "CH3NEN,CH3 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 13. "CH3P,CH3 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 12. "CH3EN,CH3 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 11. "CH2NP,CH2 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 10. "CH2NEN,CH2 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 9. "CH2P,CH2 Capture/Compare polarity.Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 8. "CH2EN,CH2 Capture/Compare enable.Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 7. "CH1NP,CH1 Capture/Compare complementary output polarity. Refer to CH0NP description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 6. "CH1NEN,CH1 Capture/Compare complementary output enable. Refer to ch0n_en description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 5. "CH1P,CH1 Capture/Compare polarity. Refer to CH0P description" "0: ACTIVE_HIGH,1: ACTIVE_LOW" bitfld.long 0x8 4. "CH1EN,CH1 Capture/Compare enable. Refer to CH0EN description" "0: DISABLE,1: ENABLE" newline bitfld.long 0x8 3. "CH0NP,CH0 Capture/Compare complementary output polarity" "0: tmr_oc0n active high,1: tmr_oc0n active low" bitfld.long 0x8 2. "CH0NEN,CH0 Capture/Compare complementary output enable" "0: Off,1: On" newline bitfld.long 0x8 1. "CH0P,CH0 Capture/Compare polarity" "0: the configuration is Reserved,1: non-inverted/both edges/ The circuit is.." bitfld.long 0x8 0. "CH0EN,CH0 Capture/Compare enable" "0: Capture mode disabled / OC0 is not active,1: Capture mode enabled / OC0 signal is output on.." line.long 0xC "TCNT,TCNT" bitfld.long 0xC 31. "UPDIFCPY,TCNT[31] or UIFCPY: Value depends on 'upd_if_remap' bit in theCTRL1.If 'upd_if_remap' = 0" "0,1" hexmask.long.word 0xC 16.--30. 1. "TCNTH,The register holds the Counter value[30:16] 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" newline hexmask.long.word 0xC 0.--15. 1. "TCNTL,The register holds the Counter value[15:0]" line.long 0x10 "PSC,PSC" hexmask.long.word 0x10 0.--15. 1. "PSC,Prescaler value" line.long 0x14 "ARR,ARR" hexmask.long.word 0x14 16.--31. 1. "ARRH,Auto-reload register value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.' ARR is the value to be loaded in the actual auto-reload register." hexmask.long.word 0x14 0.--15. 1. "ARRL,Auto-reload register value LSB" line.long 0x18 "RCR,RCR" hexmask.long.word 0x18 16.--31. 1. "REPCNT,Repetition counter real value" hexmask.long.word 0x18 0.--15. 1. "REPVAL,Repetition counter reload value" line.long 0x1C "CCR0,CCR0" hexmask.long.word 0x1C 16.--31. 1. "CH0CCRVALH,CH0 Capture/Compare value MSB 'Depends on the bitwidth of TCNT 16bit Timer do not have this field.'" hexmask.long.word 0x1C 0.--15. 1. "CH0CCRVALL,CH0 Capture/Compare value LSB" line.long 0x20 "CCR1,CCR1" hexmask.long.word 0x20 16.--31. 1. "CH1CCRVALH,CH1 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x20 0.--15. 1. "CH1CCRVALL,CH1 Capture/Compare value LSB. Refer to CCR0" line.long 0x24 "CCR2,CCR2" hexmask.long.word 0x24 16.--31. 1. "CH2CCRVALH,CH2 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x24 0.--15. 1. "CH2CCRVALL,CH2 Capture/Compare value LSB. Refer to CCR0" line.long 0x28 "CCR3,CCR3" hexmask.long.word 0x28 16.--31. 1. "CH3CCRVALH,CH3 Capture/Compare value MSB. 'Depends on the bitwidth of TCNT 16bit Timer does not have this field.'" hexmask.long.word 0x28 0.--15. 1. "CH3CCRVALL,CH3 Capture/Compare value LSB.Refer to CCR0" line.long 0x2C "BDTR,BDTR" hexmask.long.byte 0x2C 16.--19. 1. "BRKFILTCFG,Break filter" bitfld.long 0x2C 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.." newline bitfld.long 0x2C 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.." bitfld.long 0x2C 13. "BRKP,Break polarity" "0: Break input tmr_brk is active low,1: Break input tmr_brk is active high" newline bitfld.long 0x2C 12. "BRKEN,Break enable" "0: Break function disabled,1: Break function enabled" bitfld.long 0x2C 11. "OSSR,Off-state selection for Run mode" "0: When inactive,1: When inactive" newline bitfld.long 0x2C 10. "OSSI,Off-state selection for idle mode" "0: When inactive,1: When inactive" bitfld.long 0x2C 8.--9. "LOCK,Lock configuration" "0: LOCK OFF,1: DTG bits in BDTR register,2: LOCK Level 1 + CC Polarity bits,3: LOCK Level 2 + CC Control bits" newline hexmask.long.byte 0x2C 0.--7. 1. "DTG,Dead-tmre generator setup" line.long 0x30 "CHXSEL,CHxSEL" bitfld.long 0x30 24.--26. "CH3SRCSEL,Selects tmr_ch3[0..7] input" "0: tmr_ch3_in0: TIMx_CH3,1: tmr_ch3_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 16.--18. "CH2SRCSEL,Selects tmr_ch2[0..7] input" "0: tmr_ch2_in0: TIMx_ch2,1: tmr_ch2_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x30 8.--10. "CH1SRCSEL,Selects tmr_ch1[0..7] input" "0: tmr_ch1_in0: TIMx_ch1,1: tmr_ch1_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" bitfld.long 0x30 0.--2. "CH0SRCSEL,Selects tmr_ch0[0..7] input" "0: tmr_ch0_in0: TIMx_ch0,1: tmr_ch0_in1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" line.long 0x34 "AF1,AF1" hexmask.long.byte 0x34 20.--23. 1. "SYSBRKEN,System Break enable" bitfld.long 0x34 16.--18. "ETRGSEL,etr_in source selection" "0: tmr_etr0: TIMx_ETR input,1: tmr_etr1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7" newline bitfld.long 0x34 11. "BRKCOMP3P,tmr_brk_cmp3 input polarity" "0: tmr_brk_cmp3 input polarity is not inverted,1: tmr_brk_cmp3 input polarity is inverted" bitfld.long 0x34 10. "BRKCOMP2P,tmr_brk_cmp2 input polarity" "0: tmr_brk_cmp2 input polarity is not inverted,1: tmr_brk_cmp2 input polarity is inverted" newline bitfld.long 0x34 9. "BRKCOMP1P,tmr_brk_cmp1 input polarity" "0: tmr_brk_cmp1 input polarity is not inverted,1: tmr_brk_cmp1 input polarity is inverted" bitfld.long 0x34 8. "BRKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted,1: TIMx_BKIN input polarity is inverted" newline bitfld.long 0x34 3. "BRKCOMP3EN,tmr_brk_cmp3 enable" "0: tmr_brk_cmp3 input disabled,1: tmr_brk_cmp3 input enabled" bitfld.long 0x34 2. "BRKCOMP2EN,tmr_brk_cmp2 enable" "0: tmr_brk_cmp2 input disabled,1: tmr_brk_cmp2 input enabled" newline bitfld.long 0x34 1. "BRKCOMP1EN,tmr_brk_cmp1 enable" "0: tmr_brk_cmp1 input disabled,1: tmr_brk_cmp1 input enabled" bitfld.long 0x34 0. "BRKINEN,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled" line.long 0x38 "AF2,AF2" bitfld.long 0x38 16.--17. "OCREFCLRSRCSEL,ocref_clr source selection" "0: tmr_ocref_clr0,1: tmr_ocref_clr1,2: IN2,3: IN3" line.long 0x3C "DMACFG,DMACFG" hexmask.long.byte 0x3C 8.--13. 1. "DBL,DMA burst length" hexmask.long.byte 0x3C 0.--5. 1. "DBA,DMA base address" line.long 0x40 "DMAR,DMAR" hexmask.long 0x40 0.--31. 1. "DMAB,DMA register for burst accesses" tree.end tree.end tree "HASH (Hash Processor)" base ad:0x48000800 group.long 0x0++0xB line.long 0x0 "CR0,CR0" bitfld.long 0x0 5.--6. "ALGSEL,Algorithm selection" "0: Select sha1,1: Select md5,2: Select sha224,3: Select sha256" bitfld.long 0x0 4. "BURST,Burst operation" "0: One DMA request for one data,1: One DMA request for four data" bitfld.long 0x0 2.--3. "DATATYPESEL,Data type selection" "0: 32bit data,1: 16bit data,2: 8bit data,3: 1bit data" newline bitfld.long 0x0 1. "DMAEN,Dma enable" "0: Disable DMA transfer,1: Enable DMA transfer" bitfld.long 0x0 0. "INIT,Initialize message digest calculation" "0,1" line.long 0x4 "DIN,DIN" hexmask.long 0x4 0.--31. 1. "DIN,Hash data input register" line.long 0x8 "STR,STR" bitfld.long 0x8 15. "DIGCAL,Digest calculation" "0,1" hexmask.long.byte 0x8 0.--4. 1. "BITNUMLW,Number of valid bits in the last word." rgroup.long 0xC++0x1F line.long 0x0 "H0,H0" hexmask.long 0x0 0.--31. 1. "DR0,Hash digest register h0" line.long 0x4 "H1,H1" hexmask.long 0x4 0.--31. 1. "DR1,Hash digest register h1" line.long 0x8 "H2,H2" hexmask.long 0x8 0.--31. 1. "DR2,Hash digest register h2" line.long 0xC "H3,H3" hexmask.long 0xC 0.--31. 1. "DR3,Hash digest register h3" line.long 0x10 "H4,H4" hexmask.long 0x10 0.--31. 1. "DR4,Hash digest register h4" line.long 0x14 "H5,H5" hexmask.long 0x14 0.--31. 1. "DR5,Hash digest register h5" line.long 0x18 "H6,H6" hexmask.long 0x18 0.--31. 1. "DR6,Hash digest register h6" line.long 0x1C "H7,H7" hexmask.long 0x1C 0.--31. 1. "DR7,Hash digest register h7" group.long 0x2C++0xB line.long 0x0 "IMR,IMR" bitfld.long 0x0 1. "DIGCALIE,Digest calculation completion interrupt enable" "0: Disable digest calculation completion interrupt,1: Enable digest calculation completion interrupt" bitfld.long 0x0 0. "DATAINIE,Data input interrupt enable" "0: Disable data input interrupt,1: Enable data input interrupt" line.long 0x4 "SR,SR" hexmask.long.byte 0x4 5.--8. 1. "WORDNUM,Number of words already pushed" rbitfld.long 0x4 4. "DINNE,DIN not empty" "0,1" rbitfld.long 0x4 3. "BUSY,Busy status" "0,1" newline bitfld.long 0x4 1. "DIGCALSTAT,Digest calculation completion interrupt status" "0,1" bitfld.long 0x4 0. "DATAINSTAT,Data intput interrupt status" "0,1" line.long 0x8 "CR1,CR1" bitfld.long 0x8 31. "DMAPADEN,Enable auto-populate of message." "0: ENABLE,1: DISABLE" hexmask.long 0x8 0.--30. 1. "DMADINLEN,The length of words transferred by DMA." tree.end tree "I2C (Inter-Integrated Circuit)" base ad:0x0 tree "I2C0" base ad:0x40004C00 group.long 0x0++0x1B line.long 0x0 "CR1,CR1" bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBus alert pin,1: The SMBus alert pin is supported in host mode" newline bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled,1: Device default address enabled" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled,1: Host address enabled" newline bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled,1: General call enabled" bitfld.long 0x0 18. "WUPEN,Wakeup from Stop mode enable" "0: Wakeup from Stop mode disable,1: Wakeup from Stop mode enable" newline bitfld.long 0x0 17. "NOEXT,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled" newline bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission" newline bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled" hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" newline bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled" bitfld.long 0x0 6. "TCIEN,Transfer Complete interrupt enable" "0: Transfer Complete interrupt disabled,1: Transfer Complete interrupt enabled" newline bitfld.long 0x0 5. "STOPIEN,Stop detection Interrupt enable" "0: Stop detection,1: Stop detection" bitfld.long 0x0 4. "NACKIEN,Not acknowledge received Interrupt enable" "0: Not acknowledge,1: Not acknowledge" newline bitfld.long 0x0 3. "ADDRIEN,Address match Interrupt enable (slave only)" "0: Address match,1: Address match" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0: Receive,1: Receive" newline bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0: Transmit,1: Transmit" bitfld.long 0x0 0. "I2CEN,I2C enable" "0: Peripheral i2c disable,1: Peripheral i2c enable" line.long 0x4 "CR2,CR2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer,1: PEC transmission/reception is requested" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: Software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.." newline bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.." hexmask.long.byte 0x4 16.--23. 1. "NBYTE,Number of bytes" newline bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: An ACK is sent after current received byte,1: A NACK is sent after current received byte" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0: No Stop generation,1: Stop generation after current byte transfer" newline bitfld.long 0x4 13. "START,Start generation" "0: No Start generation,1: Restart/Start generation" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode" newline bitfld.long 0x4 10. "RDWRN,Transfer direction (master mode)" "0: Master requests a write transfer,1: Master requests a read transfer" hexmask.long.word 0x4 0.--9. 1. "SADD,In 7-bit addressing mode (ADD10 = 0):" line.long 0x8 "OAR1,OAR1" bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0: Own address 1 disabled,1: Own address 1 enabled" bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0: Own address 1 is a 7-bit address,1: Own address 1 is a 10-bit address" newline bitfld.long 0x8 8.--9. "OA198,Interface own slave address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "OA171,Interface own slave address" newline bitfld.long 0x8 0. "OA10,Interface own slave address" "0,1" line.long 0xC "OAR2,OAR2" bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0: Own address 2 disabled,1: Own address 2 enabled" bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0: No mask,1: OA2[1] is masked and doesn't care,?,?,?,?,?,?" newline hexmask.long.byte 0xC 1.--7. 1. "OA271,Interface address" line.long 0x10 "TIMINGR,TIMINGR" hexmask.long.byte 0x10 28.--31. 1. "PREDIV,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" newline hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLHI,SCL high period (master mode)" newline hexmask.long.byte 0x10 0.--7. 1. "SCLLOW,SCL low period (master mode)" line.long 0x14 "TIMEOUTR,TIMEOUTR" bitfld.long 0x14 31. "EXTTOEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled" hexmask.long.word 0x14 16.--27. 1. "TOB,Bus timeout B" newline bitfld.long 0x14 15. "TOEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled" bitfld.long 0x14 12. "TOIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.." newline hexmask.long.word 0x14 0.--11. 1. "TOA,Bus Timeout A" line.long 0x18 "ISR,ISR" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (Slave mode)" "0: Write transfer,1: Read transfer" newline rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" newline rbitfld.long 0x18 12. "TIMEOUT,Timeout or tLOW detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1" newline rbitfld.long 0x18 10. "OVF,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1" newline rbitfld.long 0x18 6. "TC,Transfer Complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" newline rbitfld.long 0x18 4. "NACKF,Not Acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" newline bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "ICR,ICR" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "?,1: W1C" bitfld.long 0x0 12. "TIMEOUTCF,Timeout detection flag clear" "?,1: W1C" newline bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "?,1: W1C" bitfld.long 0x0 10. "OVFCF,Overrun/Underrun flag clear" "0,1" newline bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "?,1: W1C" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "?,1: W1C" newline bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "?,1: W1C" bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "?,1: W1C" newline bitfld.long 0x0 3. "ADDRCR,Address matched flag clear" "?,1: W1C" rgroup.long 0x20++0x7 line.long 0x0 "PECR,PECR" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "RXDR,RXDR" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDR,TXDR" hexmask.long.byte 0x0 0.--7. 1. "TXDR,8-bit transmit data" tree.end tree "I2C1" base ad:0x40005000 group.long 0x0++0x1B line.long 0x0 "CR1,CR1" bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBus alert pin,1: The SMBus alert pin is supported in host mode" newline bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled,1: Device default address enabled" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled,1: Host address enabled" newline bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled,1: General call enabled" bitfld.long 0x0 18. "WUPEN,Wakeup from Stop mode enable" "0: Wakeup from Stop mode disable,1: Wakeup from Stop mode enable" newline bitfld.long 0x0 17. "NOEXT,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled" newline bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission" newline bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled" hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" newline bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled" bitfld.long 0x0 6. "TCIEN,Transfer Complete interrupt enable" "0: Transfer Complete interrupt disabled,1: Transfer Complete interrupt enabled" newline bitfld.long 0x0 5. "STOPIEN,Stop detection Interrupt enable" "0: Stop detection,1: Stop detection" bitfld.long 0x0 4. "NACKIEN,Not acknowledge received Interrupt enable" "0: Not acknowledge,1: Not acknowledge" newline bitfld.long 0x0 3. "ADDRIEN,Address match Interrupt enable (slave only)" "0: Address match,1: Address match" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0: Receive,1: Receive" newline bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0: Transmit,1: Transmit" bitfld.long 0x0 0. "I2CEN,I2C enable" "0: Peripheral i2c disable,1: Peripheral i2c enable" line.long 0x4 "CR2,CR2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer,1: PEC transmission/reception is requested" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: Software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.." newline bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.." hexmask.long.byte 0x4 16.--23. 1. "NBYTE,Number of bytes" newline bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: An ACK is sent after current received byte,1: A NACK is sent after current received byte" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0: No Stop generation,1: Stop generation after current byte transfer" newline bitfld.long 0x4 13. "START,Start generation" "0: No Start generation,1: Restart/Start generation" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode" newline bitfld.long 0x4 10. "RDWRN,Transfer direction (master mode)" "0: Master requests a write transfer,1: Master requests a read transfer" hexmask.long.word 0x4 0.--9. 1. "SADD,In 7-bit addressing mode (ADD10 = 0):" line.long 0x8 "OAR1,OAR1" bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0: Own address 1 disabled,1: Own address 1 enabled" bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0: Own address 1 is a 7-bit address,1: Own address 1 is a 10-bit address" newline bitfld.long 0x8 8.--9. "OA198,Interface own slave address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "OA171,Interface own slave address" newline bitfld.long 0x8 0. "OA10,Interface own slave address" "0,1" line.long 0xC "OAR2,OAR2" bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0: Own address 2 disabled,1: Own address 2 enabled" bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0: No mask,1: OA2[1] is masked and doesn't care,?,?,?,?,?,?" newline hexmask.long.byte 0xC 1.--7. 1. "OA271,Interface address" line.long 0x10 "TIMINGR,TIMINGR" hexmask.long.byte 0x10 28.--31. 1. "PREDIV,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" newline hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLHI,SCL high period (master mode)" newline hexmask.long.byte 0x10 0.--7. 1. "SCLLOW,SCL low period (master mode)" line.long 0x14 "TIMEOUTR,TIMEOUTR" bitfld.long 0x14 31. "EXTTOEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled" hexmask.long.word 0x14 16.--27. 1. "TOB,Bus timeout B" newline bitfld.long 0x14 15. "TOEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled" bitfld.long 0x14 12. "TOIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.." newline hexmask.long.word 0x14 0.--11. 1. "TOA,Bus Timeout A" line.long 0x18 "ISR,ISR" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (Slave mode)" "0: Write transfer,1: Read transfer" newline rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" newline rbitfld.long 0x18 12. "TIMEOUT,Timeout or tLOW detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1" newline rbitfld.long 0x18 10. "OVF,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1" newline rbitfld.long 0x18 6. "TC,Transfer Complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" newline rbitfld.long 0x18 4. "NACKF,Not Acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" newline bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "ICR,ICR" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "?,1: W1C" bitfld.long 0x0 12. "TIMEOUTCF,Timeout detection flag clear" "?,1: W1C" newline bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "?,1: W1C" bitfld.long 0x0 10. "OVFCF,Overrun/Underrun flag clear" "0,1" newline bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "?,1: W1C" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "?,1: W1C" newline bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "?,1: W1C" bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "?,1: W1C" newline bitfld.long 0x0 3. "ADDRCR,Address matched flag clear" "?,1: W1C" rgroup.long 0x20++0x7 line.long 0x0 "PECR,PECR" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "RXDR,RXDR" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDR,TXDR" hexmask.long.byte 0x0 0.--7. 1. "TXDR,8-bit transmit data" tree.end tree.end tree "IWDG (Independent Watchdog)" base ad:0x40005C00 group.long 0x0++0xB line.long 0x0 "CMD,CMD" hexmask.long.word 0x0 0.--15. 1. "CMD,Command register readback value is 0" line.long 0x4 "PSC,PSC" bitfld.long 0x4 0.--2. "PSC,Prescaler divider" "0: divider/4,1: divider/8,2: divider/16,3: divider/32,4: divider/64,5: divider/128,6: divider/256,7: divider/256" line.long 0x8 "RLD,RLD" hexmask.long.word 0x8 0.--11. 1. "RELOAD,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "STS,STS" bitfld.long 0x0 4. "RLDTRGUPD,Watchdog reload trigger update" "0,1" bitfld.long 0x0 3. "ENBUPD,Watchdog enable update" "0,1" bitfld.long 0x0 2. "WINUPD,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RLDUPD,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PSCUPD,Watchdog prescaler value update" "0,1" group.long 0x10++0x7 line.long 0x0 "WIN,WIN" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "CLKSEL,CLKSEL" bitfld.long 0x4 0. "CLKSEL,IWDG clock source selection" "0: ILS,1: ELS" tree.end tree "OA (Operational Amplifier)" base ad:0x0 tree "OA0" base ad:0x40019C00 group.long 0x0++0x3 line.long 0x0 "CSR,CSR" bitfld.long 0x0 31. "LOCK,0: CSR is read-write" "0: CSR is read-write,1: CSR is read-only" rbitfld.long 0x0 30. "CALOUT,OA calibration status output" "0,1" rbitfld.long 0x0 29. "MODESELERR,mode_sel error flag" "0,1" newline rbitfld.long 0x0 28. "GPMODEERR,gp_mode error flag" "0,1" rbitfld.long 0x0 27. "INNSELERR,innsel error flag" "0,1" rbitfld.long 0x0 26. "INPSELERR,inpsel error flag" "0,1" newline hexmask.long.byte 0x0 21.--25. 1. "OSPSET,Positive input VCM offset adjustment" hexmask.long.byte 0x0 16.--20. 1. "OSNSET,Negative input VCM offset adjustment" bitfld.long 0x0 15. "OUTSEL,0: A2A_OA_OUT disconneted to A2A_OA_INT_OUT" "0: A2A_OA_OUT disconneted to A2A_OA_INT_OUT,1: A2A_OA_OUT conneted to A2A_OA_INT_OUT" newline bitfld.long 0x0 12.--14. "GAIN,0000: Non-inverting gain=2/Inverting gain=-1" "0: Non-inverting gain=2/Inverting gain=-1,1: Non-inverting gain=3/Inverting gain=-2,?,?,?,?,?,?" bitfld.long 0x0 10.--11. "INNSEL,00: OA_INN=A_OA_INN[0]" "0: OA_INN=A_OA_INN[0],1: OA_INN=A_OA_INN[1],2: INN2,3: INN3" bitfld.long 0x0 8.--9. "INPSEL,00: OA_INP=A2A_OA_INP[0]" "0: OA_INP=A2A_OA_INP[0],1: OA_INP=A2A_OA_INP[1],2: INP2,3: INP3" newline bitfld.long 0x0 6.--7. "MODE,00: Inverting Amplifier" "0: Inverting Amplifier,1: Buffer,2: NON_INVERTING_AMPLIFIER,3: reserved_not_used" bitfld.long 0x0 4.--5. "CALSEL,00: 0.033*VDDA reference voltage (trim 0.33*VDDA VCM Vos)" "0: 0,1: 0,2: 0D5VDDA,3: 0D9VDDA" bitfld.long 0x0 2. "USERTRIM,User trimming enable" "0: 'factory' trim code used,1: 'user' trim code used" newline bitfld.long 0x0 1. "CALON,0: Normal mode" "0: Normal mode,1: Calibration mode" bitfld.long 0x0 0. "OAEN,0: OA disable" "0: OA disable,1: OA enable" tree.end tree "OA1" base ad:0x4001A000 group.long 0x0++0x3 line.long 0x0 "CSR,CSR" bitfld.long 0x0 31. "LOCK,0: CSR is read-write" "0: CSR is read-write,1: CSR is read-only" rbitfld.long 0x0 30. "CALOUT,OA calibration status output" "0,1" rbitfld.long 0x0 29. "MODESELERR,mode_sel error flag" "0,1" newline rbitfld.long 0x0 28. "GPMODEERR,gp_mode error flag" "0,1" rbitfld.long 0x0 27. "INNSELERR,innsel error flag" "0,1" rbitfld.long 0x0 26. "INPSELERR,inpsel error flag" "0,1" newline hexmask.long.byte 0x0 21.--25. 1. "OSPSET,Positive input VCM offset adjustment" hexmask.long.byte 0x0 16.--20. 1. "OSNSET,Negative input VCM offset adjustment" bitfld.long 0x0 15. "OUTSEL,0: A2A_OA_OUT disconneted to A2A_OA_INT_OUT" "0: A2A_OA_OUT disconneted to A2A_OA_INT_OUT,1: A2A_OA_OUT conneted to A2A_OA_INT_OUT" newline bitfld.long 0x0 12.--14. "GAIN,0000: Non-inverting gain=2/Inverting gain=-1" "0: Non-inverting gain=2/Inverting gain=-1,1: Non-inverting gain=3/Inverting gain=-2,?,?,?,?,?,?" bitfld.long 0x0 10.--11. "INNSEL,00: OA_INN=A_OA_INN[0]" "0: OA_INN=A_OA_INN[0],1: OA_INN=A_OA_INN[1],2: INN2,3: INN3" bitfld.long 0x0 8.--9. "INPSEL,00: OA_INP=A2A_OA_INP[0]" "0: OA_INP=A2A_OA_INP[0],1: OA_INP=A2A_OA_INP[1],2: INP2,3: INP3" newline bitfld.long 0x0 6.--7. "MODE,00: Inverting Amplifier" "0: Inverting Amplifier,1: Buffer,2: NON_INVERTING_AMPLIFIER,3: reserved_not_used" bitfld.long 0x0 4.--5. "CALSEL,00: 0.033*VDDA reference voltage (trim 0.33*VDDA VCM Vos)" "0: 0,1: 0,2: 0D5VDDA,3: 0D9VDDA" bitfld.long 0x0 2. "USERTRIM,User trimming enable" "0: 'factory' trim code used,1: 'user' trim code used" newline bitfld.long 0x0 1. "CALON,0: Normal mode" "0: Normal mode,1: Calibration mode" bitfld.long 0x0 0. "OAEN,0: OA disable" "0: OA disable,1: OA enable" tree.end tree.end tree "PMU (Power Management Unit)" base ad:0x40005800 group.long 0x0++0x7 line.long 0x0 "CR00,CR00" bitfld.long 0x0 8. "DBP,Disable backup domain write protection" "0: Access to RTC and Backup registers disabled,1: Access to RTC and Backup registers enabled" bitfld.long 0x0 4. "LPR,Low-power run" "0: NORMAL_RUN,1: LP_RUN" newline bitfld.long 0x0 0. "STOPFRC,When lpms=1000 Force enter stop" "?,1: FORCE_STOP" line.long 0x4 "CR01,CR01" bitfld.long 0x4 10. "SRAMSYNCEN,Enable sram parameter synchronizer" "0: SRAM_PARA_UNSYNC,1: SRAM_PARA_SYNC" bitfld.long 0x4 9. "STOPSRAM2RET,When stop the 16KB sram in sram2 retation enable:" "0: power down,1: retation" newline bitfld.long 0x4 8. "STOPSRAM1RET1,When stop the second 64KB sram in sram1 retation enable:" "0: power down,1: retation" bitfld.long 0x4 7. "STOPSRAM1RET0,When stop the first 64KB sram in sram1 retation enable:" "0: power down,1: retation" newline bitfld.long 0x4 6. "STOPSRAM0RET2,When stop the third 64KB sram in sram0 retation enable:" "0: power down,1: retation" bitfld.long 0x4 5. "STOPSRAM0RET1,When stop the second 64KB sram in sram0 retation enable:" "0: power down,1: retation" newline bitfld.long 0x4 4. "STOPSRAM0RET0,When stop the first 64KB sram in sram0 retation enable:" "0: power down,1: retation" hexmask.long.byte 0x4 0.--3. 1. "LPMS,Low-power mode selection" group.long 0xC++0x3 line.long 0x0 "CR03,CR03" bitfld.long 0x0 0. "SVSEN,Programmable voltage detector enable" "0: Programmable voltage detector disable,1: Programmable voltage detector enable" group.long 0x14++0x3 line.long 0x0 "CR05,CR05" bitfld.long 0x0 14. "IHSCALUPDENFRC,Keep the bit low If user want to calibrate the ihs use ihs_trim This bit should set 1 first." "0: IHS_CAL_DIS,1: IHS_CAL_EN" hexmask.long.word 0x0 0.--13. 1. "IHSTRIM,Freq trim bit" group.long 0x44++0x3 line.long 0x0 "CR11,CR11" bitfld.long 0x0 8.--9. "SWLDORAMRA,Ram ra parameter software configue" "0,1,2,3" bitfld.long 0x0 4.--6. "SWLDORAMWA,Ram wa parameter software configue" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "SWLDORAMRM,Ram rm parameter software configue" group.long 0xA8++0x7 line.long 0x0 "CR2A,CR2A" bitfld.long 0x0 15. "EIWUL,Enable internal wakeup line" "0: Internal wakeup line disable,1: Internal wakeup line enable" bitfld.long 0x0 4. "EWUP5,Enable Wakeup pin WKUP5" "0: WKUP5_DIS,1: WKUP5_EN" newline bitfld.long 0x0 3. "EWUP4,Enable Wakeup pin WKUP4" "0: WKUP4_DIS,1: WKUP4_EN" bitfld.long 0x0 2. "EWUP3,Enable Wakeup pin WKUP3" "0: WKUP3_DIS,1: WKUP3_EN" newline bitfld.long 0x0 1. "EWUP2,Enable Wakeup pin WKUP2" "0: WKUP2_DIS,1: WKUP2_EN" bitfld.long 0x0 0. "EWUP1,Enable Wakeup pin WKUP1" "0: WKUP1_DIS,1: WKUP1_EN" line.long 0x4 "CR2B,CR2B" bitfld.long 0x4 4. "WP5,Wakeup pin WKUP5 polarity" "0: Detection on high level,1: Detection on low level" bitfld.long 0x4 3. "WP4,Wakeup pin WKUP4 polarity" "0: Detection on high level,1: Detection on low level" newline bitfld.long 0x4 2. "WP3,Wakeup pin WKUP3 polarity" "0: Detection on high level,1: Detection on low level" bitfld.long 0x4 1. "WP2,Wakeup pin WKUP2 polarity" "0: Detection on high level,1: Detection on low level" newline bitfld.long 0x4 0. "WP1,Wakeup pin WKUP1 polarity" "0: Detection on high level,1: Detection on low level" rgroup.long 0xB0++0x3 line.long 0x0 "SR1,SR1" bitfld.long 0x0 15. "WUFI,Wakeup flag internal" "0,1" bitfld.long 0x0 10. "SDF,Shutdown flag" "0: The device did not enter the Standby mode,1: The device entered the Standby mode" newline bitfld.long 0x0 9. "SB2F,Standby2 flag" "0: The device did not enter the Standby mode,1: The device entered the Standby mode" bitfld.long 0x0 8. "SB1F,Standby1 flag" "0: The device did not enter the Standby mode,1: The device entered the Standby mode" newline bitfld.long 0x0 4. "WUF5,Wakeup flag 5" "0,1" bitfld.long 0x0 3. "WUF4,Wakeup flag 4" "0,1" newline bitfld.long 0x0 2. "WUF3,Wakeup flag 3" "0,1" bitfld.long 0x0 1. "WUF2,Wakeup flag 2" "0,1" newline bitfld.long 0x0 0. "WUF1,Wakeup flag 1" "0,1" group.long 0xB4++0x3 line.long 0x0 "CSR1,CSR1" bitfld.long 0x0 8. "CSBF,Clear standby flag" "?,1: CLEAR_FLAG" bitfld.long 0x0 4. "CWUF5,Clear wakeup flag 5" "?,1: CLEAR_FLAG" newline bitfld.long 0x0 3. "CWUF4,Clear wakeup flag 4" "?,1: CLEAR_FLAG" bitfld.long 0x0 2. "CWUF3,Clear wakeup flag 3" "?,1: CLEAR_FLAG" newline bitfld.long 0x0 1. "CWUF2,Clear wakeup flag 2" "?,1: CLEAR_FLAG" bitfld.long 0x0 0. "CWUF1,Clear wakeup flag 1" "?,1: CLEAR_FLAG" rgroup.long 0xB8++0x3 line.long 0x0 "SR2,SR2" bitfld.long 0x0 4. "SVSOUT1,Programmable voltage detector1 output" "0: VDD is above the selected PVD threshold,1: VDD is below the selected PVD threshold" bitfld.long 0x0 3. "SVSOUT0,Programmable voltage detector0 output" "0: VDD is above the selected PVD threshold,1: VDD is below the selected PVD threshold" newline bitfld.long 0x0 2. "LPF,Low-power regulator adjust flag" "0: The regulator adjust is done,1: The regulator adjust is running" bitfld.long 0x0 0. "FLASHRDY,Flash ready flag" "0: Flash memory in power-down,1: Flash memory ready to be accessed" rgroup.long 0xC8++0x3 line.long 0x0 "CSR4,CSR4" hexmask.long.word 0x0 0.--13. 1. "IHSTRIM,the ihs trim value currently in use" tree.end tree "QSPI (Quad Serial Peripheral Interface)" base ad:0xE0044000 group.long 0x0++0x3 line.long 0x0 "CR,CR" hexmask.long.byte 0x0 24.--29. 1. "SCKSCALER,Clock pre-scaler." bitfld.long 0x0 16.--18. "CSRHT,CSRHT+2 defines the minimum number of CLK cycles in which the chip select (CSn) must remain high between commands issued to the flash device memory." "0: CSn stays high for at least 2 cycles between..,1: CSn stays high for at least 3 cycles between..,?,?,?,?,?,7: CSn stays high for at least 9 cycles between.." newline hexmask.long.byte 0x0 8.--12. 1. "FMSIZE,Flash memory size." bitfld.long 0x0 5. "XIPMODE,XIP mode select in direct read access mode." "0: The flash device memory will exit XIP mode,1: The flash device memory will enter XIP mode" newline bitfld.long 0x0 4. "SCKMODE,SCK MODE select Mode 0/Mode 3." "0: SCK must stay low while CSn is inactive,1: SCK must stay high while CSn is inactive" bitfld.long 0x0 0.--1. "OPMODE,Operation mode select." "0: Direct read access mode,1: Reserved,2: Indirect mode,3: Inactive mode" rgroup.long 0x4++0x3 line.long 0x0 "SR,SR" hexmask.long.byte 0x0 24.--27. 1. "FIFODEPTH,This field shows the implementation of FIFO DEPTH. It is just for software to access." hexmask.long.byte 0x0 12.--15. 1. "FIFOLEVEL,This field gives the number of valid bytes held in the FIFO." newline bitfld.long 0x0 9. "FIFOFULL,This bit is set when the FIFO is full. This bit is usually used in indirect mode." "0,1" bitfld.long 0x0 8. "FIFOEMPTY,This bit is set when the FIFO is empty. This bit is usually used in indirect mode." "0,1" newline bitfld.long 0x0 6. "XIPSTATUS,This bit indicates that the core is in XIP mode." "0,1" bitfld.long 0x0 5. "BUSY,This bit is set when an operation on QSPI-Bus is ongoing. It means that the SCK wire is toggled in the QSPI bus." "0,1" newline bitfld.long 0x0 4. "TCF,Transfer complete flag." "0,1" bitfld.long 0x0 2. "OPCRCF,Operation mode change request complete flag." "0,1" newline bitfld.long 0x0 0.--1. "CUR_OP,Current operation mode." "0: Direct read mode,1: Reserved,2: Indirect access mode,3: Inactive mode" group.long 0x8++0x1F line.long 0x0 "RMCR,RMCR" bitfld.long 0x0 31. "DDRMODE,This bit sets the DDR mode for the address alternate byte and data phase:" "0: DDR mode disabled,1: DDR mode enabled" bitfld.long 0x0 30. "NOWRAP,QSPI does not support WRAP in direct read mode." "0: QSPI should follow the AHB transaction,1: QSPI does not follow the AHB transaction always" newline bitfld.long 0x0 29. "WRAPMODE,Flash memory device supports wrap transaction mode selection in direct read access mode." "0: The flash device memory is not in wrap mode,1: The flash device memory is in wrap mode" hexmask.long.byte 0x0 24.--28. 1. "NUMDC,Number of dummy cycles." newline bitfld.long 0x0 22.--23. "RXDLY,RX delay." "0: 0 AHB bus clock delay,1: 1 AHB bus clock delay,?,?" bitfld.long 0x0 20.--21. "DSIZE,Data size." "0: Reserved,1: Reserved,?,?" newline bitfld.long 0x0 18.--19. "DMODE,Data mode." "0: Reserved,1: Data on a single line,?,?" bitfld.long 0x0 16.--17. "ABSIZE,Alternate bytes size." "0: 8-bit alternate bytes,1: 16-bit alternate bytes,?,?" newline bitfld.long 0x0 14.--15. "ABMODE,Alternate bytes mode." "0: No alternate bytes,1: Alternate bytes on a single line,?,?" bitfld.long 0x0 12.--13. "ADSIZE,Address size." "0: Reserved,1: Reserved,?,?" newline bitfld.long 0x0 10.--11. "ADMODE,Address mode." "0: No address bytes,1: Address on a single line,?,?" bitfld.long 0x0 8.--9. "IMODE,Instruction mode." "0: No instruction bytes,1: Instruction on a single line,?,?" newline hexmask.long.byte 0x0 0.--7. 1. "INSTRUCTION,Direct read access mode instruction sent to the SPI device." line.long 0x4 "OMCR,OMCR" bitfld.long 0x4 31. "DDRMODE,This bit sets the DDR mode for the address alternate byte and data phase:" "0: DDR mode disabled,1: DDR mode enabled" bitfld.long 0x4 30. "IDMODE,Indirect access mode data phase direction." "0: Read data,1: Write data" newline bitfld.long 0x4 29. "XIPIMMENTER,This bit indicates that when QSPI's FSM comes back from indirect access QSPI_SR.XIPSTATUS will be set/cleared to indicate whether the flash device is in XIP mode." "0,1" hexmask.long.byte 0x4 24.--28. 1. "NUMDC,Number of dummy cycles." newline bitfld.long 0x4 22.--23. "RXDLY,RX delay." "0: 0 AHB bus clock delay,1: 1 AHB bus clock delay,?,?" bitfld.long 0x4 20.--21. "DSIZE,Data size." "0: 8 bits data,1: 16 bits data,?,?" newline bitfld.long 0x4 18.--19. "DMODE,Data mode." "0: Reserved,1: Data on a single line,?,?" bitfld.long 0x4 16.--17. "ABSIZE,Alternate bytes size." "0: 8-bit alternate bytes,1: 16-bit alternate bytes,?,?" newline bitfld.long 0x4 14.--15. "ABMODE,Alternate bytes mode." "0: No alternate bytes,1: Alternate bytes on a single line,?,?" bitfld.long 0x4 12.--13. "ADSIZE,Address size." "0: 8-bit address,1: 16-bit address,?,?" newline bitfld.long 0x4 10.--11. "ADMODE,Address mode." "0: No address bytes,1: Address on a single line,?,?" bitfld.long 0x4 8.--9. "IMODE,Instruction mode." "0: No instruction bytes,1: Instruction on a single line,?,?" newline hexmask.long.byte 0x4 0.--7. 1. "INSTRUCTION,Indirect access mode instruction sent to the SPI device." line.long 0x8 "RABR,RABR" hexmask.long 0x8 0.--31. 1. "ALT,Alternate bytes." line.long 0xC "OABR,OABR" hexmask.long 0xC 0.--31. 1. "ALT,Alternate bytes." line.long 0x10 "IMAR,IMAR" hexmask.long 0x10 0.--31. 1. "IMADDR,Address to be sent to the external SPI device." line.long 0x14 "FDR,FDR" hexmask.long 0x14 0.--31. 1. "FIFODATA,Data to be sent/received to/from the external SPI device. This field is only used in indirect access mode." line.long 0x18 "DLR,DLR" hexmask.long.tbyte 0x18 0.--19. 1. "DL,Transfer data length." line.long 0x1C "WCNT,WCNT" hexmask.long 0x1C 0.--29. 1. "WCNT,Wait counter value." tree.end tree "RCC (Reset and Clock Control)" base ad:0x48001000 group.long 0x0++0x1B line.long 0x0 "CR,CR" rbitfld.long 0x0 25. "PLLRDY,Set by hardware to indicate that the main PLL is locked." "0: PLL unlocked,1: PLL locked" newline bitfld.long 0x0 24. "PLLON,Set and cleared by software to enable the main PLL." "0: PLL OFF,1: PLL ON" newline bitfld.long 0x0 19. "CSSON,Set by software to enable the clock security system. When CSSON is set the clock detector is enabled by hardware when the EHS oscillator is ready and disabled by hardware if an EHS clock failure is detected. This bit is set only and is cleared by.." "0: Clock security system OFF,1: Clock security system ON" newline bitfld.long 0x0 18. "EHSBYP,Set and cleared by software to bypass the oscillator with an external clock. The external clock must be enabled with the EHSON bit set to be used by the device. The EHSBYP bit can be written only if the EHS oscillator is disabled." "0: EHS crystal oscillator not bypassed,1: EHS crystal oscillator bypassed with external.." newline rbitfld.long 0x0 17. "EHSRDY,Set by hardware to indicate that the EHS oscillator is stable." "0: EHS oscillator not ready,1: EHS oscillator ready" newline bitfld.long 0x0 16. "EHSON,Set and cleared by software." "0: EHS oscillator OFF,1: EHS oscillator ON" newline bitfld.long 0x0 15. "EHSECLKON,Set and cleared by software." "0: EHS clk output to external OFF,1: EHS clk output to external ON" newline rbitfld.long 0x0 10. "IHSRDY,Set by hardware to indicate that IHS oscillator is stable. This bit is set only when IHS is enabled by software by setting HSION." "0: IHS oscillator not ready,1: IHS oscillator ready" newline bitfld.long 0x0 8. "IHSON,Set and cleared by software." "0: IHS oscillator OFF,1: IHS oscillator ON" line.long 0x4 "CR1,CR1" bitfld.long 0x4 16. "EHSTESTEN,1: enable DC test mux and clock test buffer" "?,1: enable DC test mux and clock test buffer" newline hexmask.long.byte 0x4 8.--15. 1. "EHSCTRL,The 2 MSBs EHSCTRL[7:6] are EHS_READY_GATING (EHSCTRL[7]) and EHS_READY_SET (EHSCTRL[6]) respectively." newline hexmask.long.byte 0x4 0.--7. 1. "EHSFREQSEL,THE 4MSBs are Reserved." line.long 0x8 "CFGR,CFGR" bitfld.long 0x8 27. "MCOEN,MCO clk enable" "0: disable,1: enable" newline bitfld.long 0x8 24.--26. "MCOSEL,Microcontroller clock output" "0: SYSCLK system clock selected,1: IHS clock selected,?,?,?,?,?,?" newline hexmask.long.byte 0x8 16.--23. 1. "MCOPRE,Microcontroller clock output prescaler" newline bitfld.long 0x8 11.--13. "PPRE2,Set and cleared by software to control the division factor of the APB2 clock (PCLK2)." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 8.--10. "PPRE1,Set and cleared by software to control the division factor of the APB1 clock (PCLK1)." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 4.--7. 1. "HPRE,AHB prescaler" newline rbitfld.long 0x8 2.--3. "SWS,Set and cleared by hardware to indicate which clock source is used as system clock." "0: IHS oscillator used as system clock,1: EHS used as system clock,?,?" newline bitfld.long 0x8 0.--1. "SW,Set and cleared by software to select system clock source (SYSCLK)." "0: IHS selected as system clock,1: EHS selected as system clock,2: CLK_PLL,?" line.long 0xC "PLLCFGR1,PLLCFGR1" rbitfld.long 0xC 29. "PLLFREFLEAD,If fref is greater ffb this signal would get high." "0,1" newline bitfld.long 0xC 27.--28. "PLLDIV48M,00: DIV2" "0: DIV2,1: DIV4,?,?" newline bitfld.long 0xC 26. "PLLDIV48MPD,PLLDIV48M output clock pd control:" "0: turn on DIV4 if PLLON=1,1: turn off DIV4" newline bitfld.long 0xC 13.--14. "PLLODIV,00: DIV2" "0: DIV2,1: DIV4,?,?" newline hexmask.long.byte 0xC 5.--12. 1. "PLLFBDIV,Divider value valid range: 7~180" newline bitfld.long 0xC 3.--4. "PLLINDIV,Input divider" "0: DIV1,1: DIV2,?,?" newline bitfld.long 0xC 2. "PLLMANUALRSTN,Mannually restart PLL" "0,1" newline bitfld.long 0xC 0.--1. "PLLSRC,Main PLL entry clock source:" "0: No clock sent to PLL,1: No clock sent to PLL,2: REF_CLK_IHS,3: REF_CLK_EHS" line.long 0x10 "PLLCFGR2,PLLCFGR2" bitfld.long 0x10 29.--30. "PLLRDIVFRAC,RDIV frac div ratio part: 0:0.25:0.75." "0: 0,?,?,?" newline hexmask.long.byte 0x10 25.--28. 1. "PLLRDIVINT,RDIV int div ratio part: 4~15." newline hexmask.long.byte 0x10 17.--24. 1. "PLLRDIVCTRL,PLLRDIVCTRL" newline bitfld.long 0x10 16. "PLLRDIVPD,PLLRDIV output clock pd control:" "0: turn on RDIV if PLLON=1,1: turn off RDIV" newline hexmask.long.byte 0x10 8.--15. 1. "PLLCTRL1,Private reg" newline hexmask.long.byte 0x10 0.--7. 1. "PLLCTRL0,Private reg" line.long 0x14 "CR2,CR2" hexmask.long.word 0x14 16.--27. 1. "EHSCSSTARGETCLKCNTEND,ehs_css clk_ehs counter" newline hexmask.long.word 0x14 0.--11. 1. "EHSCSSLOCALCLKCNTEND,ehs_css clk_ihs counter this counter will restart from 0 when clk_ehs counter reach ehs_css_target_clk_cnt_end. If clk_ihs counter reach ehs_css_local_clk_cnt_end css fail detected." line.long 0x18 "CIER,CIER" bitfld.long 0x18 6. "ELSCSSIE,ELS clock security system interrupt enable:" "0: Clock security interrupt caused by ELS clock..,1: Clock security interrupt caused by ELS clock.." newline bitfld.long 0x18 4. "PLLRDYIE,PLL ready interrupt enable:" "0: PLL lock interrupt disabled,1: PLL lock interrupt enabled" newline bitfld.long 0x18 3. "EHSRDYIE,EHS ready interrupt enable:" "0: EHS ready interrupt disabled,1: EHS ready interrupt enabled" newline bitfld.long 0x18 2. "IHSRDYIE,IHS ready interrupt enable:" "0: IHS ready interrupt disabled,1: IHS ready interrupt enabled" newline bitfld.long 0x18 1. "ELSRDYIE,ELS ready interrupt enable:" "0: ELS ready interrupt disabled,1: ELS ready interrupt enabled" newline bitfld.long 0x18 0. "ILSRDYIE,ILS ready interrupt enable:" "0: ILS ready interrupt disabled,1: ILS ready interrupt enabled" rgroup.long 0x1C++0x3 line.long 0x0 "CIFR,CIFR" bitfld.long 0x0 6. "ELSCSSF,ELS Clock security system interrupt flag:" "0: No clock security interrupt caused by ELS clock..,1: Clock security interrupt caused by ELS clock.." newline bitfld.long 0x0 5. "CSSF,Clock security system interrupt flag:" "0: No clock security interrupt caused by EHS clock..,1: Clock security interrupt caused by EHS clock.." newline bitfld.long 0x0 4. "PLLRDYF,PLL ready interrupt flag:" "0: No clock ready interrupt caused by PLL lock,1: Clock ready interrupt caused by PLL lock" newline bitfld.long 0x0 3. "EHSRDYF,EHS ready interrupt flag:" "0: No clock ready interrupt caused by the EHS..,1: Clock ready interrupt caused by the EHS oscillator" newline bitfld.long 0x0 2. "IHSRDYF,IHS ready interrupt flag:" "0: No clock ready interrupt caused by the IHS..,1: Clock ready interrupt caused by the IHS oscillator" newline bitfld.long 0x0 1. "ELSRDYF,ELS ready interrupt flag:" "0: No clock ready interrupt caused by the ELS..,1: Clock ready interrupt caused by the ELS oscillator" newline bitfld.long 0x0 0. "ILSRDYF,ILS ready interrupt flag:" "0: No clock ready interrupt caused by the ILS..,1: Clock ready interrupt caused by the ILS oscillator" wgroup.long 0x20++0x3 line.long 0x0 "CICR,CICR" bitfld.long 0x0 6. "ELSCSSC,ELS Clock security system interrupt clear" "0: No effect,1: Clear ELSCSSF flag" newline bitfld.long 0x0 5. "CSSC,Clock security system interrupt clear" "0: No effect,1: Clear CSSF flag" newline bitfld.long 0x0 4. "PLLRDYC,PLL ready interrupt clear" "0: No effect,1: Clear PLLRDYF flag" newline bitfld.long 0x0 3. "EHSRDYC,EHS ready interrupt clear" "0: No effect,1: Clear EHSRDYF flag" newline bitfld.long 0x0 2. "IHSRDYC,IHS ready interrupt clear" "0: No effect,1: Clear HSIRDYF flag" newline bitfld.long 0x0 1. "ELSRDYC,ELS ready interrupt clear" "0: No effect,1: ELSRDYF cleared" newline bitfld.long 0x0 0. "ILSRDYC,ILS ready interrupt clear" "0: No effect,1: ILSRDYF cleared" group.long 0x28++0xB line.long 0x0 "AHB1RSTR,AHB1RSTR" bitfld.long 0x0 5. "GPIOFRST,IO port F reset" "0: No effect,1: Reset IO port F" newline bitfld.long 0x0 4. "GPIOERST,IO port E reset" "0: No effect,1: Reset IO port E" newline bitfld.long 0x0 3. "GPIODRST,IO port D reset" "0: No effect,1: Reset IO port D" newline bitfld.long 0x0 2. "GPIOCRST,IO port C reset" "0: No effect,1: Reset IO port C" newline bitfld.long 0x0 1. "GPIOBRST,IO port B reset" "0: No effect,1: Reset IO port B" newline bitfld.long 0x0 0. "GPIOARST,IO port A reset" "0: No effect,1: Reset IO port A" line.long 0x4 "AHB2RSTR,AHB2RSTR" bitfld.long 0x4 10. "ADCRST,ADC reset" "0: No effect,1: Reset ADC" newline bitfld.long 0x4 4. "HASHRST,HASH reset" "0: No effect,1: Reset HASH" newline bitfld.long 0x4 3. "AESRST,aes reset" "0: No effect,1: Reset aes" newline bitfld.long 0x4 2. "CRCRST,crc reset" "0: No effect,1: Reset crc" newline bitfld.long 0x4 1. "DMA1RST,DMA1 reset" "0: No effect,1: Reset DMA1" newline bitfld.long 0x4 0. "DMA0RST,DMA0 reset" "0: No effect,1: Reset DMA0" line.long 0x8 "AHB2RSTR1,AHB2RSTR1" bitfld.long 0x8 1. "FLASHRST,flash reset" "0: No effect,1: Reset flash interface" group.long 0x38++0x3 line.long 0x0 "APB1RSTR,APB1RSTR" bitfld.long 0x0 16. "PMURST,PMU reset" "0: No effect,1: Reset PMU interface" newline bitfld.long 0x0 15. "USART6RST,USART6 reset" "0: No effect,1: Reset USART6" newline bitfld.long 0x0 14. "SPI1RST,SPI1 reset" "0: No effect,1: Reset SPI1" newline bitfld.long 0x0 13. "SPI0RST,SPI0 reset" "0: No effect,1: Reset SPI0" newline bitfld.long 0x0 12. "DACRST,DAC reset" "0: No effect,1: Reset DAC" newline bitfld.long 0x0 11. "WWDGRST,wwdg reset" "0: No effect,1: Reset wwdg" newline bitfld.long 0x0 10. "USART5RST,USART5 reset" "0: No effect,1: Reset USART5" newline bitfld.long 0x0 9. "USART4RST,USART4 reset" "0: No effect,1: Reset USART4" newline bitfld.long 0x0 8. "I2C1RST,I2C1 reset" "0: No effect,1: Reset I2C1" newline bitfld.long 0x0 7. "I2C0RST,I2C0 reset" "0: No effect,1: Reset I2C0" newline bitfld.long 0x0 6. "RTCAPBRST,RTC interface reset" "0: No effect,1: Reset RTC interface" newline bitfld.long 0x0 5. "GPTMR5RST,GPTMR5 reset" "0: No effect,1: Reset GPTMR5" newline bitfld.long 0x0 4. "GPTMR4RST,GPTMR4 reset" "0: No effect,1: Reset GPTMR4" newline bitfld.long 0x0 3. "GPTMR3RST,GPTMR3 reset" "0: No effect,1: Reset GPTMR3" newline bitfld.long 0x0 2. "GPTMR2RST,GPTMR2 reset" "0: No effect,1: Reset GPTMR2" newline bitfld.long 0x0 1. "GPTMR1RST,GPTMR1 reset" "0: No effect,1: Reset GPTMR1" newline bitfld.long 0x0 0. "GPTMR0RST,GPTMR0 reset" "0: No effect,1: Reset GPTMR0" group.long 0x40++0x3 line.long 0x0 "APB2RSTR,APB2RSTR" bitfld.long 0x0 16. "TRNGRST,trng reset" "0: No effect,1: Reset trng" newline bitfld.long 0x0 15. "OA1RST,OA1 reset" "0: No effect,1: Reset OA1" newline bitfld.long 0x0 14. "OA0RST,OA0 reset" "0: No effect,1: Reset OA0" newline bitfld.long 0x0 13. "CMP1RST,CMP1 reset" "0: No effect,1: Reset CMP1" newline bitfld.long 0x0 12. "CMP0RST,CMP0 reset" "0: No effect,1: Reset CMP0" newline bitfld.long 0x0 11. "VREFBUFRST,vrefbuf reset" "0: No effect,1: Reset vrefbuf" newline bitfld.long 0x0 10. "SPI2RST,SPI2 reset" "0: No effect,1: Reset SPI2" newline bitfld.long 0x0 9. "CANRST,CAN reset" "0: No effect,1: Reset CAN" newline bitfld.long 0x0 8. "ADVTMR2RST,ADVTMR2 reset" "0: No effect,1: Reset ADVTMR2" newline bitfld.long 0x0 7. "ADVTMR1RST,ADVTMR1 reset" "0: No effect,1: Reset ADVTMR1" newline bitfld.long 0x0 6. "ADVTMR0RST,ADVTMR0 reset" "0: No effect,1: Reset ADVTMR0" newline bitfld.long 0x0 5. "SYSCFGRST,syscfg reset" "0: No effect,1: Reset syscfg" newline bitfld.long 0x0 4. "USART3RST,USART3 reset" "0: No effect,1: Reset USART3" newline bitfld.long 0x0 3. "USART2RST,USART2 reset" "0: No effect,1: Reset USART2" newline bitfld.long 0x0 2. "USART1RST,USART1 reset" "0: No effect,1: Reset USART1" newline bitfld.long 0x0 1. "USART0RST,USART0 reset" "0: No effect,1: Reset USART0" newline bitfld.long 0x0 0. "TPCRST,TPC reset" "0: No effect,1: Reset TPC" group.long 0x48++0xB line.long 0x0 "AHB1ENR,AHB1ENR" bitfld.long 0x0 5. "GPIOFEN,IO port F clock enable" "0: IO port F clock disabled,1: IO port F clock enabled" newline bitfld.long 0x0 4. "GPIOEEN,IO port E clock enable" "0: IO port E clock disabled,1: IO port E clock enabled" newline bitfld.long 0x0 3. "GPIODEN,IO port D clock enable" "0: IO port D clock disabled,1: IO port D clock enabled" newline bitfld.long 0x0 2. "GPIOCEN,IO port C clock enable" "0: IO port C clock disabled,1: IO port C clock enabled" newline bitfld.long 0x0 1. "GPIOBEN,IO port B clock enable" "0: IO port B clock disabled,1: IO port B clock enabled" newline bitfld.long 0x0 0. "GPIOAEN,IO port A clock enable" "0: IO port A clock disabled,1: IO port A clock enabled" line.long 0x4 "AHB2ENR,AHB2ENR" bitfld.long 0x4 5. "ADCEN,ADC clock enable" "0: ADC clock disabled,1: ADC clock enabled" newline bitfld.long 0x4 4. "HASHEN,HASH clock enable" "0: HASH clock disabled,1: HASH clock enabled" newline bitfld.long 0x4 3. "AESEN,aes clock enable" "0: aes clock disabled,1: aes clock enabled" newline bitfld.long 0x4 2. "CRCEN,crc clock enable" "0: crc clock disabled,1: crc clock enabled" newline bitfld.long 0x4 1. "DMA1EN,DMA1 clock enable" "0: DMA1 clock disabled,1: DMA1 clock enabled" newline bitfld.long 0x4 0. "DMA0EN,DMA0 clock enable" "0: DMA0 clock disabled,1: DMA0 clock enabled" line.long 0x8 "AHB2ENR1,AHB2ENR1" bitfld.long 0x8 1. "FLASHEN,flash clock enable" "0: flash clock disabled,1: flash clock enabled" group.long 0x58++0x3 line.long 0x0 "APB1ENR,APB1ENR" bitfld.long 0x0 16. "PMUEN,PMU apb clock enable" "0: PMU apb clock disabled,1: PMU apb clock enabled" newline bitfld.long 0x0 15. "USART6EN,USART6 clock enable" "0: USART6 clock disabled,1: USART6 clock enabled" newline bitfld.long 0x0 14. "SPI1EN,SPI1 clock enable" "0: SPI1 clock disabled,1: SPI1 clock enabled" newline bitfld.long 0x0 13. "SPI0EN,SPI0 clock enable" "0: SPI0 clock disabled,1: SPI0 clock enabled" newline bitfld.long 0x0 12. "DACEN,DAC clock enable" "0: DAC clock disabled,1: DAC clock enabled" newline bitfld.long 0x0 11. "WWDGEN,wwdg clock enable" "0: wwdg clock disabled,1: wwdg clock enabled" newline bitfld.long 0x0 10. "USART5EN,USART5 clock enable" "0: USART5 clock disabled,1: USART5 clock enabled" newline bitfld.long 0x0 9. "USART4EN,USART4 clock enable" "0: USART4 clock disabled,1: USART4 clock enabled" newline bitfld.long 0x0 8. "I2C1EN,I2C1 clock enable" "0: I2C1 clock disabled,1: I2C1 clock enabled" newline bitfld.long 0x0 7. "I2C0EN,I2C0 clock enable" "0: I2C0 clock disabled,1: I2C0 clock enabled" newline bitfld.long 0x0 6. "RTCAPBEN,RTC apb clock enable" "0: RTC apb clock disabled,1: RTC apb clock enabled" newline bitfld.long 0x0 5. "GPTMR5EN,GPTMR5 clock enable" "0: GPTMR5 clock disabled,1: GPTMR5 clock enabled" newline bitfld.long 0x0 4. "GPTMR4EN,GPTMR4 clock enable" "0: GPTMR4 clock disabled,1: GPTMR4 clock enabled" newline bitfld.long 0x0 3. "GPTMR3EN,GPTMR3 clock enable" "0: GPTMR3 clock disabled,1: GPTMR3 clock enabled" newline bitfld.long 0x0 2. "GPTMR2EN,GPTMR2 clock enable" "0: GPTMR2 clock disabled,1: GPTMR2 clock enabled" newline bitfld.long 0x0 1. "GPTMR1EN,GPTMR1 clock enable" "0: GPTMR1 clock disabled,1: GPTMR1 clock enabled" newline bitfld.long 0x0 0. "GPTMR0EN,GPTMR0 clock enable" "0: GPTMR0 clock disabled,1: GPTMR0 clock enabled" group.long 0x60++0x3 line.long 0x0 "APB2ENR,APB2ENR" bitfld.long 0x0 16. "TRNGEN,trng clock enable" "0: trng clock disabled,1: trng clock enabled" newline bitfld.long 0x0 15. "OA1EN,OA1 clock enable" "0: OA1 clock disabled,1: OA1 clock enabled" newline bitfld.long 0x0 14. "OA0EN,OA0 clock enable" "0: OA0 clock disabled,1: OA0 clock enabled" newline bitfld.long 0x0 13. "CMP1EN,CMP1 clock enable" "0: CMP1 clock disabled,1: CMP1 clock enabled" newline bitfld.long 0x0 12. "CMP0EN,CMP0 clock enable" "0: CMP0 clock disabled,1: CMP0 clock enabled" newline bitfld.long 0x0 11. "VREFBUFEN,vrefbuf clock enable" "0: vrefbuf clock disabled,1: vrefbuf clock enabled" newline bitfld.long 0x0 10. "SPI2EN,SPI2 clock enable" "0: SPI2 clock disabled,1: SPI2 clock enabled" newline bitfld.long 0x0 9. "CANEN,CAN clock enable" "0: CAN clock disabled,1: CAN clock enabled" newline bitfld.long 0x0 8. "ADVTMR2EN,ADVTMR2 clock enable" "0: ADVTMR2 clock disabled,1: ADVTMR2 clock enabled" newline bitfld.long 0x0 7. "ADVTMR1EN,ADVTMR1 clock enable" "0: ADVTMR1 clock disabled,1: ADVTMR1 clock enabled" newline bitfld.long 0x0 6. "ADVTMR0EN,ADVTMR0 clock enable" "0: ADVTMR0 clock disabled,1: ADVTMR0 clock enabled" newline bitfld.long 0x0 5. "SYSCFGEN,syscfg clock enable" "0: syscfg clock disabled,1: syscfg clock enabled" newline bitfld.long 0x0 4. "USART3EN,USART3 clock enable" "0: USART3 clock disabled,1: USART3 clock enabled" newline bitfld.long 0x0 3. "USART2EN,USART2 clock enable" "0: USART2 clock disabled,1: USART2 clock enabled" newline bitfld.long 0x0 2. "USART1EN,USART1 clock enable" "0: USART1 clock disabled,1: USART1 clock enabled" newline bitfld.long 0x0 1. "USART0EN,USART0 clock enable" "0: USART0 clock disabled,1: USART0 clock enabled" newline bitfld.long 0x0 0. "TPCEN,TPC clock enable" "0: TPC clock disabled,1: TPC clock enabled" group.long 0x70++0x7 line.long 0x0 "PLLCFGR3,PLLCFGR3" hexmask.long.byte 0x0 26.--30. 1. "PLLPFDCPCTRL,[2:0] cp current control words default: 3'd4; 6uA~13uA 1uA/step." newline bitfld.long 0x0 25. "PLLLPF3RDBYPASS,LPF R3 and C3 bypass control." "0: disable,1: enable" newline hexmask.long.byte 0x0 20.--24. 1. "PLLLPFR3,LPF R3 control words. setting1: PFD freq 4~8M; setting2: PFD freq 8~32M. setting1: 0x09; setting2: 0x09. default value is setting2." newline hexmask.long.byte 0x0 15.--19. 1. "PLLLPFR2,LPF R2 control words. setting1: PFD freq 4~8M; setting2: PFD freq 8~32M. setting1: 0x09; setting2: 0x09. default value is setting2." newline hexmask.long.byte 0x0 10.--14. 1. "PLLLPFC3,LPF C3 control words. setting1: PFD freq 4~8M; setting2: PFD freq 8~32M. setting1: 0x14; setting2: 0x02. default value is setting2." newline hexmask.long.byte 0x0 5.--9. 1. "PLLLPFC2,LPF C2 control words. setting1: PFD freq 4~8M; setting2: PFD freq 8~32M. setting1: 0x0A; setting2: 0x08. dafault value is setting2." newline hexmask.long.byte 0x0 0.--4. 1. "PLLLPFC1,LPF C1 control words. setting1: PFD freq 4~8M; setting2: PFD freq 8~32M. setting1: 0x14; setting2: 0x04. default value is setting2." line.long 0x4 "PLLCFGR4,PLLCFGR4" hexmask.long.byte 0x4 12.--16. 1. "PLLVCOCTRL,vco band control words:" newline bitfld.long 0x4 11. "PLLCLKTSTOL,0: PLL in close loop;" "0: PLL in close loop,1: PLL in open loop for freq cover range test" newline bitfld.long 0x4 9.--10. "PLLCLKTSTCTRL,00: CLK_OUT;" "0: CLK_OUT,1: CLK_RDIV_OUT,?,?" newline hexmask.long.byte 0x4 5.--8. 1. "PLLLOCKEDCTRL,PLLLOCKEDCTRL[3:2] is mode control:" newline hexmask.long.byte 0x4 1.--4. 1. "PLLTESTMUX,dc test control words" newline bitfld.long 0x4 0. "PLLTESTEN,0: disable test mode" "0: disable test mode,1: enable test mode" group.long 0x88++0x3 line.long 0x0 "CCIPR,CCIPR" bitfld.long 0x0 20.--21. "PMUSEL,2'b00: IHS" "0: IHS,1: EHS,2: ILS,3: ELS" newline bitfld.long 0x0 18.--19. "TPCSEL,TPC clock source selection:" "0: PLL clock selected as TPC clock,1: IHS clock selected as TPC clock,?,?" newline bitfld.long 0x0 16.--17. "ADCSEL,ADC clock source selection:" "0: PLL clock selected as ADC clock,1: IHS clock selected as ADC clock,?,?" newline bitfld.long 0x0 14.--15. "CANSEL,CAN clock source selection:" "0: EHS clock selected as CAN clock,1: SYSCLK selected as CAN clock,?,?" newline bitfld.long 0x0 12.--13. "USART6SEL,USART6 clock source selection" "0: PCLK selected as USART6 clock,1: System clock,?,?" newline bitfld.long 0x0 10.--11. "USART3SEL,USART3 clock source selection" "0: PCLK selected as USART3 clock,1: System clock,?,?" newline bitfld.long 0x0 8.--9. "USART2SEL,USART2 clock source selection" "0: PCLK selected as USART2 clock,1: System clock,?,?" newline bitfld.long 0x0 6.--7. "USART1SEL,USART1 clock source selection" "0: PCLK selected as USART1 clock,1: System clock,?,?" newline bitfld.long 0x0 4.--5. "USART0SEL,USART0 clock source selection" "0: PCLK selected as USART0 clock,1: System clock,?,?" newline bitfld.long 0x0 2.--3. "USART5SEL,USART5 clock source selection" "0: PCLK selected as USART5 clock,1: System clock,?,?" newline bitfld.long 0x0 0.--1. "USART4SEL,USART4 clock source selection" "0: PCLK selected as USART4 clock,1: System clock,?,?" group.long 0x94++0x1B line.long 0x0 "CSR,CSR" rbitfld.long 0x0 31. "LPWRRSTF,Low-power reset flag" "0: No illegal mode reset occurred,1: Illegal mode reset occurred" newline rbitfld.long 0x0 30. "WWDGRSTF,Window watchdog reset flag" "0: No window watchdog reset occurred,1: Window watchdog reset occurred" newline rbitfld.long 0x0 29. "IWDGRSTF,Independent window watchdog reset flag" "0: No independent watchdog reset occurred,1: Independent watchdog reset occurred" newline rbitfld.long 0x0 28. "SFTRSTF,Software reset flag" "0: No software reset occurred,1: Software reset occurred" newline rbitfld.long 0x0 27. "BORRSTF,BOR flag" "0: No BOR occurred,1: BOR occurred" newline rbitfld.long 0x0 26. "PINRSTF,Pin reset flag" "0: No reset from NRST pin occurred,1: Reset from NRST pin occurred" newline rbitfld.long 0x0 25. "OBLRSTF,Option byte loader reset flag" "0: No reset from Option Byte loading occurred,1: Reset from Option Byte loading occurred" newline bitfld.long 0x0 23. "RMVF,Remove reset flag" "0: No effect,1: Clear the reset flags" newline bitfld.long 0x0 1. "LSCOSEL,Low speed clock output selection" "0: ILS clock selected,1: ELS clock selected" newline bitfld.long 0x0 0. "LSCOEN,Low speed clock output enable" "0: Low speed clock output,1: Low speed clock output" line.long 0x4 "CFG2R,CFG2R" hexmask.long.byte 0x4 20.--24. 1. "TPCDIV,TPC divider" newline hexmask.long.byte 0x4 16.--19. 1. "ADCDIV,ADC divider" line.long 0x8 "CFG3R,CFG3R" bitfld.long 0x8 9.--11. "CANTIMERDIV,Set and cleared by software to control the division factor of the can clock (clk_can)." "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x8 0.--8. 1. "TRACEDIV,TRACECLKIN div" line.long 0xC "BDCR,BDCR" rbitfld.long 0xC 20. "RSTRDY,bd_rst ready" "0,1" newline bitfld.long 0xC 19. "BDRST,RTC domain software reset" "0: Reset not activated,1: Reset the entire RTC domain" newline bitfld.long 0xC 18. "RTCEN,RTC clock enable" "0: RTC clock disabled,1: RTC clock enabled" newline rbitfld.long 0xC 17. "ILSRDY,ILS oscillator ready" "0: ILS oscillator not ready,1: ILS oscillator ready" newline bitfld.long 0xC 16. "ILSON,ILS oscillator enable" "0: ILS oscillator OFF,1: ILS oscillator ON" newline bitfld.long 0xC 14.--15. "RTCSEL,RTC clock source selection" "0: ELS oscillator clock used as RTC clock,1: ILS oscillator clock used as RTC clock,2: RTCCLKSEL_EHS,3: RTCCLKSEL_IHS" newline rbitfld.long 0xC 13. "ELSCSSD,CSS on ELS failure Detection" "0: No failure detected on ELS,1: Failure detected on ELS" newline bitfld.long 0xC 12. "ELSCSSON,CSS on ELS enable" "0: CSS on ELS,1: CSS on ELS" newline hexmask.long.byte 0xC 4.--11. 1. "ELSCTRL,0x00: 185nA" newline bitfld.long 0xC 3. "ELSBYP,xtal/bypass work mode" "0: xtal mode,1: bypass mode" newline bitfld.long 0xC 2. "ELSFASTREADYEN,ELS will generte ready before set IB step" "0: ELS_FRDY_DIS,1: ELS_FRDY_EN" newline rbitfld.long 0xC 1. "ELSRDY,ELS oscillator ready" "0: ELS oscillator not ready,1: ELS oscillator ready" newline bitfld.long 0xC 0. "ELSON,ELS oscillator enable" "0: ELS oscillator OFF,1: ELS oscillator ON" line.long 0x10 "BDCR2,BDCR2" hexmask.long.word 0x10 0.--11. 1. "ILSTRIM,ils_trim" line.long 0x14 "BDCR3,BDCR3" hexmask.long.byte 0x14 21.--28. 1. "ILSRESERVED,ils_Reserved" newline hexmask.long.byte 0x14 17.--20. 1. "ILSTESTMUX,DC test mux control when ils_test_en = 1 this signal is valid" newline bitfld.long 0x14 16. "ILSTESTEN,ILS test enable control" "0,1" line.long 0x18 "BDCR4,BDCR4" hexmask.long.byte 0x18 8.--15. 1. "ELSCSSTARGETCLKCNTEND,els_css clk_els counter" newline hexmask.long.byte 0x18 0.--7. 1. "ELSCSSLOCALCLKCNTEND,els_css clk_ils counter this counter will restart from 0 when clk_els counter reach els_css_target_clk_cnt_end. If clk_ils counter reach els_css_local_clk_cnt_end css fail detected." group.long 0xB8++0xB line.long 0x0 "BDCR5,BDCR5" bitfld.long 0x0 16. "ELSDLYEN,When els_dly_en=1 software can modify els_ib_step_dly and els_pre_ib_dly" "0,1" newline hexmask.long.byte 0x0 8.--15. 1. "ELSIBSTEPDLY,Default 100ms for one step" newline hexmask.long.byte 0x0 0.--7. 1. "ELSPREIBDLY,Default 1s" line.long 0x4 "BDCR6,BDCR6" hexmask.long.byte 0x4 3.--6. 1. "ELSSTIB,After xtal start up decreass the ibias by logic control" newline bitfld.long 0x4 2. "ELSSTIBSWEN,When els_st_ib_sw_en=1 software can modify els_st_ib" "0,1" newline bitfld.long 0x4 1. "ELSSTIBPD,0: adjust ibias in start uo process" "0: adjust ibias in start uo process,1: stop adjust ibias in start uo process" newline bitfld.long 0x4 0. "ELSTESTEN,1: enable DC test mux and clock test buffer" "?,1: enable DC test mux and clock test buffer" line.long 0x8 "BDCR7,BDCR7" bitfld.long 0x8 0. "SWITCHD0EN,Switch d0 enable" "0,1" tree.end tree "RTC (Real-Time Clock)" base ad:0x0 tree "RTC" base ad:0x40004800 group.long 0x0++0x7 line.long 0x0 "TR,TR" bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM" bitfld.long 0x0 20.--21. "HOURT,Hour tens in BCD format" "0: 0,1: 1,2: 2,?" newline hexmask.long.byte 0x0 16.--19. 1. "HOURU,Hour units in BCD format" bitfld.long 0x0 12.--14. "MINT,Minute tens in BCD format" "0: 0,1: 1,2: 2,3: 3,4: 4,5: 5,?,?" newline hexmask.long.byte 0x0 8.--11. 1. "MINU,Minute units in BCD format" bitfld.long 0x0 4.--6. "SECT,Second tens in BCD format" "0: 0,1: 1,2: 2,3: 3,4: 4,5: 5,?,?" newline hexmask.long.byte 0x0 0.--3. 1. "SECU,Second units in BCD format" line.long 0x4 "DR,DR" hexmask.long.byte 0x4 20.--23. 1. "YEART,Year units in BCD format" hexmask.long.byte 0x4 16.--19. 1. "YEARU,Year units in BCD format" newline bitfld.long 0x4 13.--15. "WEEKU,WeekDay units in BCD format" "0: forbidden,1: Monday,2: 2,3: 3,4: 4,5: 5,6: 6,7: 7" bitfld.long 0x4 12. "MONTHT,Month tens in BCD format" "0: 0,1: 1" newline hexmask.long.byte 0x4 8.--11. 1. "MONTHU,Month units in BCD format" bitfld.long 0x4 4.--5. "DATET,Date tens in BCD format" "0: 0,1: 1,2: 2,3: 3" newline hexmask.long.byte 0x4 0.--3. 1. "DATEU,Date units in BCD format" rgroup.long 0x8++0x3 line.long 0x0 "SSR,SSR" hexmask.long.word 0x0 0.--15. 1. "SS,Sub seconds value" group.long 0xC++0x1B line.long 0x0 "ICSR,ICSR" rbitfld.long 0x0 16. "RECALBF,Recalibration pending Flag" "0,1" bitfld.long 0x0 7. "INIT,Initialization mode" "0: Free running mode,1: Initialization mode used to program time and.." newline rbitfld.long 0x0 6. "INITF,Initialization flag" "0: Calendar registers update is not allowed,1: Calendar registers update is allowed" bitfld.long 0x0 5. "RSF,Registers synchronization flag" "0: Calendar shadow registers not yet synchronized,1: Calendar shadow registers synchronized" newline rbitfld.long 0x0 4. "INITSTS,Initialization status flag" "0: Calendar has not been initialized,1: Calendar has been initialized" rbitfld.long 0x0 3. "SHIFTF,Shift operation pending" "0: No shift operation is pending,1: A shift operation is pending" newline rbitfld.long 0x0 2. "WUTWF,Wakeup timer write flag" "0: Wakeup timer configuration update not allowed..,1: Wakeup timer configuration update allowed" rbitfld.long 0x0 1. "ALRMBWF,Alarm B write flag" "0: Alarm B update not allowed,1: Alarm B update allowed" newline rbitfld.long 0x0 0. "ALRMAWF,Alarm A write flag" "0: Alarm A update not allowed,1: Alarm A update allowed" line.long 0x4 "PSCR,PSCR" hexmask.long.byte 0x4 16.--22. 1. "PSCDIVA,Asynchronous prescaler factor" hexmask.long.word 0x4 0.--14. 1. "PSCDIVS,Synchronous prescaler factor" line.long 0x8 "WUTR,WUTR" hexmask.long.word 0x8 0.--15. 1. "WUTRLDVAL,Wakeup auto-reload value bits" line.long 0xC "CR,CR" bitfld.long 0xC 31. "OUT2EN,RTC_OUT2 output enable" "0: DISABLE,1: ENBALE" bitfld.long 0xC 30. "ALRMTYPE,Alrm output type" "0: ALRM is push-pull output,1: ALRM is open-drain output" newline bitfld.long 0xC 29. "ALRMPU,ALRM pull-up enable" "0: No pull-up is applied on ALRM output,1: A pull-up is applied on ALRM output" bitfld.long 0xC 24. "ITSEN,Timestamp on internal event enable" "0: internal event timestamp disabled,1: internal event timestamp enabled" newline bitfld.long 0xC 23. "CALBOE,Calibration output enable" "0: Calibration output disabled,1: Calibration output enabled" bitfld.long 0xC 21.--22. "OSEL,Output selection" "0: Output disabled,1: Alarm A output enabled,2: ALRMB_ENABLE,3: WKP_ENABLE" newline bitfld.long 0xC 20. "POL,Output polarity" "0: The pin is high when ALRMAF/ALRMBF/WUTF is..,1: The pin is low when ALRMAF/ALRMBF/WUTF is asserted" bitfld.long 0xC 19. "CALBOSEL,Calibration output selection" "0: Calibration output is 512 Hz,1: Calibration output is 1 Hz" newline bitfld.long 0xC 18. "BKP,Backup" "0,1" bitfld.long 0xC 17. "SUB1H,Subtract 1 hour (winter time change)" "0: No effect,1: Subtracts 1 hour to the current time" newline bitfld.long 0xC 16. "ADD1H,Add 1 hour (summer time change)" "0: No effect,1: Adds 1 hour to the current time" bitfld.long 0xC 15. "TSIEN,Time-stamp interrupt enable" "0: Timestamp interrupt disable,1: Timestamp interrupt enable" newline bitfld.long 0xC 14. "WUTIEN,Wakeup timer interrupt enable" "0: Wakeup timer interrupt disabled,1: Wakeup timer interrupt enabled" bitfld.long 0xC 13. "ALRMBIEN,Alarm B interrupt enable" "0: Alarm B interrupt disable,1: Alarm B interrupt enable" newline bitfld.long 0xC 12. "ALRMAIEN,Alarm A interrupt enable" "0: Alarm A interrupt disabled,1: Alarm A interrupt enabled" bitfld.long 0xC 11. "TSEN,Timestamp enable" "0: timestamp disable,1: timestamp enable" newline bitfld.long 0xC 10. "WUTEN,Wakeup timer enable" "0: Wakeup timer disabled,1: Wakeup timer enabled" bitfld.long 0xC 9. "ALRMBEN,Alarm B enable" "0: Alarm B disabled,1: Alarm B enabled" newline bitfld.long 0xC 8. "ALRMAEN,Alarm A enable" "0: Alarm A disabled,1: Alarm A enabled" bitfld.long 0xC 6. "FMT,Hour format" "0: 24 hour/day format,1: AM/PM hour format" newline bitfld.long 0xC 5. "BYPSSHDW,Bypass the shadow registers" "0: Calendar values,1: Calendar values" bitfld.long 0xC 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60 Hz)" "0: RTC_REFIN detection disabled,1: RTC_REFIN detection enabled" newline bitfld.long 0xC 3. "TSEDGE,Timestamp event active edge" "0: RTC_TS input rising edge generates a timestamp..,1: RTC_TS input falling edge generates a timestamp.." bitfld.long 0xC 0.--2. "WUTCKSEL,ck_wut wakeup clock selection" "0: RTC/16 clock is selected,1: RTC/8 clock is selected,2: DIV4,3: DIV2,?,?,?,?" line.long 0x10 "WPR,WPR" hexmask.long.byte 0x10 0.--7. 1. "KEY,Write protection key" line.long 0x14 "CALR,CALR" bitfld.long 0x14 15. "CALP,Increase frequency of RTC by 488.5 ppm" "0: No RTCCLK pulses are added,1: One RTCCLK pulse is effectively inserted every.." bitfld.long 0x14 14. "CALW8,Use an 8-second calibration cycle period" "0: NO_EFFECT,1: 8S_CALIB" newline bitfld.long 0x14 13. "CALW16,Use a 16-second calibration cycle period" "0: NO_EFFECT,1: 16S_CALIB" hexmask.long.word 0x14 0.--8. 1. "CALM,Calibration minus" line.long 0x18 "SHIFTR,SHIFTR" bitfld.long 0x18 31. "ADD1S,Add one second" "0: No effect,1: Add one second to the clock/calendar" hexmask.long.word 0x18 0.--14. 1. "SUBFS,Subtract a fraction of a second" rgroup.long 0x28++0xB line.long 0x0 "TSTR,TSTR" bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM" bitfld.long 0x0 20.--21. "HOURT,Hour tens in BCD format" "0,1,2,3" newline hexmask.long.byte 0x0 16.--19. 1. "HOURU,Hour units in BCD format" bitfld.long 0x0 12.--14. "MINT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 8.--11. 1. "MINU,Minute units in BCD format" bitfld.long 0x0 4.--6. "SECT,Second tens in BCD format" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "SECU,Second units in BCD format" line.long 0x4 "TSDR,TSDR" bitfld.long 0x4 13.--15. "WEEKU,WeekDay units in BCD format" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12. "MONTHT,Month tens in BCD format" "0,1" newline hexmask.long.byte 0x4 8.--11. 1. "MONTHU,Month units in BCD format" bitfld.long 0x4 4.--5. "DATET,Date tens in BCD format" "0,1,2,3" newline hexmask.long.byte 0x4 0.--3. 1. "DATEU,Date units in BCD format" line.long 0x8 "TSSSR,TSSSR" hexmask.long.word 0x8 0.--15. 1. "SS,Sub second value" group.long 0x34++0x13 line.long 0x0 "ALRMAR,ALRMAR" bitfld.long 0x0 31. "DATEMASK,Alarm A date mask" "0: Alarm A set if the date/day match,1: Date/day don't care in alarm A comparison" bitfld.long 0x0 30. "WEEKSEL,Week day selection" "0: DATEU[3:0] represents the date units,1: DATEU[3:0] represents the week day" newline bitfld.long 0x0 28.--29. "DATET,Date tens in BCD format" "0: 0,1: 1,2: 2,3: 3" hexmask.long.byte 0x0 24.--27. 1. "DATEU,Date units in BCD format" newline bitfld.long 0x0 23. "HOURMASK,Alarm A hours mask" "0: Alarm A set if the hours match,1: Hours don't care in alarm A comparison" bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM" newline bitfld.long 0x0 20.--21. "HOURT,Hour tens in BCD format" "0: 0,1: 1,2: 2,?" hexmask.long.byte 0x0 16.--19. 1. "HOURU,Hour units in BCD format" newline bitfld.long 0x0 15. "MINMASK,Alarm A minutes mask" "0: Alarm A set if the minutes match,1: Minutes don't care in alarm A comparison" bitfld.long 0x0 12.--14. "MINT,Minute tens in BCD format" "0: 0,1: 1,2: 2,3: 3,4: 4,5: 5,?,?" newline hexmask.long.byte 0x0 8.--11. 1. "MINU,Minute units in BCD format" bitfld.long 0x0 7. "SECMASK,Alarm A seconds mask" "0: Alarm A set if the seconds match,1: Seconds don't care in alarm A comparison" newline bitfld.long 0x0 4.--6. "SECT,Second tens in BCD format" "0: 0,1: 1,2: 2,3: 3,4: 4,5: 5,?,?" hexmask.long.byte 0x0 0.--3. 1. "SECU,Second units in BCD format" line.long 0x4 "ALRMASSR,ALRMASSR" hexmask.long.byte 0x4 24.--27. 1. "MASKSS,Mask the most-significant bits starting at this bit" hexmask.long.word 0x4 0.--14. 1. "SS,Sub seconds value" line.long 0x8 "ALRMBR,ALRMBR" bitfld.long 0x8 31. "DATEMASK,Alarm B date mask" "0: Alarm B set if the date/day match,1: Date/day don't care in Alarm B comparison" bitfld.long 0x8 30. "WEEKSEL,Week day selection" "0: DATEU[3:0] represents the date units,1: DATEU[3:0] represents the week day" newline bitfld.long 0x8 28.--29. "DATET,Date tens in BCD format" "0: 0,1: 1,2: 2,3: 3" hexmask.long.byte 0x8 24.--27. 1. "DATEU,Date units in BCD format" newline bitfld.long 0x8 23. "HOURMASK,Alarm B hours mask" "0: Alarm B set if the hours match,1: Hours don't care in Alarm B comparison" bitfld.long 0x8 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM" newline bitfld.long 0x8 20.--21. "HOURT,Hour tens in BCD format" "0: 0,1: 1,2: 2,?" hexmask.long.byte 0x8 16.--19. 1. "HOURU,Hour units in BCD format" newline bitfld.long 0x8 15. "MINMASK,Alarm B minutes mask" "0: Alarm B set if the minutes match,1: Minutes don't care in Alarm B comparison" bitfld.long 0x8 12.--14. "MINT,Minute tens in BCD format" "0: 0,1: 1,2: 2,3: 3,4: 4,5: 5,?,?" newline hexmask.long.byte 0x8 8.--11. 1. "MINU,Minute units in BCD format" bitfld.long 0x8 7. "SECMASK,Alarm B seconds mask" "0: Alarm B set if the seconds match,1: Seconds don't care in Alarm B comparison" newline bitfld.long 0x8 4.--6. "SECT,Second tens in BCD format" "0: 0,1: 1,2: 2,3: 3,4: 4,5: 5,?,?" hexmask.long.byte 0x8 0.--3. 1. "SECU,Second units in BCD format" line.long 0xC "ALRMBSSR,ALRMBSSR" hexmask.long.byte 0xC 24.--27. 1. "MASKSS,Mask the most-significant bits starting at this bit" hexmask.long.word 0xC 0.--14. 1. "SS,Sub seconds value" line.long 0x10 "SR,SR" rbitfld.long 0x10 5. "ITSF,Internal timestamp flag" "0,1" bitfld.long 0x10 4. "TSOVF,Timestamp overflow flag" "0,1" newline bitfld.long 0x10 3. "TSF,Timestamp flag" "0,1" rbitfld.long 0x10 2. "WUTF,Wakeup timer flag" "0,1" newline rbitfld.long 0x10 1. "ALRMBF,Alarm B flag" "0,1" rbitfld.long 0x10 0. "ALRMAF,Alarm A flag" "0,1" rgroup.long 0x48++0x3 line.long 0x0 "INTSR,INTSR" bitfld.long 0x0 5. "ITSIF,Internal timestamp interrupt flag" "0,1" bitfld.long 0x0 4. "TSOVF,Timestamp overflow interrupt flag" "0,1" newline bitfld.long 0x0 3. "TSIF,Timestamp interrupt flag" "0,1" bitfld.long 0x0 2. "WUTIF,Wakeup timer interrupt flag" "0,1" newline bitfld.long 0x0 1. "ALRMBIF,Alarm B interrupt flag" "0,1" bitfld.long 0x0 0. "ALRMAIF,Alarm A interrupt flag" "0,1" group.long 0x4C++0x3 line.long 0x0 "SCR,SCR" bitfld.long 0x0 5. "ITSFCLR,Clear internal timestamp flag" "0: NO_EFFECT,1: CLEAR" bitfld.long 0x0 4. "TSOVFCLR,Clear timestamp overflow flag" "0: NO_EFFECT,1: CLEAR" newline bitfld.long 0x0 3. "TSFCLR,Clear timestamp flag" "0: NO_EFFECT,1: CLEAR" bitfld.long 0x0 2. "WUTFCLR,Clear wakeup timer flag" "0: NO_EFFECT,1: CLEAR" newline bitfld.long 0x0 1. "ALRMBFCLR,Clear alarm B flag" "0: NO_EFFECT,1: CLEAR" bitfld.long 0x0 0. "ALRMAFCLR,Clear alarm A flag" "0: NO_EFFECT,1: CLEAR" tree.end tree "RTC_BKR" base ad:0x40004400 group.long 0x0++0x3F line.long 0x0 "BKP1R,BKP1R" hexmask.long 0x0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x4 "BKP2R,BKP2R" hexmask.long 0x4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x8 "BKP3R,BKP3R" hexmask.long 0x8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC "BKP4R,BKP4R" hexmask.long 0xC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x10 "BKP5R,BKP5R" hexmask.long 0x10 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x14 "BKP6R,BKP6R" hexmask.long 0x14 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x18 "BKP7R,BKP7R" hexmask.long 0x18 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C "BKP8R,BKP8R" hexmask.long 0x1C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x20 "BKP9R,BKP9R" hexmask.long 0x20 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x24 "BKP10R,BKP10R" hexmask.long 0x24 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x28 "BKP11R,BKP11R" hexmask.long 0x28 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x2C "BKP12R,BKP12R" hexmask.long 0x2C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x30 "BKP13R,BKP13R" hexmask.long 0x30 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x34 "BKP14R,BKP14R" hexmask.long 0x34 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x38 "BKP15R,BKP15R" hexmask.long 0x38 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x3C "BKP16R,BKP16R" hexmask.long 0x3C 0.--31. 1. "BKP,The application can write or read data to and from these registers." tree.end tree.end tree "SPI_IIS (Serial Peripheral Interface/Integrated Interchip Sound)" base ad:0x0 tree "SPI_IIS0" base ad:0x40009400 group.long 0x0++0x13 line.long 0x0 "CTL0,CTL0" bitfld.long 0x0 15. "BIDEN,Bidirectional data mode enable." "0: 2-line unidirectional data mode selected,1: 1-line bidirectional data mode selected" bitfld.long 0x0 14. "BIDOEN,Output enable in bidirectional mode" "0: Output disabled,1: Output enabled" newline bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation enable" "0: CRC calculation disabled,1: CRC calculation enabled" bitfld.long 0x0 12. "CRCNEXT,Transmit CRC next" "0: Next transmit value is from Tx buffer,1: Next transmit value is from Tx CRC register" newline bitfld.long 0x0 11. "FRMFORMAT,Data frame format" "0: 8-bit data frame format is selected for..,1: 16-bit data frame format is selected for.." bitfld.long 0x0 10. "RXONLY,Receive only" "0: Full duplex,1: Output disabled" newline bitfld.long 0x0 9. "SWNSSEN,Software slave select enable" "0: Software slave management disabled,1: Software slave management enabled" bitfld.long 0x0 8. "SWNSS,Software slave select" "0: SW_NSS,1: HW_NSS" newline bitfld.long 0x0 7. "LSBF,Frame format" "0: MSB transmitted first,1: LSB transmitted first" bitfld.long 0x0 6. "EN,SPI enable" "0: Peripheral disabled,1: Peripheral enabled" newline bitfld.long 0x0 3.--5. "PRESCALER,Baud rate control" "0: fPCLK/2,1: fPCLK/4,2: FPCLK_8,3: FPCLK_16,4: FPCLK_32,5: FPCLK_64,6: FPCLK_128,7: FPCLK_256" bitfld.long 0x0 2. "MSTR,Master selection" "0: Slave configuration,1: Master configuration" newline bitfld.long 0x0 1. "CKPL,Clock polarity" "0: CK to 0 when idle,1: CK to 1 when idle" bitfld.long 0x0 0. "CKPH,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." line.long 0x4 "CTL1,CTL1" bitfld.long 0x4 15. "RXMASK,SPI simplex mode rx mask" "0: Data will be received as usual in SPI tx simplex..,1: Data will not be received in SPI tx simplex mode" bitfld.long 0x4 14. "RXFFIE,Rx FIFO full interrupt enable" "0: disable RXF interrupt,1: enable RXF interrupt" newline bitfld.long 0x4 13. "TXFAEIE,Tx FIFO almost empty interrupt enable" "0: Disable TXAE interrupt,1: Enable TXAE interrupt" bitfld.long 0x4 7. "TXFEIE,Tx buffer empty interrupt enable" "0: TXE interrupt masked,1: TXE interrupt not masked" newline bitfld.long 0x4 6. "RXFNEIE,RX buffer not empty interrupt enable" "0: RXNE interrupt masked,1: RXNE interrupt not masked" bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0: Error interrupt is masked,1: Error interrupt is enabled" newline bitfld.long 0x4 4. "TIMODE,SPI TI mode enable" "0: SPI TI mode disable,1: SPI TI mode enable" bitfld.long 0x4 3. "NSSMODE,SPI NSS mode enable" "0: SPI NSS mode disable,1: SPI NSS mode enable" newline bitfld.long 0x4 2. "NSSOESEL,NSS output enable" "0: NSS output is disabled in master mode and the..,1: NSS output is enabled in master mode and when.." bitfld.long 0x4 1. "DMATXEN,Tx buffer DMA enable" "0: Tx buffer DMA disabled,1: Tx buffer DMA enabled" newline bitfld.long 0x4 0. "DMARXEN,Rx buffer DMA enable" "0: Rx buffer DMA disabled,1: Rx buffer DMA enabled" line.long 0x8 "STAT,STAT" rbitfld.long 0x8 15. "RXFEMPTYFLAG,Receive FIFO empty" "0: Rx FIFO not empty,1: Rx FIFO empty" rbitfld.long 0x8 14. "RXFFULLFLAG,Receive FIFO full" "0: Rx FIFO not full,1: Rx FIFO full" newline rbitfld.long 0x8 13. "TXFAEMPTYFLAG,Transmit FIFO almost empty" "0: Tx FIFO not almost empty,1: Tx FIFO almost empty" rbitfld.long 0x8 12. "TXFFULLFLAG,Transmit FIFO full" "0: Tx FIFO not full,1: Tx FIFO full" newline rbitfld.long 0x8 9. "DATATRANS,SPI data transfer flag" "0: SPI is in idle or waiting state,1: SPI data is being transferred" rbitfld.long 0x8 8. "FRMERR,Frame format error" "0: No frame format error,1: A frame format error occurred" newline rbitfld.long 0x8 7. "BUSY,Busy flag" "0: SPI or IIS not busy,1: SPI or IIS is busy in communication" bitfld.long 0x8 6. "RXFOVERFLOW,Overflow flag" "0: No overflow occurred,1: Overflow occurred" newline bitfld.long 0x8 5. "MODEFAULT,Mode fault" "0: No mode fault occurred,1: Mode fault occurred" bitfld.long 0x8 4. "CRCERR,CRC error flag" "0: CRC value received matches the RXCRCR value,1: CRC value received does not match the RXCRCR value" newline bitfld.long 0x8 3. "TXFUNDERFLOW,Underflow flag" "0: No underflow occurred,1: Underflow occurred" rbitfld.long 0x8 2. "IISCH,Channel side" "0: Channel Left has to be transmitted or has been..,1: Channel Right has to be transmitted or has been.." newline rbitfld.long 0x8 1. "TXEFLAG,Transmit buffer empty" "0: Tx buffer not empty,1: Tx buffer empty" rbitfld.long 0x8 0. "RXNEFLAG,Receive buffer not empty" "0: Rx buffer empty,1: Rx buffer not empty" line.long 0xC "DATA,DATA" hexmask.long 0xC 0.--31. 1. "DAT,Data register" line.long 0x10 "CRCPOLY,CRCPOLY" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RXCRC" hexmask.long.word 0x0 0.--15. 1. "CRCRXRSLT,Rx CRC register" line.long 0x4 "TXCRC,TXCRC" hexmask.long.word 0x4 0.--15. 1. "CRCTXRSLT,Tx CRC register" group.long 0x1C++0x1F line.long 0x0 "IISCFG0,IISCFG0" bitfld.long 0x0 11. "IISSEL,IIS mode selection" "0: SPI mode is selected,1: IIS mode is selected" bitfld.long 0x0 10. "IISEN,IIS Enable" "0: IIS peripheral is disabled,1: IIS peripheral is enabled" newline bitfld.long 0x0 8.--9. "IISMODE,IIS configuration mode" "0: Slave,1: Slave,2: MASTER_TRANSMIT,3: MASTER_RECEIVE" bitfld.long 0x0 7. "IISPCMSYNCSEL,PCM frame synchronization" "0: Short frame synchronization,1: Long frame synchronization" newline bitfld.long 0x0 4.--5. "IISSTD,IIS standard selection" "0: IIS Philips standard,1: MSB justified standard,2: LSB,3: PCM" bitfld.long 0x0 3. "IISCKPL,Steady state clock polarity" "0: IIS clock steady state is low level,1: IIS clock steady state is high level" newline bitfld.long 0x0 1.--2. "IISDATLEN,Data length to be transferred" "0: 16-bit data length,1: 24-bit data length,2: 32BIT,?" bitfld.long 0x0 0. "IISCHNLEN,Channel length (number of bits per audio channel)" "0: 16-bit wide,1: 32-bit wide" line.long 0x4 "IISCFG1,IISCFG1" bitfld.long 0x4 9. "IISMCKOEN,Master clock output enable" "0: Master clock output is disabled,1: Master clock output is enabled" bitfld.long 0x4 8. "IISODDSCALER,Odd factor for the prescaler" "0: real divider value is = IISDIV *2,1: real divider value is =" newline hexmask.long.byte 0x4 0.--7. 1. "IISEVENSCALER,IIS Linear prescaler" line.long 0x8 "EXTCFG0,EXTCFG0" bitfld.long 0x8 15. "FIFOBUFSEL,FIFO buffer function selection" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x8 13. "IISLRCKPOLAR,lrck polarity" "0: IIS lrck state is low level,1: IIS lrck state is high level" newline bitfld.long 0x8 12. "IISFDEN,IIS full duplex mode enable" "0: IIS full duplex mode disable,1: IIS full duplex mode enable" bitfld.long 0x8 11. "IISHDEN,IIS half duplex mode enable" "0: IIS half duplex mode disable,1: IIS half duplex mode enable" newline bitfld.long 0x8 6. "IISDAT20BIT,20bit Data length to be transferred" "0: data length depend on IISDATLEN,1: 20-bit data length" bitfld.long 0x8 5. "RXCLKREVTS,rx clock revert" "0: sck standard edge sampling,1: sck standard edge is shifted back by one edge.." newline bitfld.long 0x8 4. "IISCLKREVTM,IIS clock revert master" "0: IIS output on sck standard edge,1: IIS output on sck inversion edge" bitfld.long 0x8 3. "IISLRCKRFIRST,lrck output right channel first" "0: lrck outputs the left channel first,1: lrck outputs the right channel first" newline bitfld.long 0x8 2. "IISLRCKSELEN,lrck selection enable" "0: lrck output in standard mode,1: lrck output depend on iis_lrck_r_first.." bitfld.long 0x8 1. "ENDIANSEL,endian selection" "0: bus data little-endian selection,1: bus data big-endian selection" line.long 0xC "FIFOCFG,FIFOCFG" bitfld.long 0xC 8.--10. "RXFAFLVL,RXFIFO threshold configuration" "0,1,2,3,4,5,6,7" bitfld.long 0xC 4.--6. "TXFAELVL,TXFIFO threshold configuration" "0,1,2,3,4,5,6,7" line.long 0x10 "CRCCFG,CRCCFG" hexmask.long.word 0x10 0.--15. 1. "CRCINIT,CRC polynomial register" line.long 0x14 "EXTCFG1,EXTCFG1" bitfld.long 0x14 13. "CRCXOROUT,CRC output xor" "0: CRC output xor 0x0,1: CRC output xor 0xFFFF" bitfld.long 0x14 12. "LENCFGEN,SPI length cfg enable" "0: SPI length depend on FRMFORMAT,1: length depend on LENCFG" newline hexmask.long.byte 0x14 8.--11. 1. "LENCFG,SPI length" bitfld.long 0x14 7. "DUMMYEN,SPI clk dummy enable" "0: SPI clk dummy disable,1: SPI clk dummy enable" newline bitfld.long 0x14 4.--6. "DUMMYLEN,SPI clk dummy bit configuration" "0,1,2,3,4,5,6,7" line.long 0x18 "EXTCFG2,EXTCFG2" bitfld.long 0x18 13.--15. "NSSSEL,nss_channel selection" "0: channel 0,1: channel 1,2: channel 2,3: channel 3,?,?,?,?" bitfld.long 0x18 7. "SCKDLYEN,SPI master sck delay enable" "0: SPI master sck delay disable,1: SPI master sck delay enable" newline hexmask.long.byte 0x18 0.--6. 1. "SCKDLYLEN,spi master sck delay configuration" line.long 0x1C "EXTCFG3,EXTCFG3" bitfld.long 0x1C 15. "DATDLYEN,SPI master dat delay enable" "0: SPI master dat delay disable,1: SPI master dat delay enable" hexmask.long.byte 0x1C 8.--14. 1. "DATDLYLEN,SPI master dat delay configuration" newline bitfld.long 0x1C 7. "NSSDLYEN,SPI master nss delay enable" "0: SPI master nss delay disable,1: SPI master nss delay enable" hexmask.long.byte 0x1C 0.--6. 1. "NSSDLYLEN,SPI master nss delay configuration" tree.end tree "SPI_IIS1" base ad:0x40009800 group.long 0x0++0x13 line.long 0x0 "CTL0,CTL0" bitfld.long 0x0 15. "BIDEN,Bidirectional data mode enable." "0: 2-line unidirectional data mode selected,1: 1-line bidirectional data mode selected" bitfld.long 0x0 14. "BIDOEN,Output enable in bidirectional mode" "0: Output disabled,1: Output enabled" newline bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation enable" "0: CRC calculation disabled,1: CRC calculation enabled" bitfld.long 0x0 12. "CRCNEXT,Transmit CRC next" "0: Next transmit value is from Tx buffer,1: Next transmit value is from Tx CRC register" newline bitfld.long 0x0 11. "FRMFORMAT,Data frame format" "0: 8-bit data frame format is selected for..,1: 16-bit data frame format is selected for.." bitfld.long 0x0 10. "RXONLY,Receive only" "0: Full duplex,1: Output disabled" newline bitfld.long 0x0 9. "SWNSSEN,Software slave select enable" "0: Software slave management disabled,1: Software slave management enabled" bitfld.long 0x0 8. "SWNSS,Software slave select" "0: SW_NSS,1: HW_NSS" newline bitfld.long 0x0 7. "LSBF,Frame format" "0: MSB transmitted first,1: LSB transmitted first" bitfld.long 0x0 6. "EN,SPI enable" "0: Peripheral disabled,1: Peripheral enabled" newline bitfld.long 0x0 3.--5. "PRESCALER,Baud rate control" "0: fPCLK/2,1: fPCLK/4,2: FPCLK_8,3: FPCLK_16,4: FPCLK_32,5: FPCLK_64,6: FPCLK_128,7: FPCLK_256" bitfld.long 0x0 2. "MSTR,Master selection" "0: Slave configuration,1: Master configuration" newline bitfld.long 0x0 1. "CKPL,Clock polarity" "0: CK to 0 when idle,1: CK to 1 when idle" bitfld.long 0x0 0. "CKPH,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." line.long 0x4 "CTL1,CTL1" bitfld.long 0x4 15. "RXMASK,SPI simplex mode rx mask" "0: Data will be received as usual in SPI tx simplex..,1: Data will not be received in SPI tx simplex mode" bitfld.long 0x4 14. "RXFFIE,Rx FIFO full interrupt enable" "0: disable RXF interrupt,1: enable RXF interrupt" newline bitfld.long 0x4 13. "TXFAEIE,Tx FIFO almost empty interrupt enable" "0: Disable TXAE interrupt,1: Enable TXAE interrupt" bitfld.long 0x4 7. "TXFEIE,Tx buffer empty interrupt enable" "0: TXE interrupt masked,1: TXE interrupt not masked" newline bitfld.long 0x4 6. "RXFNEIE,RX buffer not empty interrupt enable" "0: RXNE interrupt masked,1: RXNE interrupt not masked" bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0: Error interrupt is masked,1: Error interrupt is enabled" newline bitfld.long 0x4 4. "TIMODE,SPI TI mode enable" "0: SPI TI mode disable,1: SPI TI mode enable" bitfld.long 0x4 3. "NSSMODE,SPI NSS mode enable" "0: SPI NSS mode disable,1: SPI NSS mode enable" newline bitfld.long 0x4 2. "NSSOESEL,NSS output enable" "0: NSS output is disabled in master mode and the..,1: NSS output is enabled in master mode and when.." bitfld.long 0x4 1. "DMATXEN,Tx buffer DMA enable" "0: Tx buffer DMA disabled,1: Tx buffer DMA enabled" newline bitfld.long 0x4 0. "DMARXEN,Rx buffer DMA enable" "0: Rx buffer DMA disabled,1: Rx buffer DMA enabled" line.long 0x8 "STAT,STAT" rbitfld.long 0x8 15. "RXFEMPTYFLAG,Receive FIFO empty" "0: Rx FIFO not empty,1: Rx FIFO empty" rbitfld.long 0x8 14. "RXFFULLFLAG,Receive FIFO full" "0: Rx FIFO not full,1: Rx FIFO full" newline rbitfld.long 0x8 13. "TXFAEMPTYFLAG,Transmit FIFO almost empty" "0: Tx FIFO not almost empty,1: Tx FIFO almost empty" rbitfld.long 0x8 12. "TXFFULLFLAG,Transmit FIFO full" "0: Tx FIFO not full,1: Tx FIFO full" newline rbitfld.long 0x8 9. "DATATRANS,SPI data transfer flag" "0: SPI is in idle or waiting state,1: SPI data is being transferred" rbitfld.long 0x8 8. "FRMERR,Frame format error" "0: No frame format error,1: A frame format error occurred" newline rbitfld.long 0x8 7. "BUSY,Busy flag" "0: SPI or IIS not busy,1: SPI or IIS is busy in communication" bitfld.long 0x8 6. "RXFOVERFLOW,Overflow flag" "0: No overflow occurred,1: Overflow occurred" newline bitfld.long 0x8 5. "MODEFAULT,Mode fault" "0: No mode fault occurred,1: Mode fault occurred" bitfld.long 0x8 4. "CRCERR,CRC error flag" "0: CRC value received matches the RXCRCR value,1: CRC value received does not match the RXCRCR value" newline bitfld.long 0x8 3. "TXFUNDERFLOW,Underflow flag" "0: No underflow occurred,1: Underflow occurred" rbitfld.long 0x8 2. "IISCH,Channel side" "0: Channel Left has to be transmitted or has been..,1: Channel Right has to be transmitted or has been.." newline rbitfld.long 0x8 1. "TXEFLAG,Transmit buffer empty" "0: Tx buffer not empty,1: Tx buffer empty" rbitfld.long 0x8 0. "RXNEFLAG,Receive buffer not empty" "0: Rx buffer empty,1: Rx buffer not empty" line.long 0xC "DATA,DATA" hexmask.long 0xC 0.--31. 1. "DAT,Data register" line.long 0x10 "CRCPOLY,CRCPOLY" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RXCRC" hexmask.long.word 0x0 0.--15. 1. "CRCRXRSLT,Rx CRC register" line.long 0x4 "TXCRC,TXCRC" hexmask.long.word 0x4 0.--15. 1. "CRCTXRSLT,Tx CRC register" group.long 0x1C++0x1F line.long 0x0 "IISCFG0,IISCFG0" bitfld.long 0x0 11. "IISSEL,IIS mode selection" "0: SPI mode is selected,1: IIS mode is selected" bitfld.long 0x0 10. "IISEN,IIS Enable" "0: IIS peripheral is disabled,1: IIS peripheral is enabled" newline bitfld.long 0x0 8.--9. "IISMODE,IIS configuration mode" "0: Slave,1: Slave,2: MASTER_TRANSMIT,3: MASTER_RECEIVE" bitfld.long 0x0 7. "IISPCMSYNCSEL,PCM frame synchronization" "0: Short frame synchronization,1: Long frame synchronization" newline bitfld.long 0x0 4.--5. "IISSTD,IIS standard selection" "0: IIS Philips standard,1: MSB justified standard,2: LSB,3: PCM" bitfld.long 0x0 3. "IISCKPL,Steady state clock polarity" "0: IIS clock steady state is low level,1: IIS clock steady state is high level" newline bitfld.long 0x0 1.--2. "IISDATLEN,Data length to be transferred" "0: 16-bit data length,1: 24-bit data length,2: 32BIT,?" bitfld.long 0x0 0. "IISCHNLEN,Channel length (number of bits per audio channel)" "0: 16-bit wide,1: 32-bit wide" line.long 0x4 "IISCFG1,IISCFG1" bitfld.long 0x4 9. "IISMCKOEN,Master clock output enable" "0: Master clock output is disabled,1: Master clock output is enabled" bitfld.long 0x4 8. "IISODDSCALER,Odd factor for the prescaler" "0: real divider value is = IISDIV *2,1: real divider value is =" newline hexmask.long.byte 0x4 0.--7. 1. "IISEVENSCALER,IIS Linear prescaler" line.long 0x8 "EXTCFG0,EXTCFG0" bitfld.long 0x8 15. "FIFOBUFSEL,FIFO buffer function selection" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x8 13. "IISLRCKPOLAR,lrck polarity" "0: IIS lrck state is low level,1: IIS lrck state is high level" newline bitfld.long 0x8 12. "IISFDEN,IIS full duplex mode enable" "0: IIS full duplex mode disable,1: IIS full duplex mode enable" bitfld.long 0x8 11. "IISHDEN,IIS half duplex mode enable" "0: IIS half duplex mode disable,1: IIS half duplex mode enable" newline bitfld.long 0x8 6. "IISDAT20BIT,20bit Data length to be transferred" "0: data length depend on IISDATLEN,1: 20-bit data length" bitfld.long 0x8 5. "RXCLKREVTS,rx clock revert" "0: sck standard edge sampling,1: sck standard edge is shifted back by one edge.." newline bitfld.long 0x8 4. "IISCLKREVTM,IIS clock revert master" "0: IIS output on sck standard edge,1: IIS output on sck inversion edge" bitfld.long 0x8 3. "IISLRCKRFIRST,lrck output right channel first" "0: lrck outputs the left channel first,1: lrck outputs the right channel first" newline bitfld.long 0x8 2. "IISLRCKSELEN,lrck selection enable" "0: lrck output in standard mode,1: lrck output depend on iis_lrck_r_first.." bitfld.long 0x8 1. "ENDIANSEL,endian selection" "0: bus data little-endian selection,1: bus data big-endian selection" line.long 0xC "FIFOCFG,FIFOCFG" bitfld.long 0xC 8.--10. "RXFAFLVL,RXFIFO threshold configuration" "0,1,2,3,4,5,6,7" bitfld.long 0xC 4.--6. "TXFAELVL,TXFIFO threshold configuration" "0,1,2,3,4,5,6,7" line.long 0x10 "CRCCFG,CRCCFG" hexmask.long.word 0x10 0.--15. 1. "CRCINIT,CRC polynomial register" line.long 0x14 "EXTCFG1,EXTCFG1" bitfld.long 0x14 13. "CRCXOROUT,CRC output xor" "0: CRC output xor 0x0,1: CRC output xor 0xFFFF" bitfld.long 0x14 12. "LENCFGEN,SPI length cfg enable" "0: SPI length depend on FRMFORMAT,1: length depend on LENCFG" newline hexmask.long.byte 0x14 8.--11. 1. "LENCFG,SPI length" bitfld.long 0x14 7. "DUMMYEN,SPI clk dummy enable" "0: SPI clk dummy disable,1: SPI clk dummy enable" newline bitfld.long 0x14 4.--6. "DUMMYLEN,SPI clk dummy bit configuration" "0,1,2,3,4,5,6,7" line.long 0x18 "EXTCFG2,EXTCFG2" bitfld.long 0x18 13.--15. "NSSSEL,nss_channel selection" "0: channel 0,1: channel 1,2: channel 2,3: channel 3,?,?,?,?" bitfld.long 0x18 7. "SCKDLYEN,SPI master sck delay enable" "0: SPI master sck delay disable,1: SPI master sck delay enable" newline hexmask.long.byte 0x18 0.--6. 1. "SCKDLYLEN,spi master sck delay configuration" line.long 0x1C "EXTCFG3,EXTCFG3" bitfld.long 0x1C 15. "DATDLYEN,SPI master dat delay enable" "0: SPI master dat delay disable,1: SPI master dat delay enable" hexmask.long.byte 0x1C 8.--14. 1. "DATDLYLEN,SPI master dat delay configuration" newline bitfld.long 0x1C 7. "NSSDLYEN,SPI master nss delay enable" "0: SPI master nss delay disable,1: SPI master nss delay enable" hexmask.long.byte 0x1C 0.--6. 1. "NSSDLYLEN,SPI master nss delay configuration" tree.end tree "SPI_IIS2" base ad:0x40017400 group.long 0x0++0x13 line.long 0x0 "CTL0,CTL0" bitfld.long 0x0 15. "BIDEN,Bidirectional data mode enable." "0: 2-line unidirectional data mode selected,1: 1-line bidirectional data mode selected" bitfld.long 0x0 14. "BIDOEN,Output enable in bidirectional mode" "0: Output disabled,1: Output enabled" newline bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation enable" "0: CRC calculation disabled,1: CRC calculation enabled" bitfld.long 0x0 12. "CRCNEXT,Transmit CRC next" "0: Next transmit value is from Tx buffer,1: Next transmit value is from Tx CRC register" newline bitfld.long 0x0 11. "FRMFORMAT,Data frame format" "0: 8-bit data frame format is selected for..,1: 16-bit data frame format is selected for.." bitfld.long 0x0 10. "RXONLY,Receive only" "0: Full duplex,1: Output disabled" newline bitfld.long 0x0 9. "SWNSSEN,Software slave select enable" "0: Software slave management disabled,1: Software slave management enabled" bitfld.long 0x0 8. "SWNSS,Software slave select" "0: SW_NSS,1: HW_NSS" newline bitfld.long 0x0 7. "LSBF,Frame format" "0: MSB transmitted first,1: LSB transmitted first" bitfld.long 0x0 6. "EN,SPI enable" "0: Peripheral disabled,1: Peripheral enabled" newline bitfld.long 0x0 3.--5. "PRESCALER,Baud rate control" "0: fPCLK/2,1: fPCLK/4,2: FPCLK_8,3: FPCLK_16,4: FPCLK_32,5: FPCLK_64,6: FPCLK_128,7: FPCLK_256" bitfld.long 0x0 2. "MSTR,Master selection" "0: Slave configuration,1: Master configuration" newline bitfld.long 0x0 1. "CKPL,Clock polarity" "0: CK to 0 when idle,1: CK to 1 when idle" bitfld.long 0x0 0. "CKPH,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." line.long 0x4 "CTL1,CTL1" bitfld.long 0x4 15. "RXMASK,SPI simplex mode rx mask" "0: Data will be received as usual in SPI tx simplex..,1: Data will not be received in SPI tx simplex mode" bitfld.long 0x4 14. "RXFFIE,Rx FIFO full interrupt enable" "0: disable RXF interrupt,1: enable RXF interrupt" newline bitfld.long 0x4 13. "TXFAEIE,Tx FIFO almost empty interrupt enable" "0: Disable TXAE interrupt,1: Enable TXAE interrupt" bitfld.long 0x4 7. "TXFEIE,Tx buffer empty interrupt enable" "0: TXE interrupt masked,1: TXE interrupt not masked" newline bitfld.long 0x4 6. "RXFNEIE,RX buffer not empty interrupt enable" "0: RXNE interrupt masked,1: RXNE interrupt not masked" bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0: Error interrupt is masked,1: Error interrupt is enabled" newline bitfld.long 0x4 4. "TIMODE,SPI TI mode enable" "0: SPI TI mode disable,1: SPI TI mode enable" bitfld.long 0x4 3. "NSSMODE,SPI NSS mode enable" "0: SPI NSS mode disable,1: SPI NSS mode enable" newline bitfld.long 0x4 2. "NSSOESEL,NSS output enable" "0: NSS output is disabled in master mode and the..,1: NSS output is enabled in master mode and when.." bitfld.long 0x4 1. "DMATXEN,Tx buffer DMA enable" "0: Tx buffer DMA disabled,1: Tx buffer DMA enabled" newline bitfld.long 0x4 0. "DMARXEN,Rx buffer DMA enable" "0: Rx buffer DMA disabled,1: Rx buffer DMA enabled" line.long 0x8 "STAT,STAT" rbitfld.long 0x8 15. "RXFEMPTYFLAG,Receive FIFO empty" "0: Rx FIFO not empty,1: Rx FIFO empty" rbitfld.long 0x8 14. "RXFFULLFLAG,Receive FIFO full" "0: Rx FIFO not full,1: Rx FIFO full" newline rbitfld.long 0x8 13. "TXFAEMPTYFLAG,Transmit FIFO almost empty" "0: Tx FIFO not almost empty,1: Tx FIFO almost empty" rbitfld.long 0x8 12. "TXFFULLFLAG,Transmit FIFO full" "0: Tx FIFO not full,1: Tx FIFO full" newline rbitfld.long 0x8 9. "DATATRANS,SPI data transfer flag" "0: SPI is in idle or waiting state,1: SPI data is being transferred" rbitfld.long 0x8 8. "FRMERR,Frame format error" "0: No frame format error,1: A frame format error occurred" newline rbitfld.long 0x8 7. "BUSY,Busy flag" "0: SPI or IIS not busy,1: SPI or IIS is busy in communication" bitfld.long 0x8 6. "RXFOVERFLOW,Overflow flag" "0: No overflow occurred,1: Overflow occurred" newline bitfld.long 0x8 5. "MODEFAULT,Mode fault" "0: No mode fault occurred,1: Mode fault occurred" bitfld.long 0x8 4. "CRCERR,CRC error flag" "0: CRC value received matches the RXCRCR value,1: CRC value received does not match the RXCRCR value" newline bitfld.long 0x8 3. "TXFUNDERFLOW,Underflow flag" "0: No underflow occurred,1: Underflow occurred" rbitfld.long 0x8 2. "IISCH,Channel side" "0: Channel Left has to be transmitted or has been..,1: Channel Right has to be transmitted or has been.." newline rbitfld.long 0x8 1. "TXEFLAG,Transmit buffer empty" "0: Tx buffer not empty,1: Tx buffer empty" rbitfld.long 0x8 0. "RXNEFLAG,Receive buffer not empty" "0: Rx buffer empty,1: Rx buffer not empty" line.long 0xC "DATA,DATA" hexmask.long 0xC 0.--31. 1. "DAT,Data register" line.long 0x10 "CRCPOLY,CRCPOLY" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RXCRC" hexmask.long.word 0x0 0.--15. 1. "CRCRXRSLT,Rx CRC register" line.long 0x4 "TXCRC,TXCRC" hexmask.long.word 0x4 0.--15. 1. "CRCTXRSLT,Tx CRC register" group.long 0x1C++0x1F line.long 0x0 "IISCFG0,IISCFG0" bitfld.long 0x0 11. "IISSEL,IIS mode selection" "0: SPI mode is selected,1: IIS mode is selected" bitfld.long 0x0 10. "IISEN,IIS Enable" "0: IIS peripheral is disabled,1: IIS peripheral is enabled" newline bitfld.long 0x0 8.--9. "IISMODE,IIS configuration mode" "0: Slave,1: Slave,2: MASTER_TRANSMIT,3: MASTER_RECEIVE" bitfld.long 0x0 7. "IISPCMSYNCSEL,PCM frame synchronization" "0: Short frame synchronization,1: Long frame synchronization" newline bitfld.long 0x0 4.--5. "IISSTD,IIS standard selection" "0: IIS Philips standard,1: MSB justified standard,2: LSB,3: PCM" bitfld.long 0x0 3. "IISCKPL,Steady state clock polarity" "0: IIS clock steady state is low level,1: IIS clock steady state is high level" newline bitfld.long 0x0 1.--2. "IISDATLEN,Data length to be transferred" "0: 16-bit data length,1: 24-bit data length,2: 32BIT,?" bitfld.long 0x0 0. "IISCHNLEN,Channel length (number of bits per audio channel)" "0: 16-bit wide,1: 32-bit wide" line.long 0x4 "IISCFG1,IISCFG1" bitfld.long 0x4 9. "IISMCKOEN,Master clock output enable" "0: Master clock output is disabled,1: Master clock output is enabled" bitfld.long 0x4 8. "IISODDSCALER,Odd factor for the prescaler" "0: real divider value is = IISDIV *2,1: real divider value is =" newline hexmask.long.byte 0x4 0.--7. 1. "IISEVENSCALER,IIS Linear prescaler" line.long 0x8 "EXTCFG0,EXTCFG0" bitfld.long 0x8 15. "FIFOBUFSEL,FIFO buffer function selection" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x8 13. "IISLRCKPOLAR,lrck polarity" "0: IIS lrck state is low level,1: IIS lrck state is high level" newline bitfld.long 0x8 12. "IISFDEN,IIS full duplex mode enable" "0: IIS full duplex mode disable,1: IIS full duplex mode enable" bitfld.long 0x8 11. "IISHDEN,IIS half duplex mode enable" "0: IIS half duplex mode disable,1: IIS half duplex mode enable" newline bitfld.long 0x8 6. "IISDAT20BIT,20bit Data length to be transferred" "0: data length depend on IISDATLEN,1: 20-bit data length" bitfld.long 0x8 5. "RXCLKREVTS,rx clock revert" "0: sck standard edge sampling,1: sck standard edge is shifted back by one edge.." newline bitfld.long 0x8 4. "IISCLKREVTM,IIS clock revert master" "0: IIS output on sck standard edge,1: IIS output on sck inversion edge" bitfld.long 0x8 3. "IISLRCKRFIRST,lrck output right channel first" "0: lrck outputs the left channel first,1: lrck outputs the right channel first" newline bitfld.long 0x8 2. "IISLRCKSELEN,lrck selection enable" "0: lrck output in standard mode,1: lrck output depend on iis_lrck_r_first.." bitfld.long 0x8 1. "ENDIANSEL,endian selection" "0: bus data little-endian selection,1: bus data big-endian selection" line.long 0xC "FIFOCFG,FIFOCFG" bitfld.long 0xC 8.--10. "RXFAFLVL,RXFIFO threshold configuration" "0,1,2,3,4,5,6,7" bitfld.long 0xC 4.--6. "TXFAELVL,TXFIFO threshold configuration" "0,1,2,3,4,5,6,7" line.long 0x10 "CRCCFG,CRCCFG" hexmask.long.word 0x10 0.--15. 1. "CRCINIT,CRC polynomial register" line.long 0x14 "EXTCFG1,EXTCFG1" bitfld.long 0x14 13. "CRCXOROUT,CRC output xor" "0: CRC output xor 0x0,1: CRC output xor 0xFFFF" bitfld.long 0x14 12. "LENCFGEN,SPI length cfg enable" "0: SPI length depend on FRMFORMAT,1: length depend on LENCFG" newline hexmask.long.byte 0x14 8.--11. 1. "LENCFG,SPI length" bitfld.long 0x14 7. "DUMMYEN,SPI clk dummy enable" "0: SPI clk dummy disable,1: SPI clk dummy enable" newline bitfld.long 0x14 4.--6. "DUMMYLEN,SPI clk dummy bit configuration" "0,1,2,3,4,5,6,7" line.long 0x18 "EXTCFG2,EXTCFG2" bitfld.long 0x18 13.--15. "NSSSEL,nss_channel selection" "0: channel 0,1: channel 1,2: channel 2,3: channel 3,?,?,?,?" bitfld.long 0x18 7. "SCKDLYEN,SPI master sck delay enable" "0: SPI master sck delay disable,1: SPI master sck delay enable" newline hexmask.long.byte 0x18 0.--6. 1. "SCKDLYLEN,spi master sck delay configuration" line.long 0x1C "EXTCFG3,EXTCFG3" bitfld.long 0x1C 15. "DATDLYEN,SPI master dat delay enable" "0: SPI master dat delay disable,1: SPI master dat delay enable" hexmask.long.byte 0x1C 8.--14. 1. "DATDLYLEN,SPI master dat delay configuration" newline bitfld.long 0x1C 7. "NSSDLYEN,SPI master nss delay enable" "0: SPI master nss delay disable,1: SPI master nss delay enable" hexmask.long.byte 0x1C 0.--6. 1. "NSSDLYLEN,SPI master nss delay configuration" tree.end tree.end tree "SYSCFG (System Control Module)" base ad:0x40013000 rgroup.long 0x0++0x3 line.long 0x0 "MEMRMP,MEMRMP" bitfld.long 0x0 8. "FBMODE,FB_MODE: Flash Bank mode selection" "0: Flash Bank 1 mapped at 0x0800 0000,1: Flash Bank 2 mapped at 0x0800 0000" bitfld.long 0x0 0.--1. "MEMMODE,MEM_MODE: Memory mapping selection" "0: Main Flash memory mapped at 0x00000000,1: SRAM1 mapped at 0x00000000,2: Reserved,3: SYSTEM_MEM" group.long 0x4++0x13 line.long 0x0 "CFGR1,CFGR1" hexmask.long.byte 0x0 0.--5. 1. "FPUIE,FPU_IE[5..0]: Floating Point Unit interrupts enable bits" line.long 0x4 "EXTICR1,EXTICR1" hexmask.long.byte 0x4 12.--15. 1. "EXTI3,These bits are written by software to select the source input" hexmask.long.byte 0x4 8.--11. 1. "EXTI2,These bits are written by software to select the source input" newline hexmask.long.byte 0x4 4.--7. 1. "EXTI1,These bits are written by software to select the source input" hexmask.long.byte 0x4 0.--3. 1. "EXTI0,These bits are written by software to select the source input" line.long 0x8 "EXTICR2,EXTICR2" hexmask.long.byte 0x8 12.--15. 1. "EXTI7,These bits are written by software to select the source input" hexmask.long.byte 0x8 8.--11. 1. "EXTI6,These bits are written by software to select the source input" newline hexmask.long.byte 0x8 4.--7. 1. "EXTI5,These bits are written by software to select the source input" hexmask.long.byte 0x8 0.--3. 1. "EXTI4,These bits are written by software to select the source input" line.long 0xC "EXTICR3,EXTICR3" hexmask.long.byte 0xC 12.--15. 1. "EXTI11,These bits are written by software to select the source input" hexmask.long.byte 0xC 8.--11. 1. "EXTI10,These bits are written by software to select the source input" newline hexmask.long.byte 0xC 4.--7. 1. "EXTI9,These bits are written by software to select the source input" hexmask.long.byte 0xC 0.--3. 1. "EXTI8,These bits are written by software to select the source input" line.long 0x10 "EXTICR4,EXTICR4" hexmask.long.byte 0x10 12.--15. 1. "EXTI15,These bits are written by software to select the source input" hexmask.long.byte 0x10 8.--11. 1. "EXTI14,These bits are written by software to select the source input" newline hexmask.long.byte 0x10 4.--7. 1. "EXTI13,These bits are written by software to select the source input" hexmask.long.byte 0x10 0.--3. 1. "EXTI12,These bits are written by software to select the source input" group.long 0x24++0x3 line.long 0x0 "INSTCTRL,INSTCTRL" bitfld.long 0x0 0. "CPUWAIT,Stall the core out of reset." "0: CPU_RUN,1: CPU_WAIT" group.long 0x2C++0x3 line.long 0x0 "TRACECTRL,TRACECTRL" bitfld.long 0x0 2. "DAPEN,DAP enable default open If it is no longer needed it can be turned off to save power" "0: dap disable,1: dap enable" bitfld.long 0x0 1. "SOFTSTCLKEN,Systick enable" "0: systick clk disable,1: systick clk enable" newline bitfld.long 0x0 0. "SOFTTRACEEN,Trace enable default open If it is no longer needed it can be turned off to save power" "0: trace disable,1: trace enable" group.long 0x38++0x7 line.long 0x0 "PINOVERTURNINGCTRL0,PINOVERTURNINGCTRL0" bitfld.long 0x0 8. "SELPOLARCMP0,Comparator0 polarity selection" "0: high level active,1: low level active" bitfld.long 0x0 7. "OVERTURNINGEN,Overturning GPIO function enable" "0: disable,1: enable" newline hexmask.long.byte 0x0 3.--6. 1. "GPIOPINSEL,GPIO pin selection" bitfld.long 0x0 0.--2. "GPIOSEL,GPIO port selection" "0: gpioa,1: gpiob,2: gpioc,3: gpiod,4: gpioe,5: gpiof,?,?" line.long 0x4 "PINOVERTURNINGCTRL1,PINOVERTURNINGCTRL1" bitfld.long 0x4 8. "SELPOLARCMP1,Comparator1 polarity selection" "0: high level active,1: low level active" bitfld.long 0x4 7. "OVERTURNINGEN,Overturning GPIO function enable" "0: disable,1: enable" newline hexmask.long.byte 0x4 3.--6. 1. "GPIOPINSEL,GPIO pin selection" bitfld.long 0x4 0.--2. "GPIOSEL,GPIO port selection" "0: gpioa,1: gpiob,2: gpioc,3: gpiod,4: gpioe,5: gpiof,?,?" group.long 0x44++0x3 line.long 0x0 "TCMEB,TCMEB" bitfld.long 0x0 1. "DTCMEB,dtcm enable" "0: disable,1: enable" bitfld.long 0x0 0. "ITCMEB,itcm enable" "0: disable,1: enable" group.long 0x50++0x3 line.long 0x0 "CANCNTCTRL,CANCNTCTRL" bitfld.long 0x0 1. "CNTSET0,Reset register of CiA 603 timer in CAN" "0: non-reset,1: reset" bitfld.long 0x0 0. "CNTEN,enable register of CiA 603 timer in CAN" "0: disable,1: enable" rgroup.long 0x100++0xF line.long 0x0 "OPENINFO0,OPENINFO0" hexmask.long 0x0 0.--31. 1. "DEVICEID,DEVICEID" line.long 0x4 "OPENINFO1,OPENINFO1" hexmask.long.word 0x4 16.--31. 1. "HWREVISION,HWREVISION" hexmask.long.word 0x4 0.--15. 1. "FWREVISION,FWREVISION" line.long 0x8 "OPENINFO2,OPENINFO2" hexmask.long.word 0x8 16.--31. 1. "DIEYPOS,DIEYPOS" hexmask.long.word 0x8 0.--15. 1. "DIEXPOS,DIEXPOS" line.long 0xC "OPENINFO3,OPENINFO3" hexmask.long 0xC 0.--31. 1. "LOTWAFERID,LOTWAFERID" tree.end sif (cpuis("TPS325M5*")) tree "TPSENSOR (Touch Pannel)" base ad:0x4001B400 group.long 0x0++0x53 line.long 0x0 "TISR,TISR" bitfld.long 0x0 0. "SLEEPINT,Sleep mode interrupt" "0,1" line.long 0x4 "TIER,TIER" bitfld.long 0x4 0. "SLEEPINTEN,Sleep mode interrupt enable" "0: disable,1: enable" line.long 0x8 "TCR,TCR" bitfld.long 0x8 15. "SHIELDGRDEN,Shield pad connect to ground" "0,1" bitfld.long 0x8 14. "CKVDDEN,Analog switch control (CK_COMP_VDD_VDD)" "0,1" bitfld.long 0x8 12. "SLEEPMODELP,Sleep mode without vrefbuf" "0,1" newline bitfld.long 0x8 11. "PAGUARDCOMPEN,PlanA guard compensation enable" "?,1: enable" hexmask.long.byte 0x8 6.--10. 1. "FUNCOSR,Over sample rate" bitfld.long 0x8 5. "SLEEPMODE,PlanA:" "0: without compensation,1: with compensation" newline bitfld.long 0x8 4. "SLEEPEN,Sleep mode enable" "0: disable,1: enable" bitfld.long 0x8 3. "TPSENSOREN,TPSENSOR enable;" "0: disable,1: enable" bitfld.long 0x8 2. "BONDEN,RX pad bonding enable" "0: unbonding,1: boding" newline bitfld.long 0x8 1. "EXTTRIGEN,External trigger enable" "0: disable,1: enable" bitfld.long 0x8 0. "PBFUNCEN,PlanB enable" "0: planA,1: planB" line.long 0xC "TCKR,TCKR" bitfld.long 0xC 1. "LSCLKEN,32K clock enable" "0: disable,1: enable" bitfld.long 0xC 0. "LSCLKSEL,ELS source selection" "0: ILS,1: ELS" line.long 0x10 "TRXR,TRXR" hexmask.long.word 0x10 0.--15. 1. "RXMUX,This register is used to select RX pad in bonding mode;" line.long 0x14 "TDLYR,TDLYR" bitfld.long 0x14 15. "RAWCNTEN,Over sample data accumulation enable" "0: enable,1: disable" hexmask.long.byte 0x14 7.--13. 1. "TRANSTIME,Charge transfer time;" hexmask.long.byte 0x14 0.--5. 1. "CHARGETIME,Capacitance charge time;" line.long 0x18 "TSIVR,TSIVR" bitfld.long 0x18 12.--14. "CHSCANINTERVOFFSET,Scan interval offset in over sample mode;" "0,1,2,3,4,5,6,7" bitfld.long 0x18 10.--11. "CHSCANINTERVLSH,Scan interval base num left shift bits;" "0: no shifter,1: left shifter 1bit,2: left shifter 2bit,3: left shifter 3bit" hexmask.long.word 0x18 0.--8. 1. "CHSCANINTERV,Scan interval base num (ch_scan_interv+1)*100ns" line.long 0x1C "TANAR,TANAR" bitfld.long 0x1C 12.--13. "ANALOGDITHER,Analog scan interval offset" "0: 0,1: 10ns,2: 20ns,3: 30ns" bitfld.long 0x1C 8.--10. "IDAC2COMPSEL,Idac2 current selection in compensation stage (planB);" "0: 0uA,1: 1uA,2: 2uA,3: 4uA,4: 8uA,5: 20uA,6: 50uA,?" bitfld.long 0x1C 4.--6. "IDAC2SEL,Idac2 current selection;" "0: 0uA,1: 1uA,2: 2uA,3: 4uA,4: 8uA,5: 20uA,6: 50uA,?" newline bitfld.long 0x1C 0.--2. "IDAC1SEL,Idac1 current selection" "0: 0uA,1: 1uA,2: 2uA,3: 4uA,4: 8uA,5: 20uA,6: 50uA,?" line.long 0x20 "SLPCFG,SLPCFG" bitfld.long 0x20 12.--14. "SLEEPSCANINTERV,Sleep mode standy time" "0: 0ms,1: 20ms,2: 40ms,3: 60ms,4: 80ms,5: 100ms,6: 120ms,7: 200ms" hexmask.long.byte 0x20 5.--9. 1. "FAULTNUM,Fault number threshold in sleep mode" hexmask.long.byte 0x20 0.--4. 1. "SLEEPWIN,The length of threshold comparation window in sleep mode" line.long 0x24 "SLPTH,SLPTH" hexmask.long.word 0x24 0.--13. 1. "SLEEPTH,Threshold in sleep mode" line.long 0x28 "SLPHYST,SLPHYST" hexmask.long.word 0x28 0.--13. 1. "SLEEPHYST,Hysteresis in sleep mode" line.long 0x2C "COMP0,COMP0" hexmask.long.byte 0x2C 8.--15. 1. "COMPNUM1,RX pad1 compensation number (comp_num) * 600ns" hexmask.long.byte 0x2C 0.--7. 1. "COMPNUM0,RX pad0 compensation number (comp_num) * 600ns" line.long 0x30 "COMP1,COMP1" hexmask.long.byte 0x30 8.--15. 1. "COMPNUM3,RX pad3 compensation number (comp_num) * 600ns" hexmask.long.byte 0x30 0.--7. 1. "COMPNUM2,RX pad2 compensation number (comp_num) * 600ns" line.long 0x34 "COMP2,COMP2" hexmask.long.byte 0x34 8.--15. 1. "COMPNUM5,RX pad5 compensation number (comp_num) * 600ns" hexmask.long.byte 0x34 0.--7. 1. "COMPNUM4,RX pad4 compensation number (comp_num) * 600ns" line.long 0x38 "COMP3,COMP3" hexmask.long.byte 0x38 8.--15. 1. "COMPNUM7,RX pad7 compensation number (comp_num) * 600ns" hexmask.long.byte 0x38 0.--7. 1. "COMPNUM6,RX pad6 compensation number (comp_num) * 600ns" line.long 0x3C "COMP4,COMP4" hexmask.long.byte 0x3C 8.--15. 1. "COMPNUM9,RX pad9 compensation number (comp_num) * 600ns" hexmask.long.byte 0x3C 0.--7. 1. "COMPNUM8,RX pad8 compensation number (comp_num) * 600ns" line.long 0x40 "COMP5,COMP5" hexmask.long.byte 0x40 8.--15. 1. "COMPNUM11,RX pad11 compensation number (comp_num) * 600ns" hexmask.long.byte 0x40 0.--7. 1. "COMPNUM10,RX pad10 compensation number (comp_num) * 600ns" line.long 0x44 "COMP6,COMP6" hexmask.long.byte 0x44 8.--15. 1. "COMPNUM13,RX pad13 compensation number (comp_num) * 600ns" hexmask.long.byte 0x44 0.--7. 1. "COMPNUM12,RX pad12 compensation number (comp_num) * 600ns" line.long 0x48 "COMP7,COMP7" hexmask.long.byte 0x48 8.--15. 1. "COMPNUM15,RX pad15 compensation number (comp_num) * 600ns" hexmask.long.byte 0x48 0.--7. 1. "COMPNUM14,RX pad14 compensation number (comp_num) * 600ns" line.long 0x4C "COMP8,COMP8" hexmask.long.byte 0x4C 8.--15. 1. "GUARDCOMPNUM,Guard bonded pads compensation number (comp_num) * 600ns" hexmask.long.byte 0x4C 0.--7. 1. "BONDCOMPNUM,RX bonded pads compensation number (comp_num) * 600ns" line.long 0x50 "TRIM,TRIM" hexmask.long.word 0x50 0.--9. 1. "SLEEP1UATRIM,Current trim data in sleep mode" rgroup.long 0x54++0x47 line.long 0x0 "TSTAT,TSTAT" bitfld.long 0x0 15. "VDDFLAG,Analog VDD flag" "0,1" hexmask.long.byte 0x0 0.--4. 1. "ADDROFFSET,Sleep result data address offset(0~15) ; address of data result0 is base address" line.long 0x4 "TDR,TDR" hexmask.long.word 0x4 0.--13. 1. "DATARESULT,Sleep mode last counter result" line.long 0x8 "TDR0,TDR0" hexmask.long.word 0x8 0.--13. 1. "DATARESULT0,History result in sleep mode" line.long 0xC "TDR1,TDR1" hexmask.long.word 0xC 0.--13. 1. "DATARESULT1,History result in sleep mode" line.long 0x10 "TDR2,TDR2" hexmask.long.word 0x10 0.--13. 1. "DATARESULT2,History result in sleep mode" line.long 0x14 "TDR3,TDR3" hexmask.long.word 0x14 0.--13. 1. "DATARESULT3,History result in sleep mode" line.long 0x18 "TDR4,TDR4" hexmask.long.word 0x18 0.--13. 1. "DATARESULT4,History result in sleep mode" line.long 0x1C "TDR5,TDR5" hexmask.long.word 0x1C 0.--13. 1. "DATARESULT5,History result in sleep mode" line.long 0x20 "TDR6,TDR6" hexmask.long.word 0x20 0.--13. 1. "DATARESULT6,History result in sleep mode" line.long 0x24 "TDR7,TDR7" hexmask.long.word 0x24 0.--13. 1. "DATARESULT7,History result in sleep mode" line.long 0x28 "TDR8,TDR8" hexmask.long.word 0x28 0.--13. 1. "DATARESULT8,History result in sleep mode" line.long 0x2C "TDR9,TDR9" hexmask.long.word 0x2C 0.--13. 1. "DATARESULT9,History result in sleep mode" line.long 0x30 "TDR10,TDR10" hexmask.long.word 0x30 0.--13. 1. "DATARESULT10,History result in sleep mode" line.long 0x34 "TDR11,TDR11" hexmask.long.word 0x34 0.--13. 1. "DATARESULT11,History result in sleep mode" line.long 0x38 "TDR12,TDR12" hexmask.long.word 0x38 0.--13. 1. "DATARESULT12,History result in sleep mode" line.long 0x3C "TDR13,TDR13" hexmask.long.word 0x3C 0.--13. 1. "DATARESULT13,History result in sleep mode" line.long 0x40 "TDR14,TDR14" hexmask.long.word 0x40 0.--13. 1. "DATARESULT14,History result in sleep mode" line.long 0x44 "TDR15,TDR15" hexmask.long.word 0x44 0.--13. 1. "DATARESULT15,History result in sleep mode" group.long 0x9C++0xB line.long 0x0 "TPD0,TPD0" hexmask.long.word 0x0 0.--15. 1. "RXPADGRDEN,RX pad connect ground enable" line.long 0x4 "TPD1,TPD1" bitfld.long 0x4 1. "SHIELDPADGRDEN,Shield pad connect ground enable" "0,1" bitfld.long 0x4 0. "GUARDPADGRDEN,Guard pad connect ground enable" "0,1" line.long 0x8 "TSST,TSST" hexmask.long.byte 0x8 0.--3. 1. "SLEEPSETUPTIME,Sleep mode setup time (sleep_setup_time * 2 + 3) 32K clk cycles" group.long 0x100++0xB line.long 0x0 "CISR,CISR" bitfld.long 0x0 5. "DATAFIFOUDF,Data FIFO over flow interrupt" "0,1" bitfld.long 0x0 4. "DATAFIFOOVF,Data FIFO under flow interrupt" "0,1" bitfld.long 0x0 3. "CFGFIFOUDF,Command FIFO over flow interrupt" "0,1" newline bitfld.long 0x0 2. "CFGFIFOOVF,Command FIFO under flow interrupt" "0,1" bitfld.long 0x0 1. "INTERFINT,Interference interrupt" "0,1" bitfld.long 0x0 0. "ACTIVEINT,Actve counter intrrupt" "0,1" line.long 0x4 "CIER,CIER" bitfld.long 0x4 3. "DATAFIFOINTEN,Data FIFO interrupt enable" "0: disable,1: enable" bitfld.long 0x4 2. "CFGFIFOINTEN,Command FIFO interrupt enable" "0: disable,1: enable" bitfld.long 0x4 1. "INTERFINTEN,Interference interrupt enable" "0: disable,1: enable" newline bitfld.long 0x4 0. "ACTIVEINTEN,Actve counter intrrupt enable" "0: disable,1: enable" line.long 0x8 "CCR,CCR" hexmask.long.byte 0x8 0.--3. 1. "DATAFIFOTH,Data FIFO depth threshold" rgroup.long 0x10C++0x13 line.long 0x0 "CSTAT,CSTAT" hexmask.long.byte 0x0 8.--12. 1. "DATAFIFODEPTH,Data FIFO depth in active mode" hexmask.long.byte 0x0 0.--4. 1. "CFGFIFODEPTH,Command FIFO depth in active mode" line.long 0x4 "CCTR0,CCTR0" hexmask.long.word 0x4 0.--15. 1. "CAPCALITRIM0,Capacitance calibration result" line.long 0x8 "CCTR1,CCTR1" hexmask.long.word 0x8 0.--15. 1. "CAPCALITRIM1,Capacitance calibration result" line.long 0xC "CCTR2,CCTR2" hexmask.long.word 0xC 0.--15. 1. "CAPCALITRIM2,Capacitance calibration result" line.long 0x10 "CCTR3,CCTR3" hexmask.long.word 0x10 0.--15. 1. "CAPCALITRIM3,Capacitance calibration result" group.long 0x180++0x3 line.long 0x0 "CCFR,CCFR" hexmask.long.byte 0x0 8.--11. 1. "RXSEL,RX pad selection in unbonding mode" bitfld.long 0x0 4.--6. "TXSEL,TX pad select" "0: TX1,1: TX2,2: TX3,3: TX4,4: TX5,5: TX6,6: TX7,7: TX8" hexmask.long.byte 0x0 0.--3. 1. "ACTIVEMODE,Active mode (PlanA):" rgroup.long 0x184++0x3 line.long 0x0 "CDR,CDR" hexmask.long.word 0x0 0.--13. 1. "ACTIVECNT,Counter result in active mode" tree.end endif tree "TRNG (True Random Number Generator)" base ad:0x40016000 group.long 0x100++0x3 line.long 0x0 "RNGIMR,RNGIMR" bitfld.long 0x0 3. "VNERRINTMASK,1:masks the von Neumann error interrupt." "?,1: masks the von Neumann error interrupt" bitfld.long 0x0 2. "CRNGTERRINTMASK,1:masks the CRNGT error interrupt." "?,1: masks the CRNGT error interrupt" newline bitfld.long 0x0 1. "AUTOCORRERRINTMASK,1:masks the autocorrelation interrupt." "?,1: masks the autocorrelation interrupt" bitfld.long 0x0 0. "EHRVALIDINTMASK,1:masks the EHR interrupt." "?,1: masks the EHR interrupt" rgroup.long 0x104++0x3 line.long 0x0 "RNGISR,RNGISR" bitfld.long 0x0 3. "VNERR,When set to 1 it indicates a von Neumann error." "0,1" bitfld.long 0x0 2. "CRNGTERR,When set to 1 it indicates a Continuous Random Number Generation Testing (CRNGT) error in the TRNG test failed." "0,1" newline bitfld.long 0x0 1. "AUTOCORRERR,When set to 1 It indicates that the Autocorrelation test failed four times in a row." "0,1" bitfld.long 0x0 0. "EHRVALID,Set to 1 when 192 bits have been collected in the TRNG and the EHR_DATA[0 1 2 5] registers are ready to be read." "0,1" wgroup.long 0x108++0x3 line.long 0x0 "RNGICR,RNGICR" bitfld.long 0x0 3. "VNERR,Set to 1 to clear a von Neumann error." "0,1" bitfld.long 0x0 2. "CRNGTERR,Set to 1 to clear a Continuous Random Number Generation Testing (CRNGT) error." "0,1" newline bitfld.long 0x0 1. "AUTOCORRERR,Software cannot clear this bit. Only a TRNG reset can clear this bit." "0,1" bitfld.long 0x0 0. "EHRVALID,Set to 1 after the EHR_DATA[0 1 2 5] registers have been read." "0,1" group.long 0x10C++0x3 line.long 0x0 "TRNGCONFIG,TRNGCONFIG" bitfld.long 0x0 0.--1. "RNDSRCSEL,Defines the length of the oscillator ring (= the number of inverters) out of four possible" "0,1,2,3" rgroup.long 0x110++0x1B line.long 0x0 "TRNGVALID,TRNGVALID" bitfld.long 0x0 0. "EHRVALID,1'b1 indicates that the collection of bits in the TRNG is completed and data can be read from the EHR_DATA registers." "0,1" line.long 0x4 "EHRDATA0,EHRDATA0" hexmask.long 0x4 0.--31. 1. "EHRDATA,Return bits [31:0] of the EHR." line.long 0x8 "EHRDATA1,EHRDATA1" hexmask.long 0x8 0.--31. 1. "EHRDATA,Return bits [63:32] of the EHR." line.long 0xC "EHRDATA2,EHRDATA2" hexmask.long 0xC 0.--31. 1. "EHRDATA,Return bits [95:64] of the EHR." line.long 0x10 "EHRDATA3,EHRDATA3" hexmask.long 0x10 0.--31. 1. "EHRDATA,Return bits [127:96] of the EHR." line.long 0x14 "EHRDATA4,EHRDATA4" hexmask.long 0x14 0.--31. 1. "EHRDATA,Return bits [159:128] of the EHR." line.long 0x18 "EHRDATA5,EHRDATA5" hexmask.long 0x18 0.--31. 1. "EHRDATA,Return bits [191:160] of the EHR." group.long 0x12C++0xF line.long 0x0 "RNDSOURCEENABLE,RNDSOURCEENABLE" bitfld.long 0x0 0. "RNDSRCEN,The enable signal for the random source." "0,1" line.long 0x4 "SAMPLECNT1,SAMPLECNT1" hexmask.long 0x4 0.--31. 1. "SAMPLECNTR1,Set the number of rng_clk cycles between two consecutive ring oscillator samples." line.long 0x8 "AUTOCORRSTATISTIC,AUTOCORRSTATISTIC" hexmask.long.byte 0x8 14.--21. 1. "AUTOCORRFAILS,Count each time an autocorrelation test fails. Any write to the register resets the counter. Stop collecting statistics if one of the counters has reached the limit." hexmask.long.word 0x8 0.--13. 1. "AUTOCORRTRYS,Counts each time an autocorrelation test starts. Any write to the register resets the counter. Stop collecting statistics if one of the counters has reached the limit." line.long 0xC "TRNGDEBUGCONTROL,TRNGDEBUGCONTROL" bitfld.long 0xC 3. "AUTOCORRELATEBYPASS,When this bit is set the autocorrelation test in the TRNG module is bypassed." "0,1" bitfld.long 0xC 2. "TRNGCRNGTBYPASS,When this bit is set the CRNGT test in the TRNG is bypassed." "0,1" newline bitfld.long 0xC 1. "VNCBYPASS,When this bit is set the von Neumann balancer is bypassed (including the 32 consecutive bits" "0,1" wgroup.long 0x140++0x3 line.long 0x0 "TRNGSWRESET,TRNGSWRESET" bitfld.long 0x0 0. "RNGSWRESET,Any value written (1'b0 or 1'b1) causes a reset cycle to the TRNG block. The reset mechanism takes about four RNG clock cycles until the reset line is deasserted." "0,1" group.long 0x1B4++0x3 line.long 0x0 "RNGDEBUGENINPUT,RNGDEBUGENINPUT" bitfld.long 0x0 0. "RNGDEBUGEN,Reflect the rng_debug_enable input port." "0,1" rgroup.long 0x1B8++0x3 line.long 0x0 "RNGBUSY,RNGBUSY" bitfld.long 0x0 0. "RNGBUSY,Reflect the status of the rng_busy signal." "0,1" wgroup.long 0x1BC++0x3 line.long 0x0 "RSTBITSCOUNTER,RSTBITSCOUNTER" bitfld.long 0x0 0. "RSTBITSCOUNTER,Writing any value to this address resets the bits counter and TRNG_VALID registers. The" "0,1" rgroup.long 0x1C0++0x3 line.long 0x0 "RNGVERSION,RNGVERSION" bitfld.long 0x0 7. "RNGUSE5SBOXES,1'b0: 20 SBOX AES" "0: 20 SBOX AES,1: 5 SBOX AES" bitfld.long 0x0 6. "RESEEDINGEXISTS,1'b0: Does not exist" "0: Does not exist,1: Exists" newline bitfld.long 0x0 5. "KATEXISTS,1'b0: Does not exist" "0: Does not exist,1: Exists" bitfld.long 0x0 4. "PRNGEXISTS,1'b0: Does not exist" "0: Does not exist,1: Exists" newline bitfld.long 0x0 3. "TRNGTESTSBYPASSEN,1'b0: TRNG tests bypass not enabled" "0: TRNG tests bypass not enabled,1: TRNG tests bypass enabled" bitfld.long 0x0 2. "AUTOCORREXISTS,1'b0: Does not exist" "0: Does not exist,1: Exists" newline bitfld.long 0x0 1. "CRNGTEXISTS,1'b0: Does not exist" "0: Does not exist,1: Exists" bitfld.long 0x0 0. "EHRWIDTH192,1'b0: 128-bit HER" "0: 128-bit HER,1: 192-bit HER" rgroup.long 0x1E0++0xB line.long 0x0 "RNGBISTCNTR0,RNGBISTCNTR0" hexmask.long.tbyte 0x0 0.--21. 1. "ROSCCNTRVAL,Return the results of the TRNG BIST counter." line.long 0x4 "RNGBISTCNTR1,RNGBISTCNTR1" hexmask.long.tbyte 0x4 0.--21. 1. "ROSCCNTRVAL,Return the results of the TRNG BIST counter." line.long 0x8 "RNGBISTCNTR2,RNGBISTCNTR2" hexmask.long.tbyte 0x8 0.--21. 1. "ROSCCNTRVAL,Return the results of the TRNG BIST counter." tree.end tree "USART (Universal Synchronous/Asynchronous Receiver/Transmitter)" base ad:0x0 tree "USART0" base ad:0x40010000 group.long 0x0++0xF line.long 0x0 "CR1,CR1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.." bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.." newline bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.." hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" newline hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.." bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.." newline bitfld.long 0x0 12. "M0,Word length" "0: 1 start bit,1: 1 start bit" bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark" newline bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled" bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.." bitfld.long 0x0 7. "TXETXFNFIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.." newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.." bitfld.long 0x0 5. "RXNERXFNEIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.." newline bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.." bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled" newline bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.." bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled,1: USART enabled" line.long 0x4 "CR2,CR2" hexmask.long.byte 0x4 24.--31. 1. "ADDR,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled,1: Receiver timeout feature enabled" newline bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Frame = Start10xxxxxx,2: FRAME7F,3: FRAME55" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled,1: Auto baud rate detection is enabled" newline bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0 first,1: data is transmitted/received with the MSB" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: H,1: L" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted" newline bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped" bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled" newline bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0,2: STOP2,3: STOP1D5" bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.." bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." newline bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.." bitfld.long 0x4 7. "PM,Parity bit mask" "0: Parity bit write into FIFO/buffer,1: Pairty bit mas" newline bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.." bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection" newline bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection" bitfld.long 0x4 2. "M2,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x4 1. "LBE,loopback mode en" "0: disable loopback mode,1: enable loopback mode" line.long 0x8 "CR3,CR3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.." newline bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.." newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high,1: DE signal is active low" bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled,1: DE function is enabled" newline bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of a reception error,1: DMA is disabled following a reception error" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag,1: Overrun functionality is disabled" newline bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.." newline bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled" bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled" newline bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected" bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: Interrupt generated when FE=1 or ORE=1 or NE=1" line.long 0xC "BRR,BRR" hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate" group.long 0x14++0xF line.long 0x0 "RTOR,RTOR" hexmask.long.tbyte 0x0 0.--23. 1. "RTO,Receiver timeout value" line.long 0x4 "RQR,RQR" bitfld.long 0x4 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x4 3. "RXFRQ,Receive data flush request" "0,1" newline bitfld.long 0x4 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x4 1. "SBKRQ,Send break request" "0,1" newline bitfld.long 0x4 0. "ABRRQ,Auto baud rate request" "0,1" line.long 0x8 "ISR,ISR" rbitfld.long 0x8 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold,1: TXFIFO reached the programmed threshold" rbitfld.long 0x8 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold" newline rbitfld.long 0x8 24. "RXFF,RXFIFO full" "0: RXFIFO not full,1: RXFIFO Full" rbitfld.long 0x8 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty,1: TXFIFO empty" newline rbitfld.long 0x8 21. "TEACK,Transmit enable acknowledge flag" "0,1" rbitfld.long 0x8 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode" newline rbitfld.long 0x8 18. "SBKF,Send break flag" "0: No break character is transmitted,1: Break character will be transmitted" rbitfld.long 0x8 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected" newline rbitfld.long 0x8 16. "BUSY,Busy flag" "0: USART is idle,1: Reception ongoing" rbitfld.long 0x8 15. "ABRF,Auto baud rate flag" "0,1" newline rbitfld.long 0x8 14. "ABRE,Auto baud rate error" "0,1" rbitfld.long 0x8 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception" newline rbitfld.long 0x8 10. "CTS,CTS flag" "0: nCTS line set,1: nCTS line reset" bitfld.long 0x8 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the nCTS status line,1: A change occurred on the nCTS status line" newline rbitfld.long 0x8 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected" rbitfld.long 0x8 7. "TXETXFNF,REG MODE:" "0: Transmit FIFO is full,1: Transmit FIFO is not full" newline rbitfld.long 0x8 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete" rbitfld.long 0x8 5. "RXNERXFNE,REG MODE:" "0: Data is not received,1: Received data is ready to be read" newline rbitfld.long 0x8 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected" rbitfld.long 0x8 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected" newline rbitfld.long 0x8 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected" rbitfld.long 0x8 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected" newline rbitfld.long 0x8 0. "PE,Parity error" "0: No parity error,1: Parity error" line.long 0xC "ICR,ICR" bitfld.long 0xC 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0xC 11. "RTOCF,Receiver timeout clear flag" "0,1" newline bitfld.long 0xC 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0xC 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0xC 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0xC 5. "TXFECF,TXFIFO empty clear flag" "0,1" newline bitfld.long 0xC 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0xC 3. "ORECF,Overrun error clear flag" "0,1" newline bitfld.long 0xC 2. "NECF,Noise detected clear flag" "0,1" bitfld.long 0xC 1. "FECF,Framing error clear flag" "0,1" newline bitfld.long 0xC 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDR,RDR" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0x7 line.long 0x0 "TDR,TDR" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "PRESC,PRESC" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" tree.end tree "USART1" base ad:0x40010400 group.long 0x0++0xF line.long 0x0 "CR1,CR1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.." bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.." newline bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.." hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" newline hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.." bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.." newline bitfld.long 0x0 12. "M0,Word length" "0: 1 start bit,1: 1 start bit" bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark" newline bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled" bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.." bitfld.long 0x0 7. "TXETXFNFIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.." newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.." bitfld.long 0x0 5. "RXNERXFNEIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.." newline bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.." bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled" newline bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.." bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled,1: USART enabled" line.long 0x4 "CR2,CR2" hexmask.long.byte 0x4 24.--31. 1. "ADDR,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled,1: Receiver timeout feature enabled" newline bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Frame = Start10xxxxxx,2: FRAME7F,3: FRAME55" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled,1: Auto baud rate detection is enabled" newline bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0 first,1: data is transmitted/received with the MSB" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: H,1: L" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted" newline bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped" bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled" newline bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0,2: STOP2,3: STOP1D5" bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.." bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." newline bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.." bitfld.long 0x4 7. "PM,Parity bit mask" "0: Parity bit write into FIFO/buffer,1: Pairty bit mas" newline bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.." bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection" newline bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection" bitfld.long 0x4 2. "M2,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x4 1. "LBE,loopback mode en" "0: disable loopback mode,1: enable loopback mode" line.long 0x8 "CR3,CR3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.." newline bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.." newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high,1: DE signal is active low" bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled,1: DE function is enabled" newline bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of a reception error,1: DMA is disabled following a reception error" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag,1: Overrun functionality is disabled" newline bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.." newline bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled" bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled" newline bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected" bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: Interrupt generated when FE=1 or ORE=1 or NE=1" line.long 0xC "BRR,BRR" hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate" group.long 0x14++0xF line.long 0x0 "RTOR,RTOR" hexmask.long.tbyte 0x0 0.--23. 1. "RTO,Receiver timeout value" line.long 0x4 "RQR,RQR" bitfld.long 0x4 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x4 3. "RXFRQ,Receive data flush request" "0,1" newline bitfld.long 0x4 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x4 1. "SBKRQ,Send break request" "0,1" newline bitfld.long 0x4 0. "ABRRQ,Auto baud rate request" "0,1" line.long 0x8 "ISR,ISR" rbitfld.long 0x8 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold,1: TXFIFO reached the programmed threshold" rbitfld.long 0x8 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold" newline rbitfld.long 0x8 24. "RXFF,RXFIFO full" "0: RXFIFO not full,1: RXFIFO Full" rbitfld.long 0x8 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty,1: TXFIFO empty" newline rbitfld.long 0x8 21. "TEACK,Transmit enable acknowledge flag" "0,1" rbitfld.long 0x8 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode" newline rbitfld.long 0x8 18. "SBKF,Send break flag" "0: No break character is transmitted,1: Break character will be transmitted" rbitfld.long 0x8 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected" newline rbitfld.long 0x8 16. "BUSY,Busy flag" "0: USART is idle,1: Reception ongoing" rbitfld.long 0x8 15. "ABRF,Auto baud rate flag" "0,1" newline rbitfld.long 0x8 14. "ABRE,Auto baud rate error" "0,1" rbitfld.long 0x8 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception" newline rbitfld.long 0x8 10. "CTS,CTS flag" "0: nCTS line set,1: nCTS line reset" bitfld.long 0x8 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the nCTS status line,1: A change occurred on the nCTS status line" newline rbitfld.long 0x8 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected" rbitfld.long 0x8 7. "TXETXFNF,REG MODE:" "0: Transmit FIFO is full,1: Transmit FIFO is not full" newline rbitfld.long 0x8 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete" rbitfld.long 0x8 5. "RXNERXFNE,REG MODE:" "0: Data is not received,1: Received data is ready to be read" newline rbitfld.long 0x8 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected" rbitfld.long 0x8 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected" newline rbitfld.long 0x8 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected" rbitfld.long 0x8 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected" newline rbitfld.long 0x8 0. "PE,Parity error" "0: No parity error,1: Parity error" line.long 0xC "ICR,ICR" bitfld.long 0xC 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0xC 11. "RTOCF,Receiver timeout clear flag" "0,1" newline bitfld.long 0xC 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0xC 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0xC 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0xC 5. "TXFECF,TXFIFO empty clear flag" "0,1" newline bitfld.long 0xC 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0xC 3. "ORECF,Overrun error clear flag" "0,1" newline bitfld.long 0xC 2. "NECF,Noise detected clear flag" "0,1" bitfld.long 0xC 1. "FECF,Framing error clear flag" "0,1" newline bitfld.long 0xC 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDR,RDR" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0x7 line.long 0x0 "TDR,TDR" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "PRESC,PRESC" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" tree.end tree "USART2" base ad:0x40010800 group.long 0x0++0xF line.long 0x0 "CR1,CR1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.." bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.." newline bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.." hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" newline hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.." bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.." newline bitfld.long 0x0 12. "M0,Word length" "0: 1 start bit,1: 1 start bit" bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark" newline bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled" bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.." bitfld.long 0x0 7. "TXETXFNFIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.." newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.." bitfld.long 0x0 5. "RXNERXFNEIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.." newline bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.." bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled" newline bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.." bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled,1: USART enabled" line.long 0x4 "CR2,CR2" hexmask.long.byte 0x4 24.--31. 1. "ADDR,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled,1: Receiver timeout feature enabled" newline bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Frame = Start10xxxxxx,2: FRAME7F,3: FRAME55" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled,1: Auto baud rate detection is enabled" newline bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0 first,1: data is transmitted/received with the MSB" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: H,1: L" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted" newline bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped" bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled" newline bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0,2: STOP2,3: STOP1D5" bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.." bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." newline bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.." bitfld.long 0x4 7. "PM,Parity bit mask" "0: Parity bit write into FIFO/buffer,1: Pairty bit mas" newline bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.." bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection" newline bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection" bitfld.long 0x4 2. "M2,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x4 1. "LBE,loopback mode en" "0: disable loopback mode,1: enable loopback mode" line.long 0x8 "CR3,CR3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.." newline bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.." newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high,1: DE signal is active low" bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled,1: DE function is enabled" newline bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of a reception error,1: DMA is disabled following a reception error" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag,1: Overrun functionality is disabled" newline bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.." newline bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled" bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled" newline bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected" bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: Interrupt generated when FE=1 or ORE=1 or NE=1" line.long 0xC "BRR,BRR" hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate" group.long 0x14++0xF line.long 0x0 "RTOR,RTOR" hexmask.long.tbyte 0x0 0.--23. 1. "RTO,Receiver timeout value" line.long 0x4 "RQR,RQR" bitfld.long 0x4 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x4 3. "RXFRQ,Receive data flush request" "0,1" newline bitfld.long 0x4 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x4 1. "SBKRQ,Send break request" "0,1" newline bitfld.long 0x4 0. "ABRRQ,Auto baud rate request" "0,1" line.long 0x8 "ISR,ISR" rbitfld.long 0x8 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold,1: TXFIFO reached the programmed threshold" rbitfld.long 0x8 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold" newline rbitfld.long 0x8 24. "RXFF,RXFIFO full" "0: RXFIFO not full,1: RXFIFO Full" rbitfld.long 0x8 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty,1: TXFIFO empty" newline rbitfld.long 0x8 21. "TEACK,Transmit enable acknowledge flag" "0,1" rbitfld.long 0x8 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode" newline rbitfld.long 0x8 18. "SBKF,Send break flag" "0: No break character is transmitted,1: Break character will be transmitted" rbitfld.long 0x8 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected" newline rbitfld.long 0x8 16. "BUSY,Busy flag" "0: USART is idle,1: Reception ongoing" rbitfld.long 0x8 15. "ABRF,Auto baud rate flag" "0,1" newline rbitfld.long 0x8 14. "ABRE,Auto baud rate error" "0,1" rbitfld.long 0x8 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception" newline rbitfld.long 0x8 10. "CTS,CTS flag" "0: nCTS line set,1: nCTS line reset" bitfld.long 0x8 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the nCTS status line,1: A change occurred on the nCTS status line" newline rbitfld.long 0x8 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected" rbitfld.long 0x8 7. "TXETXFNF,REG MODE:" "0: Transmit FIFO is full,1: Transmit FIFO is not full" newline rbitfld.long 0x8 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete" rbitfld.long 0x8 5. "RXNERXFNE,REG MODE:" "0: Data is not received,1: Received data is ready to be read" newline rbitfld.long 0x8 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected" rbitfld.long 0x8 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected" newline rbitfld.long 0x8 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected" rbitfld.long 0x8 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected" newline rbitfld.long 0x8 0. "PE,Parity error" "0: No parity error,1: Parity error" line.long 0xC "ICR,ICR" bitfld.long 0xC 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0xC 11. "RTOCF,Receiver timeout clear flag" "0,1" newline bitfld.long 0xC 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0xC 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0xC 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0xC 5. "TXFECF,TXFIFO empty clear flag" "0,1" newline bitfld.long 0xC 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0xC 3. "ORECF,Overrun error clear flag" "0,1" newline bitfld.long 0xC 2. "NECF,Noise detected clear flag" "0,1" bitfld.long 0xC 1. "FECF,Framing error clear flag" "0,1" newline bitfld.long 0xC 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDR,RDR" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0x7 line.long 0x0 "TDR,TDR" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "PRESC,PRESC" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" tree.end tree "USART3" base ad:0x40010C00 group.long 0x0++0xF line.long 0x0 "CR1,CR1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.." bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.." newline bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.." hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" newline hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.." bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.." newline bitfld.long 0x0 12. "M0,Word length" "0: 1 start bit,1: 1 start bit" bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark" newline bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled" bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.." bitfld.long 0x0 7. "TXETXFNFIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.." newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.." bitfld.long 0x0 5. "RXNERXFNEIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.." newline bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.." bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled" newline bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.." bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled,1: USART enabled" line.long 0x4 "CR2,CR2" hexmask.long.byte 0x4 24.--31. 1. "ADDR,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled,1: Receiver timeout feature enabled" newline bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Frame = Start10xxxxxx,2: FRAME7F,3: FRAME55" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled,1: Auto baud rate detection is enabled" newline bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0 first,1: data is transmitted/received with the MSB" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: H,1: L" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted" newline bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped" bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled" newline bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0,2: STOP2,3: STOP1D5" bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.." bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." newline bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.." bitfld.long 0x4 7. "PM,Parity bit mask" "0: Parity bit write into FIFO/buffer,1: Pairty bit mas" newline bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.." bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection" newline bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection" bitfld.long 0x4 2. "M2,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x4 1. "LBE,loopback mode en" "0: disable loopback mode,1: enable loopback mode" line.long 0x8 "CR3,CR3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.." newline bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.." newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high,1: DE signal is active low" bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled,1: DE function is enabled" newline bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of a reception error,1: DMA is disabled following a reception error" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag,1: Overrun functionality is disabled" newline bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.." newline bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled" bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled" newline bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected" bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: Interrupt generated when FE=1 or ORE=1 or NE=1" line.long 0xC "BRR,BRR" hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate" group.long 0x14++0xF line.long 0x0 "RTOR,RTOR" hexmask.long.tbyte 0x0 0.--23. 1. "RTO,Receiver timeout value" line.long 0x4 "RQR,RQR" bitfld.long 0x4 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x4 3. "RXFRQ,Receive data flush request" "0,1" newline bitfld.long 0x4 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x4 1. "SBKRQ,Send break request" "0,1" newline bitfld.long 0x4 0. "ABRRQ,Auto baud rate request" "0,1" line.long 0x8 "ISR,ISR" rbitfld.long 0x8 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold,1: TXFIFO reached the programmed threshold" rbitfld.long 0x8 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold" newline rbitfld.long 0x8 24. "RXFF,RXFIFO full" "0: RXFIFO not full,1: RXFIFO Full" rbitfld.long 0x8 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty,1: TXFIFO empty" newline rbitfld.long 0x8 21. "TEACK,Transmit enable acknowledge flag" "0,1" rbitfld.long 0x8 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode" newline rbitfld.long 0x8 18. "SBKF,Send break flag" "0: No break character is transmitted,1: Break character will be transmitted" rbitfld.long 0x8 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected" newline rbitfld.long 0x8 16. "BUSY,Busy flag" "0: USART is idle,1: Reception ongoing" rbitfld.long 0x8 15. "ABRF,Auto baud rate flag" "0,1" newline rbitfld.long 0x8 14. "ABRE,Auto baud rate error" "0,1" rbitfld.long 0x8 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception" newline rbitfld.long 0x8 10. "CTS,CTS flag" "0: nCTS line set,1: nCTS line reset" bitfld.long 0x8 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the nCTS status line,1: A change occurred on the nCTS status line" newline rbitfld.long 0x8 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected" rbitfld.long 0x8 7. "TXETXFNF,REG MODE:" "0: Transmit FIFO is full,1: Transmit FIFO is not full" newline rbitfld.long 0x8 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete" rbitfld.long 0x8 5. "RXNERXFNE,REG MODE:" "0: Data is not received,1: Received data is ready to be read" newline rbitfld.long 0x8 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected" rbitfld.long 0x8 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected" newline rbitfld.long 0x8 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected" rbitfld.long 0x8 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected" newline rbitfld.long 0x8 0. "PE,Parity error" "0: No parity error,1: Parity error" line.long 0xC "ICR,ICR" bitfld.long 0xC 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0xC 11. "RTOCF,Receiver timeout clear flag" "0,1" newline bitfld.long 0xC 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0xC 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0xC 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0xC 5. "TXFECF,TXFIFO empty clear flag" "0,1" newline bitfld.long 0xC 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0xC 3. "ORECF,Overrun error clear flag" "0,1" newline bitfld.long 0xC 2. "NECF,Noise detected clear flag" "0,1" bitfld.long 0xC 1. "FECF,Framing error clear flag" "0,1" newline bitfld.long 0xC 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDR,RDR" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0x7 line.long 0x0 "TDR,TDR" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "PRESC,PRESC" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" tree.end tree "USART4" base ad:0x40008000 group.long 0x0++0xF line.long 0x0 "CR1,CR1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.." bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.." newline bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.." hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" newline hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.." bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.." newline bitfld.long 0x0 12. "M0,Word length" "0: 1 start bit,1: 1 start bit" bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark" newline bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled" bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.." bitfld.long 0x0 7. "TXETXFNFIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.." newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.." bitfld.long 0x0 5. "RXNERXFNEIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.." newline bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.." bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled" newline bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.." bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled,1: USART enabled" line.long 0x4 "CR2,CR2" hexmask.long.byte 0x4 24.--31. 1. "ADDR,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled,1: Receiver timeout feature enabled" newline bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Frame = Start10xxxxxx,2: FRAME7F,3: FRAME55" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled,1: Auto baud rate detection is enabled" newline bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0 first,1: data is transmitted/received with the MSB" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: H,1: L" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted" newline bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped" bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled" newline bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0,2: STOP2,3: STOP1D5" bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.." bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." newline bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.." bitfld.long 0x4 7. "PM,Parity bit mask" "0: Parity bit write into FIFO/buffer,1: Pairty bit mas" newline bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.." bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection" newline bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection" bitfld.long 0x4 2. "M2,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x4 1. "LBE,loopback mode en" "0: disable loopback mode,1: enable loopback mode" line.long 0x8 "CR3,CR3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.." newline bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.." newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high,1: DE signal is active low" bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled,1: DE function is enabled" newline bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of a reception error,1: DMA is disabled following a reception error" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag,1: Overrun functionality is disabled" newline bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.." newline bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled" bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled" newline bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected" bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: Interrupt generated when FE=1 or ORE=1 or NE=1" line.long 0xC "BRR,BRR" hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate" group.long 0x14++0xF line.long 0x0 "RTOR,RTOR" hexmask.long.tbyte 0x0 0.--23. 1. "RTO,Receiver timeout value" line.long 0x4 "RQR,RQR" bitfld.long 0x4 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x4 3. "RXFRQ,Receive data flush request" "0,1" newline bitfld.long 0x4 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x4 1. "SBKRQ,Send break request" "0,1" newline bitfld.long 0x4 0. "ABRRQ,Auto baud rate request" "0,1" line.long 0x8 "ISR,ISR" rbitfld.long 0x8 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold,1: TXFIFO reached the programmed threshold" rbitfld.long 0x8 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold" newline rbitfld.long 0x8 24. "RXFF,RXFIFO full" "0: RXFIFO not full,1: RXFIFO Full" rbitfld.long 0x8 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty,1: TXFIFO empty" newline rbitfld.long 0x8 21. "TEACK,Transmit enable acknowledge flag" "0,1" rbitfld.long 0x8 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode" newline rbitfld.long 0x8 18. "SBKF,Send break flag" "0: No break character is transmitted,1: Break character will be transmitted" rbitfld.long 0x8 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected" newline rbitfld.long 0x8 16. "BUSY,Busy flag" "0: USART is idle,1: Reception ongoing" rbitfld.long 0x8 15. "ABRF,Auto baud rate flag" "0,1" newline rbitfld.long 0x8 14. "ABRE,Auto baud rate error" "0,1" rbitfld.long 0x8 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception" newline rbitfld.long 0x8 10. "CTS,CTS flag" "0: nCTS line set,1: nCTS line reset" bitfld.long 0x8 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the nCTS status line,1: A change occurred on the nCTS status line" newline rbitfld.long 0x8 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected" rbitfld.long 0x8 7. "TXETXFNF,REG MODE:" "0: Transmit FIFO is full,1: Transmit FIFO is not full" newline rbitfld.long 0x8 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete" rbitfld.long 0x8 5. "RXNERXFNE,REG MODE:" "0: Data is not received,1: Received data is ready to be read" newline rbitfld.long 0x8 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected" rbitfld.long 0x8 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected" newline rbitfld.long 0x8 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected" rbitfld.long 0x8 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected" newline rbitfld.long 0x8 0. "PE,Parity error" "0: No parity error,1: Parity error" line.long 0xC "ICR,ICR" bitfld.long 0xC 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0xC 11. "RTOCF,Receiver timeout clear flag" "0,1" newline bitfld.long 0xC 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0xC 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0xC 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0xC 5. "TXFECF,TXFIFO empty clear flag" "0,1" newline bitfld.long 0xC 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0xC 3. "ORECF,Overrun error clear flag" "0,1" newline bitfld.long 0xC 2. "NECF,Noise detected clear flag" "0,1" bitfld.long 0xC 1. "FECF,Framing error clear flag" "0,1" newline bitfld.long 0xC 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDR,RDR" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0x7 line.long 0x0 "TDR,TDR" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "PRESC,PRESC" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" tree.end tree "USART5" base ad:0x40008400 group.long 0x0++0xF line.long 0x0 "CR1,CR1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.." bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.." newline bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.." hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" newline hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.." bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.." newline bitfld.long 0x0 12. "M0,Word length" "0: 1 start bit,1: 1 start bit" bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark" newline bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled" bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.." bitfld.long 0x0 7. "TXETXFNFIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.." newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.." bitfld.long 0x0 5. "RXNERXFNEIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.." newline bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.." bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled" newline bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.." bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled,1: USART enabled" line.long 0x4 "CR2,CR2" hexmask.long.byte 0x4 24.--31. 1. "ADDR,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled,1: Receiver timeout feature enabled" newline bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Frame = Start10xxxxxx,2: FRAME7F,3: FRAME55" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled,1: Auto baud rate detection is enabled" newline bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0 first,1: data is transmitted/received with the MSB" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: H,1: L" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted" newline bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped" bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled" newline bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0,2: STOP2,3: STOP1D5" bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.." bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." newline bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.." bitfld.long 0x4 7. "PM,Parity bit mask" "0: Parity bit write into FIFO/buffer,1: Pairty bit mas" newline bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.." bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection" newline bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection" bitfld.long 0x4 2. "M2,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x4 1. "LBE,loopback mode en" "0: disable loopback mode,1: enable loopback mode" line.long 0x8 "CR3,CR3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.." newline bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.." newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high,1: DE signal is active low" bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled,1: DE function is enabled" newline bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of a reception error,1: DMA is disabled following a reception error" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag,1: Overrun functionality is disabled" newline bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.." newline bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled" bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled" newline bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected" bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: Interrupt generated when FE=1 or ORE=1 or NE=1" line.long 0xC "BRR,BRR" hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate" group.long 0x14++0xF line.long 0x0 "RTOR,RTOR" hexmask.long.tbyte 0x0 0.--23. 1. "RTO,Receiver timeout value" line.long 0x4 "RQR,RQR" bitfld.long 0x4 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x4 3. "RXFRQ,Receive data flush request" "0,1" newline bitfld.long 0x4 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x4 1. "SBKRQ,Send break request" "0,1" newline bitfld.long 0x4 0. "ABRRQ,Auto baud rate request" "0,1" line.long 0x8 "ISR,ISR" rbitfld.long 0x8 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold,1: TXFIFO reached the programmed threshold" rbitfld.long 0x8 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold" newline rbitfld.long 0x8 24. "RXFF,RXFIFO full" "0: RXFIFO not full,1: RXFIFO Full" rbitfld.long 0x8 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty,1: TXFIFO empty" newline rbitfld.long 0x8 21. "TEACK,Transmit enable acknowledge flag" "0,1" rbitfld.long 0x8 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode" newline rbitfld.long 0x8 18. "SBKF,Send break flag" "0: No break character is transmitted,1: Break character will be transmitted" rbitfld.long 0x8 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected" newline rbitfld.long 0x8 16. "BUSY,Busy flag" "0: USART is idle,1: Reception ongoing" rbitfld.long 0x8 15. "ABRF,Auto baud rate flag" "0,1" newline rbitfld.long 0x8 14. "ABRE,Auto baud rate error" "0,1" rbitfld.long 0x8 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception" newline rbitfld.long 0x8 10. "CTS,CTS flag" "0: nCTS line set,1: nCTS line reset" bitfld.long 0x8 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the nCTS status line,1: A change occurred on the nCTS status line" newline rbitfld.long 0x8 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected" rbitfld.long 0x8 7. "TXETXFNF,REG MODE:" "0: Transmit FIFO is full,1: Transmit FIFO is not full" newline rbitfld.long 0x8 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete" rbitfld.long 0x8 5. "RXNERXFNE,REG MODE:" "0: Data is not received,1: Received data is ready to be read" newline rbitfld.long 0x8 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected" rbitfld.long 0x8 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected" newline rbitfld.long 0x8 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected" rbitfld.long 0x8 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected" newline rbitfld.long 0x8 0. "PE,Parity error" "0: No parity error,1: Parity error" line.long 0xC "ICR,ICR" bitfld.long 0xC 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0xC 11. "RTOCF,Receiver timeout clear flag" "0,1" newline bitfld.long 0xC 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0xC 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0xC 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0xC 5. "TXFECF,TXFIFO empty clear flag" "0,1" newline bitfld.long 0xC 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0xC 3. "ORECF,Overrun error clear flag" "0,1" newline bitfld.long 0xC 2. "NECF,Noise detected clear flag" "0,1" bitfld.long 0xC 1. "FECF,Framing error clear flag" "0,1" newline bitfld.long 0xC 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDR,RDR" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0x7 line.long 0x0 "TDR,TDR" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "PRESC,PRESC" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" tree.end tree "USART6" base ad:0x40008800 group.long 0x0++0xF line.long 0x0 "CR1,CR1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.." bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.." newline bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled,1: FIFO mode is enabled" bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.." hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" newline hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.." bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.." newline bitfld.long 0x0 12. "M0,Word length" "0: 1 start bit,1: 1 start bit" bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark" newline bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled" bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.." bitfld.long 0x0 7. "TXETXFNFIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.." newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.." bitfld.long 0x0 5. "RXNERXFNEIE,REG MODE:" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.." newline bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.." bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled" newline bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.." bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled,1: USART enabled" line.long 0x4 "CR2,CR2" hexmask.long.byte 0x4 24.--31. 1. "ADDR,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled,1: Receiver timeout feature enabled" newline bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Frame = Start10xxxxxx,2: FRAME7F,3: FRAME55" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled,1: Auto baud rate detection is enabled" newline bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0 first,1: data is transmitted/received with the MSB" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: H,1: L" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted" newline bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped" bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled" newline bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0,2: STOP2,3: STOP1D5" bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.." bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.." newline bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.." bitfld.long 0x4 7. "PM,Parity bit mask" "0: Parity bit write into FIFO/buffer,1: Pairty bit mas" newline bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.." bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection" newline bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection" bitfld.long 0x4 2. "M2,Word length" "0: 1 start bit,1: 1 start bit" newline bitfld.long 0x4 1. "LBE,loopback mode en" "0: disable loopback mode,1: enable loopback mode" line.long 0x8 "CR3,CR3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.." newline bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: 1_2,3: 3_4,4: 7_8,5: EMPTY,?,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.." newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high,1: DE signal is active low" bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled,1: DE function is enabled" newline bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of a reception error,1: DMA is disabled following a reception error" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag,1: Overrun functionality is disabled" newline bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.." newline bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled" bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled" newline bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected" bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: Interrupt generated when FE=1 or ORE=1 or NE=1" line.long 0xC "BRR,BRR" hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate" group.long 0x14++0xF line.long 0x0 "RTOR,RTOR" hexmask.long.tbyte 0x0 0.--23. 1. "RTO,Receiver timeout value" line.long 0x4 "RQR,RQR" bitfld.long 0x4 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x4 3. "RXFRQ,Receive data flush request" "0,1" newline bitfld.long 0x4 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x4 1. "SBKRQ,Send break request" "0,1" newline bitfld.long 0x4 0. "ABRRQ,Auto baud rate request" "0,1" line.long 0x8 "ISR,ISR" rbitfld.long 0x8 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold,1: TXFIFO reached the programmed threshold" rbitfld.long 0x8 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold" newline rbitfld.long 0x8 24. "RXFF,RXFIFO full" "0: RXFIFO not full,1: RXFIFO Full" rbitfld.long 0x8 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty,1: TXFIFO empty" newline rbitfld.long 0x8 21. "TEACK,Transmit enable acknowledge flag" "0,1" rbitfld.long 0x8 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode" newline rbitfld.long 0x8 18. "SBKF,Send break flag" "0: No break character is transmitted,1: Break character will be transmitted" rbitfld.long 0x8 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected" newline rbitfld.long 0x8 16. "BUSY,Busy flag" "0: USART is idle,1: Reception ongoing" rbitfld.long 0x8 15. "ABRF,Auto baud rate flag" "0,1" newline rbitfld.long 0x8 14. "ABRE,Auto baud rate error" "0,1" rbitfld.long 0x8 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception" newline rbitfld.long 0x8 10. "CTS,CTS flag" "0: nCTS line set,1: nCTS line reset" bitfld.long 0x8 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the nCTS status line,1: A change occurred on the nCTS status line" newline rbitfld.long 0x8 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected" rbitfld.long 0x8 7. "TXETXFNF,REG MODE:" "0: Transmit FIFO is full,1: Transmit FIFO is not full" newline rbitfld.long 0x8 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete" rbitfld.long 0x8 5. "RXNERXFNE,REG MODE:" "0: Data is not received,1: Received data is ready to be read" newline rbitfld.long 0x8 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected" rbitfld.long 0x8 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected" newline rbitfld.long 0x8 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected" rbitfld.long 0x8 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected" newline rbitfld.long 0x8 0. "PE,Parity error" "0: No parity error,1: Parity error" line.long 0xC "ICR,ICR" bitfld.long 0xC 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0xC 11. "RTOCF,Receiver timeout clear flag" "0,1" newline bitfld.long 0xC 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0xC 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0xC 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0xC 5. "TXFECF,TXFIFO empty clear flag" "0,1" newline bitfld.long 0xC 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0xC 3. "ORECF,Overrun error clear flag" "0,1" newline bitfld.long 0xC 2. "NECF,Noise detected clear flag" "0,1" bitfld.long 0xC 1. "FECF,Framing error clear flag" "0,1" newline bitfld.long 0xC 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDR,RDR" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0x7 line.long 0x0 "TDR,TDR" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "PRESC,PRESC" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" tree.end tree.end tree "VREFBUF (Voltage Reference Buffer)" base ad:0x40011400 group.long 0x0++0x7 line.long 0x0 "CSR,CSR" bitfld.long 0x0 6. "VROCPPD,VREFBUF OCP(Overcurrent protection) disable:" "0: OCP enable,1: OCP disable" bitfld.long 0x0 5. "VRBYP,VREFBUF bypass mode control" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3.--4. "VRS,Voltage reference scale" "0: Voltage reference set to 1,1: Voltage reference set to 2,2: 2P5V,?" rbitfld.long 0x0 2. "VRR,Voltage reference buffer ready" "0: The voltage reference buffer output is not ready,1: The voltage reference buffer output reached the.." newline bitfld.long 0x0 1. "HIZ,High impedance mode" "0: VREF+ pin is internally connected to the voltage..,1: VREF+ pin is high impedance" bitfld.long 0x0 0. "ENVR,Voltage reference buffer mode enable" "0: Internal voltage reference mode disable,1: Internal voltage reference mode" line.long 0x4 "CCR,CCR" hexmask.long.byte 0x4 0.--5. 1. "TRIM,Trimming code" tree.end tree "WWDG (Window Watchdog)" base ad:0x40006000 group.long 0x0++0xB line.long 0x0 "CTRL,CTRL" bitfld.long 0x0 7. "RSTEN,WWDG Reset output Enable" "0: watchdog reset output disabled,1: watchdog reset output enabled" hexmask.long.byte 0x0 0.--6. 1. "WCNT,7-bit counter (MSB to LSB) these bits contain the value of the watchdog counter decremented every (4096 x 2**psc[2:0]) PCLK cycles. A reset is produced when it is decremented from 0x40 to 0x3F (bit6 becomes cleared)." line.long 0x4 "CFG,CFG" bitfld.long 0x4 11.--13. "PSC,Timer base" "0: The counter clock is,1: The counter clock is,2: DIV4096_DIV4,3: DIV4096_DIV8,4: DIV4096_DIV16,5: DIV4096_DIV32,6: DIV4096_DIV64,7: DIV4096_DIV128" bitfld.long 0x4 9. "EWIEN,Early wakeup interrupt enable" "?,1: ENABLE" hexmask.long.byte 0x4 0.--6. 1. "WIN,7-bit window value" line.long 0x8 "STS,STS" bitfld.long 0x8 0. "EWIRAW,Early wakeup interrupt flag not affected by ewi_en" "0,1" tree.end AUTOINDENT.OFF