; -------------------------------------------------------------------------------- ; @Title: S32K37x On-Chip Peripherals ; @Props: Released ; @Author: KRZ ; @Changelog: 2025-02-06 KRZ ; @Manufacturer: NXP - NXP Semiconductors ; @Doc: Generated (TRACE32, build: 176288.), based on: S32K37_M7.svd (Ver. 2.0) ; @Core: Cortex-M7F, Cortex-M0+ ; @Chip: S32K376, S32K374 ; @Copyright: (C) 1989-2025 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; Copyright 2016-2023 NXP ; ; NXP Confidential and Proprietary. This software is owned or controlled ; by NXP and may only be used strictly in accordance with the applicable ; license terms. By expressly accepting such terms or by downloading, ; installing, activating and/or otherwise using the software, you are ; agreeing that you have read, and that you agree to comply with and are ; bound by, such license terms. If you do not agree to be bound by the ; applicable license terms, then you may not retain, install, activate ; or otherwise use the software. ; -------------------------------------------------------------------------------- ; $Id: pers32k37x.per 19100 2025-02-24 14:34:34Z kwisniewski $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 sif (CORENAME()=="CORTEXM0+") tree.close "Core Registers (Cortex-M0+)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 0x8 if (CORENAME()=="CORTEXM1") group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" else group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" endif if (CORENAME()=="CORTEXM1") rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1" bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known" else rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors" endif if (CORENAME()=="CORTEXM1") rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC21=Cortex-M1" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" elif (CORENAME()=="CORTEXM0+") rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC60=Cortex-M0+" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" else rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC20=Cortex-M0" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" endif group.long 0xd04++0x03 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending" bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending" textline " " bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending" bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending" textline " " bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending" bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service" textline " " bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt" hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field" textline " " hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field" if (CORENAME()=="CORTEXM0+") group.long 0xd08++0x03 line.long 0x00 "VTOR,Vector Table Offset Register" hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address" else textline " " endif group.long 0xd0c++0x03 line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key" bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian" textline " " bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset" bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear" group.long 0xd10++0x03 line.long 0x00 "SCR,System Control Register" bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" rgroup.long 0xd14++0x03 line.long 0x00 "CCR,Configuration and Control Register" bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned" bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped" group.long 0xd1c++0x0b line.long 0x00 "SHPR2,System Handler Priority Register 2" bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11" line.long 0x04 "SHPR3,System Handler Priority Register 3" bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11" bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11" line.long 0x08 "SHCSR,System Handler Control and State Register" bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending" if (CORENAME()=="CORTEXM0+") hgroup.long 0x08++0x03 hide.long 0x00 "ACTLR,Auxiliary Control Register" else textline " " endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" tree.end tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" tree.end width 6. tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x00 "INT0,Interrupt Priority Register" bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3" bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3" bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3" bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3" line.long 0x04 "INT1,Interrupt Priority Register" bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3" bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3" bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3" bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3" line.long 0x08 "INT2,Interrupt Priority Register" bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3" bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3" bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3" bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3" line.long 0x0C "INT3,Interrupt Priority Register" bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3" bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3" bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3" bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3" line.long 0x10 "INT4,Interrupt Priority Register" bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3" bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3" bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3" bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3" line.long 0x14 "INT5,Interrupt Priority Register" bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3" bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3" bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3" bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3" line.long 0x18 "INT6,Interrupt Priority Register" bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3" bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3" bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3" bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3" line.long 0x1C "INT7,Interrupt Priority Register" bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3" bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3" bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3" bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 0xA group.long 0xD30++0x03 line.long 0x00 "DFSR,Data Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred" eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred" textline " " eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match" textline " " eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match" eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request" if (CORENAME()=="CORTEXM1") if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00) group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " textline " " textfld " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif else if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00) group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " textline " " textfld " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif endif wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Selector Register" bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..." group.long 0xDF8++0x07 line.long 0x00 "DCRDR,Debug Core Register Data Register" hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor" line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled" bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error" textline " " bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Breakpoint Unit (BPU)" sif COMPonent.AVAILABLE("BPU") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1)) width 8. group.long 0x00++0x03 line.long 0x00 "BP_CTRL,Breakpoint Control Register" bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key field" "No write,Write" bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled" group.long 0x8++0x03 line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled" group.long 0xC++0x03 line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled" else newline textline "BPU component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 14. rgroup.long 0x00++0x03 line.long 0x00 "DW_CTRL,DW Control Register " bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1c++0x03 line.long 0x00 "DW_PCSR,DW Program Counter Sample Register" hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF" group.long 0x20++0x0b line.long 0x00 "DW_COMP0,DW Comparator Register 0" hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address" line.long 0x04 "DW_MASK0,DW Mask Register 0" hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION0,DW Function Register 0" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." group.long 0x30++0x0b line.long 0x00 "DW_COMP1,DW Comparator Register 1" hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address" line.long 0x04 "DW_MASK1,DW Mask Register 1 " hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION1,DW Function Register 1" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif sif (CORENAME()=="CORTEXM7F") tree.close "Core Registers (Cortex-M7F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 28. " DISFPUISSOPT ,DISFPUISSOPT" "No,Yes" bitfld.long 0x00 27. " DISCRITAXIRUW ,Disables critical AXI read-under-write" "No,Yes" bitfld.long 0x00 26. " DISDYNADD ,Disables dynamic allocation of ADD and SUB instructions" "No,Yes" textline " " bitfld.long 0x00 21.--25. " DISISSCH1 ,DISISSCH1" "Normal,Not issued in ch1,,,,,,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..." bitfld.long 0x00 16.--20. " DISDI ,DISDI" "Normal,ch1,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..." bitfld.long 0x00 15. " DISCRITAXIRUR ,Disables critical AXI read-under-read" "No,Yes" textline " " bitfld.long 0x00 14. " DISBTACALLOC ,DISBTACALLOC" "No,Yes" bitfld.long 0x00 13. " DISBTACREAD ,DISBTACREAD" "No,Yes" bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes" textline " " bitfld.long 0x00 11. " DISRAMODE ,Disables dynamic read allocate mode for Write-Back Write-Allocate memory regions" "No,Yes" bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes" textline "" group.long 0x10++0x03 line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" group.long 0x14++0x07 line.long 0x00 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x04 "SYST_CVR,SysTick Current Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPUID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,ARMv7-M" newline abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC27=Cortex-M7" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control and State Register" bitfld.long 0x00 31. " NMIPENDSET ,On writes, makes the NMI exception active. On reads, indicates the state of the exception" "Inactive,Active" setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes, sets the PendSV exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" textline " " rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled" rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending" hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt" textline " " rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent" hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key" rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian" bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear" bitfld.long 0x08 0. " VECTRESET ,Writing 1 to this bit causes a local system reset" "No effect,Reset" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " STKALIGN ,Determines whether the exception entry sequence guarantees 8-byte stack frame alignment, adjusting the SP if necessary before saving state" "4-byte/no adjustment,8-byte/adjustment" bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise data access faults on handlers running at priority -1 or priority -2" "Lockup,Ignored" bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled" bitfld.long 0x10 0. " NONBASETHRDENA ,Controls whether the processor can enter Thread mode at an execution priority level other than base level" "Disabled,Enabled" line.long 0x14 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. " USGFAULTENA ,UsageFault" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,BusFault" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,MemManage" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall status" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault status" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage status" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault status" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick status" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV status" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor status" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall status" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault status" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault status" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage status" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "USAFAULT,Usage Fault Status Register" bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" textline " " bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x13 line.long 0x00 "HFSR,HardFault Status Register" eventfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" eventfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred" eventfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" eventfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not occurred,Occurred" eventfld.long 0x04 3. " VCATCH ,Indicates triggering of a Vector catch" "Not occurred,Occurred" eventfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred" textline " " eventfld.long 0x04 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not occurred,Occurred" eventfld.long 0x04 0. " HALTED ,Indicates a debug event generated by a C_HALT or C_STEP request or a step request triggered by setting DEMCR.MON_STEP to 1" "Not occurred,Occurred" line.long 0x08 "MMFAR,MemManage Fault Address Register" line.long 0x0C "BFAR,BusFault Address Register" line.long 0x10 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Denied,Privileged,,Full" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full" wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Triggered Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" tree "Memory System" width 10. rgroup.long 0xD78++0x0B line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,level 2,?..." bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,?..." textline " " bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..." bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..." bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..." textline " " bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..." bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..." bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..." line.long 0x04 "CTR,Cache Type Register" bitfld.long 0x04 29.--31. " FORMAT ,Indicates the implemented CTR format" ",,,,ARMv7,?..." bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CCSIDR,Cache Size ID Register" bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported" bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported" bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported" textline " " bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported" hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1" hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1" textline " " bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512" group.long 0xD84++0x03 line.long 0x00 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,?..." bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data,Instruction" wgroup.long 0xF50++0x03 line.long 0x00 "ICIALLU,Instruction cache invalidate all to Point of Unification" wgroup.long 0xF58++0x1F line.long 0x00 "ICIMVAU,Instruction cache invalidate by address to PoU" line.long 0x04 "DCIMVAC,Data cache invalidate by address to Point of Coherency (PoC)" line.long 0x08 "DCISW,Data cache invalidate by set/way" line.long 0x0C "DCCMVAU,Data cache by address to PoU" line.long 0x10 "DCCMVAC,Data cache clean by address to PoC" line.long 0x14 "DCCSW,Data cache clean by set/way" line.long 0x18 "DCCIMVAC,Data cache clean and invalidate by address to PoC" line.long 0x1C "DCCISW,Data cache clean and invalidate by set/way" group.long 0xF90++0x13 line.long 0x00 "ITCMCR,Instruction Tightly-Coupled Memory Control Register" bitfld.long 0x00 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB" bitfld.long 0x00 2. " RETEN ,Retry phase enable" "Disabled,Enabled" bitfld.long 0x00 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " EN ,TCM enable" "Disabled,Enabled" line.long 0x04 "DTCMCR,Data Tightly-Coupled Memory Control Register" bitfld.long 0x04 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB" bitfld.long 0x04 2. " RETEN ,Retry phase enable" "Disabled,Enabled" bitfld.long 0x04 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " EN ,TCM enable" "Disabled,Enabled" line.long 0x08 "AHBPCR,AHBP control register" bitfld.long 0x08 1.--3. " SZ ,AHBP size" "AHBP disabled,64 MB,128 MB,256 MB,512 MB,?..." bitfld.long 0x08 0. " EN ,AHBP enable" "Disabled,Enabled" line.long 0x0C "CACR,L1 Cache Control Register" bitfld.long 0x0C 2. " FORCEWT ,Enables Force Write-through in the data cache" "Disabled,Enabled" bitfld.long 0x0C 1. " ECCDIS ,Disables ECC in the instruction and data cache" "No,Yes" bitfld.long 0x0C 0. " SIWT ,Enables limited cache coherency usage" "Disabled,Enabled" line.long 0x10 "AHBSCR,AHB Slave Control Register" bitfld.long 0x10 11.--15. " INITCOUNT ,Fairness counter initialization value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x10 2.--10. 1. " TPRI ,Threshold execution priority for AHBS traffic demotion" bitfld.long 0x10 0.--1. " CTL ,AHBS prioritization control" "AHBS,Software,AHBSCR.INITCOUNT,AHBSPRI" group.long 0xFA8++0x03 line.long 0x00 "ABFSR,Auxiliary Bus Fault Status Register" bitfld.long 0x00 8.--9. " AXIMTYPE ,Indicates the type of fault on the AXIM interface" "OKAY,EXOKAY,SLVERR,DECERR" bitfld.long 0x00 4. " EPPB ,Asynchronous fault on EPPB interface" "Not occurred,Occurred" bitfld.long 0x00 3. " AXIM ,Asynchronous fault on AXIM interface" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " AHBP ,Asynchronous fault on AHBP interface" "Not occurred,Occurred" bitfld.long 0x00 1. " DTCM ,Asynchronous fault on DTCM interface" "Not occurred,Occurred" bitfld.long 0x00 0. " ITCM ,Asynchronous fault on ITCM interface" "Not occurred,Occurred" group.long 0xFB0++0x03 line.long 0x00 "IEBR0,Instruction Error bank Register 0" bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable" bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data" textline " " hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" group.long 0xFB4++0x03 line.long 0x00 "IEBR1,Instruction Error bank Register 1" bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable" bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data" textline " " hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" group.long 0xFB8++0x03 line.long 0x00 "DEBR0,Data Error bank Register 0" bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable" bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data" textline " " hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" group.long 0xFBC++0x03 line.long 0x00 "DEBR1,Data Error bank Register 1" bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable" bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data" textline " " hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" tree.end tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif CORENAME()=="CORTEXM7F" tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" newline bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" newline bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" newline bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x0B line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." newline bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..." bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." newline bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." newline bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..." line.long 0x08 "MVFR2,Media and FP Feature Register 2" bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..." width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group.long 0x00++0x03 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" newline if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported" newline rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" newline bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" newline bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" newline bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" newline bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count register" line.long 0x08 "DWT_CPICNT,CPI Count register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" newline group.long 0x20++0x07 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" line.long 0x04 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x30)++0x07 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" line.long 0x04 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x40)++0x07 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" line.long 0x04 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x50)++0x07 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" line.long 0x04 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0x0B else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif tree "ADC (Analog-to-Digital Converter)" base ad:0x0 tree "ADC_0" base ad:0x400A0000 group.long 0x0++0x3 line.long 0x0 "MCR,Main Configuration" bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned" newline bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion" bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion" newline bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion" bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion" newline bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion" newline eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only" bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions" eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted" newline eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted" bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated" newline bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,3: Module clock frequency / 8" bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state" rgroup.long 0x4++0x3 line.long 0x0 "MSR,Main Status" bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated" bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress" newline bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted" bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion" newline bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test" bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU" newline hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure" bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active" newline bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?" group.long 0x10++0x27 line.long 0x0 "ISR,Interrupt Status" eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated" eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated" newline eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated" eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated" newline eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated" line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs" eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete" line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs" eventfld.long 0x8 25. "SIEOCF25,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 24. "SIEOCF24,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" line.long 0xC "CEOCFR2,Channel End Of Conversion Flag For External Inputs" eventfld.long 0xC 31. "EIEOCF31,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 30. "EIEOCF30,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 29. "EIEOCF29,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 28. "EIEOCF28,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 27. "EIEOCF27,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 26. "EIEOCF26,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 25. "EIEOCF25,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 24. "EIEOCF24,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 23. "EIEOCF23,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 22. "EIEOCF22,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 21. "EIEOCF21,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 20. "EIEOCF20,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 19. "EIEOCF19,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 18. "EIEOCF18,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 17. "EIEOCF17,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 16. "EIEOCF16,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 15. "EIEOCF15,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 14. "EIEOCF14,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 13. "EIEOCF13,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 12. "EIEOCF12,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 11. "EIEOCF11,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 10. "EIEOCF10,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 9. "EIEOCF9,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 8. "EIEOCF8,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 7. "EIEOCF7,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 6. "EIEOCF6,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 5. "EIEOCF5,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 4. "EIEOCF4,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 3. "EIEOCF3,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 2. "EIEOCF2,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 1. "EIEOCF1,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 0. "EIEOCF0,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" line.long 0x10 "IMR,Interrupt Mask" bitfld.long 0x10 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x10 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x10 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x10 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x10 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x14 "CIMR0,EOC Interrupt Enable For Precision Inputs" bitfld.long 0x14 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x14 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x14 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x14 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x14 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x14 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x14 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x14 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x18 "CIMR1,EOC Interrupt Enable For Standard Inputs" bitfld.long 0x18 25. "SIEOCIEN25,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 24. "SIEOCIEN24,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x1C "CIMR2,EOC Interrupt Enable For External Inputs" bitfld.long 0x1C 31. "EIEOCIEN31,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 30. "EIEOCIEN30,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 29. "EIEOCIEN29,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 28. "EIEOCIEN28,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 27. "EIEOCIEN27,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 26. "EIEOCIEN26,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 25. "EIEOCIEN25,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 24. "EIEOCIEN24,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 23. "EIEOCIEN23,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 22. "EIEOCIEN22,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 21. "EIEOCIEN21,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 20. "EIEOCIEN20,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 19. "EIEOCIEN19,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 18. "EIEOCIEN18,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 17. "EIEOCIEN17,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 16. "EIEOCIEN16,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 15. "EIEOCIEN15,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 14. "EIEOCIEN14,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 13. "EIEOCIEN13,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 12. "EIEOCIEN12,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 11. "EIEOCIEN11,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 10. "EIEOCIEN10,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 9. "EIEOCIEN9,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 8. "EIEOCIEN8,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 7. "EIEOCIEN7,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 6. "EIEOCIEN6,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 5. "EIEOCIEN5,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 4. "EIEOCIEN4,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 3. "EIEOCIEN3,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 2. "EIEOCIEN2,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 1. "EIEOCIEN1,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 0. "EIEOCIEN0,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x20 "WTISR,Analog Watchdog Threshold Interrupt Status" eventfld.long 0x20 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." line.long 0x24 "WTIMR,Analog Watchdog Threshold Interrupt Enable" bitfld.long 0x24 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x24 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x24 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x24 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x24 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x24 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x24 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x24 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x40++0xF line.long 0x0 "DMAE,Direct Memory Access Configuration" bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read" bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable" line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs" bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered" bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered" bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered" bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered" bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered" line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs" bitfld.long 0x8 25. "SIDMAREN25,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 24. "SIDMAREN24,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" line.long 0xC "DMAR2,DMA Request Enable For External Inputs" bitfld.long 0xC 31. "EIDMAREN31,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 30. "EIDMAREN30,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 29. "EIDMAREN29,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 28. "EIDMAREN28,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 27. "EIDMAREN27,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 26. "EIDMAREN26,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 25. "EIDMAREN25,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 24. "EIDMAREN24,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 23. "EIDMAREN23,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 22. "EIDMAREN22,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 21. "EIDMAREN21,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 20. "EIDMAREN20,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 19. "EIDMAREN19,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 18. "EIDMAREN18,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 17. "EIDMAREN17,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 16. "EIDMAREN16,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 15. "EIDMAREN15,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 14. "EIDMAREN14,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 13. "EIDMAREN13,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 12. "EIDMAREN12,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 11. "EIDMAREN11,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 10. "EIDMAREN10,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 9. "EIDMAREN9,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 8. "EIDMAREN8,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 7. "EIDMAREN7,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 6. "EIDMAREN6,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 5. "EIDMAREN5,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 4. "EIDMAREN4,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 3. "EIDMAREN3,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 2. "EIDMAREN2,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 1. "EIDMAREN1,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 0. "EIDMAREN0,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values" hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value" repeat.end group.long 0x80++0xF line.long 0x0 "PSCR,Presampling Control" bitfld.long 0x0 5. "PREVAL2,Presampling Voltage Select For External Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH" newline bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion" line.long 0x4 "PSR0,Presampling Enable For Precision Inputs" bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0x8 "PSR1,Presampling Enable For Standard Inputs" bitfld.long 0x8 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0xC "PSR2,Presampling Enable For External Inputs" bitfld.long 0xC 31. "PRES31,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 30. "PRES30,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 29. "PRES29,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 28. "PRES28,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 27. "PRES27,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 26. "PRES26,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" group.long 0x94++0xB line.long 0x0 "CTR0,Conversion Timing For Precision Inputs" hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles" line.long 0x4 "CTR1,Conversion Timing For Standard Inputs" hexmask.long.byte 0x4 1.--7. 1. "INPSAMP,Specifies the sample duration in terms of conversion clock cycles" bitfld.long 0x4 0. "TSENSOR_SEL,Temperature Sensor Voltage Select" "0: Selects temperature sensor source 0,1: Selects temperature sensor source 1" line.long 0x8 "CTR2,Conversion Timing For External Inputs" hexmask.long.byte 0x8 0.--7. 1. "INPSAMP,Input Sample Cycles" group.long 0xA4++0xB line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" line.long 0x8 "NCMR2,Normal Conversion Enable For External Inputs" bitfld.long 0x8 31. "CH95,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 30. "CH94,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 29. "CH93,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 28. "CH92,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 27. "CH91,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 26. "CH90,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 25. "CH89,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 24. "CH88,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 23. "CH87,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 22. "CH86,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 21. "CH85,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 20. "CH84,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 19. "CH83,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 18. "CH82,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 17. "CH81,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 16. "CH80,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 15. "CH79,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 14. "CH78,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 13. "CH77,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 12. "CH76,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 11. "CH75,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 10. "CH74,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 9. "CH73,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 8. "CH72,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 7. "CH71,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 6. "CH70,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 5. "CH69,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 4. "CH68,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 3. "CH67,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 2. "CH66,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 1. "CH65,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 0. "CH64,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xB4++0xB line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected" line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" line.long 0x8 "JCMR2,Injected Conversion Enable For External Inputs" bitfld.long 0x8 31. "CH95,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 30. "CH94,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 29. "CH93,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 28. "CH92,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 27. "CH91,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 26. "CH90,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 25. "CH89,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 24. "CH88,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 23. "CH87,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 22. "CH86,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 21. "CH85,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 20. "CH84,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 19. "CH83,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 18. "CH82,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 17. "CH81,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 16. "CH80,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 15. "CH79,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 14. "CH78,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 13. "CH77,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 12. "CH76,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 11. "CH75,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 10. "CH74,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 9. "CH73,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 8. "CH72,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 7. "CH71,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 6. "CH70,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 5. "CH69,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 4. "CH68,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 3. "CH67,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 2. "CH66,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 1. "CH65,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 0. "CH64,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xC4++0x7 line.long 0x0 "DSDR,Delay Start Of Data Conversion" hexmask.long.word 0x0 0.--15. 1. "DSD,Delay" line.long 0x4 "PDEDR,Power Down Exit Delay" hexmask.long.byte 0x4 0.--7. 1. "PDED,Delay" rgroup.long 0x100++0x1F line.long 0x0 "PCDR0,Precision Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" line.long 0x4 "PCDR1,Precision Input n Conversion Data" bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data" line.long 0x8 "PCDR2,Precision Input n Conversion Data" bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data" line.long 0xC "PCDR3,Precision Input n Conversion Data" bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data" line.long 0x10 "PCDR4,Precision Input n Conversion Data" bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data" line.long 0x14 "PCDR5,Precision Input n Conversion Data" bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data" line.long 0x18 "PCDR6,Precision Input n Conversion Data" bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data" line.long 0x1C "PCDR7,Precision Input n Conversion Data" bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data" repeat 26. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x180)++0x3 line.long 0x0 "ICDR[$1],Standard Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x200)++0x3 line.long 0x0 "ECDR[$1],External Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end group.long 0x2B0++0x3 line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs" bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2C0++0x2B line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0xC "CWSELRSI3,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0xC 4.--5. "WSEL_SI1_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0xC 0.--1. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x10 "CWSELREI0,Channel Analog Watchdog Select For External inputs" bitfld.long 0x10 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x10 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x10 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x10 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x10 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x10 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x10 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x10 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x14 "CWSELREI1,Channel Analog Watchdog Select For External inputs" bitfld.long 0x14 28.--29. "WSEL_SI1_15,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x14 24.--25. "WSEL_SI1_14,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x14 20.--21. "WSEL_SI1_13,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x14 16.--17. "WSEL_SI1_12,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x14 12.--13. "WSEL_SI1_11,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x14 8.--9. "WSEL_SI1_10,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x14 4.--5. "WSEL_SI1_9,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x14 0.--1. "WSEL_SI1_8,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x18 "CWSELREI2,Channel Analog Watchdog Select For External inputs" bitfld.long 0x18 28.--29. "WSEL_SI2_23,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x18 24.--25. "WSEL_SI2_22,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x18 20.--21. "WSEL_SI2_21,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x18 16.--17. "WSEL_SI2_20,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x18 12.--13. "WSEL_SI2_19,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x18 8.--9. "WSEL_SI2_18,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x18 4.--5. "WSEL_SI2_17,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x18 0.--1. "WSEL_SI2_16,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x1C "CWSELREI3,Channel Analog Watchdog Select For External inputs" bitfld.long 0x1C 28.--29. "WSEL_SI3_31,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x1C 24.--25. "WSEL_SI3_30,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x1C 20.--21. "WSEL_SI3_29,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x1C 16.--17. "WSEL_SI3_28,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x1C 12.--13. "WSEL_SI3_27,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x1C 8.--9. "WSEL_SI3_26,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x1C 4.--5. "WSEL_SI3_25,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x1C 0.--1. "WSEL_SI3_24,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x20 "CWENR0,Channel Watchdog Enable For Precision Inputs" bitfld.long 0x20 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable" bitfld.long 0x20 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable" newline bitfld.long 0x20 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable" bitfld.long 0x20 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable" newline bitfld.long 0x20 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable" bitfld.long 0x20 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable" newline bitfld.long 0x20 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable" bitfld.long 0x20 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable" line.long 0x24 "CWENR1,Channel Watchdog Enable For Standard Inputs" bitfld.long 0x24 25. "CWEN57,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 24. "CWEN56,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" line.long 0x28 "CWENR2,Channel Watchdog Enable For External Inputs" bitfld.long 0x28 31. "CWEN95,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 30. "CWEN94,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 29. "CWEN93,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 28. "CWEN92,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 27. "CWEN91,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 26. "CWEN90,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 25. "CWEN89,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 24. "CWEN88,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 23. "CWEN87,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 22. "CWEN86,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 21. "CWEN85,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 20. "CWEN84,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 19. "CWEN83,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 18. "CWEN82,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 17. "CWEN81,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 16. "CWEN80,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 15. "CWEN79,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 14. "CWEN78,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 13. "CWEN77,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 12. "CWEN76,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 11. "CWEN75,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 10. "CWEN74,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 9. "CWEN73,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 8. "CWEN72,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 7. "CWEN71,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 6. "CWEN70,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 5. "CWEN69,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 4. "CWEN68,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 3. "CWEN67,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 2. "CWEN66,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 1. "CWEN65,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 0. "CWEN64,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" group.long 0x2F0++0xB line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs" eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs" eventfld.long 0x4 25. "AWOR_CH25,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 24. "AWOR_CH24,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x8 "AWORR2,Analog Watchdog Out Of Range For External Inputs" eventfld.long 0x8 31. "AWOR_CH31,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 30. "AWOR_CH30,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 29. "AWOR_CH29,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 28. "AWOR_CH28,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 27. "AWOR_CH27,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 26. "AWOR_CH26,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 25. "AWOR_CH25,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 24. "AWOR_CH24,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 23. "AWOR_CH23,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 22. "AWOR_CH22,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 21. "AWOR_CH21,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 20. "AWOR_CH20,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 19. "AWOR_CH19,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 18. "AWOR_CH18,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 17. "AWOR_CH17,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 16. "AWOR_CH16,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 15. "AWOR_CH15,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 14. "AWOR_CH14,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 13. "AWOR_CH13,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 12. "AWOR_CH12,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 11. "AWOR_CH11,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 10. "AWOR_CH10,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 9. "AWOR_CH9,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 8. "AWOR_CH8,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 7. "AWOR_CH7,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 6. "AWOR_CH6,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 5. "AWOR_CH5,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 4. "AWOR_CH4,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 3. "AWOR_CH3,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 2. "AWOR_CH2,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 1. "AWOR_CH1,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 0. "AWOR_CH0,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" group.long 0x340++0x13 line.long 0x0 "STCR1,Self-Test Configuration 1" hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C" hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S" line.long 0x4 "STCR2,Self-Test Configuration 2" bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated" eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected" newline bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable" bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line" bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line" line.long 0x8 "STCR3,Self-Test Configuration 3" bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3" hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step" line.long 0xC "STBRR,Self-Test Baud Rate" bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.." hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate" line.long 0x10 "STSR1,Self-Test Status 1" eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence" eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period." newline eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten" eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete" newline eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete" eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete" newline eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error" eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error" newline eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error" eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error" newline hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C" rgroup.long 0x354++0xB line.long 0x0 "STSR2,Self-Test Status 2" hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1" line.long 0x4 "STSR3,Self-Test Status 3" hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2" hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0" line.long 0x8 "STSR4,Self-Test Status 4" hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C" rgroup.long 0x370++0x3 line.long 0x0 "STDR1,Self-Test Conversion Data 1" bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten" newline hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data" group.long 0x380++0x3 line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x388++0x7 line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2" bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x394++0xF line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW5R,Self-Test Analog Watchdog C" hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register" bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3" bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1" line.long 0xC "CALBISTREG,Control And Calibration Status" bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?" bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles" newline rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress" bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared." newline bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples" bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable" newline eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully" bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration" group.long 0x3A8++0x3 line.long 0x0 "OFSGNUSR,Offset And Gain User" hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User" hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User" group.long 0x3B4++0x3 line.long 0x0 "CAL2,Calibration Value 2" bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable" tree.end tree "ADC_1" base ad:0x400A4000 group.long 0x0++0x3 line.long 0x0 "MCR,Main Configuration" bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned" newline bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion" bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion" newline bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion" bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion" newline bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion" newline eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only" bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions" eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted" newline eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted" bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated" newline bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,3: Module clock frequency / 8" bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state" rgroup.long 0x4++0x3 line.long 0x0 "MSR,Main Status" bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated" bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress" newline bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted" bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion" newline bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test" bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU" newline hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure" bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active" newline bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?" group.long 0x10++0x27 line.long 0x0 "ISR,Interrupt Status" eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated" eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated" newline eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated" eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated" newline eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated" line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs" eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete" line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs" eventfld.long 0x8 25. "SIEOCF25,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 24. "SIEOCF24,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" line.long 0xC "CEOCFR2,Channel End Of Conversion Flag For External Inputs" eventfld.long 0xC 31. "EIEOCF31,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 30. "EIEOCF30,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 29. "EIEOCF29,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 28. "EIEOCF28,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 27. "EIEOCF27,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 26. "EIEOCF26,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 25. "EIEOCF25,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 24. "EIEOCF24,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 23. "EIEOCF23,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 22. "EIEOCF22,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 21. "EIEOCF21,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 20. "EIEOCF20,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 19. "EIEOCF19,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 18. "EIEOCF18,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 17. "EIEOCF17,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 16. "EIEOCF16,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 15. "EIEOCF15,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 14. "EIEOCF14,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 13. "EIEOCF13,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 12. "EIEOCF12,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 11. "EIEOCF11,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 10. "EIEOCF10,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 9. "EIEOCF9,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 8. "EIEOCF8,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 7. "EIEOCF7,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 6. "EIEOCF6,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 5. "EIEOCF5,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 4. "EIEOCF4,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 3. "EIEOCF3,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 2. "EIEOCF2,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0xC 1. "EIEOCF1,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0xC 0. "EIEOCF0,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" line.long 0x10 "IMR,Interrupt Mask" bitfld.long 0x10 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x10 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x10 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x10 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x10 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x14 "CIMR0,EOC Interrupt Enable For Precision Inputs" bitfld.long 0x14 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x14 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x14 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x14 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x14 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x14 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x14 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x14 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x18 "CIMR1,EOC Interrupt Enable For Standard Inputs" bitfld.long 0x18 25. "SIEOCIEN25,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 24. "SIEOCIEN24,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x18 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x18 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x1C "CIMR2,EOC Interrupt Enable For External Inputs" bitfld.long 0x1C 31. "EIEOCIEN31,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 30. "EIEOCIEN30,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 29. "EIEOCIEN29,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 28. "EIEOCIEN28,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 27. "EIEOCIEN27,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 26. "EIEOCIEN26,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 25. "EIEOCIEN25,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 24. "EIEOCIEN24,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 23. "EIEOCIEN23,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 22. "EIEOCIEN22,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 21. "EIEOCIEN21,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 20. "EIEOCIEN20,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 19. "EIEOCIEN19,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 18. "EIEOCIEN18,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 17. "EIEOCIEN17,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 16. "EIEOCIEN16,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 15. "EIEOCIEN15,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 14. "EIEOCIEN14,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 13. "EIEOCIEN13,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 12. "EIEOCIEN12,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 11. "EIEOCIEN11,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 10. "EIEOCIEN10,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 9. "EIEOCIEN9,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 8. "EIEOCIEN8,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 7. "EIEOCIEN7,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 6. "EIEOCIEN6,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 5. "EIEOCIEN5,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 4. "EIEOCIEN4,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 3. "EIEOCIEN3,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 2. "EIEOCIEN2,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x1C 1. "EIEOCIEN1,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x1C 0. "EIEOCIEN0,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x20 "WTISR,Analog Watchdog Threshold Interrupt Status" eventfld.long 0x20 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x20 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x20 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." line.long 0x24 "WTIMR,Analog Watchdog Threshold Interrupt Enable" bitfld.long 0x24 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x24 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x24 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x24 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x24 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x24 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x24 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x24 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x40++0xF line.long 0x0 "DMAE,Direct Memory Access Configuration" bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read" bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable" line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs" bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered" bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered" bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered" bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered" bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered" line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs" bitfld.long 0x8 25. "SIDMAREN25,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 24. "SIDMAREN24,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" line.long 0xC "DMAR2,DMA Request Enable For External Inputs" bitfld.long 0xC 31. "EIDMAREN31,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 30. "EIDMAREN30,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 29. "EIDMAREN29,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 28. "EIDMAREN28,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 27. "EIDMAREN27,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 26. "EIDMAREN26,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 25. "EIDMAREN25,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 24. "EIDMAREN24,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 23. "EIDMAREN23,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 22. "EIDMAREN22,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 21. "EIDMAREN21,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 20. "EIDMAREN20,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 19. "EIDMAREN19,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 18. "EIDMAREN18,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 17. "EIDMAREN17,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 16. "EIDMAREN16,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 15. "EIDMAREN15,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 14. "EIDMAREN14,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 13. "EIDMAREN13,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 12. "EIDMAREN12,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 11. "EIDMAREN11,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 10. "EIDMAREN10,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 9. "EIDMAREN9,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 8. "EIDMAREN8,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 7. "EIDMAREN7,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 6. "EIDMAREN6,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 5. "EIDMAREN5,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 4. "EIDMAREN4,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 3. "EIDMAREN3,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 2. "EIDMAREN2,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" newline bitfld.long 0xC 1. "EIDMAREN1,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" bitfld.long 0xC 0. "EIDMAREN0,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values" hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value" repeat.end group.long 0x80++0xF line.long 0x0 "PSCR,Presampling Control" bitfld.long 0x0 5. "PREVAL2,Presampling Voltage Select For External Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH" newline bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion" line.long 0x4 "PSR0,Presampling Enable For Precision Inputs" bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0x8 "PSR1,Presampling Enable For Standard Inputs" bitfld.long 0x8 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0xC "PSR2,Presampling Enable For External Inputs" bitfld.long 0xC 31. "PRES31,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 30. "PRES30,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 29. "PRES29,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 28. "PRES28,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 27. "PRES27,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 26. "PRES26,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0xC 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0xC 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" group.long 0x94++0xB line.long 0x0 "CTR0,Conversion Timing For Precision Inputs" hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles" line.long 0x4 "CTR1,Conversion Timing For Standard Inputs" hexmask.long.byte 0x4 1.--7. 1. "INPSAMP,Specifies the sample duration in terms of conversion clock cycles" bitfld.long 0x4 0. "TSENSOR_SEL,Temperature Sensor Voltage Select" "0: Selects temperature sensor source 0,1: Selects temperature sensor source 1" line.long 0x8 "CTR2,Conversion Timing For External Inputs" hexmask.long.byte 0x8 0.--7. 1. "INPSAMP,Input Sample Cycles" group.long 0xA4++0xB line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" line.long 0x8 "NCMR2,Normal Conversion Enable For External Inputs" bitfld.long 0x8 31. "CH95,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 30. "CH94,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 29. "CH93,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 28. "CH92,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 27. "CH91,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 26. "CH90,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 25. "CH89,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 24. "CH88,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 23. "CH87,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 22. "CH86,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 21. "CH85,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 20. "CH84,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 19. "CH83,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 18. "CH82,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 17. "CH81,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 16. "CH80,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 15. "CH79,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 14. "CH78,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 13. "CH77,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 12. "CH76,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 11. "CH75,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 10. "CH74,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 9. "CH73,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 8. "CH72,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 7. "CH71,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 6. "CH70,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 5. "CH69,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 4. "CH68,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 3. "CH67,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 2. "CH66,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 1. "CH65,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 0. "CH64,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xB4++0xB line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected" line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" line.long 0x8 "JCMR2,Injected Conversion Enable For External Inputs" bitfld.long 0x8 31. "CH95,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 30. "CH94,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 29. "CH93,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 28. "CH92,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 27. "CH91,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 26. "CH90,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 25. "CH89,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 24. "CH88,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 23. "CH87,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 22. "CH86,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 21. "CH85,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 20. "CH84,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 19. "CH83,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 18. "CH82,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 17. "CH81,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 16. "CH80,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 15. "CH79,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 14. "CH78,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 13. "CH77,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 12. "CH76,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 11. "CH75,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 10. "CH74,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 9. "CH73,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 8. "CH72,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 7. "CH71,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 6. "CH70,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 5. "CH69,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 4. "CH68,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 3. "CH67,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 2. "CH66,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x8 1. "CH65,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x8 0. "CH64,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xC4++0x7 line.long 0x0 "DSDR,Delay Start Of Data Conversion" hexmask.long.word 0x0 0.--15. 1. "DSD,Delay" line.long 0x4 "PDEDR,Power Down Exit Delay" hexmask.long.byte 0x4 0.--7. 1. "PDED,Delay" rgroup.long 0x100++0x1F line.long 0x0 "PCDR0,Precision Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" line.long 0x4 "PCDR1,Precision Input n Conversion Data" bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data" line.long 0x8 "PCDR2,Precision Input n Conversion Data" bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data" line.long 0xC "PCDR3,Precision Input n Conversion Data" bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data" line.long 0x10 "PCDR4,Precision Input n Conversion Data" bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data" line.long 0x14 "PCDR5,Precision Input n Conversion Data" bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data" line.long 0x18 "PCDR6,Precision Input n Conversion Data" bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data" line.long 0x1C "PCDR7,Precision Input n Conversion Data" bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data" repeat 26. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x180)++0x3 line.long 0x0 "ICDR[$1],Standard Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x200)++0x3 line.long 0x0 "ECDR[$1],External Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end group.long 0x2B0++0x3 line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs" bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2C0++0x2B line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0xC "CWSELRSI3,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0xC 4.--5. "WSEL_SI1_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0xC 0.--1. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x10 "CWSELREI0,Channel Analog Watchdog Select For External inputs" bitfld.long 0x10 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x10 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x10 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x10 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x10 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x10 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x10 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x10 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x14 "CWSELREI1,Channel Analog Watchdog Select For External inputs" bitfld.long 0x14 28.--29. "WSEL_SI1_15,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x14 24.--25. "WSEL_SI1_14,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x14 20.--21. "WSEL_SI1_13,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x14 16.--17. "WSEL_SI1_12,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x14 12.--13. "WSEL_SI1_11,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x14 8.--9. "WSEL_SI1_10,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x14 4.--5. "WSEL_SI1_9,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x14 0.--1. "WSEL_SI1_8,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x18 "CWSELREI2,Channel Analog Watchdog Select For External inputs" bitfld.long 0x18 28.--29. "WSEL_SI2_23,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x18 24.--25. "WSEL_SI2_22,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x18 20.--21. "WSEL_SI2_21,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x18 16.--17. "WSEL_SI2_20,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x18 12.--13. "WSEL_SI2_19,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x18 8.--9. "WSEL_SI2_18,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x18 4.--5. "WSEL_SI2_17,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x18 0.--1. "WSEL_SI2_16,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x1C "CWSELREI3,Channel Analog Watchdog Select For External inputs" bitfld.long 0x1C 28.--29. "WSEL_SI3_31,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x1C 24.--25. "WSEL_SI3_30,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x1C 20.--21. "WSEL_SI3_29,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x1C 16.--17. "WSEL_SI3_28,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x1C 12.--13. "WSEL_SI3_27,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x1C 8.--9. "WSEL_SI3_26,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x1C 4.--5. "WSEL_SI3_25,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x1C 0.--1. "WSEL_SI3_24,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x20 "CWENR0,Channel Watchdog Enable For Precision Inputs" bitfld.long 0x20 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable" bitfld.long 0x20 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable" newline bitfld.long 0x20 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable" bitfld.long 0x20 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable" newline bitfld.long 0x20 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable" bitfld.long 0x20 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable" newline bitfld.long 0x20 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable" bitfld.long 0x20 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable" line.long 0x24 "CWENR1,Channel Watchdog Enable For Standard Inputs" bitfld.long 0x24 25. "CWEN57,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 24. "CWEN56,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x24 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x24 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" line.long 0x28 "CWENR2,Channel Watchdog Enable For External Inputs" bitfld.long 0x28 31. "CWEN95,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 30. "CWEN94,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 29. "CWEN93,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 28. "CWEN92,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 27. "CWEN91,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 26. "CWEN90,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 25. "CWEN89,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 24. "CWEN88,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 23. "CWEN87,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 22. "CWEN86,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 21. "CWEN85,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 20. "CWEN84,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 19. "CWEN83,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 18. "CWEN82,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 17. "CWEN81,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 16. "CWEN80,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 15. "CWEN79,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 14. "CWEN78,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 13. "CWEN77,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 12. "CWEN76,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 11. "CWEN75,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 10. "CWEN74,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 9. "CWEN73,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 8. "CWEN72,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 7. "CWEN71,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 6. "CWEN70,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 5. "CWEN69,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 4. "CWEN68,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 3. "CWEN67,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 2. "CWEN66,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" newline bitfld.long 0x28 1. "CWEN65,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" bitfld.long 0x28 0. "CWEN64,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable" group.long 0x2F0++0xB line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs" eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs" eventfld.long 0x4 25. "AWOR_CH25,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 24. "AWOR_CH24,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x8 "AWORR2,Analog Watchdog Out Of Range For External Inputs" eventfld.long 0x8 31. "AWOR_CH31,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 30. "AWOR_CH30,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 29. "AWOR_CH29,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 28. "AWOR_CH28,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 27. "AWOR_CH27,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 26. "AWOR_CH26,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 25. "AWOR_CH25,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 24. "AWOR_CH24,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 23. "AWOR_CH23,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 22. "AWOR_CH22,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 21. "AWOR_CH21,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 20. "AWOR_CH20,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 19. "AWOR_CH19,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 18. "AWOR_CH18,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 17. "AWOR_CH17,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 16. "AWOR_CH16,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 15. "AWOR_CH15,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 14. "AWOR_CH14,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 13. "AWOR_CH13,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 12. "AWOR_CH12,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 11. "AWOR_CH11,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 10. "AWOR_CH10,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 9. "AWOR_CH9,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 8. "AWOR_CH8,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 7. "AWOR_CH7,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 6. "AWOR_CH6,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 5. "AWOR_CH5,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 4. "AWOR_CH4,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 3. "AWOR_CH3,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 2. "AWOR_CH2,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x8 1. "AWOR_CH1,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x8 0. "AWOR_CH0,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits" group.long 0x340++0x13 line.long 0x0 "STCR1,Self-Test Configuration 1" hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C" hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S" line.long 0x4 "STCR2,Self-Test Configuration 2" bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated" eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected" newline bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable" bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line" bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line" line.long 0x8 "STCR3,Self-Test Configuration 3" bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3" hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step" line.long 0xC "STBRR,Self-Test Baud Rate" bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.." hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate" line.long 0x10 "STSR1,Self-Test Status 1" eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence" eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period." newline eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten" eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete" newline eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete" eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete" newline eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error" eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error" newline eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error" eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error" newline hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C" rgroup.long 0x354++0xB line.long 0x0 "STSR2,Self-Test Status 2" hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1" line.long 0x4 "STSR3,Self-Test Status 3" hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2" hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0" line.long 0x8 "STSR4,Self-Test Status 4" hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C" rgroup.long 0x370++0x3 line.long 0x0 "STDR1,Self-Test Conversion Data 1" bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten" newline hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data" group.long 0x380++0x3 line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x388++0x7 line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2" bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x394++0xF line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW5R,Self-Test Analog Watchdog C" hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register" bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3" bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1" line.long 0xC "CALBISTREG,Control And Calibration Status" bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?" bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles" newline rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress" bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared." newline bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples" bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable" newline eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully" bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration" group.long 0x3A8++0x3 line.long 0x0 "OFSGNUSR,Offset And Gain User" hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User" hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User" group.long 0x3B4++0x3 line.long 0x0 "CAL2,Calibration Value 2" bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable" tree.end tree "ADC_2" base ad:0x400A8000 group.long 0x0++0x3 line.long 0x0 "MCR,Main Configuration" bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned" newline bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion" bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion" newline bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion" bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion" newline bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion" newline eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only" bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions" eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted" newline eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted" bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated" newline bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,3: Module clock frequency / 8" bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state" rgroup.long 0x4++0x3 line.long 0x0 "MSR,Main Status" bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated" bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress" newline bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted" bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion" newline bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test" bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU" newline hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure" bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active" newline bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?" group.long 0x10++0xB line.long 0x0 "ISR,Interrupt Status" eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated" eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated" newline eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated" eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated" newline eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated" line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs" eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete" line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs" eventfld.long 0x8 25. "SIEOCF25,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 24. "SIEOCF24,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" group.long 0x20++0xB line.long 0x0 "IMR,Interrupt Mask" bitfld.long 0x0 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x4 "CIMR0,EOC Interrupt Enable For Precision Inputs" bitfld.long 0x4 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x8 "CIMR1,EOC Interrupt Enable For Standard Inputs" bitfld.long 0x8 25. "SIEOCIEN25,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 24. "SIEOCIEN24,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x30++0x7 line.long 0x0 "WTISR,Analog Watchdog Threshold Interrupt Status" eventfld.long 0x0 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." line.long 0x4 "WTIMR,Analog Watchdog Threshold Interrupt Enable" bitfld.long 0x4 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x40++0xB line.long 0x0 "DMAE,Direct Memory Access Configuration" bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read" bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable" line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs" bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered" bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered" bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered" bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered" bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered" line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs" bitfld.long 0x8 25. "SIDMAREN25,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 24. "SIDMAREN24,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values" hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value" repeat.end group.long 0x80++0xB line.long 0x0 "PSCR,Presampling Control" bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH" newline bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion" line.long 0x4 "PSR0,Presampling Enable For Precision Inputs" bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0x8 "PSR1,Presampling Enable For Standard Inputs" bitfld.long 0x8 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" group.long 0x94++0x7 line.long 0x0 "CTR0,Conversion Timing For Precision Inputs" hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles" line.long 0x4 "CTR1,Conversion Timing For Standard Inputs" hexmask.long.byte 0x4 1.--7. 1. "INPSAMP,Specifies the sample duration in terms of conversion clock cycles" bitfld.long 0x4 0. "TSENSOR_SEL,Temperature Sensor Voltage Select" "0: Selects temperature sensor source 0,1: Selects temperature sensor source 1" group.long 0xA4++0x7 line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xB4++0x7 line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected" line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xC8++0x3 line.long 0x0 "PDEDR,Power Down Exit Delay" hexmask.long.byte 0x0 0.--7. 1. "PDED,Delay" rgroup.long 0x100++0x1F line.long 0x0 "PCDR0,Precision Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" line.long 0x4 "PCDR1,Precision Input n Conversion Data" bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data" line.long 0x8 "PCDR2,Precision Input n Conversion Data" bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data" line.long 0xC "PCDR3,Precision Input n Conversion Data" bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data" line.long 0x10 "PCDR4,Precision Input n Conversion Data" bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data" line.long 0x14 "PCDR5,Precision Input n Conversion Data" bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data" line.long 0x18 "PCDR6,Precision Input n Conversion Data" bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data" line.long 0x1C "PCDR7,Precision Input n Conversion Data" bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data" repeat 26. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x180)++0x3 line.long 0x0 "ICDR[$1],Standard Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end group.long 0x2B0++0x3 line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs" bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2C0++0xF line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0xC "CWSELRSI3,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0xC 4.--5. "WSEL_SI1_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0xC 0.--1. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2E0++0x7 line.long 0x0 "CWENR0,Channel Watchdog Enable For Precision Inputs" bitfld.long 0x0 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable" bitfld.long 0x0 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable" bitfld.long 0x0 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable" bitfld.long 0x0 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable" bitfld.long 0x0 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable" line.long 0x4 "CWENR1,Channel Watchdog Enable For Standard Inputs" bitfld.long 0x4 25. "CWEN57,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 24. "CWEN56,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" group.long 0x2F0++0x7 line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs" eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs" eventfld.long 0x4 25. "AWOR_CH25,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 24. "AWOR_CH24,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" group.long 0x340++0x13 line.long 0x0 "STCR1,Self-Test Configuration 1" hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C" hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S" line.long 0x4 "STCR2,Self-Test Configuration 2" bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated" eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected" newline bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable" bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line" bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line" line.long 0x8 "STCR3,Self-Test Configuration 3" bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3" hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step" line.long 0xC "STBRR,Self-Test Baud Rate" bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.." hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate" line.long 0x10 "STSR1,Self-Test Status 1" eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence" eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period." newline eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten" eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete" newline eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete" eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete" newline eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error" eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error" newline eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error" eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error" newline hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C" rgroup.long 0x354++0xB line.long 0x0 "STSR2,Self-Test Status 2" hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1" line.long 0x4 "STSR3,Self-Test Status 3" hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2" hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0" line.long 0x8 "STSR4,Self-Test Status 4" hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C" rgroup.long 0x370++0x3 line.long 0x0 "STDR1,Self-Test Conversion Data 1" bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten" newline hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data" group.long 0x380++0x3 line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x388++0x7 line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2" bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x394++0xF line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW5R,Self-Test Analog Watchdog C" hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register" bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3" bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1" line.long 0xC "CALBISTREG,Control And Calibration Status" bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?" bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles" newline rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress" bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared." newline bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples" bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable" newline eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully" bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration" group.long 0x3A8++0x3 line.long 0x0 "OFSGNUSR,Offset And Gain User" hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User" hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User" group.long 0x3B4++0x3 line.long 0x0 "CAL2,Calibration Value 2" bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable" tree.end tree "ADC_3" base ad:0x400AC000 group.long 0x0++0x3 line.long 0x0 "MCR,Main Configuration" bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned" newline bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion" bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion" newline bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion" bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion" newline bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion" newline eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only" bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions" eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted" newline eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted" bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated" newline bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,3: Module clock frequency / 8" bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state" rgroup.long 0x4++0x3 line.long 0x0 "MSR,Main Status" bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated" bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress" newline bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted" bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion" newline bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test" bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU" newline hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure" bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active" newline bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?" group.long 0x10++0xB line.long 0x0 "ISR,Interrupt Status" eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated" eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated" newline eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated" eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated" newline eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated" line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs" eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete" line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs" eventfld.long 0x8 25. "SIEOCF25,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 24. "SIEOCF24,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" group.long 0x20++0xB line.long 0x0 "IMR,Interrupt Mask" bitfld.long 0x0 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x4 "CIMR0,EOC Interrupt Enable For Precision Inputs" bitfld.long 0x4 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x8 "CIMR1,EOC Interrupt Enable For Standard Inputs" bitfld.long 0x8 25. "SIEOCIEN25,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 24. "SIEOCIEN24,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x30++0x7 line.long 0x0 "WTISR,Analog Watchdog Threshold Interrupt Status" eventfld.long 0x0 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." line.long 0x4 "WTIMR,Analog Watchdog Threshold Interrupt Enable" bitfld.long 0x4 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x40++0xB line.long 0x0 "DMAE,Direct Memory Access Configuration" bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read" bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable" line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs" bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered" bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered" bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered" bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered" bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered" line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs" bitfld.long 0x8 25. "SIDMAREN25,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 24. "SIDMAREN24,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values" hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value" repeat.end group.long 0x80++0xB line.long 0x0 "PSCR,Presampling Control" bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH" newline bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion" line.long 0x4 "PSR0,Presampling Enable For Precision Inputs" bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0x8 "PSR1,Presampling Enable For Standard Inputs" bitfld.long 0x8 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" group.long 0x94++0x7 line.long 0x0 "CTR0,Conversion Timing For Precision Inputs" hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles" line.long 0x4 "CTR1,Conversion Timing For Standard Inputs" hexmask.long.byte 0x4 1.--7. 1. "INPSAMP,Specifies the sample duration in terms of conversion clock cycles" bitfld.long 0x4 0. "TSENSOR_SEL,Temperature Sensor Voltage Select" "0: Selects temperature sensor source 0,1: Selects temperature sensor source 1" group.long 0xA4++0x7 line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xB4++0x7 line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected" line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xC8++0x3 line.long 0x0 "PDEDR,Power Down Exit Delay" hexmask.long.byte 0x0 0.--7. 1. "PDED,Delay" rgroup.long 0x100++0x1F line.long 0x0 "PCDR0,Precision Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" line.long 0x4 "PCDR1,Precision Input n Conversion Data" bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data" line.long 0x8 "PCDR2,Precision Input n Conversion Data" bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data" line.long 0xC "PCDR3,Precision Input n Conversion Data" bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data" line.long 0x10 "PCDR4,Precision Input n Conversion Data" bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data" line.long 0x14 "PCDR5,Precision Input n Conversion Data" bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data" line.long 0x18 "PCDR6,Precision Input n Conversion Data" bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data" line.long 0x1C "PCDR7,Precision Input n Conversion Data" bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data" repeat 26. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x180)++0x3 line.long 0x0 "ICDR[$1],Standard Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end group.long 0x2B0++0x3 line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs" bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2C0++0xF line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0xC "CWSELRSI3,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0xC 4.--5. "WSEL_SI1_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0xC 0.--1. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2E0++0x7 line.long 0x0 "CWENR0,Channel Watchdog Enable For Precision Inputs" bitfld.long 0x0 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable" bitfld.long 0x0 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable" bitfld.long 0x0 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable" bitfld.long 0x0 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable" bitfld.long 0x0 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable" line.long 0x4 "CWENR1,Channel Watchdog Enable For Standard Inputs" bitfld.long 0x4 25. "CWEN57,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 24. "CWEN56,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" group.long 0x2F0++0x7 line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs" eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs" eventfld.long 0x4 25. "AWOR_CH25,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 24. "AWOR_CH24,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" group.long 0x340++0x13 line.long 0x0 "STCR1,Self-Test Configuration 1" hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C" hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S" line.long 0x4 "STCR2,Self-Test Configuration 2" bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated" eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected" newline bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable" bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line" bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line" line.long 0x8 "STCR3,Self-Test Configuration 3" bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3" hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step" line.long 0xC "STBRR,Self-Test Baud Rate" bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.." hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate" line.long 0x10 "STSR1,Self-Test Status 1" eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence" eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period." newline eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten" eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete" newline eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete" eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete" newline eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error" eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error" newline eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error" eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error" newline hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C" rgroup.long 0x354++0xB line.long 0x0 "STSR2,Self-Test Status 2" hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1" line.long 0x4 "STSR3,Self-Test Status 3" hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2" hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0" line.long 0x8 "STSR4,Self-Test Status 4" hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C" rgroup.long 0x370++0x3 line.long 0x0 "STDR1,Self-Test Conversion Data 1" bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten" newline hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data" group.long 0x380++0x3 line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x388++0x7 line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2" bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x394++0xF line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW5R,Self-Test Analog Watchdog C" hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register" bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3" bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1" line.long 0xC "CALBISTREG,Control And Calibration Status" bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?" bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles" newline rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress" bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared." newline bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples" bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable" newline eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully" bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration" group.long 0x3A8++0x3 line.long 0x0 "OFSGNUSR,Offset And Gain User" hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User" hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User" group.long 0x3B4++0x3 line.long 0x0 "CAL2,Calibration Value 2" bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable" tree.end tree "ADC_4" base ad:0x406D0000 group.long 0x0++0x3 line.long 0x0 "MCR,Main Configuration" bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned" newline bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion" bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion" newline bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion" bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion" newline bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion" newline eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only" bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions" eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted" newline eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted" bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated" newline bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,3: Module clock frequency / 8" bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state" rgroup.long 0x4++0x3 line.long 0x0 "MSR,Main Status" bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated" bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress" newline bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted" bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion" newline bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test" bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU" newline hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure" bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active" newline bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?" group.long 0x10++0xB line.long 0x0 "ISR,Interrupt Status" eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated" eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated" newline eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated" eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated" newline eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated" line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs" eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete" line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs" eventfld.long 0x8 25. "SIEOCF25,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 24. "SIEOCF24,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" group.long 0x20++0xB line.long 0x0 "IMR,Interrupt Mask" bitfld.long 0x0 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x4 "CIMR0,EOC Interrupt Enable For Precision Inputs" bitfld.long 0x4 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x8 "CIMR1,EOC Interrupt Enable For Standard Inputs" bitfld.long 0x8 25. "SIEOCIEN25,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 24. "SIEOCIEN24,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x30++0x7 line.long 0x0 "WTISR,Analog Watchdog Threshold Interrupt Status" eventfld.long 0x0 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." line.long 0x4 "WTIMR,Analog Watchdog Threshold Interrupt Enable" bitfld.long 0x4 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x40++0xB line.long 0x0 "DMAE,Direct Memory Access Configuration" bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read" bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable" line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs" bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered" bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered" bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered" bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered" bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered" line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs" bitfld.long 0x8 25. "SIDMAREN25,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 24. "SIDMAREN24,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values" hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value" repeat.end group.long 0x80++0xB line.long 0x0 "PSCR,Presampling Control" bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH" newline bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion" line.long 0x4 "PSR0,Presampling Enable For Precision Inputs" bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0x8 "PSR1,Presampling Enable For Standard Inputs" bitfld.long 0x8 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" group.long 0x94++0x7 line.long 0x0 "CTR0,Conversion Timing For Precision Inputs" hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles" line.long 0x4 "CTR1,Conversion Timing For Standard Inputs" hexmask.long.byte 0x4 1.--7. 1. "INPSAMP,Specifies the sample duration in terms of conversion clock cycles" bitfld.long 0x4 0. "TSENSOR_SEL,Temperature Sensor Voltage Select" "0: Selects temperature sensor source 0,1: Selects temperature sensor source 1" group.long 0xA4++0x7 line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xB4++0x7 line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected" line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xC8++0x3 line.long 0x0 "PDEDR,Power Down Exit Delay" hexmask.long.byte 0x0 0.--7. 1. "PDED,Delay" rgroup.long 0x100++0x1F line.long 0x0 "PCDR0,Precision Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" line.long 0x4 "PCDR1,Precision Input n Conversion Data" bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data" line.long 0x8 "PCDR2,Precision Input n Conversion Data" bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data" line.long 0xC "PCDR3,Precision Input n Conversion Data" bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data" line.long 0x10 "PCDR4,Precision Input n Conversion Data" bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data" line.long 0x14 "PCDR5,Precision Input n Conversion Data" bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data" line.long 0x18 "PCDR6,Precision Input n Conversion Data" bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data" line.long 0x1C "PCDR7,Precision Input n Conversion Data" bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data" repeat 26. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x180)++0x3 line.long 0x0 "ICDR[$1],Standard Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end group.long 0x2B0++0x3 line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs" bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2C0++0xF line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0xC "CWSELRSI3,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0xC 4.--5. "WSEL_SI1_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0xC 0.--1. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2E0++0x7 line.long 0x0 "CWENR0,Channel Watchdog Enable For Precision Inputs" bitfld.long 0x0 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable" bitfld.long 0x0 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable" bitfld.long 0x0 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable" bitfld.long 0x0 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable" bitfld.long 0x0 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable" line.long 0x4 "CWENR1,Channel Watchdog Enable For Standard Inputs" bitfld.long 0x4 25. "CWEN57,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 24. "CWEN56,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" group.long 0x2F0++0x7 line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs" eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs" eventfld.long 0x4 25. "AWOR_CH25,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 24. "AWOR_CH24,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" group.long 0x340++0x13 line.long 0x0 "STCR1,Self-Test Configuration 1" hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C" hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S" line.long 0x4 "STCR2,Self-Test Configuration 2" bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated" eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected" newline bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable" bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line" bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line" line.long 0x8 "STCR3,Self-Test Configuration 3" bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3" hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step" line.long 0xC "STBRR,Self-Test Baud Rate" bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.." hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate" line.long 0x10 "STSR1,Self-Test Status 1" eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence" eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period." newline eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten" eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete" newline eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete" eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete" newline eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error" eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error" newline eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error" eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error" newline hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C" rgroup.long 0x354++0xB line.long 0x0 "STSR2,Self-Test Status 2" hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1" line.long 0x4 "STSR3,Self-Test Status 3" hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2" hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0" line.long 0x8 "STSR4,Self-Test Status 4" hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C" rgroup.long 0x370++0x3 line.long 0x0 "STDR1,Self-Test Conversion Data 1" bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten" newline hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data" group.long 0x380++0x3 line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x388++0x7 line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2" bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x394++0xF line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW5R,Self-Test Analog Watchdog C" hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register" bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3" bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1" line.long 0xC "CALBISTREG,Control And Calibration Status" bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?" bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles" newline rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress" bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared." newline bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples" bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable" newline eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully" bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration" group.long 0x3A8++0x3 line.long 0x0 "OFSGNUSR,Offset And Gain User" hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User" hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User" group.long 0x3B4++0x3 line.long 0x0 "CAL2,Calibration Value 2" bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable" tree.end tree "ADC_5" base ad:0x406D4000 group.long 0x0++0x3 line.long 0x0 "MCR,Main Configuration" bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned" newline bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion" bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion" newline bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion" bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion" newline bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion" newline eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only" bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions" eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted" newline eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted" bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated" newline bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,3: Module clock frequency / 8" bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state" rgroup.long 0x4++0x3 line.long 0x0 "MSR,Main Status" bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated" bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress" newline bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted" bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion" newline bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test" bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU" newline hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure" bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active" newline bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?" group.long 0x10++0xB line.long 0x0 "ISR,Interrupt Status" eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated" eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated" newline eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated" eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated" newline eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated" line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs" eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete" line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs" eventfld.long 0x8 25. "SIEOCF25,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 24. "SIEOCF24,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" group.long 0x20++0xB line.long 0x0 "IMR,Interrupt Mask" bitfld.long 0x0 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x4 "CIMR0,EOC Interrupt Enable For Precision Inputs" bitfld.long 0x4 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x8 "CIMR1,EOC Interrupt Enable For Standard Inputs" bitfld.long 0x8 25. "SIEOCIEN25,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 24. "SIEOCIEN24,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x30++0x7 line.long 0x0 "WTISR,Analog Watchdog Threshold Interrupt Status" eventfld.long 0x0 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." line.long 0x4 "WTIMR,Analog Watchdog Threshold Interrupt Enable" bitfld.long 0x4 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x40++0xB line.long 0x0 "DMAE,Direct Memory Access Configuration" bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read" bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable" line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs" bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered" bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered" bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered" bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered" bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered" line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs" bitfld.long 0x8 25. "SIDMAREN25,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 24. "SIDMAREN24,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values" hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value" repeat.end group.long 0x80++0xB line.long 0x0 "PSCR,Presampling Control" bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH" newline bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion" line.long 0x4 "PSR0,Presampling Enable For Precision Inputs" bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0x8 "PSR1,Presampling Enable For Standard Inputs" bitfld.long 0x8 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" group.long 0x94++0x7 line.long 0x0 "CTR0,Conversion Timing For Precision Inputs" hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles" line.long 0x4 "CTR1,Conversion Timing For Standard Inputs" hexmask.long.byte 0x4 1.--7. 1. "INPSAMP,Specifies the sample duration in terms of conversion clock cycles" bitfld.long 0x4 0. "TSENSOR_SEL,Temperature Sensor Voltage Select" "0: Selects temperature sensor source 0,1: Selects temperature sensor source 1" group.long 0xA4++0x7 line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xB4++0x7 line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected" line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xC8++0x3 line.long 0x0 "PDEDR,Power Down Exit Delay" hexmask.long.byte 0x0 0.--7. 1. "PDED,Delay" rgroup.long 0x100++0x1F line.long 0x0 "PCDR0,Precision Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" line.long 0x4 "PCDR1,Precision Input n Conversion Data" bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data" line.long 0x8 "PCDR2,Precision Input n Conversion Data" bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data" line.long 0xC "PCDR3,Precision Input n Conversion Data" bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data" line.long 0x10 "PCDR4,Precision Input n Conversion Data" bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data" line.long 0x14 "PCDR5,Precision Input n Conversion Data" bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data" line.long 0x18 "PCDR6,Precision Input n Conversion Data" bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data" line.long 0x1C "PCDR7,Precision Input n Conversion Data" bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data" repeat 26. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x180)++0x3 line.long 0x0 "ICDR[$1],Standard Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end group.long 0x2B0++0x3 line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs" bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2C0++0xF line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0xC "CWSELRSI3,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0xC 4.--5. "WSEL_SI1_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0xC 0.--1. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2E0++0x7 line.long 0x0 "CWENR0,Channel Watchdog Enable For Precision Inputs" bitfld.long 0x0 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable" bitfld.long 0x0 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable" bitfld.long 0x0 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable" bitfld.long 0x0 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable" bitfld.long 0x0 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable" line.long 0x4 "CWENR1,Channel Watchdog Enable For Standard Inputs" bitfld.long 0x4 25. "CWEN57,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 24. "CWEN56,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" group.long 0x2F0++0x7 line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs" eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs" eventfld.long 0x4 25. "AWOR_CH25,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 24. "AWOR_CH24,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" group.long 0x340++0x13 line.long 0x0 "STCR1,Self-Test Configuration 1" hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C" hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S" line.long 0x4 "STCR2,Self-Test Configuration 2" bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated" eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected" newline bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable" bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line" bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line" line.long 0x8 "STCR3,Self-Test Configuration 3" bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3" hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step" line.long 0xC "STBRR,Self-Test Baud Rate" bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.." hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate" line.long 0x10 "STSR1,Self-Test Status 1" eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence" eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period." newline eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten" eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete" newline eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete" eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete" newline eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error" eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error" newline eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error" eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error" newline hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C" rgroup.long 0x354++0xB line.long 0x0 "STSR2,Self-Test Status 2" hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1" line.long 0x4 "STSR3,Self-Test Status 3" hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2" hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0" line.long 0x8 "STSR4,Self-Test Status 4" hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C" rgroup.long 0x370++0x3 line.long 0x0 "STDR1,Self-Test Conversion Data 1" bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten" newline hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data" group.long 0x380++0x3 line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x388++0x7 line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2" bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x394++0xF line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW5R,Self-Test Analog Watchdog C" hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register" bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3" bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1" line.long 0xC "CALBISTREG,Control And Calibration Status" bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?" bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles" newline rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress" bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared." newline bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples" bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable" newline eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully" bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration" group.long 0x3A8++0x3 line.long 0x0 "OFSGNUSR,Offset And Gain User" hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User" hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User" group.long 0x3B4++0x3 line.long 0x0 "CAL2,Calibration Value 2" bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable" tree.end tree "ADC_6" base ad:0x406D8000 group.long 0x0++0x3 line.long 0x0 "MCR,Main Configuration" bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned" newline bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion" bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion" newline bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion" bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge" bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion" newline bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion" newline eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only" bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions" eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted" newline eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted" bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated" newline bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,3: Module clock frequency / 8" bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state" rgroup.long 0x4++0x3 line.long 0x0 "MSR,Main Status" bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated" bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress" newline bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted" bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion" newline bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test" bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU" newline hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure" bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active" newline bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?" group.long 0x10++0xB line.long 0x0 "ISR,Interrupt Status" eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated" eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated" newline eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated" eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated" newline eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated" line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs" eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete" line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs" eventfld.long 0x8 25. "SIEOCF25,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 24. "SIEOCF24,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" newline eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete" group.long 0x20++0xB line.long 0x0 "IMR,Interrupt Mask" bitfld.long 0x0 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x0 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x0 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x4 "CIMR0,EOC Interrupt Enable For Precision Inputs" bitfld.long 0x4 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" line.long 0x8 "CIMR1,EOC Interrupt Enable For Standard Inputs" bitfld.long 0x8 25. "SIEOCIEN25,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 24. "SIEOCIEN24,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x8 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x8 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x30++0x7 line.long 0x0 "WTISR,Analog Watchdog Threshold Interrupt Status" eventfld.long 0x0 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." newline eventfld.long 0x0 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.." eventfld.long 0x0 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.." line.long 0x4 "WTIMR,Analog Watchdog Threshold Interrupt Enable" bitfld.long 0x4 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" newline bitfld.long 0x4 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" bitfld.long 0x4 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged" group.long 0x40++0xB line.long 0x0 "DMAE,Direct Memory Access Configuration" bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read" bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable" line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs" bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered" bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered" bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered" bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered" newline bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered" bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered" line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs" bitfld.long 0x8 25. "SIDMAREN25,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 24. "SIDMAREN24,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" newline bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values" hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value" repeat.end group.long 0x80++0xB line.long 0x0 "PSCR,Presampling Control" bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH" bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH" newline bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion" line.long 0x4 "PSR0,Presampling Enable For Precision Inputs" bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" line.long 0x8 "PSR1,Presampling Enable For Standard Inputs" bitfld.long 0x8 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable" bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable" group.long 0x94++0x7 line.long 0x0 "CTR0,Conversion Timing For Precision Inputs" hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles" line.long 0x4 "CTR1,Conversion Timing For Standard Inputs" hexmask.long.byte 0x4 1.--7. 1. "INPSAMP,Specifies the sample duration in terms of conversion clock cycles" bitfld.long 0x4 0. "TSENSOR_SEL,Temperature Sensor Voltage Select" "0: Selects temperature sensor source 0,1: Selects temperature sensor source 1" group.long 0xA4++0x7 line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected" line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xB4++0x7 line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs" bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected" bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected" newline bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected" bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected" newline bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected" bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected" newline bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected" bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected" line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs" bitfld.long 0x4 25. "CH57,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 24. "CH56,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" newline bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected" group.long 0xC8++0x3 line.long 0x0 "PDEDR,Power Down Exit Delay" hexmask.long.byte 0x0 0.--7. 1. "PDED,Delay" rgroup.long 0x100++0x1F line.long 0x0 "PCDR0,Precision Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" line.long 0x4 "PCDR1,Precision Input n Conversion Data" bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data" line.long 0x8 "PCDR2,Precision Input n Conversion Data" bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data" line.long 0xC "PCDR3,Precision Input n Conversion Data" bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data" line.long 0x10 "PCDR4,Precision Input n Conversion Data" bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data" line.long 0x14 "PCDR5,Precision Input n Conversion Data" bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data" line.long 0x18 "PCDR6,Precision Input n Conversion Data" bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data" line.long 0x1C "PCDR7,Precision Input n Conversion Data" bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data" repeat 26. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x180)++0x3 line.long 0x0 "ICDR[$1],Standard Input n Conversion Data" bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten" newline bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?" hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data" repeat.end group.long 0x2B0++0x3 line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs" bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2C0++0xF line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" newline bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" line.long 0xC "CWSELRSI3,Channel Analog Watchdog Select For Standard Inputs" bitfld.long 0xC 4.--5. "WSEL_SI1_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" bitfld.long 0xC 0.--1. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3" group.long 0x2E0++0x7 line.long 0x0 "CWENR0,Channel Watchdog Enable For Precision Inputs" bitfld.long 0x0 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable" bitfld.long 0x0 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable" bitfld.long 0x0 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable" bitfld.long 0x0 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable" bitfld.long 0x0 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable" line.long 0x4 "CWENR1,Channel Watchdog Enable For Standard Inputs" bitfld.long 0x4 25. "CWEN57,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 24. "CWEN56,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" newline bitfld.long 0x4 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" bitfld.long 0x4 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable" group.long 0x2F0++0x7 line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs" eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits" line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs" eventfld.long 0x4 25. "AWOR_CH25,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 24. "AWOR_CH24,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" newline eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits" group.long 0x340++0x13 line.long 0x0 "STCR1,Self-Test Configuration 1" hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C" hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S" line.long 0x4 "STCR2,Self-Test Configuration 2" bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated" eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected" newline bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated" bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated" newline bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable" bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line" bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line" newline bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line" line.long 0x8 "STCR3,Self-Test Configuration 3" bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3" hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step" line.long 0xC "STBRR,Self-Test Baud Rate" bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.." hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate" line.long 0x10 "STSR1,Self-Test Status 1" eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence" eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period." newline eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten" eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete" newline eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete" eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete" newline eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error" eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error" newline eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error" eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error" newline hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C" rgroup.long 0x354++0xB line.long 0x0 "STSR2,Self-Test Status 2" hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1" line.long 0x4 "STSR3,Self-Test Status 3" hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2" hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0" line.long 0x8 "STSR4,Self-Test Status 4" hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C" rgroup.long 0x370++0x3 line.long 0x0 "STDR1,Self-Test Conversion Data 1" bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available" bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten" newline hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data" group.long 0x380++0x3 line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x388++0x7 line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2" bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" group.long 0x394++0xF line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0" bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x4 "STAW5R,Self-Test Analog Watchdog C" hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value" hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value" line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register" bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3" bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1" line.long 0xC "CALBISTREG,Control And Calibration Status" bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?" bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles" newline rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress" bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared." newline bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples" bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable" newline eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully" bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration" group.long 0x3A8++0x3 line.long 0x0 "OFSGNUSR,Offset And Gain User" hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User" hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User" group.long 0x3B4++0x3 line.long 0x0 "CAL2,Calibration Value 2" bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable" tree.end tree.end tree "ADC_BIST (ADC Built-In Self-Test)" base ad:0x40704000 rgroup.long 0x0++0x3 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" hexmask.long.byte 0x0 4.--7. 1. "NUMSDADC,Number Of SDADC Instances" group.long 0x4++0x7 line.long 0x0 "BISTCFG,ADCBIST Configuration" bitfld.long 0x0 1.--2. "TESTSEL,Test Selection" "0: No test selected,?,?,3: Selects the SDADC test" bitfld.long 0x0 0. "ADCBISTEN,ADCBIST Enable" "0: Disables,1: Enables" line.long 0x4 "BISTCTL,ADCBIST Control" bitfld.long 0x4 2. "STOPSD,Stop SDADC Test" "0: Default state,1: Stops the SDADC test" bitfld.long 0x4 1. "CLEAR,Clear BIST" "0,1" bitfld.long 0x4 0. "TESTRUN,Test Run" "0: No test running,1: Starts a test" rgroup.long 0xC++0x3 line.long 0x0 "BISTSTAT,ADCBIST Status" bitfld.long 0x0 16.--17. "SDSUM,SDADC Test Summary" "0: Not started,1: Currently running,2: Completed,?" group.long 0x200++0x7 line.long 0x0 "SDCFG,SDADC Test Configuration" hexmask.long.byte 0x0 16.--23. 1. "DACSR,R2RDAC Symbol Rate" hexmask.long.byte 0x0 0.--3. 1. "SDSEL,SDADC Selection" line.long 0x4 "SDSINECFG,SDADC Sine Wave Configuration" hexmask.long 0x4 0.--31. 1. "SINESTEP,Sine Wave Step Size" group.long 0x800++0x3 line.long 0x0 "FIRF,Finite Impulse Response Filter" hexmask.long 0x0 0.--31. 1. "PLACEHOLDER,Finite Impulse Response Filter" tree.end tree "ADC_BIST_FIR (ADC BIST Finite Impulse Response Filter)" base ad:0x40704800 group.long 0x0++0x7 line.long 0x0 "FIR_CNTRL,Finite Impulse Response Filter Control" bitfld.long 0x0 1. "PGA2_EN,Programmable gain by 2 (PGA2) enable/disable" "0: PGA2 enable,1: PGA2 disable" bitfld.long 0x0 0. "GEC_EN,Gain error correction enable" "0: GEC enable,1: GEC disable" line.long 0x4 "GEC_PRGRM_FACTOR,Gain Error Correction Programmable Factor" hexmask.long.tbyte 0x4 0.--17. 1. "GEC_PRGRM,GEC programmable factor" group.long 0x3C++0xF line.long 0x0 "SFR,Status Flag Register" rbitfld.long 0x0 8. "DFEF,Data FIFO Empty Flag" "0: Data FIFO is not empty,1: Data FIFO is empty" rbitfld.long 0x0 2. "CDVF,Converted Data Valid Flag" "0: Data output from FIR is not valid,1: Data output from FIR is valid" newline eventfld.long 0x0 1. "DFORF,Data FIFO Overrun Flag" "0: No overrun has occurred since the last time the..,1: Overrun has occurred or the DFORF has not been.." eventfld.long 0x0 0. "DFFF,Data FIFO Full Flag" "0,1" line.long 0x4 "RSER,Request Select and Enable Register" bitfld.long 0x4 16. "DFFDIRS,Data FIFO Full DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" bitfld.long 0x4 1. "DFORIE,Data FIFO Overrun Interrupt Enable" "0: Interrupt request is disabled when data FIFO..,1: Interrupt request is enabled when data FIFO.." newline bitfld.long 0x4 0. "DFFDIRE,Data FIFO Full DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled when data FIFO..,1: Interrupt/DMA request is enabled when data FIFO.." line.long 0x8 "OSDR,Output Settling Delay Register" hexmask.long.byte 0x8 0.--7. 1. "OSD,Output Settling Delay" line.long 0xC "FCR,FIFO Control Register" bitfld.long 0xC 16. "FRST,FIFO Flush Reset" "0: No effect.,1: Generate a single cycle reset event to flush the.." hexmask.long.byte 0xC 8.--11. 1. "FTHLD,FIFO Threshold" newline bitfld.long 0xC 3. "FOWEN,FIFO Over Write Enable" "0: Data FIFO OW option disabled.,1: Data FIFO OW option enabled." rbitfld.long 0xC 1.--2. "FSIZE,FIFO Size" "0: FIFO depth = 1 dataword,1: FIFO depth = 4 datawords,2: FIFO depth = 8 datawords,3: FIFO depth = 16 datawords" newline bitfld.long 0xC 0. "FE,FIFO Enable" "0: Data FIFO is not enabled for multiple datawords;..,1: Data FIFO is enabled; FIFO depth is indicated by.." rgroup.long 0x4C++0x3 line.long 0x0 "CDR,Converted Data Register" hexmask.long.word 0x0 0.--15. 1. "CDATA,Converted Data Register" tree.end tree "AXBS_LITE (Crossbar Switch Lite)" base ad:0x40200000 group.long 0x0++0x3 line.long 0x0 "PRS0,Priority Slave Registers" bitfld.long 0x0 28.--30. "M7,Master 7 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 24.--26. "M6,Master 6 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 20.--22. "M5,Master 5 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 16.--18. "M4,Master 4 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." newline bitfld.long 0x0 12.--14. "M3,Master 3 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." bitfld.long 0x0 8.--10. "M2,Master 2 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 4.--6. "M1,Master 1 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 0.--2. "M0,Master 0 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or the lowest priority.." group.long 0x10++0x3 line.long 0x0 "CRS0,Control Register" bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.." bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low-power mode request has the highest..,1: The low-power mode request has the lowest.." newline bitfld.long 0x0 23. "HPE7,High Priority Elevation 7" "0: Master high-priority elevation for master 7. is..,1: Master high-priority elevation for master 7. is.." bitfld.long 0x0 22. "HPE6,High Priority Elevation 6" "0: Master high-priority elevation for master 6. is..,1: Master high-priority elevation for master 6. is.." newline bitfld.long 0x0 21. "HPE5,High Priority Elevation 5" "0: Master high-priority elevation for master 5. is..,1: Master high-priority elevation for master 5. is.." bitfld.long 0x0 20. "HPE4,High Priority Elevation 4" "0: Master high-priority elevation for master 4. is..,1: Master high-priority elevation for master 4. is.." newline bitfld.long 0x0 19. "HPE3,High Priority Elevation 3" "0: Master high-priority elevation for master 3. is..,1: Master high-priority elevation for master 3. is.." bitfld.long 0x0 18. "HPE2,High Priority Elevation 2" "0: Master high-priority elevation for master 2. is..,1: Master high-priority elevation for master 2. is.." newline bitfld.long 0x0 17. "HPE1,High Priority Elevation 1" "0: Master high-priority elevation for master 1. is..,1: Master high-priority elevation for master 1. is.." bitfld.long 0x0 16. "HPE0,High Priority Elevation 0" "0: Master high-priority elevation for master 0. is..,1: Master high-priority elevation for master 0. is.." newline bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?" bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?" newline bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7" group.long 0x100++0x3 line.long 0x0 "PRS1,Priority Slave Registers" bitfld.long 0x0 28.--30. "M7,Master 7 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 24.--26. "M6,Master 6 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 20.--22. "M5,Master 5 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 16.--18. "M4,Master 4 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." newline bitfld.long 0x0 12.--14. "M3,Master 3 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." bitfld.long 0x0 8.--10. "M2,Master 2 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 4.--6. "M1,Master 1 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 0.--2. "M0,Master 0 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or the lowest priority.." group.long 0x110++0x3 line.long 0x0 "CRS1,Control Register" bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.." bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low-power mode request has the highest..,1: The low-power mode request has the lowest.." newline bitfld.long 0x0 23. "HPE7,High Priority Elevation 7" "0: Master high-priority elevation for master 7. is..,1: Master high-priority elevation for master 7. is.." bitfld.long 0x0 22. "HPE6,High Priority Elevation 6" "0: Master high-priority elevation for master 6. is..,1: Master high-priority elevation for master 6. is.." newline bitfld.long 0x0 21. "HPE5,High Priority Elevation 5" "0: Master high-priority elevation for master 5. is..,1: Master high-priority elevation for master 5. is.." bitfld.long 0x0 20. "HPE4,High Priority Elevation 4" "0: Master high-priority elevation for master 4. is..,1: Master high-priority elevation for master 4. is.." newline bitfld.long 0x0 19. "HPE3,High Priority Elevation 3" "0: Master high-priority elevation for master 3. is..,1: Master high-priority elevation for master 3. is.." bitfld.long 0x0 18. "HPE2,High Priority Elevation 2" "0: Master high-priority elevation for master 2. is..,1: Master high-priority elevation for master 2. is.." newline bitfld.long 0x0 17. "HPE1,High Priority Elevation 1" "0: Master high-priority elevation for master 1. is..,1: Master high-priority elevation for master 1. is.." bitfld.long 0x0 16. "HPE0,High Priority Elevation 0" "0: Master high-priority elevation for master 0. is..,1: Master high-priority elevation for master 0. is.." newline bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?" bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?" newline bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7" group.long 0x200++0x3 line.long 0x0 "PRS2,Priority Slave Registers" bitfld.long 0x0 28.--30. "M7,Master 7 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 24.--26. "M6,Master 6 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 20.--22. "M5,Master 5 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 16.--18. "M4,Master 4 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." newline bitfld.long 0x0 12.--14. "M3,Master 3 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." bitfld.long 0x0 8.--10. "M2,Master 2 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 4.--6. "M1,Master 1 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 0.--2. "M0,Master 0 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or the lowest priority.." group.long 0x210++0x3 line.long 0x0 "CRS2,Control Register" bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.." bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low-power mode request has the highest..,1: The low-power mode request has the lowest.." newline bitfld.long 0x0 23. "HPE7,High Priority Elevation 7" "0: Master high-priority elevation for master 7. is..,1: Master high-priority elevation for master 7. is.." bitfld.long 0x0 22. "HPE6,High Priority Elevation 6" "0: Master high-priority elevation for master 6. is..,1: Master high-priority elevation for master 6. is.." newline bitfld.long 0x0 21. "HPE5,High Priority Elevation 5" "0: Master high-priority elevation for master 5. is..,1: Master high-priority elevation for master 5. is.." bitfld.long 0x0 20. "HPE4,High Priority Elevation 4" "0: Master high-priority elevation for master 4. is..,1: Master high-priority elevation for master 4. is.." newline bitfld.long 0x0 19. "HPE3,High Priority Elevation 3" "0: Master high-priority elevation for master 3. is..,1: Master high-priority elevation for master 3. is.." bitfld.long 0x0 18. "HPE2,High Priority Elevation 2" "0: Master high-priority elevation for master 2. is..,1: Master high-priority elevation for master 2. is.." newline bitfld.long 0x0 17. "HPE1,High Priority Elevation 1" "0: Master high-priority elevation for master 1. is..,1: Master high-priority elevation for master 1. is.." bitfld.long 0x0 16. "HPE0,High Priority Elevation 0" "0: Master high-priority elevation for master 0. is..,1: Master high-priority elevation for master 0. is.." newline bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?" bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?" newline bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7" group.long 0x300++0x3 line.long 0x0 "PRS3,Priority Slave Registers" bitfld.long 0x0 28.--30. "M7,Master 7 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 24.--26. "M6,Master 6 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 20.--22. "M5,Master 5 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 16.--18. "M4,Master 4 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." newline bitfld.long 0x0 12.--14. "M3,Master 3 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." bitfld.long 0x0 8.--10. "M2,Master 2 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 4.--6. "M1,Master 1 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 0.--2. "M0,Master 0 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or the lowest priority.." group.long 0x310++0x3 line.long 0x0 "CRS3,Control Register" bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.." bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low-power mode request has the highest..,1: The low-power mode request has the lowest.." newline bitfld.long 0x0 23. "HPE7,High Priority Elevation 7" "0: Master high-priority elevation for master 7. is..,1: Master high-priority elevation for master 7. is.." bitfld.long 0x0 22. "HPE6,High Priority Elevation 6" "0: Master high-priority elevation for master 6. is..,1: Master high-priority elevation for master 6. is.." newline bitfld.long 0x0 21. "HPE5,High Priority Elevation 5" "0: Master high-priority elevation for master 5. is..,1: Master high-priority elevation for master 5. is.." bitfld.long 0x0 20. "HPE4,High Priority Elevation 4" "0: Master high-priority elevation for master 4. is..,1: Master high-priority elevation for master 4. is.." newline bitfld.long 0x0 19. "HPE3,High Priority Elevation 3" "0: Master high-priority elevation for master 3. is..,1: Master high-priority elevation for master 3. is.." bitfld.long 0x0 18. "HPE2,High Priority Elevation 2" "0: Master high-priority elevation for master 2. is..,1: Master high-priority elevation for master 2. is.." newline bitfld.long 0x0 17. "HPE1,High Priority Elevation 1" "0: Master high-priority elevation for master 1. is..,1: Master high-priority elevation for master 1. is.." bitfld.long 0x0 16. "HPE0,High Priority Elevation 0" "0: Master high-priority elevation for master 0. is..,1: Master high-priority elevation for master 0. is.." newline bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?" bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?" newline bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7" group.long 0x400++0x3 line.long 0x0 "PRS4,Priority Slave Registers" bitfld.long 0x0 28.--30. "M7,Master 7 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 24.--26. "M6,Master 6 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 20.--22. "M5,Master 5 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 16.--18. "M4,Master 4 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." newline bitfld.long 0x0 12.--14. "M3,Master 3 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." bitfld.long 0x0 8.--10. "M2,Master 2 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 4.--6. "M1,Master 1 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 0.--2. "M0,Master 0 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or the lowest priority.." group.long 0x410++0x3 line.long 0x0 "CRS4,Control Register" bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.." bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low-power mode request has the highest..,1: The low-power mode request has the lowest.." newline bitfld.long 0x0 23. "HPE7,High Priority Elevation 7" "0: Master high-priority elevation for master 7. is..,1: Master high-priority elevation for master 7. is.." bitfld.long 0x0 22. "HPE6,High Priority Elevation 6" "0: Master high-priority elevation for master 6. is..,1: Master high-priority elevation for master 6. is.." newline bitfld.long 0x0 21. "HPE5,High Priority Elevation 5" "0: Master high-priority elevation for master 5. is..,1: Master high-priority elevation for master 5. is.." bitfld.long 0x0 20. "HPE4,High Priority Elevation 4" "0: Master high-priority elevation for master 4. is..,1: Master high-priority elevation for master 4. is.." newline bitfld.long 0x0 19. "HPE3,High Priority Elevation 3" "0: Master high-priority elevation for master 3. is..,1: Master high-priority elevation for master 3. is.." bitfld.long 0x0 18. "HPE2,High Priority Elevation 2" "0: Master high-priority elevation for master 2. is..,1: Master high-priority elevation for master 2. is.." newline bitfld.long 0x0 17. "HPE1,High Priority Elevation 1" "0: Master high-priority elevation for master 1. is..,1: Master high-priority elevation for master 1. is.." bitfld.long 0x0 16. "HPE0,High Priority Elevation 0" "0: Master high-priority elevation for master 0. is..,1: Master high-priority elevation for master 0. is.." newline bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?" bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?" newline bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7" group.long 0x500++0x3 line.long 0x0 "PRS5,Priority Slave Registers" bitfld.long 0x0 28.--30. "M7,Master 7 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 24.--26. "M6,Master 6 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 20.--22. "M5,Master 5 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 16.--18. "M4,Master 4 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." newline bitfld.long 0x0 12.--14. "M3,Master 3 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." bitfld.long 0x0 8.--10. "M2,Master 2 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 4.--6. "M1,Master 1 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 0.--2. "M0,Master 0 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or the lowest priority.." group.long 0x510++0x3 line.long 0x0 "CRS5,Control Register" bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.." bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low-power mode request has the highest..,1: The low-power mode request has the lowest.." newline bitfld.long 0x0 23. "HPE7,High Priority Elevation 7" "0: Master high-priority elevation for master 7. is..,1: Master high-priority elevation for master 7. is.." bitfld.long 0x0 22. "HPE6,High Priority Elevation 6" "0: Master high-priority elevation for master 6. is..,1: Master high-priority elevation for master 6. is.." newline bitfld.long 0x0 21. "HPE5,High Priority Elevation 5" "0: Master high-priority elevation for master 5. is..,1: Master high-priority elevation for master 5. is.." bitfld.long 0x0 20. "HPE4,High Priority Elevation 4" "0: Master high-priority elevation for master 4. is..,1: Master high-priority elevation for master 4. is.." newline bitfld.long 0x0 19. "HPE3,High Priority Elevation 3" "0: Master high-priority elevation for master 3. is..,1: Master high-priority elevation for master 3. is.." bitfld.long 0x0 18. "HPE2,High Priority Elevation 2" "0: Master high-priority elevation for master 2. is..,1: Master high-priority elevation for master 2. is.." newline bitfld.long 0x0 17. "HPE1,High Priority Elevation 1" "0: Master high-priority elevation for master 1. is..,1: Master high-priority elevation for master 1. is.." bitfld.long 0x0 16. "HPE0,High Priority Elevation 0" "0: Master high-priority elevation for master 0. is..,1: Master high-priority elevation for master 0. is.." newline bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?" bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?" newline bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7" group.long 0x600++0x3 line.long 0x0 "PRS6,Priority Slave Registers" bitfld.long 0x0 28.--30. "M7,Master 7 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 24.--26. "M6,Master 6 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 20.--22. "M5,Master 5 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 16.--18. "M4,Master 4 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." newline bitfld.long 0x0 12.--14. "M3,Master 3 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." bitfld.long 0x0 8.--10. "M2,Master 2 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 4.--6. "M1,Master 1 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 0.--2. "M0,Master 0 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or the lowest priority.." group.long 0x610++0x3 line.long 0x0 "CRS6,Control Register" bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.." bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low-power mode request has the highest..,1: The low-power mode request has the lowest.." newline bitfld.long 0x0 23. "HPE7,High Priority Elevation 7" "0: Master high-priority elevation for master 7. is..,1: Master high-priority elevation for master 7. is.." bitfld.long 0x0 22. "HPE6,High Priority Elevation 6" "0: Master high-priority elevation for master 6. is..,1: Master high-priority elevation for master 6. is.." newline bitfld.long 0x0 21. "HPE5,High Priority Elevation 5" "0: Master high-priority elevation for master 5. is..,1: Master high-priority elevation for master 5. is.." bitfld.long 0x0 20. "HPE4,High Priority Elevation 4" "0: Master high-priority elevation for master 4. is..,1: Master high-priority elevation for master 4. is.." newline bitfld.long 0x0 19. "HPE3,High Priority Elevation 3" "0: Master high-priority elevation for master 3. is..,1: Master high-priority elevation for master 3. is.." bitfld.long 0x0 18. "HPE2,High Priority Elevation 2" "0: Master high-priority elevation for master 2. is..,1: Master high-priority elevation for master 2. is.." newline bitfld.long 0x0 17. "HPE1,High Priority Elevation 1" "0: Master high-priority elevation for master 1. is..,1: Master high-priority elevation for master 1. is.." bitfld.long 0x0 16. "HPE0,High Priority Elevation 0" "0: Master high-priority elevation for master 0. is..,1: Master high-priority elevation for master 0. is.." newline bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?" bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?" newline bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7" group.long 0x700++0x3 line.long 0x0 "PRS7,Priority Slave Registers" bitfld.long 0x0 28.--30. "M7,Master 7 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 24.--26. "M6,Master 6 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 20.--22. "M5,Master 5 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 16.--18. "M4,Master 4 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." newline bitfld.long 0x0 12.--14. "M3,Master 3 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." bitfld.long 0x0 8.--10. "M2,Master 2 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8the or lowest priority.." newline bitfld.long 0x0 4.--6. "M1,Master 1 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or lowest priority when.." bitfld.long 0x0 0.--2. "M0,Master 0 Priority" "0: This master has level 1 or highest priority when..,1: This master has level 2 priority when accessing..,2: This master has level 3 priority when accessing..,3: This master has level 4 priority when accessing..,4: This master has level 5 priority when accessing..,5: This master has level 6 priority when accessing..,6: This master has level 7 priority when accessing..,7: This master has level 8 or the lowest priority.." group.long 0x710++0x3 line.long 0x0 "CRS7,Control Register" bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.." bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low-power mode request has the highest..,1: The low-power mode request has the lowest.." newline bitfld.long 0x0 23. "HPE7,High Priority Elevation 7" "0: Master high-priority elevation for master 7. is..,1: Master high-priority elevation for master 7. is.." bitfld.long 0x0 22. "HPE6,High Priority Elevation 6" "0: Master high-priority elevation for master 6. is..,1: Master high-priority elevation for master 6. is.." newline bitfld.long 0x0 21. "HPE5,High Priority Elevation 5" "0: Master high-priority elevation for master 5. is..,1: Master high-priority elevation for master 5. is.." bitfld.long 0x0 20. "HPE4,High Priority Elevation 4" "0: Master high-priority elevation for master 4. is..,1: Master high-priority elevation for master 4. is.." newline bitfld.long 0x0 19. "HPE3,High Priority Elevation 3" "0: Master high-priority elevation for master 3. is..,1: Master high-priority elevation for master 3. is.." bitfld.long 0x0 18. "HPE2,High Priority Elevation 2" "0: Master high-priority elevation for master 2. is..,1: Master high-priority elevation for master 2. is.." newline bitfld.long 0x0 17. "HPE1,High Priority Elevation 1" "0: Master high-priority elevation for master 1. is..,1: Master high-priority elevation for master 1. is.." bitfld.long 0x0 16. "HPE0,High Priority Elevation 0" "0: Master high-priority elevation for master 0. is..,1: Master high-priority elevation for master 0. is.." newline bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?" bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?" newline bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7" tree.end tree "BCTU (Body Cross-Triggering Unit)" base ad:0x0 tree "BCTU" base ad:0x40084000 group.long 0x0++0x3 line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 31. "Software_Reset,Software Reset" "0: Deasserts,1: Asserts" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Enable (normal operation),1: Disable (low-power operation)" newline bitfld.long 0x0 29. "FRZ,Debug Freeze" "0: Disables,1: Enables" bitfld.long 0x0 26. "GTRGEN,Global Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "DMA2,Enable ADC2DR DMA" "0: Disable,1: Enable" bitfld.long 0x0 17. "DMA1,Enable ADC1DR DMA" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "DMA0,Enable ADC0DR DMA" "0: Disable,1: Enable" bitfld.long 0x0 7. "TRGEN,Trigger Interrupt Request Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "LIST_IEN,CL Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "IEN2,Interrupt Enable For ADC2DR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "IEN1,Interrupt Enable For ADC1DR" "0: Disable,1: Enable" bitfld.long 0x0 0. "IEN0,Interrupt Enable For ADC0DR" "0: Disable,1: Enable" group.long 0x8++0x3 line.long 0x0 "MSR,Module Status" bitfld.long 0x0 31. "TRGF_CLR,TRGF Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 26. "LIST2_Last_CLR,CL 2 Last Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 25. "LIST1_Last_CLR,CL 1 Last Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 24. "LIST0_Last_CLR,CL 0 Last Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 22. "DATAOVR2_CLR,DATAOVR2 Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 21. "DATAOVR1_CLR,DATAOVR1 Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 20. "DATAOVR0_CLR,DATAOVR0 Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 18. "NDATA2_CLR,New Data Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 17. "NDATA1_CLR,New Data Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 16. "NDATA0_CLR,New Data Clear" "0: No action,1: Changes to 0" newline rbitfld.long 0x0 15. "TRGF,Trigger Flag" "0: No ADC triggered,1: An ADC was triggered" rbitfld.long 0x0 10. "LIST2_Last,CL 2 Last Conversion" "0: Last conversion not complete,1: Last conversion complete" newline rbitfld.long 0x0 9. "LIST1_Last,CL 1 Last Conversion" "0: Last conversion not complete,1: Last conversion complete" rbitfld.long 0x0 8. "LIST0_Last,CL 0 Last Conversion" "0: Last conversion not complete,1: Last conversion complete" newline rbitfld.long 0x0 6. "DATAOVR2,Data Overrun 2" "0: Data not overwritten,1: Data overwritten" rbitfld.long 0x0 5. "DATAOVR1,Data Overrun 1" "0: Data not overwritten,1: Data overwritten" newline rbitfld.long 0x0 4. "DATAOVR0,Data Overrun 0" "0: Data not overwritten,1: Data overwritten" rbitfld.long 0x0 2. "NDATA2,New Data 2" "0: Not available,1: Available" newline rbitfld.long 0x0 1. "NDATA1,New Data 1" "0: Not available,1: Available" rbitfld.long 0x0 0. "NDATA0,New Data 0" "0: Not available,1: Available" repeat 45. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "TRGCFG_[$1],Trigger Configuration" bitfld.long 0x0 31. "LOOP,Loop" "0: Disable,1: Enable" bitfld.long 0x0 28.--30. "DATA_DEST,Data Destination" "0: ADC-specific data registers,1: FIFO1,2: FIFO2,3: FIFO3,?,?,?,?" newline bitfld.long 0x0 15. "TRIGEN,Trigger Enable" "0: Disable,1: Enable" eventfld.long 0x0 14. "TRG_FLAG,Trigger Flag" "0: No action,1: Changes to 0" newline bitfld.long 0x0 13. "TRS,Trigger Resolution" "0: Single conversion,1: CL conversions" bitfld.long 0x0 10. "ADC_SEL2,ADC Select 2" "0: Deselects,1: Selects" newline bitfld.long 0x0 9. "ADC_SEL1,ADC Select 1" "0: Deselects,1: Selects" bitfld.long 0x0 8. "ADC_SEL0,ADC Select 0" "0: Deselects,1: Selects" newline hexmask.long.byte 0x0 0.--6. 1. "CHANNEL_VALUE_OR_LADDR,Channel or CL Address" repeat.end group.long 0x228++0xB line.long 0x0 "WRPROT,Write Protection" hexmask.long.byte 0x0 0.--3. 1. "PROTEC_CODE,Protection Code" line.long 0x4 "SFTRGR1,Software Trigger 1" bitfld.long 0x4 31. "SFTRG31,Software Trigger 31" "0: No effect,1: Trigger conversion" bitfld.long 0x4 30. "SFTRG30,Software Trigger 30" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 29. "SFTRG29,Software Trigger 29" "0: No effect,1: Trigger conversion" bitfld.long 0x4 28. "SFTRG28,Software Trigger 28" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 27. "SFTRG27,Software Trigger 27" "0: No effect,1: Trigger conversion" bitfld.long 0x4 26. "SFTRG26,Software Trigger 26" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 25. "SFTRG25,Software Trigger 25" "0: No effect,1: Trigger conversion" bitfld.long 0x4 24. "SFTRG24,Software Trigger 24" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 23. "SFTRG23,Software Trigger 23" "0: No effect,1: Trigger conversion" bitfld.long 0x4 22. "SFTRG22,Software Trigger 22" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 21. "SFTRG21,Software Trigger 21" "0: No effect,1: Trigger conversion" bitfld.long 0x4 20. "SFTRG20,Software Trigger 20" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 19. "SFTRG19,Software Trigger 19" "0: No effect,1: Trigger conversion" bitfld.long 0x4 18. "SFTRG18,Software Trigger 18" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 17. "SFTRG17,Software Trigger 17" "0: No effect,1: Trigger conversion" bitfld.long 0x4 16. "SFTRG16,Software Trigger 16" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 15. "SFTRG15,Software Trigger 15" "0: No effect,1: Trigger conversion" bitfld.long 0x4 14. "SFTRG14,Software Trigger 14" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 13. "SFTRG13,Software Trigger 13" "0: No effect,1: Trigger conversion" bitfld.long 0x4 12. "SFTRG12,Software Trigger 12" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 11. "SFTRG11,Software Trigger 11" "0: No effect,1: Trigger conversion" bitfld.long 0x4 10. "SFTRG10,Software Trigger 10" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 9. "SFTRG9,Software Trigger 9" "0: No effect,1: Trigger conversion" bitfld.long 0x4 8. "SFTRG8,Software Trigger 8" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 7. "SFTRG7,Software Trigger 7" "0: No effect,1: Trigger conversion" bitfld.long 0x4 6. "SFTRG6,Software Trigger 6" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 5. "SFTRG5,Software Trigger 5" "0: No effect,1: Trigger conversion" bitfld.long 0x4 4. "SFTRG4,Software Trigger 4" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 3. "SFTRG3,Software Trigger 3" "0: No effect,1: Trigger conversion" bitfld.long 0x4 2. "SFTRG2,Software Trigger 2" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 1. "SFTRG1,Software Trigger 1" "0: No effect,1: Trigger conversion" bitfld.long 0x4 0. "SFTRG0,Software Trigger 0" "0: No effect,1: Trigger conversion" line.long 0x8 "SFTRGR2,Software Trigger 2" bitfld.long 0x8 12. "SFTRG44,Software Trigger 44" "0: No effect,1: Trigger conversion" bitfld.long 0x8 11. "SFTRG43,Software Trigger 43" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 10. "SFTRG42,Software Trigger 42" "0: No effect,1: Trigger conversion" bitfld.long 0x8 9. "SFTRG41,Software Trigger 41" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 8. "SFTRG40,Software Trigger 40" "0: No effect,1: Trigger conversion" bitfld.long 0x8 7. "SFTRG39,Software Trigger 39" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 6. "SFTRG38,Software Trigger 38" "0: No effect,1: Trigger conversion" bitfld.long 0x8 5. "SFTRG37,Software Trigger 37" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 4. "SFTRG36,Software Trigger 36" "0: No effect,1: Trigger conversion" bitfld.long 0x8 3. "SFTRG35,Software Trigger 35" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 2. "SFTRG34,Software Trigger 34" "0: No effect,1: Trigger conversion" bitfld.long 0x8 1. "SFTRG33,Software Trigger 33" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 0. "SFTRG32,Software Trigger 32" "0: No effect,1: Trigger conversion" repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x23C)++0x3 line.long 0x0 "ADCDR[$1],ADCn Result Data" hexmask.long.byte 0x0 25.--31. 1. "TRG_SRC,Trigger Source" hexmask.long.byte 0x0 18.--24. 1. "CH,Channel" newline bitfld.long 0x0 17. "LIST,List" "0: Single conversion,1: CL" bitfld.long 0x0 16. "LAST,Last" "0: Not the last conversion of a CL or not a CL..,1: Last conversion of a CL" newline hexmask.long.word 0x0 0.--14. 1. "ADC_DATA,ADC Data" repeat.end rgroup.long 0x24C++0x3 line.long 0x0 "LISTSTAR,CL Size Status" hexmask.long.byte 0x0 0.--7. 1. "LISTSZ,CL Size" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x250)++0x3 line.long 0x0 "LISTCHR_[$1],CL Channel Address" bitfld.long 0x0 31. "LAST_y,Last Channel" "0: Not last,1: Last channel in CL" bitfld.long 0x0 30. "NEXT_CH_WAIT_ON_TRIG_y,Next Channel Wait For Trigger" "0: CL executes continuously,1: CL stops executing" newline hexmask.long.byte 0x0 16.--22. 1. "ADC_CH_y,ADC Channel Selection" bitfld.long 0x0 15. "LAST_y_plus_1,Last Channel Plus 1" "0: Not next-to-last,1: Next-to-last channel in CL" newline bitfld.long 0x0 14. "NEXT_CH_WAIT_ON_TRIG_y_plus_1,Next Channel Wait For Trigger Plus 1" "0: CL executes continuously,1: CL stops executing" hexmask.long.byte 0x0 0.--6. 1. "ADC_CHL_y_plus_1,ADC Channel Selection Plus 1" repeat.end rgroup.long 0x450++0xB line.long 0x0 "FIFO1DR,FIFO Result Data" hexmask.long.byte 0x0 25.--31. 1. "TRG_SRC,Trigger Source" hexmask.long.byte 0x0 18.--24. 1. "CH,Channel" newline bitfld.long 0x0 16.--17. "ADC_NUM,ADC Number" "0: ADC 0,1: ADC 1,2: ADC 2,3: ADC 3" hexmask.long.word 0x0 0.--14. 1. "ADC_DATA,ADC Data" line.long 0x4 "FIFO2DR,FIFO Result Data" hexmask.long.byte 0x4 25.--31. 1. "TRG_SRC,Trigger Source" hexmask.long.byte 0x4 18.--24. 1. "CH,Channel" newline bitfld.long 0x4 16.--17. "ADC_NUM,ADC Number" "0: ADC 0,1: ADC 1,2: ADC 2,3: ADC 3" hexmask.long.word 0x4 0.--14. 1. "ADC_DATA,ADC Data" line.long 0x8 "FIFO3DR,FIFO Result Data" hexmask.long.byte 0x8 25.--31. 1. "TRG_SRC,Trigger Source" hexmask.long.byte 0x8 18.--24. 1. "CH,Channel" newline bitfld.long 0x8 16.--17. "ADC_NUM,ADC Number" "0: ADC 0,1: ADC 1,2: ADC 2,3: ADC 3" hexmask.long.word 0x8 0.--14. 1. "ADC_DATA,ADC Data" group.long 0x460++0xB line.long 0x0 "FIFOCR,FIFO Control" bitfld.long 0x0 26. "DMA_EN_FIFO3,FIFO3 DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMA_EN_FIFO2,FIFO2 DMA Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMA_EN_FIFO1,FIFO1 DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 18. "IEN_FIFO3,FIFO3 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "IEN_FIFO2,FIFO2 Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "IEN_FIFO1,FIFO1 Interrupt Enable" "0: Disable,1: Enable" line.long 0x4 "FIFOWM,FIFO Watermark Configuration" bitfld.long 0x4 16.--18. "WM_FIFO3,FIFO3 Watermark Level" "0,1,2,3,4,5,6,7" bitfld.long 0x4 8.--10. "WM_FIFO2,FIFO2 Watermark Level" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 0.--3. 1. "WM_FIFO1,FIFO1 Watermark Level" line.long 0x8 "FIFOERR,FIFO Error/Status" eventfld.long 0x8 29. "UNDR_ERR_FIFO3,Underrun Error Flag" "0: No underrun,1: Underrun" eventfld.long 0x8 28. "OVR_ERR_FIFO3,Overrun Error Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x8 27. "UNDR_ERR_FIFO2,Underrun Error Flag" "0: No underrun,1: Underrun" eventfld.long 0x8 26. "OVR_ERR_FIFO2,Overrun Error Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x8 25. "UNDR_ERR_FIFO1,Underrun Error Flag" "0: No underrun,1: Underrun" eventfld.long 0x8 24. "OVR_ERR_FIFO1,Overrun Error Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x8 18. "WM_INT_FIFO3,FIFO Watermark Interrupt Status" "0: Does not exceed watermark,1: Exceeds watermark" eventfld.long 0x8 17. "WM_INT_FIFO2,FIFO Watermark Interrupt Status" "0: Does not exceed watermark,1: Exceeds watermark" newline eventfld.long 0x8 16. "WM_INT_FIFO1,FIFO Watermark Interrupt Status" "0: Does not exceed watermark,1: Exceeds watermark" rgroup.long 0x46C++0x7 line.long 0x0 "FIFOSR,FIFO Status" bitfld.long 0x0 2. "FULL_FIFO3,FIFO Full" "0: Not full,1: Full" bitfld.long 0x0 1. "FULL_FIFO2,FIFO Full" "0: Not full,1: Full" newline bitfld.long 0x0 0. "FULL_FIFO1,FIFO Full" "0: Not full,1: Full" line.long 0x4 "FIFOCNTR,FIFO Counter" hexmask.long.byte 0x4 16.--19. 1. "CNTR_FIFO3,Indicates the number of active entries in FIFO3." hexmask.long.byte 0x4 8.--11. 1. "CNTR_FIFO2,FIFO2 Counter" newline hexmask.long.byte 0x4 0.--4. 1. "CNTR_FIFO1,FIFO1 Counter" tree.end tree "BCTU_1 (BCTU)" base ad:0x406C4000 group.long 0x0++0x3 line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 31. "Software_Reset,Software Reset" "0: Deasserts,1: Asserts" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Enable (normal operation),1: Disable (low-power operation)" newline bitfld.long 0x0 29. "FRZ,Debug Freeze" "0: Disables,1: Enables" bitfld.long 0x0 26. "GTRGEN,Global Trigger Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMA3,Enable ADC3DR DMA" "0: Disable,1: Enable" bitfld.long 0x0 18. "DMA2,Enable ADC2DR DMA" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "DMA1,Enable ADC1DR DMA" "0: Disable,1: Enable" bitfld.long 0x0 16. "DMA0,Enable ADC0DR DMA" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "TRGEN,Trigger Interrupt Request Enable" "0: Disable,1: Enable" bitfld.long 0x0 5. "LIST_IEN,CL Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "IEN3,Interrupt Enable For ADC3DR" "0: Disable,1: Enable" bitfld.long 0x0 2. "IEN2,Interrupt Enable For ADC2DR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "IEN1,Interrupt Enable For ADC1DR" "0: Disable,1: Enable" bitfld.long 0x0 0. "IEN0,Interrupt Enable For ADC0DR" "0: Disable,1: Enable" group.long 0x8++0x3 line.long 0x0 "MSR,Module Status" bitfld.long 0x0 31. "TRGF_CLR,TRGF Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 27. "LIST3_Last_CLR,CL 3 Last Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 26. "LIST2_Last_CLR,CL 2 Last Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 25. "LIST1_Last_CLR,CL 1 Last Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 24. "LIST0_Last_CLR,CL 0 Last Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 23. "DATAOVR3_CLR,DATAOVR3 Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 22. "DATAOVR2_CLR,DATAOVR2 Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 21. "DATAOVR1_CLR,DATAOVR1 Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 20. "DATAOVR0_CLR,DATAOVR0 Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 19. "NDATA3_CLR,New Data Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 18. "NDATA2_CLR,New Data Clear" "0: No action,1: Changes to 0" bitfld.long 0x0 17. "NDATA1_CLR,New Data Clear" "0: No action,1: Changes to 0" newline bitfld.long 0x0 16. "NDATA0_CLR,New Data Clear" "0: No action,1: Changes to 0" rbitfld.long 0x0 15. "TRGF,Trigger Flag" "0: No ADC triggered,1: An ADC was triggered" newline rbitfld.long 0x0 11. "LIST3_Last,CL 3 Last Conversion" "0: Last conversion not complete,1: Last conversion complete" rbitfld.long 0x0 10. "LIST2_Last,CL 2 Last Conversion" "0: Last conversion not complete,1: Last conversion complete" newline rbitfld.long 0x0 9. "LIST1_Last,CL 1 Last Conversion" "0: Last conversion not complete,1: Last conversion complete" rbitfld.long 0x0 8. "LIST0_Last,CL 0 Last Conversion" "0: Last conversion not complete,1: Last conversion complete" newline rbitfld.long 0x0 7. "DATAOVR3,Data Overrun 3" "0: Data not overwritten,1: Data overwritten" rbitfld.long 0x0 6. "DATAOVR2,Data Overrun 2" "0: Data not overwritten,1: Data overwritten" newline rbitfld.long 0x0 5. "DATAOVR1,Data Overrun 1" "0: Data not overwritten,1: Data overwritten" rbitfld.long 0x0 4. "DATAOVR0,Data Overrun 0" "0: Data not overwritten,1: Data overwritten" newline rbitfld.long 0x0 3. "NDATA3,New Data 3" "0: Not available,1: Available" rbitfld.long 0x0 2. "NDATA2,New Data 2" "0: Not available,1: Available" newline rbitfld.long 0x0 1. "NDATA1,New Data 1" "0: Not available,1: Available" rbitfld.long 0x0 0. "NDATA0,New Data 0" "0: Not available,1: Available" repeat 45. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "TRGCFG_[$1],Trigger Configuration" bitfld.long 0x0 31. "LOOP,Loop" "0: Disable,1: Enable" bitfld.long 0x0 28.--30. "DATA_DEST,Data Destination" "0: ADC-specific data registers,1: FIFO1,2: FIFO2,3: FIFO3,?,?,?,?" newline bitfld.long 0x0 15. "TRIGEN,Trigger Enable" "0: Disable,1: Enable" eventfld.long 0x0 14. "TRG_FLAG,Trigger Flag" "0: No action,1: Changes to 0" newline bitfld.long 0x0 13. "TRS,Trigger Resolution" "0: Single conversion,1: CL conversions" bitfld.long 0x0 11. "ADC_SEL3,ADC Select 3" "0: Deselects,1: Selects" newline bitfld.long 0x0 10. "ADC_SEL2,ADC Select 2" "0: Deselects,1: Selects" bitfld.long 0x0 9. "ADC_SEL1,ADC Select 1" "0: Deselects,1: Selects" newline bitfld.long 0x0 8. "ADC_SEL0,ADC Select 0" "0: Deselects,1: Selects" hexmask.long.byte 0x0 0.--6. 1. "CHANNEL_VALUE_OR_LADDR,Channel or CL Address" repeat.end group.long 0x228++0xB line.long 0x0 "WRPROT,Write Protection" hexmask.long.byte 0x0 0.--3. 1. "PROTEC_CODE,Protection Code" line.long 0x4 "SFTRGR1,Software Trigger 1" bitfld.long 0x4 31. "SFTRG31,Software Trigger 31" "0: No effect,1: Trigger conversion" bitfld.long 0x4 30. "SFTRG30,Software Trigger 30" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 29. "SFTRG29,Software Trigger 29" "0: No effect,1: Trigger conversion" bitfld.long 0x4 28. "SFTRG28,Software Trigger 28" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 27. "SFTRG27,Software Trigger 27" "0: No effect,1: Trigger conversion" bitfld.long 0x4 26. "SFTRG26,Software Trigger 26" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 25. "SFTRG25,Software Trigger 25" "0: No effect,1: Trigger conversion" bitfld.long 0x4 24. "SFTRG24,Software Trigger 24" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 23. "SFTRG23,Software Trigger 23" "0: No effect,1: Trigger conversion" bitfld.long 0x4 22. "SFTRG22,Software Trigger 22" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 21. "SFTRG21,Software Trigger 21" "0: No effect,1: Trigger conversion" bitfld.long 0x4 20. "SFTRG20,Software Trigger 20" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 19. "SFTRG19,Software Trigger 19" "0: No effect,1: Trigger conversion" bitfld.long 0x4 18. "SFTRG18,Software Trigger 18" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 17. "SFTRG17,Software Trigger 17" "0: No effect,1: Trigger conversion" bitfld.long 0x4 16. "SFTRG16,Software Trigger 16" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 15. "SFTRG15,Software Trigger 15" "0: No effect,1: Trigger conversion" bitfld.long 0x4 14. "SFTRG14,Software Trigger 14" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 13. "SFTRG13,Software Trigger 13" "0: No effect,1: Trigger conversion" bitfld.long 0x4 12. "SFTRG12,Software Trigger 12" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 11. "SFTRG11,Software Trigger 11" "0: No effect,1: Trigger conversion" bitfld.long 0x4 10. "SFTRG10,Software Trigger 10" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 9. "SFTRG9,Software Trigger 9" "0: No effect,1: Trigger conversion" bitfld.long 0x4 8. "SFTRG8,Software Trigger 8" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 7. "SFTRG7,Software Trigger 7" "0: No effect,1: Trigger conversion" bitfld.long 0x4 6. "SFTRG6,Software Trigger 6" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 5. "SFTRG5,Software Trigger 5" "0: No effect,1: Trigger conversion" bitfld.long 0x4 4. "SFTRG4,Software Trigger 4" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 3. "SFTRG3,Software Trigger 3" "0: No effect,1: Trigger conversion" bitfld.long 0x4 2. "SFTRG2,Software Trigger 2" "0: No effect,1: Trigger conversion" newline bitfld.long 0x4 1. "SFTRG1,Software Trigger 1" "0: No effect,1: Trigger conversion" bitfld.long 0x4 0. "SFTRG0,Software Trigger 0" "0: No effect,1: Trigger conversion" line.long 0x8 "SFTRGR2,Software Trigger 2" bitfld.long 0x8 12. "SFTRG44,Software Trigger 44" "0: No effect,1: Trigger conversion" bitfld.long 0x8 11. "SFTRG43,Software Trigger 43" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 10. "SFTRG42,Software Trigger 42" "0: No effect,1: Trigger conversion" bitfld.long 0x8 9. "SFTRG41,Software Trigger 41" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 8. "SFTRG40,Software Trigger 40" "0: No effect,1: Trigger conversion" bitfld.long 0x8 7. "SFTRG39,Software Trigger 39" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 6. "SFTRG38,Software Trigger 38" "0: No effect,1: Trigger conversion" bitfld.long 0x8 5. "SFTRG37,Software Trigger 37" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 4. "SFTRG36,Software Trigger 36" "0: No effect,1: Trigger conversion" bitfld.long 0x8 3. "SFTRG35,Software Trigger 35" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 2. "SFTRG34,Software Trigger 34" "0: No effect,1: Trigger conversion" bitfld.long 0x8 1. "SFTRG33,Software Trigger 33" "0: No effect,1: Trigger conversion" newline bitfld.long 0x8 0. "SFTRG32,Software Trigger 32" "0: No effect,1: Trigger conversion" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x23C)++0x3 line.long 0x0 "ADCDR[$1],ADCn Result Data" hexmask.long.byte 0x0 25.--31. 1. "TRG_SRC,Trigger Source" hexmask.long.byte 0x0 18.--24. 1. "CH,Channel" newline bitfld.long 0x0 17. "LIST,List" "0: Single conversion,1: CL" bitfld.long 0x0 16. "LAST,Last" "0: Not the last conversion of a CL or not a CL..,1: Last conversion of a CL" newline hexmask.long.word 0x0 0.--14. 1. "ADC_DATA,ADC Data" repeat.end rgroup.long 0x24C++0x3 line.long 0x0 "LISTSTAR,CL Size Status" hexmask.long.byte 0x0 0.--7. 1. "LISTSZ,CL Size" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x250)++0x3 line.long 0x0 "LISTCHR_[$1],CL Channel Address" bitfld.long 0x0 31. "LAST_y,Last Channel" "0: Not last,1: Last channel in CL" bitfld.long 0x0 30. "NEXT_CH_WAIT_ON_TRIG_y,Next Channel Wait For Trigger" "0: CL executes continuously,1: CL stops executing" newline hexmask.long.byte 0x0 16.--22. 1. "ADC_CH_y,ADC Channel Selection" bitfld.long 0x0 15. "LAST_y_plus_1,Last Channel Plus 1" "0: Not next-to-last,1: Next-to-last channel in CL" newline bitfld.long 0x0 14. "NEXT_CH_WAIT_ON_TRIG_y_plus_1,Next Channel Wait For Trigger Plus 1" "0: CL executes continuously,1: CL stops executing" hexmask.long.byte 0x0 0.--6. 1. "ADC_CHL_y_plus_1,ADC Channel Selection Plus 1" repeat.end rgroup.long 0x450++0xB line.long 0x0 "FIFO1DR,FIFO Result Data" hexmask.long.byte 0x0 25.--31. 1. "TRG_SRC,Trigger Source" hexmask.long.byte 0x0 18.--24. 1. "CH,Channel" newline bitfld.long 0x0 16.--17. "ADC_NUM,ADC Number" "0: ADC 0,1: ADC 1,2: ADC 2,3: ADC 3" hexmask.long.word 0x0 0.--14. 1. "ADC_DATA,ADC Data" line.long 0x4 "FIFO2DR,FIFO Result Data" hexmask.long.byte 0x4 25.--31. 1. "TRG_SRC,Trigger Source" hexmask.long.byte 0x4 18.--24. 1. "CH,Channel" newline bitfld.long 0x4 16.--17. "ADC_NUM,ADC Number" "0: ADC 0,1: ADC 1,2: ADC 2,3: ADC 3" hexmask.long.word 0x4 0.--14. 1. "ADC_DATA,ADC Data" line.long 0x8 "FIFO3DR,FIFO Result Data" hexmask.long.byte 0x8 25.--31. 1. "TRG_SRC,Trigger Source" hexmask.long.byte 0x8 18.--24. 1. "CH,Channel" newline bitfld.long 0x8 16.--17. "ADC_NUM,ADC Number" "0: ADC 0,1: ADC 1,2: ADC 2,3: ADC 3" hexmask.long.word 0x8 0.--14. 1. "ADC_DATA,ADC Data" group.long 0x460++0xB line.long 0x0 "FIFOCR,FIFO Control" bitfld.long 0x0 26. "DMA_EN_FIFO3,FIFO3 DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMA_EN_FIFO2,FIFO2 DMA Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMA_EN_FIFO1,FIFO1 DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 18. "IEN_FIFO3,FIFO3 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "IEN_FIFO2,FIFO2 Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "IEN_FIFO1,FIFO1 Interrupt Enable" "0: Disable,1: Enable" line.long 0x4 "FIFOWM,FIFO Watermark Configuration" bitfld.long 0x4 16.--18. "WM_FIFO3,FIFO3 Watermark Level" "0,1,2,3,4,5,6,7" bitfld.long 0x4 8.--10. "WM_FIFO2,FIFO2 Watermark Level" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 0.--3. 1. "WM_FIFO1,FIFO1 Watermark Level" line.long 0x8 "FIFOERR,FIFO Error/Status" eventfld.long 0x8 29. "UNDR_ERR_FIFO3,Underrun Error Flag" "0: No underrun,1: Underrun" eventfld.long 0x8 28. "OVR_ERR_FIFO3,Overrun Error Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x8 27. "UNDR_ERR_FIFO2,Underrun Error Flag" "0: No underrun,1: Underrun" eventfld.long 0x8 26. "OVR_ERR_FIFO2,Overrun Error Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x8 25. "UNDR_ERR_FIFO1,Underrun Error Flag" "0: No underrun,1: Underrun" eventfld.long 0x8 24. "OVR_ERR_FIFO1,Overrun Error Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x8 18. "WM_INT_FIFO3,FIFO Watermark Interrupt Status" "0: Does not exceed watermark,1: Exceeds watermark" eventfld.long 0x8 17. "WM_INT_FIFO2,FIFO Watermark Interrupt Status" "0: Does not exceed watermark,1: Exceeds watermark" newline eventfld.long 0x8 16. "WM_INT_FIFO1,FIFO Watermark Interrupt Status" "0: Does not exceed watermark,1: Exceeds watermark" rgroup.long 0x46C++0x7 line.long 0x0 "FIFOSR,FIFO Status" bitfld.long 0x0 2. "FULL_FIFO3,FIFO Full" "0: Not full,1: Full" bitfld.long 0x0 1. "FULL_FIFO2,FIFO Full" "0: Not full,1: Full" newline bitfld.long 0x0 0. "FULL_FIFO1,FIFO Full" "0: Not full,1: Full" line.long 0x4 "FIFOCNTR,FIFO Counter" hexmask.long.byte 0x4 16.--19. 1. "CNTR_FIFO3,Indicates the number of active entries in FIFO3." hexmask.long.byte 0x4 8.--11. 1. "CNTR_FIFO2,FIFO2 Counter" newline hexmask.long.byte 0x4 0.--4. 1. "CNTR_FIFO1,FIFO1 Counter" tree.end tree.end tree "CMU_FC (Clock Monitoring Unit - Frequency Check)" base ad:0x0 tree "CMU_0" base ad:0x402BC000 group.long 0x0++0x17 line.long 0x0 "GCR,Global Configuration Register" bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking" line.long 0x4 "RCCR,Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count" line.long 0x8 "HTCR,High Threshold Configuration Register" hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold" line.long 0xC "LTCR,Low Threshold Configuration Register" hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold" line.long 0x10 "SR,Status Register" rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running" eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred" newline eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred" line.long 0x14 "IER,Interrupt Enable Register" bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled" bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled" newline bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled" bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled" tree.end tree "CMU_3" base ad:0x402BC060 group.long 0x0++0x17 line.long 0x0 "GCR,Global Configuration Register" bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking" line.long 0x4 "RCCR,Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count" line.long 0x8 "HTCR,High Threshold Configuration Register" hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold" line.long 0xC "LTCR,Low Threshold Configuration Register" hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold" line.long 0x10 "SR,Status Register" rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running" eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred" newline eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred" line.long 0x14 "IER,Interrupt Enable Register" bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled" bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled" newline bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled" bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled" tree.end tree "CMU_4" base ad:0x402BC080 group.long 0x0++0x17 line.long 0x0 "GCR,Global Configuration Register" bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking" line.long 0x4 "RCCR,Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count" line.long 0x8 "HTCR,High Threshold Configuration Register" hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold" line.long 0xC "LTCR,Low Threshold Configuration Register" hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold" line.long 0x10 "SR,Status Register" rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running" eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred" newline eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred" line.long 0x14 "IER,Interrupt Enable Register" bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled" bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled" newline bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled" bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled" tree.end tree "CMU_5" base ad:0x402BC0A0 group.long 0x0++0x17 line.long 0x0 "GCR,Global Configuration Register" bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking" line.long 0x4 "RCCR,Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count" line.long 0x8 "HTCR,High Threshold Configuration Register" hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold" line.long 0xC "LTCR,Low Threshold Configuration Register" hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold" line.long 0x10 "SR,Status Register" rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running" eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred" newline eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred" line.long 0x14 "IER,Interrupt Enable Register" bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled" bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled" newline bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled" bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled" tree.end tree "CMU_6" base ad:0x402BC0C0 group.long 0x0++0x17 line.long 0x0 "GCR,Global Configuration Register" bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking" line.long 0x4 "RCCR,Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count" line.long 0x8 "HTCR,High Threshold Configuration Register" hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold" line.long 0xC "LTCR,Low Threshold Configuration Register" hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold" line.long 0x10 "SR,Status Register" rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running" eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred" newline eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred" line.long 0x14 "IER,Interrupt Enable Register" bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled" bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled" newline bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled" bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled" tree.end tree.end tree "CMU_FM (Clock Monitoring Unit - Frequency Meter)" base ad:0x0 tree "CMU_1" base ad:0x402BC020 group.long 0x0++0xF line.long 0x0 "GCR,Global Configuration Register" bitfld.long 0x0 0. "FME,Frequency Meter Enable" "0: Stops frequency metering,1: Starts frequency metering" line.long 0x4 "RCCR,Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference Clock Count" line.long 0x8 "SR,Status Register" hexmask.long.tbyte 0x8 8.--31. 1. "MET_CNT,Meter Clock Count" rbitfld.long 0x8 4. "RS,Run Status" "0: Frequency meter stopped,1: Frequency meter running" eventfld.long 0x8 1. "FMTO,Frequency Meter Time Out" "0,1" eventfld.long 0x8 0. "FMC,Frequency Meter Operation Complete" "0,1" line.long 0xC "IER,Interrupt Enable Register" bitfld.long 0xC 0. "FMCIE,Frequency Meter Complete Interrupt Enable" "0: Frequency Meter complete interrupt is disabled,1: Frequency Meter complete interrupt is enabled" tree.end tree "CMU_2" base ad:0x402BC040 group.long 0x0++0xF line.long 0x0 "GCR,Global Configuration Register" bitfld.long 0x0 0. "FME,Frequency Meter Enable" "0: Stops frequency metering,1: Starts frequency metering" line.long 0x4 "RCCR,Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference Clock Count" line.long 0x8 "SR,Status Register" hexmask.long.tbyte 0x8 8.--31. 1. "MET_CNT,Meter Clock Count" rbitfld.long 0x8 4. "RS,Run Status" "0: Frequency meter stopped,1: Frequency meter running" eventfld.long 0x8 1. "FMTO,Frequency Meter Time Out" "0,1" eventfld.long 0x8 0. "FMC,Frequency Meter Operation Complete" "0,1" line.long 0xC "IER,Interrupt Enable Register" bitfld.long 0xC 0. "FMCIE,Frequency Meter Complete Interrupt Enable" "0: Frequency Meter complete interrupt is disabled,1: Frequency Meter complete interrupt is enabled" tree.end tree.end tree "CONFIGURATION_GPR (Configuration General-Purpose Registers)" base ad:0x4039C000 rgroup.long 0x1C++0x3 line.long 0x0 "CONFIG_REG0,General Purpose Configuration 0" bitfld.long 0x0 6. "EDB,Hardware Debugger Attached" "0: Debugger not connected,1: Debugger connected" rgroup.long 0x34++0x3 line.long 0x0 "CONFIG_REG6,General Purpose Configuration 6" bitfld.long 0x0 31. "HARD_LOCK,Hard Lock" "0: Write access to this register is allowed,1: Write access to this register is not allowed" bitfld.long 0x0 4. "FLEXIO_CLOCK_GATE,FlexIO Clock Gating" "0: Clock is off (gated),1: Clock is on" newline bitfld.long 0x0 2. "EMAC_CLOCK_GATE,Ethernet Clock Gating" "0: Clock is off (gated),1: Clock is on" bitfld.long 0x0 0. "QUADSPI_SDID_PCTL,QuadSPI Clock Gating" "0: Clock is off (gated),1: Clock is on" tree.end tree "CRC (Cyclic Redundancy Check)" base ad:0x40380000 group.long 0x0++0xB line.long 0x0 "DATA,CRC Data" hexmask.long.byte 0x0 24.--31. 1. "HU,CRC High Upper Byte" hexmask.long.byte 0x0 16.--23. 1. "HL,CRC High Lower Byte" newline hexmask.long.byte 0x0 8.--15. 1. "LU,CRC Low Upper Byte" hexmask.long.byte 0x0 0.--7. 1. "LL,CRC Low Lower Byte" line.long 0x4 "GPOLY,CRC Polynomial" hexmask.long.word 0x4 16.--31. 1. "HIGH,High Polynomial Half-Word" hexmask.long.word 0x4 0.--15. 1. "LOW,Low Polynomial Half-Word" line.long 0x8 "CTRL,CRC Control" bitfld.long 0x8 30.--31. "TOT,Transpose Type for Writes" "0: No transposition,1: Bits in bytes are transposed; bytes are not..,2: Both bits in bytes and bytes are transposed,3: Only bytes are transposed; no bits in a byte are.." bitfld.long 0x8 28.--29. "TOTR,Transpose Type for Read" "0: No transposition,1: Bits in bytes are transposed; bytes are not..,2: Both bits in bytes and bytes are transposed,3: Only bytes are transposed; no bits in a byte are.." newline bitfld.long 0x8 26. "FXOR,Complement Read of CRC Data Register" "0: No XOR on reading,1: Inverts or complements the read value of the CRC.." bitfld.long 0x8 25. "WAS,Write as Seed" "0: Data values,1: Seed values" newline bitfld.long 0x8 24. "TCRC,TCRC" "0: 16-bit,1: 32-bit" tree.end tree "DCM (Device Configuration Module)" base ad:0x402AC000 rgroup.long 0x0++0x7 line.long 0x0 "DCMSTAT,DCM Status" bitfld.long 0x0 10. "DCMDBGPS,Debug Password Scanning Status" "0: Completed with errors,1: Completed successfully" bitfld.long 0x0 9. "DCMOTAS,DCM OTA Scanning Status (valid only when the value of the DCMDONE field is 1)" "0: Completed with errors,1: Completed successfully" newline bitfld.long 0x0 8. "DCMUTS,DCM Utest DCF Scanning Status (valid only if DCMDONE bit is set)" "0: DCM Utest DCF completed with errors.,1: DCM Utest DCF completed successfully." bitfld.long 0x0 4. "DCMLCST,LC Scanning Status" "0: Completed with errors,1: Completed successfully" newline bitfld.long 0x0 1. "DCMERR,DCM completion with error status (valid only if DCMDONE bit is set)" "0: DCM completed with success.,1: DCM completed with error." bitfld.long 0x0 0. "DCMDONE,DCM Scanning Status" "0: Running,1: Completed" line.long 0x4 "DCMLCC,LC and LC Control" bitfld.long 0x4 4.--6. "DCMRLC,Real LC" "0: FA,1: Pre-FA,2: OEM_PROD,?,?,?,?,7: IN_FIELD" bitfld.long 0x4 0.--2. "DCMCLC,Current LC" "0: FA,1: Pre-FA,2: OEM_PROD,?,?,?,?,7: IN_FIELD" group.long 0x8++0x3 line.long 0x0 "DCMLCS,LC Scan Status" eventfld.long 0x0 29. "DCMLCFE5,Pre-FA Flash Memory Error Check" "0: Successful,1: Failed" eventfld.long 0x0 28. "DCMLCE5,Pre-FA ECC Errors" "0: No errors,1: Marking error" newline eventfld.long 0x0 25.--27. "DCMLCC5,Pre-FA Marking Status" "0: Not scanned yet,1: Marked as active,2: Marked as inactive,3: Region is erased/virgin,?,5: Marked as inactive by an unknown pattern,6: Scanning timed out,?" eventfld.long 0x0 24. "DCMLCSS5,Pre-FA Scan Status" "0: Successful,1: Errors exist" newline eventfld.long 0x0 23. "DCMLCFE4,IN_FIELD Flash Memory Error Check" "0: Successful,1: Failed" eventfld.long 0x0 22. "DCMLCE4,IN_FIELD ECC Errors" "0: No errors,1: Errors exist" newline eventfld.long 0x0 19.--21. "DCMLCC4,IN_FIELD Marking Status" "0: Not scanned yet,1: Marked as active,2: Marked as inactive,3: Region is erased/virgin,?,5: Marked as inactive by an unknown pattern,6: Scanning timed out,?" eventfld.long 0x0 18. "DCMLCSS4,IN_FIELD Scan Status" "0: No errors,1: Errors exist" newline eventfld.long 0x0 17. "DCMLCFE3,OEM_PROD Flash Memory Error Check" "0: Successful,1: Failed" eventfld.long 0x0 16. "DCMLCE3,OEM_PROD ECC Errors" "0: No errors,1: Errors exist" newline eventfld.long 0x0 13.--15. "DCMLCC3,OEM_PROD Marking" "0: Not scanned yet,1: Marked as active,2: Marked as inactive,3: Region is erased/virgin,?,5: Marked as inactive by an unknown pattern,6: Scanning timed out,?" eventfld.long 0x0 12. "DCMLCSS3,OEM_PROD Scan Status" "0: No errors,1: Errors exist" group.long 0x1C++0x3 line.long 0x0 "DCMMISC,DCM Miscellaneous" eventfld.long 0x0 28. "DCMCERS,DCF Client Errors" "0: No errors on any of the DCF clients,1: Atleast one safety DCF client has an error" eventfld.long 0x0 11. "DCMDBGE,DCM ECC error on DBG sections" "0: No error on DBG section,1: DBG section error" newline eventfld.long 0x0 10. "DCMDBGT,DBG Section Error" "0: No error,1: Error exists" rgroup.long 0x20++0x3 line.long 0x0 "DCMDEB,Debug Status and Configuration" bitfld.long 0x0 16. "APPDBG_STAT_SOC,Application Debug Status" "0: Disabled,1: Enabled" bitfld.long 0x0 1. "DCM_APPDBG_STAT,DCM Authentication Engine Status" "0: Disabled,1: Enabled" rgroup.long 0x2C++0x3 line.long 0x0 "DCMEC,DCF Error Count" hexmask.long.word 0x0 0.--15. 1. "DCMECT,Error Count" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x30)++0x3 line.long 0x0 "DCMSRR$1,DCF Scan Report" eventfld.long 0x0 29. "DCMDCFT1,Scanning Timeout On Flash Memory" "0: Does not exist,1: Exists" eventfld.long 0x0 28. "DCMESD1,Chip Side Error" "0: No errors,1: Errors exist" newline eventfld.long 0x0 27. "DCMESF1,Flash Memory Error" "0: No errors,1: Errors exist" eventfld.long 0x0 24.--26. "DCMDCFF1,DCF Record Location" "?,?,2: Utest region,?,?,5: Others: Reserved,?,?" newline hexmask.long.tbyte 0x0 0.--20. 1. "DCMDCFE1,Flash Memory Address" repeat.end group.long 0x80++0x3 line.long 0x0 "DCMLCS_2,LC Scan Status 2" eventfld.long 0x0 5. "DCMLCFE6,Flash Memory Error Check" "0: Successful,1: Failed" eventfld.long 0x0 4. "DCMLCE6,FA ECC Errors" "0: No errors,1: Errors exist" newline eventfld.long 0x0 1.--3. "DCMLCC6,FA Marking" "0: Not scanned yet,1: Marked as active,2: Marked as inactive,3: Region is erased/virgin,?,5: Marked as inactive by an unknown pattern,6: Scanning timed out,?" eventfld.long 0x0 0. "DCMLCSS6,FA Scan Status" "0: No errors,1: Errors exist" tree.end tree "DCM_GPR (DCM General-Purpose Registers)" base ad:0x402AC000 group.long 0x200++0x3 line.long 0x0 "DCMROD1,Read-Only GPR On Destructive Reset 1" eventfld.long 0x0 0. "PCU_ISO_STATUS,PCU Input Isolation Status On Previous Standby Entry" "0: No,1: Yes" group.long 0x208++0x13 line.long 0x0 "DCMROD3,Read-Only GPR On Destructive Reset 3" eventfld.long 0x0 31. "CM7_1_ICDATA_ECC_ERR,Cortex-M7_1 I-cache Multi-Bit ECC Error" "0: No,1: Yes" newline eventfld.long 0x0 30. "CM7_0_ICDATA_ECC_ERR,Cortex-M7_0 I-cache Data ECC Error" "0: No,1: Yes" newline eventfld.long 0x0 29. "CM7_1_DCTAG_ECC_ERR,Cortex-M7_1 D-cache Tag ECC Error" "0: No,1: Yes" newline eventfld.long 0x0 28. "CM7_0_DCTAG_ECC_ERR,Cortex-M7_0 D-cache Tag ECC Error" "0: No,1: Yes" newline eventfld.long 0x0 27. "CM7_1_DCDATA_ECC_ERR,Cortex-M7_1 D-cache Data Memory ECC Error" "0: No,1: Yes" newline eventfld.long 0x0 26. "CM7_0_DCDATA_ECC_ERR,Cortex-M7_0 D-cache Data Memory ECC Error" "0: No,1: Yes" newline eventfld.long 0x0 25. "PRAM0_ECC_ERR,Multi-Bit ECC Error From PRAM0" "0: No,1: Yes" newline eventfld.long 0x0 24. "PRAM1_ECC_ERR,Multi-Bit ECC Error From PRAM1" "0: No,1: Yes" newline eventfld.long 0x0 22. "LC_ERR,Error In Life Cycle Scanning" "0: No error while lifecycle scanning.,1: Error while lifecycle scanning" newline eventfld.long 0x0 21. "PF3_DATA_ECC_ERR,Program Flash Memory 3 Data ECC Uncorrectable Error" "0: No,1: Yes" newline eventfld.long 0x0 20. "PF3_CODE_ECC_ERR,Flash Memory 3 Code ECC Uncorrectable Error" "0: No,1: Yes" newline eventfld.long 0x0 19. "PERIPH_AXBS_ALARM,Peripheral AXBS_Lite Safety Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 18. "EMAC_GSKT_ALARM,EMAC IAHB Gasket Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 17. "TCM_AXBS_ALARM,TCM AHB Splitter Safety Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 16. "DATA_EDC_ERR,Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x0 15. "ADDR_EDC_ERR,Address EDC Error Status" "0: No,1: Yes" newline eventfld.long 0x0 12. "QSPI_GSKT_ALARM,QuadSPI IAHB Gasket Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 11. "HSE_GSKT_ALARM,HSE IAHB Gasket Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 9. "DMA_AXBS_ALARM,eDMA AXBS_Lite Safety Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 8. "SYS_AXBS_ALARM,System AXBS Safety Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 7. "DMA_PERIPH_GSKT_ALARM,eDMA Peripheral Gasket Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 6. "DMA_SYS_GSKT_ALARM,eDMA System Gasket Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 5. "TCM_GSKT_ALARM,TCM IAHB Gasket Monitor Alarm Status" "0: No,1: Yes" newline eventfld.long 0x0 4. "CM7_RCCU2_ALARM,Cortex-M7 Core Redundant Lockstep Error Status" "0: No,1: Yes" newline eventfld.long 0x0 3. "CM7_RCCU1_ALARM,Cortex-M7 Core Lockstep Error Status" "0: No,1: Yes" newline eventfld.long 0x0 2. "HSE_LOCKUP,HSE_B Core Lockup Status" "0: No,1: Yes" newline eventfld.long 0x0 1. "CM7_1_LOCKUP,Cortex-M7_1 Core Lockup Status" "0: No,1: Yes" newline eventfld.long 0x0 0. "CM7_0_LOCKUP,Cortex-M7_0 Core Lockup Status" "0: No,1: Yes" line.long 0x4 "DCMROD4,Read-Only GPR On Destructive Reset 4" eventfld.long 0x4 31. "CM7_2_LOCKUP,CM7_2 Core Lockup Status" "0: CM7_2 core not in lockup state.,1: CM7_2 core in lockup state." newline eventfld.long 0x4 30. "TEST_ACTIVATION_1_ERR,Accidental Partial Test Activation 1 Error" "0: No,1: Yes" newline eventfld.long 0x4 29. "TEST_ACTIVATION_0_ERR,Accidental Partial Test Activation 0 Error" "0: No,1: Yes" newline eventfld.long 0x4 27. "VDD2P5_GNG_ERR,Go/No-go Indicator For VDD_HV_FLA" "0: Yes,1: No" newline eventfld.long 0x4 26. "VDD1P1_GNG_ERR,Go/No-go Indicator For VDD1PD1" "0: Yes,1: No" newline eventfld.long 0x4 25. "FLASH_ECC_ERR,ECC Error From Flash Controller" "0: No ECC error from flash controller.,1: ECC error from flash controller." newline eventfld.long 0x4 22. "FLASH_SCAN_ERR,Flash Memory Scan Error Status" "0: No,1: Yes" newline eventfld.long 0x4 21. "FLASH_RST_ERR,Flash Reset Error Status" "0: No,1: Yes" newline eventfld.long 0x4 20. "FLASH_REF_ERR,Flash Memory Reference Error Status" "0: No,1: Yes" newline eventfld.long 0x4 19. "FLASH_ADDR_ENC_ERR,Flash Memory Address Encode Error Status" "0: No,1: Yes" newline eventfld.long 0x4 18. "FLASH_EDC_ERR,Flash Memory EDC Error Status" "0: No,1: Yes" newline eventfld.long 0x4 17. "PF2_DATA_ECC_ERR,Program Flash Memory 2 Data ECC Error Status" "0: No,1: Yes" newline eventfld.long 0x4 16. "PF2_CODE_ECC_ERR,Program Flash Memory 2 Code ECC Error Status" "0: No,1: Yes" newline eventfld.long 0x4 15. "PF1_DATA_ECC_ERR,Program Flash Memory 1 Data ECC Error Status" "0: No,1: Yes" newline eventfld.long 0x4 14. "PF1_CODE_ECC_ERR,Program Flash Memory 1 Code ECC Error Status" "0: No,1: Yes" newline eventfld.long 0x4 13. "PF0_DATA_ECC_ERR,Program Flash Memory 0 Data ECC Error Status" "0: No,1: Yes" newline eventfld.long 0x4 12. "PF0_CODE_ECC_ERR,Program Flash Memory 0 Code ECC Error Status" "0: No,1: Yes" newline eventfld.long 0x4 11. "HSE_RAM_ECC_ERR,HSE_B RAM Uncorrectable ECC Status" "0: No,1: Yes" newline eventfld.long 0x4 10. "PRAM1_FCCU_ALARM,PRAM1 FCCU Alarm Status" "0: No,1: Yes" newline eventfld.long 0x4 9. "PRAM0_FCCU_ALARM,PRAM0 FCCU Alarm Status" "0: No,1: Yes" newline eventfld.long 0x4 8. "DMA_TCD_RAM_ECC_ERR,eDMA TCD RAM ECC Error" "0: No,1: Yes" newline eventfld.long 0x4 7. "CM7_1_DTCM1_ECC_ERR,Cortex-M7_1 DTCM 1 ECC Error" "0: No,1: Yes" newline eventfld.long 0x4 6. "CM7_1_DTCM0_ECC_ERR,Cortex-M7_1 DTCM 0 ECC Error" "0: No,1: Yes" newline eventfld.long 0x4 5. "CM7_1_ITCM_ECC_ERR,Cortex-M7_1 ITCM ECC Error" "0: No,1: Yes" newline eventfld.long 0x4 4. "CM7_0_DTCM1_ECC_ERR,Cortex-M7_0 DTCM 1 ECC Error" "0: No,1: Yes" newline eventfld.long 0x4 3. "CM7_0_DTCM0_ECC_ERR,Cortex-M7_0 DTCM 0 ECC Error" "0: No,1: Yes" newline eventfld.long 0x4 2. "CM7_0_ITCM_ECC_ERR,Cortex-M7_0 ITCM ECC Error" "0: No,1: Yes" newline eventfld.long 0x4 1. "CM7_1_ICTAG_ECC_ERR,Cortex-M7_1 I-cache Tag ECC Error" "0: No,1: Yes" newline eventfld.long 0x4 0. "CM7_0_ICTAG_ECC_ERR,Cortex-M7_0 I-cache Tag ECC Error" "0: No,1: Yes" line.long 0x8 "DCMROD5,Read-Only GPR On Destructive Reset 5" eventfld.long 0x8 31. "CM7_2_DTCM1_ECC_ERR,Cortex-M7_2 DTCM 1 ECC Error" "0: No,1: Yes" newline eventfld.long 0x8 30. "CM7_2_DTCM0_ECC_ERR,Cortex-M7_2 DTCM 0 ECC Error" "0: No,1: Yes" newline eventfld.long 0x8 29. "CM7_2_ITCM_ECC_ERR,Cortex-M7_2 ITCM ECC Error" "0: No,1: Yes" newline eventfld.long 0x8 28. "CM7_2_ICTAG_ECC_ERR,Cortex-M7_2 I-cache Tag ECC Error" "0: No,1: Yes" newline eventfld.long 0x8 27. "CM7_2_ICDATA_ECC_ERR,Cortex-M7_2 I-cache Data ECC Error" "0: No,1: Yes" newline eventfld.long 0x8 26. "CM7_2_DCTAG_ECC_ERR,Cortex-M7_2 D-cache Tag ECC Error" "0: No,1: Yes" newline eventfld.long 0x8 25. "CM7_2_DCDATA_ECC_ERR,Cortex-M7_2 D-cache Data ECC Error" "0: No,1: Yes" newline eventfld.long 0x8 24. "CM7_2_AHBM_RDATA_EDC_ERR,Cortex-M7_2 AHBM Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 23. "CM7_2_AHBP_RDATA_EDC_ERR,Cortex-M7_2 AHBP Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 22. "HSE_RDATA_EDC_ERR,HSE_B Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 21. "CM7_0_AHBM_RDATA_EDC_ERR,Cortex-M7_0 AHBM Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 20. "CM7_0_AHBP_RDATA_EDC_ERR,Cortex-M7_0 AHBP Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 19. "CM7_1_AHBM_RDATA_EDC_ERR,Cortex-M7_1 AHBM Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 18. "CM7_1_AHBP_RDATA_EDC_ERR,Cortex-M7_1 AHBP Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 17. "DMA_RDATA_EDC_ERR,eDMA Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 15. "EMAC_RDATA_EDC_ERR,EMAC Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 14. "TCM_RDATA_EDC_ERR,TCM Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0x8 13. "DEBUG_ACTIVATION_ERR,Debug Activation Error" "0: No,1: Yes" newline eventfld.long 0x8 12. "MCT_BUS_ERR,MCT Bus Error" "0: No transfer error indicated from MCT.,1: Transfer error indicated from MCT." newline eventfld.long 0x8 11. "STCU_BIST_USER_CF,STCU2 BIST User Critical Fault (CF)" "0: No,1: Yes" newline eventfld.long 0x8 10. "MBIST_ACTIVATION_ERR,MBIST Activation Error" "0: No,1: Yes" newline eventfld.long 0x8 9. "STCU_NCF,STCU2 NCF Result Error" "0: No,1: Yes" newline eventfld.long 0x8 8. "SW_NCF_3,Software NCF3 Status" "0: No,1: Yes" newline eventfld.long 0x8 7. "SW_NCF_2,Software NCF2 Status" "0: No,1: Yes" newline eventfld.long 0x8 6. "SW_NCF_1,Software NCF1 Status" "0: No,1: Yes" newline eventfld.long 0x8 5. "SW_NCF_0,Software NCF 0 Status" "0: No,1: Yes" newline eventfld.long 0x8 4. "INTM_3_ERR,INTM_3 Error" "0: No,1: Yes" newline eventfld.long 0x8 3. "INTM_2_ERR,INTM_2 Error" "0: No,1: Yes" newline eventfld.long 0x8 2. "INTM_1_ERR,INTM_1 Error" "0: No,1: Yes" newline eventfld.long 0x8 1. "INTM_0_ERR,INTM_0 Error" "0: No,1: Yes" line.long 0xC "DCMROD6,Read-Only GPR On Destructive Reset 6" eventfld.long 0xC 31. "DMA1_AXBS_ALARM,eDMA_1 AXBS Safety Alarm Status" "0: No,1: Yes" newline eventfld.long 0xC 29. "ZIPWIRE_GSKT_ALARM,ZIPWIRE Gasket Alarm" "0: No,1: Yes" newline eventfld.long 0xC 28. "DMA1_PERIPH_GSKT_ALARM,DMA1 Peripheral Gasket Alarm" "0: No,1: Yes" newline eventfld.long 0xC 27. "DMA1_SYS_GSKT_ALARM,DMA1 System Gasket Alarm" "0: No,1: Yes" newline eventfld.long 0xC 25. "eDMA1_RCCU2_ALARM,eDMA_1 RCCU_2 Alarm" "0: No,1: Yes" newline eventfld.long 0xC 24. "eDMA1_RCCU1_ALARM,eDMA_1 RCCU_1 Alarm Status" "0: No,1: Yes" newline eventfld.long 0xC 23. "CM7_2_RCCU2_ALARM,Cortex-M7_2 RCCU_2 Alarm Status" "0: No,1: Yes" newline eventfld.long 0xC 22. "CM7_2_RCCU1_ALARM,Cortex-M7_2 RCCU_1 Alarm Status" "0: No,1: Yes" newline eventfld.long 0xC 21. "OMU_2_ALARM,OMU_2 Alarm" "0: No,1: Yes" newline eventfld.long 0xC 20. "OMU_1_ALARM,OMU_1 Alarm" "0: No,1: Yes" newline eventfld.long 0xC 19. "OMU_0_ALARM,OMU_0 Alarm" "0: No,1: Yes" newline eventfld.long 0xC 17. "SAR_ADC6_CF_ERR,SAR_ADC_6 CF Error" "0: No,1: Yes" newline eventfld.long 0xC 16. "SAR_ADC5_CF_ERR,SAR_ADC_5 CF Error" "0: No,1: Yes" newline eventfld.long 0xC 15. "SAR_ADC4_CF_ERR,SAR_ADC_4 CF Error" "0: No,1: Yes" newline eventfld.long 0xC 14. "SAR_ADC3_CF_ERR,SAR_ADC_3 CF Error" "0: No,1: Yes" newline eventfld.long 0xC 13. "SAR_ADC2_CF_ERR,SAR_ADC_2 CF Error" "0: No,1: Yes" newline eventfld.long 0xC 12. "SAR_ADC1_CF_ERR,SAR_ADC_1 CF Error" "0: No,1: Yes" newline eventfld.long 0xC 11. "SAR_ADC0_CF_ERR,SAR_ADC_0 CF Error" "0: No,1: Yes" newline eventfld.long 0xC 10. "SAR_ADC6_NCF_ERR,SAR_ADC_6 NCF Error" "0: No,1: Yes" newline eventfld.long 0xC 9. "SAR_ADC5_NCF_ERR,SAR_ADC_5 NCF Error" "0: No,1: Yes" newline eventfld.long 0xC 8. "SAR_ADC4_NCF_ERR,SAR_ADC_4 NCF Error" "0: No,1: Yes" newline eventfld.long 0xC 7. "SAR_ADC3_NCF_ERR,SAR_ADC_3 NCF Error" "0: No,1: Yes" newline eventfld.long 0xC 6. "SAR_ADC2_NCF_ERR,SAR_ADC_2 NCF Error" "0: No,1: Yes" newline eventfld.long 0xC 5. "SAR_ADC1_NCF_ERR,SAR_ADC_1 NCF Error" "0: No,1: Yes" newline eventfld.long 0xC 4. "SAR_ADC0_NCF_ERR,SAR_ADC_0 NCF Error" "0: No,1: Yes" newline eventfld.long 0xC 3. "QSPI_FLASHA_ECC_ERR,Uncorrectable ECC error status from flashA interface of QuadSPI. Read this bit to identify the reason of fault in case of FCCU NCF 2." "0: Uncorrectable ECC error from flashA disabled/not..,1: Uncorrectable ECC error detected from flashA." newline eventfld.long 0xC 2. "DMA1_TCD_RAM_ECC_ERR,eDMA_1 TCD RAM ECC Error" "0: No,1: Yes" newline eventfld.long 0xC 1. "ZIPWIRE_RDATA_EDC_ERR,Zipwire Read Data EDC Error" "0: No,1: Yes" newline eventfld.long 0xC 0. "DMA1_RDATA_EDC_ERR,eDMA 1 Read Data EDC Error" "0: No,1: Yes" line.long 0x10 "DCMROD7,Read-Only GPR On Destructive Reset 7" eventfld.long 0x10 30. "CM7_2_AHBS_ALARM,CM7_2 AHBS interface IAHB Gasket monitor alarm status. Read this bit to identify the reason of fault in case of FCCU NCF 1." "0: No alarm reported from CM7_0 AHBS interface IAHB..,1: Monitor alarm reported from CM7_0 AHBS interface.." newline eventfld.long 0x10 29. "CM7_1_AHBS_ALARM,CM7_1 AHBS interface IAHB Gasket monitor alarm status. Read this bit to identify the reason of fault in case of FCCU NCF 1." "0: No alarm reported from CM7_0 AHBS interface IAHB..,1: Monitor alarm reported from CM7_0 AHBS interface.." newline eventfld.long 0x10 28. "CM7_0_AHBS_ALARM,CM7_0 AHBS interface IAHB Gasket monitor alarm status. Read this bit to identify the reason of fault in case of FCCU NCF 1." "0: No alarm reported from CM7_0 AHBS interface IAHB..,1: Monitor alarm reported from CM7_0 AHBS interface.." newline eventfld.long 0x10 27. "XMEM_ODD_ECC_CORE_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on odd xmem memory per thread during core access." "0: Multi-bit error on odd xmem memory per thread..,1: Multi-bit error on odd xmem memory per thread.." newline eventfld.long 0x10 26. "PMEM_ECC3_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on pmem memory per thread during DSP access." "0: Multi-bit error on pmem memory per thread during..,1: Multi-bit error on pmem memory per thread during.." newline eventfld.long 0x10 25. "PMEM_ECC2_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on pmem memory per thread during DSP access." "0: Multi-bit error on pmem memory per thread during..,1: Multi-bit error on pmem memory per thread during.." newline eventfld.long 0x10 24. "PMEM_ECC1_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on pmem memory per thread during DSP access." "0: Multi-bit error on pmem memory per thread during..,1: Multi-bit error on pmem memory per thread during.." newline eventfld.long 0x10 23. "PMEM_ECC0_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on pmem memory per thread during DSP access." "0: Multi-bit error on pmem memory per thread during..,1: Multi-bit error on pmem memory per thread during.." newline eventfld.long 0x10 22. "XMEM_EVEN_ECC3_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on even xmem memory per thread during DSP access." "0: Multi-bit error on even xmem memory per thread..,1: Multi-bit error on even xmem memory per thread.." newline eventfld.long 0x10 21. "XMEM_EVEN_ECC2_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on even xmem memory per thread during DSP access." "0: Multi-bit error on even xmem memory per thread..,1: Multi-bit error on even xmem memory per thread.." newline eventfld.long 0x10 20. "XMEM_EVEN_ECC1_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on even xmem memory per thread during DSP access." "0: Multi-bit error on even xmem memory per thread..,1: Multi-bit error on even xmem memory per thread.." newline eventfld.long 0x10 19. "XMEM_EVEN_ECC0_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on even xmem memory per thread during DSP access." "0: Multi-bit error on even xmem memory per thread..,1: Multi-bit error on even xmem memory per thread.." newline eventfld.long 0x10 18. "XMEM_ODD_ECC3_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on odd xmem memory per thread during DSP access." "0: Multi-bit error on odd xmem memory per thread..,1: Multi-bit error on odd xmem memory per thread.." newline eventfld.long 0x10 17. "XMEM_ODD_ECC2_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on odd xmem memory per thread during DSP access." "0: Multi-bit error on odd xmem memory per thread..,1: Multi-bit error on odd xmem memory per thread.." newline eventfld.long 0x10 16. "XMEM_ODD_ECC1_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on odd xmem memory per thread during DSP access." "0: Multi-bit error on odd xmem memory per thread..,1: Multi-bit error on odd xmem memory per thread.." newline eventfld.long 0x10 15. "XMEM_ODD_ECC0_DSP_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on odd xmem memory per thread during DSP access." "0: Multi-bit error on odd xmem memory per thread..,1: Multi-bit error on odd xmem memory per thread.." newline eventfld.long 0x10 14. "PMEM_ECC_CORE_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on pmem memory per thread during core access." "0: Multi-bit error on pmem memory per thread during..,1: Multi-bit error on pmem memory per thread during.." newline eventfld.long 0x10 13. "XMEM_EVEN_ECC_CORE_ERR,Status of the fault monitoring at FCCU NCF 8 for the fault: Multi-bit error on even xmem memory per thread during core access." "0: Multi-bit error on even xmem memory per thread..,1: Multi-bit error on even xmem memory per thread.." newline eventfld.long 0x10 12. "VDD2P5_GNG2_ERR,Go/Nogo indicator status for VDD_HV_FLA (triple bond) going to FXOSC and PLL. Read this bit to identify the reason of fault in case of FCCU NCF4." "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline eventfld.long 0x10 11. "VDD1P1_GNG2_ERR,Go/Nogo indicator status for VDD_HV_FLA (triple bond) going to FXOSC and PLL. Read this bit to identify the reason of fault in case of FCCU NCF4." "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline eventfld.long 0x10 10. "VDDA_SWG_GNG_ERR,Go/Nogo indicator status for VDDA_SWG supply going to SWG0/1. Read this bit to identify the reason of fault in case of FCCU NCF 4." "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline eventfld.long 0x10 9. "VDDA_SDADC1_GNG_ERR,Go/Nogo indicator status for VDDA_SDADC supply going to SDADC1. Read this bit to identify the reason of fault in case of FCCU NCF 4." "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline eventfld.long 0x10 8. "VDDA_SDADC0_GNG_ERR,Go/Nogo indicator status for VDDA_SDADC supply going to SDADC0. Read this bit to identify the reason of fault in case of FCCU NCF 4." "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline eventfld.long 0x10 7. "LVDS_3P3V_RX_FAULT,LVDS 3P3V RX Fault Status" "0: No,1: Yes" newline eventfld.long 0x10 6. "ZIPWIRE_AXBS_ALARM,Zipwire AXBS Alarm Status" "0: No,1: Yes" newline eventfld.long 0x10 5. "CM7_2_AHBP_ALARM,Cortex-M7_2 AHBP Alarm Status" "0: No,1: Yes" newline eventfld.long 0x10 4. "CM7_1_AHBP_ALARM,Cortex-M7_1 AHBP Alarm Status" "0: No,1: Yes" newline eventfld.long 0x10 3. "CM7_0_AHBP_ALARM,Cortex-M7_0 AHBP Alarm Status" "0: No,1: Yes" newline eventfld.long 0x10 2. "CM7_2_AHBM_ALARM,Cortex-M7_2 AHBM Alarm Status" "0: No,1: Yes" newline eventfld.long 0x10 1. "CM7_1_AHBM_ALARM,Cortex-M7_1 AHBM Alarm Status" "0: No,1: Yes" newline eventfld.long 0x10 0. "CM7_0_AHBM_ALARM,Cortex-M7_0 AHBM Alarm Status" "0: No,1: Yes" group.long 0x300++0x43 line.long 0x0 "DCMROF1,Read-Only GPR On Functional Reset 1" eventfld.long 0x0 1. "MAC_MDC_CHID_1,MAC eDMA Channel ID1 Status" "0: No,1: Yes" newline eventfld.long 0x0 0. "MAC_MDC_CHID_0,MAC eDMA Channel ID0 Status" "0: No,1: Yes" line.long 0x4 "DCMROF2,Read-Only GPR On Functional Reset 2" hexmask.long 0x4 0.--31. 1. "DCF_SDID0,DCF Client SDID 0 Configuration" line.long 0x8 "DCMROF3,Read-Only GPR On Functional Reset 3" hexmask.long 0x8 0.--31. 1. "DCF_SDID1,DCF Client SDID 1 Configuration" line.long 0xC "DCMROF4,Read-Only GPR On Functional Reset 4" hexmask.long 0xC 0.--31. 1. "DCF_SDID2,DCF Client SDID 2 Configuration" line.long 0x10 "DCMROF5,Read-Only GPR On Functional Reset 5" hexmask.long 0x10 0.--31. 1. "DCF_SDID3,DCF Client SDID 3 Configuration" line.long 0x14 "DCMROF6,Read-Only GPR On Functional Reset 6" hexmask.long 0x14 0.--31. 1. "DCF_SDID4,DCF Client SDID 4 Configuration" line.long 0x18 "DCMROF7,Read-Only GPR On Functional Reset 7" hexmask.long 0x18 0.--31. 1. "DCF_SDID5,DCF Client SDID 5 Configuration" line.long 0x1C "DCMROF8,Read-Only GPR On Functional Reset 8" hexmask.long 0x1C 0.--31. 1. "DCF_SDID6,DCF Client SDID 6 Configuration" line.long 0x20 "DCMROF9,Read-Only GPR On Functional Reset 9" hexmask.long 0x20 0.--31. 1. "DCF_SDID7,DCF Client SDID 7 Configuration" line.long 0x24 "DCMROF10,Read-Only GPR On Functional Reset 10" hexmask.long 0x24 0.--31. 1. "DCF_SDID8,DCF Client SDID 8 Configuration" line.long 0x28 "DCMROF11,Read-Only GPR On Functional Reset 11" hexmask.long 0x28 0.--31. 1. "DCF_SDID9,DCF Client SDID 9 Configuration" line.long 0x2C "DCMROF12,Read-Only GPR On Functional Reset 12" hexmask.long 0x2C 0.--31. 1. "DCF_SDID10,DCF Client SDID 10 Configuration" line.long 0x30 "DCMROF13,Read-Only GPR On Functional Reset 13" hexmask.long 0x30 0.--31. 1. "DCF_SDID11,DCF Client SDID 11 Configuration" line.long 0x34 "DCMROF14,Read-Only GPR On Functional Reset 14" hexmask.long 0x34 0.--31. 1. "DCF_SDID12,DCF Client SDID 12 Configuration" line.long 0x38 "DCMROF15,Read-Only GPR On Functional Reset 15" hexmask.long 0x38 0.--31. 1. "DCF_SDID13,DCF Client SDID 13 Configuration" line.long 0x3C "DCMROF16,Read-Only GPR On Functional Reset 16" hexmask.long 0x3C 0.--31. 1. "DCF_SDID14,DCF Client SDID 14 Configuration" line.long 0x40 "DCMROF17,Read-Only GPR On Functional Reset 17" hexmask.long 0x40 0.--31. 1. "DCF_SDID15,DCF Client SDID 15 Configuration" rgroup.long 0x348++0xB line.long 0x0 "DCMROF19,Read-Only GPR On Functional Reset 19" bitfld.long 0x0 31. "FCCU_EOUT_DEDICATED,FCCU EOUT Status" "0: General purpose supporting all functions,1: Dedicated EOUT pins" newline bitfld.long 0x0 30. "DCM_DONE,Flash Memory Scanning Status" "0: Incomplete,1: Complete" newline bitfld.long 0x0 29. "LOCKSTEP_EN,Lockstep Enable" "0: Decoupled operation of Cortex-M7_0 and Cortex-M7_1,1: Lockstep operation of Cortex-M7_0 and Cortex-M7_1" line.long 0x4 "DCMROF20,Read-Only GPR On Functional Reset 20" hexmask.long.word 0x4 18.--31. 1. "DCF_DEST_RST_ESC,DCF Destructive Reset Escalation" newline bitfld.long 0x4 5. "QSPI_IAHB_BYP,QuadSPI IAHB Bypass Status" "0: Register wall enabled,1: Register wall bypassed" newline bitfld.long 0x4 0. "POR_WDG_EN,POR Watchdog (POR_WDG) Status" "0: Disabled,1: Enabled" line.long 0x8 "DCMROF21,Read-Only GPR On Functional Reset 21" bitfld.long 0x8 19.--20. "HSE_CLK_MODE_OPTION,HSE_B Clock Mode Option" "0: Option A,1: Options C D E E2 and F,2: Option B,3: Option B" newline hexmask.long.tbyte 0x8 0.--17. 1. "DCF_DEST_RST_ESC,DCF Destructive Reset Escalation" group.long 0x400++0x3 line.long 0x0 "DCMRWP1,Read Write GPR On POR 1" bitfld.long 0x0 23. "SBAF_REC_DIS_DRST,Disable Recovery Mode On Destructive Reset" "0,1" newline bitfld.long 0x0 22. "SBAF_REC_DIS_FRST,Disable Recovery Mode On Functional Reset" "0,1" newline hexmask.long.byte 0x0 16.--20. 1. "SYS_REC_COUNTER,System Recovery Counter" newline hexmask.long.byte 0x0 11.--14. 1. "DEST_RESET_COUNT,Destructive Reset Counts" newline bitfld.long 0x0 9.--10. "POR_WDOG_TRIM,POR_WDG Trim" "0: POR_WDG timeout = 06.25 ms,1: POR_WDG timeout = 12.50 ms,2: POR_WDG timeout = 25.00 ms,3: POR_WDG timeout = 50.00 ms" newline bitfld.long 0x0 8. "STANBDY_PWDOG_DIS,Standby POR_WDG Disable" "0: Enables,1: Disables" newline bitfld.long 0x0 3. "CLKOUT_STANDBY,Clockout Standby Expose Over Functional And Destructive Reset" "0: No,1: Yes" group.long 0x408++0x3 line.long 0x0 "DCMRWP3,Read Write GPR On POR 3" bitfld.long 0x0 9. "DEST_RST9_AS_IPI,Destructive Reset 9" "0: Destructive reset,1: PLL LOL interrupt" group.long 0x504++0x1F line.long 0x0 "DCMRWD2,Read Write GPR On Destructive Reset 2" bitfld.long 0x0 7. "EOUT_STAT_DUR_STEST,Controls the EOUT state during self-test" "0: High impedance,1: Fault state" line.long 0x4 "DCMRWD3,Read Write GPR On Destructive Reset 3" bitfld.long 0x4 31. "CM7_1_ICDATA_ECC_ERR_EN,Cortex-M7_1 I-cache ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 30. "CM7_0_ICDATA_ECC_ERR_EN,Cortex-M7_0 I-cache ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 29. "CM7_1_DCTAG_ECC_ERR_EN,Cortex-M7_1 D-cache Tag ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 28. "CM7_0_DCTAG_ECC_ERR_EN,Cortex-M7_0 D-cache Tag ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 27. "CM7_1_DCDATA_ECC_ERR_EN,Cortex-M7_1 D-cache Data ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 26. "CM7_0_DCDATA_ECC_ERR_EN,Cortex-M7_0 D-cache Data ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 25. "PRAM0_ECC_ERR_EN,PRAM0 ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 24. "PRAM1_ECC_ERR_EN,PRAM1 ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 22. "LC_ERR_EN,Life Cycle Scanning Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 21. "PF3_DATA_ECC_ERR_EN,Program Flash Memory 3 Data ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 20. "PF3_CODE_ECC_ERR_EN,Program Flash Memory 3 Code ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 19. "PERIPH_AXBS_ALARM_EN,Peripheral AXBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 18. "EMAC_GSKT_ALARM_EN,EMAC Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 17. "TCM_AXBS_ALARM_EN,TCM AXBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 16. "DATA_EDC_ERR_EN,Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 15. "ADDR_EDC_ERR_EN,Address EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0x4 12. "QSPI_GSKT_ALARM_EN,QuadSPI Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 11. "HSE_GSKT_ALARM_EN,HSE_B Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 9. "DMA_AXBS_ALARM_EN,DMA AXBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 8. "SYS_AXBS_ALARM_EN,System AXBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 7. "DMA_PERIPH_GSKT_ALARM_EN,TCM Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 6. "DMA_SYS_GSKT_ALARM_EN,DMA System Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 5. "TCM_GSKT_ALARM_EN,TCM Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 4. "CM7_RCCU2_ALARM_EN,Cortex-M7 RCCU2 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 3. "CM7_RCCU1_ALARM_EN,Cortex-M7 RCCU1 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x4 1. "CM7_1_LOCKUP_EN,Cortex-M7_1 Lockup Enable" "0: No,1: Yes" newline bitfld.long 0x4 0. "CM7_0_LOCKUP_EN,Cortex-M7 Lockup Enable" "0: No,1: Yes" line.long 0x8 "DCMRWD4,Read Write GPR On Destructive Reset 4" bitfld.long 0x8 31. "CM7_2_LOCKUP_EN,Enable bit for enabling the fault monitoring at FCCU NCF 0 for the fault: CM7_2 core lockup." "0: CM7_2 core not in lockup state.,1: CM7_2 core in lockup state." newline bitfld.long 0x8 30. "TEST_ACTIVATION_1_ERR_EN,Test Activation 1 Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 29. "TEST_ACTIVATION_0_ERR_EN,Test Activation 0 Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 27. "VDD2P5_GNG_ERR_EN,VDD2P5 Go/No-go Error Enable" "0: Clean,1: Unclean" newline bitfld.long 0x8 26. "VDD1P1_GNG_ERR_EN,VDD1PD1 Go/No-go Error Enable" "0: Clean,1: Unclean" newline bitfld.long 0x8 24. "FLASH_ACCESS_ERR_EN,Flash Memory Access Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 22. "FLASH_SCAN_ERR_EN,Flash Memory Scanning Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 21. "FLASH_RST_ERR_EN,Flash Memory Reset Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 20. "FLASH_REF_ERR_EN,Flash Memory Reference Error Encode" "0: No,1: Yes" newline bitfld.long 0x8 19. "FLASH_ADDR_ENC_ERR_EN,Flash Memory Address Encode Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 18. "FLASH_EDC_ERR_EN,Flash Memory EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 17. "PF2_DATA_ECC_ERR_EN,PF2 Data ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 16. "PF2_CODE_ECC_ERR_EN,PF2 Code ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 15. "PF1_DATA_ECC_ERR_EN,PF1 Data ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 14. "PF1_CODE_ECC_ERR_EN,PF1 Code ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 13. "PF0_DATA_ECC_ERR_EN,PF0 Data ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 12. "PF0_CODE_ECC_ERR_EN,PF0 Code ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 10. "PRAM1_FCCU_ALARM_EN,PRAM1 FCCU Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 9. "PRAM0_FCCU_ALARM_EN,PRAM0 FCCU Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 8. "DMA_TCD_RAM_ECC_ERR_EN,eDMA TCD RAM ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 7. "CM7_1_DTCM1_ECC_ERR_EN,Cortex-M7_1 DTCM 1 ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 6. "CM7_1_DTCM0_ECC_ERR_EN,Cortex-M7_1 DTCM 0 ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 5. "CM7_1_ITCM_ECC_ERR_EN,Cortex-M7_1 ITCM ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 4. "CM7_0_DTCM1_ECC_ERR_EN,Cortex-M7_0 DTCM 1 ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 3. "CM7_0_DTCM0_ECC_ERR_EN,Cortex-M7_0 DTCM 0 ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 2. "CM7_0_ITCM_ECC_ERR_EN,Cortex-M7 ITCM ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 1. "CM7_1_ICTAG_ECC_ERR_EN,Cortex-M7_1 I-cache Tag ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 0. "CM7_0_ICTAG_ECC_ERR_EN,Cortex-M7_0 I-cache Tag ECC Error Enable" "0: No,1: Yes" line.long 0xC "DCMRWD5,Read Write GPR On Destructive Reset 5" bitfld.long 0xC 31. "CM7_2_DTCM1_ECC_ERR_EN,Cortex-M7_2 DTCM 1 ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 30. "CM7_2_DTCM0_ECC_ERR_EN,Cortex-M7_2 DTCM 0 ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 29. "CM7_2_ITCM_ECC_ERR_EN,Cortex-M7_2 ITCM ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 28. "CM7_2_ICTAG_ECC_ERR_EN,Cortex-M7_2 I-cache Tag ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 27. "CM7_2_ICDATA_ECC_ERR_EN,Cortex-M7_2 I-cache Data ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 26. "CM7_2_DCTAG_ECC_ERR_EN,Cortex-M7_2 D-cache Tag ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 25. "CM7_2_DCDATA_ECC_ERR_EN,Cortex-M7_2 D-cache Data ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 24. "CM7_2_AHBM_RDATA_EDC_ERR_EN,Cortex-M7_2 AHBM Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 23. "CM7_2_AHBP_RDATA_EDC_ERR_EN,Cortex-M7_2 AHBP Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 21. "CM7_0_AHBM_RDATA_EDC_ERR_EN,Cortex-M7_0 AHBM Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 20. "CM7_0_AHBP_RDATA_EDC_ERR_EN,Cortex-M7_0 AHBP Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 19. "CM7_1_AHBM_RDATA_EDC_ERR_EN,Cortex-M7_1 AHBM Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 18. "CM7_1_AHBP_RDATA_EDC_ERR_EN,Cortex-M7_1 AHBP Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 17. "DMA_RDATA_EDC_ERR_EN,eDMA Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 15. "EMAC_RDATA_EDC_ERR_EN,EMAC Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 14. "TCM_RDATA_EDC_ERR_EN,TCM Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 13. "DEBUG_ACTIVATION_ERR_EN,Debug Activation Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 12. "MCT_BUS_ERR_EN,MCT Bus Error Enable" "0: No transfer error indicated from MCT.,1: Transfer error indicated from MCT." newline bitfld.long 0xC 11. "STCU_BIST_USER_CF_EN,STCU2 BIST User CF Enable" "0: No,1: Yes" newline bitfld.long 0xC 10. "MBIST_ACTIVATION_ERR_EN,MBIST Activation Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 9. "STCU_NCF_EN,STCU2 NCF Enable" "0: Disables,1: Enables" newline bitfld.long 0xC 8. "SW_NCF_3_EN,Software NCF 3 Enable" "0: Disables,1: Enables" newline bitfld.long 0xC 7. "SW_NCF_2_EN,Software NCF 2 Enable" "0: Disables,1: Enables" newline bitfld.long 0xC 6. "SW_NCF_1_EN,Software NCF 1 Enable" "0: Disables,1: Enables" newline bitfld.long 0xC 5. "SW_NCF_0_EN,Software NCF 0 Enable" "0: Disables,1: Enables" newline bitfld.long 0xC 4. "INTM_3_ERR_EN,INTM 3 Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 3. "INTM_2_ERR_EN,INTM 2 Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 2. "INTM_1_ERR_EN,INTM 1 Error Enable" "0: No,1: Yes" newline bitfld.long 0xC 1. "INTM_0_ERR_EN,INTM 0 Error Enable" "0: No,1: Yes" line.long 0x10 "DCMRWD6,Read Write GPR On Destructive Reset 6" bitfld.long 0x10 29. "FLEXCAN5_DBG_DIS_CM7_0,FlexCAN_5 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 28. "FLEXCAN4_DBG_DIS_CM7_0,FlexCAN_4 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 27. "FLEXCAN3_DBG_DIS_CM7_0,FlexCAN_3 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 26. "FLEXCAN2_DBG_DIS_CM7_0,FlexCAN_2 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 25. "FLEXCAN1_DBG_DIS_CM7_0,FlexCAN_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 24. "FLEXCAN0_DBG_DIS_CM7_0,FlexCAN_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 23. "FLEXIO_DBG_DIS_CM7_0,FlexIO Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 22. "LPI2C1_DBG_DIS_CM7_0,LPI2C_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 21. "LPI2C0_DBG_DIS_CM7_0,LPI2C_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 20. "LPSPI5_DBG_DIS_CM7_0,LPSPI_5 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 19. "LPSPI4_DBG_DIS_CM7_0,LPSPI_4 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 18. "LPSPI3_DBG_DIS_CM7_0,LPSPI_3 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 17. "LPSPI2_DBG_DIS_CM7_0,LPSPI_2 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 16. "LPSPI1_DBG_DIS_CM7_0,LPSPI_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 15. "LPSPI0_DBG_DIS_CM7_0,LPSPI_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 14. "PIT2_DBG_DIS_CM7_0,PIT_2 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 13. "PIT1_DBG_DIS_CM7_0,PIT_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 12. "PIT0_DBG_DIS_CM7_0,PIT_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 11. "STM1_DBG_DIS_CM7_0,STM_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 10. "STM0_DBG_DIS_CM7_0,STM_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 9. "SWT1_DBG_DIS_CM7_0,SWT_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 8. "SWT0_DBG_DIS_CM7_0,SWT_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 7. "RTC_DBG_DIS_CM7_0,RTC Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 4. "EMIOS0_DBG_DIS_CM7_0,eMIOS_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 3. "LCU1_DBG_DIS_CM7_0,LCU_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 2. "LCU0_DBG_DIS_CM7_0,LCU_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 1. "FCCU_DBG_DIS_CM7_0,FCCU Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x10 0. "EDMA_DBG_DIS_CM7_0,eDMA Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" line.long 0x14 "DCMRWD7,Read Write GPR On Destructive Reset 7" bitfld.long 0x14 20. "SD_ADC3_DBG_DIS_CM7_0,SD_ADC3 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 19. "SD_ADC2_DBG_DIS_CM7_0,SD_ADC2 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 18. "SD_ADC1_DBG_DIS_CM7_0,SD_ADC1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 17. "SD_ADC0_DBG_DIS_CM7_0,SD_ADC0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 14. "EDMA1_DBG_DIS_CM7_0,eDMA_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 12. "IGF0_DBG_DIS_CM7_0,IGF_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 10. "SIPI_DBG_DIS_CM7_0,SIPI Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 9. "eFlexPWM1_DBG_DIS_CM7_0,eFlexPWM_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 8. "eFlexPWM0_DBG_DIS_CM7_0,eFlexPWM_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 7. "DSPI_DBG_DIS_CM7_0,DSPI Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 6. "DIGRF_DBG_DIS_CM7_0,LFAST Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 4. "SWT2_DBG_DIS_CM7_0,SWT_2 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x14 3. "STM2_DBG_DIS_CM7_0,STM_2 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted" line.long 0x18 "DCMRWD8,Read Write GPR On Destructive Reset 8" bitfld.long 0x18 29. "FLEXCAN5_DBG_DIS_CM7_1,FlexCAN_5 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 28. "FLEXCAN4_DBG_DIS_CM7_1,FlexCAN_4 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 27. "FLEXCAN3_DBG_DIS_CM7_1,FlexCAN_3 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 26. "FLEXCAN2_DBG_DIS_CM7_1,FlexCAN_2 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 25. "FLEXCAN1_DBG_DIS_CM7_1,FlexCAN_1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 24. "FLEXCAN0_DBG_DIS_CM7_1,FlexCAN_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 23. "FLEXIO_DBG_DIS_CM7_1,FlexIO Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 22. "LPI2C1_DBG_DIS_CM7_1,LPI2C_1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 21. "LPI2C0_DBG_DIS_CM7_1,LPI2C_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 20. "LPSPI5_DBG_DIS_CM7_1,LPSPI_5 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 19. "LPSPI4_DBG_DIS_CM7_1,LPSPI_4 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 18. "LPSPI3_DBG_DIS_CM7_1,LPSPI_3 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 17. "LPSPI2_DBG_DIS_CM7_1,LPSPI_2 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 16. "LPSPI1_DBG_DIS_CM7_1,LPSPI_1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 15. "LPSPI0_DBG_DIS_CM7_1,LPSPI_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 14. "PIT2_DBG_DIS_CM7_1,PIT_2 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 13. "PIT1_DBG_DIS_CM7_1,PIT_1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 12. "PIT0_DBG_DIS_CM7_1,PIT_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 11. "STM1_DBG_DIS_CM7_1,STM_1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 10. "STM0_DBG_DIS_CM7_1,STM_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 9. "SWT1_DBG_DIS_CM7_1,SWT_1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 8. "SWT0_DBG_DIS_CM7_1,SWT_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 7. "RTC_DBG_DIS_CM7_1,RTC Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 4. "EMIOS0_DBG_DIS_CM7_1,eMIOS_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 3. "LCU1_DBG_DIS_CM7_1,LCU_1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 2. "LCU0_DBG_DIS_CM7_1,LCU_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 1. "FCCU_DBG_DIS_CM7_1,FCCU Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x18 0. "EDMA_DBG_DIS_CM7_1,eDMA Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" line.long 0x1C "DCMRWD9,Read Write GPR On Destructive Reset 9" bitfld.long 0x1C 20. "SD_ADC3_DBG_DIS_CM7_1,SD_ADC3 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 19. "SD_ADC2_DBG_DIS_CM7_1,SD_ADC2 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 18. "SD_ADC1_DBG_DIS_CM7_1,SD_ADC1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 17. "SD_ADC0_DBG_DIS_CM7_1,SD_ADC0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 14. "EDMA1_DBG_DIS_CM7_1,eDMA Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 12. "IGF0_DBG_DIS_CM7_1,IGF_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 10. "SIPI_DBG_DIS_CM7_1,SIPI Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 9. "eFlexPWM1_DBG_DIS_CM7_1,eFlexPWM_1 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 8. "eFlexPWM0_DBG_DIS_CM7_1,eFlexPWM_0 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 7. "DSPI_DBG_DIS_CM7_1,DSPI Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 6. "DIGRF_DBG_DIS_CM7_1,LFAST Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 4. "SWT2_DBG_DIS_CM7_1,SWT_2 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" newline bitfld.long 0x1C 3. "STM2_DBG_DIS_CM7_1,STM_2 Debug Disable Cortex-M7_1" "0: Enters Debug mode,1: Remains functional and unimpacted" group.long 0x52C++0xF line.long 0x0 "DCMRWD12,Read Write GPR On Destructive Reset 12" bitfld.long 0x0 29. "FLEXCAN5_DBG_DIS_CM7_2,FlexCAN5 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 28. "FLEXCAN4_DBG_DIS_CM7_2,FlexCAN4 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 27. "FLEXCAN3_DBG_DIS_CM7_2,FlexCAN3 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 26. "FLEXCAN2_DBG_DIS_CM7_2,FlexCAN2 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 25. "FLEXCAN1_DBG_DIS_CM7_2,FlexCAN1 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 24. "FLEXCAN0_DBG_DIS_CM7_2,FlexCAN0 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 23. "FLEXIO_DBG_DIS_CM7_2,FlexIO Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 22. "LPI2C1_DBG_DIS_CM7_2,LPI2C1 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 21. "LPI2C0_DBG_DIS_CM7_2,LPI2C0 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 20. "LPSPI5_DBG_DIS_CM7_2,LPSPI5 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 19. "LPSPI4_DBG_DIS_CM7_2,LPSPI4 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 18. "LPSPI3_DBG_DIS_CM7_2,LPSPI3 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 17. "LPSPI2_DBG_DIS_CM7_2,LPSPI2 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 16. "LPSPI1_DBG_DIS_CM7_2,LPSPI1 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 15. "LPSPI0_DBG_DIS_CM7_2,LPSPI0 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 14. "PIT2_DBG_DIS_CM7_2,PIT2 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 13. "PIT1_DBG_DIS_CM7_2,PIT1 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 12. "PIT0_DBG_DIS_CM7_2,PIT0 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 11. "STM1_DBG_DIS_CM7_2,STM1 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 10. "STM0_DBG_DIS_CM7_2,STM0 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 9. "SWT1_DBG_DIS_CM7_2,SWT1 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 8. "SWT0_DBG_DIS_CM7_2,SWT0 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 7. "RTC_DBG_DIS_CM7_2,RTC Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 4. "eMIOS0_DBG_DIS_CM7_2,eMIOS0 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 3. "LCU1_DBG_DIS_CM7_2,LCU1 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 2. "LCU0_DBG_DIS_CM7_2,LCU0 Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 1. "FCCU_DBG_DIS_CM7_2,FCCU Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x0 0. "EDMA_DBG_DIS_CM7_2,eDMA Debug Disable For Cortex M7_2" "0: Enables Debug mode,1: Disables Debug mode" line.long 0x4 "DCMRWD13,Read Write GPR On Destructive Reset 13" bitfld.long 0x4 20. "SD_ADC3_DBG_DIS_CM7_2,SD_ADC3 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 19. "SD_ADC2_DBG_DIS_CM7_2,SD_ADC2 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 18. "SD_ADC1_DBG_DIS_CM7_2,SD_ADC1 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 17. "SD_ADC0_DBG_DIS_CM7_2,SD_ADC0 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 14. "EDMA1_DBG_DIS_CM7_2,eDMA_1 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 12. "IGF0_DBG_DIS_CM7_2,IGF0 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 10. "SIPI_DBG_DIS_CM7_2,SIPI Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 9. "eFlexPWM1_DBG_DIS_CM7_2,eFlexPWM1 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 8. "eFlexPWM0_DBG_DIS_CM7_2,eFlexPWM0 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 7. "DSPI_DBG_DIS_CM7_2,DSPI Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 6. "DIGRF_DBG_DIS_CM7_2,LFAST Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 4. "SWT2_DBG_DIS_CM7_2,SWT2 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" newline bitfld.long 0x4 3. "STM2_DBG_DIS_CM7_2,STM2 Debug Disable For Cortex-M7_2" "0: Enables Debug mode,1: Disables Debug mode" line.long 0x8 "DCMRWD14,Read Write GPR On Destructive Reset 14" bitfld.long 0x8 31. "DMA1_AXBS_ALARM_EN,eDMA_1 AXBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 29. "ZIPWIRE_GSKT_ALARM_EN,ZIPWIRE Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 28. "DMA1_PERIPH_GSKT_ALARM_EN,DMA1 Peripheral Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 27. "DMA1_SYS_GSKT_ALARM_EN,DMA1 System Gasket Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 25. "eDMA1_RCCU2_ALARM_EN,eDMA_1 RCCU_2 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 24. "eDMA1_RCCU1_ALARM_EN,eDMA_1 RCCU_1 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 23. "CM7_2_RCCU2_ALARM_EN,Cortex-M7_2 RCCU_2 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 22. "CM7_2_RCCU1_ALARM_EN,Cortex-M7_2 RCCU_1 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 21. "OMU_2_ALARM_EN,OMU_2 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 20. "OMU_1_ALARM_EN,OMU_1 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 19. "OMU_0_ALARM_EN,OMU_0 Alarm Enable" "0: No,1: Yes" newline bitfld.long 0x8 17. "SAR_ADC6_CF_ERR_EN,SAR_ADC_6 CF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 16. "SAR_ADC5_CF_ERR_EN,SAR_ADC_5 CF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 15. "SAR_ADC4_CF_ERR_EN,SAR_ADC_4 CF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 14. "SAR_ADC3_CF_ERR_EN,SAR_ADC_3 CF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 13. "SAR_ADC2_CF_ERR_EN,SAR_ADC_2 CF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 12. "SAR_ADC1_CF_ERR_EN,SAR_ADC_1 CF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 11. "SAR_ADC0_CF_ERR_EN,SAR_ADC_0 CF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 10. "SAR_ADC6_NCF_ERR_EN,SAR_ADC_6 NCF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 9. "SAR_ADC5_NCF_ERR_EN,SAR_ADC_5 NCF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 8. "SAR_ADC4_NCF_ERR_EN,SAR_ADC_4 NCF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 7. "SAR_ADC3_NCF_ERR_EN,SAR_ADC_3 NCF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 6. "SAR_ADC2_NCF_ERR_EN,SAR_ADC_2 NCF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 5. "SAR_ADC1_NCF_ERR_EN,SAR_ADC_1 NCF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 4. "SAR_ADC0_NCF_ERR_EN,SAR_ADC_0 NCF Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 3. "QSPI_FLASHA_ECC_ERR_EN,QSPI FLASHA ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 2. "DMA1_TCD_RAM_ECC_ERR_EN,eDMA_1 TCD RAM ECC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 1. "ZIPWIRE_RDATA_EDC_ERR_EN,Zipwire Read Data EDC Error Enable" "0: No,1: Yes" newline bitfld.long 0x8 0. "DMA1_RDATA_EDC_ERR_EN,eDMA_1 Read Data EDC Error Enable" "0: No,1: Yes" line.long 0xC "DCMRWD15,Read Write GPR On Destructive Reset 15" bitfld.long 0xC 30. "CM7_2_AHBS_ALARM_EN,Cortex-M7_2 AHBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 29. "CM7_1_AHBS_ALARM_EN,Cortex-M7_1 AHBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 28. "CM7_0_AHBS_ALARM_EN,Cortex-M7_0 AHBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 27. "XMEM_ODD_ECC_CORE_ERR_EN,XMEM Odd ECC Core Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 26. "PMEM_ECC3_DSP_ERR_EN,PMEM ECC3 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 25. "PMEM_ECC2_DSP_ERR_EN,PMEM ECC2 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 24. "PMEM_ECC1_DSP_ERR_EN,PMEM ECC1 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 23. "PMEM_ECC0_DSP_ERR_EN,PMEM ECC0 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 22. "XMEM_EVEN_ECC3_DSP_ERR_EN,XMEM Even ECC3 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 21. "XMEM_EVEN_ECC2_DSP_ERR_EN,XMEM Even ECC2 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 20. "XMEM_EVEN_ECC1_DSP_ERR_EN,XMEM Even ECC1 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 19. "XMEM_EVEN_ECC0_DSP_ERR_EN,XMEM Even ECC0 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 18. "XMEM_ODD_ECC3_DSP_ERR_EN,XMEM Odd ECC3 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "XMEM_ODD_ECC2_DSP_ERR_EN,XMEM Odd ECC2 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 16. "XMEM_ODD_ECC1_DSP_ERR_EN,XMEM Odd ECC1 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 15. "XMEM_ODD_ECC0_DSP_ERR_EN,XMEM Odd ECC0 DSP Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "PMEM_ECC_CORE_ERR_EN,PMEM ECC Core Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 13. "XMEM_EVEN_ECC_CORE_ERR_EN,XMEM Even ECC Core Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 12. "VDD2P5_GNG2_ERR_EN,VDD2P5 Go Nogo Error Enable" "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline bitfld.long 0xC 11. "VDD1P1_GNG2_ERR_EN,VDD1P1 Go Nogo Error Enable" "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline bitfld.long 0xC 10. "VDDA_SWG_GNG_ERR_EN,VDDA SWG Go Nogo Error Enable" "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline bitfld.long 0xC 9. "VDDA_SDADC1_GNG_ERR_EN,VDDA SDADC Go Nogo Error Enable" "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline bitfld.long 0xC 8. "VDDA_SDADC0_GNG_ERR_EN,VDDA SDADC Go Nogo Error Enable" "0: Go indication referring to the supply being clean.,1: No go indication referring to the supply being.." newline bitfld.long 0xC 7. "LVDS_3P3V_RX_FAULT_EN,LVDS 3P3V RX Fault Enable" "0: No,1: Yes" newline bitfld.long 0xC 6. "ZIPWIRE_AXBS_ALARM_EN,Zipwire AXBS Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 5. "CM7_2_AHBP_ALARM_EN,Cortex-M7_2 AHBP Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 4. "CM7_1_AHBP_ALARM_EN,Cortex-M7_1 AHBP Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 3. "CM7_0_AHBP_ALARM_EN,Cortex-M7_0 AHBP Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 2. "CM7_2_AHBM_ALARM_EN,Cortex-M7_2 AHBM Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 1. "CM7_1_AHBM_ALARM_EN,Cortex-M7_1 AHBM Alarm Enable" "0: No,1: Yes" newline bitfld.long 0xC 0. "CM7_0_AHBM_ALARM_EN,Cortex-M7_0 AHBM Alarm Enable" "0: No,1: Yes" group.long 0x600++0x13 line.long 0x0 "DCMRWF1,Read Write GPR On Functional Reset 1" bitfld.long 0x0 27. "VDD_1_5_VLT_DVDR_EN,VDD1P5 Voltage Divider Enable" "0: Disables,1: Enables" newline bitfld.long 0x0 26. "VDD_HV_B_VLT_DVDR_EN,VDD_HV_B Voltage Divider Enable" "0: Disables,1: Enables" newline bitfld.long 0x0 25. "VDD_HV_A_VLT_DVDR_EN,VDD_HV_A Voltage Divider Enable" "0: Disables,1: Enables" newline bitfld.long 0x0 24. "VSS_LV_ANMUX_EN,VSS_LV Monitoring Enable" "0: Disables,1: Enables" newline bitfld.long 0x0 21.--23. "SUPPLY_MON_SEL,Supply Monitoring Select" "0: VDD_HV_A_DIV,1: VDD_HV_B_DIV,2: VDD_1.5_DIV,3: VDD_2.5_OSC,4: VDD1.1_PD1_HOT_POINT,5: VDD1.1_PD1_COLD_POINT,6: VDD1.1_PLL,7: VDD1.1_PD0" newline bitfld.long 0x0 20. "SUPPLY_MON_EN,Supply Monitoring Enable" "0: Disables,1: Enables" newline bitfld.long 0x0 18. "PMIC_PGOOD_HNDSHK_BYP,Enables or bypass the PMIC_PGOOD handshake with the external power management device (PMIC) while standby exit." "0: Enables the PMIC_PGOOD handshake with the..,1: Bypasses the PMIC_PGOOD handshake with the.." newline bitfld.long 0x0 16. "STANDBY_IO_CONFIG,Standby I/O Configuration" "0: Must be written as 0 before IO configurations..,1: Must be written as 1 after IO configurations are.." newline bitfld.long 0x0 15. "VDD_HV_B_IO_CTRL_LATCH,VDD_HV_B I/O Control Latch" "0: VDD_HV_B domain pins function as normal.,1: The IO controls of VDD_HV_B domain pins are.." newline bitfld.long 0x0 10. "LFAST_RX_MM_EN,Enables the LFAST_RX LVDS pad mismatch for reduced VOD variations on V33 supply line." "0: The LFAST_RX LVDS pad mismatch for reduced VOD..,1: The LFAST_RX LVDS pad mismatch for reduced VOD.." newline bitfld.long 0x0 9. "LFAST_PLL_VCO_CLK_EN,LFAST PLL VCO Clock Enable" "0: Disables,1: Enables" newline bitfld.long 0x0 8. "LFAST_PLL_BANKA_CLK_EN,LFAST PLL Bank_A Clock Enable" "0: Disables,1: Enables" newline bitfld.long 0x0 7. "EMAC_CONF_SEL,Selects between MII and RMII mode of ethernet." "0: MII mode,1: RMII mode" newline bitfld.long 0x0 5. "FCCU_SW_NCF3,FCCU Software NCF 3" "0: Not generated,1: Generated" newline bitfld.long 0x0 4. "FCCU_SW_NCF2,FCCU Software NCF 2" "0: Not generated,1: Generated" newline bitfld.long 0x0 3. "FCCU_SW_NCF1,FCCU Software NCF 1" "0: Not generated,1: Generated" newline bitfld.long 0x0 2. "FCCU_SW_NCF0,FCCU Software NCF 0" "0: Not generated,1: Generated" newline bitfld.long 0x0 1. "CAN_TIMESTAMP_EN,FlexCAN Timestamp Enable" "0: Disables,1: Enables" newline bitfld.long 0x0 0. "CAN_TIMESTAMP_SEL,FlexCAN Timestamp Select" "0: EMAC,1: STM0" line.long 0x4 "DCMRWF2,Read Write GPR On Functional Reset 2" bitfld.long 0x4 31. "WKPU8_SRC_SELECT,WKPU[8] Source Select" "0: GPIO[34],1: GPIO[231]" newline bitfld.long 0x4 30. "WKPU45_SRC_SELECT,WKPU[45] Source Select" "0: GPIO[89],1: GPIO[217]" newline bitfld.long 0x4 29. "WKPU27_SRC_SELECT,WKPU[27] Source Select" "0: GPIO[130],1: GPIO[233]" newline bitfld.long 0x4 28. "WKPU18_SRC_SELECT,WKPU[18] Source Select" "0: GPIO[75],1: GPIO[235]" newline bitfld.long 0x4 21. "PGOOD_POLARITY,PGOOD Polarity" "0: Active-high signal,1: Active-low signal" newline bitfld.long 0x4 16. "HSE_GSKT_BYPASS,HSE_B Gasket Bypass" "0: Not bypassed,1: Bypassed" newline bitfld.long 0x4 13.--15. "SUPPLY2_MON_SEL,Supply 2 Monitoring Select" "0: VDD2P5_PLL2,1: VDD1P1_PLL2,2: VDD_LVDS,?,?,?,?,?" newline bitfld.long 0x4 12. "SUPPLY2_MON_EN,Supply 2 Monitoring Enable" "0: Disables,1: Enables" newline bitfld.long 0x4 8. "PMOS_CTRL_GPIO_DATA,PMOS Control GPIO Data" "0: Data is 0,1: Data is 1" newline bitfld.long 0x4 6. "SIRC_TRIM_BYP_STDBY_EXT,SIRC Trim Bypass Standby Exit" "0: Not bypassed,?" newline bitfld.long 0x4 5. "PMC_TRIM_RGM_DCF_BYP_STDBY_EXT,PMC Trim MC_RGM DCF Bypass Standby Exit" "0: Not bypassed,1: Bypassed" newline bitfld.long 0x4 4. "FIRC_TRIM_BYP_STDBY_EXT,FIRC Trim Bypass Standby Exit" "0: Not bypassed,1: Bypassed" newline bitfld.long 0x4 3. "DCM_SCAN_BYP_STDBY_EXT,DCM Scan Bypass Standby Exit" "0: Not bypassed,1: Bypassed" line.long 0x8 "DCMRWF3,Read Write GPR On Functional Reset 3" bitfld.long 0x8 27. "LFAST_RX_TERM_EN,LFAST TX Term Enable" "0: The LFAST_RX LVDS pad termination disabled,1: The LFAST_RX LVDS pad termination enabled" newline bitfld.long 0x8 12. "WKPU54_SRC_SELECT,WKPU[54] Source Select" "0: GPIO[116],1: GPIO[184]" newline bitfld.long 0x8 11. "WKPU57_SRC_SELECT,WKPU[57] Source Select" "0: GPIO[151],1: GPIO[186]" newline bitfld.long 0x8 10. "WKPU55_SRC_SELECT,WKPU[55] Source Select" "0: GPIO[146],1: GPIO[201]" newline bitfld.long 0x8 9. "WKPU52_SRC_SELECT,WKPU[52] Source Select" "0: GPIO[125],1: GPIO[206]" newline bitfld.long 0x8 8. "WKPU51_SRC_SELECT,WKPU[51] Source Select" "0: GPIO[123],1: GPIO[163]" newline bitfld.long 0x8 7. "WKPU5_SRC_SELECT,WKPU[5] Source Select" "0: GPIO[1],1: GPIO[65]" newline bitfld.long 0x8 6. "WKPU31_SRC_SELECT,WKPU[31] Source Select" "0: GPIO[16],1: GPIO[179]" newline bitfld.long 0x8 5. "WKPU3_SRC_SELECT,WKPU[3] Source Select" "0: GPIO[70],1: GPIO[80]" newline bitfld.long 0x8 4. "WKPU29_SRC_SELECT,WKPU[29] Source Select" "0: GPIO[134],1: GPIO[173]" newline bitfld.long 0x8 3. "WKPU25_SRC_SELECT,WKPU[25] Source Select" "0: GPIO[40],1: GPIO[138]" newline bitfld.long 0x8 2. "WKPU20_SRC_SELECT,WKPU[20] Source Select" "0: GPIO[15],1: GPIO[161]" newline bitfld.long 0x8 1. "WKPU2_SRC_SELECT,WKPU[2] Source Select" "0: GPIO[71],1: GPIO[61]" newline bitfld.long 0x8 0. "WKPU17_SRC_SELECT,WKPU[17] Source Select" "0: GPIO[41],1: GPIO[181]" line.long 0xC "DCMRWF4,Read Write GPR On Functional Reset 4" bitfld.long 0xC 19. "CM7_2_CPUWAIT,Cortex-M7_2 CPU Wait" "0: Disables CPUWAIT,1: Enables CPUWAIT" newline bitfld.long 0xC 18. "CM7_1_CPUWAIT,Cortex-M7_1 CPU Wait" "0: Disables CPUWAIT,1: Enables CPUWAIT" newline bitfld.long 0xC 17. "CM7_0_CPUWAIT,Cortex-M7_0 CPU Wait" "0: Disables CPUWAIT,1: Enables CPUWAIT" newline bitfld.long 0xC 16. "GLITCH_FIL_TRG_IN3_BYP,Glitch Filter TRGMUX Input 3 Bypass" "0: Enables,1: Bypasses" newline bitfld.long 0xC 15. "GLITCH_FIL_TRG_IN2_BYP,Glitch Filter TRGMUX Input 2 Bypass" "0: Enables,1: Bypasses" newline bitfld.long 0xC 14. "GLITCH_FIL_TRG_IN1_BYP,Glitch Filter TRGMUX Input 1 Bypass" "0: Enables,1: Bypasses" newline bitfld.long 0xC 13. "GLITCH_FIL_TRG_IN0_BYP,Glitch Filter TRGMUX Input 0 Bypass" "0: Enables,1: Bypasses" newline bitfld.long 0xC 4. "MUX_MODE_EN_ADC1_S15,Mux Mode Enable ADC_1 Standard Channel 15" "0: GPIO_4,1: GPIO_3" line.long 0x10 "DCMRWF5,Read Write GPR On Functional Reset 5" hexmask.long 0x10 1.--31. 1. "BOOT_ADDRESS,Boot Address" newline bitfld.long 0x10 0. "BOOT_MODE,Boot Mode" "0: Normal,1: Fast Standby" group.long 0x700++0xF line.long 0x0 "DCMROPP1,Read-Only GPR On PMCPOR Reset 1" eventfld.long 0x0 31. "POR_WDG_STAT31,POR_WDG Status 31" "0: Not detected,1: Detected" newline eventfld.long 0x0 30. "POR_WDG_STAT30,POR_WDG Status 30" "0: Not acknowledged,1: Acknowledged" newline eventfld.long 0x0 29. "POR_WDG_STAT29,POR_WDG Status 29" "0: Active,1: Inactive" newline eventfld.long 0x0 20. "POR_WDG_STAT20,POR_WDG Status 20" "0: Inactive,1: Active" newline eventfld.long 0x0 17. "POR_WDG_STAT17,POR_WDG Status 17" "0: Inactive,1: Active" newline eventfld.long 0x0 14. "POR_WDG_STAT14,POR_WDG Status 14" "0: Inactive,1: Active" newline eventfld.long 0x0 11. "POR_WDG_STAT11,POR_WDG Status 11" "0: Inactive,1: Active" newline eventfld.long 0x0 10. "POR_WDG_STAT10,POR_WDG Status 10" "0: Inactive,1: Active" newline eventfld.long 0x0 6. "POR_WDG_STAT6,POR_WDG Status 6" "0: Inactive,1: Active" newline eventfld.long 0x0 5. "POR_WDG_STAT5,POR_WDG Status 5" "0: Inactive,1: Active" newline eventfld.long 0x0 4. "POR_WDG_STAT4,POR_WDG Status 4" "0: Inactive,1: Active" newline eventfld.long 0x0 3. "POR_WDG_STAT3,POR_WDG Status 3" "0: Inactive,1: Active" newline eventfld.long 0x0 2. "POR_WDG_STAT2,POR_WDG Status 2" "0: Inactive,1: Active" newline eventfld.long 0x0 1. "POR_WDG_STAT1,POR_WDG Status 1" "0: Inactive,1: Active" newline eventfld.long 0x0 0. "POR_WDG_STAT0,POR_WDG Status 0" "0: Inactive,1: Active" line.long 0x4 "DCMROPP2,Read-Only GPR On PMCPOR Reset 2" eventfld.long 0x4 30. "POR_WDG_STAT62,POR_WDG Status 62" "0: 0,1: 1" newline eventfld.long 0x4 29. "POR_WDG_STAT61,POR_WDG Status 61" "0: 0,1: 1" newline eventfld.long 0x4 20. "POR_WDG_STAT52,POR_WDG Status 52" "0: 0,1: 1" newline eventfld.long 0x4 16. "POR_WDG_STAT48,POR_WDG Status 48" "0: 0,1: 1" newline eventfld.long 0x4 12. "POR_WDG_STAT44,POR_WDG Status 44" "0: 0,1: 1" newline eventfld.long 0x4 9. "POR_WDG_STAT41,POR_WDG Status 41" "0: 0,1: 1" newline eventfld.long 0x4 8. "POR_WDG_STAT40,POR_WDG Status 40" "0: 0,1: 1" newline eventfld.long 0x4 7. "POR_WDG_STAT39,POR_WDG Status 39" "0: 0,1: 1" newline eventfld.long 0x4 6. "POR_WDG_STAT38,POR_WDG Status 38" "0: 0,1: 1" newline eventfld.long 0x4 4. "POR_WDG_STAT36,POR_WDG Status 36" "0: 0,1: 1" newline eventfld.long 0x4 3. "POR_WDG_STAT35,POR_WDG Status 35" "0: 0,1: 1" newline eventfld.long 0x4 0. "POR_WDG_STAT32,POR_WDG Status 32" "0: 0,1: 1" line.long 0x8 "DCMROPP3,Read-Only GPR On PMCPOR Reset 3" eventfld.long 0x8 30. "POR_WDG_STAT94,POR_WDG Status 94" "0: 0,1: 1" newline eventfld.long 0x8 29. "POR_WDG_STAT93,POR_WDG Status 93" "0: 0,1: 1" newline eventfld.long 0x8 18. "POR_WDG_STAT82,POR_WDG Status 82" "0: 0,1: 1" newline eventfld.long 0x8 17. "POR_WDG_STAT81,POR_WDG Status 81" "0: 0,1: 1" newline eventfld.long 0x8 16. "POR_WDG_STAT80,POR_WDG Status 80" "0: 0,1: 1" newline eventfld.long 0x8 15. "POR_WDG_STAT79,POR_WDG Status 79" "0: 0,1: 1" newline eventfld.long 0x8 14. "POR_WDG_STAT78,POR_WDG Status 78" "0: 0,1: 1" newline eventfld.long 0x8 12. "POR_WDG_STAT76,POR_WDG Status 76" "0: 0,1: 1" newline eventfld.long 0x8 10. "POR_WDG_STAT74,POR_WDG Status 74" "0: 0,1: 1" newline eventfld.long 0x8 9. "POR_WDG_STAT73,POR_WDG Status 73" "0: 0,1: 1" newline eventfld.long 0x8 8. "POR_WDG_STAT72,POR_WDG Status 72" "0: 0,1: 1" newline eventfld.long 0x8 6. "POR_WDG_STAT70,POR_WDG Status 70" "0: 0,1: 1" newline eventfld.long 0x8 4. "POR_WDG_STAT68,POR_WDG Status 68" "0: 0,1: 1" newline eventfld.long 0x8 3. "POR_WDG_STAT67,POR_WDG Status 67" "0: 0,1: 1" newline eventfld.long 0x8 0. "POR_WDG_STAT64,POR_WDG Status 64" "0: 0,1: 1" line.long 0xC "DCMROPP4,Read-Only GPR On PMCPOR Reset 4" eventfld.long 0xC 0. "POR_WDG_STAT96,POR_WDG Status 96" "0: Inactive,1: Active" tree.end tree "DIGRF_TOP (LVDS Fast Asynchronous Serial Transmission)" base ad:0x404F4000 group.long 0x0++0x17 line.long 0x0 "MCR,LFAST Mode Configuration" bitfld.long 0x0 31. "MSEN,LFAST Master or Slave mode Enable" "0: Enable the modules LFAST Slave functionality only.,1: Enable the modules LFAST Master functionality.." bitfld.long 0x0 24. "IPGDBG,IPG Debug mode" "0: IPG debug mode enable signal will be ignored.,1: IPG debug mode enable signal will not be ignored." newline bitfld.long 0x0 16. "LSSEL,Low Speed Select Mode" "0: Low speed mode in which the lfast_sysclk input..,1: Low speed mode in which the lfast_sysclk input.." bitfld.long 0x0 15. "DRFEN,LFAST Enable" "0: LFAST is immediately disabled. All..,1: LFAST is Enabled." newline bitfld.long 0x0 14. "RXEN,LFAST Receiver Enable" "0: Receiver Interface is disabled. If this bit is..,1: Receiver Interface is Enabled." bitfld.long 0x0 13. "TXEN,LFAST Transmitter Enable" "0: LFAST transmitter interface is disabled. No new..,1: LFAST transmitter interface is enabled. New.." newline bitfld.long 0x0 4. "TXARBD,Tx Arbiter Disable" "0: Enable Tx arbiter and framer. When enabled it..,1: Disable Tx arbiter and framer. All frame.." bitfld.long 0x0 3. "CTSEN,CTS Enable" "0: CTS mode is disabled. Indicates that the device..,1: CTS mode is enabled. The CTS bit of all transmit.." newline bitfld.long 0x0 1. "DRFRST,LFAST Soft Reset" "0: No soft reset,1: Soft reset to LFAST is asserted. When set it.." bitfld.long 0x0 0. "DATAEN,DATA Frame Enable" "0: Data frame transmission and reception is..,1: Data frame transmission and reception is.." line.long 0x4 "SCR,LFAST Speed Control" bitfld.long 0x4 16. "DRMD,Data Rate Controller mode" "0: S/W controls the data rate controller mode. In..,1: In LFAST Slave the reception of ICLC frame for.." bitfld.long 0x4 8. "RDR,Receiver Data Rate" "0: Data rate of Rx block is low speed.,1: Data rate of Rx block is high speed." newline bitfld.long 0x4 0. "TDR,Transmit Data Rate" "0: Data rate of Tx block is low speed.,1: Data rate of Tx block is high speed." line.long 0x8 "COCR,LFAST Correlator Control" hexmask.long.byte 0x8 24.--31. 1. "SMPSEL,Sampler Data Path Selector (overrides the correlator selection)" bitfld.long 0x8 1.--3. "CORRTH,Correlator Threshold Level" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0. "PHSSEL,Polyphase 8 or 4 phase selection" "0: 8 phases,1: 4 phases" line.long 0xC "TMCR,LFAST Test Mode Control" bitfld.long 0xC 25. "CLKTST,Clock Test Mode" "0: Clock test mode disabled,1: Clock test mode enabled" bitfld.long 0xC 24. "LPON,Loopback Mode Logic Enable" "0: Loopback mode is disabled,1: Loopback mode is enabled" newline bitfld.long 0xC 16.--18. "LPMOD,Loopback Mode" "0: Rx loopback,1: Rx LVDS loopback,2: Tx loopback without automatic frame generation,3: Tx loopback with automatic frame generation,4: Tx LVDS loopback (external) with automatic frame..,?,?,?" hexmask.long.word 0xC 0.--15. 1. "LPFRMTH,Loopback check mode valid pass frames threshold value" line.long 0x10 "ALCR,LFAST Auto Loopback Control" bitfld.long 0x10 16. "LPCNTEN,Auto Loopback Frame Transmission Count Enable" "0: Infinite pre-defined loopback frame transmission..,1: Fixed count of pre-defined loopback frame.." hexmask.long.word 0x10 0.--15. 1. "LPFMCNT,Auto Loopback Frame Transmission Count" line.long 0x14 "RCDCR,LFAST Rate Change Delay Control" hexmask.long.byte 0x14 16.--19. 1. "DRCNT,Data Rate Controller Counter Value" group.long 0x1C++0x7 line.long 0x0 "ICR,LFAST ICLC Control" bitfld.long 0x0 17. "ICLCSEQ,ICLC Enabled" "0: Single ICLC frame transfer.,1: S/W is performing ICLC frame transfers. Only the.." bitfld.long 0x0 16. "SNDICLC,ICLC Frame Request" "0: No Valid ICLC frame for transfer.,1: Valid ICLC frame for transfer." newline hexmask.long.byte 0x0 0.--7. 1. "ICLCPLD,ICLC Payload" line.long 0x4 "PICR,LFAST Ping Control" bitfld.long 0x4 16. "PNGREQ,Ping Response Frame Request" "0: No pending Ping response frame transmission..,1: Ping response frame transmission request is queued" bitfld.long 0x4 15. "PNGAUTO,Ping Response Enable" "0: Ping response should not be automatically sent.,1: Ping response should be automatically sent." newline hexmask.long.byte 0x4 0.--7. 1. "PNGPYLD,LFAST Slave: Defines the LFAST slaves ping reply frame payload content" group.long 0x2C++0x1B line.long 0x0 "RFCR,LFAST Rx FIFO CTS Control" hexmask.long.byte 0x0 16.--21. 1. "RCTSMX,Rx FIFO Maximum Threshold" hexmask.long.byte 0x0 0.--5. 1. "RCTSMN,Rx FIFO Minimum Threshold" line.long 0x4 "TIER,LFAST Tx Interrupt Enable" bitfld.long 0x4 17. "TXIIE,Tx Data Interface Not Enabled - (Mask) Enables or disables the interrupt" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x4 16. "TXOVIE,Transmit Data FIFO Overflow Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x4 4. "TXPNGIE,Ping Response Frame Transmitted Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x4 2. "TXUNSIE,Unsolicited Frame transmitted Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x4 1. "TXICLCIE,This field is 0 when MCR[MSEN] is 0." "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x4 0. "TXDTIE,Data Frame Transmitted Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled" line.long 0x8 "RIER,LFAST Rx Interrupt Enable" bitfld.long 0x8 23. "RXUOIE,Unsolicited frame register overflow" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x8 22. "RXMNIE,Rx Data FIFO Min Threshold reached" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x8 21. "RXMXIE,Rx Data FIFO Max Threshold reached" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x8 20. "RXUFIE,Rx Data FIFO Underflow" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x8 19. "RXOFIE,Rx Data FIFO Overflow" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x8 18. "RXSZIE,Frame with unsupported frame size received. Valid frame sizes are defined in" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x8 17. "RXICIE,Invalid ICLC code Received" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x8 16. "RXLCEIE,Invalid Logical Channel Type" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x8 3. "RXCTSIE,Frame with CTS bit Low Received" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x8 2. "RXDIE,Data frame received" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x8 1. "RXUNSIE,Unsolicited Frame received" "0: Interrupt is disabled,1: Interrupt is enabled" line.long 0xC "RIIER,LFAST Rx ICLC Interrupt Enable" bitfld.long 0xC 13. "ICPFIE,This field is 0 when MCR[MSEN] is 0." "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0xC 12. "ICPSIE,This field is 0 when MCR[MSEN] is 0." "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0xC 11. "ICPRIE,ICLC frame for Ping Frame Request received" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0xC 10. "ICTOIE,ICLC frame for Test mode off received" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0xC 9. "ICLPIE,ICLC frame for Loopback On received" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0xC 8. "ICCTIE,ICLC frame for Clk Test mode on received" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0xC 7. "ICTDIE,ICLC frame for LFAST Slaves Tx Interface Disable received" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0xC 6. "ICTEIE,ICLC frame for LFAST Slaves Tx Interface Enable received" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0xC 5. "ICRFIE,ICLC frame for LFAST Slaves Rx Interface fast mode switch received" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0xC 4. "ICRSIE,ICLC frame for LFAST Slaves Rx Interface slow mode switch received" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0xC 3. "ICTFIE,ICLC frame for LFAST Slaves Tx Interface fast mode switch received" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0xC 2. "ICTSIE,ICLC frame for LFAST Slaves Tx Interface slow mode switch received" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0xC 1. "ICPOFIE,ICLC frame for PLL OFF received" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0xC 0. "ICPONIE,ICLC frame for PLL ON received" "0: Interrupt is disabled,1: Interrupt is enabled" line.long 0x10 "PLLCR,LFAST PLL Control" bitfld.long 0x10 17. "SWPOFF,SW signal to turn OFF the PLL. Set by user software and cleared by system hardware." "0: No effect,1: PLL will be turned OFF." bitfld.long 0x10 16. "SWPON,SW signal to turn ON the PLL. Set by user software and cleared by system hardware." "0: No effect,1: PLL will be turned ON" newline bitfld.long 0x10 15. "REFINV,Inverts reference clock edge to PFD" "0: Do not inverted,1: Invert" bitfld.long 0x10 13.--14. "LPCFG,PLL Loop Optimization for sysclk frequency" "0: 1 * IBASE current,1: 0.5 * IBASE current,2: 1.5 * IBASE current,3: 2 * IBASE current" newline bitfld.long 0x10 9.--10. "PLCKCW,PLL Lock Ready Count Width" "0: 1040 cycles,1: 520 cycles,2: 320 cycles,3: 200 cycles" bitfld.long 0x10 8. "FDIVEN,Enable fraction division mode in feedback divider" "0: Fraction division mode not enabled,1: Fraction division mode enabled" newline hexmask.long.byte 0x10 2.--7. 1. "FBDIV,Feedback Division factor for VCO output clock" bitfld.long 0x10 0.--1. "PREDIV,Division factor for PLL Reference Clock input" "0: Direct clock passed,1: Divide by 2,2: Divide by 3,3: Divide by 4" line.long 0x14 "LCR,LFAST LVDS Control" bitfld.long 0x14 23. "SWWKLD,SW signal to take LVDS LD out of Sleep mode" "0: No effect,1: LVDS LD will be taken out of sleep (provided no.." bitfld.long 0x14 22. "SWSLPLD,SW signal to put LVDS LD into Sleep mode" "0: No effect,1: LVDS LD will be put in sleep" newline bitfld.long 0x14 21. "SWWKLR,SW signal to take LVDS LR out of Sleep mode" "0: No effect,1: LVDS LR will be taken out of sleep (provided no.." bitfld.long 0x14 20. "SWSLPLR,SW signal to put LVDS LR into Sleep mode" "0: No effect,1: LVDS LR will be put in sleep (provided no other.." newline bitfld.long 0x14 19. "SWOFFLD,SW signal to turn OFF the LVDS LD" "0: No effect,1: LVDS LD will be turned OFF(provided no other.." bitfld.long 0x14 18. "SWONLD,SW signal to turn ON the LVDS LD" "0: No effect,1: LVDS LD will be turned ON" newline bitfld.long 0x14 17. "SWOFFLR,SW signal to turn OFF the LVDS LR" "0: No effect,1: LVDS LR will be turned OFF (provided no other.." bitfld.long 0x14 16. "SWONLR,SW signal to turn ON the LVDS LR" "0: No effect,1: LVDS LR will be turned ON" newline bitfld.long 0x14 15. "LVRXOFF,Indicates the value driven onto LVDS LR output when in shutdown mode" "0,1" bitfld.long 0x14 14. "LVTXOE,LVDS LD output buffer enable" "0,1" newline bitfld.long 0x14 13. "TXCMUX,Tx and Clock Mux" "0,1" bitfld.long 0x14 12. "LVRFEN,LVDS pad reference enable 0 LVDS reference pad disabled 1 LVDS reference pad enabled" "0,1" newline bitfld.long 0x14 11. "LVLPEN,Tx LVDS internal loopback enable" "0: Tx LVDS normal mode enabled,1: Tx LVDS internal loopback mode enabled" bitfld.long 0x14 5. "LVRXOP_TR,Used to enable or disable the on-chip receiver termination resistor in LFAST mode (applies to LVDS pad use for LFAST only): 0 Disable on-chip LFAST receiver termination 1 Enable on-chip LFAST receiver termination" "0,1" newline bitfld.long 0x14 3. "LVRXOP_BR,Used to set the bias current for the receiver in LFAST mode" "0,1" line.long 0x18 "UNSTCR,LFAST Unsolicited Tx Control" bitfld.long 0x18 16. "USNDRQ,Tx Unsolicited send request" "0: No valid Unsolicited frame exists,1: Valid Unsolicited frame exists for transmission" hexmask.long.byte 0x18 0.--6. 1. "UNSHDR,Tx Unsolicited Message Header" repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x48)++0x3 line.long 0x0 "UNSTDR[$1],LFAST Unsolicited Tx Data Registers" hexmask.long 0x0 0.--31. 1. "UNTXD,Unsolicited Transmit Data 8-0" repeat.end rgroup.long 0x80++0x7 line.long 0x0 "GSR,LFAST Global Status" bitfld.long 0x0 31. "DUALMD,Indicates the LFAST module is in Dual mode" "0: LFAST Module in Slave only mode,1: LFAST Module in Dual mode" bitfld.long 0x0 18. "LRMD,Indicates if the Rx Controller is idle/active and that the Rx clocks are enabled" "0: Rx Controller is in Idle state,1: Rx Controller is active" newline bitfld.long 0x0 17. "LDSM,Transmit Interface Data Rate Status" "0: Data rate of LOW speed mode,1: Data rate of HIGH speed mode" bitfld.long 0x0 16. "DRSM,Receive Interface Data Rate Status" "0: Data rate of LOW speed mode,1: Data rate of HIGH speed mode" newline bitfld.long 0x0 4. "LPTXDN,Auto loopback frame transmission count reached" "0: Auto loopback frame transmission count not..,1: Auto loopback frame transmission count reached." bitfld.long 0x0 3. "LPFPDV,Loopback frame pass threshold reached." "0: Pass frame threshold not reached.,1: Pass frame threshold achieved" newline bitfld.long 0x0 2. "LPCPDV,Valid payload received during loopback check mode" "0: Payload received is not CBh,1: Payload received is CBh" bitfld.long 0x0 1. "LPCHDV,Valid header received during loopback check mode" "0: Header received is not 13h,1: Header received is 13h" newline bitfld.long 0x0 0. "LPCSDV,Valid synchronization received." "0: Valid Synchronization pattern not detected,1: Valid Synchronization pattern detected" line.long 0x4 "PISR,LFAST Ping Status" hexmask.long.byte 0x4 0.--7. 1. "RXPNGD,Ping Data Register" rgroup.long 0x94++0x3 line.long 0x0 "DFSR,LFAST Data Frame Status" hexmask.long.byte 0x0 24.--29. 1. "RXDCNT,Unread Rx Frame Data Count" bitfld.long 0x0 16.--18. "RXFCNT,Unread Rx Frame Count" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 8.--13. 1. "TXDCNT,Unread Tx Frame Data Count" bitfld.long 0x0 0.--2. "TXFCNT,Unread Tx Frame Count" "0,1,2,3,4,5,6,7" group.long 0x98++0xB line.long 0x0 "TISR,LFAST Tx Interrupt Status" eventfld.long 0x0 17. "TXIEF,TxData Interface not enabled. Tx Data Interface not enabled and a frame is ready to be transmitted" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x0 16. "TXOVF,Transmit Data FIFO Overflow Interrupt" "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x0 4. "TXPNGF,Ping response frame transmitted interrupt 0 Interrupt event has not occurred 1 Interrupt event has occurred" "0,1" eventfld.long 0x0 2. "TXUNSF,TXUNSF" "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x0 1. "TXICLCF,ICLC Frame Transmitted Interrupt" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x0 0. "TXDTF,Data Frame Transmitted Interrupt" "0: Interrupt event has not occurred,1: Interrupt event has occurred" line.long 0x4 "RISR,LFAST Rx Interrupt Status" eventfld.long 0x4 23. "RXUOF,Unsolicited frame register overflow" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x4 22. "RXMNF,Rx Data FIFO Min Threshold reached." "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x4 21. "RXMXF,Rx Data FIFO Max Threshold reached." "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x4 20. "RXUFF,Rx Data FIFO Underflow." "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x4 19. "RXOFF,Rx Data FIFO Overflow." "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x4 18. "RXSZF,Frame with unsupported frame size received" "0: Interrupt event has not occurred,1: Interrupt event has occurred - On reception of.." newline eventfld.long 0x4 17. "RXICF,Invalid ICLC code Received." "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x4 16. "RXLCEF,Invalid Logical Channel Type." "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x4 3. "RXCTSF,Frame with CTS bit Low Received." "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x4 2. "RXDF,Data frame received." "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x4 1. "RXUNSF,Unsolicited Frame received." "0: Interrupt event has not occurred,1: Interrupt event has occurred" line.long 0x8 "RIISR,LFAST Rx ICLC Interrupt Status" eventfld.long 0x8 13. "ICPFF,Ping Frame Response Failed" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x8 12. "ICPSF,Ping Frame Response Successful" "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x8 11. "ICPRF,ICLC Ping Frame Request received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x8 10. "ICTOF,ICLC frame for Test mode off received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x8 9. "ICLPF,ICLC frame for Loopback On received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x8 8. "ICCTF,ICLC frame for Clk Test mode received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x8 7. "ICTDF,ICLC frame for LFAST Slaves Tx Interface Disable received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x8 6. "ICTEF,ICLC frame for LFAST Slaves Tx Interface Enable received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x8 5. "ICRFF,ICLC frame for LFAST Slaves Rx Interface fast mode switch received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x8 4. "ICRSF,ICLC frame for LFAST Slaves Rx Interface slow mode switch received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x8 3. "ICTFF,ICLC frame for LFAST Slaves Tx Interface fast mode switch received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x8 2. "ICTSF,ICLC frame for LFAST Slaves Tx Interface slow mode switch received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" newline eventfld.long 0x8 1. "ICPOFF,ICLC frame for PLL OFF received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" eventfld.long 0x8 0. "ICPONF,ICLC frame for PLL ON received" "0: Interrupt event has not occurred,1: Interrupt event has occurred" rgroup.long 0xA4++0x3 line.long 0x0 "PLLLSR,LFAST PLL and LVDS Status" bitfld.long 0x0 17. "PLLDIS,PLL Disable Status" "0: PLL disable signal is negated.,1: PLL disable signal is asserted." bitfld.long 0x0 16. "PLDCR,PLL Lock Delay Counter Ready" "0: PLL Lock delay counter is not decremented to 0,1: PLL Lock delay counter is decremented to 0" newline bitfld.long 0x0 3. "LRSLPS,This bit indicates the real time status of LR sleep signal" "0: LR power sleep signal is negated.,1: LR power sleep signal is asserted." bitfld.long 0x0 2. "LDSLPS,This bit indicates the real time status of LD sleep signal" "0: LD sleep signal is negated.,1: LD sleep signal is asserted." newline bitfld.long 0x0 1. "LDPDS,This bit indicates the real time status of LD power down signal When asserted LD is put in the power down state" "0: LD power down signal is negated.,1: LD power down signal is asserted." bitfld.long 0x0 0. "LRPDS,This bit indicates the real time status of LR power down signal When asserted LR is put in the power down state" "0: LR power down signal is negated.,1: LR power down signal is asserted." group.long 0xA8++0x3 line.long 0x0 "UNSRSR,LFAST Unsolicited Rx Status" bitfld.long 0x0 8. "URXDV,Unsolicited Data Valid" "0,1" rbitfld.long 0x0 0.--2. "URPCNT,Rx Unsolicited Payload" "0,1,2,3,4,5,6,7" repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAC)++0x3 line.long 0x0 "UNSRDR[$1],LFAST Unsolicited Rx Data" hexmask.long 0x0 0.--31. 1. "UNRXD,Unsolicited Receive Data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xD4)++0x3 line.long 0x0 "GPR[$1],General Purpose registers" hexmask.long 0x0 0.--31. 1. "GPR,General purpose registers used for implementing PLL sideband signals." repeat.end tree.end tree "DMA (Direct Memory Access)" base ad:0x0 tree "EDMA_0" base ad:0x4020C000 group.long 0x0++0x3 line.long 0x0 "CSR,Management Page Control" rbitfld.long 0x0 31. "ACTIVE,DMA Active Status" "0: eDMA is idle,1: eDMA is executing a channel" hexmask.long.byte 0x0 24.--28. 1. "ACTIVE_ID,Active Channel ID" newline bitfld.long 0x0 9. "CX,Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer" bitfld.long 0x0 8. "ECX,Cancel Transfer With Error" "0: Normal operation,1: Cancel the remaining data transfer" newline bitfld.long 0x0 7. "GMRC,Global Master ID Replication Control" "0: Master ID replication disabled for all channels,1: Master ID replication available and controlled.." bitfld.long 0x0 6. "GCLC,Global Channel Linking Control" "0: Channel linking disabled for all channels,1: Channel linking available and controlled by each.." newline bitfld.long 0x0 5. "HALT,Halt DMA Operations" "0: Normal operation,1: Stall the start of any new channels" bitfld.long 0x0 4. "HAE,Halt After Error" "0: Normal operation,1: Any error causes the HALT field to be set to 1" newline bitfld.long 0x0 2. "ERCA,Enable Round Robin Channel Arbitration" "0: Round-robin channel arbitration disabled,1: Round-robin channel arbitration enabled" bitfld.long 0x0 1. "EDBG,Enable Debug" "0: Debug mode disabled,1: Debug mode is enabled." rgroup.long 0x4++0xB line.long 0x0 "ES,Management Page Error Status" bitfld.long 0x0 31. "VLD,Valid" "0: No ERR fields are set to 1,1: At least one ERR field is set to 1 indicating a.." hexmask.long.byte 0x0 24.--28. 1. "ERRCHN,Error Channel Number or Canceled Channel Number" newline bitfld.long 0x0 9. "UCE,Uncorrectable TCD Error During Channel Execution" "0: No uncorrectable ECC error,1: Last recorded error was an uncorrectable TCD RAM.." bitfld.long 0x0 8. "ECX,Transfer Canceled" "0: No canceled transfers,1: Last recorded entry was a canceled transfer by.." newline bitfld.long 0x0 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." bitfld.long 0x0 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." newline bitfld.long 0x0 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." bitfld.long 0x0 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." newline bitfld.long 0x0 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: The last recorded error was NBYTES equal to zero.." bitfld.long 0x0 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." newline bitfld.long 0x0 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was a bus error on a source.." bitfld.long 0x0 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was a bus error on a.." line.long 0x4 "INT,Management Page Interrupt Request Status" hexmask.long 0x4 0.--31. 1. "INT,Interrupt Request Status" line.long 0x8 "HRS,Management Page Hardware Request Status" hexmask.long 0x8 0.--31. 1. "HRS,Hardware Request Status" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group" hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n" repeat.end tree.end tree "EDMA_1" base ad:0x40010000 group.long 0x0++0x3 line.long 0x0 "CSR,Management Page Control" rbitfld.long 0x0 31. "ACTIVE,DMA Active Status" "0: eDMA is idle,1: eDMA is executing a channel" hexmask.long.byte 0x0 24.--28. 1. "ACTIVE_ID,Active Channel ID" newline bitfld.long 0x0 9. "CX,Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer" bitfld.long 0x0 8. "ECX,Cancel Transfer With Error" "0: Normal operation,1: Cancel the remaining data transfer" newline bitfld.long 0x0 7. "GMRC,Global Master ID Replication Control" "0: Master ID replication disabled for all channels,1: Master ID replication available and controlled.." bitfld.long 0x0 6. "GCLC,Global Channel Linking Control" "0: Channel linking disabled for all channels,1: Channel linking available and controlled by each.." newline bitfld.long 0x0 5. "HALT,Halt DMA Operations" "0: Normal operation,1: Stall the start of any new channels" bitfld.long 0x0 4. "HAE,Halt After Error" "0: Normal operation,1: Any error causes the HALT field to be set to 1" newline bitfld.long 0x0 2. "ERCA,Enable Round Robin Channel Arbitration" "0: Round-robin channel arbitration disabled,1: Round-robin channel arbitration enabled" bitfld.long 0x0 1. "EDBG,Enable Debug" "0: Debug mode disabled,1: Debug mode is enabled." rgroup.long 0x4++0xB line.long 0x0 "ES,Management Page Error Status" bitfld.long 0x0 31. "VLD,Valid" "0: No ERR fields are set to 1,1: At least one ERR field is set to 1 indicating a.." hexmask.long.byte 0x0 24.--28. 1. "ERRCHN,Error Channel Number or Canceled Channel Number" newline bitfld.long 0x0 9. "UCE,Uncorrectable TCD Error During Channel Execution" "0: No uncorrectable ECC error,1: Last recorded error was an uncorrectable TCD RAM.." bitfld.long 0x0 8. "ECX,Transfer Canceled" "0: No canceled transfers,1: Last recorded entry was a canceled transfer by.." newline bitfld.long 0x0 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." bitfld.long 0x0 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." newline bitfld.long 0x0 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." bitfld.long 0x0 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." newline bitfld.long 0x0 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: The last recorded error was NBYTES equal to zero.." bitfld.long 0x0 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." newline bitfld.long 0x0 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was a bus error on a source.." bitfld.long 0x0 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was a bus error on a.." line.long 0x4 "INT,Management Page Interrupt Request Status" hexmask.long 0x4 0.--31. 1. "INT,Interrupt Request Status" line.long 0x8 "HRS,Management Page Hardware Request Status" hexmask.long 0x8 0.--31. 1. "HRS,Hardware Request Status" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group" hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n" repeat.end tree.end tree.end tree "DMAMUX (Direct Memory Access Multiplexer)" base ad:0x0 tree "DMAMUX_0" base ad:0x40280000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2)++0x0 line.byte 0x0 "CHCFG$1,Channel Configuration" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Disable,1: Enable" hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" repeat.end tree.end tree "DMAMUX_1" base ad:0x40284000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2)++0x0 line.byte 0x0 "CHCFG$1,Channel Configuration" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Disable,1: Enable" hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" repeat.end tree.end tree "DMAMUX_2" base ad:0x406A0000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2)++0x0 line.byte 0x0 "CHCFG$1,Channel Configuration" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Disable,1: Enable" hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" repeat.end tree.end tree "DMAMUX_3" base ad:0x406A4000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2)++0x0 line.byte 0x0 "CHCFG$1,Channel Configuration" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Disable,1: Enable" hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" repeat.end tree.end tree.end tree "DSPI (De-serial Serial Peripheral Interface)" base ad:0x40508000 group.long 0x0++0x3 line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MSTR,Master/Slave Mode Select" "?,1: Enables Master mode" bitfld.long 0x0 30. "CONT_SCKE,Continuous SCK Enable" "0: Continuous SCK disabled,1: Continuous SCK enabled" newline bitfld.long 0x0 28.--29. "DCONF,Interface Configuration" "0: DSPI,1: DSI,2: CSI,?" bitfld.long 0x0 27. "FRZ,Freeze" "0: Do not halt serial transfers in Debug mode.,1: Halt serial transfers in Debug mode." newline bitfld.long 0x0 24. "ROOE,Receive FIFO Overflow Overwrite Enable" "0: Incoming data is ignored.,1: Incoming data is shifted to the Shift register." bitfld.long 0x0 16.--17. "PCSIS,Peripheral Chip Select x Inactive State" "0: The inactive state of PCSx is low.,1: The inactive state of PCS0 is high and for rest..,?,?" newline bitfld.long 0x0 14. "MDIS,Module Disable" "0: Enables the module clocks,1: Allows external logic to disable the module clocks" bitfld.long 0x0 13. "DIS_TXF,Disable Transmit FIFO" "0: TX FIFO is enabled.,1: TX FIFO is disabled." newline bitfld.long 0x0 12. "DIS_RXF,Disable Receive FIFO" "0: RX FIFO is enabled.,1: RX FIFO is disabled." bitfld.long 0x0 11. "CLR_TXF,Clear TX FIFO" "0: Do not clear the TX FIFO counter.,1: Clear the TX FIFO counter." newline bitfld.long 0x0 10. "CLR_RXF,Clear RX FIFO" "0: Do not clear the RX FIFO counter.,1: Clear the RX FIFO counter." bitfld.long 0x0 3. "XSPI,Extended SPI Mode" "0: Normal SPI mode. Frame size can be up to 16 bits..,1: Extended SPI mode. Up to 32-bit SPI frames along.." newline bitfld.long 0x0 1. "PES,Parity Error Stop" "0: DSPI frame transmission continues.,1: DSPI frame transmission stops." bitfld.long 0x0 0. "HALT,Halt" "0: Starts transfers.,1: Stops transfers." group.long 0x8++0x1B line.long 0x0 "TCR,Transfer Count Register" hexmask.long.word 0x0 16.--31. 1. "SPI_TCNT,DSPI Transfer Counter" line.long 0x4 "CTAR0,Clock and Transfer Attributes Register (In Master Mode)" bitfld.long 0x4 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.." hexmask.long.byte 0x4 27.--30. 1. "FMSZ,Frame Size" newline bitfld.long 0x4 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x4 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x4 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x4 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7." newline bitfld.long 0x4 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." bitfld.long 0x4 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." newline bitfld.long 0x4 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7." hexmask.long.byte 0x4 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler" newline hexmask.long.byte 0x4 8.--11. 1. "ASC,After SCK Delay Scaler" hexmask.long.byte 0x4 4.--7. 1. "DT,Delay After Transfer Scaler" newline hexmask.long.byte 0x4 0.--3. 1. "BR,Baud Rate Scaler" line.long 0x8 "CTAR1,Clock and Transfer Attributes Register (In Master Mode)" bitfld.long 0x8 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.." hexmask.long.byte 0x8 27.--30. 1. "FMSZ,Frame Size" newline bitfld.long 0x8 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x8 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x8 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x8 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7." newline bitfld.long 0x8 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." bitfld.long 0x8 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." newline bitfld.long 0x8 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7." hexmask.long.byte 0x8 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler" newline hexmask.long.byte 0x8 8.--11. 1. "ASC,After SCK Delay Scaler" hexmask.long.byte 0x8 4.--7. 1. "DT,Delay After Transfer Scaler" newline hexmask.long.byte 0x8 0.--3. 1. "BR,Baud Rate Scaler" line.long 0xC "CTAR2,Clock and Transfer Attributes Register (In Master Mode)" bitfld.long 0xC 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.." hexmask.long.byte 0xC 27.--30. 1. "FMSZ,Frame Size" newline bitfld.long 0xC 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0xC 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0xC 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0xC 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7." newline bitfld.long 0xC 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." bitfld.long 0xC 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." newline bitfld.long 0xC 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7." hexmask.long.byte 0xC 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler" newline hexmask.long.byte 0xC 8.--11. 1. "ASC,After SCK Delay Scaler" hexmask.long.byte 0xC 4.--7. 1. "DT,Delay After Transfer Scaler" newline hexmask.long.byte 0xC 0.--3. 1. "BR,Baud Rate Scaler" line.long 0x10 "CTAR3,Clock and Transfer Attributes Register (In Master Mode)" bitfld.long 0x10 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.." hexmask.long.byte 0x10 27.--30. 1. "FMSZ,Frame Size" newline bitfld.long 0x10 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x10 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x10 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x10 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7." newline bitfld.long 0x10 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." bitfld.long 0x10 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." newline bitfld.long 0x10 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7." hexmask.long.byte 0x10 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler" newline hexmask.long.byte 0x10 8.--11. 1. "ASC,After SCK Delay Scaler" hexmask.long.byte 0x10 4.--7. 1. "DT,Delay After Transfer Scaler" newline hexmask.long.byte 0x10 0.--3. 1. "BR,Baud Rate Scaler" line.long 0x14 "CTAR4,Clock and Transfer Attributes Register (In Master Mode)" bitfld.long 0x14 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.." hexmask.long.byte 0x14 27.--30. 1. "FMSZ,Frame Size" newline bitfld.long 0x14 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x14 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x14 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x14 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7." newline bitfld.long 0x14 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." bitfld.long 0x14 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." newline bitfld.long 0x14 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7." hexmask.long.byte 0x14 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler" newline hexmask.long.byte 0x14 8.--11. 1. "ASC,After SCK Delay Scaler" hexmask.long.byte 0x14 4.--7. 1. "DT,Delay After Transfer Scaler" newline hexmask.long.byte 0x14 0.--3. 1. "BR,Baud Rate Scaler" line.long 0x18 "CTAR5,Clock and Transfer Attributes Register (In Master Mode)" bitfld.long 0x18 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.." hexmask.long.byte 0x18 27.--30. 1. "FMSZ,Frame Size" newline bitfld.long 0x18 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x18 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x18 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x18 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7." newline bitfld.long 0x18 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." bitfld.long 0x18 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7." newline bitfld.long 0x18 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7." hexmask.long.byte 0x18 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler" newline hexmask.long.byte 0x18 8.--11. 1. "ASC,After SCK Delay Scaler" hexmask.long.byte 0x18 4.--7. 1. "DT,Delay After Transfer Scaler" newline hexmask.long.byte 0x18 0.--3. 1. "BR,Baud Rate Scaler" group.long 0x2C++0xB line.long 0x0 "SR,Status Register" eventfld.long 0x0 31. "TCF,Transfer Complete Flag" "0: Transfer is incomplete.,1: Transfer is complete." rbitfld.long 0x0 30. "TXRXS,TX and RX Status" "0: Transmit and receive operations are disabled..,1: Transmit and receive operations are enabled when.." newline eventfld.long 0x0 29. "SPITCF,DSPI Frame Transfer Complete Flag." "0: DSPI frame transfer is not complete.,1: DSPI frame transfer is complete." eventfld.long 0x0 28. "EOQF,End of Queue Flag" "0: EOQ is not set in the executing command.,1: EOQ is set in the executing DSPI command." newline eventfld.long 0x0 26. "DSITCF,DSI Frame Transfer Complete Flag." "0: DSI frame transfer is not complete.,1: DSI frame transfer is complete." eventfld.long 0x0 25. "TFFF,Transmit FIFO Fill Flag" "0: TX FIFO is full.,1: TX FIFO is not full." newline rbitfld.long 0x0 24. "BSYF,Busy Flag" "0: No cyclic command transfer is in progress.,1: Cyclic command transfer is in progress. Current.." eventfld.long 0x0 23. "CMDTCF,Command Transfer Complete Flag" "0: Data transfer by current command is incomplete.,1: Data transfer by current command is complete." newline eventfld.long 0x0 22. "DPEF,DSI Parity Error Flag" "0: No parity error.,1: Parity error has occurred." eventfld.long 0x0 21. "SPEF,DSPI Parity Error Flag" "0: No parity error.,1: Parity error has occurred." newline eventfld.long 0x0 20. "DDIF,DSI Data Received with Active Fields" "0: No DSI data with active bits was received.,1: DSI data with active bits was received." eventfld.long 0x0 19. "RFOF,Receive FIFO Overflow Flag" "0: No RX FIFO overflow occurred.,1: RX FIFO overflow has occurred." newline eventfld.long 0x0 18. "TFIWF,Transmit FIFO Invalid Write Flag" "0: No invalid data is present in TX FIFO.,1: Invalid data is present in TX FIFO because CMD.." eventfld.long 0x0 17. "RFDF,Receive FIFO Drain Flag" "0: RX FIFO is empty.,1: RX FIFO is not empty." newline eventfld.long 0x0 16. "CMDFFF,Command FIFO Fill Flag" "0: CMD FIFO is full.,1: CMD FIFO is not full." hexmask.long.byte 0x0 12.--15. 1. "TXCTR,TX FIFO Counter" newline hexmask.long.byte 0x0 8.--11. 1. "TXNXTPTR,Transmit Next Pointer" hexmask.long.byte 0x0 4.--7. 1. "RXCTR,RX FIFO Counter" newline hexmask.long.byte 0x0 0.--3. 1. "POPNXTPTR,Pop Next Pointer" line.long 0x4 "RSER,DMA/Interrupt Request Select and Enable Register" bitfld.long 0x4 31. "TCF_RE,Transmission Complete Request Enable" "0: TCF interrupt requests are disabled.,1: TCF interrupt requests are enabled." bitfld.long 0x4 30. "CMDFFF_RE,Command FIFO Fill Flag Request Enable" "0: CMDFFF interrupts or DMA requests are disabled.,1: CMDFFF interrupts or DMA requests are enabled." newline bitfld.long 0x4 29. "SPITCF_RE,DSPI Frame Transmission Complete Request Enable." "0: SPITCF interrupt requests are disabled.,1: SPITCF interrupt requests are enabled." bitfld.long 0x4 28. "EOQF_RE,Finished Request Enable" "0: EOQF interrupt requests are disabled.,1: EOQF interrupt requests are enabled." newline bitfld.long 0x4 26. "DSITCF_RE,DSI Frame Transmission Complete Request Enable." "0: DSITCF interrupt requests are disabled.,1: DSITCF interrupt requests are enabled." bitfld.long 0x4 25. "TFFF_RE,Transmit FIFO Fill Request Enable" "0: TFFF interrupts or DMA requests are disabled.,1: TFFF interrupts or DMA requests are enabled." newline bitfld.long 0x4 24. "TFFF_DIRS,Transmit FIFO Fill DMA or Interrupt Request Select" "0: TFFF flag generates interrupt requests.,1: TFFF flag generates DMA requests." bitfld.long 0x4 23. "CMDTCF_RE,Command Transmission Complete Request Enable" "0: CMDTCF interrupt requests are disabled.,1: CMDTCF interrupt requests are enabled." newline bitfld.long 0x4 22. "DPEF_RE,DSI Parity Error Request Enable" "0: DPEF interrupt requests are disabled.,1: DPEF interrupt requests are enabled." bitfld.long 0x4 21. "SPEF_RE,DSPI Parity Error Request Enable" "0: SPEF interrupt requests are disabled.,1: SPEF interrupt requests are enabled." newline bitfld.long 0x4 20. "DDIF_RE,DSI Data Received (with active bits request enable)" "0: Disabled,1: Enabled" bitfld.long 0x4 19. "RFOF_RE,Receive FIFO Overflow Request Enable" "0: RFOF interrupt requests are disabled.,1: RFOF interrupt requests are enabled." newline bitfld.long 0x4 18. "TFIWF_RE,Transmit FIFO Invalid Write Request Enable" "0: TFIWF interrupt requests are disabled.,1: TFIWF interrupt requests are enabled." bitfld.long 0x4 17. "RFDF_RE,Receive FIFO Drain Request Enable" "0: RFDF interrupt or DMA requests are disabled.,1: RFDF interrupt or DMA requests are enabled." newline bitfld.long 0x4 16. "RFDF_DIRS,Receive FIFO Drain DMA or Interrupt Request Select" "0: Interrupt request,1: DMA request" bitfld.long 0x4 15. "CMDFFF_DIRS,Command FIFO Fill DMA or Interrupt Request Select" "0: CMDFFF flag generates interrupt requests.,1: CMDFFF flag generates DMA requests." newline bitfld.long 0x4 14. "DDIF_DIRS,DSI Data Received (with active bits DMA or interrupt request select)" "0: Interrupt request,1: DMA request" line.long 0x8 "PUSHR,PUSH TX FIFO Register In Master Mode" bitfld.long 0x8 31. "CONT,Continuous Peripheral Chip Select Enable" "0: Return PCSn signals to their inactive state..,1: Keep PCSn signals asserted between transfers." bitfld.long 0x8 28.--30. "CTAS,Clock and Transfer Attributes Select" "0: CTAR0,1: CTAR1,2: CTAR2,3: CTAR3,4: CTAR4,5: CTAR5,?,?" newline bitfld.long 0x8 27. "EOQ,End Of Queue" "0: The DSPI data is not the last data to transfer.,1: The DSPI data is the last data to transfer." bitfld.long 0x8 26. "CTCNT,Clear Transfer Counter" "0: Do not clear the TCR[TCNT] field.,1: Clear the TCR[TCNT] field." newline bitfld.long 0x8 25. "PE,Parity Enable" "0: No parity bit included/checked.,1: Parity bit is transmitted instead of the last.." bitfld.long 0x8 24. "PP,Parity Polarity" "0: Even Parity: the number of 1 bits in the..,1: Odd Parity: the number of 1 bits in the.." newline bitfld.long 0x8 16.--17. "PCS,PCS" "0: Negate the PCS[x] signal.,1: Assert the PCS[x] signal.,?,?" hexmask.long.word 0x8 0.--15. 1. "TXDATA,Transmit Data" rgroup.long 0x38++0x3 line.long 0x0 "POPR,POP RX FIFO Register" hexmask.long 0x0 0.--31. 1. "RXDATA,Received Data" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x3C)++0x3 line.long 0x0 "TXFR[$1],Transmit FIFO Registers" hexmask.long.word 0x0 16.--31. 1. "TXCMD_TXDATA,Transmit Command or Transmit Data" hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x7C)++0x3 line.long 0x0 "RXFR[$1],Receive FIFO Registers" hexmask.long 0x0 0.--31. 1. "RXDATA,Receive Data" repeat.end group.long 0xBC++0x3 line.long 0x0 "DSICR0,DSI Configuration Register 0" bitfld.long 0x0 30. "FMSZ4,MSB of Frame Size in Master Mode" "0,1" bitfld.long 0x0 23. "FMSZ5,MSB of Frame Size in Master Mode (when DSI is used in 64-bit mode)" "0,1" newline bitfld.long 0x0 22. "TRG,Trigger Source for Interleaved TSB mode." "0: Internal Trigger - Trigger is generated internal..,1: External Trigger - Trigger is generated external.." bitfld.long 0x0 21. "ITSB,Interleaved TSB mode." "0: Interleaved mode is disabled.,1: Interleaved mode is enabled." newline bitfld.long 0x0 20. "TSBC,Timed Serial Bus Configuration." "0: Timed Serial Bus Configuration disabled.,1: Timed Serial Bus Configuration enabled." bitfld.long 0x0 19. "TXSS,Transmit Data Source Select" "0: Source of serialized data is the SDR.,1: Source of serialized data is the ASDR." newline bitfld.long 0x0 18. "TPOL,Trigger Polarity" "0: Falling edge initiates a transfer.,1: Rising edge initiates a transfer." bitfld.long 0x0 17. "TRRE,Trigger Reception Enable" "0: Trigger signal reception is disabled.,1: Trigger signal reception is enabled." newline bitfld.long 0x0 16. "CID,Change In Data Transfer Enable" "0,1" bitfld.long 0x0 15. "DCONT,DSI Continuous Peripheral Chip Select Enable" "0: Return PCS signals to their inactive state after..,1: Keep PCS signals asserted after the transfer is.." newline bitfld.long 0x0 12.--14. "DSICTAS,DSI Clock and Transfer Attributes Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "DMS,Data Match Stop" "0: DDIF flag does not have an effect on DSI frame..,1: DDIF flag stops DSI frame transmissions." newline bitfld.long 0x0 10. "PES,Parity Error Stop" "0: Parity error does not stop DSI frame..,1: Parity error stops all DSI frame transmissions." bitfld.long 0x0 9. "PE,Parity Enable" "0: No parity bit included/checked.,1: Parity bit is transmitted instead of the last.." newline bitfld.long 0x0 8. "PP,Parity Polarity" "0: Even Parity: the number of 1 bits in the..,1: Odd Parity: the number of 1 bits in the.." hexmask.long.byte 0x0 0.--7. 1. "DPCSx,DSI Peripheral Chip Select 0-7" rgroup.long 0xC0++0x3 line.long 0x0 "SDR0,DSI Serialization Data Register 0" hexmask.long 0x0 0.--31. 1. "SER_DATA,Serialized Data" group.long 0xC4++0x3 line.long 0x0 "ASDR0,DSI Alternate Serialization Data Register 0" hexmask.long 0x0 0.--31. 1. "ASER_DATA,Alternate Serialized Data" rgroup.long 0xC8++0x7 line.long 0x0 "COMPR0,DSI Transmit Comparison Register 0" hexmask.long 0x0 0.--31. 1. "COMP_DATA,Compare Data" line.long 0x4 "DDR0,DSI Deserialization Data Register 0" hexmask.long 0x4 0.--31. 1. "DESER_DATA,Deserialized Data" group.long 0xD0++0x7 line.long 0x0 "DSICR1,DSI Configuration Register 1" hexmask.long.byte 0x0 24.--29. 1. "TSBCNT,Timed Serial Bus Operation Count" bitfld.long 0x0 19. "CSE,Command Select Enable" "0: No selection bit is inserted in the beginning of..,1: Command selection bit is inserted at the.." newline bitfld.long 0x0 18. "DSI64E,DSI 64-bit Mode Enable" "0: DSI 64-bit mode disabled. DSI mode operates..,1: DSI 64-bit mode enabled. DSI mode operates.." bitfld.long 0x0 17. "DSE1,Data Select Enable 1" "0: No Zero bit is inserted in the middle of the..,1: Zero bit is inserted at the middle of the data.." newline bitfld.long 0x0 16. "DSE0,Data Select Enable 0" "0: No Zero bit is inserted in the beginning of the..,1: Zero bit is inserted at the beginning of the.." hexmask.long.byte 0x0 0.--7. 1. "DPCS1_x,DSI Peripheral Chip Select 0-7" line.long 0x4 "SSR0,DSI Serialization Source Select Register 0" hexmask.long 0x4 0.--31. 1. "SS,Source Select" group.long 0xE8++0x7 line.long 0x0 "DIMR0,DSI Deserialized Data Interrupt Mask Register 0" hexmask.long 0x0 0.--31. 1. "MASK,Mask" line.long 0x4 "DPIR0,DSI Deserialized Data Polarity Interrupt Register 0" hexmask.long 0x4 0.--31. 1. "DP,Data Polarity" rgroup.long 0xF0++0x3 line.long 0x0 "SDR1,DSI Serialization Data Register 1" hexmask.long 0x0 0.--31. 1. "SER_DATA,Serialized Data" group.long 0xF4++0x3 line.long 0x0 "ASDR1,DSI Alternate Serialization Data Register 1" hexmask.long 0x0 0.--31. 1. "ASER_DATA,Alternate Serialized Data" rgroup.long 0xF8++0x7 line.long 0x0 "COMPR1,DSI Transmit Comparison Register 1" hexmask.long 0x0 0.--31. 1. "COMP_DATA,Compare Data" line.long 0x4 "DDR1,DSI Deserialization Data Register 1" hexmask.long 0x4 0.--31. 1. "DESER_DATA,Deserialized Data" group.long 0x100++0x3 line.long 0x0 "SSR1,DSI Serialization Source Select Register 1" hexmask.long 0x0 0.--31. 1. "SS,Source Select" group.long 0x114++0x7 line.long 0x0 "DIMR1,DSI Deserialized Data Interrupt Mask Register 1" hexmask.long 0x0 0.--31. 1. "MASK,Mask" line.long 0x4 "DPIR1,DSI Deserialized Data Polarity Interrupt Register 1" hexmask.long 0x4 0.--31. 1. "DP,Data Polarity" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x11C)++0x3 line.long 0x0 "CTARE[$1],Clock and Transfer Attributes Register Extended" bitfld.long 0x0 16. "FMSZE,Frame Size Extended" "0: Default mode. Up to 16-bit DSPI frames can be..,1: Up to 32-bit DSPI frames can be transferred." hexmask.long.word 0x0 0.--10. 1. "DTCP,Data Transfer Count Preload" repeat.end rgroup.long 0x13C++0x3 line.long 0x0 "SREX,Status Register Extended" bitfld.long 0x0 14. "TXCTR4,TX FIFO Counter[4]" "0,1" bitfld.long 0x0 11. "RXCTR4,RX FIFO Counter[4]" "0,1" newline hexmask.long.byte 0x0 4.--8. 1. "CMDCTR,CMD FIFO Counter" hexmask.long.byte 0x0 0.--3. 1. "CMDNXTPTR,Command Next Pointer" group.long 0x150++0x7 line.long 0x0 "TSL,Time Slot Length Register" hexmask.long.byte 0x0 24.--30. 1. "TS3_LEN,Time Slot 3 Length" hexmask.long.byte 0x0 16.--22. 1. "TS2_LEN,Time Slot 2 Length" newline hexmask.long.byte 0x0 8.--14. 1. "TS1_LEN,Time Slot 1 Length" hexmask.long.byte 0x0 0.--6. 1. "TS0_LEN,Time Slot 0 Length" line.long 0x4 "TS_CONF,Time Slot Configuration Register" hexmask.long.byte 0x4 12.--15. 1. "TS3,Time Slot 3" hexmask.long.byte 0x4 8.--11. 1. "TS2,Time Slot 2" newline hexmask.long.byte 0x4 4.--7. 1. "TS1,Time Slot 1" hexmask.long.byte 0x4 0.--3. 1. "TS0,Time Slot 0" tree.end tree "DSPSS (DSP Sub-System)" base ad:0x0 tree "DSPSS_0" base ad:0x406DC000 group.long 0x0++0xB line.long 0x0 "DSPSS_SCHEDULER_XMEM_ADDR_TH0,Thread Start And End Address Location Configuration" hexmask.long.word 0x0 16.--31. 1. "SCHEDULER_THRD_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--15. 1. "SCHEDULER_THRD_START_ADDR,Start Address" line.long 0x4 "DSPSS_SCHEDULER_XMEM_TH0,Thread Threshold And Enable" bitfld.long 0x4 31. "SCHEDULER_THRD_EN,Thread Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x4 0.--15. 1. "SCHEDULER_THRD_TH,Thread Threshold" line.long 0x8 "DSPSS_SCHEDULER_DSP_CFG_TH0,PC Initial Value" hexmask.long.word 0x8 0.--13. 1. "DSPSS_SCHEDULER_DSP_PCINIT,PC Initial Value" rgroup.long 0xC++0x3 line.long 0x0 "DSPSS_SCHEDULER_CURR_XMEM_ADDR_TH0,Current XMEM Write Pointer" hexmask.long.word 0x0 0.--14. 1. "DSPSS_SCHEDULER_CURR_XMEM_ADDR,Current Write Pointer Location" rgroup.long 0x14++0x3 line.long 0x0 "DSP_SDADC_CURR_READ_PTR0,Last Scheduled-Request Address" hexmask.long.word 0x0 0.--13. 1. "DSP_SDADC_CURR_READ_PTR,Address Pointer" group.long 0x1C++0x3 line.long 0x0 "DSP_CORE_BUF_ADDR0,Start And End Pointers For DSP And Cortex-M7 Core Shared Buffer" hexmask.long.word 0x0 18.--31. 1. "DSP_CORE_BUF_END_ADDR,End Pointer" newline hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_BUF_START_ADDR,Start Pointer" group.long 0x28++0xB line.long 0x0 "DSP_CORE_CURR_RD_PTR0,Read Pointer In DSP Buffer" rbitfld.long 0x0 14. "DSP_CORE_CURR_RD_PTR_WRAP,Wrap Status" "0,1" newline hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_CURR_RD_PTR,Read Pointer" line.long 0x4 "DSP_CORE_CURR_WR_PTR0,Write Pointer In DSP Buffer" rbitfld.long 0x4 14. "DSP_CORE_CURR_WR_PTR_WRAP,Wrap Status" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DSP_CORE_CURR_WR_PTR,Write Pointer" line.long 0x8 "DMA_READ_ADDR0,Reference DMA Read Region" hexmask.long.word 0x8 18.--31. 1. "DMA_READ_END_ADDR,End Address" newline hexmask.long.word 0x8 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0x38++0x3 line.long 0x0 "DMA_ERROR_STATUS0,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,Transfer Error Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,Transfer Error Write Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,Address Mismatch Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0: No such error occurred,1: This error occurred" group.long 0x40++0xB line.long 0x0 "DMA_WRITE_ADDR0,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR0,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR0,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" newline hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" rgroup.long 0x50++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS0,DMA Request Status" bitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0: Acknowledgment for current DMA request is pending,1: DMA acknowledges the current DMA request" newline bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0: DMA request is complete,1: Initiate DMA request" group.long 0x54++0x3 line.long 0x0 "THREAD_SUSPEND_REQ0,Thread Suspend Request For Thread Disabling/PCINIT Change" bitfld.long 0x0 0. "SUSPEND_REQ,Suspend Request" "0: Do not initiate,1: Initiate" group.long 0x5C++0x3 line.long 0x0 "DSPSS_DSP_TH_STATUS0,Thread Status" eventfld.long 0x0 0. "dspss_th_suspended,Thread Status" "0: Not suspended,1: Suspended" group.long 0x7C++0x7 line.long 0x0 "DSP_CORE_BUFFER_STATUS0,DSP Core Buffer Status" eventfld.long 0x0 2. "DSP_CORE_BUFFER_UNDF,Buffer Underflow Flag" "0: No underflow,1: Underflow occurred" newline eventfld.long 0x0 1. "DSP_CORE_BUFFER_OVF,Buffer Overflow Flag" "0: No overflow,1: Overflow occurred" line.long 0x4 "DSP_TO_CORE_TRIG_ERR_STATUS0,DSP To Cortex-M7 Core Error Trigger" eventfld.long 0x4 0. "DSP_TO_CORE_TRIG_ERR_STATUS,Error Status" "0: Error did not occur,1: Error occurred" rgroup.long 0x84++0x7 line.long 0x0 "DS_GATE_STATUS_REGISTER0,DSP Output Control" bitfld.long 0x0 0. "DS_GATE_STATUS_REGISTER,General-Purpose Data Exchange" "0,1" line.long 0x4 "DS_GATE_TRIGMUX_REGISTER0,DSP Trigger To TRIGMUX" bitfld.long 0x4 0. "DS_GATE_TRIGMUX_TRIGGER,Trigger To TRIGMUX" "0: Do not send a trigger,1: Send a trigger" group.long 0x8C++0x7 line.long 0x0 "HW_CTRL_DMA_REQ_STOP0,Stop DMA Request" bitfld.long 0x0 0. "STOP,Stop Request" "0: Do not stop,1: Stop" line.long 0x4 "DMA_ERROR_CTRL0,DMA Error Control" bitfld.long 0x4 0. "DONE,Dummy Done" "0,1" rgroup.long 0x94++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE0,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" newline bitfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0: Not finished,1: Finished" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" newline bitfld.long 0x0 0. "START,Start Request" "0,1" group.long 0x300++0xB line.long 0x0 "DSPSS_SCHEDULER_XMEM_ADDR_TH1,Thread Start And End Address Location Configuration" hexmask.long.word 0x0 16.--31. 1. "SCHEDULER_THRD_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--15. 1. "SCHEDULER_THRD_START_ADDR,Start Address" line.long 0x4 "DSPSS_SCHEDULER_XMEM_TH1,Thread Threshold And Enable" bitfld.long 0x4 31. "SCHEDULER_THRD_EN,Thread Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x4 0.--15. 1. "SCHEDULER_THRD_TH,Thread Threshold" line.long 0x8 "DSPSS_SCHEDULER_DSP_CFG_TH1,PC Initial Value" hexmask.long.word 0x8 0.--13. 1. "DSPSS_SCHEDULER_DSP_PCINIT,PC Initial Value" rgroup.long 0x30C++0x3 line.long 0x0 "DSPSS_SCHEDULER_CURR_XMEM_ADDR_TH1,Current XMEM Write Pointer" hexmask.long.word 0x0 0.--14. 1. "DSPSS_SCHEDULER_CURR_XMEM_ADDR,Current Write Pointer Location" rgroup.long 0x314++0x3 line.long 0x0 "DSP_SDADC_CURR_READ_PTR1,Last Scheduled-Request Address" hexmask.long.word 0x0 0.--13. 1. "DSP_SDADC_CURR_READ_PTR,Address Pointer" group.long 0x31C++0x3 line.long 0x0 "DSP_CORE_BUF_ADDR1,Start And End Pointers For DSP And Cortex-M7 Core Shared Buffer" hexmask.long.word 0x0 18.--31. 1. "DSP_CORE_BUF_END_ADDR,End Pointer" newline hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_BUF_START_ADDR,Start Pointer" group.long 0x328++0xB line.long 0x0 "DSP_CORE_CURR_RD_PTR1,Read Pointer In DSP Buffer" rbitfld.long 0x0 14. "DSP_CORE_CURR_RD_PTR_WRAP,Wrap Status" "0,1" newline hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_CURR_RD_PTR,Read Pointer" line.long 0x4 "DSP_CORE_CURR_WR_PTR1,Write Pointer In DSP Buffer" rbitfld.long 0x4 14. "DSP_CORE_CURR_WR_PTR_WRAP,Wrap Status" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DSP_CORE_CURR_WR_PTR,Write Pointer" line.long 0x8 "DMA_READ_ADDR1,Reference DMA Read Region" hexmask.long.word 0x8 18.--31. 1. "DMA_READ_END_ADDR,End Address" newline hexmask.long.word 0x8 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0x338++0x3 line.long 0x0 "DMA_ERROR_STATUS1,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,Transfer Error Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,Transfer Error Write Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,Address Mismatch Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0: No such error occurred,1: This error occurred" group.long 0x340++0xB line.long 0x0 "DMA_WRITE_ADDR1,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR1,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR1,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" newline hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" rgroup.long 0x350++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS1,DMA Request Status" bitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0: Acknowledgment for current DMA request is pending,1: DMA acknowledges the current DMA request" newline bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0: DMA request is complete,1: Initiate DMA request" group.long 0x354++0x3 line.long 0x0 "THREAD_SUSPEND_REQ1,Thread Suspend Request For Thread Disabling/PCINIT Change" bitfld.long 0x0 0. "SUSPEND_REQ,Suspend Request" "0: Do not initiate,1: Initiate" group.long 0x35C++0x3 line.long 0x0 "DSPSS_DSP_TH_STATUS1,Thread Status" eventfld.long 0x0 0. "dspss_th_suspended,Thread Status" "0: Not suspended,1: Suspended" group.long 0x37C++0x7 line.long 0x0 "DSP_CORE_BUFFER_STATUS1,DSP Core Buffer Status" eventfld.long 0x0 2. "DSP_CORE_BUFFER_UNDF,Buffer Underflow Flag" "0: No underflow,1: Underflow occurred" newline eventfld.long 0x0 1. "DSP_CORE_BUFFER_OVF,Buffer Overflow Flag" "0: No overflow,1: Overflow occurred" line.long 0x4 "DSP_TO_CORE_TRIG_ERR_STATUS1,DSP To Cortex-M7 Core Error Trigger" eventfld.long 0x4 0. "DSP_TO_CORE_TRIG_ERR_STATUS,Error Status" "0: Error did not occur,1: Error occurred" rgroup.long 0x384++0x7 line.long 0x0 "DS_GATE_STATUS_REGISTER1,DSP Output Control" bitfld.long 0x0 0. "DS_GATE_STATUS_REGISTER,General-Purpose Data Exchange" "0,1" line.long 0x4 "DS_GATE_TRIGMUX_REGISTER1,DSP Trigger To TRIGMUX" bitfld.long 0x4 0. "DS_GATE_TRIGMUX_TRIGGER,Trigger To TRIGMUX" "0: Do not send a trigger,1: Send a trigger" group.long 0x38C++0x7 line.long 0x0 "HW_CTRL_DMA_REQ_STOP1,Stop DMA Request" bitfld.long 0x0 0. "STOP,Stop Request" "0: Do not stop,1: Stop" line.long 0x4 "DMA_ERROR_CTRL1,DMA Error Control" bitfld.long 0x4 0. "DONE,Dummy Done" "0,1" rgroup.long 0x394++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE1,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" newline bitfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0: Not finished,1: Finished" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" newline bitfld.long 0x0 0. "START,Start Request" "0,1" group.long 0x600++0xB line.long 0x0 "DSPSS_SCHEDULER_XMEM_ADDR_TH2,Thread Start And End Address Location Configuration" hexmask.long.word 0x0 16.--31. 1. "SCHEDULER_THRD_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--15. 1. "SCHEDULER_THRD_START_ADDR,Start Address" line.long 0x4 "DSPSS_SCHEDULER_XMEM_TH2,Thread Threshold And Enable" bitfld.long 0x4 31. "SCHEDULER_THRD_EN,Thread Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x4 0.--15. 1. "SCHEDULER_THRD_TH,Thread Threshold" line.long 0x8 "DSPSS_SCHEDULER_DSP_CFG_TH2,PC Initial Value" hexmask.long.word 0x8 0.--13. 1. "DSPSS_SCHEDULER_DSP_PCINIT,PC Initial Value" rgroup.long 0x60C++0x3 line.long 0x0 "DSPSS_SCHEDULER_CURR_XMEM_ADDR_TH2,Current XMEM Write Pointer" hexmask.long.word 0x0 0.--14. 1. "DSPSS_SCHEDULER_CURR_XMEM_ADDR,Current Write Pointer Location" rgroup.long 0x614++0x3 line.long 0x0 "DSP_SDADC_CURR_READ_PTR2,Last Scheduled-Request Address" hexmask.long.word 0x0 0.--13. 1. "DSP_SDADC_CURR_READ_PTR,Address Pointer" group.long 0x61C++0x3 line.long 0x0 "DSP_CORE_BUF_ADDR2,Start And End Pointers For DSP And Cortex-M7 Core Shared Buffer" hexmask.long.word 0x0 18.--31. 1. "DSP_CORE_BUF_END_ADDR,End Pointer" newline hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_BUF_START_ADDR,Start Pointer" group.long 0x628++0xB line.long 0x0 "DSP_CORE_CURR_RD_PTR2,Read Pointer In DSP Buffer" rbitfld.long 0x0 14. "DSP_CORE_CURR_RD_PTR_WRAP,Wrap Status" "0,1" newline hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_CURR_RD_PTR,Read Pointer" line.long 0x4 "DSP_CORE_CURR_WR_PTR2,Write Pointer In DSP Buffer" rbitfld.long 0x4 14. "DSP_CORE_CURR_WR_PTR_WRAP,Wrap Status" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DSP_CORE_CURR_WR_PTR,Write Pointer" line.long 0x8 "DMA_READ_ADDR2,Reference DMA Read Region" hexmask.long.word 0x8 18.--31. 1. "DMA_READ_END_ADDR,End Address" newline hexmask.long.word 0x8 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0x638++0x3 line.long 0x0 "DMA_ERROR_STATUS2,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,Transfer Error Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,Transfer Error Write Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,Address Mismatch Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0: No such error occurred,1: This error occurred" group.long 0x640++0xB line.long 0x0 "DMA_WRITE_ADDR2,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR2,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR2,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" newline hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" rgroup.long 0x650++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS2,DMA Request Status" bitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0: Acknowledgment for current DMA request is pending,1: DMA acknowledges the current DMA request" newline bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0: DMA request is complete,1: Initiate DMA request" group.long 0x654++0x3 line.long 0x0 "THREAD_SUSPEND_REQ2,Thread Suspend Request For Thread Disabling/PCINIT Change" bitfld.long 0x0 0. "SUSPEND_REQ,Suspend Request" "0: Do not initiate,1: Initiate" group.long 0x65C++0x3 line.long 0x0 "DSPSS_DSP_TH_STATUS2,Thread Status" eventfld.long 0x0 0. "dspss_th_suspended,Thread Status" "0: Not suspended,1: Suspended" group.long 0x67C++0x7 line.long 0x0 "DSP_CORE_BUFFER_STATUS2,DSP Core Buffer Status" eventfld.long 0x0 2. "DSP_CORE_BUFFER_UNDF,Buffer Underflow Flag" "0: No underflow,1: Underflow occurred" newline eventfld.long 0x0 1. "DSP_CORE_BUFFER_OVF,Buffer Overflow Flag" "0: No overflow,1: Overflow occurred" line.long 0x4 "DSP_TO_CORE_TRIG_ERR_STATUS2,DSP To Cortex-M7 Core Error Trigger" eventfld.long 0x4 0. "DSP_TO_CORE_TRIG_ERR_STATUS,Error Status" "0: Error did not occur,1: Error occurred" rgroup.long 0x684++0x7 line.long 0x0 "DS_GATE_STATUS_REGISTER2,DSP Output Control" bitfld.long 0x0 0. "DS_GATE_STATUS_REGISTER,General-Purpose Data Exchange" "0,1" line.long 0x4 "DS_GATE_TRIGMUX_REGISTER2,DSP Trigger To TRIGMUX" bitfld.long 0x4 0. "DS_GATE_TRIGMUX_TRIGGER,Trigger To TRIGMUX" "0: Do not send a trigger,1: Send a trigger" group.long 0x68C++0x7 line.long 0x0 "HW_CTRL_DMA_REQ_STOP2,Stop DMA Request" bitfld.long 0x0 0. "STOP,Stop Request" "0: Do not stop,1: Stop" line.long 0x4 "DMA_ERROR_CTRL2,DMA Error Control" bitfld.long 0x4 0. "DONE,Dummy Done" "0,1" rgroup.long 0x694++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE2,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" newline bitfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0: Not finished,1: Finished" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" newline bitfld.long 0x0 0. "START,Start Request" "0,1" group.long 0x900++0xB line.long 0x0 "DSPSS_SCHEDULER_XMEM_ADDR_TH3,Thread Start And End Address Location Configuration" hexmask.long.word 0x0 16.--31. 1. "SCHEDULER_THRD_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--15. 1. "SCHEDULER_THRD_START_ADDR,Start Address" line.long 0x4 "DSPSS_SCHEDULER_XMEM_TH3,Thread Threshold And Enable" bitfld.long 0x4 31. "SCHEDULER_THRD_EN,Thread Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x4 0.--15. 1. "SCHEDULER_THRD_TH,Thread Threshold" line.long 0x8 "DSPSS_SCHEDULER_DSP_CFG_TH3,PC Initial Value" hexmask.long.word 0x8 0.--13. 1. "DSPSS_SCHEDULER_DSP_PCINIT,PC Initial Value" rgroup.long 0x90C++0x3 line.long 0x0 "DSPSS_SCHEDULER_CURR_XMEM_ADDR_TH3,Current XMEM Write Pointer" hexmask.long.word 0x0 0.--14. 1. "DSPSS_SCHEDULER_CURR_XMEM_ADDR,Current Write Pointer Location" rgroup.long 0x914++0x3 line.long 0x0 "DSP_SDADC_CURR_READ_PTR3,Last Scheduled-Request Address" hexmask.long.word 0x0 0.--13. 1. "DSP_SDADC_CURR_READ_PTR,Address Pointer" group.long 0x91C++0x3 line.long 0x0 "DSP_CORE_BUF_ADDR3,Start And End Pointers For DSP And Cortex-M7 Core Shared Buffer" hexmask.long.word 0x0 18.--31. 1. "DSP_CORE_BUF_END_ADDR,End Pointer" newline hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_BUF_START_ADDR,Start Pointer" group.long 0x928++0xB line.long 0x0 "DSP_CORE_CURR_RD_PTR3,Read Pointer In DSP Buffer" rbitfld.long 0x0 14. "DSP_CORE_CURR_RD_PTR_WRAP,Wrap Status" "0,1" newline hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_CURR_RD_PTR,Read Pointer" line.long 0x4 "DSP_CORE_CURR_WR_PTR3,Write Pointer In DSP Buffer" rbitfld.long 0x4 14. "DSP_CORE_CURR_WR_PTR_WRAP,Wrap Status" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DSP_CORE_CURR_WR_PTR,Write Pointer" line.long 0x8 "DMA_READ_ADDR3,Reference DMA Read Region" hexmask.long.word 0x8 18.--31. 1. "DMA_READ_END_ADDR,End Address" newline hexmask.long.word 0x8 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0x938++0x3 line.long 0x0 "DMA_ERROR_STATUS3,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,Transfer Error Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,Transfer Error Write Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,Address Mismatch Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0: No such error occurred,1: This error occurred" group.long 0x940++0xB line.long 0x0 "DMA_WRITE_ADDR3,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR3,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR3,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" newline hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" rgroup.long 0x950++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS3,DMA Request Status" bitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0: Acknowledgment for current DMA request is pending,1: DMA acknowledges the current DMA request" newline bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0: DMA request is complete,1: Initiate DMA request" group.long 0x954++0x3 line.long 0x0 "THREAD_SUSPEND_REQ3,Thread Suspend Request For Thread Disabling/PCINIT Change" bitfld.long 0x0 0. "SUSPEND_REQ,Suspend Request" "0: Do not initiate,1: Initiate" group.long 0x95C++0x3 line.long 0x0 "DSPSS_DSP_TH_STATUS3,Thread Status" eventfld.long 0x0 0. "dspss_th_suspended,Thread Status" "0: Not suspended,1: Suspended" group.long 0x97C++0x7 line.long 0x0 "DSP_CORE_BUFFER_STATUS3,DSP Core Buffer Status" eventfld.long 0x0 2. "DSP_CORE_BUFFER_UNDF,Buffer Underflow Flag" "0: No underflow,1: Underflow occurred" newline eventfld.long 0x0 1. "DSP_CORE_BUFFER_OVF,Buffer Overflow Flag" "0: No overflow,1: Overflow occurred" line.long 0x4 "DSP_TO_CORE_TRIG_ERR_STATUS3,DSP To Cortex-M7 Core Error Trigger" eventfld.long 0x4 0. "DSP_TO_CORE_TRIG_ERR_STATUS,Error Status" "0: Error did not occur,1: Error occurred" rgroup.long 0x984++0x7 line.long 0x0 "DS_GATE_STATUS_REGISTER3,DSP Output Control" bitfld.long 0x0 0. "DS_GATE_STATUS_REGISTER,General-Purpose Data Exchange" "0,1" line.long 0x4 "DS_GATE_TRIGMUX_REGISTER3,DSP Trigger To TRIGMUX" bitfld.long 0x4 0. "DS_GATE_TRIGMUX_TRIGGER,Trigger To TRIGMUX" "0: Do not send a trigger,1: Send a trigger" group.long 0x98C++0x7 line.long 0x0 "HW_CTRL_DMA_REQ_STOP3,Stop DMA Request" bitfld.long 0x0 0. "STOP,Stop Request" "0: Do not stop,1: Stop" line.long 0x4 "DMA_ERROR_CTRL3,DMA Error Control" bitfld.long 0x4 0. "DONE,Dummy Done" "0,1" rgroup.long 0x994++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE3,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" newline bitfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0: Not finished,1: Finished" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" newline bitfld.long 0x0 0. "START,Start Request" "0,1" group.long 0xBE4++0x13 line.long 0x0 "DSPSS_SOFT_RESET_REGISTER,DSPSS Soft Reset" bitfld.long 0x0 0. "SFTRST,Soft Reset" "0: Do not reset,1: Reset" line.long 0x4 "DSP_ACK_TIMEOUT_CFG_AND_ERR_CTRL,DSP ACK Timeout Configuration And Error Control" eventfld.long 0x4 23. "DSP_ACK_TIMEOUT_ERR_TH3,DSP ACK Timeout Error Flag For Thread 3" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x4 22. "DSP_ACK_TIMEOUT_ERR_TH2,DSP ACK Timeout Error Flag For Thread 2" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x4 21. "DSP_ACK_TIMEOUT_ERR_TH1,DSP ACK Timeout Error Flag For Thread 1" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x4 20. "DSP_ACK_TIMEOUT_ERR_TH0,DSP ACK Timeout Error Flag For Thread 0" "0: No such error occurred,1: This error occurred" newline hexmask.long.byte 0x4 15.--19. 1. "REQ_COUNT_ACC_FIFO,Context Requests In Request FIFO" newline eventfld.long 0x4 14. "REQ_ACC_FIFO_INTR,Interrupt Status On Request FIFO Threshold Cross" "0,1" newline hexmask.long.byte 0x4 9.--13. 1. "REQ_ACC_FIFO_THRESHOLD_FOR_INTR,Interrupt Threshold For Request FIFO" newline eventfld.long 0x4 8. "DSP_ACK_TIMEOUT_ERR,DSP ACK Timeout Error Flag" "0: No such error occurred,1: This error occurred" newline bitfld.long 0x4 6. "DSP_ACK_TIMEOUT_EN,DSP ACK Timeout Enable" "0: Disable,1: Enable" newline hexmask.long.byte 0x4 0.--5. 1. "DSP_ACK_TIMEOUT_TIMER,DSP ACK Timeout Timer Configuration" line.long 0x8 "ECC_ERROR_MONITOR_THREAD_SUSPEND_CTRL,Disable Monitoring of ECC Errors In XMEM And PMEM" bitfld.long 0x8 2. "PMEM_ECC_ERROR_DIS,Error Monitoring Disable For PMEM" "0: Enable,1: Disable" newline bitfld.long 0x8 1. "XMEM_ODD_ECC_ERROR_DIS,Error Monitoring Disable For Odd XMEM" "0: Enable,1: Disable" newline bitfld.long 0x8 0. "XMEM_EVEN_ECC_ERROR_DIS,Error Monitoring Disable For Even XMEM" "0: Enable,1: Disable" line.long 0xC "INTERRUPT_ENABLE_REGISTER2,Interrupt Enable" bitfld.long 0xC 19. "REQ_ACC_FIFO_THRESHOLD_CROSS_INT_EN,Interrupt enable: Request accumulator FIFO" "0: Disable,1: Enable" newline bitfld.long 0xC 18. "DSP_INIT_LOW_IE,Interrupt enable: DSP_INIT_LOW" "0: Disable,1: Enable" newline bitfld.long 0xC 17. "REQ_FIFO_ERR_IE_EN,Interrupt enable: REQ_FIFO_ERR" "0: Disable,1: Enable" newline bitfld.long 0xC 16. "DSP_ACK_TIMEOUT_ERR_IE,Interrupt enable: DSP_ACK_TIMEOUT Error" "0: Disable,1: Enable" newline hexmask.long.byte 0xC 12.--15. 1. "DSP_CORE_BUFFER_UNDERRUN_IE,Interrupt enable: DSP-CORE BUFFER Underrun Error" newline hexmask.long.byte 0xC 8.--11. 1. "DSP_CORE_BUFFER_OVERFLOW_IE,Interrupt enable: DSP-CORE BUFFER Overflow Error" newline hexmask.long.byte 0xC 0.--3. 1. "SDADC_SYNC_FIFO_OVERFLOW_IE,Interrupt enable: SDADC_SYNC_FIFO_OVERFLOW" line.long 0x10 "SDADC_SYNC_FIFO_ERROR_STATUS,FIFO Overflow Status" eventfld.long 0x10 8. "REQ_FIFO_OVERFLOW,Request FIFO Overflow Flag" "0: No overflow occurred,1: Overflow occurred" newline hexmask.long.byte 0x10 0.--3. 1. "OVERFLOW,SDADC Sync FIFO Overflow Flag" group.long 0xBFC++0xF line.long 0x0 "DSP_CORE_BUFFER_CFG,Configuration For DSP-Core Buffer" hexmask.long.byte 0x0 4.--7. 1. "DSP_CORE_BUFFER_MASTER,Programming the current read/write ownership inside the DSP_CORE buffer in XMEM." newline hexmask.long.byte 0x0 0.--3. 1. "DSP_CORE_BUFFER_EN,DSP Core Buffer Enable" line.long 0x4 "DMA_BUFFER_CFG,DMA Buffer Configuration" bitfld.long 0x4 31. "MAP_XFR_DMA_ERR_ON_IPS,When set the DMA_ADDR_MISMATCH_RD_BUFFER/DMA_ADDR_MISMATCH_RD_BUFFER errors are mapped on IPS_XFR_ERR." "0,1" newline hexmask.long.byte 0x4 6.--11. 1. "DMA_READ_EN,DMA-READ Buffer Monitor Enable" newline hexmask.long.byte 0x4 0.--5. 1. "DMA_WRITE_EN,DMA-WRITE Buffer Monitor Enable" line.long 0x8 "SCHEDULER_MODE_CFG,Thread Scheduling Mode Selection" bitfld.long 0x8 18. "NEXT_REQ_HALT_ACK_WAIT_CTRL,Thread Scheduling Control" "0,1" newline hexmask.long.byte 0x8 14.--17. 1. "SCHD_SEQ_4,Schedule For Fourth Thread" newline hexmask.long.byte 0x8 10.--13. 1. "SCHD_SEQ_3,Schedule For Third Thread" newline hexmask.long.byte 0x8 6.--9. 1. "SCHD_SEQ_2,Schedule For Second Thread" newline hexmask.long.byte 0x8 2.--5. 1. "SCHD_SEQ_1,Schedule For First Thread" newline bitfld.long 0x8 0.--1. "SCHEDULER_MODE,Scheduler Mode Selection" "0: Sample Threshold mode and hardware thread..,1: Clock Threshold scheduling mode; the SCHD_SEQ_n..,2: Software scheduling; no hardware scheduling,?" line.long 0xC "DSPSS_DSP0_CFG,DSP0 Reset And Core Trigger Configuration" bitfld.long 0xC 7.--8. "dspss_dsp0_core_trigger_safety_cfg,Core Trigger Configuration" "0: No trigger,1: Pulse trigger,2: Level-signal trigger,3: No trigger" newline bitfld.long 0xC 4. "XMEM_CTRL_PRIORITY,XMEM Priority Access Control" "0: Core with DMA,1: SDADC" newline bitfld.long 0xC 2.--3. "dspss_dsp0_core_trigger_cfg,Core Trigger Configuration" "0: No trigger,1: Pulse trigger,2: Level-signal trigger,3: No trigger" newline bitfld.long 0xC 1. "dspss_scheduler_dsp0_reset,Thread Reset Assertion Control" "0,1" newline bitfld.long 0xC 0. "SCHED_DSP_RST_CTRL_EN,Reset Assertion Control" "0: Reset deasserts whenever..,1: DSPSS releases the reset when the sample/clock.." group.long 0xC10++0x7 line.long 0x0 "INTERRUPT_ENABLE_REGISTER,Interrupt Enable" hexmask.long.byte 0x0 22.--27. 1. "DMA_READ_BUFFER_XFR_ERR_INTR_EN,Interrupt Enable for DMA-READ Buffer XFR Errors" newline hexmask.long.byte 0x0 16.--21. 1. "DMA_WRITE_BUFFER_XFR_ERR_INTR_EN,Interrupt Enable for DMA-WRITE Buffer XFR Errors" newline hexmask.long.byte 0x0 10.--15. 1. "DMA_READ_BUFFER_ERR_INTR_EN,Interrupt Enable for DMA-READ Buffer Pointer Mismatch Errors" newline hexmask.long.byte 0x0 4.--9. 1. "DMA_WRITE_BUFFER_ERR_INTR_EN,Interrupt Enable for DMA-WRITE Buffer Pointer Mismatch Errors" newline hexmask.long.byte 0x0 0.--3. 1. "DSP_ERROR_INTR_EN,Interrupt Enable for DSP Errors" line.long 0x4 "DSPSS_DSP_IO_INTF0,DSP Trigger to Core" eventfld.long 0x4 3. "DSP_TRIGGER_CORE_TH3,Trigger for Thread 3" "0,1" newline eventfld.long 0x4 2. "DSP_TRIGGER_CORE_TH2,Trigger for Thread 2" "0,1" newline eventfld.long 0x4 1. "DSP_TRIGGER_CORE_TH1,Trigger for Thread 1" "0,1" newline eventfld.long 0x4 0. "DSP_TRIGGER_CORE_TH0,Trigger for Thread 0" "0,1" group.long 0xC1C++0x3 line.long 0x0 "CURR_ACTIVE_THRD,DSP Core Status" eventfld.long 0x0 14. "DSP_COMP_LOW,DSP_COMP_LOW" "0: DSP is active.,1: DSP is inactive." newline hexmask.long.byte 0x0 10.--13. 1. "LAST_CTXT_REQ,Last Context Request" newline hexmask.long.byte 0x0 6.--9. 1. "DSP_THRD_SLEEP_STATUS,Thread Sleep State" newline rbitfld.long 0x0 4. "DSP_INIT_COMP,Initialization Complete" "0: Not complete,1: Complete" newline hexmask.long.byte 0x0 0.--3. 1. "CURR_ACTIVE_THREAD,Current Context Connected to DSP Execution Pipeline" group.long 0xC24++0x3 line.long 0x0 "DSPSS_DSP_CORE_TRIGGER_SAFETY,DSP Safety Trigger to Core" eventfld.long 0x0 1. "DSP_TRIGGER_SAFETY_2,Safety Thread Trigger 1" "0,1" newline eventfld.long 0x0 0. "DSP_TRIGGER_SAFETY_1,Safety Thread Trigger 0" "0,1" group.long 0xC30++0x3 line.long 0x0 "DMA_READ_ADDR4,Reference DMA Read Region" hexmask.long.word 0x0 18.--31. 1. "DMA_READ_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0xC38++0x3 line.long 0x0 "DMA_ERROR_STATUS4,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,Transfer Error Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,Transfer Error Write Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,Address Mismatch Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0: No such error occurred,1: This error occurred" group.long 0xC40++0xB line.long 0x0 "DMA_WRITE_ADDR4,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR4,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR4,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" newline hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" rgroup.long 0xC50++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS4,DMA Request Status" bitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0: Acknowledgment for current DMA request is pending,1: DMA acknowledges the current DMA request" newline bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0: DMA request is complete,1: Initiate DMA request" group.long 0xC8C++0x7 line.long 0x0 "HW_CTRL_DMA_REQ_STOP4,Stop DMA Request" bitfld.long 0x0 0. "STOP,Stop Request" "0: Do not stop,1: Stop" line.long 0x4 "DMA_ERROR_CTRL4,DMA Error Control" bitfld.long 0x4 0. "DONE,Dummy Done" "0,1" rgroup.long 0xC94++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE4,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" newline bitfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0: Not finished,1: Finished" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" newline bitfld.long 0x0 0. "START,Start Request" "0,1" group.long 0xF30++0x3 line.long 0x0 "DMA_READ_ADDR5,Reference DMA Read Region" hexmask.long.word 0x0 18.--31. 1. "DMA_READ_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0xF38++0x3 line.long 0x0 "DMA_ERROR_STATUS5,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,Transfer Error Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,Transfer Error Write Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,Address Mismatch Read Flag" "0: No such error occurred,1: This error occurred" newline eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0: No such error occurred,1: This error occurred" group.long 0xF40++0xB line.long 0x0 "DMA_WRITE_ADDR5,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" newline hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR5,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR5,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" newline hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" rgroup.long 0xF50++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS5,DMA Request Status" bitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0: Acknowledgment for current DMA request is pending,1: DMA acknowledges the current DMA request" newline bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0: DMA request is complete,1: Initiate DMA request" group.long 0xF8C++0x7 line.long 0x0 "HW_CTRL_DMA_REQ_STOP5,Stop DMA Request" bitfld.long 0x0 0. "STOP,Stop Request" "0: Do not stop,1: Stop" line.long 0x4 "DMA_ERROR_CTRL5,DMA Error Control" bitfld.long 0x4 0. "DONE,Dummy Done" "0,1" rgroup.long 0xF94++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE5,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" newline bitfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0: Not finished,1: Finished" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" newline bitfld.long 0x0 0. "START,Start Request" "0,1" tree.end base ad:0x0 tree "DSPSS_1" rgroup.long 0xC++0x3 line.long 0x0 "DSPSS_SCHEDULER_CURR_XMEM_ADDR_TH0,Current XMEM Write Pointer" hexmask.long.word 0x0 0.--14. 1. "DSPSS_SCHEDULER_CURR_XMEM_ADDR,Current Write Pointer Location" rgroup.long 0x14++0x3 line.long 0x0 "DSP_SDADC_CURR_READ_PTR0,Last Scheduled-Request Address" hexmask.long.word 0x0 0.--13. 1. "DSP_SDADC_CURR_READ_PTR,Address Pointer" group.long 0x1C++0x3 line.long 0x0 "DSP_CORE_BUF_ADDR0,Start And End Pointers For DSP And Cortex-M7 Core Shared Buffer" hexmask.long.word 0x0 18.--31. 1. "DSP_CORE_BUF_END_ADDR,End Pointer" hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_BUF_START_ADDR,Start Pointer" group.long 0x28++0xB line.long 0x0 "DSP_CORE_CURR_RD_PTR0,Read Pointer In DSP Buffer" rbitfld.long 0x0 14. "DSP_CORE_CURR_RD_PTR_WRAP,Wrap Status" "0,1" hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_CURR_RD_PTR,Read Pointer" line.long 0x4 "DSP_CORE_CURR_WR_PTR0,Write Pointer In DSP Buffer" rbitfld.long 0x4 14. "DSP_CORE_CURR_WR_PTR_WRAP,Wrap Status" "0,1" hexmask.long.word 0x4 0.--13. 1. "DSP_CORE_CURR_WR_PTR,Write Pointer" line.long 0x8 "DMA_READ_ADDR0,Reference DMA Read Region" hexmask.long.word 0x8 18.--31. 1. "DMA_READ_END_ADDR,End Address" hexmask.long.word 0x8 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0x38++0x3 line.long 0x0 "DMA_ERROR_STATUS0,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,w1c by M7 core/DSP." "0,1" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0,1" group.long 0x40++0xB line.long 0x0 "DMA_WRITE_ADDR0,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR0,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR0,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" group.long 0x50++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS0,DMA Request Status" rbitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0,1" bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0,1" group.long 0x5C++0x3 line.long 0x0 "DSPSS_DSP_TH_STATUS0,Thread Status" eventfld.long 0x0 0. "dspss_th_suspended,Thread Status" "0: Not suspended,1: Suspended" group.long 0x7C++0x7 line.long 0x0 "DSP_CORE_BUFFER_STATUS0,DSP Core Buffer Status" eventfld.long 0x0 2. "DSP_CORE_BUFFER_UNDF,Buffer Underflow Flag" "0,1" eventfld.long 0x0 1. "DSP_CORE_BUFFER_OVF,Buffer Overflow Flag" "0,1" line.long 0x4 "DSP_TO_CORE_TRIG_ERR_STATUS0,DSP To Cortex-M7 Core Error Trigger" bitfld.long 0x4 0. "DSP_TO_CORE_TRIG_ERR_STATUS,Error Status" "0,1" rgroup.long 0x84++0x3 line.long 0x0 "DS_GATE_STATUS_REGISTER0,DSP Output Control" bitfld.long 0x0 0. "DS_GATE_STATUS_REGISTER,RO by M7 core/DSP." "0,1" group.long 0x88++0x7 line.long 0x0 "DS_GATE_TRIGMUX_REGISTER0,DSP Trigger To TRIGMUX" bitfld.long 0x0 0. "DS_GATE_TRIGMUX_TRIGGER,Trigger To TRIGMUX" "0,1" line.long 0x4 "HW_CTRL_DMA_REQ_STOP0,Stop DMA Request" bitfld.long 0x4 0. "STOP,Stop Request" "0,1" rgroup.long 0x90++0x3 line.long 0x0 "DMA_ERROR_CTRL0,DMA Error Control" bitfld.long 0x0 0. "DONE,Dummy Done" "0,1" group.long 0x94++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE0,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" eventfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0,1" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" bitfld.long 0x0 0. "START,Start Request" "0,1" rgroup.long 0x30C++0x3 line.long 0x0 "DSPSS_SCHEDULER_CURR_XMEM_ADDR_TH1,Current XMEM Write Pointer" hexmask.long.word 0x0 0.--14. 1. "DSPSS_SCHEDULER_CURR_XMEM_ADDR,Current Write Pointer Location" rgroup.long 0x314++0x3 line.long 0x0 "DSP_SDADC_CURR_READ_PTR1,Last Scheduled-Request Address" hexmask.long.word 0x0 0.--13. 1. "DSP_SDADC_CURR_READ_PTR,Address Pointer" group.long 0x31C++0x3 line.long 0x0 "DSP_CORE_BUF_ADDR1,Start And End Pointers For DSP And Cortex-M7 Core Shared Buffer" hexmask.long.word 0x0 18.--31. 1. "DSP_CORE_BUF_END_ADDR,End Pointer" hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_BUF_START_ADDR,Start Pointer" group.long 0x328++0xB line.long 0x0 "DSP_CORE_CURR_RD_PTR1,Read Pointer In DSP Buffer" rbitfld.long 0x0 14. "DSP_CORE_CURR_RD_PTR_WRAP,Wrap Status" "0,1" hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_CURR_RD_PTR,Read Pointer" line.long 0x4 "DSP_CORE_CURR_WR_PTR1,Write Pointer In DSP Buffer" rbitfld.long 0x4 14. "DSP_CORE_CURR_WR_PTR_WRAP,Wrap Status" "0,1" hexmask.long.word 0x4 0.--13. 1. "DSP_CORE_CURR_WR_PTR,Write Pointer" line.long 0x8 "DMA_READ_ADDR1,Reference DMA Read Region" hexmask.long.word 0x8 18.--31. 1. "DMA_READ_END_ADDR,End Address" hexmask.long.word 0x8 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0x338++0x3 line.long 0x0 "DMA_ERROR_STATUS1,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,w1c by M7 core/DSP." "0,1" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0,1" group.long 0x340++0xB line.long 0x0 "DMA_WRITE_ADDR1,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR1,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR1,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" group.long 0x350++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS1,DMA Request Status" rbitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0,1" bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0,1" group.long 0x35C++0x3 line.long 0x0 "DSPSS_DSP_TH_STATUS1,Thread Status" eventfld.long 0x0 0. "dspss_th_suspended,Thread Status" "0: Not suspended,1: Suspended" group.long 0x37C++0x7 line.long 0x0 "DSP_CORE_BUFFER_STATUS1,DSP Core Buffer Status" eventfld.long 0x0 2. "DSP_CORE_BUFFER_UNDF,Buffer Underflow Flag" "0,1" eventfld.long 0x0 1. "DSP_CORE_BUFFER_OVF,Buffer Overflow Flag" "0,1" line.long 0x4 "DSP_TO_CORE_TRIG_ERR_STATUS1,DSP To Cortex-M7 Core Error Trigger" bitfld.long 0x4 0. "DSP_TO_CORE_TRIG_ERR_STATUS,Error Status" "0,1" rgroup.long 0x384++0x3 line.long 0x0 "DS_GATE_STATUS_REGISTER1,DSP Output Control" bitfld.long 0x0 0. "DS_GATE_STATUS_REGISTER,RO by M7 core/DSP." "0,1" group.long 0x388++0x7 line.long 0x0 "DS_GATE_TRIGMUX_REGISTER1,DSP Trigger To TRIGMUX" bitfld.long 0x0 0. "DS_GATE_TRIGMUX_TRIGGER,Trigger To TRIGMUX" "0,1" line.long 0x4 "HW_CTRL_DMA_REQ_STOP1,Stop DMA Request" bitfld.long 0x4 0. "STOP,Stop Request" "0,1" rgroup.long 0x390++0x3 line.long 0x0 "DMA_ERROR_CTRL1,DMA Error Control" bitfld.long 0x0 0. "DONE,Dummy Done" "0,1" group.long 0x394++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE1,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" eventfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0,1" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" bitfld.long 0x0 0. "START,Start Request" "0,1" rgroup.long 0x60C++0x3 line.long 0x0 "DSPSS_SCHEDULER_CURR_XMEM_ADDR_TH2,Current XMEM Write Pointer" hexmask.long.word 0x0 0.--14. 1. "DSPSS_SCHEDULER_CURR_XMEM_ADDR,Current Write Pointer Location" rgroup.long 0x614++0x3 line.long 0x0 "DSP_SDADC_CURR_READ_PTR2,Last Scheduled-Request Address" hexmask.long.word 0x0 0.--13. 1. "DSP_SDADC_CURR_READ_PTR,Address Pointer" group.long 0x61C++0x3 line.long 0x0 "DSP_CORE_BUF_ADDR2,Start And End Pointers For DSP And Cortex-M7 Core Shared Buffer" hexmask.long.word 0x0 18.--31. 1. "DSP_CORE_BUF_END_ADDR,End Pointer" hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_BUF_START_ADDR,Start Pointer" group.long 0x628++0xB line.long 0x0 "DSP_CORE_CURR_RD_PTR2,Read Pointer In DSP Buffer" rbitfld.long 0x0 14. "DSP_CORE_CURR_RD_PTR_WRAP,Wrap Status" "0,1" hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_CURR_RD_PTR,Read Pointer" line.long 0x4 "DSP_CORE_CURR_WR_PTR2,Write Pointer In DSP Buffer" rbitfld.long 0x4 14. "DSP_CORE_CURR_WR_PTR_WRAP,Wrap Status" "0,1" hexmask.long.word 0x4 0.--13. 1. "DSP_CORE_CURR_WR_PTR,Write Pointer" line.long 0x8 "DMA_READ_ADDR2,Reference DMA Read Region" hexmask.long.word 0x8 18.--31. 1. "DMA_READ_END_ADDR,End Address" hexmask.long.word 0x8 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0x638++0x3 line.long 0x0 "DMA_ERROR_STATUS2,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,w1c by M7 core/DSP." "0,1" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0,1" group.long 0x640++0xB line.long 0x0 "DMA_WRITE_ADDR2,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR2,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR2,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" group.long 0x650++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS2,DMA Request Status" rbitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0,1" bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0,1" group.long 0x65C++0x3 line.long 0x0 "DSPSS_DSP_TH_STATUS2,Thread Status" eventfld.long 0x0 0. "dspss_th_suspended,Thread Status" "0: Not suspended,1: Suspended" group.long 0x67C++0x7 line.long 0x0 "DSP_CORE_BUFFER_STATUS2,DSP Core Buffer Status" eventfld.long 0x0 2. "DSP_CORE_BUFFER_UNDF,Buffer Underflow Flag" "0,1" eventfld.long 0x0 1. "DSP_CORE_BUFFER_OVF,Buffer Overflow Flag" "0,1" line.long 0x4 "DSP_TO_CORE_TRIG_ERR_STATUS2,DSP To Cortex-M7 Core Error Trigger" bitfld.long 0x4 0. "DSP_TO_CORE_TRIG_ERR_STATUS,Error Status" "0,1" rgroup.long 0x684++0x3 line.long 0x0 "DS_GATE_STATUS_REGISTER2,DSP Output Control" bitfld.long 0x0 0. "DS_GATE_STATUS_REGISTER,RO by M7 core/DSP." "0,1" group.long 0x688++0x7 line.long 0x0 "DS_GATE_TRIGMUX_REGISTER2,DSP Trigger To TRIGMUX" bitfld.long 0x0 0. "DS_GATE_TRIGMUX_TRIGGER,Trigger To TRIGMUX" "0,1" line.long 0x4 "HW_CTRL_DMA_REQ_STOP2,Stop DMA Request" bitfld.long 0x4 0. "STOP,Stop Request" "0,1" rgroup.long 0x690++0x3 line.long 0x0 "DMA_ERROR_CTRL2,DMA Error Control" bitfld.long 0x0 0. "DONE,Dummy Done" "0,1" group.long 0x694++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE2,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" eventfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0,1" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" bitfld.long 0x0 0. "START,Start Request" "0,1" rgroup.long 0x90C++0x3 line.long 0x0 "DSPSS_SCHEDULER_CURR_XMEM_ADDR_TH3,Current XMEM Write Pointer" hexmask.long.word 0x0 0.--14. 1. "DSPSS_SCHEDULER_CURR_XMEM_ADDR,Current Write Pointer Location" rgroup.long 0x914++0x3 line.long 0x0 "DSP_SDADC_CURR_READ_PTR3,Last Scheduled-Request Address" hexmask.long.word 0x0 0.--13. 1. "DSP_SDADC_CURR_READ_PTR,Address Pointer" group.long 0x91C++0x3 line.long 0x0 "DSP_CORE_BUF_ADDR3,Start And End Pointers For DSP And Cortex-M7 Core Shared Buffer" hexmask.long.word 0x0 18.--31. 1. "DSP_CORE_BUF_END_ADDR,End Pointer" hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_BUF_START_ADDR,Start Pointer" group.long 0x928++0xB line.long 0x0 "DSP_CORE_CURR_RD_PTR3,Read Pointer In DSP Buffer" rbitfld.long 0x0 14. "DSP_CORE_CURR_RD_PTR_WRAP,Wrap Status" "0,1" hexmask.long.word 0x0 0.--13. 1. "DSP_CORE_CURR_RD_PTR,Read Pointer" line.long 0x4 "DSP_CORE_CURR_WR_PTR3,Write Pointer In DSP Buffer" rbitfld.long 0x4 14. "DSP_CORE_CURR_WR_PTR_WRAP,Wrap Status" "0,1" hexmask.long.word 0x4 0.--13. 1. "DSP_CORE_CURR_WR_PTR,Write Pointer" line.long 0x8 "DMA_READ_ADDR3,Reference DMA Read Region" hexmask.long.word 0x8 18.--31. 1. "DMA_READ_END_ADDR,End Address" hexmask.long.word 0x8 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0x938++0x3 line.long 0x0 "DMA_ERROR_STATUS3,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,w1c by M7 core/DSP." "0,1" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0,1" group.long 0x940++0xB line.long 0x0 "DMA_WRITE_ADDR3,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR3,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR3,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" group.long 0x950++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS3,DMA Request Status" rbitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0,1" bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0,1" group.long 0x95C++0x3 line.long 0x0 "DSPSS_DSP_TH_STATUS3,Thread Status" eventfld.long 0x0 0. "dspss_th_suspended,Thread Status" "0: Not suspended,1: Suspended" group.long 0x97C++0x7 line.long 0x0 "DSP_CORE_BUFFER_STATUS3,DSP Core Buffer Status" eventfld.long 0x0 2. "DSP_CORE_BUFFER_UNDF,Buffer Underflow Flag" "0,1" eventfld.long 0x0 1. "DSP_CORE_BUFFER_OVF,Buffer Overflow Flag" "0,1" line.long 0x4 "DSP_TO_CORE_TRIG_ERR_STATUS3,DSP To Cortex-M7 Core Error Trigger" bitfld.long 0x4 0. "DSP_TO_CORE_TRIG_ERR_STATUS,Error Status" "0,1" rgroup.long 0x984++0x3 line.long 0x0 "DS_GATE_STATUS_REGISTER3,DSP Output Control" bitfld.long 0x0 0. "DS_GATE_STATUS_REGISTER,RO by M7 core/DSP." "0,1" group.long 0x988++0x7 line.long 0x0 "DS_GATE_TRIGMUX_REGISTER3,DSP Trigger To TRIGMUX" bitfld.long 0x0 0. "DS_GATE_TRIGMUX_TRIGGER,Trigger To TRIGMUX" "0,1" line.long 0x4 "HW_CTRL_DMA_REQ_STOP3,Stop DMA Request" bitfld.long 0x4 0. "STOP,Stop Request" "0,1" rgroup.long 0x990++0x3 line.long 0x0 "DMA_ERROR_CTRL3,DMA Error Control" bitfld.long 0x0 0. "DONE,Dummy Done" "0,1" group.long 0x994++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE3,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" eventfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0,1" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" bitfld.long 0x0 0. "START,Start Request" "0,1" group.long 0xC14++0x3 line.long 0x0 "DSPSS_DSP_IO_INTF0,DSP Trigger to Core" bitfld.long 0x0 3. "DSP_TRIGGER_CORE_TH3,Trigger for Thread 3" "0,1" bitfld.long 0x0 2. "DSP_TRIGGER_CORE_TH2,Trigger for Thread 2" "0,1" newline bitfld.long 0x0 1. "DSP_TRIGGER_CORE_TH1,Trigger for Thread 1" "0,1" bitfld.long 0x0 0. "DSP_TRIGGER_CORE_TH0,Trigger for Thread 0" "0,1" group.long 0xC24++0x3 line.long 0x0 "DSPSS_DSP_CORE_TRIGGER_SAFETY,>DSP Safety Trigger to Core" bitfld.long 0x0 1. "DSP_TRIGGER_SAFETY_2,Safety Thread Trigger 1" "0,1" bitfld.long 0x0 0. "DSP_TRIGGER_SAFETY_1,Safety Thread Trigger 0" "0,1" group.long 0xC30++0x3 line.long 0x0 "DMA_READ_ADDR4,Reference DMA Read Region" hexmask.long.word 0x0 18.--31. 1. "DMA_READ_END_ADDR,End Address" hexmask.long.word 0x0 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0xC38++0x3 line.long 0x0 "DMA_ERROR_STATUS4,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,w1c by M7 core/DSP." "0,1" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0,1" group.long 0xC40++0xB line.long 0x0 "DMA_WRITE_ADDR4,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR4,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR4,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" group.long 0xC50++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS4,DMA Request Status" rbitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0,1" bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0,1" group.long 0xC8C++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_STOP4,Stop DMA Request" bitfld.long 0x0 0. "STOP,Stop Request" "0,1" rgroup.long 0xC90++0x3 line.long 0x0 "DMA_ERROR_CTRL4,DMA Error Control" bitfld.long 0x0 0. "DONE,Dummy Done" "0,1" group.long 0xC94++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE4,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" eventfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0,1" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" bitfld.long 0x0 0. "START,Start Request" "0,1" group.long 0xF30++0x3 line.long 0x0 "DMA_READ_ADDR5,Reference DMA Read Region" hexmask.long.word 0x0 18.--31. 1. "DMA_READ_END_ADDR,End Address" hexmask.long.word 0x0 0.--13. 1. "DMA_READ_START_ADDR,Start Address" group.long 0xF38++0x3 line.long 0x0 "DMA_ERROR_STATUS5,DMA Error Status" eventfld.long 0x0 3. "DMA_XFR_ERR_READ,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 2. "DMA_XFR_ERR_WRITE,w1c by M7 core/DSP." "0,1" newline eventfld.long 0x0 1. "DMA_ADDR_MISMATCH_RD_BUFFER,w1c by M7 core/DSP." "0,1" eventfld.long 0x0 0. "DMA_ADDR_MISMATCH_WR_BUFFER,Address Mismatch Write Flag" "0,1" group.long 0xF40++0xB line.long 0x0 "DMA_WRITE_ADDR5,Reference DMA Write Region" hexmask.long.word 0x0 18.--31. 1. "DMA_WRITE_END_ADDR,End Address" hexmask.long.word 0x0 0.--13. 1. "DMA_WRITE_START_ADDR,Start Address" line.long 0x4 "DMA_CURR_WR_PTR5,DMA Current Write Pointer" rbitfld.long 0x4 31. "DMA_WRITE_PTR_WRAP,DMA-WRITE Buffer Wrap" "0,1" hexmask.long.word 0x4 0.--13. 1. "DMA_CURR_WRITE_PTR,Write Pointer" line.long 0x8 "DMA_CURR_RD_PTR5,DMA Current Read Pointer" rbitfld.long 0x8 31. "DMA_READ_PTR_WRAP,DMA-READ Buffer Wrap" "0,1" hexmask.long.word 0x8 0.--13. 1. "DMA_CURR_READ_PTR,Read Pointer" group.long 0xF50++0x3 line.long 0x0 "DSP_TO_DMA_REQUEST_STATUS5,DMA Request Status" rbitfld.long 0x0 1. "DMA_TO_DSP_ACK_STATUS,DMA Acknowledgment Status" "0,1" bitfld.long 0x0 0. "DSP_TO_DMA_REQUEST_STATUS,DMA Request Status" "0,1" group.long 0xF8C++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_STOP5,Stop DMA Request" bitfld.long 0x0 0. "STOP,Stop Request" "0,1" rgroup.long 0xF90++0x3 line.long 0x0 "DMA_ERROR_CTRL5,DMA Error Control" bitfld.long 0x0 0. "DONE,Dummy Done" "0,1" group.long 0xF94++0x3 line.long 0x0 "HW_CTRL_DMA_REQ_RESPONSE5,Hardware Control Handling for DMA Request And Response" hexmask.long.byte 0x0 10.--17. 1. "NUM_OF_DMA_REQ_PEND,Number of Pending DMA Requests" eventfld.long 0x0 9. "DONE,Done Generating DMA Requests" "0,1" newline hexmask.long.byte 0x0 1.--8. 1. "NUM_OF_DMA_REQ,Number of DMA Requests" bitfld.long 0x0 0. "START,Start Request" "0,1" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1200)++0x3 line.long 0x0 "DSPSS_DSP_THREAD_INFO[$1],Thread Status Info n" bitfld.long 0x0 31. "THREAD_ACC_FIFO_OVF,Accumulator FIFO Overflow" "0: No overflow,1: Overflow" bitfld.long 0x0 30. "THREAD_ACC_FIFO_FULL,Accumulator FIFO Full" "0: Not full,1: Full" newline hexmask.long.byte 0x0 26.--29. 1. "NUM_THREADS_IN_ACC_FIFO,Number of Threads In Accumulator FIFO" hexmask.long.word 0x0 16.--25. 1. "CURR_FSM_STATE,Hardware Scheduler Current FSM State" newline bitfld.long 0x0 14.--15. "WRAP_COUNT,Wrap Count" "0,1,2,3" hexmask.long.word 0x0 0.--13. 1. "SDADC_XMEM_CURR_WR_PTR,Current Write Pointer" repeat.end tree.end tree.end tree "EIM (Error Injection Module)" base ad:0x0 tree "EIM_0" base ad:0x4050C000 group.long 0x0++0x7 line.long 0x0 "EIMCR,Error Injection Module Configuration Register" bitfld.long 0x0 0. "GEIEN,Global Error Injection Enable" "0: Disabled,1: Enabled" line.long 0x4 "EICHEN,Error Injection Channel Enable register" bitfld.long 0x4 31. "EICH0EN,Error Injection Channel 0 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 29. "EICH2EN,Error Injection Channel 2 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 28. "EICH3EN,Error Injection Channel 3 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 27. "EICH4EN,Error Injection Channel 4 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 26. "EICH5EN,Error Injection Channel 5 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 25. "EICH6EN,Error Injection Channel 6 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 24. "EICH7EN,Error Injection Channel 7 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 23. "EICH8EN,Error Injection Channel 8 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 22. "EICH9EN,Error Injection Channel 9 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 21. "EICH10EN,Error Injection Channel 10 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 20. "EICH11EN,Error Injection Channel 11 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 19. "EICH12EN,Error Injection Channel 12 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 18. "EICH13EN,Error Injection Channel 13 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 17. "EICH14EN,Error Injection Channel 14 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 16. "EICH15EN,Error Injection Channel 15 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 15. "EICH16EN,Error Injection Channel 16 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 14. "EICH17EN,Error Injection Channel 17 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 13. "EICH18EN,Error Injection Channel 18 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." group.long 0x100++0xB line.long 0x0 "EICHD0_WORD0,Error Injection Channel Descriptor 0. Word0" hexmask.long.word 0x0 18.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD0_WORD1,Error Injection Channel Descriptor 0. Word1" hexmask.long.word 0x4 0.--11. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD0_WORD2,Error Injection Channel Descriptor 0. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x140++0x13 line.long 0x0 "EICHD1_WORD0,Error Injection Channel Descriptor 1. Word0" hexmask.long.word 0x0 16.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD1_WORD1,Error Injection Channel Descriptor 1. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD1_WORD2,Error Injection Channel Descriptor 1. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD1_WORD3,Error Injection Channel Descriptor 1. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD1_WORD4,Error Injection Channel Descriptor 1. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x180++0x13 line.long 0x0 "EICHD2_WORD0,Error Injection Channel Descriptor 2. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD2_WORD1,Error Injection Channel Descriptor 2. Word1" hexmask.long.byte 0x4 0.--7. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD2_WORD2,Error Injection Channel Descriptor 2. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD2_WORD3,Error Injection Channel Descriptor 2. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD2_WORD4,Error Injection Channel Descriptor 2. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x1C0++0x13 line.long 0x0 "EICHD3_WORD0,Error Injection Channel Descriptor 3. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD3_WORD1,Error Injection Channel Descriptor 3. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD3_WORD2,Error Injection Channel Descriptor 3. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD3_WORD3,Error Injection Channel Descriptor 3. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD3_WORD4,Error Injection Channel Descriptor 3. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x200++0x13 line.long 0x0 "EICHD4_WORD0,Error Injection Channel Descriptor 4. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD4_WORD1,Error Injection Channel Descriptor 4. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD4_WORD2,Error Injection Channel Descriptor 4. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD4_WORD3,Error Injection Channel Descriptor 4. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD4_WORD4,Error Injection Channel Descriptor 4. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x240++0xB line.long 0x0 "EICHD5_WORD0,Error Injection Channel Descriptor 5. Word0" hexmask.long.word 0x0 18.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD5_WORD1,Error Injection Channel Descriptor 5. Word1" hexmask.long.word 0x4 0.--11. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD5_WORD2,Error Injection Channel Descriptor 5. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x280++0x13 line.long 0x0 "EICHD6_WORD0,Error Injection Channel Descriptor 6. Word0" hexmask.long.word 0x0 16.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD6_WORD1,Error Injection Channel Descriptor 6. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD6_WORD2,Error Injection Channel Descriptor 6. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD6_WORD3,Error Injection Channel Descriptor 6. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD6_WORD4,Error Injection Channel Descriptor 6. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x2C0++0x13 line.long 0x0 "EICHD7_WORD0,Error Injection Channel Descriptor 7. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD7_WORD1,Error Injection Channel Descriptor 7. Word1" hexmask.long.byte 0x4 0.--7. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD7_WORD2,Error Injection Channel Descriptor 7. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD7_WORD3,Error Injection Channel Descriptor 7. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD7_WORD4,Error Injection Channel Descriptor 7. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x300++0x13 line.long 0x0 "EICHD8_WORD0,Error Injection Channel Descriptor 8. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD8_WORD1,Error Injection Channel Descriptor 8. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD8_WORD2,Error Injection Channel Descriptor 8. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD8_WORD3,Error Injection Channel Descriptor 8. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD8_WORD4,Error Injection Channel Descriptor 8. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x340++0x13 line.long 0x0 "EICHD9_WORD0,Error Injection Channel Descriptor 9. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD9_WORD1,Error Injection Channel Descriptor 9. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD9_WORD2,Error Injection Channel Descriptor 9. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD9_WORD3,Error Injection Channel Descriptor 9. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD9_WORD4,Error Injection Channel Descriptor 9. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x380++0xB line.long 0x0 "EICHD10_WORD0,Error Injection Channel Descriptor 10. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD10_WORD1,Error Injection Channel Descriptor 10. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD10_WORD2,Error Injection Channel Descriptor 10. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x3C0++0x7 line.long 0x0 "EICHD11_WORD0,Error Injection Channel Descriptor 11. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD11_WORD1,Error Injection Channel Descriptor 11. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x400++0x7 line.long 0x0 "EICHD12_WORD0,Error Injection Channel Descriptor 12. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD12_WORD1,Error Injection Channel Descriptor 12. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x440++0xB line.long 0x0 "EICHD13_WORD0,Error Injection Channel Descriptor 13. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD13_WORD1,Error Injection Channel Descriptor 13. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD13_WORD2,Error Injection Channel Descriptor 13. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x480++0x7 line.long 0x0 "EICHD14_WORD0,Error Injection Channel Descriptor 14. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD14_WORD1,Error Injection Channel Descriptor 14. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x4C0++0x7 line.long 0x0 "EICHD15_WORD0,Error Injection Channel Descriptor 15. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD15_WORD1,Error Injection Channel Descriptor 15. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x504++0x3 line.long 0x0 "EICHD16_WORD1,Error Injection Channel Descriptor 16. Word1" hexmask.long 0x0 0.--29. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x544++0x7 line.long 0x0 "EICHD17_WORD1,Error Injection Channel Descriptor 17. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD17_WORD2,Error Injection Channel Descriptor 17. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x584++0x7 line.long 0x0 "EICHD18_WORD1,Error Injection Channel Descriptor 18. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD18_WORD2,Error Injection Channel Descriptor 18. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" tree.end tree "EIM_1" base ad:0x40510000 group.long 0x0++0x7 line.long 0x0 "EIMCR,Error Injection Module Configuration Register" bitfld.long 0x0 0. "GEIEN,Global Error Injection Enable" "0: Disabled,1: Enabled" line.long 0x4 "EICHEN,Error Injection Channel Enable register" bitfld.long 0x4 31. "EICH0EN,Error Injection Channel 0 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 29. "EICH2EN,Error Injection Channel 2 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 28. "EICH3EN,Error Injection Channel 3 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 27. "EICH4EN,Error Injection Channel 4 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 21. "EICH10EN,Error Injection Channel 10 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 20. "EICH11EN,Error Injection Channel 11 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 19. "EICH12EN,Error Injection Channel 12 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 15. "EICH16EN,Error Injection Channel 16 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 14. "EICH17EN,Error Injection Channel 17 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." group.long 0x100++0xB line.long 0x0 "EICHD0_WORD0,Error Injection Channel Descriptor 0. Word0" hexmask.long.word 0x0 18.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD0_WORD1,Error Injection Channel Descriptor 0. Word1" hexmask.long.word 0x4 0.--11. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD0_WORD2,Error Injection Channel Descriptor 0. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x140++0x13 line.long 0x0 "EICHD1_WORD0,Error Injection Channel Descriptor 1. Word0" hexmask.long.word 0x0 16.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD1_WORD1,Error Injection Channel Descriptor 1. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD1_WORD2,Error Injection Channel Descriptor 1. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD1_WORD3,Error Injection Channel Descriptor 1. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD1_WORD4,Error Injection Channel Descriptor 1. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x180++0x13 line.long 0x0 "EICHD2_WORD0,Error Injection Channel Descriptor 2. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD2_WORD1,Error Injection Channel Descriptor 2. Word1" hexmask.long.byte 0x4 0.--7. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD2_WORD2,Error Injection Channel Descriptor 2. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD2_WORD3,Error Injection Channel Descriptor 2. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD2_WORD4,Error Injection Channel Descriptor 2. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x1C0++0x13 line.long 0x0 "EICHD3_WORD0,Error Injection Channel Descriptor 3. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD3_WORD1,Error Injection Channel Descriptor 3. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD3_WORD2,Error Injection Channel Descriptor 3. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD3_WORD3,Error Injection Channel Descriptor 3. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD3_WORD4,Error Injection Channel Descriptor 3. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x200++0x13 line.long 0x0 "EICHD4_WORD0,Error Injection Channel Descriptor 4. Word0" hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD4_WORD1,Error Injection Channel Descriptor 4. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD4_WORD2,Error Injection Channel Descriptor 4. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0xC "EICHD4_WORD3,Error Injection Channel Descriptor 4. Word3" hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0x10 "EICHD4_WORD4,Error Injection Channel Descriptor 4. Word4" hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" group.long 0x380++0xB line.long 0x0 "EICHD10_WORD0,Error Injection Channel Descriptor 10. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD10_WORD1,Error Injection Channel Descriptor 10. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD10_WORD2,Error Injection Channel Descriptor 10. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x3C0++0x7 line.long 0x0 "EICHD11_WORD0,Error Injection Channel Descriptor 11. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD11_WORD1,Error Injection Channel Descriptor 11. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x400++0x7 line.long 0x0 "EICHD12_WORD0,Error Injection Channel Descriptor 12. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD12_WORD1,Error Injection Channel Descriptor 12. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x504++0x3 line.long 0x0 "EICHD16_WORD1,Error Injection Channel Descriptor 16. Word1" hexmask.long 0x0 0.--29. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x544++0x7 line.long 0x0 "EICHD17_WORD1,Error Injection Channel Descriptor 17. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD17_WORD2,Error Injection Channel Descriptor 17. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" tree.end tree "EIM_2" base ad:0x40514000 group.long 0x0++0x7 line.long 0x0 "EIMCR,Error Injection Module Configuration Register" bitfld.long 0x0 0. "GEIEN,Global Error Injection Enable" "0: Disabled,1: Enabled" line.long 0x4 "EICHEN,Error Injection Channel Enable register" bitfld.long 0x4 31. "EICH0EN,Error Injection Channel 0 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 28. "EICH3EN,Error Injection Channel 3 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 27. "EICH4EN,Error Injection Channel 4 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 26. "EICH5EN,Error Injection Channel 5 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 25. "EICH6EN,Error Injection Channel 6 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 24. "EICH7EN,Error Injection Channel 7 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 23. "EICH8EN,Error Injection Channel 8 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 22. "EICH9EN,Error Injection Channel 9 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 21. "EICH10EN,Error Injection Channel 10 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 20. "EICH11EN,Error Injection Channel 11 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 19. "EICH12EN,Error Injection Channel 12 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 18. "EICH13EN,Error Injection Channel 13 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 17. "EICH14EN,Error Injection Channel 14 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 16. "EICH15EN,Error Injection Channel 15 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 15. "EICH16EN,Error Injection Channel 16 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 14. "EICH17EN,Error Injection Channel 17 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 13. "EICH18EN,Error Injection Channel 18 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 10. "EICH21EN,Error Injection Channel 21 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 9. "EICH22EN,Error Injection Channel 22 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 8. "EICH23EN,Error Injection Channel 23 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 7. "EICH24EN,Error Injection Channel 24 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 6. "EICH25EN,Error Injection Channel 25 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 5. "EICH26EN,Error Injection Channel 26 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 4. "EICH27EN,Error Injection Channel 27 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 3. "EICH28EN,Error Injection Channel 28 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 2. "EICH29EN,Error Injection Channel 29 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." bitfld.long 0x4 1. "EICH30EN,Error Injection Channel 30 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline bitfld.long 0x4 0. "EICH31EN,Error Injection Channel 31 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." group.long 0x100++0xB line.long 0x0 "EICHD0_WORD0,Error Injection Channel Descriptor 0. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD0_WORD1,Error Injection Channel Descriptor 0. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD0_WORD2,Error Injection Channel Descriptor 0. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x140++0xB line.long 0x0 "EICHD1_WORD0,Error Injection Channel Descriptor 1. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD1_WORD1,Error Injection Channel Descriptor 1. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD1_WORD2,Error Injection Channel Descriptor 1. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x1C0++0xB line.long 0x0 "EICHD3_WORD0,Error Injection Channel Descriptor 3. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD3_WORD1,Error Injection Channel Descriptor 3. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD3_WORD2,Error Injection Channel Descriptor 3. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x200++0xB line.long 0x0 "EICHD4_WORD0,Error Injection Channel Descriptor 4. Word0" hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD4_WORD1,Error Injection Channel Descriptor 4. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x8 "EICHD4_WORD2,Error Injection Channel Descriptor 4. Word2" hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x244++0x17 line.long 0x0 "EICHD5_WORD1,Error Injection Channel Descriptor 5. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD5_WORD2,Error Injection Channel Descriptor 5. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0x8 "EICHD5_WORD3,Error Injection Channel Descriptor 5. Word3" hexmask.long 0x8 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0xC "EICHD5_WORD4,Error Injection Channel Descriptor 5. Word4" hexmask.long 0xC 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" line.long 0x10 "EICHD5_WORD5,Error Injection Channel Descriptor 5. Word5" hexmask.long 0x10 0.--31. 1. "B16_19DATA_MASK,Data Mask Bytes 16-19" line.long 0x14 "EICHD5_WORD6,Error Injection Channel Descriptor 5. Word6" hexmask.long 0x14 0.--31. 1. "B20_23DATA_MASK,Data Mask Bytes 20-23" group.long 0x284++0x17 line.long 0x0 "EICHD6_WORD1,Error Injection Channel Descriptor 6. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD6_WORD2,Error Injection Channel Descriptor 6. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0x8 "EICHD6_WORD3,Error Injection Channel Descriptor 6. Word3" hexmask.long 0x8 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0xC "EICHD6_WORD4,Error Injection Channel Descriptor 6. Word4" hexmask.long 0xC 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" line.long 0x10 "EICHD6_WORD5,Error Injection Channel Descriptor 6. Word5" hexmask.long 0x10 0.--31. 1. "B16_19DATA_MASK,Data Mask Bytes 16-19" line.long 0x14 "EICHD6_WORD6,Error Injection Channel Descriptor 6. Word6" hexmask.long 0x14 0.--31. 1. "B20_23DATA_MASK,Data Mask Bytes 20-23" group.long 0x2C4++0x7 line.long 0x0 "EICHD7_WORD1,Error Injection Channel Descriptor 7. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD7_WORD2,Error Injection Channel Descriptor 7. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x304++0x7 line.long 0x0 "EICHD8_WORD1,Error Injection Channel Descriptor 8. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD8_WORD2,Error Injection Channel Descriptor 8. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x344++0x7 line.long 0x0 "EICHD9_WORD1,Error Injection Channel Descriptor 9. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD9_WORD2,Error Injection Channel Descriptor 9. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x384++0x7 line.long 0x0 "EICHD10_WORD1,Error Injection Channel Descriptor 10. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD10_WORD2,Error Injection Channel Descriptor 10. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x3C4++0x7 line.long 0x0 "EICHD11_WORD1,Error Injection Channel Descriptor 11. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD11_WORD2,Error Injection Channel Descriptor 11. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x404++0x7 line.long 0x0 "EICHD12_WORD1,Error Injection Channel Descriptor 12. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD12_WORD2,Error Injection Channel Descriptor 12. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x444++0x7 line.long 0x0 "EICHD13_WORD1,Error Injection Channel Descriptor 13. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD13_WORD2,Error Injection Channel Descriptor 13. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x484++0x7 line.long 0x0 "EICHD14_WORD1,Error Injection Channel Descriptor 14. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD14_WORD2,Error Injection Channel Descriptor 14. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x4C4++0x7 line.long 0x0 "EICHD15_WORD1,Error Injection Channel Descriptor 15. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD15_WORD2,Error Injection Channel Descriptor 15. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x504++0x7 line.long 0x0 "EICHD16_WORD1,Error Injection Channel Descriptor 16. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD16_WORD2,Error Injection Channel Descriptor 16. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x544++0x7 line.long 0x0 "EICHD17_WORD1,Error Injection Channel Descriptor 17. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD17_WORD2,Error Injection Channel Descriptor 17. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x584++0x7 line.long 0x0 "EICHD18_WORD1,Error Injection Channel Descriptor 18. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD18_WORD2,Error Injection Channel Descriptor 18. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" group.long 0x644++0x3 line.long 0x0 "EICHD21_WORD1,Error Injection Channel Descriptor 21. Word1" hexmask.long.byte 0x0 0.--7. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x684++0x17 line.long 0x0 "EICHD22_WORD1,Error Injection Channel Descriptor 22. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" line.long 0x4 "EICHD22_WORD2,Error Injection Channel Descriptor 22. Word2" hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7" line.long 0x8 "EICHD22_WORD3,Error Injection Channel Descriptor 22. Word3" hexmask.long 0x8 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11" line.long 0xC "EICHD22_WORD4,Error Injection Channel Descriptor 22. Word4" hexmask.long 0xC 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15" line.long 0x10 "EICHD22_WORD5,Error Injection Channel Descriptor 22. Word5" hexmask.long 0x10 0.--31. 1. "B16_19DATA_MASK,Data Mask Bytes 16-19" line.long 0x14 "EICHD22_WORD6,Error Injection Channel Descriptor 22. Word6" hexmask.long 0x14 0.--31. 1. "B20_23DATA_MASK,Data Mask Bytes 20-23" group.long 0x6C0++0x7 line.long 0x0 "EICHD23_WORD0,Error Injection Channel Descriptor 23. Word0" hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD23_WORD1,Error Injection Channel Descriptor 23. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x700++0x7 line.long 0x0 "EICHD24_WORD0,Error Injection Channel Descriptor 24. Word0" hexmask.long.byte 0x0 26.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD24_WORD1,Error Injection Channel Descriptor 24. Word1" hexmask.long.word 0x4 0.--15. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x740++0x7 line.long 0x0 "EICHD25_WORD0,Error Injection Channel Descriptor 25. Word0" hexmask.long.byte 0x0 26.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD25_WORD1,Error Injection Channel Descriptor 25. Word1" hexmask.long.word 0x4 0.--15. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x784++0x3 line.long 0x0 "EICHD26_WORD1,Error Injection Channel Descriptor 26. Word1" hexmask.long.word 0x0 0.--9. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x7C4++0x3 line.long 0x0 "EICHD27_WORD1,Error Injection Channel Descriptor 27. Word1" hexmask.long.byte 0x0 0.--3. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x804++0x3 line.long 0x0 "EICHD28_WORD1,Error Injection Channel Descriptor 28. Word1" hexmask.long.byte 0x0 0.--7. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x844++0x3 line.long 0x0 "EICHD29_WORD1,Error Injection Channel Descriptor 29. Word1" hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x884++0x3 line.long 0x0 "EICHD30_WORD1,Error Injection Channel Descriptor 30. Word1" hexmask.long.tbyte 0x0 0.--17. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" group.long 0x8C4++0x3 line.long 0x0 "EICHD31_WORD1,Error Injection Channel Descriptor 31. Word1" hexmask.long.tbyte 0x0 0.--17. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" tree.end tree.end tree "EMAC (Ethernet Media Access Controller)" base ad:0x40480000 group.long 0x0++0x17 line.long 0x0 "MAC_Configuration,MAC Configuration" bitfld.long 0x0 28.--30. "SARC,Source Address Insertion Or Replacement Control" "0: mti_sa_ctrl_i and ati_sa_ctrl_i input signals..,?,2: Contents of are inserted in the SA field,3: Contents of replace the SA field,?,?,6: Contents of are inserted in the SA field,7: Contents of replace the SA field" newline bitfld.long 0x0 27. "IPC,Checksum Offload" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24.--26. "IPG,Inter-Packet Gap" "0: 96-bit times IPG,1: 88-bit times IPG,2: 80-bit times IPG,3: 72-bit times IPG,4: 64-bit times IPG,5: 56-bit times IPG,6: 48-bit times IPG,7: 40-bit times IPG" newline bitfld.long 0x0 23. "GPSLCE,Giant Packet Size Limit Control Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 22. "S2KP,IEEE 802.3 Support For 2K Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "CST,CRC Stripping For Type Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "ACS,Automatic Pad Or CRC Stripping" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "WD,Watchdog Disable" "0: Enabled,1: Disabled" newline bitfld.long 0x0 17. "JD,Jabber Disable" "0: Enabled,1: Disabled" newline bitfld.long 0x0 16. "JE,Jumbo Packet Enable" "0: Disabled,1: Enabled" newline rbitfld.long 0x0 15. "PS,Port Select" "0: For 1000 or 2500 Mbit/s operations,1: For 10 or 100 Mbit/s operations" newline bitfld.long 0x0 14. "FES,Speed" "0: 10 Mbit/s if PS = 1 and 1 Gbps if PS = 0,1: 100 Mbit/s if PS = 1 and 2.5 Gbps if PS = 0" newline bitfld.long 0x0 13. "DM,Duplex Mode" "0: Half-duplex mode,1: Full-duplex mode" newline bitfld.long 0x0 12. "LM,Loopback Mode" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "ECRSFD,Enable Carrier Sense In Full-Duplex Mode" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "DO,Disable Receive Own" "0: Enabled,1: Disabled" newline bitfld.long 0x0 9. "DCRS,Disable Carrier Sense During Transmission" "0: Enabled,1: Disabled" newline bitfld.long 0x0 8. "DR,Disable Retry" "0: Enabled,1: Disabled" newline bitfld.long 0x0 5.--6. "BL,Back-Off Limit" "0: k = min(n 10),1: k = min(n 8),2: k = min(n 4),3: k = min(n 1)" newline bitfld.long 0x0 4. "DC,Deferral Check" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2.--3. "PRELEN,Preamble Length for Transmit Packets" "0: 7 bytes,1: 5 bytes,2: 3 bytes,?" newline bitfld.long 0x0 1. "TE,Transmitter Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "RE,Receiver Enable" "0: Disabled,1: Enabled" line.long 0x4 "MAC_Ext_Configuration,MAC Extended Configuration" hexmask.long.byte 0x4 25.--29. 1. "EIPG,Extended Inter-Packet Gap" newline bitfld.long 0x4 24. "EIPGEN,Extended Inter-Packet Gap Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 19. "PDC,Packet Duplication Control" "0: Disabled,1: Enabled" newline bitfld.long 0x4 18. "USP,Unicast Slow Protocol Packet Detect" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "SPEN,Slow Protocol Detection Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 16. "DCRCC,Disable CRC Checking For Received Packets" "0: Enabled,1: Disabled" newline hexmask.long.word 0x4 0.--13. 1. "GPSL,Giant Packet Size Limit" line.long 0x8 "MAC_Packet_Filter,MAC Packet Filter" bitfld.long 0x8 31. "RA,Receive All" "0: Receive All is disabled,1: Receive All is enabled" newline bitfld.long 0x8 21. "DNTU,Drop Non-TCP/UDP Over IP Packets" "0: Forwards,1: Drops" newline bitfld.long 0x8 20. "IPFE,Layer 3 and Layer 4 Filter Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 16. "VTFE,VLAN Tag Filter Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 10. "HPF,Hash Or Perfect Filter" "0: Disabled,1: Enabled" newline bitfld.long 0x8 9. "SAF,Source Address Filter Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 8. "SAIF,SA Inverse Filtering" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6.--7. "PCF,Pass Control Packets" "0: MAC filters all the control packets from..,1: MAC forwards all the control packets except..,2: MAC forwards all the control packets to the..,3: MAC forwards all the control packets that pass.." newline bitfld.long 0x8 5. "DBF,Disable Broadcast Packets" "0: Enabled,1: Disabled" newline bitfld.long 0x8 4. "PM,Pass All Multicast" "0: Disabled,1: Enabled" newline bitfld.long 0x8 3. "DAIF,DA Inverse Filtering" "0: Disabled,1: Enabled" newline bitfld.long 0x8 2. "HMC,Hash Multicast" "0: Disabled,1: Enabled" newline bitfld.long 0x8 1. "HUC,Hash Unicast" "0: Disabled,1: Enabled" newline bitfld.long 0x8 0. "PR,Promiscuous Mode" "0: Disabled,1: Enabled" line.long 0xC "MAC_Watchdog_Timeout,MAC Watchdog Timeout" bitfld.long 0xC 8. "PWE,Programmable Watchdog Enable" "0: Disabled,1: Enabled" newline hexmask.long.byte 0xC 0.--3. 1. "WTO,Watchdog Timeout" line.long 0x10 "MAC_Hash_Table_Reg0,MAC Hash Table First 32 Bits" hexmask.long 0x10 0.--31. 1. "HT31T0,MAC Hash Table First 32 Bits" line.long 0x14 "MAC_Hash_Table_Reg1,MAC Hash Table Second 32 Bits" hexmask.long 0x14 0.--31. 1. "HT63T32,MAC Hash Table Second 32 Bits" group.long 0x50++0x3 line.long 0x0 "MAC_VLAN_Tag,MAC VLAN Tag" bitfld.long 0x0 31. "EIVLRXS,Enable Inner VLAN Tag In Receive Status" "0: Disabled,1: Enabled" newline bitfld.long 0x0 28.--29. "EIVLS,Enable Inner VLAN Tag Stripping" "0: Do not strip,1: Strip if VLAN filter passes,2: Strip if VLAN filter fails,3: Always strip" newline bitfld.long 0x0 27. "ERIVLT,Enable Inner VLAN Tag Comparison" "0: Disabled,1: Enabled" newline bitfld.long 0x0 26. "EDVLP,Enable Double VLAN Processing" "0: Disabled,1: Enabled" newline bitfld.long 0x0 25. "VTHM,VLAN Tag Hash Table Match" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "EVLRXS,Enable VLAN Tag In Receive Status" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21.--22. "EVLS,Enable VLAN Tag Stripping" "0: Do not strip,1: Strip if VLAN filter passes,2: Strip if VLAN filter fails,3: Always strip" newline bitfld.long 0x0 20. "DOVLTC,Disable VLAN Type Check" "0: Enabled,1: Disabled" newline bitfld.long 0x0 19. "ERSVLM,Enable Receive S-VLAN Match" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "ESVL,Enable S-VLAN" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "VTIM,VLAN Tag Inverse Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "ETV,Enable Tag For VLAN" "0: Disabled,1: Enabled" newline hexmask.long.word 0x0 0.--15. 1. "VL,VLAN Tag Identifier for Receive Packets" group.long 0x50++0x7 line.long 0x0 "MAC_VLAN_Tag_Ctrl,MAC VLAN Tag Control" bitfld.long 0x0 31. "EIVLRXS,Enable Inner VLAN Tag In Receive Status" "0: Disabled,1: Enabled" newline bitfld.long 0x0 28.--29. "EIVLS,Enable Inner VLAN Tag Stripping" "0: Do not strip,1: Strip if VLAN filter passes,2: Strip if VLAN filter fails,3: Always strip" newline bitfld.long 0x0 27. "ERIVLT,Enable Inner VLAN Tag Comparison" "0: Disabled,1: Enabled" newline bitfld.long 0x0 26. "EDVLP,Enable Double VLAN Processing" "0: Disabled,1: Enabled" newline bitfld.long 0x0 25. "VTHM,VLAN Tag Hash Table Match" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "EVLRXS,Enable VLAN Tag In Receive Status" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21.--22. "EVLS,Enable VLAN Tag Stripping" "0: Do not strip,1: Strip if VLAN filter passes,2: Strip if VLAN filter fails,3: Always strip" newline bitfld.long 0x0 20. "DOVLTC,Disable VLAN Type Check" "0: Enabled,1: Disabled" newline bitfld.long 0x0 19. "ERSVLM,Enable Receive S-VLAN Match" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "ESVL,Enable S-VLAN" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "VTIM,VLAN Tag Inverse Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "ETV,Enable Tag For VLAN" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2.--3. "OFS,Offset" "0,1,2,3" newline bitfld.long 0x0 1. "CT,Command Type" "0: Write operation,1: Read operation" newline bitfld.long 0x0 0. "OB,Operation Busy" "0: Disabled,1: Enabled" line.long 0x4 "MAC_VLAN_Tag_Data,MAC VLAN Tag Data" bitfld.long 0x4 25. "DMACHN,DMA Channel Number" "0,1" newline bitfld.long 0x4 24. "DMACHEN,DMA Channel Number Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 20. "ERIVLT,Enable Inner VLAN Tag" "0: Disabled,1: Enabled" newline bitfld.long 0x4 19. "ERSVLM,Enable S-VLAN Match" "0: Disabled,1: Enabled" newline bitfld.long 0x4 18. "DOVLTC,Disable VLAN Type Comparison" "0: Enabled,1: Disabled" newline bitfld.long 0x4 17. "ETV,VLAN Comparison" "0: 16-bit VLAN comparison,1: 12-bit VLAN comparison" newline bitfld.long 0x4 16. "VEN,VLAN Tag Enable" "0: Disabled,1: Enabled" newline hexmask.long.word 0x4 0.--15. 1. "VID,VLAN Tag ID" group.long 0x54++0x3 line.long 0x0 "MAC_VLAN_Tag_Filter0,MAC VLAN Tag Filter 0" bitfld.long 0x0 25. "DMACHN,DMA Channel Number" "0,1" newline bitfld.long 0x0 24. "DMACHEN,DMA Channel Number Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "ERIVLT,Enable Inner VLAN Tag" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "ERSVLM,Enable S-VLAN Match" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "DOVLTC,Disable VLAN Type Comparison" "0: Enabled,1: Disabled" newline bitfld.long 0x0 17. "ETV,VLAN Comparison" "0: 16-bit VLAN comparison,1: 12-bit VLAN comparison" newline bitfld.long 0x0 16. "VEN,VLAN Tag Enable" "0: Disabled,1: Enabled" newline hexmask.long.word 0x0 0.--15. 1. "VID,VLAN Tag ID" group.long 0x54++0x3 line.long 0x0 "MAC_VLAN_Tag_Filter1,MAC VLAN Tag Filter 1" bitfld.long 0x0 25. "DMACHN,DMA Channel Number" "0,1" newline bitfld.long 0x0 24. "DMACHEN,DMA Channel Number Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "ERIVLT,Enable Inner VLAN Tag" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "ERSVLM,Enable S-VLAN Match" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "DOVLTC,Disable VLAN Type Comparison" "0: Enabled,1: Disabled" newline bitfld.long 0x0 17. "ETV,VLAN Comparison" "0: 16-bit VLAN comparison,1: 12-bit VLAN comparison" newline bitfld.long 0x0 16. "VEN,VLAN Tag Enable" "0: Disabled,1: Enabled" newline hexmask.long.word 0x0 0.--15. 1. "VID,VLAN Tag ID" group.long 0x54++0x3 line.long 0x0 "MAC_VLAN_Tag_Filter2,MAC VLAN Tag Filter 2" bitfld.long 0x0 25. "DMACHN,DMA Channel Number" "0,1" newline bitfld.long 0x0 24. "DMACHEN,DMA Channel Number Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "ERIVLT,Enable Inner VLAN Tag" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "ERSVLM,Enable S-VLAN Match" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "DOVLTC,Disable VLAN Type Comparison" "0: Enabled,1: Disabled" newline bitfld.long 0x0 17. "ETV,VLAN Comparison" "0: 16-bit VLAN comparison,1: 12-bit VLAN comparison" newline bitfld.long 0x0 16. "VEN,VLAN Tag Enable" "0: Disabled,1: Enabled" newline hexmask.long.word 0x0 0.--15. 1. "VID,VLAN Tag ID" group.long 0x54++0x7 line.long 0x0 "MAC_VLAN_Tag_Filter3,MAC VLAN Tag Filter 3" bitfld.long 0x0 25. "DMACHN,DMA Channel Number" "0,1" newline bitfld.long 0x0 24. "DMACHEN,DMA Channel Number Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "ERIVLT,Enable Inner VLAN Tag" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "ERSVLM,Enable S-VLAN Match" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "DOVLTC,Disable VLAN Type Comparison" "0: Enabled,1: Disabled" newline bitfld.long 0x0 17. "ETV,VLAN Comparison" "0: 16-bit VLAN comparison,1: 12-bit VLAN comparison" newline bitfld.long 0x0 16. "VEN,VLAN Tag Enable" "0: Disabled,1: Enabled" newline hexmask.long.word 0x0 0.--15. 1. "VID,VLAN Tag ID" line.long 0x4 "MAC_VLAN_Hash_Table,MAC VLAN Hash Table" hexmask.long.word 0x4 0.--15. 1. "VLHT,VLAN Hash Table" group.long 0x60++0x3 line.long 0x0 "MAC_VLAN_Incl,MAC VLAN Inclusion Or Replacement" rbitfld.long 0x0 31. "BUSY,Busy" "0: Busy status not detected,1: Busy status detected" newline bitfld.long 0x0 30. "RDWR,Read Write Control" "0: Read operation of indirect access,1: Write operation of indirect access" newline bitfld.long 0x0 24. "ADDR,Address" "0,1" newline bitfld.long 0x0 21. "CBTI,Channel-Based Tag Insertion" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "VLTI,VLAN Tag Input" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "CSVL,C-VLAN Or S-VLAN" "0: C-VLAN,1: S-VLAN" newline bitfld.long 0x0 18. "VLP,VLAN Priority Control" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16.--17. "VLC,VLAN Tag Control" "0: No VLAN tag deletion insertion or replacement,1: VLAN tag deletion,2: VLAN tag insertion,3: VLAN tag replacement" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag For Transmit Packets" group.long 0x60++0x3 line.long 0x0 "MAC_VLAN_Incl0,MAC VLAN Inclusion 0" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN type (0x8100) is inserted,1: S-VLAN type (0x88A8) is inserted" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x3 line.long 0x0 "MAC_VLAN_Incl1,MAC VLAN Inclusion 1" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN type (0x8100) is inserted,1: S-VLAN type (0x88A8) is inserted" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x3 line.long 0x0 "MAC_VLAN_Incl2,MAC VLAN Inclusion 2" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN type (0x8100) is inserted,1: S-VLAN type (0x88A8) is inserted" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x3 line.long 0x0 "MAC_VLAN_Incl3,MAC VLAN Inclusion 3" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN type (0x8100) is inserted,1: S-VLAN type (0x88A8) is inserted" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x3 line.long 0x0 "MAC_VLAN_Incl4,MAC VLAN Inclusion 4" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN type (0x8100) is inserted,1: S-VLAN type (0x88A8) is inserted" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x3 line.long 0x0 "MAC_VLAN_Incl5,MAC VLAN Inclusion 5" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN type (0x8100) is inserted,1: S-VLAN type (0x88A8) is inserted" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x3 line.long 0x0 "MAC_VLAN_Incl6,MAC VLAN Inclusion 6" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN type (0x8100) is inserted,1: S-VLAN type (0x88A8) is inserted" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x7 line.long 0x0 "MAC_VLAN_Incl7,MAC VLAN Inclusion 7" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN type (0x8100) is inserted,1: S-VLAN type (0x88A8) is inserted" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" line.long 0x4 "MAC_Inner_VLAN_Incl,Inner VLAN Tag Inclusion Or Replacement" bitfld.long 0x4 20. "VLTI,VLAN Tag Input" "0: Disabled,1: Enabled" newline bitfld.long 0x4 19. "CSVL,C-VLAN Or S-VLAN" "0: C-VLAN type (8100h),1: S-VLAN type (88A8h)" newline bitfld.long 0x4 18. "VLP,VLAN Priority Control" "0: Disabled,1: Enabled" newline bitfld.long 0x4 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "0: No VLAN tag deletion insertion or replacement,1: VLAN tag deletion,2: VLAN tag insertion,3: VLAN tag replacement" newline hexmask.long.word 0x4 0.--15. 1. "VLT,VLAN Tag For Transmit Packets" group.long 0x70++0x3 line.long 0x0 "MAC_Q0_Tx_Flow_Ctrl,MAC Q0 Tx Flow Control" hexmask.long.word 0x0 16.--31. 1. "PT,Pause Time" newline bitfld.long 0x0 7. "DZPQ,Disable Zero-Quanta Pause" "0: Enabled,1: Disabled" newline bitfld.long 0x0 4.--6. "PLT,Pause Low Threshold" "0: Pause time minus 4 slot times (PT is 4 slot times),1: Pause time minus 28 slot times (PT is 28 slot..,2: Pause time minus 36 slot times (PT is 36 slot..,3: Pause time minus 144 slot times (PT is 144 slot..,4: Pause time minus 256 slot times (PT is 256 slot..,5: Pause time minus 512 slot times (PT is 512 slot..,?,?" newline bitfld.long 0x0 1. "TFE,Transmit Flow Control Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "FCB_BPA,Flow Control Busy Or Backpressure Activate" "0: Flow control busy or backpressure activate is..,1: Flow control busy or backpressure activate is.." group.long 0x90++0x7 line.long 0x0 "MAC_Rx_Flow_Ctrl,MAC Receive Flow Control" bitfld.long 0x0 1. "UP,Unicast Pause Packet Detect" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "RFE,Receive Flow Control Enable" "0: Disabled,1: Enabled" line.long 0x4 "MAC_RxQ_Ctrl4,MAC RxQ Control 4" bitfld.long 0x4 17. "VFFQ,VLAN Tag Filter Fail Packets Queue" "0,1" newline bitfld.long 0x4 16. "VFFQE,VLAN Tag Filter Fail Packets Queuing Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 9. "MFFQ,Multicast Address Filter Fail Packets Queue" "0,1" newline bitfld.long 0x4 8. "MFFQE,Multicast Address Filter Fail Packets Queuing Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 1. "UFFQ,Unicast Address Filter Fail Packets Queue" "0,1" newline bitfld.long 0x4 0. "UFFQE,Unicast Address Filter Fail Packets Queuing Enable" "0: Disabled,1: Enabled" group.long 0xA0++0xB line.long 0x0 "MAC_RxQ_Ctrl0,MAC RxQ Control 0" bitfld.long 0x0 2.--3. "RXQ1EN,Receive Queue 1 Enable" "0: Queue not enabled,1: Queue enabled for AV,2: Queue enabled for DCB/generic,?" newline bitfld.long 0x0 0.--1. "RXQ0EN,Receive Queue 0 Enable" "0: Queue not enabled,1: Queue enabled for AV,2: Queue enabled for DCB/generic,?" line.long 0x4 "MAC_RxQ_Ctrl1,Receive Queue Control 1" bitfld.long 0x4 24.--26. "FPRQ,Frame Preemption Residue Queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 22.--23. "TPQC,Tagged PTP Over Ethernet Packets Queuing Control" "0,1,2,3" newline bitfld.long 0x4 21. "TACPQE,Tagged AV Control Packets Queuing Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 20. "MCBCQEN,Multicast And Broadcast Queue Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 16.--18. "MCBCQ,Multicast And Broadcast Queue" "0: Receive queue 0,1: Receive queue 1,2: Receive queue 2,3: Receive queue 3,4: Receive queue 4,5: Receive queue 5,6: Receive queue 6,7: Receive queue 7" newline bitfld.long 0x4 12.--14. "UPQ,Untagged Packet Queue" "0: Receive queue 0,1: Receive queue 1,2: Receive queue 2,3: Receive queue 3,4: Receive queue 4,5: Receive queue 5,6: Receive queue 6,7: Receive queue 7" newline bitfld.long 0x4 4.--6. "PTPQ,PTP Packets Queue" "0: Receive queue 0,1: Receive queue 1,2: Receive queue 2,3: Receive queue 3,4: Receive queue 4,5: Receive queue 5,6: Receive queue 6,7: Receive queue 7" newline bitfld.long 0x4 0.--2. "AVCPQ,AV Untagged Control Packets Queue" "0: Receive queue 0,1: Receive queue 1,2: Receive queue 2,3: Receive queue 3,4: Receive queue 4,5: Receive queue 5,6: Receive queue 6,7: Receive queue 7" line.long 0x8 "MAC_RxQ_Ctrl2,MAC RxQ Control 2" hexmask.long.byte 0x8 8.--15. 1. "PSRQ1,Priorities Selected In Receive Queue 1" newline hexmask.long.byte 0x8 0.--7. 1. "PSRQ0,Priorities Selected In Receive Queue 0" rgroup.long 0xB0++0x3 line.long 0x0 "MAC_Interrupt_Status,MAC Interrupt Status" bitfld.long 0x0 20. "MFRIS,MMC FPE Receive Interrupt Status" "0: Inactive,1: Active" newline bitfld.long 0x0 19. "MFTIS,MMC FPE Transmit Interrupt Status" "0: Inactive,1: Active" newline bitfld.long 0x0 18. "MDIOIS,MDIO Interrupt Status" "0: Inactive,1: Active" newline bitfld.long 0x0 17. "FPEIS,Frame Preemption Interrupt Status" "0: Inactive,1: Ative" newline bitfld.long 0x0 14. "RXSTSIS,Receive Status Interrupt" "0: Inactive,1: Active" newline bitfld.long 0x0 13. "TXSTSIS,Transmit Status Interrupt" "0: Inactive,1: Active" newline bitfld.long 0x0 12. "TSIS,Timestamp Interrupt Status" "0: Inactive,1: Active" newline bitfld.long 0x0 10. "MMCTXIS,MMC Transmit Interrupt Status" "0: Inactive,1: Active" newline bitfld.long 0x0 9. "MMCRXIS,MMC Receive Interrupt Status" "0: Inactive,1: Active" newline bitfld.long 0x0 8. "MMCIS,MMC Interrupt Status" "0: Inactive,1: Active" newline bitfld.long 0x0 3. "PHYIS,PHY Interrupt" "0: Not detected,1: Detected" group.long 0xB4++0x3 line.long 0x0 "MAC_Interrupt_Enable,MAC Interrupt Enable" bitfld.long 0x0 18. "MDIOIE,MDIO Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "FPEIE,Frame Preemption Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "RXSTSIE,Receive Status Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "TXSTSIE,Transmit Status Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "TSIE,Timestamp Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "PHYIE,PHY Interrupt Enable" "0: Disabled,1: Enabled" rgroup.long 0xB8++0x3 line.long 0x0 "MAC_Rx_Tx_Status,MAC Rx Transmit Status" bitfld.long 0x0 8. "RWT,Receive Watchdog Timeout" "0: No receive watchdog timed out,1: Receive watchdog timed out" newline bitfld.long 0x0 5. "EXCOL,Excessive Collisions" "0: No collision,1: Excessive collision is sensed" newline bitfld.long 0x0 4. "LCOL,Late Collision" "0: No collision,1: Late collision is sensed" newline bitfld.long 0x0 3. "EXDEF,Excessive Deferral" "0: No excessive deferral,1: Excessive deferral" newline bitfld.long 0x0 2. "LCARR,Loss of Carrier" "0: Carrier is present,1: Loss of carrier" newline bitfld.long 0x0 1. "NCARR,No Carrier" "0: Present,1: Absent" newline bitfld.long 0x0 0. "TJT,Transmit Jabber Timeout" "0: No transmit jabber timeout occurred,1: Transmit jabber timeout occurred" rgroup.long 0x110++0x7 line.long 0x0 "MAC_Version,MAC Version" hexmask.long.byte 0x0 8.--15. 1. "CFGVER,IP Configuration Version" newline hexmask.long.byte 0x0 0.--7. 1. "IPVER,IP Version" line.long 0x4 "MAC_Debug,MAC Debug" bitfld.long 0x4 17.--18. "TFCSTS,MAC Transmit Packet Controller Status" "0: Idle state,1: Waiting for one of these: status of the previous..,2: Generating and transmitting a pause control..,3: Transferring input packet for transmission" newline bitfld.long 0x4 16. "TPESTS,MAC GMII Or MII Transmit Protocol Engine Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 1.--2. "RFCFCSTS,MAC Receive Packet Controller FIFO Status" "0: Inactive,1: Active,?,?" newline bitfld.long 0x4 0. "RPESTS,Receive Protocol Engine Status" "0: Not detected,1: Detected" rgroup.long 0x11C++0xF line.long 0x0 "MAC_HW_Feature0,MAC Hardware Feature 0" bitfld.long 0x0 28.--30. "ACTPHYSEL,Active PHY Feature" "0: GMII or MII,1: RGMII,2: SGMII,3: TBI,4: RMII,5: RTBI,6: SMII,7: RevMII" newline bitfld.long 0x0 27. "SAVLANINS,SA or VLAN Insertion Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 25.--26. "TSSTSSEL,Timestamp System Time Source Feature" "0: Internal,1: External,2: Both internal and external,?" newline bitfld.long 0x0 24. "MACADR64SEL,MAC Addresses 64-127" "0: Not selected,1: Selected" newline bitfld.long 0x0 23. "MACADR32SEL,MAC Addresses 32-63" "0: Not selected,1: Selected" newline hexmask.long.byte 0x0 18.--22. 1. "ADDMACADRSEL,MAC Addresses 1-31" newline bitfld.long 0x0 16. "RXCOESEL,Receive Checksum Offload Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 14. "TXCOESEL,Transmit Checksum Offload Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 13. "EEESEL,Energy Efficient Ethernet (EEE) Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 12. "TSSEL,IEEE 1588-2008 Timestamp Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 9. "ARPOFFSEL,ARP Offload Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 8. "MMCSEL,MAC Management Counters (MMC) Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 7. "MGKSEL,PMT Magic Packet Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 6. "RWKSEL,PMT Remote Wake-Up Packet Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 5. "SMASEL,SMA (MDIO) Interface Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 4. "VLHASH,VLAN Hash Filter Feature" "0: Not selected,1: Selected" newline bitfld.long 0x0 3. "PCSSEL,PCS Select" "0: No,1: Yes" newline bitfld.long 0x0 2. "HDSEL,Half-Duplex Support Feature" "0: Unavailable,1: Available" newline bitfld.long 0x0 1. "GMIISEL,1000 Mbit/s Support Feature" "0: Unavailable,1: Available" newline bitfld.long 0x0 0. "MIISEL,10 or 100 Mbit/s Support Feature" "0: Unavailable,1: Available" line.long 0x4 "MAC_HW_Feature1,MAC Hardware Feature 1" hexmask.long.byte 0x4 27.--30. 1. "L3L4FNUM,L3 Or L4 Filter Number" newline bitfld.long 0x4 24.--25. "HASHTBLSZ,Hash Table Size" "0: No hash table,1: 64,2: 128,3: 256" newline bitfld.long 0x4 23. "POUOST,One Step For PTP Over UDP/IP Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 21. "RAVSEL,Receive Side-Only AV Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 20. "AVSEL,AV Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 19. "DBGMEMA,DMA Debug Registers Enable Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 18. "TSOEN,TCP Segmentation Offload Enable Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 17. "SPHEN,Split Header Enable Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 16. "DCBEN,DCB Enable Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 14.--15. "ADDR64,Address Width Feature" "0: 32,1: 40,2: 48,?" newline bitfld.long 0x4 13. "ADVTHWORD,IEEE 1588 High-Word Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 12. "PTOEN,PTP Offload Enable Feature" "0: Not selected,1: Selected" newline bitfld.long 0x4 11. "OSTEN,One-Step Timestamping Enable Feature" "0: Not selected,1: Selected" newline hexmask.long.byte 0x4 6.--10. 1. "TXFIFOSIZE,MTL Transmit FIFO Size Feature" newline bitfld.long 0x4 5. "SPRAM,Single Port RAM Feature" "0: Not selected,1: Selected" newline hexmask.long.byte 0x4 0.--4. 1. "RXFIFOSIZE,MTL Receive FIFO Size Feature" line.long 0x8 "MAC_HW_Feature2,MAC Hardware Feature 2" bitfld.long 0x8 28.--30. "AUXSNAPNUM,Number Of Auxiliary Snapshot Inputs" "0: No auxiliary input (0),1: 1,2: 2,3: 3,4: 4,?,?,?" newline bitfld.long 0x8 24.--26. "PPSOUTNUM,Number Of PPS Outputs" "0: No PPS output (0),1: 1,2: 2,3: 3,4: 4,?,?,?" newline hexmask.long.byte 0x8 18.--21. 1. "TXCHCNT,Number Of DMA Transmit Channels" newline hexmask.long.byte 0x8 12.--15. 1. "RXCHCNT,Number Of DMA Receive Channels" newline hexmask.long.byte 0x8 6.--9. 1. "TXQCNT,Number Of MTL Transmit Queues" newline hexmask.long.byte 0x8 0.--3. 1. "RXQCNT,Number Of MTL Receive Queues" line.long 0xC "MAC_HW_Feature3,MAC Hardware Feature 3" bitfld.long 0xC 28.--29. "ASP,Automotive Safety Package" "0: No safety features selected,1: Only 'ECC protection for external memory'..,2: All the safety features are selected without the..,3: All the safety features are selected with the.." newline bitfld.long 0xC 27. "TBSSEL,Time-Based Scheduling Feature" "0: Selected,1: Selected" newline bitfld.long 0xC 26. "FPESEL,Frame Preemption Feature" "0: Not selected,1: Selected" newline bitfld.long 0xC 20.--21. "ESTWID,Estimated Time Interval Width" "0: Width not configured,1: 16 bits,2: 20 bits,3: 24 bits" newline bitfld.long 0xC 17.--19. "ESTDEP,Depth Of Gate Control List" "0: No depth configured,1: 64 bytes,2: 128 bytes,3: 256 bytes,4: 512 bytes,5: 1024 bytes,?,?" newline bitfld.long 0xC 16. "ESTSEL,Enhancements To Scheduling Traffic Feature" "0: Not selected,1: Selected" newline bitfld.long 0xC 13.--14. "FRPES,Flexible Receive Parser Table Entry Size" "0: 64,1: 128,2: 256,?" newline bitfld.long 0xC 11.--12. "FRPBS,Flexible Receive Parser Buffer Size" "0: 64,1: 128,2: 256,?" newline bitfld.long 0xC 10. "FRPSEL,Flexible Receive Parser Feature" "0: Not selected,1: Selected" newline bitfld.long 0xC 9. "PDUPSEL,Broadcast/Multicast Packet Duplication Feature" "0: Not selected,1: Selected" newline bitfld.long 0xC 5. "DVLAN,Double VLAN Tag Processing Feature" "0: Not selected,1: Selected" newline bitfld.long 0xC 4. "CBTISEL,Queue/Channel Based VLAN Tag Insertion On Transmit Feature" "0: Not selected,1: Selected" newline bitfld.long 0xC 0.--2. "NRVF,Number Of Extended VLAN Tag Filters Indicates the number of selected extended VLAN tag filters." "0: No filters (0),1: 4,2: 8,3: 16,4: 24,5: 32,?,?" rgroup.long 0x140++0x3 line.long 0x0 "MAC_DPP_FSM_Interrupt_Status,MAC DPP FSM Interrupt Status" bitfld.long 0x0 24. "FSMPES,FSM State Parity Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 16. "MSTTES,Master Read Or Write Timeout Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 12. "PTES,PTP FSM Timeout Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 11. "ATES,APP FSM Timeout Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 9. "RTES,Receive FSM Timeout Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 8. "TTES,Transmit FSM Timeout Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 5. "ARPES,Application Receive Interface Data Path Parity Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 4. "MTSPES,MTL Transmit Status Data Path Parity Checker Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 3. "MPES,MTL Data Path Parity Checker Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 2. "RDPES,Read Descriptor Parity Checker Error Status" "0: Not detected,1: Detected" group.long 0x148++0xB line.long 0x0 "MAC_FSM_Control,MAC FSM Control" bitfld.long 0x0 28. "PLGRNML,PTP Large Or Normal Mode Select" "0: Normal mode,1: Large mode" newline bitfld.long 0x0 27. "ALGRNML,APP Large Or Normal Mode Select" "0: Normal mode,1: Large mode" newline bitfld.long 0x0 25. "RLGRNML,Receive Large Or Normal Mode Select" "0: Normal mode,1: Large mode" newline bitfld.long 0x0 24. "TLGRNML,Transmit Large Or Normal Mode Select" "0: Normal mode,1: Large mode" newline bitfld.long 0x0 20. "PPEIN,PTP FSM Parity Error Injection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "APEIN,APP FSM Parity Error Injection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "RPEIN,Receive FSM Parity Error Injection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "TPEIN,Transmit FSM Parity Error Injection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "PTEIN,PTP FSM Timeout Error Injection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "ATEIN,APP FSM Timeout Error Injection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "RTEIN,Receive FSM Timeout Error Injection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "TTEIN,Transmit FSM Timeout Error Injection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "PRTYEN,Parity Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "TMOUTEN,Time Out Enable" "0: Disabled,1: Enabled" line.long 0x4 "MAC_FSM_ACT_Timer,MAC FSM ACT Timer" hexmask.long.byte 0x4 20.--23. 1. "LTMRMD,Large Mode Timeout Value" newline hexmask.long.byte 0x4 16.--19. 1. "NTMRMD,Normal Mode Timeout Value" newline hexmask.long.word 0x4 0.--9. 1. "TMR,CSR Clocks For 1 us Tic" line.long 0x8 "SCS_REG1,SCS_REG 1" hexmask.long 0x8 0.--31. 1. "MAC_SCS1,MAC SCS 1" group.long 0x200++0x7 line.long 0x0 "MAC_MDIO_Address,MAC MDIO Address" bitfld.long 0x0 27. "PSE,Preamble Suppression Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 26. "BTB,Back-To-Back Transactions" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x0 21.--25. 1. "PA,Physical Layer Address" newline hexmask.long.byte 0x0 16.--20. 1. "RDA,Register Or Device Address" newline bitfld.long 0x0 12.--14. "NTC,Number Of Trailing Clocks" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 8.--11. 1. "CR,CSR Clock Range" newline bitfld.long 0x0 4. "SKAP,Skip Address Packet" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "GOC_1,GMII Operation Command 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "GOC_0,GMII Operation Command 0" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "C45E,Clause 45 PHY Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "GB,GMII Busy" "0: Disabled,1: Enabled" line.long 0x4 "MAC_MDIO_Data,MAC MDIO Data" hexmask.long.word 0x4 16.--31. 1. "RA,Register Address" newline hexmask.long.word 0x4 0.--15. 1. "GD,GMII Data" group.long 0x230++0x7 line.long 0x0 "MAC_CSR_SW_Ctrl,MAC CSR Software Control" bitfld.long 0x0 8. "SEEN,Slave Error Response Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "RCWE,Enable Register Write 1 To Clear (W1C)" "0: Disabled,1: Enabled" line.long 0x4 "MAC_FPE_CTRL_STS,MAC FPE Control STS" bitfld.long 0x4 19. "TRSP,Transmitted Respond Frame" "0: Not transmitted,1: Transmitted" newline bitfld.long 0x4 18. "TVER,Transmitted Verify Frame" "0: Not transmitted,1: Transmitted" newline bitfld.long 0x4 17. "RRSP,Received Respond Frame" "0: Not received,1: Received" newline bitfld.long 0x4 16. "RVER,Received Verify Frame" "0: Not received,1: Received" newline bitfld.long 0x4 3. "S1_SET_0,S1 SET 0" "0,1" newline bitfld.long 0x4 2. "SRSP,Send Respond mPacket" "0: Disabled,1: Enabled" newline bitfld.long 0x4 1. "SVER,Send Verify mPacket" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0. "EFPE,Enable Transmit Frame Preemption" "0: Disabled,1: Enabled" rgroup.long 0x240++0x3 line.long 0x0 "MAC_Presn_Time_ns,MAC Presentation Time" hexmask.long 0x0 0.--31. 1. "MPTN,MAC 1722 Presentation Time (In Nanoseconds)" group.long 0x244++0x3 line.long 0x0 "MAC_Presn_Time_Updt,MAC Presentation Time Update" hexmask.long 0x0 0.--31. 1. "MPTU,MAC 1722 Presentation Time Update" group.long 0x300++0x17 line.long 0x0 "MAC_Address0_High,MAC Address 0 High" rbitfld.long 0x0 31. "AE,Address Enable" "0: Disabled and invalid (the field's value must..,1: Enabled" newline bitfld.long 0x0 16.--17. "DCS,DMA Channel Select" "0,1,2,3" newline hexmask.long.word 0x0 0.--15. 1. "ADDRHI,MAC Address 0 [47:32]" line.long 0x4 "MAC_Address0_Low,MAC Address 0 Low" hexmask.long 0x4 0.--31. 1. "ADDRLO,MAC Address 0 [31:0]" line.long 0x8 "MAC_Address1_High,MAC Address 1 High" bitfld.long 0x8 31. "AE,Address Enable" "0: Ignored,1: Enabled" newline bitfld.long 0x8 30. "SA,Source Address" "0: Destination address,1: Source address" newline hexmask.long.byte 0x8 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x8 16.--17. "DCS,DMA Channel Select" "0,1,2,3" newline hexmask.long.word 0x8 0.--15. 1. "ADDRHI,MAC Address 1 [47:32]" line.long 0xC "MAC_Address1_Low,MAC Address 1 Low" hexmask.long 0xC 0.--31. 1. "ADDRLO,MAC Address 1 [31:0]" line.long 0x10 "MAC_Address2_High,MAC Address 2 High" bitfld.long 0x10 31. "AE,Address Enable" "0: Ignored,1: Enabled" newline bitfld.long 0x10 30. "SA,Source Address" "0: Destination address,1: Source address" newline hexmask.long.byte 0x10 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x10 16.--17. "DCS,DMA Channel Select" "0,1,2,3" newline hexmask.long.word 0x10 0.--15. 1. "ADDRHI,MAC Address 1 [47:32]" line.long 0x14 "MAC_Address2_Low,MAC Address 2 Low" hexmask.long 0x14 0.--31. 1. "ADDRLO,MAC Address 1 [31:0]" group.long 0x700++0x3 line.long 0x0 "MMC_Control,MMC Control" bitfld.long 0x0 8. "UCDBC,Update MMC Counters For Dropped Broadcast Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "CNTPRSTLVL,Full-Half Preset" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "CNTPRST,Counters Preset" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "CNTFREEZ,MMC Counter Freeze" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "RSTONRD,Reset On Read" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "CNTSTOPRO,Counter Stop Rollover" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "CNTRST,Counters Reset" "0: Counters are not reset,1: All counters are reset" rgroup.long 0x704++0x7 line.long 0x0 "MMC_Rx_Interrupt,MMC Receive Interrupt" bitfld.long 0x0 25. "RXCTRLPIS,MMC Receive Control Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 24. "RXRCVERRPIS,MMC Receive Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 23. "RXWDOGPIS,MMC Receive Watchdog Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 22. "RXVLANGBPIS,MMC Receive VLAN Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 21. "RXFOVPIS,MMC Receive FIFO Overflow Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 20. "RXPAUSPIS,MMC Receive Pause Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 19. "RXORANGEPIS,MMC Receive Out-Of-Range Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 18. "RXLENERPIS,MMC Receive Length Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 17. "RXUCGPIS,MMC Receive Unicast Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 16. "RX1024TMAXOCTGBPIS,MMC Receive 1024 To Maximum Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 15. "RX512T1023OCTGBPIS,MMC Receive 512 To 1023 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 14. "RX256T511OCTGBPIS,MMC Receive 256 To 511 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 13. "RX128T255OCTGBPIS,MMC Receive 128 To 255 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 12. "RX65T127OCTGBPIS,MMC Receive 65 To 127 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 11. "RX64OCTGBPIS,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 10. "RXOSIZEGPIS,MMC Receive Oversize Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 9. "RXUSIZEGPIS,MMC Receive Undersize Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 8. "RXJABERPIS,MMC Receive Jabber Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 7. "RXRUNTPIS,MMC Receive Runt Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 6. "RXALGNERPIS,MMC Receive Alignment Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 5. "RXCRCERPIS,MMC Receive CRC Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 4. "RXMCGPIS,MMC Receive Multicast Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 3. "RXBCGPIS,MMC Receive Broadcast Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 2. "RXGOCTIS,MMC Receive Good Octet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "RXGBOCTIS,MMC Receive Good Bad Octet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "RXGBPKTIS,MMC Receive Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" line.long 0x4 "MMC_Tx_Interrupt,MMC Transmit Interrupt" bitfld.long 0x4 25. "TXOSIZEGPIS,MMC Transmit Oversize Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 24. "TXVLANGPIS,MMC Transmit VLAN Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 23. "TXPAUSPIS,MMC Transmit Pause Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 22. "TXEXDEFPIS,MMC Transmit Excessive Deferral Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 21. "TXGPKTIS,MMC Transmit Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 20. "TXGOCTIS,MMC Transmit Good Octet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 19. "TXCARERPIS,MMC Transmit Carrier Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 18. "TXEXCOLPIS,MMC Transmit Excessive Collision Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 17. "TXLATCOLPIS,MMC Transmit Late Collision Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 16. "TXDEFPIS,MMC Transmit Deferred Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 15. "TXMCOLGPIS,MMC Transmit Multiple Collision Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 14. "TXSCOLGPIS,MMC Transmit Single Collision Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 13. "TXUFLOWERPIS,MMC Transmit Underflow Error Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 12. "TXBCGBPIS,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 11. "TXMCGBPIS,MMC Transmit Multicast Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 10. "TXUCGBPIS,MMC Transmit Unicast Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 9. "TX1024TMAXOCTGBPIS,MMC Transmit 1024 To Maximum Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 8. "TX512T1023OCTGBPIS,MMC Transmit 512 To 1023 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 7. "TX256T511OCTGBPIS,MMC Transmit 256 To 511 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 6. "TX128T255OCTGBPIS,MMC Transmit 128 To 255 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 5. "TX65T127OCTGBPIS,MMC Transmit 65 To 127 Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 4. "TX64OCTGBPIS,MMC Transmit 64-Octet Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 3. "TXMCGPIS,MMC Transmit Multicast Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 2. "TXBCGPIS,MMC Transmit Broadcast Good Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 1. "TXGBPKTIS,MMC Transmit Good Bad Packet Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 0. "TXGBOCTIS,MMC Transmit Good Bad Octet Counter Interrupt Status" "0: Not detected,1: Detected" group.long 0x70C++0x7 line.long 0x0 "MMC_Rx_Interrupt_Mask,MMC Receive Interrupt Mask" bitfld.long 0x0 25. "RXCTRLPIM,MMC Receive Control Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "RXRCVERRPIM,MMC Receive Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 23. "RXWDOGPIM,MMC Receive Watchdog Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 22. "RXVLANGBPIM,MMC Receive VLAN Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "RXFOVPIM,MMC Receive FIFO Overflow Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "RXPAUSPIM,MMC Receive Pause Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "RXORANGEPIM,MMC Receive Out-Of-Range Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "RXLENERPIM,MMC Receive Length Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "RXUCGPIM,MMC Receive Unicast Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "RX1024TMAXOCTGBPIM,MMC Receive 1024 To Maximum Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 15. "RX512T1023OCTGBPIM,MMC Receive 512 To 1023 Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "RX256T511OCTGBPIM,MMC Receive 256 To 511 Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "RX128T255OCTGBPIM,MMC Receive 128 To 255 Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "RX65T127OCTGBPIM,MMC Receive 65 To 127 Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "RX64OCTGBPIM,MMC Receive 64-Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "RXOSIZEGPIM,MMC Receive Oversize Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "RXUSIZEGPIM,MMC Receive Undersize Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "RXJABERPIM,MMC Receive Jabber Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "RXRUNTPIM,MMC Receive Runt Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "RXALGNERPIM,MMC Receive Alignment Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "RXCRCERPIM,MMC Receive CRC Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "RXMCGPIM,MMC Receive Multicast Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "RXBCGPIM,MMC Receive Broadcast Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "RXGOCTIM,MMC Receive Good Octet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "RXGBOCTIM,MMC Receive Good Bad Octet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "RXGBPKTIM,MMC Receive Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" line.long 0x4 "MMC_Tx_Interrupt_Mask,MMC Transmit Interrupt Mask" bitfld.long 0x4 25. "TXOSIZEGPIM,MMC Transmit Oversize Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 24. "TXVLANGPIM,MMC Transmit VLAN Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 23. "TXPAUSPIM,MMC Transmit Pause Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 22. "TXEXDEFPIM,MMC Transmit Excessive Deferral Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 21. "TXGPKTIM,MMC Transmit Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 20. "TXGOCTIM,MMC Transmit Good Octet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 19. "TXCARERPIM,MMC Transmit Carrier Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 18. "TXEXCOLPIM,MMC Transmit Excessive Collision Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "TXLATCOLPIM,MMC Transmit Late Collision Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 16. "TXDEFPIM,MMC Transmit Deferred Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 15. "TXMCOLGPIM,MMC Transmit Multiple Collision Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "TXSCOLGPIM,MMC Transmit Single Collision Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 13. "TXUFLOWERPIM,MMC Transmit Underflow Error Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 12. "TXBCGBPIM,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "TXMCGBPIM,MMC Transmit Multicast Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "TXUCGBPIM,MMC Transmit Unicast Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 9. "TX1024TMAXOCTGBPIM,MMC Transmit 1024 To Maximum Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 8. "TX512T1023OCTGBPIM,MMC Transmit 512 To 1023 Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 7. "TX256T511OCTGBPIM,MMC Transmit 256 To 511 Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "TX128T255OCTGBPIM,MMC Transmit 128 To 255 Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "TX65T127OCTGBPIM,MMC Transmit 65 To 127 Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 4. "TX64OCTGBPIM,MMC Transmit 64-Octet Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 3. "TXMCGPIM,MMC Transmit Multicast Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 2. "TXBCGPIM,MMC Transmit Broadcast Good Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 1. "TXGBPKTIM,MMC Transmit Good Bad Packet Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0. "TXGBOCTIM,MMC Transmit Good Bad Octet Counter Interrupt Mask" "0: Disabled,1: Enabled" rgroup.long 0x714++0x67 line.long 0x0 "Tx_Octet_Count_Good_Bad,Transmit Octet Count Good Bad" hexmask.long 0x0 0.--31. 1. "TXOCTGB,Transmit Octet Count Good Bad" line.long 0x4 "Tx_Packet_Count_Good_Bad,Transmit Packet Count Good Bad" hexmask.long 0x4 0.--31. 1. "TXPKTGB,Transmit Packet Count Good Bad" line.long 0x8 "Tx_Broadcast_Packets_Good,Transmit Broadcast Packets Good" hexmask.long 0x8 0.--31. 1. "TXBCASTG,Transmit Broadcast Packets Good" line.long 0xC "Tx_Multicast_Packets_Good,Transmit Multicast Packets Good" hexmask.long 0xC 0.--31. 1. "TXMCASTG,Transmit Multicast Packets Good" line.long 0x10 "Tx_64Octets_Packets_Good_Bad,Transmit 64-Octet Packets Good Bad" hexmask.long 0x10 0.--31. 1. "TX64OCTGB,Transmit 64-Octet Packets Good Bad" line.long 0x14 "Tx_65To127Octets_Packets_Good_Bad,Transmit 65 To 127 Octet Packets Good Bad" hexmask.long 0x14 0.--31. 1. "TX65_127OCTGB,Transmit 65 To 127 Octet Packets Good Bad" line.long 0x18 "Tx_128To255Octets_Packets_Good_Bad,Transmit 128 To 255 Octet Packets Good Bad" hexmask.long 0x18 0.--31. 1. "TX128_255OCTGB,Transmit 128 To 255 Octet Packets Good Bad" line.long 0x1C "Tx_256To511Octets_Packets_Good_Bad,Transmit 256 To 511 Octet Packets Good Bad" hexmask.long 0x1C 0.--31. 1. "TX256_511OCTGB,Transmit 256 To 511 Octet Packets Good Bad" line.long 0x20 "Tx_512To1023Octets_Packets_Good_Bad,Transmit 512 To 1023 Octet Packets Good Bad" hexmask.long 0x20 0.--31. 1. "TX512_1023OCTGB,Transmit 512 To 1023 Octet Packets Good Bad" line.long 0x24 "Tx_1024ToMaxOctets_Packets_Good_Bad,Transmit 1024 To Max Octet Packets Good Bad" hexmask.long 0x24 0.--31. 1. "TX1024_MAXOCTGB,Transmit 1024 To Max Octet Packets Good Bad" line.long 0x28 "Tx_Unicast_Packets_Good_Bad,Transmit Unicast Packets Good Bad" hexmask.long 0x28 0.--31. 1. "TXUCASTGB,Transmit Unicast Packets Good Bad" line.long 0x2C "Tx_Multicast_Packets_Good_Bad,Transmit Multicast Packets Good Bad" hexmask.long 0x2C 0.--31. 1. "TXMCASTGB,Transmit Multicast Packets Good Bad" line.long 0x30 "Tx_Broadcast_Packets_Good_Bad,Transmit Broadcast Packets Good Bad" hexmask.long 0x30 0.--31. 1. "TXBCASTGB,Transmit Broadcast Packets Good Bad" line.long 0x34 "Tx_Underflow_Error_Packets,Transmit Underflow Error Packets" hexmask.long 0x34 0.--31. 1. "TXUNDRFLW,Transmit Underflow Error Packets" line.long 0x38 "Tx_Single_Collision_Good_Packets,Transmit Single Collision Good Packets" hexmask.long 0x38 0.--31. 1. "TXSNGLCOLG,Transmit Single Collision Good Packets" line.long 0x3C "Tx_Multiple_Collision_Good_Packets,Transmit Multiple Collision Good Packets" hexmask.long 0x3C 0.--31. 1. "TXMULTCOLG,Transmit Multiple Collision Good Packets" line.long 0x40 "Tx_Deferred_Packets,Transmit Deferred Packets" hexmask.long 0x40 0.--31. 1. "TXDEFRD,Transmit Deferred Packets" line.long 0x44 "Tx_Late_Collision_Packets,Transmit Late Collision Packets" hexmask.long 0x44 0.--31. 1. "TXLATECOL,Transmit Late Collision Packets" line.long 0x48 "Tx_Excessive_Collision_Packets,Transmit Excessive Collision Packets" hexmask.long 0x48 0.--31. 1. "TXEXSCOL,Transmit Excessive Collision Packets" line.long 0x4C "Tx_Carrier_Error_Packets,Transmit Carrier Error Packets" hexmask.long 0x4C 0.--31. 1. "TXCARR,Transmit Carrier Error Packets" line.long 0x50 "Tx_Octet_Count_Good,Transmit Octet Count Good" hexmask.long 0x50 0.--31. 1. "TXOCTG,Transmit Octet Count Good" line.long 0x54 "Tx_Packet_Count_Good,Transmit Packet Count Good" hexmask.long 0x54 0.--31. 1. "TXPKTG,Transmit Packet Count Good" line.long 0x58 "Tx_Excessive_Deferral_Error,Transmit Excessive Deferral Error" hexmask.long 0x58 0.--31. 1. "TXEXSDEF,Transmit Excessive Deferral Error" line.long 0x5C "Tx_Pause_Packets,Transmit Pause Packets" hexmask.long 0x5C 0.--31. 1. "TXPAUSE,Transmit Pause Packets" line.long 0x60 "Tx_VLAN_Packets_Good,Transmit VLAN Packets Good" hexmask.long 0x60 0.--31. 1. "TXVLANG,Transmit VLAN Packets Good" line.long 0x64 "Tx_OSize_Packets_Good,Transmit O Size Packets Good" hexmask.long 0x64 0.--31. 1. "TXOSIZG,Transmit O Size Packets Good" rgroup.long 0x780++0x67 line.long 0x0 "Rx_Packets_Count_Good_Bad,Receive Packets Count Good Bad" hexmask.long 0x0 0.--31. 1. "RXPKTGB,Receive Packets Count Good Bad" line.long 0x4 "Rx_Octet_Count_Good_Bad,Receive Octet Count Good Bad" hexmask.long 0x4 0.--31. 1. "RXOCTGB,Receive Octet Count Good Bad" line.long 0x8 "Rx_Octet_Count_Good,Receive Octet Count Good" hexmask.long 0x8 0.--31. 1. "RXOCTG,Receive Octet Count Good" line.long 0xC "Rx_Broadcast_Packets_Good,Receive Broadcast Packets Good" hexmask.long 0xC 0.--31. 1. "RXBCASTG,Receive Broadcast Packets Good" line.long 0x10 "Rx_Multicast_Packets_Good,Receive Multicast Packets Good" hexmask.long 0x10 0.--31. 1. "RXMCASTG,Receive Multicast Packets Good" line.long 0x14 "Rx_CRC_Error_Packets,Receive CRC Error Packets" hexmask.long 0x14 0.--31. 1. "RXCRCERR,Receive CRC Error Packets" line.long 0x18 "Rx_Alignment_Error_Packets,Receive Alignment Error Packets" hexmask.long 0x18 0.--31. 1. "RXALGNERR,Receive Alignment Error Packets" line.long 0x1C "Rx_Runt_Error_Packets,Receive Runt Error Packets" hexmask.long 0x1C 0.--31. 1. "RXRUNTERR,Receive Runt Error Packets" line.long 0x20 "Rx_Jabber_Error_Packets,Receive Jabber Error Packets" hexmask.long 0x20 0.--31. 1. "RXJABERR,Receive Jabber Error Packets" line.long 0x24 "Rx_Undersize_Packets_Good,Receive Undersize Packets Good" hexmask.long 0x24 0.--31. 1. "RXUNDERSZG,Receive Undersize Packets Good" line.long 0x28 "Rx_Oversize_Packets_Good,Receive Oversize Packets Good" hexmask.long 0x28 0.--31. 1. "RXOVERSZG,Receive Oversize Packets Good" line.long 0x2C "Rx_64Octets_Packets_Good_Bad,Receive 64 Octets Packets Good Bad" hexmask.long 0x2C 0.--31. 1. "RX64OCTGB,Receive 64 Octets Packets Good Bad" line.long 0x30 "Rx_65To127Octets_Packets_Good_Bad,Receive 65-127 Octets Packets Good Bad" hexmask.long 0x30 0.--31. 1. "RX65_127OCTGB,Receive 65-127 Octets Packets Good Bad" line.long 0x34 "Rx_128To255Octets_Packets_Good_Bad,Receive 128-255 Octets Packets Good Bad" hexmask.long 0x34 0.--31. 1. "RX128_255OCTGB,Receive 128-255 Octets Packets Good Bad" line.long 0x38 "Rx_256To511Octets_Packets_Good_Bad,Receive 256-511 Octets Packets Good Bad" hexmask.long 0x38 0.--31. 1. "RX256_511OCTGB,Receive 256-511 Octets Packets Good Bad" line.long 0x3C "Rx_512To1023Octets_Packets_Good_Bad,Receive 512-1023 Octets Packets Good Bad" hexmask.long 0x3C 0.--31. 1. "RX512_1023OCTGB,Receive 512-1023 Octets Packets Good Bad" line.long 0x40 "Rx_1024ToMaxOctets_Packets_Good_Bad,Receive 1024 To Max Octets Good Bad" hexmask.long 0x40 0.--31. 1. "RX1024_MAXOCTGB,Receive 1024-Max Octets Good Bad" line.long 0x44 "Rx_Unicast_Packets_Good,Receive Unicast Packets Good" hexmask.long 0x44 0.--31. 1. "RXUCASTG,Receive Unicast Packets Good" line.long 0x48 "Rx_Length_Error_Packets,Receive Length Error Packets" hexmask.long 0x48 0.--31. 1. "RXLENERR,Receive Length Error Packets" line.long 0x4C "Rx_Out_Of_Range_Type_Packets,Receive Out of Range Type Packet" hexmask.long 0x4C 0.--31. 1. "RXOUTOFRNG,Receive Out of Range Type Packet" line.long 0x50 "Rx_Pause_Packets,Receive Pause Packets" hexmask.long 0x50 0.--31. 1. "RXPAUSEPKT,Receive Pause Packets" line.long 0x54 "Rx_FIFO_Overflow_Packets,Receive FIFO Overflow Packets" hexmask.long 0x54 0.--31. 1. "RXFIFOOVFL,Receive FIFO Overflow Packets" line.long 0x58 "Rx_VLAN_Packets_Good_Bad,Receive VLAN Packets Good Bad" hexmask.long 0x58 0.--31. 1. "RXVLANPKTGB,Receive VLAN Packets Good Bad" line.long 0x5C "Rx_Watchdog_Error_Packets,Receive Watchdog Error Packets" hexmask.long 0x5C 0.--31. 1. "RXWDGERR,Receive Watchdog Error Packets" line.long 0x60 "Rx_Receive_Error_Packets,Receive Receive Error Packets" hexmask.long 0x60 0.--31. 1. "RXRCVERR,Receive Receive Error Packets" line.long 0x64 "Rx_Control_Packets_Good,Receive Control Packets Good" hexmask.long 0x64 0.--31. 1. "RXCTRLG,Receive Control Packets Good" rgroup.long 0x8A0++0x3 line.long 0x0 "MMC_FPE_Tx_Interrupt,MMC Transmit FPE Fragment Counter Interrupt Status" bitfld.long 0x0 1. "HRCIS,MMC Transmit Hold Request Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "FCIS,MMC Transmit FPE Fragment Counter Interrupt Status" "0: Not detected,1: Detected" group.long 0x8A4++0x3 line.long 0x0 "MMC_FPE_Tx_Interrupt_Mask,MMC FPE Transmit Interrupt Mask" bitfld.long 0x0 1. "HRCIM,MMC Transmit Hold Request Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "FCIM,MMC Transmit Fragment Counter Interrupt Mask" "0: Disabled,1: Enabled" rgroup.long 0x8A8++0x7 line.long 0x0 "MMC_Tx_FPE_Fragment_Cntr,Transmit FPE Fragment Counter" hexmask.long 0x0 0.--31. 1. "TXFFC,Transmit FPE Fragment Counter" line.long 0x4 "MMC_Tx_Hold_Req_Cntr,Transmit Hold Request Counter" hexmask.long 0x4 0.--31. 1. "TXHRC,Transmit Hold Request Counter" rgroup.long 0x8C0++0x3 line.long 0x0 "MMC_FPE_Rx_Interrupt,MMC Receive Packet Assembly Error Counter Interrupt Status" bitfld.long 0x0 3. "FCIS,MMC Receive FPE Fragment Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 2. "PAOCIS,MMC Receive Packet Assembly OK Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "PSECIS,MMC Receive Transmit Packet SMD Error Counter Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "PAECIS,MMC Receive transmit Packet Assembly Error Counter Interrupt Status" "0: Not detected,1: Detected" group.long 0x8C4++0x3 line.long 0x0 "MMC_FPE_Rx_Interrupt_Mask,MMC FPE Receive Interrupt Mask" bitfld.long 0x0 3. "FCIM,MMC Receive FPE Fragment Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "PAOCIM,MMC Receive Packet Assembly OK Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "PSECIM,MMC Receive Packet SMD Error Counter Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "PAECIM,MMC receive Packet Assembly Error Counter Interrupt Mask" "0: Disabled,1: Enabled" rgroup.long 0x8C8++0xF line.long 0x0 "MMC_Rx_Packet_Assembly_Err_Cntr,MMC Receive Packet Assembly Error Counter" hexmask.long 0x0 0.--31. 1. "PAEC,Packet Assembly Error Counter" line.long 0x4 "MMC_Rx_Packet_SMD_Err_Cntr,MMC Receive Packet SMD Error Counter" hexmask.long 0x4 0.--31. 1. "PSEC,Packet SMD Error Counter" line.long 0x8 "MMC_Rx_Packet_Assembly_OK_Cntr,MMC Receive Packet Assembly OK Counter" hexmask.long 0x8 0.--31. 1. "PAOC,Packet Assembly OK Counter" line.long 0xC "MMC_Rx_FPE_Fragment_Cntr,MMC Receive FPE Fragment Counter" hexmask.long 0xC 0.--31. 1. "FFC,FPE Fragment Counter" group.long 0x900++0x7 line.long 0x0 "MAC_L3_L4_Control0,MAC Layer 3 Layer 4 Control 0" bitfld.long 0x0 28. "DMCHEN0,DMA Channel Select Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "DMCHN0,DMA Channel Number" "0,1" newline bitfld.long 0x0 21. "L4DPIM0,Layer 4 Destination Port Inverse Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "L4DPM0,Layer 4 Destination Port Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "L4SPIM0,Layer 4 Source Port Inverse Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "L4SPM0,Layer 4 Source Port Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "L4PEN0,Layer 4 Protocol Enable" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x0 11.--15. 1. "L3HDBM0,Layer 3 IP DA Higher Bits Match" newline hexmask.long.byte 0x0 6.--10. 1. "L3HSBM0,Layer 3 IP SA Higher Bits Match" newline bitfld.long 0x0 5. "L3DAIM0,Layer 3 IP DA Inverse Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "L3DAM0,Layer 3 IP DA Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "L3SAIM0,Layer 3 IP SA Inverse Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "L3SAM0,Layer 3 IP SA Match Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "L3PEN0,Layer 3 Protocol Enable" "0: Disabled,1: Enabled" line.long 0x4 "MAC_Layer4_Address0,MAC Layer 4 Address 0" hexmask.long.word 0x4 16.--31. 1. "L4DP0,Layer 4 Destination Port Number" newline hexmask.long.word 0x4 0.--15. 1. "L4SP0,Layer 4 Source Port Number" group.long 0x910++0xF line.long 0x0 "MAC_Layer3_Addr0_Reg0,MAC Layer 3 Address 0 Reg 0" hexmask.long 0x0 0.--31. 1. "L3A00,Layer 3 Address 0" line.long 0x4 "MAC_Layer3_Addr1_Reg0,MAC Layer 3 Address 1 Reg 0" hexmask.long 0x4 0.--31. 1. "L3A10,Layer 3 Address 1" line.long 0x8 "MAC_Layer3_Addr2_Reg0,MAC Layer 3 Address 2 Reg 0" hexmask.long 0x8 0.--31. 1. "L3A20,Layer 3 Address 2" line.long 0xC "MAC_Layer3_Addr3_Reg0,MAC Layer 3 Address 3 Reg 0" hexmask.long 0xC 0.--31. 1. "L3A30,Layer 3 Address 3" group.long 0x930++0x7 line.long 0x0 "MAC_L3_L4_Control1,MAC L3 L4 Control 1" bitfld.long 0x0 28. "DMCHEN1,DMA Channel Select Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "DMCHN1,DMA Channel Number 1" "0,1" newline bitfld.long 0x0 21. "L4DPIM1,Layer 4 Destination Port Inverse Match Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "L4DPM1,Layer 4 Destination Port Match Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "L4SPIM1,Layer 4 Source Port Inverse Match Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "L4SPM1,Layer 4 Source Port Match Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "L4PEN1,Layer 4 Protocol Enable 1" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x0 11.--15. 1. "L3HDBM1,Layer 3 IP DA Higher Bits Match 1" newline hexmask.long.byte 0x0 6.--10. 1. "L3HSBM1,Layer 3 IP SA Higher Bits Match 1" newline bitfld.long 0x0 5. "L3DAIM1,Layer 3 IP DA Inverse Match Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "L3DAM1,Layer 3 IP DA Match Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "L3SAIM1,Layer 3 IP SA Inverse Match Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "L3SAM1,Layer 3 IP SA Match Enable 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "L3PEN1,Layer 3 Protocol Enable 1" "0: Disabled,1: Enabled" line.long 0x4 "MAC_Layer4_Address1,MAC Layer 4 Address 1" hexmask.long.word 0x4 16.--31. 1. "L4DP1,Layer 4 Destination Port Number 1" newline hexmask.long.word 0x4 0.--15. 1. "L4SP1,Layer 4 Source Port Number 1" group.long 0x940++0xF line.long 0x0 "MAC_Layer3_Addr0_Reg1,MAC Layer 3 Address 0 Reg 1" hexmask.long 0x0 0.--31. 1. "L3A01,Layer 3 Address 0" line.long 0x4 "MAC_Layer3_Addr1_Reg1,MAC Layer 3 Address 1 Reg 1" hexmask.long 0x4 0.--31. 1. "L3A11,Layer 3 Address 1" line.long 0x8 "MAC_Layer3_Addr2_Reg1,MAC Layer 3 Address 2 Reg 1" hexmask.long 0x8 0.--31. 1. "L3A21,Layer 3 Address 2" line.long 0xC "MAC_Layer3_Addr3_Reg1,MAC Layer 3 Address 3 Reg 1" hexmask.long 0xC 0.--31. 1. "L3A31,Layer 3 Address 3" group.long 0x960++0x7 line.long 0x0 "MAC_L3_L4_Control2,MAC L3 L4 Control 2" bitfld.long 0x0 28. "DMCHEN2,DMA Channel Select Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "DMCHN2,DMA Channel Number 2" "0,1" newline bitfld.long 0x0 21. "L4DPIM2,Layer 4 Destination Port Inverse Match Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "L4DPM2,Layer 4 Destination Port Match Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "L4SPIM2,Layer 4 Source Port Inverse Match Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "L4SPM2,Layer 4 Source Port Match Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "L4PEN2,Layer 4 Protocol Enable 2" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x0 11.--15. 1. "L3HDBM2,Layer 3 IP DA Higher Bits Match 2" newline hexmask.long.byte 0x0 6.--10. 1. "L3HSBM2,Layer 3 IP SA Higher Bits Match 2" newline bitfld.long 0x0 5. "L3DAIM2,Layer 3 IP DA Inverse Match Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "L3DAM2,Layer 3 IP DA Match Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "L3SAIM2,Layer 3 IP SA Inverse Match Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "L3SAM2,Layer 3 IP SA Match Enable 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "L3PEN2,Layer 3 Protocol Enable 2" "0: Disabled,1: Enabled" line.long 0x4 "MAC_Layer4_Address2,MAC Layer 4 Address 2" hexmask.long.word 0x4 16.--31. 1. "L4DP2,Layer 4 Destination Port Number 2" newline hexmask.long.word 0x4 0.--15. 1. "L4SP2,Layer 4 Source Port Number 2" group.long 0x970++0xF line.long 0x0 "MAC_Layer3_Addr0_Reg2,MAC Layer 3 Address 0 Reg 2" hexmask.long 0x0 0.--31. 1. "L3A02,Layer 3 Address 0" line.long 0x4 "MAC_Layer3_Addr1_Reg2,MAC Layer 3 Address 1 Reg 2" hexmask.long 0x4 0.--31. 1. "L3A12,Layer 3 Address 1" line.long 0x8 "MAC_Layer3_Addr2_Reg2,MAC Layer 3 Address 2 Reg 2" hexmask.long 0x8 0.--31. 1. "L3A22,Layer 3 Address 2" line.long 0xC "MAC_Layer3_Addr3_Reg2,MAC Layer 3 Address 3 Reg 2" hexmask.long 0xC 0.--31. 1. "L3A32,Layer 3 Address 3" group.long 0x990++0x7 line.long 0x0 "MAC_L3_L4_Control3,MAC L3 L4 Control 3" bitfld.long 0x0 28. "DMCHEN3,DMA Channel Select Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "DMCHN3,DMA Channel Number 2" "0,1" newline bitfld.long 0x0 21. "L4DPIM3,Layer 4 Destination Port Inverse Match Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "L4DPM3,Layer 4 Destination Port Match Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "L4SPIM3,Layer 4 Source Port Inverse Match Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "L4SPM3,Layer 4 Source Port Match Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "L4PEN3,Layer 4 Protocol Enable 3" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x0 11.--15. 1. "L3HDBM3,Layer 3 IP DA Higher Bits Match 3" newline hexmask.long.byte 0x0 6.--10. 1. "L3HSBM3,Layer 3 IP SA Higher Bits Match 3" newline bitfld.long 0x0 5. "L3DAIM3,Layer 3 IP DA Inverse Match Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "L3DAM3,Layer 3 IP DA Match Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "L3SAIM3,Layer 3 IP SA Inverse Match Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "L3SAM3,Layer 3 IP SA Match Enable 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "L3PEN3,Layer 3 Protocol Enable 3" "0: Disabled,1: Enabled" line.long 0x4 "MAC_Layer4_Address3,MAC Layer 4 Address 3" hexmask.long.word 0x4 16.--31. 1. "L4DP3,Layer 4 Destination Port Number 3" newline hexmask.long.word 0x4 0.--15. 1. "L4SP3,Layer 4 Source Port Number 3" group.long 0x9A0++0xF line.long 0x0 "MAC_Layer3_Addr0_Reg3,MAC Layer 3 Address 0 Reg 3" hexmask.long 0x0 0.--31. 1. "L3A03,Layer 3 Address 0" line.long 0x4 "MAC_Layer3_Addr1_Reg3,MAC Layer 3 Address 1 Reg 3" hexmask.long 0x4 0.--31. 1. "L3A13,Layer 3 Address 1" line.long 0x8 "MAC_Layer3_Addr2_Reg3,MAC Layer 3 Address 2 Reg 3" hexmask.long 0x8 0.--31. 1. "L3A23,Layer 3 Address 2" line.long 0xC "MAC_Layer3_Addr3_Reg3,MAC Layer 3 Address 3 Reg 3" hexmask.long 0xC 0.--31. 1. "L3A33,Layer 3 Address 3" group.long 0xB00++0x7 line.long 0x0 "MAC_Timestamp_Control,MAC Timestamp Control" bitfld.long 0x0 28. "AV8021ASMEN,AV 802.1AS Mode Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "TXTSSTSM,Transmit Timestamp Status Mode" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "ESTI,External System Time Input" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "TSENMACADDR,Enable MAC Address For PTP Packet Filtering" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16.--17. "SNAPTYPSEL,Select PTP Packets For Taking Snapshots" "0,1,2,3" newline bitfld.long 0x0 15. "TSMSTRENA,Enable Snapshot For Messages Relevant To Master" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "TSEVNTENA,Enable Timestamp Snapshot For Event Messages" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "TSIPV4ENA,Enable Processing Of PTP Packets Sent Over IPv4-UDP" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "TSIPV6ENA,Enable Processing Of PTP Packets Sent Over IPv6-UDP" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "TSIPENA,Enable Processing Of PTP Over Ethernet Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "TSVER2ENA,Enable PTP Packet Processing For Version 2 Format" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "TSCTRLSSR,Timestamp Digital Or Binary Rollover Control" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "TSENALL,Enable Timestamp For All Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "PTGE,Presentation Time Generation Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "TSADDREG,Update Addend Register" "0: Not updated,1: Updated" newline bitfld.long 0x0 3. "TSUPDT,Update Timestamp" "0: Not updated,1: Updated" newline bitfld.long 0x0 2. "TSINIT,Initialize Timestamp" "0: Not initialized,1: Initialized" newline bitfld.long 0x0 1. "TSCFUPDT,Fine Or Coarse Timestamp Update" "0: Coarse method,1: Fine method" newline bitfld.long 0x0 0. "TSENA,Timestamp Enable" "0: Disabled,1: Enabled" line.long 0x4 "MAC_Sub_Second_Increment,MAC Sub Second Increment" hexmask.long.byte 0x4 16.--23. 1. "SSINC,Sub-Second Increment Value" newline hexmask.long.byte 0x4 8.--15. 1. "SNSINC,Sub-Nanosecond Increment Value" rgroup.long 0xB08++0x7 line.long 0x0 "MAC_System_Time_Seconds,MAC System Time In Seconds" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Second" line.long 0x4 "MAC_System_Time_Nanoseconds,MAC System Time In Nanoseconds" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp Sub Seconds" group.long 0xB10++0xF line.long 0x0 "MAC_System_Time_Seconds_Update,MAC System Time Seconds Update" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Seconds" line.long 0x4 "MAC_System_Time_Nanoseconds_Update,MAC System Time Nanoseconds Update" bitfld.long 0x4 31. "ADDSUB,Add Or Subtract Time" "0: Add time,1: Subtract time" newline hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp Subseconds" line.long 0x8 "MAC_Timestamp_Addend,MAC Timestamp Addend" hexmask.long 0x8 0.--31. 1. "TSAR,Timestamp Addend Register" line.long 0xC "MAC_System_Time_Higher_Word_Seconds,MAC System Time Higher Word In Seconds" hexmask.long.word 0xC 0.--15. 1. "TSHWR,Timestamp Higher Word Register" rgroup.long 0xB20++0x3 line.long 0x0 "MAC_Timestamp_Status,MAC Timestamp Status" bitfld.long 0x0 15. "TXTSSIS,Transmit Timestamp Status Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 9. "TSTRGTERR3,Timestamp Target Time Error" "0: Not detected,1: Detected" newline bitfld.long 0x0 8. "TSTARGT3,Timestamp Target Time Reached For Target Time PPS3" "0: Not detected,1: Detected" newline bitfld.long 0x0 7. "TSTRGTERR2,Timestamp Target Time Error" "0: Not detected,1: Detected" newline bitfld.long 0x0 6. "TSTARGT2,Timestamp Target Time Reached For Target Time PPS2" "0: Not detected,1: Detected" newline bitfld.long 0x0 5. "TSTRGTERR1,Timestamp Target Time Error" "0: Not detected,1: Detected" newline bitfld.long 0x0 4. "TSTARGT1,Timestamp Target Time Reached For Target Time PPS1" "0: Not detected,1: Detected" newline bitfld.long 0x0 3. "TSTRGTERR0,Timestamp Target Time Error" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "TSTARGT0,Timestamp Target Time Reached" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "TSSOVF,Timestamp Seconds Overflow" "0: Not detected,1: Detected" rgroup.long 0xB30++0x7 line.long 0x0 "MAC_Tx_Timestamp_Status_Nanoseconds,MAC Transmit Timestamp Status In Nanoseconds" bitfld.long 0x0 31. "TXTSSMIS,Transmit Timestamp Status Missed" "0: Not detected,1: Detected" newline hexmask.long 0x0 0.--30. 1. "TXTSSLO,Transmit Timestamp Status Low" line.long 0x4 "MAC_Tx_Timestamp_Status_Seconds,MAC Transmit Timestamp Status In Seconds" hexmask.long 0x4 0.--31. 1. "TXTSSHI,Transmit Timestamp Status High" group.long 0xB50++0x17 line.long 0x0 "MAC_Timestamp_Ingress_Asym_Corr,MAC Timestamp Ingress Asymmetry Correction" hexmask.long 0x0 0.--31. 1. "OSTIAC,One-Step Timestamp Ingress Asymmetry Correction" line.long 0x4 "MAC_Timestamp_Egress_Asym_Corr,MAC Timestamp Egress Asymmetry Correction" hexmask.long 0x4 0.--31. 1. "OSTEAC,One-Step Timestamp Egress Asymmetry Correction" line.long 0x8 "MAC_Timestamp_Ingress_Corr_Nanosecond,MAC Timestamp Ingress Correction In Nanoseconds" hexmask.long 0x8 0.--31. 1. "TSIC,Timestamp Ingress Correction" line.long 0xC "MAC_Timestamp_Egress_Corr_Nanosecond,MAC Timestamp Egress Correction In Nanoseconds" hexmask.long 0xC 0.--31. 1. "TSEC,Timestamp Egress Correction" line.long 0x10 "MAC_Timestamp_Ingress_Corr_Subnanosec,MAC Timestamp Ingress Correction In Subnanoseconds" hexmask.long.byte 0x10 8.--15. 1. "TSICSNS,Timestamp Ingress Correction In Sub-Nanoseconds" line.long 0x14 "MAC_Timestamp_Egress_Corr_Subnanosec,MAC Timestamp Engress Correction In Subnanoseconds" hexmask.long.byte 0x14 8.--15. 1. "TSECSNS,Timestamp Egress Correction In Sub-Nanoseconds" rgroup.long 0xB68++0x7 line.long 0x0 "MAC_Timestamp_Ingress_Latency,MAC Timestamp Ingress Latency" hexmask.long.word 0x0 16.--27. 1. "ITLNS,Ingress Timestamp Latency In Sub-Nanoseconds" newline hexmask.long.byte 0x0 8.--15. 1. "ITLSNS,Ingress Timestamp Latency In Nanoseconds" line.long 0x4 "MAC_Timestamp_Egress_Latency,MAC Timestamp Egress Latecy" hexmask.long.word 0x4 16.--27. 1. "ETLNS,Egress Timestamp Latency In Nanoseconds" newline hexmask.long.byte 0x4 8.--15. 1. "ETLSNS,Egress Timestamp Latency In Sub-Nanoseconds" group.long 0xB70++0x3 line.long 0x0 "MAC_PPS_Control,MAC PPS Control" bitfld.long 0x0 31. "MCGREN3,MCGR Mode Enable For PPS3 Output" "0,1" newline bitfld.long 0x0 29.--30. "TRGTMODSEL3,Target Time Register Mode For PPS3 Output" "0: Target Time registers are programmed only for..,?,2: Target Time registers are programmed for..,3: Target Time registers are programmed only for.." newline hexmask.long.byte 0x0 24.--27. 1. "PPSCMD3,Flexible PPS3 Output Control" newline bitfld.long 0x0 23. "MCGREN2,MCGR Mode Enable For PPS2 Output" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21.--22. "TRGTMODSEL2,Target Time Register Mode For PPS2 Output" "0: Target Time registers are programmed only for..,?,2: Target Time registers are programmed for..,3: Target Time registers are programmed only for.." newline hexmask.long.byte 0x0 16.--19. 1. "PPSCMD2,Flexible PPS2 Output Control" newline bitfld.long 0x0 15. "MCGREN1,MCGR Mode Enable For PPS1 Output" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13.--14. "TRGTMODSEL1,Target Time Register Mode For PPS1 Output" "0: Target Time registers are programmed only for..,?,2: Target Time registers are programmed for..,3: Target Time registers are programmed only for.." newline hexmask.long.byte 0x0 8.--11. 1. "PPSCMD1,Flexible PPS1 Output Control" newline bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable For PPS0 Output" "0: PPS mode,1: MCGR mode" newline bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode For PPS0 Output" "0: Target Time registers are programmed only for..,?,2: Target Time registers are programmed for..,3: Target Time registers are programmed only for.." newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output Mode Enable 0" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x0 0.--3. 1. "PPSCTRL_PPSCMD,PPS Output Frequency Control" group.long 0xB80++0x3F line.long 0x0 "MAC_PPS0_Target_Time_Seconds,MAC PPS0 Target Time In Seconds" hexmask.long 0x0 0.--31. 1. "TSTRH0,PPS Target Time In Seconds Register" line.long 0x4 "MAC_PPS0_Target_Time_Nanoseconds,MAC PPS0 Target Time In Nanoseconds" bitfld.long 0x4 31. "TRGTBUSY0,PPS Target Time Busy Status 0" "0: Not detected,1: Detected" newline hexmask.long 0x4 0.--30. 1. "TTSL0,Target Time Low For PPS0" line.long 0x8 "MAC_PPS0_Interval,MAC PPS0 Interval" hexmask.long 0x8 0.--31. 1. "PPSINT0,PPS Output Signal Interval 0" line.long 0xC "MAC_PPS0_Width,MAC PPS0 Width" hexmask.long 0xC 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width 0" line.long 0x10 "MAC_PPS1_Target_Time_Seconds,MAC PPS1 Target Time In Seconds" hexmask.long 0x10 0.--31. 1. "TSTRH1,PPS Target Time In Seconds 1" line.long 0x14 "MAC_PPS1_Target_Time_Nanoseconds,MAC PPS1 Target Time In Nanoseconds" bitfld.long 0x14 31. "TRGTBUSY1,PPS Target Time Busy Status 1" "0: Not detected,1: Detected" newline hexmask.long 0x14 0.--30. 1. "TTSL1,Target Time Low For PPS1" line.long 0x18 "MAC_PPS1_Interval,MAC PPS1 Interval" hexmask.long 0x18 0.--31. 1. "PPSINT1,PPS Output Signal Interval 1" line.long 0x1C "MAC_PPS1_Width,MAC PPS1 Width" hexmask.long 0x1C 0.--31. 1. "PPSWIDTH1,PPS Output Signal Width 1" line.long 0x20 "MAC_PPS2_Target_Time_Seconds,MAC PPS2 Taget Time In Seconds" hexmask.long 0x20 0.--31. 1. "TSTRH2,PPS Target Time In Seconds 2" line.long 0x24 "MAC_PPS2_Target_Time_Nanoseconds,MAC PPS2 Target Time In Nanoseconds" bitfld.long 0x24 31. "TRGTBUSY2,PPS Target Time Busy Status 2" "0: Not detected,1: Detected" newline hexmask.long 0x24 0.--30. 1. "TTSL2,Target Time Low For PPS2" line.long 0x28 "MAC_PPS2_Interval,MAC PPS2 Interval" hexmask.long 0x28 0.--31. 1. "PPSINT2,PPS Output Signal Interval 2" line.long 0x2C "MAC_PPS2_Width,MAC PPS2 Width" hexmask.long 0x2C 0.--31. 1. "PPSWIDTH2,PPS Output Signal Width 2" line.long 0x30 "MAC_PPS3_Target_Time_Seconds,MAC PPS3 Target Time In Seconds" hexmask.long 0x30 0.--31. 1. "TSTRH3,PPS Target Time In Seconds 3" line.long 0x34 "MAC_PPS3_Target_Time_Nanoseconds,MAC PPS3 Target Time In Nanoseconds" bitfld.long 0x34 31. "TRGTBUSY3,PPS Target Time Register Busy 3" "0: Not detected,1: Detected" newline hexmask.long 0x34 0.--30. 1. "TTSL3,Target Time Low For PPS3" line.long 0x38 "MAC_PPS3_Interval,MAC PPS3 Interval" hexmask.long 0x38 0.--31. 1. "PPSINT3,PPS Output Signal Interval" line.long 0x3C "MAC_PPS3_Width,MAC PPS3 Width" hexmask.long 0x3C 0.--31. 1. "PPSWIDTH3,PPS Output Signal Width 3" group.long 0xC00++0x3 line.long 0x0 "MTL_Operation_Mode,MTL Operation Mode" bitfld.long 0x0 15. "FRPE,Flexible Receive Parser Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "CNTCLR,Counters Reset" "0: Not reset,1: Reset" newline bitfld.long 0x0 8. "CNTPRST,Counters Preset" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5.--6. "SCHALG,Transmit Scheduling Algorithm" "0: WRR algorithm,1: WFQ algorithm when DCB feature selected;..,2: DWRR algorithm when DCB feature selected;..,3: Strict priority algorithm" newline bitfld.long 0x0 2. "RAA,Receive Arbitration Algorithm" "0: Strict priority (SP),1: Weighted strict priority (WSP)" newline bitfld.long 0x0 1. "DTXSTS,Drop Transmit Status" "0: Disabled,1: Enabled" group.long 0xC08++0xB line.long 0x0 "MTL_DBG_CTL,MTL Debug Control" bitfld.long 0x0 17.--18. "EIEC,ECC Inject Error Control" "0: 1-bit error,1: 2-bit errors,2: 3-bit errors,3: 1-bit error in the address field" newline bitfld.long 0x0 16. "EIEE,ECC Inject Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 15. "STSIE,Transmit Status Available Interrupt Status Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "PKTIE,Receive Packet Available Interrupt Status Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12.--13. "FIFOSEL,FIFO Selected for Access" "0: Transmit FIFO,1: Transmit status FIFO (only read access when..,2: TSO FIFO (cannot be accessed when SLVMOD is set),3: Receive FIFO" newline bitfld.long 0x0 11. "FIFOWREN,FIFO Write Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "FIFORDEN,FIFO Read Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "RSTSEL,Reset Pointers Of Selected FIFO" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "RSTALL,Reset All Pointers" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5.--6. "PKTSTATE,Encoded Packet State" "0: Packet data,1: Control word/normal status,2: SOP data/last status,3: EOP data/EOP" newline bitfld.long 0x0 2.--3. "BYTEEN,Byte Enables" "0: Byte 0 valid,1: Byte 0 and byte 1 valid,2: Byte 0 byte 1 and byte 2 valid,3: All four bytes valid" newline bitfld.long 0x0 1. "DBGMOD,Debug Mode Access to FIFO" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "FDBGEN,FIFO Debug Access Enable" "0: Disabled,1: Enabled" line.long 0x4 "MTL_DBG_STS,MTL Debug Status" hexmask.long.tbyte 0x4 15.--31. 1. "LOCR,Remaining Locations In FIFO" newline bitfld.long 0x4 9. "STSI,Transmit Status Available Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 8. "PKTI,Receive Packet Available Interrupt Status" "0: Not detected,1: Detected" newline rbitfld.long 0x4 3.--4. "BYTEEN,Byte Enables" "0: Byte 0 valid,1: Byte 0 and byte 1 valid,2: Byte 0 byte 1 and byte 2 valid,3: All four bytes valid" newline rbitfld.long 0x4 1.--2. "PKTSTATE,Encoded Packet State" "0: Packet data,1: Control word/normal status,2: SOP data/last status,3: EOP data/EOP" newline rbitfld.long 0x4 0. "FIFOBUSY,FIFO Busy" "0: Not detected,1: Detected" line.long 0x8 "MTL_FIFO_Debug_Data,MTL FIFO Debug Data" hexmask.long 0x8 0.--31. 1. "FDBGDATA,FIFO Debug Data" rgroup.long 0xC20++0x3 line.long 0x0 "MTL_Interrupt_Status,MTL Interrupt Status" bitfld.long 0x0 23. "MTLPIS,MTL Receive Parser Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 18. "ESTIS,EST (TAS- 802.1Qbv) Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 17. "DBGIS,Debug Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "Q1IS,Queue 1 Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "Q0IS,Queue 0 Interrupt Status" "0: Not detected,1: Detected" group.long 0xC30++0x3 line.long 0x0 "MTL_RxQ_DMA_Map0,MTL Receive Queue DMA Map 0" bitfld.long 0x0 12. "Q1DDMACH,Queue 1 Enabled for DA-based DMA Channel Selection" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "Q1MDMACH,Queue 1 Mapped to DMA Channel" "0,1" newline bitfld.long 0x0 4. "Q0DDMACH,Queue 0 Enabled for DA-based DMA Channel Selection" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "Q0MDMACH,Queue 0 Mapped to DMA Channel" "0,1" group.long 0xC40++0x3 line.long 0x0 "MTL_TBS_CTRL,MTL TBS Control" hexmask.long.tbyte 0x0 8.--31. 1. "LEOS,Launch Expiry Offset" newline bitfld.long 0x0 4.--6. "LEGOS,Launch Expiry GSN Offset" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 1. "LEOV,Launch Expiry Offset Valid" "0: Invalid,1: Valid" newline bitfld.long 0x0 0. "ESTM,EST offset Mode" "0: Disabled,1: Enabled" group.long 0xC50++0x3 line.long 0x0 "MTL_EST_Control,MTL EST Control" hexmask.long.byte 0x0 24.--31. 1. "PTOV,PTP Time Offset Value" newline hexmask.long.word 0x0 12.--23. 1. "CTOV,Current Time Offset Value" newline bitfld.long 0x0 8.--10. "TILS,Time Interval Left Shift Amount" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 6.--7. "LCSE,Loop Count to Report Scheduling Error" "0: 4 iterations,1: 8 iterations,2: 16 iterations,3: 32 iterations" newline bitfld.long 0x0 5. "DFBS,Drop Frames Causing Scheduling Error" "0: Do not drop frames,1: Drop frames" newline bitfld.long 0x0 4. "DDBF,Do not Drop Frames during Frame Size Error" "0: Drop frames during frame size error,1: Do not Drop frames during frame size error" newline bitfld.long 0x0 1. "SSWL,Switch to Software Owned List" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "EEST,Enable EST" "0: Disabled,1: Enabled" group.long 0xC58++0x3 line.long 0x0 "MTL_EST_Status,MTL EST Status" hexmask.long.byte 0x0 16.--19. 1. "CGSN,Current GCL Slot Number Indicates the slot number of the GCL list" newline hexmask.long.byte 0x0 8.--11. 1. "BTRL,BTR Error Loop Count Provides the minimum count (N) for which the equation Current Time =< New BTR + (N * New Cycle Time) becomes true" newline rbitfld.long 0x0 7. "SWOL,S/W owned list When '0' indicates Gate control list number '0' is owned by software and when '1' indicates the Gate Control list '1' is owned by the software" "0: Gate control list number '0' is owned by software,1: Gate control list number '1' is owned by software" newline bitfld.long 0x0 4. "CGCE,Constant Gate Control Error This error occurs when the list length (LLR) is 1 and the Cycle Time (CTR) is less than or equal to the programmed Time Interval (TI) value after the optional Left Shifting" "0: Constant Gate Control Error not detected,1: Constant Gate Control Error detected" newline rbitfld.long 0x0 3. "HLBS,Head-Of-Line Blocking due to Scheduling Set when the frame is not able to win arbitration and get scheduled even after 4 iterations of the GCL" "0: Head-Of-Line Blocking due to Scheduling not..,1: Head-Of-Line Blocking due to Scheduling detected" newline rbitfld.long 0x0 2. "HLBF,Head-Of-Line Blocking due to Frame Size Set when HOL Blocking is noticed on one or more Queues as a result of none of the Time Intervals of gate open in the GCL being greater than or equal to the duration needed for frame size (or frame fragment.." "0: Head-Of-Line Blocking due to Frame Size not..,1: Head-Of-Line Blocking due to Frame Size detected" newline bitfld.long 0x0 1. "BTRE,BTR Error" "0: BTR Error not detected,1: BTR Error detected" newline bitfld.long 0x0 0. "SWLC,Switch to Software Owned List Complete" "0: Not detected,1: Detected" group.long 0xC60++0x7 line.long 0x0 "MTL_EST_Sch_Error,MTL EST Scheduling Error" bitfld.long 0x0 0.--1. "SEQN,Schedule Error Queue Number" "0,1,2,3" line.long 0x4 "MTL_EST_Frm_Size_Error,MTL EST Frame Size Error" bitfld.long 0x4 0.--1. "FEQN,Frame Size Error Queue Number" "0,1,2,3" rgroup.long 0xC68++0x3 line.long 0x0 "MTL_EST_Frm_Size_Capture,MTL EST Frame Size Capture" bitfld.long 0x0 16. "HBFQ,Queue Number of HLBF" "0,1" newline hexmask.long.word 0x0 0.--14. 1. "HBFS,Frame Size of HLBF" group.long 0xC70++0x3 line.long 0x0 "MTL_EST_Intr_Enable,MTL EST Interrupt Enable" bitfld.long 0x0 4. "CGCE,Interrupt Enable for CGCE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "IEHS,Interrupt Enable for HLBS" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "IEHF,Interrupt Enable for HLBF" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "IEBE,Interrupt Enable for BTR Error" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "IECC,Interrupt Enable for Switch List" "0: Disabled,1: Enabled" group.long 0xC80++0x7 line.long 0x0 "MTL_EST_GCL_Control,MTL EST GCL Control" bitfld.long 0x0 22.--23. "ESTEIEC,ECC Inject Error Control for EST Memory" "0: Insert 1 bit error,1: Insert 2 bit errors,2: Insert 3 bit errors,3: Insert 1 bit error in address field" newline bitfld.long 0x0 21. "ESTEIEE,EST ECC Inject Error Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "ERR0,If this field is 1 it indicates that when the software writes to GCL the last write operation was aborted and when MTL_EST_Control[SSWL] is 1 GCL registers are prohibited" "0: ERR0 is disabled,1: ERR1 is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "ADDR,Gate Control List Address: (GCLA when GCRR is '0')" newline bitfld.long 0x0 5. "DBGB,Debug Mode Bank Select" "0: Directed to bank 0,1: Directed to bank 1" newline bitfld.long 0x0 4. "DBGM,Debug Mode" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "GCRR,Gate Control Related Registers" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "R1W0,Read '1' Write '0'" "0: Write operation,1: Read operation" newline bitfld.long 0x0 0. "SRWO,Start Read/Write Operation" "0: Disabled,1: Enabled" line.long 0x4 "MTL_EST_GCL_Data,MTL EST GCL Data" hexmask.long 0x4 0.--31. 1. "GCD,Gate Control Data" group.long 0xC90++0x7 line.long 0x0 "MTL_FPE_CTRL_STS,MTL FPE Control Status" rbitfld.long 0x0 28. "HRS,Hold/Release Status" "0: Release state,1: Hold state" newline bitfld.long 0x0 8.--9. "PEC,Preemption Classification" "0,1,2,3" newline bitfld.long 0x0 0.--1. "AFSZ,Additional Fragment Size" "0,1,2,3" line.long 0x4 "MTL_FPE_Advance,MTL FPE Advance" hexmask.long.word 0x4 16.--31. 1. "RADV,Release Advance" newline hexmask.long.word 0x4 0.--15. 1. "HADV,Hold Advance" group.long 0xCA0++0x7 line.long 0x0 "MTL_RXP_Control_Status,MTL Rx Parser Control Status" rbitfld.long 0x0 31. "RXPI,RX Parser in Idle State" "0: Not in Idle state,1: Idle state" newline hexmask.long.byte 0x0 16.--21. 1. "NPE,Number of parsable entries in the Instruction table" newline bitfld.long 0x0 15. "MTL_SCS1,MTL_SCS1" "0,1" newline hexmask.long.byte 0x0 0.--5. 1. "NVE,Number Of Valid Entry Address Or Index In The Instruction Table" line.long 0x4 "MTL_RXP_Interrupt_Control_Status,MTL Rx Parser Interrupt Control Status" bitfld.long 0x4 19. "PDRFIE,Packet Drop due to RF Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 18. "FOOVIE,Frame Offset Overflow Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "NPEOVIE,Number of Parsable Entries Overflow Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x4 16. "NVEOVIE,Number of Valid Entries Overflow Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x4 3. "PDRFIS,Packet Dropped due to RF Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 2. "FOOVIS,Frame Offset Overflow Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 1. "NPEOVIS,Number of Parsable Entries Overflow Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 0. "NVEOVIS,Number of Valid Entry Address/Index Overflow Interrupt Status" "0: Not detected,1: Detected" rgroup.long 0xCA8++0x7 line.long 0x0 "MTL_RXP_Drop_Cnt,MTL Rx Parser Drop Count" bitfld.long 0x0 31. "RXPDCOVF,Rx Parser Drop Counter Overflow Bit" "0: Not occurred,1: Occurred" newline hexmask.long 0x0 0.--30. 1. "RXPDC,Rx Parser Drop Count" line.long 0x4 "MTL_RXP_Error_Cnt,MTL Rx Parser Error Count" bitfld.long 0x4 31. "RXPECOVF,Rx Parser Error Counter Overflow Bit" "0: Not occurred,1: Occurred" newline hexmask.long 0x4 0.--30. 1. "RXPEC,Rx Parser Error Count" group.long 0xCB0++0x3 line.long 0x0 "MTL_RXP_Indirect_Acc_Control_Status,MTL Rx Parser Indirect Access Control Status" bitfld.long 0x0 31. "STARTBUSY,FRP Instruction Table Access Busy" "0: hardware not busy,1: hardware is busy (Read/Write operation from/to.." newline bitfld.long 0x0 21.--22. "RXPEIEC,ECC Inject Error Control for Rx Parser Memory" "0: Insert 1 bit error,1: Insert 2 bit errors,2: Insert 3 bit errors,3: Insert 1 bit error in address field" newline bitfld.long 0x0 20. "RXPEIEE,ECC Inject Error Enable for Rx Parser Memory" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "WRRDN,Read Write Control" "0: Read operation to the receive parser memory,1: Write operation to the receive parser memory" newline hexmask.long.byte 0x0 0.--7. 1. "ADDR,FRP Instruction Table Offset Address" rgroup.long 0xCB4++0x3 line.long 0x0 "MTL_RXP_Indirect_Acc_Data,MTL Rx Parser Indirect Access Data" hexmask.long 0x0 0.--31. 1. "DATA,FRP Instruction Table Write/Read Data" group.long 0xCC0++0x3 line.long 0x0 "MTL_ECC_Control,MTL ECC Control" bitfld.long 0x0 8. "MEEAO,MTL ECC Error Address Status Over-ride" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "MRXPEE,MTL Rx Parser ECC Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "MESTEE,MTL EST ECC Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "MRXEE,MTL Rx FIFO ECC Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "MTXEE,MTL Tx FIFO ECC Enable" "0: Disabled,1: Enabled" rgroup.long 0xCC4++0x3 line.long 0x0 "MTL_Safety_Interrupt_Status,MTL Safety Interript Status" bitfld.long 0x0 1. "MEUIS,MTL ECC Uncorrectable Error Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "MECIS,MTL ECC Correctable Error Interrupt Status" "0: MTL ECC Correctable error Interrupt Status not..,1: MTL ECC Correctable error Interrupt Status.." group.long 0xCC8++0xB line.long 0x0 "MTL_ECC_Interrupt_Enable,MTL ECC Interrupt Enable" bitfld.long 0x0 12. "RPCEIE,Rx Parser Memory Correctable Error Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "ECEIE,EST Memory Correctable Error Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "RXCEIE,Rx Memory Correctable Error Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "TXCEIE,Tx Memory Correctable Error Interrupt Enable" "0: Disabled,1: Enabled" line.long 0x4 "MTL_ECC_Interrupt_Status,MTL ECC Interrupt Status" bitfld.long 0x4 14. "RPUES,Rx Parser Memory Uncorrectable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 13. "RPAMS,MTL Rx Parser Memory Address Mismatch Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 12. "RPCES,MTL Rx Parser Memory Correctable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 10. "EUES,MTL EST Memory Uncorrectable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 9. "EAMS,MTL EST Memory Address Mismatch Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 8. "ECES,MTL EST Memory Correctable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 6. "RXUES,MTL Rx Memory Uncorrectable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 5. "RXAMS,MTL Rx Memory Address Mismatch Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 4. "RXCES,MTL Rx memory Correctable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 2. "TXUES,MTL Tx Memory Uncorrectable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 1. "TXAMS,MTL Tx Memory Address Mismatch Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 0. "TXCES,MTL Tx Memory Correctable Error Status" "0: Not detected,1: Detected" line.long 0x8 "MTL_ECC_Err_Sts_Rctl,MTL ECC Error Status" bitfld.long 0x8 5. "CUES,Clear Uncorrectable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x8 4. "CCES,Clear Correctable Error Status" "0: Not detected,1: Detected" newline bitfld.long 0x8 1.--3. "EMS,MTL ECC Memory Selection" "0: MTL Tx memory,1: MTL Rx memory,2: MTL EST memory,3: MTL Rx Parser memory,4: DMA TSO memory,?,?,?" newline bitfld.long 0x8 0. "EESRE,MTL ECC Error Status Read Enable" "0: Disabled,1: Enabled" rgroup.long 0xCD4++0x7 line.long 0x0 "MTL_ECC_Err_Addr_Status,MTL ECC Error Adress Status" hexmask.long.word 0x0 16.--31. 1. "EUEAS,MTL ECC Uncorrectable Error Address Status" newline hexmask.long.word 0x0 0.--15. 1. "ECEAS,MTL ECC Correctable Error Address Status" line.long 0x4 "MTL_ECC_Err_Cntr_Status,MTL ECC Error Control Status" hexmask.long.byte 0x4 16.--19. 1. "EUECS,MTL ECC Uncorrectable Error Counter Status Based on the EMS field of MTL_ECC_Err_Cntr_Rctl register this field holds the respective memory's uncorrectable error count value" newline hexmask.long.byte 0x4 0.--7. 1. "ECECS,MTL ECC Correctable Error Counter Status Based on the EMS field of MTL_ECC_Err_Cntr_Rctl register this field holds the respective memory's correctable error count value" group.long 0xCE0++0x3 line.long 0x0 "MTL_DPP_Control,MTL DPP Control" bitfld.long 0x0 11. "IPERD,Insert Parity error in Rx write-back Descriptor parity generator" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "IPETD,Insert Parity error in Tx write-back Descriptor parity generator" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "IPEDDC,Insert Parity Error in DMA DTX Control Word Parity Generator" "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "IPEMRF,Insert Parity Error in MTL Rx FIFO Read Control Parity Generator" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IPEMTS,Insert Parity Error in MTL Tx Status Parity Generator" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "IPEMC,Insert Parity Error in MTL Checksum Parity Generator" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "IPEID,Insert Parity Error in Interface Data Parity Generator" "0: Disabled,1: Enabled" newline rbitfld.long 0x0 1. "OPE,Odd Parity Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "EDPP,Enable Data path Parity Protection" "0: Disable,1: Enable" group.long 0xD00++0x3 line.long 0x0 "MTL_TxQ0_Operation_Mode,MTL Tx Queue 0 Operation Mode" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit Queue Size" newline bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "0: 32,1: 64,2: 96,3: 128,4: 192,5: 256,6: 384,7: 512" newline bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "0: Not enabled,1: Enable in AV mode (Reserved in non-AV),2: Enabled,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0: Disabled,1: Enabled" rgroup.long 0xD04++0x7 line.long 0x0 "MTL_TxQ0_Underflow,MTL Tx Queue 0 Underflow" bitfld.long 0x0 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0: Not detected,1: Detected" newline hexmask.long.word 0x0 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" line.long 0x4 "MTL_TxQ0_Debug,MTL Tx Queue 0 Debug" bitfld.long 0x4 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "0: Idle state,1: Read state (transferring data to the MAC..,2: Waiting for pending transit status from the MAC..,3: Flushing the transit queue because of the packet.." newline bitfld.long 0x4 0. "TXQPAUSED,Transmit Queue in Pause" "0: Not detected,1: Detected" rgroup.long 0xD14++0x3 line.long 0x0 "MTL_TxQ0_ETS_Status,MTL Tx Queue 0 ETS Status" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD18++0x3 line.long 0x0 "MTL_TxQ0_Quantum_Weight,MTL Tx Queue Quantum Weight" hexmask.long.tbyte 0x0 0.--20. 1. "ISCQW,Quantum or Weights" group.long 0xD2C++0x7 line.long 0x0 "MTL_Q0_Interrupt_Control_Status,MTL Queue 0 Interrupt Control Status" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0: Not detected,1: Detected" line.long 0x4 "MTL_RxQ0_Operation_Mode,MTL Rx Queue 0 Operation Mode" hexmask.long.byte 0x4 20.--24. 1. "RQS,Receive Queue Size" newline hexmask.long.byte 0x4 14.--17. 1. "RFD,Threshold for Deactivating Flow Control (in half-duplex and full-duplex modes)" newline hexmask.long.byte 0x4 8.--11. 1. "RFA,Threshold for Activating Flow Control (in half-duplex and full-duplex)" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0: Disable,1: Enable" newline bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0: Enable,1: Disable" newline bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0: Disabled,1: Enabled" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "0: 64,1: 32,2: 96,3: 128" rgroup.long 0xD34++0x7 line.long 0x0 "MTL_RxQ0_Missed_Packet_Overflow_Cnt,MTL Rx Queue Missed Packet Overflow Count" bitfld.long 0x0 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0: Not detected,1: Detected" newline hexmask.long.word 0x0 16.--26. 1. "MISPKTCNT,Missed Packet Counter" newline bitfld.long 0x0 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0: Not detected,1: Detected" newline hexmask.long.word 0x0 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" line.long 0x4 "MTL_RxQ0_Debug,MTL Rx Queue 0 Debug" hexmask.long.word 0x4 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" newline bitfld.long 0x4 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "0: Rx Queue empty,1: Rx Queue fill-level below flow-control..,2: Rx Queue fill-level above flow-control activate..,3: Rx Queue full" newline bitfld.long 0x4 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "0: Idle state,1: Reading packet data,2: Reading packet status (or timestamp),3: Flushing the packet data and status" newline bitfld.long 0x4 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0: Not detected,1: Detected" group.long 0xD3C++0x7 line.long 0x0 "MTL_RxQ0_Control,MTL Rx Queue 0 Control 0" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "MTL_TxQ1_Operation_Mode,MTL Tx Queue 1 Operation Mode" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit Queue Size" newline bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "0: 32,1: 64,2: 96,3: 128,4: 192,5: 256,6: 384,7: 512" newline bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "0: Not enabled,1: Enable in AV mode (Reserved in non-AV),2: Enabled,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0: Transmit Store and Forward is disabled,1: Transmit Store and Forward is enabled" newline bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0: Disabled,1: Enabled" rgroup.long 0xD44++0x7 line.long 0x0 "MTL_TxQ1_Underflow,MTL Tx Queue 1 Underflow" bitfld.long 0x0 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0: Not detected,1: Detected" newline hexmask.long.word 0x0 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" line.long 0x4 "MTL_TxQ1_Debug,MTL Tx Queue 1 Debug" bitfld.long 0x4 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0: Not detected,1: Detected" newline bitfld.long 0x4 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "0: Idle state,1: Read state (transferring data to the MAC..,2: Waiting for pending transit status from the MAC..,3: Flushing the transit queue because of the packet.." newline bitfld.long 0x4 0. "TXQPAUSED,Transmit Queue in Pause" "0: Not detected,1: Detected" group.long 0xD50++0x3 line.long 0x0 "MTL_TxQ1_ETS_Control,MTL Tx Queue 1 ETS Control" bitfld.long 0x0 4.--6. "SLC,Slot Count" "0: 1 slot,1: 2 slots,2: 4 slots,3: 8 slots,4: 16 slots,?,?,?" newline bitfld.long 0x0 3. "CC,Credit Control" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "AVALG,AV Algorithm" "0: Disabled,1: Enabled" rgroup.long 0xD54++0x3 line.long 0x0 "MTL_TxQ1_ETS_Status,MTL Tx Queue 1 ETS Status" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD58++0xF line.long 0x0 "MTL_TxQ1_Quantum_Weight,MTL Tx Queue 1 Quantum Weight" hexmask.long.tbyte 0x0 0.--20. 1. "ISCQW,idleSlopeCredit Quantum or Weights" line.long 0x4 "MTL_TxQ1_SendSlopeCredit,MTL Tx Queue 1 Sendslope Credit" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "MTL_TxQ1_HiCredit,MTL Tx Queue 1 HiCredit" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "MTL_TxQ1_LoCredit,MTL Tx Queue 1 LoCredit" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xD6C++0x7 line.long 0x0 "MTL_Q1_Interrupt_Control_Status,MTL Queue 1 Interrupt Control Status" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0: Not detected,1: Detected" line.long 0x4 "MTL_RxQ1_Operation_Mode,MTL Rx Queue 1 Operation Mode" hexmask.long.byte 0x4 20.--24. 1. "RQS,Receive Queue Size" newline hexmask.long.byte 0x4 14.--17. 1. "RFD,Threshold for Deactivating Flow Control (in half-duplex and full-duplex modes)" newline hexmask.long.byte 0x4 8.--11. 1. "RFA,Threshold for Activating Flow Control (in half-duplex and full-duplex" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0: Disable,1: Enable" newline bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP or IP Checksum Error Packets" "0: Enabled,1: Disabled" newline bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0: Disabled,1: Enabled" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "0: 64,1: 32,2: 96,3: 128" rgroup.long 0xD74++0x7 line.long 0x0 "MTL_RxQ1_Missed_Packet_Overflow_Cnt,MTL Rx Queue 1 Missed Packet Overflow Counter" bitfld.long 0x0 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0: Not detected,1: Detected" newline hexmask.long.word 0x0 16.--26. 1. "MISPKTCNT,Missed Packet Counter" newline bitfld.long 0x0 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0: Not detected,1: Detected" newline hexmask.long.word 0x0 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" line.long 0x4 "MTL_RxQ1_Debug,MTL Rx Queue 1 Debug" hexmask.long.word 0x4 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" newline bitfld.long 0x4 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "0: Rx Queue empty,1: Rx Queue fill-level below flow-control..,2: Rx Queue fill-level above flow-control activate..,3: Rx Queue full" newline bitfld.long 0x4 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "0: Idle state,1: Reading packet data,2: Reading packet status (or timestamp),3: Flushing the packet data and status" newline bitfld.long 0x4 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0: Not detected,1: Detected" group.long 0xD7C++0x3 line.long 0x0 "MTL_RxQ1_Control,MTL Rx Queue 1 Control" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" group.long 0x1000++0x7 line.long 0x0 "DMA_Mode,DMA Mode" bitfld.long 0x0 16.--17. "INTM,Interrupt Mode" "0: See above description,1: See above description,2: See above description,?" newline bitfld.long 0x0 12.--14. "PR,Priority Ratio" "0: The priority ratio is 1:1,1: The priority ratio is 2:1,2: The priority ratio is 3:1,3: The priority ratio is 4:1,4: The priority ratio is 5:1,5: The priority ratio is 6:1,6: The priority ratio is 7:1,7: The priority ratio is 8:1" newline bitfld.long 0x0 11. "TXPR,Transmit Priority" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "ARBC,Is reserved for NXP internal use" "0: NXP reserved field disabled,1: NXP reserved field enabled up on NXP request" newline bitfld.long 0x0 2.--4. "TAA,Transmit Arbitration Algorithm" "0: Fixed priority (Channel 0 has the lowest..,1: Weighted Strict Priority (WSP),2: Weighted Round-Robin (WRR),?,?,?,?,?" newline bitfld.long 0x0 1. "DA,DMA Tx or Rx Arbitration Scheme" "0: Weighted Round-Robin with Rx:Tx or Tx:Rx,1: Fixed Priority" newline bitfld.long 0x0 0. "SWR,Software Reset" "0: Disabled,1: Enabled" line.long 0x4 "DMA_SysBus_Mode,DMA System Bus Mode" bitfld.long 0x4 15. "RB,Rebuild INCRx Burst" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "MB,Mixed Burst" "0: Disabled,1: Enabled" newline bitfld.long 0x4 12. "AAL,Address-Aligned Beats" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0. "FB,Fixed Burst Length" "0: Disabled,1: Enabled" rgroup.long 0x1008++0x7 line.long 0x0 "DMA_Interrupt_Status,DMA Interrupt Status" bitfld.long 0x0 17. "MACIS,MAC Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 16. "MTLIS,MTL Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "DC1IS,DMA Channel 1 Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "DC0IS,DMA Channel 0 Interrupt Status" "0: Not detected,1: Detected" line.long 0x4 "DMA_Debug_Status0,DMA Debug Status 0" hexmask.long.byte 0x4 20.--23. 1. "TPS1,DMA Channel 1 Transmit Process State" newline hexmask.long.byte 0x4 16.--19. 1. "RPS1,DMA Channel 1 Receive Process State" newline hexmask.long.byte 0x4 12.--15. 1. "TPS0,DMA Channel 0 Transmit Process State" newline hexmask.long.byte 0x4 8.--11. 1. "RPS0,DMA Channel 0 Receive Process State" newline bitfld.long 0x4 0. "AXWHSTS,AHB Master Status" "0: Not detected,1: detected" group.long 0x1050++0x3 line.long 0x0 "DMA_TBS_CTRL,DMA TBS Control" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch Time Offset" newline bitfld.long 0x0 4.--6. "FGOS,Fetch GSN Offset" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "FTOV,Fetch Time Offset Valid" "0: Invalid,1: Valid" rgroup.long 0x1080++0x3 line.long 0x0 "DMA_Safety_Interrupt_Status,DMA Safety Interrupt Status" bitfld.long 0x0 31. "MCSIS,MAC Safety Uncorrectable Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 29. "MSUIS,MTL Safety Uncorrectable Error Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 28. "MSCIS,MTL Safety Correctable Error Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "DEUIS,DMA ECC Uncorrectable Error Interrupt Status" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "DECIS,DMA ECC Correctable Error Interrupt Status" "0: Not detected,1: Detected" group.long 0x1100++0xB line.long 0x0 "DMA_CH0_Control,DMA Channel 0 Control" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "PBLx8,8xPBL mode" "0: Disabled,1: Enabled" line.long 0x4 "DMA_CH0_Tx_Control,DMA Channel Tx Control" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 22. "ETIC,Early Transmit Interrupt Control" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x4 16.--21. 1. "TxPBL,Transmit Programmable Burst Length" newline bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0: Disabled,1: Enabled" newline bitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0: Stop,1: Start" line.long 0x8 "DMA_CH0_Rx_Control,DMA Channel Rx Control" bitfld.long 0x8 31. "RPF,Rx Packet Flush" "0: Disabled,1: Enabled" newline bitfld.long 0x8 22. "ERIC,Early Receive Interrupt Control" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x8 16.--21. 1. "RxPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 3.--14. 1. "RBSZ_13_y,Receive Buffer size High" newline rbitfld.long 0x8 1.--2. "RBSZ_x_0,Receive Buffer size Low" "0,1,2,3" newline bitfld.long 0x8 0. "SR,Start or Stop Receive" "0: Stop,1: Start" group.long 0x1114++0x3 line.long 0x0 "DMA_CH0_TxDesc_List_Address,DMA Channel 0 Tx Descriptor List Address" hexmask.long 0x0 2.--31. 1. "TDESLA,Start of Transmit List" group.long 0x111C++0x7 line.long 0x0 "DMA_CH0_RxDesc_List_Address,DMA Channel 0 Rx Descriptor List Address" hexmask.long 0x0 2.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "DMA_CH0_TxDesc_Tail_Pointer,DMA Channel 0 Tx Descriptor Tail Pointer" hexmask.long 0x4 2.--31. 1. "TDTP,Transmit Descriptor Tail Pointer" group.long 0x1128++0x17 line.long 0x0 "DMA_CH0_RxDesc_Tail_Pointer,DMA Channeli 0 Rx Descriptor List Pointer" hexmask.long 0x0 2.--31. 1. "RDTP,Receive Descriptor Tail Pointer" line.long 0x4 "DMA_CH0_TxDesc_Ring_Length,DMA Channel 0 Tx Descriptor Ring Length" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "DMA_CH0_RxDesc_Ring_Length,DMA Channel 0 Rx Descriptor Ring Length" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "DMA_CH0_Interrupt_Enable,DMA Channel 0 Interrupt Enable" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable" line.long 0x10 "DMA_CH0_Rx_Interrupt_Watchdog_Timer,DMA Channel 0 Rx Interrupt Watchdog Timer" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "0,1,2,3" newline hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "DMA_CH0_Slot_Function_Control_Status,DMA Channel 0 Slot Function Control Status" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" newline hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" newline bitfld.long 0x14 1. "ASC,Advance Slot Check" "0: Disabled,1: Enabled" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0: Disabled,1: Enabled" rgroup.long 0x1144++0x3 line.long 0x0 "DMA_CH0_Current_App_TxDesc,DMA Channel 0 Current Application Transmit Descriptor" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x114C++0x3 line.long 0x0 "DMA_CH0_Current_App_RxDesc,DMA Channel 0 Current Application Receive Descriptor" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x1154++0x3 line.long 0x0 "DMA_CH0_Current_App_TxBuffer,DMA Channel 0 Current Application Transmit Descriptor" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x115C++0x3 line.long 0x0 "DMA_CH0_Current_App_RxBuffer,DMA Channel 0 Current Application Receive Buffer" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x1160++0x3 line.long 0x0 "DMA_CH0_Status,DMA Channel 0 Status" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0: Not detected,1: Detected" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0: Not detected,1: Detected" newline bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0: Not detected,1: Detected" newline bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0: Not detected,1: Detected" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0: Not detected,1: Detected" newline bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0: Not detected,1: Detected" newline bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0: Not detected,1: Detected" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0: Not detected,1: Detected" newline bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0: Not detected,1: Detected" newline bitfld.long 0x0 6. "RI,Receive Interrupt" "0: Not detected,1: Detected" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "TI,Transmit Interrupt" "0: Not detected,1: Detected" rgroup.long 0x1164++0xB line.long 0x0 "DMA_CH0_Miss_Frame_Cnt,DMA Channel 0 Miss Frame Counter" bitfld.long 0x0 15. "MFCO,Overflow status of the MFC Counter" "0: Not occurred,1: Occurred" newline hexmask.long.word 0x0 0.--10. 1. "MFC,Dropped Packet Counters Indicates the number of packet counters that DMA drops either because of bus error or because of programing RPF field in DMA_CH{i}_Rx_Control register" line.long 0x4 "DMA_CH0_RXP_Accept_Cnt,DMA Channel 0 Rx Parser Accept Count" bitfld.long 0x4 31. "RXPACOF,Rx Parser Accept Counter Overflow Bit" "0: Not occurred,1: Occurred" newline hexmask.long 0x4 0.--30. 1. "RXPAC,Rx Parser Accept Counter" line.long 0x8 "DMA_CH0_RX_ERI_Cnt,DMA Channel 0 Rx ERI Count" hexmask.long.word 0x8 0.--11. 1. "ECNT,ERI Counter" group.long 0x1180++0xB line.long 0x0 "DMA_CH1_Control,DMA Channel 1 Control" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "PBLx8,8xPBL mode" "0: Disabled,1: Enabled" line.long 0x4 "DMA_CH1_Tx_Control,DMA Channel 1 Tx Control" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 22. "ETIC,Early Transmit Interrupt Control" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x4 16.--21. 1. "TxPBL,Transmit Programmable Burst Length" newline bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0: Disabled,1: Enabled" newline bitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0: Stop,1: Start" line.long 0x8 "DMA_CH1_Rx_Control,DMA Channel 1 Rx Control" bitfld.long 0x8 31. "RPF,Rx Packet Flush" "0: Disabled,1: Enabled" newline bitfld.long 0x8 22. "ERIC,Early Receive Interrupt Control" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x8 16.--21. 1. "RxPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 3.--14. 1. "RBSZ_13_y,Receive Buffer size High" newline rbitfld.long 0x8 1.--2. "RBSZ_x_0,Receive Buffer size Low" "0,1,2,3" newline bitfld.long 0x8 0. "SR,Start or Stop Receive" "0: Stop,1: Start" group.long 0x1194++0x3 line.long 0x0 "DMA_CH1_TxDesc_List_Address,DMA Channel 1 Tx Descriptor List Address" hexmask.long 0x0 2.--31. 1. "TDESLA,Start of Transmit List" group.long 0x119C++0x7 line.long 0x0 "DMA_CH1_RxDesc_List_Address,DMA Channel 1 Rx Descriptor List Address" hexmask.long 0x0 2.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "DMA_CH1_TxDesc_Tail_Pointer,DMA Channel 1 Tx Descriptor Tail Pointer" hexmask.long 0x4 2.--31. 1. "TDTP,Transmit Descriptor Tail Pointer" group.long 0x11A8++0x17 line.long 0x0 "DMA_CH1_RxDesc_Tail_Pointer,DMA Channel 1 Rx Descriptor Tail Pointer" hexmask.long 0x0 2.--31. 1. "RDTP,Receive Descriptor Tail Pointer" line.long 0x4 "DMA_CH1_TxDesc_Ring_Length,DMA Channel 1 Tx Descriptor Ring Length" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "DMA_CH1_RxDesc_Ring_Length,DMA Channel 1 Rx Descriptor Ring Length" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "DMA_CH1_Interrupt_Enable,DMA Channel 1 Interrupt Enable" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0: Disable,1: Enable" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable" line.long 0x10 "DMA_CH1_Rx_Interrupt_Watchdog_Timer,DMA Channel 1 Rx Interrupt Watchdog Timer" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "0,1,2,3" newline hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "DMA_CH1_Slot_Function_Control_Status,DMA Channel 1 Slot Function Control Status" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" newline hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" newline bitfld.long 0x14 1. "ASC,Advance Slot Check" "0: Disabled,1: Enabled" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0: Disable,1: Enable" rgroup.long 0x11C4++0x3 line.long 0x0 "DMA_CH1_Current_App_TxDesc,DMA Channel 1 Current Application Transmit Descriptor" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x11CC++0x3 line.long 0x0 "DMA_CH1_Current_App_RxDesc,DMA Channel 1 Current Application Receive Descriptor" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x11D4++0x3 line.long 0x0 "DMA_CH1_Current_App_TxBuffer,DMA Channel 1 Current Application Transmit Buffer" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x11DC++0x3 line.long 0x0 "DMA_CH1_Current_App_RxBuffer,DMA Channel 1 Current Application Receive Buffer" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x11E0++0x3 line.long 0x0 "DMA_CH1_Status,DMA Channel 1 Status" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0: Not detected,1: Detected" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0: Not detected,1: Detected" newline bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0: Not detected,1: Detected" newline bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0: Not detected,1: Detected" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0: Not detected,1: Detected" newline bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0: Not detected,1: Detected" newline bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0: Not detected,1: Detected" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0: Not detected,1: Detected" newline bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0: Not detected,1: Detected" newline bitfld.long 0x0 6. "RI,Receive Interrupt" "0: Not detected,1: Detected" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0: Not detected,1: Detected" newline bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0: Not detected,1: Detected" newline bitfld.long 0x0 0. "TI,Transmit Interrupt" "0: Not detected,1: Detected" rgroup.long 0x11E4++0xB line.long 0x0 "DMA_CH1_Miss_Frame_Cnt,DMA Channel 1 Miss Frame Counter" bitfld.long 0x0 15. "MFCO,Overflow status of the MFC Counter" "0: Not occurred,1: Occurred" newline hexmask.long.word 0x0 0.--10. 1. "MFC,Dropped Packet Counters" line.long 0x4 "DMA_CH1_RXP_Accept_Cnt,DMA Channel 1 Rx Parser Accept Count" bitfld.long 0x4 31. "RXPACOF,Rx Parser Accept Counter Overflow Bit" "0: Not occurred,1: Occurred" newline hexmask.long 0x4 0.--30. 1. "RXPAC,Rx Parser Accept Counter" line.long 0x8 "DMA_CH1_RX_ERI_Cnt,DMA Channel 1 Rx ERI Count" hexmask.long.word 0x8 0.--11. 1. "ECNT,ERI Counter" tree.end tree "EMIOS (Enhanced Modular IO Subsystem)" base ad:0x40088000 group.long 0x0++0x3 line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Enable,1: Disable" bitfld.long 0x0 29. "FRZ,Freeze" "0: Exit Freeze state,1: Enter Freeze state" newline bitfld.long 0x0 28. "GTBE,Global Timebase Enable" "0: Deassert GTBE_OUT,1: Assert GTBE_OUT" bitfld.long 0x0 27. "ETB,External Time Base" "0: Unified Channel,1: STAC" newline bitfld.long 0x0 26. "GPREN,Global Prescaler Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 16.--19. 1. "SRV,Server Time Slot" newline hexmask.long.byte 0x0 8.--15. 1. "GPRE,Global Prescaler" rgroup.long 0x4++0x3 line.long 0x0 "GFLAG,Global Flag" bitfld.long 0x0 23. "F23,Mirror of UC 23 FLAG" "0,1" bitfld.long 0x0 22. "F22,Mirror of UC 22 FLAG" "0,1" newline bitfld.long 0x0 21. "F21,Mirror of UC 21 FLAG" "0,1" bitfld.long 0x0 20. "F20,Mirror of UC 20 FLAG" "0,1" newline bitfld.long 0x0 19. "F19,Mirror of UC 19 FLAG" "0,1" bitfld.long 0x0 18. "F18,Mirror of UC 18 FLAG" "0,1" newline bitfld.long 0x0 17. "F17,Mirror of UC 17 FLAG" "0,1" bitfld.long 0x0 16. "F16,Mirror of UC 16 FLAG" "0,1" newline bitfld.long 0x0 15. "F15,Mirror of UC 15 FLAG" "0,1" bitfld.long 0x0 14. "F14,Mirror of UC 14 FLAG" "0,1" newline bitfld.long 0x0 13. "F13,Mirror of UC 13 FLAG" "0,1" bitfld.long 0x0 12. "F12,Mirror of UC 12 FLAG" "0,1" newline bitfld.long 0x0 11. "F11,Mirror of UC 11 FLAG" "0,1" bitfld.long 0x0 10. "F10,Mirror of UC 10 FLAG" "0,1" newline bitfld.long 0x0 9. "F9,Mirror of UC 9 FLAG" "0,1" bitfld.long 0x0 8. "F8,Mirror of UC 8 FLAG" "0,1" newline bitfld.long 0x0 7. "F7,Mirror of UC 7 FLAG" "0,1" bitfld.long 0x0 6. "F6,Mirror of UC 6 FLAG" "0,1" newline bitfld.long 0x0 5. "F5,Mirror of UC 5 FLAG" "0,1" bitfld.long 0x0 4. "F4,Mirror of UC 4 FLAG" "0,1" newline bitfld.long 0x0 3. "F3,Mirror of UC 3 FLAG" "0,1" bitfld.long 0x0 2. "F2,Mirror of UC 2 FLAG" "0,1" newline bitfld.long 0x0 1. "F1,Mirror of UC 1 FLAG" "0,1" bitfld.long 0x0 0. "F0,Mirror of UC 0 FLAG" "0,1" group.long 0x8++0x7 line.long 0x0 "OUDIS,Output Update Disable" bitfld.long 0x0 23. "OU23,Channel 23 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 22. "OU22,Channel 22 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 21. "OU21,Channel 21 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 20. "OU20,Channel 20 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 19. "OU19,Channel 19 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 18. "OU18,Channel 18 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 17. "OU17,Channel 17 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 16. "OU16,Channel 16 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 15. "OU15,Channel 15 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 14. "OU14,Channel 14 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 13. "OU13,Channel 13 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 12. "OU12,Channel 12 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 11. "OU11,Channel 11 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 10. "OU10,Channel 10 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 9. "OU9,Channel 9 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 8. "OU8,Channel 8 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 7. "OU7,Channel 7 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 6. "OU6,Channel 6 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 5. "OU5,Channel 5 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 4. "OU4,Channel 4 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 3. "OU3,Channel 3 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 2. "OU2,Channel 2 Output Update Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 1. "OU1,Channel 1 Output Update Disable" "0: Enable,1: Disable" bitfld.long 0x0 0. "OU0,Channel 0 Output Update Disable" "0: Enable,1: Disable" line.long 0x4 "UCDIS,Disable Channel" bitfld.long 0x4 23. "UCDIS23,Disable UC 23" "0: Enable,1: Disable" bitfld.long 0x4 22. "UCDIS22,Disable UC 22" "0: Enable,1: Disable" newline bitfld.long 0x4 21. "UCDIS21,Disable UC 21" "0: Enable,1: Disable" bitfld.long 0x4 20. "UCDIS20,Disable UC 20" "0: Enable,1: Disable" newline bitfld.long 0x4 19. "UCDIS19,Disable UC 19" "0: Enable,1: Disable" bitfld.long 0x4 18. "UCDIS18,Disable UC 18" "0: Enable,1: Disable" newline bitfld.long 0x4 17. "UCDIS17,Disable UC 17" "0: Enable,1: Disable" bitfld.long 0x4 16. "UCDIS16,Disable UC 16" "0: Enable,1: Disable" newline bitfld.long 0x4 15. "UCDIS15,Disable UC 15" "0: Enable,1: Disable" bitfld.long 0x4 14. "UCDIS14,Disable UC 14" "0: Enable,1: Disable" newline bitfld.long 0x4 13. "UCDIS13,Disable UC 13" "0: Enable,1: Disable" bitfld.long 0x4 12. "UCDIS12,Disable UC 12" "0: Enable,1: Disable" newline bitfld.long 0x4 11. "UCDIS11,Disable UC 11" "0: Enable,1: Disable" bitfld.long 0x4 10. "UCDIS10,Disable UC 10" "0: Enable,1: Disable" newline bitfld.long 0x4 9. "UCDIS9,Disable UC 9" "0: Enable,1: Disable" bitfld.long 0x4 8. "UCDIS8,Disable UC 8" "0: Enable,1: Disable" newline bitfld.long 0x4 7. "UCDIS7,Disable UC 7" "0: Enable,1: Disable" bitfld.long 0x4 6. "UCDIS6,Disable UC 6" "0: Enable,1: Disable" newline bitfld.long 0x4 5. "UCDIS5,Disable UC 5" "0: Enable,1: Disable" bitfld.long 0x4 4. "UCDIS4,Disable UC 4" "0: Enable,1: Disable" newline bitfld.long 0x4 3. "UCDIS3,Disable UC 3" "0: Enable,1: Disable" bitfld.long 0x4 2. "UCDIS2,Disable UC 2" "0: Enable,1: Disable" newline bitfld.long 0x4 1. "UCDIS1,Disable UC 1" "0: Enable,1: Disable" bitfld.long 0x4 0. "UCDIS0,Disable UC 0" "0: Enable,1: Disable" group.long 0x20++0x1B line.long 0x0 "A0,UC A 0" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B0,UC B 0" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT0,UC Counter 0" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C0,UC Control 0" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S0,UC Status 0" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA0,Alternate Address 0" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_0,UC Control 2 0" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x40++0x1B line.long 0x0 "A1,UC A 1" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B1,UC B 1" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT1,UC Counter 1" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C1,UC Control 1" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S1,UC Status 1" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA1,Alternate Address 1" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_1,UC Control 2 1" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x60++0x1B line.long 0x0 "A2,UC A 2" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B2,UC B 2" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT2,UC Counter 2" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C2,UC Control 2" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S2,UC Status 2" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA2,Alternate Address 2" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_2,UC Control 2 2" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x80++0x1B line.long 0x0 "A3,UC A 3" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B3,UC B 3" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT3,UC Counter 3" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C3,UC Control 3" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S3,UC Status 3" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA3,Alternate Address 3" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_3,UC Control 2 3" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0xA0++0x1B line.long 0x0 "A4,UC A 4" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B4,UC B 4" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT4,UC Counter 4" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C4,UC Control 4" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S4,UC Status 4" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA4,Alternate Address 4" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_4,UC Control 2 4" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0xC0++0x1B line.long 0x0 "A5,UC A 5" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B5,UC B 5" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT5,UC Counter 5" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C5,UC Control 5" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S5,UC Status 5" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA5,Alternate Address 5" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_5,UC Control 2 5" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0xE0++0x1B line.long 0x0 "A6,UC A 6" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B6,UC B 6" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT6,UC Counter 6" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C6,UC Control 6" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S6,UC Status 6" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA6,Alternate Address 6" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_6,UC Control 2 6" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x100++0x1B line.long 0x0 "A7,UC A 7" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B7,UC B 7" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT7,UC Counter 7" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C7,UC Control 7" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S7,UC Status 7" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA7,Alternate Address 7" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_7,UC Control 2 7" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x120++0x1B line.long 0x0 "A8,UC A 8" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B8,UC B 8" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT8,UC Counter 8" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C8,UC Control 8" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S8,UC Status 8" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA8,Alternate Address 8" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_8,UC Control 2 8" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x140++0x1B line.long 0x0 "A9,UC A 9" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B9,UC B 9" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT9,UC Counter 9" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C9,UC Control 9" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S9,UC Status 9" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA9,Alternate Address 9" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_9,UC Control 2 9" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x160++0x1B line.long 0x0 "A10,UC A 10" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B10,UC B 10" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT10,UC Counter 10" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C10,UC Control 10" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S10,UC Status 10" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA10,Alternate Address 10" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_10,UC Control 2 10" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x180++0x1B line.long 0x0 "A11,UC A 11" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B11,UC B 11" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT11,UC Counter 11" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C11,UC Control 11" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S11,UC Status 11" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA11,Alternate Address 11" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_11,UC Control 2 11" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x1A0++0x1B line.long 0x0 "A12,UC A 12" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B12,UC B 12" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT12,UC Counter 12" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C12,UC Control 12" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S12,UC Status 12" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA12,Alternate Address 12" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_12,UC Control 2 12" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x1C0++0x1B line.long 0x0 "A13,UC A 13" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B13,UC B 13" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT13,UC Counter 13" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C13,UC Control 13" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S13,UC Status 13" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA13,Alternate Address 13" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_13,UC Control 2 13" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x1E0++0x1B line.long 0x0 "A14,UC A 14" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B14,UC B 14" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT14,UC Counter 14" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C14,UC Control 14" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S14,UC Status 14" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA14,Alternate Address 14" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_14,UC Control 2 14" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x200++0x1B line.long 0x0 "A15,UC A 15" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B15,UC B 15" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT15,UC Counter 15" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C15,UC Control 15" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S15,UC Status 15" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA15,Alternate Address 15" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_15,UC Control 2 15" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x220++0x1B line.long 0x0 "A16,UC A 16" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B16,UC B 16" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT16,UC Counter 16" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C16,UC Control 16" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S16,UC Status 16" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA16,Alternate Address 16" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_16,UC Control 2 16" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x240++0x1B line.long 0x0 "A17,UC A 17" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B17,UC B 17" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT17,UC Counter 17" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C17,UC Control 17" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S17,UC Status 17" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA17,Alternate Address 17" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_17,UC Control 2 17" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x260++0x1B line.long 0x0 "A18,UC A 18" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B18,UC B 18" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT18,UC Counter 18" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C18,UC Control 18" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S18,UC Status 18" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA18,Alternate Address 18" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_18,UC Control 2 18" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x280++0x1B line.long 0x0 "A19,UC A 19" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B19,UC B 19" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT19,UC Counter 19" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C19,UC Control 19" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S19,UC Status 19" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA19,Alternate Address 19" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_19,UC Control 2 19" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x2A0++0x1B line.long 0x0 "A20,UC A 20" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B20,UC B 20" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT20,UC Counter 20" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C20,UC Control 20" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S20,UC Status 20" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA20,Alternate Address 20" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_20,UC Control 2 20" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x2C0++0x1B line.long 0x0 "A21,UC A 21" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B21,UC B 21" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT21,UC Counter 21" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C21,UC Control 21" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S21,UC Status 21" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA21,Alternate Address 21" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_21,UC Control 2 21" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x2E0++0x1B line.long 0x0 "A22,UC A 22" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B22,UC B 22" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT22,UC Counter 22" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C22,UC Control 22" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S22,UC Status 22" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA22,Alternate Address 22" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_22,UC Control 2 22" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" group.long 0x300++0x1B line.long 0x0 "A23,UC A 23" rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "A,A" line.long 0x4 "B23,UC B 23" hexmask.long.tbyte 0x4 0.--23. 1. "B,B" line.long 0x8 "CNT23,UC Counter 23" hexmask.long.tbyte 0x8 0.--23. 1. "C,Internal Counter Value" line.long 0xC "C23,UC Control 23" bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin" newline bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3" bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4" newline bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable" bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request" newline hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter" bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock" newline bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable" bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A" newline bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B" bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3" newline bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1" bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1" newline hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection" line.long 0x10 "S23,UC Status 23" eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun" eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow" newline rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted" rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted" newline eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred" line.long 0x14 "ALTA23,Alternate Address 23" hexmask.long.tbyte 0x14 0.--23. 1. "ALTA,Alternate Address" line.long 0x18 "C2_23,UC Control 2 23" hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler" bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock" newline hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval" tree.end tree "ERM (Error Recording Module)" base ad:0x0 tree "ERM_0" base ad:0x4025C000 group.long 0x0++0xB line.long 0x0 "CR0,ERM Configuration Register 0" bitfld.long 0x0 31. "ESCIE0,ESCIE0" "0: Interrupt notification of Memory 0 single-bit..,1: Interrupt notification of Memory 0 single-bit.." bitfld.long 0x0 30. "ENCIE0,ENCIE0" "0: Interrupt notification of Memory 0..,1: Interrupt notification of Memory 0.." newline bitfld.long 0x0 27. "ESCIE1,ESCIE1" "0: Interrupt notification of Memory 1 single-bit..,1: Interrupt notification of Memory 1 single-bit.." bitfld.long 0x0 26. "ENCIE1,ENCIE1" "0: Interrupt notification of Memory 1..,1: Interrupt notification of Memory 1.." newline bitfld.long 0x0 23. "ESCIE2,ESCIE2" "0: Interrupt notification of Memory 2 single-bit..,1: Interrupt notification of Memory 2 single-bit.." bitfld.long 0x0 22. "ENCIE2,ENCIE2" "0: Interrupt notification of Memory 2..,1: Interrupt notification of Memory 2.." newline bitfld.long 0x0 19. "ESCIE3,ESCIE3" "0: Interrupt notification of Memory 3 single-bit..,1: Interrupt notification of Memory 3 single-bit.." bitfld.long 0x0 18. "ENCIE3,ENCIE3" "0: Interrupt notification of Memory 3..,1: Interrupt notification of Memory 3.." newline bitfld.long 0x0 15. "ESCIE4,ESCIE4" "0: Interrupt notification of Memory 4 single-bit..,1: Interrupt notification of Memory 4 single-bit.." bitfld.long 0x0 14. "ENCIE4,ENCIE4" "0: Interrupt notification of Memory 4..,1: Interrupt notification of Memory 4.." newline bitfld.long 0x0 11. "ESCIE5,ESCIE5" "0: Interrupt notification of Memory 5 single-bit..,1: Interrupt notification of Memory 5 single-bit.." bitfld.long 0x0 10. "ENCIE5,ENCIE5" "0: Interrupt notification of Memory 5..,1: Interrupt notification of Memory 5.." newline bitfld.long 0x0 7. "ESCIE6,ESCIE6" "0: Interrupt notification of Memory 6 single-bit..,1: Interrupt notification of Memory 6 single-bit.." bitfld.long 0x0 6. "ENCIE6,ENCIE6" "0: Interrupt notification of Memory 6..,1: Interrupt notification of Memory 6.." newline bitfld.long 0x0 3. "ESCIE7,ESCIE7" "0: Interrupt notification of Memory 7 single-bit..,1: Interrupt notification of Memory 7 single-bit.." bitfld.long 0x0 2. "ENCIE7,ENCIE7" "0: Interrupt notification of Memory 7..,1: Interrupt notification of Memory 7.." line.long 0x4 "CR1,ERM Configuration Register 1" bitfld.long 0x4 31. "ESCIE8,ESCIE8" "0: Interrupt notification of Memory 8 single-bit..,1: Interrupt notification of Memory 8 single-bit.." bitfld.long 0x4 30. "ENCIE8,ENCIE8" "0: Interrupt notification of Memory 8..,1: Interrupt notification of Memory 8.." newline bitfld.long 0x4 27. "ESCIE9,ESCIE9" "0: Interrupt notification of Memory 9 single-bit..,1: Interrupt notification of Memory 9 single-bit.." bitfld.long 0x4 26. "ENCIE9,ENCIE9" "0: Interrupt notification of Memory 9..,1: Interrupt notification of Memory 9.." newline bitfld.long 0x4 23. "ESCIE10,ESCIE10" "0: Interrupt notification of Memory 10 single-bit..,1: Interrupt notification of Memory 10 single-bit.." bitfld.long 0x4 22. "ENCIE10,ENCIE10" "0: Interrupt notification of Memory 10..,1: Interrupt notification of Memory 10.." newline bitfld.long 0x4 19. "ESCIE11,ESCIE11" "0: Interrupt notification of Memory 11 single-bit..,1: Interrupt notification of Memory 11 single-bit.." bitfld.long 0x4 18. "ENCIE11,ENCIE11" "0: Interrupt notification of Memory 11..,1: Interrupt notification of Memory 11.." newline bitfld.long 0x4 15. "ESCIE12,ESCIE12" "0: Interrupt notification of Memory 12 single-bit..,1: Interrupt notification of Memory 12 single-bit.." bitfld.long 0x4 14. "ENCIE12,ENCIE12" "0: Interrupt notification of Memory 12..,1: Interrupt notification of Memory 12.." newline bitfld.long 0x4 11. "ESCIE13,ESCIE13" "0: Interrupt notification of Memory 13 single-bit..,1: Interrupt notification of Memory 13 single-bit.." bitfld.long 0x4 10. "ENCIE13,ENCIE13" "0: Interrupt notification of Memory 13..,1: Interrupt notification of Memory 13.." newline bitfld.long 0x4 7. "ESCIE14,ESCIE14" "0: Interrupt notification of Memory 14 single-bit..,1: Interrupt notification of Memory 14 single-bit.." bitfld.long 0x4 6. "ENCIE14,ENCIE14" "0: Interrupt notification of Memory 14..,1: Interrupt notification of Memory 14.." newline bitfld.long 0x4 3. "ESCIE15,ESCIE15" "0: Interrupt notification of Memory 15 single-bit..,1: Interrupt notification of Memory 15 single-bit.." bitfld.long 0x4 2. "ENCIE15,ENCIE15" "0: Interrupt notification of Memory 15..,1: Interrupt notification of Memory 15.." line.long 0x8 "CR2,ERM Configuration Register 2" bitfld.long 0x8 31. "ESCIE16,ESCIE16" "0: Interrupt notification of Memory 16 single-bit..,1: Interrupt notification of Memory 16 single-bit.." bitfld.long 0x8 30. "ENCIE16,ENCIE16" "0: Interrupt notification of Memory 16..,1: Interrupt notification of Memory 16.." newline bitfld.long 0x8 27. "ESCIE17,ESCIE17" "0: Interrupt notification of Memory 17 single-bit..,1: Interrupt notification of Memory 17 single-bit.." bitfld.long 0x8 26. "ENCIE17,ENCIE17" "0: Interrupt notification of Memory 17..,1: Interrupt notification of Memory 17.." newline bitfld.long 0x8 23. "ESCIE18,ESCIE18" "0: Interrupt notification of Memory 18 single-bit..,1: Interrupt notification of Memory 18 single-bit.." bitfld.long 0x8 22. "ENCIE18,ENCIE18" "0: Interrupt notification of Memory 18..,1: Interrupt notification of Memory 18.." newline bitfld.long 0x8 19. "ESCIE19,ESCIE19" "0: Interrupt notification of Memory 19 single-bit..,1: Interrupt notification of Memory 19 single-bit.." bitfld.long 0x8 18. "ENCIE19,ENCIE19" "0: Interrupt notification of Memory 19..,1: Interrupt notification of Memory 19.." group.long 0x10++0xB line.long 0x0 "SR0,ERM Status Register 0" eventfld.long 0x0 31. "SBC0,SBC0" "0: No single-bit correction event on Memory 0..,1: Single-bit correction event on Memory 0 detected." eventfld.long 0x0 30. "NCE0,NCE0" "0: No non-correctable error event on Memory 0..,1: Non-correctable error event on Memory 0 detected." newline eventfld.long 0x0 27. "SBC1,SBC1" "0: No single-bit correction event on Memory 1..,1: Single-bit correction event on Memory 1 detected." eventfld.long 0x0 26. "NCE1,NCE1" "0: No non-correctable error event on Memory 1..,1: Non-correctable error event on Memory 1 detected." newline eventfld.long 0x0 23. "SBC2,SBC2" "0: No single-bit correction event on Memory 2..,1: Single-bit correction event on Memory 2 detected." eventfld.long 0x0 22. "NCE2,NCE2" "0: No non-correctable error event on Memory 2..,1: Non-correctable error event on Memory 2 detected." newline eventfld.long 0x0 19. "SBC3,SBC3" "0: No single-bit correction event on Memory 3..,1: Single-bit correction event on Memory 3 detected." eventfld.long 0x0 18. "NCE3,NCE3" "0: No non-correctable error event on Memory 3..,1: Non-correctable error event on Memory 3 detected." newline eventfld.long 0x0 15. "SBC4,SBC4" "0: No single-bit correction event on Memory 4..,1: Single-bit correction event on Memory 4 detected." eventfld.long 0x0 14. "NCE4,NCE4" "0: No non-correctable error event on Memory 4..,1: Non-correctable error event on Memory 4 detected." newline eventfld.long 0x0 11. "SBC5,SBC5" "0: No single-bit correction event on Memory 5..,1: Single-bit correction event on Memory 5 detected." eventfld.long 0x0 10. "NCE5,NCE5" "0: No non-correctable error event on Memory 5..,1: Non-correctable error event on Memory 5 detected." newline eventfld.long 0x0 7. "SBC6,SBC6" "0: No single-bit correction event on Memory 6..,1: Single-bit correction event on Memory 6 detected." eventfld.long 0x0 6. "NCE6,NCE6" "0: No non-correctable error event on Memory 6..,1: Non-correctable error event on Memory 6 detected." newline eventfld.long 0x0 3. "SBC7,SBC7" "0: No single-bit correction event on Memory 7..,1: Single-bit correction event on Memory 7 detected." eventfld.long 0x0 2. "NCE7,NCE7" "0: No non-correctable error event on Memory 7..,1: Non-correctable error event on Memory 7 detected." line.long 0x4 "SR1,ERM Status Register 1" eventfld.long 0x4 31. "SBC8,SBC8" "0: No single-bit correction event on Memory 8..,1: Single-bit correction event on Memory 8 detected." eventfld.long 0x4 30. "NCE8,NCE8" "0: No non-correctable error event on Memory 8..,1: Non-correctable error event on Memory 8 detected." newline eventfld.long 0x4 27. "SBC9,SBC9" "0: No single-bit correction event on Memory 9..,1: Single-bit correction event on Memory 9 detected." eventfld.long 0x4 26. "NCE9,NCE9" "0: No non-correctable error event on Memory 9..,1: Non-correctable error event on Memory 9 detected." newline eventfld.long 0x4 23. "SBC10,SBC10" "0: No single-bit correction event on Memory 10..,1: Single-bit correction event on Memory 10 detected." eventfld.long 0x4 22. "NCE10,NCE10" "0: No non-correctable error event on Memory 10..,1: Non-correctable error event on Memory 10 detected." newline eventfld.long 0x4 19. "SBC11,SBC11" "0: No single-bit correction event on Memory 11..,1: Single-bit correction event on Memory 11 detected." eventfld.long 0x4 18. "NCE11,NCE11" "0: No non-correctable error event on Memory 11..,1: Non-correctable error event on Memory 11 detected." newline eventfld.long 0x4 15. "SBC12,SBC12" "0: No single-bit correction event on Memory 12..,1: Single-bit correction event on Memory 12 detected." eventfld.long 0x4 14. "NCE12,NCE12" "0: No non-correctable error event on Memory 12..,1: Non-correctable error event on Memory 12 detected." newline eventfld.long 0x4 11. "SBC13,SBC13" "0: No single-bit correction event on Memory 13..,1: Single-bit correction event on Memory 13 detected." eventfld.long 0x4 10. "NCE13,NCE13" "0: No non-correctable error event on Memory 13..,1: Non-correctable error event on Memory 13 detected." newline eventfld.long 0x4 7. "SBC14,SBC14" "0: No single-bit correction event on Memory 14..,1: Single-bit correction event on Memory 14 detected." eventfld.long 0x4 6. "NCE14,NCE14" "0: No non-correctable error event on Memory 14..,1: Non-correctable error event on Memory 14 detected." newline eventfld.long 0x4 3. "SBC15,SBC15" "0: No single-bit correction event on Memory 15..,1: Single-bit correction event on Memory 15 detected." eventfld.long 0x4 2. "NCE15,NCE15" "0: No non-correctable error event on Memory 15..,1: Non-correctable error event on Memory 15 detected." line.long 0x8 "SR2,ERM Status Register 2" eventfld.long 0x8 31. "SBC16,SBC16" "0: No single-bit correction event on Memory 16..,1: Single-bit correction event on Memory 16 detected." eventfld.long 0x8 30. "NCE16,NCE16" "0: No non-correctable error event on Memory 16..,1: Non-correctable error event on Memory 16 detected." newline eventfld.long 0x8 27. "SBC17,SBC17" "0: No single-bit correction event on Memory 17..,1: Single-bit correction event on Memory 17 detected." eventfld.long 0x8 26. "NCE17,NCE17" "0: No non-correctable error event on Memory 17..,1: Non-correctable error event on Memory 17 detected." newline eventfld.long 0x8 23. "SBC18,SBC18" "0: No single-bit correction event on Memory 18..,1: Single-bit correction event on Memory 18 detected." eventfld.long 0x8 22. "NCE18,NCE18" "0: No non-correctable error event on Memory 18..,1: Non-correctable error event on Memory 18 detected." newline eventfld.long 0x8 19. "SBC19,SBC19" "0: No single-bit correction event on Memory 19..,1: Single-bit correction event on Memory 19 detected." eventfld.long 0x8 18. "NCE19,NCE19" "0: No non-correctable error event on Memory 19..,1: Non-correctable error event on Memory 19 detected." rgroup.long 0x100++0x7 line.long 0x0 "EAR0,ERM Memory 0 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN0,ERM Memory 0 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x108++0x3 line.long 0x0 "CORR_ERR_CNT0,ERM Memory 0 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x110++0x7 line.long 0x0 "EAR1,ERM Memory 1 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN1,ERM Memory 1 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x118++0x3 line.long 0x0 "CORR_ERR_CNT1,ERM Memory 1 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x128++0x3 line.long 0x0 "CORR_ERR_CNT2,ERM Memory 2 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x138++0x3 line.long 0x0 "CORR_ERR_CNT3,ERM Memory 3 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x148++0x3 line.long 0x0 "CORR_ERR_CNT4,ERM Memory 4 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x158++0x3 line.long 0x0 "CORR_ERR_CNT5,ERM Memory 5 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x168++0x3 line.long 0x0 "CORR_ERR_CNT6,ERM Memory 6 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x178++0x3 line.long 0x0 "CORR_ERR_CNT7,ERM Memory 7 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x188++0x3 line.long 0x0 "CORR_ERR_CNT8,ERM Memory 8 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x198++0x3 line.long 0x0 "CORR_ERR_CNT9,ERM Memory 9 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1A0++0x7 line.long 0x0 "EAR10,ERM Memory 10 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN10,ERM Memory 10 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1A8++0x3 line.long 0x0 "CORR_ERR_CNT10,ERM Memory 10 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1B0++0x7 line.long 0x0 "EAR11,ERM Memory 11 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN11,ERM Memory 11 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1B8++0x3 line.long 0x0 "CORR_ERR_CNT11,ERM Memory 11 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1C0++0x7 line.long 0x0 "EAR12,ERM Memory 12 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN12,ERM Memory 12 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1C8++0x3 line.long 0x0 "CORR_ERR_CNT12,ERM Memory 12 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1D0++0x7 line.long 0x0 "EAR13,ERM Memory 13 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN13,ERM Memory 13 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1D8++0x3 line.long 0x0 "CORR_ERR_CNT13,ERM Memory 13 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1E0++0x7 line.long 0x0 "EAR14,ERM Memory 14 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN14,ERM Memory 14 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1E8++0x3 line.long 0x0 "CORR_ERR_CNT14,ERM Memory 14 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1F0++0x7 line.long 0x0 "EAR15,ERM Memory 15 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN15,ERM Memory 15 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1F8++0x3 line.long 0x0 "CORR_ERR_CNT15,ERM Memory 15 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x200++0x7 line.long 0x0 "EAR16,ERM Memory 16 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN16,ERM Memory 16 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x208++0x3 line.long 0x0 "CORR_ERR_CNT16,ERM Memory 16 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x210++0x3 line.long 0x0 "EAR17,ERM Memory 17 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" group.long 0x218++0x3 line.long 0x0 "CORR_ERR_CNT17,ERM Memory 17 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x220++0x3 line.long 0x0 "EAR18,ERM Memory 18 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" group.long 0x228++0x3 line.long 0x0 "CORR_ERR_CNT18,ERM Memory 18 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x230++0x3 line.long 0x0 "EAR19,ERM Memory 19 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" group.long 0x238++0x3 line.long 0x0 "CORR_ERR_CNT19,ERM Memory 19 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" tree.end tree "ERM_1" base ad:0x4000C000 group.long 0x0++0xB line.long 0x0 "CR0,ERM Configuration Register 0" bitfld.long 0x0 23. "ESCIE2,ESCIE2" "0: Interrupt notification of Memory 2 single-bit..,1: Interrupt notification of Memory 2 single-bit.." bitfld.long 0x0 22. "ENCIE2,ENCIE2" "0: Interrupt notification of Memory 2..,1: Interrupt notification of Memory 2.." newline bitfld.long 0x0 19. "ESCIE3,ESCIE3" "0: Interrupt notification of Memory 3 single-bit..,1: Interrupt notification of Memory 3 single-bit.." bitfld.long 0x0 18. "ENCIE3,ENCIE3" "0: Interrupt notification of Memory 3..,1: Interrupt notification of Memory 3.." newline bitfld.long 0x0 15. "ESCIE4,ESCIE4" "0: Interrupt notification of Memory 4 single-bit..,1: Interrupt notification of Memory 4 single-bit.." bitfld.long 0x0 14. "ENCIE4,ENCIE4" "0: Interrupt notification of Memory 4..,1: Interrupt notification of Memory 4.." newline bitfld.long 0x0 11. "ESCIE5,ESCIE5" "0: Interrupt notification of Memory 5 single-bit..,1: Interrupt notification of Memory 5 single-bit.." bitfld.long 0x0 10. "ENCIE5,ENCIE5" "0: Interrupt notification of Memory 5..,1: Interrupt notification of Memory 5.." line.long 0x4 "CR1,ERM Configuration Register 1" bitfld.long 0x4 23. "ESCIE10,ESCIE10" "0: Interrupt notification of Memory 10 single-bit..,1: Interrupt notification of Memory 10 single-bit.." bitfld.long 0x4 22. "ENCIE10,ENCIE10" "0: Interrupt notification of Memory 10..,1: Interrupt notification of Memory 10.." newline bitfld.long 0x4 19. "ESCIE11,ESCIE11" "0: Interrupt notification of Memory 11 single-bit..,1: Interrupt notification of Memory 11 single-bit.." bitfld.long 0x4 18. "ENCIE11,ENCIE11" "0: Interrupt notification of Memory 11..,1: Interrupt notification of Memory 11.." newline bitfld.long 0x4 15. "ESCIE12,ESCIE12" "0: Interrupt notification of Memory 12 single-bit..,1: Interrupt notification of Memory 12 single-bit.." bitfld.long 0x4 14. "ENCIE12,ENCIE12" "0: Interrupt notification of Memory 12..,1: Interrupt notification of Memory 12.." line.long 0x8 "CR2,ERM Configuration Register 2" bitfld.long 0x8 31. "ESCIE16,ESCIE16" "0: Interrupt notification of Memory 16 single-bit..,1: Interrupt notification of Memory 16 single-bit.." bitfld.long 0x8 30. "ENCIE16,ENCIE16" "0: Interrupt notification of Memory 16..,1: Interrupt notification of Memory 16.." newline bitfld.long 0x8 27. "ESCIE17,ESCIE17" "0: Interrupt notification of Memory 17 single-bit..,1: Interrupt notification of Memory 17 single-bit.." bitfld.long 0x8 26. "ENCIE17,ENCIE17" "0: Interrupt notification of Memory 17..,1: Interrupt notification of Memory 17.." newline bitfld.long 0x8 23. "ESCIE18,ESCIE18" "0: Interrupt notification of Memory 18 single-bit..,1: Interrupt notification of Memory 18 single-bit.." bitfld.long 0x8 22. "ENCIE18,ENCIE18" "0: Interrupt notification of Memory 18..,1: Interrupt notification of Memory 18.." newline bitfld.long 0x8 19. "ESCIE19,ESCIE19" "0: Interrupt notification of Memory 19 single-bit..,1: Interrupt notification of Memory 19 single-bit.." bitfld.long 0x8 18. "ENCIE19,ENCIE19" "0: Interrupt notification of Memory 19..,1: Interrupt notification of Memory 19.." newline bitfld.long 0x8 15. "ESCIE20,ESCIE20" "0: Interrupt notification of Memory 20 single-bit..,1: Interrupt notification of Memory 20 single-bit.." bitfld.long 0x8 14. "ENCIE20,ENCIE20" "0: Interrupt notification of Memory 20..,1: Interrupt notification of Memory 20.." newline bitfld.long 0x8 11. "ESCIE21,ESCIE21" "0: Interrupt notification of Memory 21 single-bit..,1: Interrupt notification of Memory 21 single-bit.." bitfld.long 0x8 10. "ENCIE21,ENCIE21" "0: Interrupt notification of Memory 21..,1: Interrupt notification of Memory 21.." newline bitfld.long 0x8 7. "ESCIE22,ESCIE22" "0: Interrupt notification of Memory 22 single-bit..,1: Interrupt notification of Memory 22 single-bit.." bitfld.long 0x8 6. "ENCIE22,ENCIE22" "0: Interrupt notification of Memory 22..,1: Interrupt notification of Memory 22.." newline bitfld.long 0x8 3. "ESCIE23,ESCIE23" "0: Interrupt notification of Memory 23 single-bit..,1: Interrupt notification of Memory 23 single-bit.." bitfld.long 0x8 2. "ENCIE23,ENCIE23" "0: Interrupt notification of Memory 23..,1: Interrupt notification of Memory 23.." group.long 0x10++0xB line.long 0x0 "SR0,ERM Status Register 0" eventfld.long 0x0 23. "SBC2,SBC2" "0: No single-bit correction event on Memory 2..,1: Single-bit correction event on Memory 2 detected." eventfld.long 0x0 22. "NCE2,NCE2" "0: No non-correctable error event on Memory 2..,1: Non-correctable error event on Memory 2 detected." newline eventfld.long 0x0 19. "SBC3,SBC3" "0: No single-bit correction event on Memory 3..,1: Single-bit correction event on Memory 3 detected." eventfld.long 0x0 18. "NCE3,NCE3" "0: No non-correctable error event on Memory 3..,1: Non-correctable error event on Memory 3 detected." newline eventfld.long 0x0 15. "SBC4,SBC4" "0: No single-bit correction event on Memory 4..,1: Single-bit correction event on Memory 4 detected." eventfld.long 0x0 14. "NCE4,NCE4" "0: No non-correctable error event on Memory 4..,1: Non-correctable error event on Memory 4 detected." newline eventfld.long 0x0 11. "SBC5,SBC5" "0: No single-bit correction event on Memory 5..,1: Single-bit correction event on Memory 5 detected." eventfld.long 0x0 10. "NCE5,NCE5" "0: No non-correctable error event on Memory 5..,1: Non-correctable error event on Memory 5 detected." line.long 0x4 "SR1,ERM Status Register 1" eventfld.long 0x4 23. "SBC10,SBC10" "0: No single-bit correction event on Memory 10..,1: Single-bit correction event on Memory 10 detected." eventfld.long 0x4 22. "NCE10,NCE10" "0: No non-correctable error event on Memory 10..,1: Non-correctable error event on Memory 10 detected." newline eventfld.long 0x4 19. "SBC11,SBC11" "0: No single-bit correction event on Memory 11..,1: Single-bit correction event on Memory 11 detected." eventfld.long 0x4 18. "NCE11,NCE11" "0: No non-correctable error event on Memory 11..,1: Non-correctable error event on Memory 11 detected." newline eventfld.long 0x4 15. "SBC12,SBC12" "0: No single-bit correction event on Memory 12..,1: Single-bit correction event on Memory 12 detected." eventfld.long 0x4 14. "NCE12,NCE12" "0: No non-correctable error event on Memory 12..,1: Non-correctable error event on Memory 12 detected." line.long 0x8 "SR2,ERM Status Register 2" eventfld.long 0x8 31. "SBC16,SBC16" "0: No single-bit correction event on Memory 16..,1: Single-bit correction event on Memory 16 detected." eventfld.long 0x8 30. "NCE16,NCE16" "0: No non-correctable error event on Memory 16..,1: Non-correctable error event on Memory 16 detected." newline eventfld.long 0x8 27. "SBC17,SBC17" "0: No single-bit correction event on Memory 17..,1: Single-bit correction event on Memory 17 detected." eventfld.long 0x8 26. "NCE17,NCE17" "0: No non-correctable error event on Memory 17..,1: Non-correctable error event on Memory 17 detected." newline eventfld.long 0x8 23. "SBC18,SBC18" "0: No single-bit correction event on Memory 18..,1: Single-bit correction event on Memory 18 detected." eventfld.long 0x8 22. "NCE18,NCE18" "0: No non-correctable error event on Memory 18..,1: Non-correctable error event on Memory 18 detected." newline eventfld.long 0x8 19. "SBC19,SBC19" "0: No single-bit correction event on Memory 19..,1: Single-bit correction event on Memory 19 detected." eventfld.long 0x8 18. "NCE19,NCE19" "0: No non-correctable error event on Memory 19..,1: Non-correctable error event on Memory 19 detected." newline eventfld.long 0x8 15. "SBC20,SBC20" "0: No single-bit correction event on Memory 20..,1: Single-bit correction event on Memory 20 detected." eventfld.long 0x8 14. "NCE20,NCE20" "0: No non-correctable error event on Memory 20..,1: Non-correctable error event on Memory 20 detected." newline eventfld.long 0x8 11. "SBC21,SBC21" "0: No single-bit correction event on Memory 21..,1: Single-bit correction event on Memory 21 detected." eventfld.long 0x8 10. "NCE21,NCE21" "0: No non-correctable error event on Memory 21..,1: Non-correctable error event on Memory 21 detected." newline eventfld.long 0x8 7. "SBC22,SBC22" "0: No single-bit correction event on Memory 22..,1: Single-bit correction event on Memory 22 detected." eventfld.long 0x8 6. "NCE22,NCE22" "0: No non-correctable error event on Memory 22..,1: Non-correctable error event on Memory 22 detected." newline eventfld.long 0x8 3. "SBC23,SBC23" "0: No single-bit correction event on Memory 23..,1: Single-bit correction event on Memory 23 detected." eventfld.long 0x8 2. "NCE23,NCE23" "0: No non-correctable error event on Memory 23 has..,1: Non-correctable error event on Memory 23 detected." group.long 0x128++0x3 line.long 0x0 "CORR_ERR_CNT2,ERM Memory 2 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x138++0x3 line.long 0x0 "CORR_ERR_CNT3,ERM Memory 3 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x148++0x3 line.long 0x0 "CORR_ERR_CNT4,ERM Memory 4 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" group.long 0x158++0x3 line.long 0x0 "CORR_ERR_CNT5,ERM Memory 5 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1A0++0x7 line.long 0x0 "EAR10,ERM Memory 10 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN10,ERM Memory 10 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1A8++0x3 line.long 0x0 "CORR_ERR_CNT10,ERM Memory 10 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1B0++0x7 line.long 0x0 "EAR11,ERM Memory 11 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN11,ERM Memory 11 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1B8++0x3 line.long 0x0 "CORR_ERR_CNT11,ERM Memory 11 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x1C0++0x7 line.long 0x0 "EAR12,ERM Memory 12 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN12,ERM Memory 12 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x1C8++0x3 line.long 0x0 "CORR_ERR_CNT12,ERM Memory 12 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x200++0x7 line.long 0x0 "EAR16,ERM Memory 16 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN16,ERM Memory 16 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x208++0x3 line.long 0x0 "CORR_ERR_CNT16,ERM Memory 16 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x210++0x3 line.long 0x0 "EAR17,ERM Memory 17 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" group.long 0x218++0x3 line.long 0x0 "CORR_ERR_CNT17,ERM Memory 17 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x220++0x7 line.long 0x0 "EAR18,ERM Memory 18 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN18,ERM Memory 18 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x228++0x3 line.long 0x0 "CORR_ERR_CNT18,ERM Memory 18 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x230++0x7 line.long 0x0 "EAR19,ERM Memory 19 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN19,ERM Memory 19 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x238++0x3 line.long 0x0 "CORR_ERR_CNT19,ERM Memory 19 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x240++0x7 line.long 0x0 "EAR20,ERM Memory 20 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN20,ERM Memory 20 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x248++0x3 line.long 0x0 "CORR_ERR_CNT20,ERM Memory 20 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x250++0x7 line.long 0x0 "EAR21,ERM Memory 21 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN21,ERM Memory 21 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x258++0x3 line.long 0x0 "CORR_ERR_CNT21,ERM Memory 21 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x260++0x7 line.long 0x0 "EAR22,ERM Memory 22 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN22,ERM Memory 22 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x268++0x3 line.long 0x0 "CORR_ERR_CNT22,ERM Memory 22 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" rgroup.long 0x270++0x7 line.long 0x0 "EAR23,ERM Memory 23 Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" line.long 0x4 "SYN23,ERM Memory 23 Syndrome Register" hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME" group.long 0x278++0x3 line.long 0x0 "CORR_ERR_CNT23,ERM Memory 23 Correctable Error Count Register" hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count" tree.end tree.end tree "FCCU (Fault Collection and Control Unit)" base ad:0x40384000 group.long 0x0++0x3 line.long 0x0 "CTRL,Control" bitfld.long 0x0 9. "DEBUG,Debug Mode Enable" "0: Disabled,1: Enabled" newline rbitfld.long 0x0 6.--7. "OPS,Operation Status" "0: Idle,1: In progress,2: Aborted,3: Successful" newline hexmask.long.byte 0x0 0.--4. 1. "OPR,Operation Run" wgroup.long 0x4++0x3 line.long 0x0 "CTRLK,Control Key" hexmask.long 0x0 0.--31. 1. "CTRLK,Locked-Operation Control Key" group.long 0x8++0x3 line.long 0x0 "CFG,Configuration" bitfld.long 0x0 24. "FCCU_SET_AFTER_RESET,Fault-Output (EOUT) Activate" "0: Inactive (the EOUT signals are in a..,1: Active (the EOUT signals indicate FCCU's.." newline bitfld.long 0x0 22.--23. "FCCU_SET_CLEAR,Fault-Output (EOUT) Control" "0: Controlled by the FSM,1: Always low,2: Controlled by the FSM,3: High until a fault occurs on a channel.." newline bitfld.long 0x0 11. "CM,Fault-Output (EOUT) Configuration-Indication Mode" "0: Different,1: Same" newline bitfld.long 0x0 10. "SM,Fault-Output (EOUT) Switching Mode" "0: Slow: No EOUT frequency violation during the..,1: Fast: The indication transition (NORMAL to FAULT.." newline bitfld.long 0x0 9. "PS,Fault-Output (EOUT) Polarity Selection" "0: For the faulty indication EOUT1 is high and..,1: For the faulty indication EOUT1 is low and EOUT0.." newline bitfld.long 0x0 6.--8. "FOM,Fault-Output (EOUT) Mode" "0: Dual-Rail,1: Time-Switching,2: Bi-Stable,3: Fault-Toggle,?,5: Test 0 (controlled by the EINOUT register; EOUT1..,6: Test 1 (controlled by the EINOUT register; EOUT1..,7: Test 2 (controlled by the EINOUT register; EOUT1.." group.long 0x1C++0x3 line.long 0x0 "NCF_CFG0,Non-critical Fault Configuration" bitfld.long 0x0 15. "NCFC15,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 14. "NCFC14,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 13. "NCFC13,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 12. "NCFC12,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 11. "NCFC11,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 10. "NCFC10,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 9. "NCFC9,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 8. "NCFC8,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 7. "NCFC7,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 6. "NCFC6,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 5. "NCFC5,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 4. "NCFC4,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 3. "NCFC3,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 2. "NCFC2,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 1. "NCFC1,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" newline bitfld.long 0x0 0. "NCFC0,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable" group.long 0x4C++0x3 line.long 0x0 "NCFS_CFG0,Non-critical Fault-State Configuration" bitfld.long 0x0 30.--31. "NCFSC15,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 28.--29. "NCFSC14,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 26.--27. "NCFSC13,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 24.--25. "NCFSC12,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 22.--23. "NCFSC11,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 20.--21. "NCFSC10,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 18.--19. "NCFSC9,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 16.--17. "NCFSC8,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 14.--15. "NCFSC7,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 12.--13. "NCFSC6,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 10.--11. "NCFSC5,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 8.--9. "NCFSC4,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 6.--7. "NCFSC3,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 4.--5. "NCFSC2,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 2.--3. "NCFSC1,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" newline bitfld.long 0x0 0.--1. "NCFSC0,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled" group.long 0x80++0x3 line.long 0x0 "NCF_S0,Non-critical Fault Status" eventfld.long 0x0 15. "NCFS15,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 14. "NCFS14,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 13. "NCFS13,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 12. "NCFS12,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 11. "NCFS11,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 10. "NCFS10,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 9. "NCFS9,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 8. "NCFS8,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 7. "NCFS7,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 6. "NCFS6,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 5. "NCFS5,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 4. "NCFS4,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 3. "NCFS3,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 2. "NCFS2,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 1. "NCFS1,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" newline eventfld.long 0x0 0. "NCFS0,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault" group.long 0x90++0x7 line.long 0x0 "NCFK,Non-critical Fault Key" hexmask.long 0x0 0.--31. 1. "NCFK,Non-critical Fault Key" line.long 0x4 "NCF_E0,Non-critical Fault Enable" bitfld.long 0x4 15. "NCFE15,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "NCFE14,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 13. "NCFE13,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 12. "NCFE12,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "NCFE11,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "NCFE10,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 9. "NCFE9,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 8. "NCFE8,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 7. "NCFE7,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "NCFE6,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "NCFE5,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 4. "NCFE4,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 3. "NCFE3,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 2. "NCFE2,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 1. "NCFE1,Non-critical Fault Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0. "NCFE0,Non-critical Fault Enable n" "0: Disabled,1: Enabled" group.long 0xA4++0x3 line.long 0x0 "NCF_TOE0,Non-critical-Fault Alarm-State Timeout Enable" bitfld.long 0x0 15. "NCFTOE15,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "NCFTOE14,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "NCFTOE13,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "NCFTOE12,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "NCFTOE11,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "NCFTOE10,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "NCFTOE9,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "NCFTOE8,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "NCFTOE7,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "NCFTOE6,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "NCFTOE5,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "NCFTOE4,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "NCFTOE3,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "NCFTOE2,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "NCFTOE1,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "NCFTOE0,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled" group.long 0xB4++0xB line.long 0x0 "NCF_TO,Non-critical-Fault Alarm-State Timeout Interval" hexmask.long 0x0 0.--31. 1. "TO,Non-critical-Fault Alarm-State Timeout Interval" line.long 0x4 "CFG_TO,Configuration-State Timeout Interval" bitfld.long 0x4 0.--2. "TO,Configuration-State Timeout Interval" "0,1,2,3,4,5,6,7" line.long 0x8 "EINOUT,IO Control" rbitfld.long 0x8 5. "EIN1,Error Input 1" "0: Low,1: High" newline rbitfld.long 0x8 4. "EIN0,Error Input 0" "0: Low,1: High" newline bitfld.long 0x8 1. "EOUT1,EOUT1" "0: force EOUT[1] = 0,1: force EOUT[1] = 1" newline bitfld.long 0x8 0. "EOUT0,EOUT0" "0: force EOUT[0] = 0,1: force EOUT[0] = 1" rgroup.long 0xC0++0x13 line.long 0x0 "STAT,Status" bitfld.long 0x0 4.--5. "PhysicErrorPin,EOUT Signal States" "0: EOUT1 is low; EOUT0 is low.,1: EOUT1 is low; EOUT0 is high.,2: EOUT1 is high; EOUT0 is low.,3: EOUT1 is high; EOUT0 is high." newline bitfld.long 0x0 3. "ESTAT,FCCU Faulty Condition" "0: Not in faulty condition (in non-faulty or..,1: In faulty condition" newline bitfld.long 0x0 0.--2. "STATUS,FCCU State" "0: NORMAL,1: CONFIG,2: ALARM,3: FAULT,?,?,?,?" line.long 0x4 "N2AF_STATUS,Normal-to-Alarm Freeze Status" hexmask.long.byte 0x4 0.--7. 1. "NAFS,Normal-to-Alarm Freeze Status" line.long 0x8 "A2FF_STATUS,Alarm-to-Fault Freeze Status" bitfld.long 0x8 8.--9. "AF_SRC,Alarm-to-Fault Source" "0: No Alarm-to-Fault-state fault,?,2: Non-critical fault,3: Multiple Alarm-to-Fault-state faults" newline hexmask.long.byte 0x8 0.--7. 1. "AFFS,Alarm-to-Fault Freeze Status" line.long 0xC "N2FF_STATUS,Normal-to-Fault Freeze Status" bitfld.long 0xC 8.--9. "NF_SRC,Normal-to-Fault Source" "0: No Normal-to-Fault-state fault,?,2: Non-critical fault,3: Multiple Normal-to-Fault-state faults" newline hexmask.long.byte 0xC 0.--7. 1. "NFFS,Normal-to-Fault Freeze Status" line.long 0x10 "F2AF_STATUS,Fault-to-Alarm Freeze Status" hexmask.long.word 0x10 0.--8. 1. "FAFS,Fault-to-Alarm Freeze Status" wgroup.long 0xDC++0x3 line.long 0x0 "NCFF,Non-critical Fault Fake" hexmask.long.byte 0x0 0.--6. 1. "FNCFC,FNCFC" group.long 0xE0++0x7 line.long 0x0 "IRQ_STAT,IRQ Status" rbitfld.long 0x0 2. "NMI_STAT,NMI Interrupt Status" "0: NMI interrupt is OFF,1: NMI interrupt is ON" newline rbitfld.long 0x0 1. "ALRM_STAT,Alarm Interrupt Status" "0: Alarm interrupt is OFF,1: Alarm interrupt is ON" newline eventfld.long 0x0 0. "CFG_TO_STAT,Configuration-State Timeout Status" "0: No configuration-stat timeout error,1: Configuration-state timeout error" line.long 0x4 "IRQ_EN,IRQ Enable" bitfld.long 0x4 0. "CFG_TO_IEN,Configuration-State Timeout Interrupt Enable" "0: Configuration-state timeout interrupt disabled,1: Configuration-state timeout interrupt enabled" wgroup.long 0xF0++0x7 line.long 0x0 "TRANS_LOCK,Transient Configuration Lock" hexmask.long.word 0x0 0.--8. 1. "TRANSKEY,Transient Configuration Lock" line.long 0x4 "PERMNT_LOCK,Permanent Configuration Lock" hexmask.long.word 0x4 0.--8. 1. "PERMNTKEY,Permanent Configuration Lock" group.long 0xF8++0x7 line.long 0x0 "DELTA_T,Delta T" hexmask.long.word 0x0 0.--13. 1. "DELTA_T,Minimum Fault-Output (EOUT) Timer Interval" line.long 0x4 "IRQ_ALARM_EN0,Non-critical Alarm-State Interrupt-Request Enable" bitfld.long 0x4 15. "IRQEN15,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "IRQEN14,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 13. "IRQEN13,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 12. "IRQEN12,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "IRQEN11,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "IRQEN10,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 9. "IRQEN9,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 8. "IRQEN8,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 7. "IRQEN7,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IRQEN6,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "IRQEN5,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 4. "IRQEN4,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 3. "IRQEN3,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 2. "IRQEN2,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 1. "IRQEN1,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0. "IRQEN0,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled" group.long 0x10C++0x3 line.long 0x0 "NMI_EN0,Non-critical Fault-State Non-maskable-Interrupt-Request Enable" bitfld.long 0x0 15. "NMIEN15,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "NMIEN14,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "NMIEN13,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "NMIEN12,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "NMIEN11,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "NMIEN10,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "NMIEN9,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "NMIEN8,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "NMIEN7,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "NMIEN6,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "NMIEN5,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "NMIEN4,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "NMIEN3,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "NMIEN2,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "NMIEN1,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "NMIEN0,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled" group.long 0x11C++0x3 line.long 0x0 "EOUT_SIG_EN0,Non-critical Fault-State EOUT Signaling Enable" bitfld.long 0x0 15. "EOUTEN15,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 14. "EOUTEN14,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 13. "EOUTEN13,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 12. "EOUTEN12,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 11. "EOUTEN11,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 10. "EOUTEN10,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 9. "EOUTEN9,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 8. "EOUTEN8,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 7. "EOUTEN7,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 6. "EOUTEN6,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 5. "EOUTEN5,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 4. "EOUTEN4,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 3. "EOUTEN3,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 2. "EOUTEN2,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 1. "EOUTEN1,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." newline bitfld.long 0x0 0. "EOUTEN0,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.." rgroup.long 0x12C++0x3 line.long 0x0 "TMR_ALARM,Alarm-State Timer" hexmask.long 0x0 0.--31. 1. "COUNT,Alarm-State Timer Count" rgroup.long 0x134++0x7 line.long 0x0 "TMR_CFG,Configuration-State Timer" hexmask.long 0x0 0.--31. 1. "COUNT,Configuration-State Timer Count" line.long 0x4 "TMR_ETMR,Fault-Output Timer" hexmask.long 0x4 0.--31. 1. "COUNT,Fault-Output Timer Count" tree.end tree "FIRC (Fast Internal RC Oscillator)" base ad:0x402D0000 rgroup.long 0x4++0x3 line.long 0x0 "Status_Register,Status Register" bitfld.long 0x0 0. "STATUS,Status bit for FIRC" "0: FIRC is off or unstable.,1: FIRC is on and stable." group.long 0x8++0x3 line.long 0x0 "STDBY_ENABLE,Standby Enable Register" bitfld.long 0x0 0. "STDBY_EN,Enables or disables FIRC in chip's Standby mode." "0: Disabled,1: Enabled" tree.end tree "FLASH (c40asf Flash Memory)" base ad:0x0 tree "FLASH" base ad:0x402EC000 group.long 0x0++0x7 line.long 0x0 "MCR,Module Configuration" hexmask.long.byte 0x0 16.--23. 1. "PEID,Program and Erase Master/Domain ID" bitfld.long 0x0 15. "PECIE,Program/Erase Complete Interrupt Enable" "0: Interrupt request not generated when MCRS[DONE]..,1: Interrupt request generated when MCRS[DONE] is 1" newline bitfld.long 0x0 12. "WDIE,Watch Dog Interrupt Enable" "0: Watchdog interrupt not enabled,1: Watchdog interrupt enabled" bitfld.long 0x0 8. "PGM,Program" "0: Flash memory not executing a program sequence,1: Flash memory executing a program sequence" newline bitfld.long 0x0 5. "ESS,Erase Size Select" "0: Flash memory erase is on a sector,1: Flash memory erase is on a block" bitfld.long 0x0 4. "ERS,Erase" "0: Flash memory not executing an erase sequence,1: Flash memory executing an erase sequence" newline bitfld.long 0x0 0. "EHV,Enable High Voltage" "0: Flash memory is not enabled to perform a high..,1: Flash memory is enabled to perform a high.." line.long 0x4 "MCRS,Module Configuration Status" eventfld.long 0x4 31. "EER,ECC Event Error" "0: Reads occurring normally,1: ECC error occurred during a previous read" eventfld.long 0x4 30. "SBC,Single Bit Correction" "0: Reads occurring without corrections,1: Single bit correction occurred during a previous.." newline eventfld.long 0x4 29. "AEE,Address Encode Error" "0: Reads are occurring without address encode..,1: Previous read may be corrupted based on address.." eventfld.long 0x4 28. "EEE,EDC after ECC Error" "0: Reads are occurring without EDC after ECC..,1: Previous read may be corrupted based on ECC.." newline eventfld.long 0x4 25. "RVE,Read Voltage Error" "0: Reads are occurring without voltage issues,1: A previous read may have been corrupted due to.." eventfld.long 0x4 24. "RRE,Read Reference Error" "0: Reads occur without reference issues,1: Previous read may be corrupted because of read.." newline eventfld.long 0x4 20. "RWE,Read-While-Write Event Error" "0: Reads occur normally,1: RWW error occurred during a previous read" eventfld.long 0x4 17. "PEP,Program and Erase Protection Error" "0: Program and erase protection errors do not exist,1: Previous program or erase protection error.." newline eventfld.long 0x4 16. "PES,Program and Erase Sequence Error" "0: Program and erase sequence errors do not exist,1: Previous program or erase sequence encountered.." rbitfld.long 0x4 15. "DONE,State Machine Status" "0: Performing a high voltage operation,1: Not executing a high voltage operation" newline rbitfld.long 0x4 14. "PEG,Program/Erase Good" "0: Program or erase operation failed,1: Program or erase operation successful" rbitfld.long 0x4 12. "WDI,Watch Dog Interrupt" "0: Normal Operation Watchdog Timer has not expired.,1: Program Watchdog Timer has expired." newline rbitfld.long 0x4 9. "EPEG,ECC Enabled Program/Erase Good" "0: Program or erase operation did not require ECC..,1: Program or erase operation required ECC Enabled.." rbitfld.long 0x4 8. "TSPELOCK,UTest NVM Program and Erase Lock" "0: Corresponding sector not locked and may be..,1: Corresponding sector protected from the program.." newline rbitfld.long 0x4 0. "RE,Reset Error" "0: Reset occurred without errors,1: Reset error encountered" rgroup.long 0x8++0x3 line.long 0x0 "MCRE,Extended Module Configuration" bitfld.long 0x0 29.--31. "n2M,Number of 2 MB Blocks" "0: Zero 2 MB blocks,1: One 2 MB block,2: Two 2 MB blocks,3: Three 2 MB blocks,4: Four 2 MB blocks,?,?,?" bitfld.long 0x0 21.--23. "n1M,Number of 1 MB Blocks" "0: Zero 1 MB blocks,1: One 1 MB block,2: Two 1 MB blocks,3: Three 1 MB blocks,4: Four 1 MB blocks,?,?,?" newline bitfld.long 0x0 14.--15. "n512K,Number of 512 KB Blocks" "0: Zero 512 KB blocks,1: One 512 KB block,2: Two 512 KB blocks,3: Four 512 KB blocks" bitfld.long 0x0 6.--7. "n256K,Number of 256 KB Blocks" "0: Zero 256 KB blocks,1: One 256 KB block,2: Two 256 KB blocks,3: Four 256 KB blocks" group.long 0xC++0x7 line.long 0x0 "CTL,Module Control" bitfld.long 0x0 15. "RWSL,Read Wait State Lock" "0: RWSC not locked and available for writing,1: RWSC locked and unavailable for writing" hexmask.long.byte 0x0 8.--12. 1. "RWSC,Wait State Control" line.long 0x4 "ADR,Address" bitfld.long 0x4 31. "SAD,UTest NVM Address" "0: Address captured or to be accessed is from the..,1: Address captured or to be accessed is from the.." bitfld.long 0x4 24. "A5,Address Region 5" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.." newline bitfld.long 0x4 21. "A2,Address Region 2" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.." bitfld.long 0x4 20. "A1,Address Region 1" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.." newline bitfld.long 0x4 19. "A0,Address Region 0" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.." hexmask.long.tbyte 0x4 1.--18. 1. "ADDR,Address" rgroup.long 0x14++0x3 line.long 0x0 "PEADR,Program and Erase Address" bitfld.long 0x0 31. "PEASAD,UTest NVM Program and Erase Address" "0: Address accessed is from the main array space,1: Address accessed is from the UTest NVM array space" bitfld.long 0x0 24. "PEA5,Program and Erase Address Region 5" "0: Address accessed is not from region 5,1: Address accessed is from region 5" newline bitfld.long 0x0 23. "PEA4,Program and Erase Address Region 4" "0: Address accessed is not from region 4,1: Adrress accessed is from region 4" bitfld.long 0x0 22. "PEA3,Program and Erase Address Region 3" "0: Address accessed is not from region 3,1: Address accessed is from region 3" newline bitfld.long 0x0 21. "PEA2,Program and Erase Address Region 2" "0: Address accessed is not from region 2,1: Address accessed is from region 2" bitfld.long 0x0 20. "PEA1,Program and Erase Address Region 1" "0: Address accessed is not from region 1,1: Address accessed is from region 1" newline bitfld.long 0x0 19. "PEA0,Program and Erase Address Region 0" "0: Address accessed is not from region 0,1: Address accessed is from region 0" hexmask.long.word 0x0 5.--18. 1. "PEADDR,Program and Erase Address" rgroup.long 0x50++0x7 line.long 0x0 "SPELOCK,Sector Program and Erase Hardware Lock" hexmask.long 0x0 0.--31. 1. "SPELOCK,Sector Program and Erase Lock [31:0]" line.long 0x4 "SSPELOCK,Super Sector Program and Erase Hardware Lock" hexmask.long 0x4 0.--27. 1. "SSPELOCK,Super Sector Program and Erase Lock [27:0]" rgroup.long 0x70++0x7 line.long 0x0 "XSPELOCK,Express Sector Program and Erase Hardware Lock" hexmask.long 0x0 0.--31. 1. "XSPELOCK,Express Sector Program and Erase Lock [31:0]" line.long 0x4 "XSSPELOCK,Express Super Sector Program and Erase Hardware Lock" hexmask.long 0x4 0.--27. 1. "XSSPELOCK,Express Super Sector Program and Erase Lock [27:0]" group.long 0x90++0x7 line.long 0x0 "TMD,Test Mode Disable Password Check" hexmask.long 0x0 0.--31. 1. "PWD,Password Challenge" line.long 0x4 "UT0,UTest 0" bitfld.long 0x4 31. "UTE,UTest Enable" "0: U-Test mode is not enabled.,1: U-Test mode is enabled." bitfld.long 0x4 30. "SBCE,Single Bit Correction Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 15. "RRIE,Read Reference Input Enable" "0: Read reference input disabled,1: Read reference input enabled" bitfld.long 0x4 14. "AEIE,Address Encode Invert Enable" "0: Address encode invert is disabled,1: Address encode values are inverted based on.." newline bitfld.long 0x4 13. "EDIE,EDC after ECC Data Input Enable" "0: EDC after ECC data input is disabled,1: Data read is from UD3[EDDATA] and UD5[EDDATAC]" bitfld.long 0x4 12. "EIE,ECC Data Input Enable" "0: ECC data input is disabled,1: Data read is from UD0[EDATA] and UD2[EDATAC]" newline bitfld.long 0x4 9. "NAIBP,Next Array Integrity Break Point" "0: Array integrity state machine is not currently..,1: Array integrity state machine is at a breakpoint" bitfld.long 0x4 8. "AIBPE,Array Integrity Break Point Enable" "0: Array integrity breakpoints disabled,1: Array integrity breakpoints enabled during array.." newline bitfld.long 0x4 6. "AISUS,Array Integrity Suspend" "0: Array integrity sequence not suspended.,1: Array integrity sequence is suspended." bitfld.long 0x4 5. "MRE,Margin Read Enable" "0: Margin reads are not enabled.,1: Margin reads are enabled." newline bitfld.long 0x4 4. "MRV,Margin Read Value" "0: Zero's margin reads are requested.,1: One's margin reads are requested." bitfld.long 0x4 2. "AIS,Array Integrity Sequence" "0: Array integrity sequence is proprietary sequence,1: Array integrity sequence is sequential" newline bitfld.long 0x4 1. "AIE,Array Integrity Enable" "0: Array integrity checks not enabled,1: Array integrity checks enabled" rbitfld.long 0x4 0. "AID,Array Integrity Done" "0: Array integrity check ongoing,1: Array integrity check complete" repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x98)++0x3 line.long 0x0 "UM[$1],UMISRn" hexmask.long 0x0 0.--31. 1. "MISR,MISR[31:0]" repeat.end group.long 0xBC++0x3 line.long 0x0 "UM9,UMISR9" bitfld.long 0x0 0. "MISR,MISR[288]" "0,1" group.long 0xD0++0x23 line.long 0x0 "UD0,UTest Data 0" hexmask.long 0x0 0.--31. 1. "EDATA,ECC Data [31:0]" line.long 0x4 "UD1,UTest Data 1" hexmask.long 0x4 0.--31. 1. "EDATA,ECC Data [63:32]" line.long 0x8 "UD2,UTest Data 2" bitfld.long 0x8 27. "ED3,ECC Logic Check Double Word 3" "0,1" bitfld.long 0x8 26. "ED2,ECC Logic Check Double Word 2" "0,1" newline bitfld.long 0x8 25. "ED1,ECC Logic Check Double Word 1" "0,1" bitfld.long 0x8 24. "ED0,ECC Logic Check Double Word 0" "0,1" newline hexmask.long.byte 0x8 0.--7. 1. "EDATAC,ECC Data Check Bits [7:0]" line.long 0xC "UD3,UTest Data 3" hexmask.long 0xC 0.--31. 1. "EDDATA,EDC After ECC Data [31:0]" line.long 0x10 "UD4,UTest Data 4" hexmask.long 0x10 0.--31. 1. "EDDATA,EDC After ECC Data [63:31]" line.long 0x14 "UD5,UTest Data 5" bitfld.long 0x14 27. "EDD3,EDC After ECC Logic Check Double Word 3" "0,1" bitfld.long 0x14 26. "EDD2,EDC after ECC Logic Check Double Word 2" "0,1" newline bitfld.long 0x14 25. "EDD1,EDC After ECC Logic Check Double Word 1" "0,1" bitfld.long 0x14 24. "EDD0,EDC After ECC Logic Check Double Word 0" "0,1" newline hexmask.long.byte 0x14 0.--7. 1. "EDDATAC,EDC After ECC Data Check Bits [7:0]" line.long 0x18 "UA0,UTest Address 0" hexmask.long 0x18 0.--31. 1. "AEI,Address Encode Invert [31:0]" line.long 0x1C "UA1,UTest Address 1" hexmask.long.tbyte 0x1C 0.--19. 1. "AEI,Address Encode Invert [51:32]" line.long 0x20 "XMCR,Express Module Configuration" hexmask.long.byte 0x20 16.--23. 1. "XPEID,Express Program Master/Domain ID" rbitfld.long 0x20 15. "XDONE,Express State Machine Status" "0: Executing an express program operation,1: Not executing an express program operation" newline rbitfld.long 0x20 14. "XPEG,Express Program Good" "0: Program operation failed,1: Program operation successful" rbitfld.long 0x20 13. "XDOK,Express Data OK" "0: Flash memory not ready to accept writes to the..,1: Writes to DATA registers allowed" newline rbitfld.long 0x20 12. "XWDI,Express Watch Dog Interrupt" "0: Normal Operation Watchdog Timer has not expired.,1: Express Program Watchdog Timer has expired." bitfld.long 0x20 11. "XWDIE,Express Watch Dog Interrupt Enable" "0: Express watchdog interrupt disabled,1: Express watchdog interrupt enabled" newline rbitfld.long 0x20 9. "XEPEG,Express ECC Enabled Program Good" "0: Program operation did not require ECC-enabled..,1: Program operation required ECC-enabled verifies.." bitfld.long 0x20 8. "XPGM,Express Program" "0: Flash memory not executing an express program..,1: Flash memory executing an express program sequence" newline bitfld.long 0x20 0. "XEHV,Express Enable High Voltage" "0: Flash memory is not enabled to perform an..,1: Flash memory is enabled to perform an express.." rgroup.long 0xF4++0x3 line.long 0x0 "XPEADR,Express Program Address" bitfld.long 0x0 24. "XPEA5,Express Program Address Region 5" "0: Address accessed is not from region 5,1: Address accessed is from region 5" bitfld.long 0x0 23. "XPEA4,Express Program Address Region 4" "0: Address accessed is not from region 4,1: Address accessed is from region 4" newline bitfld.long 0x0 22. "XPEA3,Express Program Address Region 3" "0: Address accessed is not from region 3,1: Address accessed is from region 3" bitfld.long 0x0 21. "XPEA2,Express Program Address Region 2" "0: Address accessed is not from region 2,1: Address accessed is from region 2" newline bitfld.long 0x0 20. "XPEA1,Express Program Address Region 1" "0: Address accessed is not from region 1,1: Address accessed is from region 1" bitfld.long 0x0 19. "XPEA0,Express Program Address Region 0" "0: Address accessed is not from region 0,1: Address accessed is from region 0" newline hexmask.long.word 0x0 5.--18. 1. "XPEADDR,Express Program Address" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "DATA[$1],Program Data" hexmask.long 0x0 0.--31. 1. "PDATA,Program Data" repeat.end tree.end tree "FLASH_ALT" base ad:0x402F0000 group.long 0x0++0x7 line.long 0x0 "MCR,Module Configuration" hexmask.long.byte 0x0 16.--23. 1. "PEID,Program and Erase Master/Domain ID" bitfld.long 0x0 15. "PECIE,Program/Erase Complete Interrupt Enable" "0: Interrupt request not generated when MCRS[DONE]..,1: Interrupt request generated when MCRS[DONE] is 1" newline bitfld.long 0x0 12. "WDIE,Watch Dog Interrupt Enable" "0: Watchdog interrupt not enabled,1: Watchdog interrupt enabled" bitfld.long 0x0 8. "PGM,Program" "0: Flash memory not executing a program sequence,1: Flash memory executing a program sequence" newline bitfld.long 0x0 5. "ESS,Erase Size Select" "0: Flash memory erase is on a sector,1: Flash memory erase is on a block" bitfld.long 0x0 4. "ERS,Erase" "0: Flash memory not executing an erase sequence,1: Flash memory executing an erase sequence" newline bitfld.long 0x0 0. "EHV,Enable High Voltage" "0: Flash memory is not enabled to perform a high..,1: Flash memory is enabled to perform a high.." line.long 0x4 "MCRS,Module Configuration Status" eventfld.long 0x4 31. "EER,ECC Event Error" "0: Reads occurring normally,1: ECC error occurred during a previous read" eventfld.long 0x4 30. "SBC,Single Bit Correction" "0: Reads occurring without corrections,1: Single bit correction occurred during a previous.." newline eventfld.long 0x4 29. "AEE,Address Encode Error" "0: Reads are occurring without address encode..,1: Previous read may be corrupted based on address.." eventfld.long 0x4 28. "EEE,EDC after ECC Error" "0: Reads are occurring without EDC after ECC..,1: Previous read may be corrupted based on ECC.." newline eventfld.long 0x4 25. "RVE,Read Voltage Error" "0: Reads are occurring without voltage issues,1: A previous read may have been corrupted due to.." eventfld.long 0x4 24. "RRE,Read Reference Error" "0: Reads occur without reference issues,1: Previous read may be corrupted because of read.." newline eventfld.long 0x4 20. "RWE,Read-While-Write Event Error" "0: Reads occur normally,1: RWW error occurred during a previous read" eventfld.long 0x4 17. "PEP,Program and Erase Protection Error" "0: Program and erase protection errors do not exist,1: Previous program or erase protection error.." newline eventfld.long 0x4 16. "PES,Program and Erase Sequence Error" "0: Program and erase sequence errors do not exist,1: Previous program or erase sequence encountered.." rbitfld.long 0x4 15. "DONE,State Machine Status" "0: Performing a high voltage operation,1: Not executing a high voltage operation" newline rbitfld.long 0x4 14. "PEG,Program/Erase Good" "0: Program or erase operation failed,1: Program or erase operation successful" rbitfld.long 0x4 12. "WDI,Watch Dog Interrupt" "0: Normal Operation Watchdog Timer has not expired.,1: Program Watchdog Timer has expired." newline rbitfld.long 0x4 9. "EPEG,ECC Enabled Program/Erase Good" "0: Program or erase operation did not require ECC..,1: Program or erase operation required ECC Enabled.." rbitfld.long 0x4 8. "TSPELOCK,UTest NVM Program and Erase Lock" "0: Corresponding sector not locked and may be..,1: Corresponding sector protected from the program.." newline rbitfld.long 0x4 0. "RE,Reset Error" "0: Reset occurred without errors,1: Reset error encountered" rgroup.long 0x8++0x3 line.long 0x0 "MCRE,Extended Module Configuration" bitfld.long 0x0 29.--31. "n2M,Number of 2 MB Blocks" "0: Zero 2 MB blocks,1: One 2 MB block,2: Two 2 MB blocks,3: Three 2 MB blocks,4: Four 2 MB blocks,?,?,?" bitfld.long 0x0 21.--23. "n1M,Number of 1 MB Blocks" "0: Zero 1 MB blocks,1: One 1 MB block,2: Two 1 MB blocks,3: Three 1 MB blocks,4: Four 1 MB blocks,?,?,?" newline bitfld.long 0x0 14.--15. "n512K,Number of 512 KB Blocks" "0: Zero 512 KB blocks,1: One 512 KB block,2: Two 512 KB blocks,3: Four 512 KB blocks" bitfld.long 0x0 6.--7. "n256K,Number of 256 KB Blocks" "0: Zero 256 KB blocks,1: One 256 KB block,2: Two 256 KB blocks,3: Four 256 KB blocks" group.long 0xC++0x7 line.long 0x0 "CTL,Module Control" bitfld.long 0x0 15. "RWSL,Read Wait State Lock" "0: RWSC not locked and available for writing,1: RWSC locked and unavailable for writing" hexmask.long.byte 0x0 8.--12. 1. "RWSC,Wait State Control" line.long 0x4 "ADR,Address" bitfld.long 0x4 31. "SAD,UTest NVM Address" "0: Address captured or to be accessed is from the..,1: Address captured or to be accessed is from the.." bitfld.long 0x4 24. "A5,Address Region 5" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.." newline bitfld.long 0x4 21. "A2,Address Region 2" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.." bitfld.long 0x4 20. "A1,Address Region 1" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.." newline bitfld.long 0x4 19. "A0,Address Region 0" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.." hexmask.long.tbyte 0x4 1.--18. 1. "ADDR,Address" rgroup.long 0x14++0x3 line.long 0x0 "PEADR,Program and Erase Address" bitfld.long 0x0 31. "PEASAD,UTest NVM Program and Erase Address" "0: Address accessed is from the main array space,1: Address accessed is from the UTest NVM array space" bitfld.long 0x0 24. "PEA5,Program and Erase Address Region 5" "0: Address accessed is not from region 5,1: Address accessed is from region 5" newline bitfld.long 0x0 23. "PEA4,Program and Erase Address Region 4" "0: Address accessed is not from region 4,1: Adrress accessed is from region 4" bitfld.long 0x0 22. "PEA3,Program and Erase Address Region 3" "0: Address accessed is not from region 3,1: Address accessed is from region 3" newline bitfld.long 0x0 21. "PEA2,Program and Erase Address Region 2" "0: Address accessed is not from region 2,1: Address accessed is from region 2" bitfld.long 0x0 20. "PEA1,Program and Erase Address Region 1" "0: Address accessed is not from region 1,1: Address accessed is from region 1" newline bitfld.long 0x0 19. "PEA0,Program and Erase Address Region 0" "0: Address accessed is not from region 0,1: Address accessed is from region 0" hexmask.long.word 0x0 5.--18. 1. "PEADDR,Program and Erase Address" rgroup.long 0x50++0x7 line.long 0x0 "SPELOCK,Sector Program and Erase Hardware Lock" hexmask.long 0x0 0.--31. 1. "SPELOCK,Sector Program and Erase Lock [31:0]" line.long 0x4 "SSPELOCK,Super Sector Program and Erase Hardware Lock" hexmask.long 0x4 0.--27. 1. "SSPELOCK,Super Sector Program and Erase Lock [27:0]" rgroup.long 0x70++0x7 line.long 0x0 "XSPELOCK,Express Sector Program and Erase Hardware Lock" hexmask.long 0x0 0.--31. 1. "XSPELOCK,Express Sector Program and Erase Lock [31:0]" line.long 0x4 "XSSPELOCK,Express Super Sector Program and Erase Hardware Lock" hexmask.long 0x4 0.--27. 1. "XSSPELOCK,Express Super Sector Program and Erase Lock [27:0]" group.long 0x90++0x7 line.long 0x0 "TMD,Test Mode Disable Password Check" hexmask.long 0x0 0.--31. 1. "PWD,Password Challenge" line.long 0x4 "UT0,UTest 0" bitfld.long 0x4 31. "UTE,UTest Enable" "0: U-Test mode is not enabled.,1: U-Test mode is enabled." bitfld.long 0x4 30. "SBCE,Single Bit Correction Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 15. "RRIE,Read Reference Input Enable" "0: Read reference input disabled,1: Read reference input enabled" bitfld.long 0x4 14. "AEIE,Address Encode Invert Enable" "0: Address encode invert is disabled,1: Address encode values are inverted based on.." newline bitfld.long 0x4 13. "EDIE,EDC after ECC Data Input Enable" "0: EDC after ECC data input is disabled,1: Data read is from UD3[EDDATA] and UD5[EDDATAC]" bitfld.long 0x4 12. "EIE,ECC Data Input Enable" "0: ECC data input is disabled,1: Data read is from UD0[EDATA] and UD2[EDATAC]" newline bitfld.long 0x4 9. "NAIBP,Next Array Integrity Break Point" "0: Array integrity state machine is not currently..,1: Array integrity state machine is at a breakpoint" bitfld.long 0x4 8. "AIBPE,Array Integrity Break Point Enable" "0: Array integrity breakpoints disabled,1: Array integrity breakpoints enabled during array.." newline bitfld.long 0x4 6. "AISUS,Array Integrity Suspend" "0: Array integrity sequence not suspended.,1: Array integrity sequence is suspended." bitfld.long 0x4 5. "MRE,Margin Read Enable" "0: Margin reads are not enabled.,1: Margin reads are enabled." newline bitfld.long 0x4 4. "MRV,Margin Read Value" "0: Zero's margin reads are requested.,1: One's margin reads are requested." bitfld.long 0x4 2. "AIS,Array Integrity Sequence" "0: Array integrity sequence is proprietary sequence,1: Array integrity sequence is sequential" newline bitfld.long 0x4 1. "AIE,Array Integrity Enable" "0: Array integrity checks not enabled,1: Array integrity checks enabled" rbitfld.long 0x4 0. "AID,Array Integrity Done" "0: Array integrity check ongoing,1: Array integrity check complete" repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x98)++0x3 line.long 0x0 "UM[$1],UMISRn" hexmask.long 0x0 0.--31. 1. "MISR,MISR[31:0]" repeat.end group.long 0xBC++0x3 line.long 0x0 "UM9,UMISR9" bitfld.long 0x0 0. "MISR,MISR[288]" "0,1" group.long 0xD0++0x23 line.long 0x0 "UD0,UTest Data 0" hexmask.long 0x0 0.--31. 1. "EDATA,ECC Data [31:0]" line.long 0x4 "UD1,UTest Data 1" hexmask.long 0x4 0.--31. 1. "EDATA,ECC Data [63:32]" line.long 0x8 "UD2,UTest Data 2" bitfld.long 0x8 27. "ED3,ECC Logic Check Double Word 3" "0,1" bitfld.long 0x8 26. "ED2,ECC Logic Check Double Word 2" "0,1" newline bitfld.long 0x8 25. "ED1,ECC Logic Check Double Word 1" "0,1" bitfld.long 0x8 24. "ED0,ECC Logic Check Double Word 0" "0,1" newline hexmask.long.byte 0x8 0.--7. 1. "EDATAC,ECC Data Check Bits [7:0]" line.long 0xC "UD3,UTest Data 3" hexmask.long 0xC 0.--31. 1. "EDDATA,EDC After ECC Data [31:0]" line.long 0x10 "UD4,UTest Data 4" hexmask.long 0x10 0.--31. 1. "EDDATA,EDC After ECC Data [63:31]" line.long 0x14 "UD5,UTest Data 5" bitfld.long 0x14 27. "EDD3,EDC After ECC Logic Check Double Word 3" "0,1" bitfld.long 0x14 26. "EDD2,EDC after ECC Logic Check Double Word 2" "0,1" newline bitfld.long 0x14 25. "EDD1,EDC After ECC Logic Check Double Word 1" "0,1" bitfld.long 0x14 24. "EDD0,EDC After ECC Logic Check Double Word 0" "0,1" newline hexmask.long.byte 0x14 0.--7. 1. "EDDATAC,EDC After ECC Data Check Bits [7:0]" line.long 0x18 "UA0,UTest Address 0" hexmask.long 0x18 0.--31. 1. "AEI,Address Encode Invert [31:0]" line.long 0x1C "UA1,UTest Address 1" hexmask.long.tbyte 0x1C 0.--19. 1. "AEI,Address Encode Invert [51:32]" line.long 0x20 "XMCR,Express Module Configuration" hexmask.long.byte 0x20 16.--23. 1. "XPEID,Express Program Master/Domain ID" rbitfld.long 0x20 15. "XDONE,Express State Machine Status" "0: Executing an express program operation,1: Not executing an express program operation" newline rbitfld.long 0x20 14. "XPEG,Express Program Good" "0: Program operation failed,1: Program operation successful" rbitfld.long 0x20 13. "XDOK,Express Data OK" "0: Flash memory not ready to accept writes to the..,1: Writes to DATA registers allowed" newline rbitfld.long 0x20 12. "XWDI,Express Watch Dog Interrupt" "0: Normal Operation Watchdog Timer has not expired.,1: Express Program Watchdog Timer has expired." bitfld.long 0x20 11. "XWDIE,Express Watch Dog Interrupt Enable" "0: Express watchdog interrupt disabled,1: Express watchdog interrupt enabled" newline rbitfld.long 0x20 9. "XEPEG,Express ECC Enabled Program Good" "0: Program operation did not require ECC-enabled..,1: Program operation required ECC-enabled verifies.." bitfld.long 0x20 8. "XPGM,Express Program" "0: Flash memory not executing an express program..,1: Flash memory executing an express program sequence" newline bitfld.long 0x20 0. "XEHV,Express Enable High Voltage" "0: Flash memory is not enabled to perform an..,1: Flash memory is enabled to perform an express.." rgroup.long 0xF4++0x3 line.long 0x0 "XPEADR,Express Program Address" bitfld.long 0x0 24. "XPEA5,Express Program Address Region 5" "0: Address accessed is not from region 5,1: Address accessed is from region 5" bitfld.long 0x0 23. "XPEA4,Express Program Address Region 4" "0: Address accessed is not from region 4,1: Address accessed is from region 4" newline bitfld.long 0x0 22. "XPEA3,Express Program Address Region 3" "0: Address accessed is not from region 3,1: Address accessed is from region 3" bitfld.long 0x0 21. "XPEA2,Express Program Address Region 2" "0: Address accessed is not from region 2,1: Address accessed is from region 2" newline bitfld.long 0x0 20. "XPEA1,Express Program Address Region 1" "0: Address accessed is not from region 1,1: Address accessed is from region 1" bitfld.long 0x0 19. "XPEA0,Express Program Address Region 0" "0: Address accessed is not from region 0,1: Address accessed is from region 0" newline hexmask.long.word 0x0 5.--18. 1. "XPEADDR,Express Program Address" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "DATA[$1],Program Data" hexmask.long 0x0 0.--31. 1. "PDATA,Program Data" repeat.end tree.end tree.end tree "FLEXCAN (Controller Area Network)" base ad:0x0 tree "CAN_0" base ad:0x40304000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable" bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RFEN,Legacy RX FIFO Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode." bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers" newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable" rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode" newline bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable" bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected." hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer" line.long 0x4 "CTRL1,Control 1" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled" bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled" bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.." newline bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled" bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable" newline bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." newline bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free-Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x27 line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask" hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers" line.long 0x4 "RX14MASK,Receive 14 Mask" hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Receive 15 Mask" hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1" rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.." eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.." eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized" eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.." newline eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register." rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater." newline rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE" newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting" rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving" eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.." line.long 0x14 "IMASK2,Interrupt Masks 2" hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask" line.long 0x18 "IMASK1,Interrupt Masks 1" hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask" line.long 0x1C "IFLAG2,Interrupt Flags 2" hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt" line.long 0x20 "IFLAG1,Interrupt Flags 1" hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or Legacy RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.." newline eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or Legacy RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.." eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in Legacy RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.." newline hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved" eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear Legacy FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.." line.long 0x24 "CTRL2,Control 2" bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable" bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable" bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable" newline hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Legacy Receive FIFO Filters" hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay" newline bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from Legacy RX FIFO or Enhanced..,1: Matching starts from message buffers and.." bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored" newline bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable" bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick" newline bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled" bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable" newline bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.." bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled" newline bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?" bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid" newline bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,Cyclic Redundancy Check" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Legacy RX FIFO Global Mask" hexmask.long 0x0 0.--31. 1. "FGM,Legacy RX FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Legacy RX FIFO Information" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x6C++0x3 line.long 0x0 "IMASK3,Interrupt Masks 3" hexmask.long 0x0 0.--31. 1. "BUF95TO64M,Buffer MBi Mask" group.long 0x74++0x3 line.long 0x0 "IFLAG3,Interrupt Flags 3" hexmask.long 0x0 0.--31. 1. "BUF95TO64,Buffer MBi Interrupt" repeat 96. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x880)++0x3 line.long 0x0 "RXIMR[$1],Receive Individual Mask" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" repeat.end group.long 0xAE0++0xF line.long 0x0 "MECR,Memory Error Control" bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable" bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable" bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word." bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable" bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.." line.long 0x4 "ERRIAR,Error Injection Address" hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High" rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3" line.long 0x8 "ERRIDPR,Error Injection Data Pattern" hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern" line.long 0xC "ERRIPPR,Error Injection Parity Pattern" hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)" hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2" newline hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1" hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)" rgroup.long 0xAF0++0xB line.long 0x0 "RERRAR,Error Report Address" bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error" bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected" line.long 0x4 "RERRDR,Error Report Data" hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error" line.long 0x8 "RERRSYNR,Error Report Syndrome" bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)" newline bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2" newline bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1" newline bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)" group.long 0xAFC++0x3 line.long 0x0 "ERRSR,Error Status" eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" group.long 0xBF0++0x17 line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers" hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor" hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor" line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing" hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width" hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2" newline hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1" line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing" hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width" hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2" newline hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1" line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation" bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable" newline hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset" eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value" line.long 0x10 "FDCTRL,CAN FD Control" bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable" bitfld.long 0x10 22.--23. "MBDSR2,Message Buffer Data Size for Region 2" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x14 "FDCBT,CAN FD Bit Timing" hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" group.long 0xC0C++0xB line.long 0x0 "ERFCR,Enhanced RX FIFO Control" bitfld.long 0x0 31. "ERFEN,Enhanced RX FIFO enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 26.--30. 1. "DMALW,DMA Last Word" newline hexmask.long.byte 0x0 16.--22. 1. "NEXIF,Number of Extended ID Filter Elements" hexmask.long.byte 0x0 8.--13. 1. "NFE,Number of Enhanced RX FIFO Filter Elements" newline hexmask.long.byte 0x0 0.--4. 1. "ERFWM,Enhanced RX FIFO Watermark" line.long 0x4 "ERFIER,Enhanced RX FIFO Interrupt Enable" bitfld.long 0x4 31. "ERFUFWIE,Enhanced RX FIFO Underflow Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x4 30. "ERFOVFIE,Enhanced RX FIFO Overflow Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x4 29. "ERFWMIIE,Enhanced RX FIFO Watermark Indication Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x4 28. "ERFDAIE,Enhanced RX FIFO Data Available Interrupt Enable" "0: Disable,1: Enable" line.long 0x8 "ERFSR,Enhanced RX FIFO Status" eventfld.long 0x8 31. "ERFUFW,Enhanced RX FIFO Underflow Flag" "0: No such occurrence,1: Underflow" eventfld.long 0x8 30. "ERFOVF,Enhanced RX FIFO Overflow Flag" "0: No such occurrence,1: Overflow" newline eventfld.long 0x8 29. "ERFWMI,Enhanced RX FIFO Watermark Indication Flag" "0: No such occurrence,1: Number of messages in FIFO is greater than the.." eventfld.long 0x8 28. "ERFDA,Enhanced RX FIFO Data Available Flag" "0: No such occurrence,1: At least one message stored in Enhanced RX FIFO" newline bitfld.long 0x8 27. "ERFCLR,Enhanced RX FIFO Clear" "0: No effect,1: Clear enhanced RX FIFO content" rbitfld.long 0x8 17. "ERFE,Enhanced RX FIFO Empty Flag" "0: Not empty,1: Empty" newline rbitfld.long 0x8 16. "ERFF,Enhanced RX FIFO Full Flag" "0: Not full,1: Full" hexmask.long.byte 0x8 0.--5. 1. "ERFEL,Enhanced RX FIFO Elements" repeat 96. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC30)++0x3 line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp" hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x3000)++0x3 line.long 0x0 "ERFFEL[$1],Enhanced RX FIFO Filter Element" hexmask.long 0x0 0.--31. 1. "FEL,Filter Element Bits" repeat.end tree.end tree "CAN_1" base ad:0x40308000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable" bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RFEN,Legacy RX FIFO Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode." bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers" newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable" rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode" newline bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable" bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected." hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer" line.long 0x4 "CTRL1,Control 1" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled" bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled" bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.." newline bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled" bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable" newline bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." newline bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free-Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x27 line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask" hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers" line.long 0x4 "RX14MASK,Receive 14 Mask" hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Receive 15 Mask" hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1" rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.." eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.." eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized" eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.." newline eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register." rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater." newline rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE" newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting" rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving" eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.." line.long 0x14 "IMASK2,Interrupt Masks 2" hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask" line.long 0x18 "IMASK1,Interrupt Masks 1" hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask" line.long 0x1C "IFLAG2,Interrupt Flags 2" hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt" line.long 0x20 "IFLAG1,Interrupt Flags 1" hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or Legacy RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.." newline eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or Legacy RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.." eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in Legacy RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.." newline hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved" eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear Legacy FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.." line.long 0x24 "CTRL2,Control 2" bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable" bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable" bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable" newline hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Legacy Receive FIFO Filters" hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay" newline bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from Legacy RX FIFO or Enhanced..,1: Matching starts from message buffers and.." bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored" newline bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable" bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick" newline bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled" bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable" newline bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.." bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled" newline bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?" bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid" newline bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,Cyclic Redundancy Check" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Legacy RX FIFO Global Mask" hexmask.long 0x0 0.--31. 1. "FGM,Legacy RX FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Legacy RX FIFO Information" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x6C++0x3 line.long 0x0 "IMASK3,Interrupt Masks 3" hexmask.long 0x0 0.--31. 1. "BUF95TO64M,Buffer MBi Mask" group.long 0x74++0x3 line.long 0x0 "IFLAG3,Interrupt Flags 3" hexmask.long 0x0 0.--31. 1. "BUF95TO64,Buffer MBi Interrupt" repeat 96. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x880)++0x3 line.long 0x0 "RXIMR[$1],Receive Individual Mask" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" repeat.end group.long 0xAE0++0xF line.long 0x0 "MECR,Memory Error Control" bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable" bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable" bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word." bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable" bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.." line.long 0x4 "ERRIAR,Error Injection Address" hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High" rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3" line.long 0x8 "ERRIDPR,Error Injection Data Pattern" hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern" line.long 0xC "ERRIPPR,Error Injection Parity Pattern" hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)" hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2" newline hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1" hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)" rgroup.long 0xAF0++0xB line.long 0x0 "RERRAR,Error Report Address" bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error" bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected" line.long 0x4 "RERRDR,Error Report Data" hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error" line.long 0x8 "RERRSYNR,Error Report Syndrome" bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)" newline bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2" newline bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1" newline bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)" group.long 0xAFC++0x3 line.long 0x0 "ERRSR,Error Status" eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" group.long 0xBF0++0x17 line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers" hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor" hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor" line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing" hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width" hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2" newline hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1" line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing" hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width" hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2" newline hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1" line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation" bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable" newline hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset" eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value" line.long 0x10 "FDCTRL,CAN FD Control" bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable" bitfld.long 0x10 22.--23. "MBDSR2,Message Buffer Data Size for Region 2" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x14 "FDCBT,CAN FD Bit Timing" hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" group.long 0xC0C++0xB line.long 0x0 "ERFCR,Enhanced RX FIFO Control" bitfld.long 0x0 31. "ERFEN,Enhanced RX FIFO enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 26.--30. 1. "DMALW,DMA Last Word" newline hexmask.long.byte 0x0 16.--22. 1. "NEXIF,Number of Extended ID Filter Elements" hexmask.long.byte 0x0 8.--13. 1. "NFE,Number of Enhanced RX FIFO Filter Elements" newline hexmask.long.byte 0x0 0.--4. 1. "ERFWM,Enhanced RX FIFO Watermark" line.long 0x4 "ERFIER,Enhanced RX FIFO Interrupt Enable" bitfld.long 0x4 31. "ERFUFWIE,Enhanced RX FIFO Underflow Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x4 30. "ERFOVFIE,Enhanced RX FIFO Overflow Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x4 29. "ERFWMIIE,Enhanced RX FIFO Watermark Indication Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x4 28. "ERFDAIE,Enhanced RX FIFO Data Available Interrupt Enable" "0: Disable,1: Enable" line.long 0x8 "ERFSR,Enhanced RX FIFO Status" eventfld.long 0x8 31. "ERFUFW,Enhanced RX FIFO Underflow Flag" "0: No such occurrence,1: Underflow" eventfld.long 0x8 30. "ERFOVF,Enhanced RX FIFO Overflow Flag" "0: No such occurrence,1: Overflow" newline eventfld.long 0x8 29. "ERFWMI,Enhanced RX FIFO Watermark Indication Flag" "0: No such occurrence,1: Number of messages in FIFO is greater than the.." eventfld.long 0x8 28. "ERFDA,Enhanced RX FIFO Data Available Flag" "0: No such occurrence,1: At least one message stored in Enhanced RX FIFO" newline bitfld.long 0x8 27. "ERFCLR,Enhanced RX FIFO Clear" "0: No effect,1: Clear enhanced RX FIFO content" rbitfld.long 0x8 17. "ERFE,Enhanced RX FIFO Empty Flag" "0: Not empty,1: Empty" newline rbitfld.long 0x8 16. "ERFF,Enhanced RX FIFO Full Flag" "0: Not full,1: Full" hexmask.long.byte 0x8 0.--5. 1. "ERFEL,Enhanced RX FIFO Elements" repeat 96. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC30)++0x3 line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp" hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x3000)++0x3 line.long 0x0 "ERFFEL[$1],Enhanced RX FIFO Filter Element" hexmask.long 0x0 0.--31. 1. "FEL,Filter Element Bits" repeat.end tree.end tree "CAN_2" base ad:0x4030C000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable" bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RFEN,Legacy RX FIFO Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode." bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers" newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable" rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode" newline bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable" bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected." hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer" line.long 0x4 "CTRL1,Control 1" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled" bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled" bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.." newline bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled" bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable" newline bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." newline bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free-Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x27 line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask" hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers" line.long 0x4 "RX14MASK,Receive 14 Mask" hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Receive 15 Mask" hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1" rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.." eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.." eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized" eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.." newline eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register." rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater." newline rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE" newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting" rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving" eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.." line.long 0x14 "IMASK2,Interrupt Masks 2" hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask" line.long 0x18 "IMASK1,Interrupt Masks 1" hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask" line.long 0x1C "IFLAG2,Interrupt Flags 2" hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt" line.long 0x20 "IFLAG1,Interrupt Flags 1" hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or Legacy RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.." newline eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or Legacy RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.." eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in Legacy RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.." newline hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved" eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear Legacy FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.." line.long 0x24 "CTRL2,Control 2" bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable" bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable" bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable" newline hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Legacy Receive FIFO Filters" hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay" newline bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from Legacy RX FIFO or Enhanced..,1: Matching starts from message buffers and.." bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored" newline bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable" bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick" newline bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled" bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable" newline bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.." bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled" newline bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?" bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid" newline bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,Cyclic Redundancy Check" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Legacy RX FIFO Global Mask" hexmask.long 0x0 0.--31. 1. "FGM,Legacy RX FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Legacy RX FIFO Information" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x6C++0x3 line.long 0x0 "IMASK3,Interrupt Masks 3" hexmask.long 0x0 0.--31. 1. "BUF95TO64M,Buffer MBi Mask" group.long 0x74++0x3 line.long 0x0 "IFLAG3,Interrupt Flags 3" hexmask.long 0x0 0.--31. 1. "BUF95TO64,Buffer MBi Interrupt" repeat 96. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x880)++0x3 line.long 0x0 "RXIMR[$1],Receive Individual Mask" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" repeat.end group.long 0xAE0++0xF line.long 0x0 "MECR,Memory Error Control" bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable" bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable" bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word." bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable" bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.." line.long 0x4 "ERRIAR,Error Injection Address" hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High" rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3" line.long 0x8 "ERRIDPR,Error Injection Data Pattern" hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern" line.long 0xC "ERRIPPR,Error Injection Parity Pattern" hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)" hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2" newline hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1" hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)" rgroup.long 0xAF0++0xB line.long 0x0 "RERRAR,Error Report Address" bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error" bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected" line.long 0x4 "RERRDR,Error Report Data" hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error" line.long 0x8 "RERRSYNR,Error Report Syndrome" bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)" newline bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2" newline bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1" newline bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)" group.long 0xAFC++0x3 line.long 0x0 "ERRSR,Error Status" eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" group.long 0xBF0++0x17 line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers" hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor" hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor" line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing" hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width" hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2" newline hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1" line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing" hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width" hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2" newline hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1" line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation" bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable" newline hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset" eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value" line.long 0x10 "FDCTRL,CAN FD Control" bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable" bitfld.long 0x10 22.--23. "MBDSR2,Message Buffer Data Size for Region 2" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x14 "FDCBT,CAN FD Bit Timing" hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" group.long 0xC0C++0xB line.long 0x0 "ERFCR,Enhanced RX FIFO Control" bitfld.long 0x0 31. "ERFEN,Enhanced RX FIFO enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 26.--30. 1. "DMALW,DMA Last Word" newline hexmask.long.byte 0x0 16.--22. 1. "NEXIF,Number of Extended ID Filter Elements" hexmask.long.byte 0x0 8.--13. 1. "NFE,Number of Enhanced RX FIFO Filter Elements" newline hexmask.long.byte 0x0 0.--4. 1. "ERFWM,Enhanced RX FIFO Watermark" line.long 0x4 "ERFIER,Enhanced RX FIFO Interrupt Enable" bitfld.long 0x4 31. "ERFUFWIE,Enhanced RX FIFO Underflow Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x4 30. "ERFOVFIE,Enhanced RX FIFO Overflow Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x4 29. "ERFWMIIE,Enhanced RX FIFO Watermark Indication Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x4 28. "ERFDAIE,Enhanced RX FIFO Data Available Interrupt Enable" "0: Disable,1: Enable" line.long 0x8 "ERFSR,Enhanced RX FIFO Status" eventfld.long 0x8 31. "ERFUFW,Enhanced RX FIFO Underflow Flag" "0: No such occurrence,1: Underflow" eventfld.long 0x8 30. "ERFOVF,Enhanced RX FIFO Overflow Flag" "0: No such occurrence,1: Overflow" newline eventfld.long 0x8 29. "ERFWMI,Enhanced RX FIFO Watermark Indication Flag" "0: No such occurrence,1: Number of messages in FIFO is greater than the.." eventfld.long 0x8 28. "ERFDA,Enhanced RX FIFO Data Available Flag" "0: No such occurrence,1: At least one message stored in Enhanced RX FIFO" newline bitfld.long 0x8 27. "ERFCLR,Enhanced RX FIFO Clear" "0: No effect,1: Clear enhanced RX FIFO content" rbitfld.long 0x8 17. "ERFE,Enhanced RX FIFO Empty Flag" "0: Not empty,1: Empty" newline rbitfld.long 0x8 16. "ERFF,Enhanced RX FIFO Full Flag" "0: Not full,1: Full" hexmask.long.byte 0x8 0.--5. 1. "ERFEL,Enhanced RX FIFO Elements" repeat 96. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC30)++0x3 line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp" hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x3000)++0x3 line.long 0x0 "ERFFEL[$1],Enhanced RX FIFO Filter Element" hexmask.long 0x0 0.--31. 1. "FEL,Filter Element Bits" repeat.end tree.end tree "CAN_3" base ad:0x40310000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable" bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RFEN,RX FIFO Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode." bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers" newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable" rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode" newline bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable" bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected." hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer" line.long 0x4 "CTRL1,Control 1" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled" bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled" bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.." newline bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled" bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable" newline bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." newline bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free-Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x27 line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask" hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers" line.long 0x4 "RX14MASK,Receive 14 Mask" hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Receive 15 Mask" hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1" rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.." eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.." eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized" eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.." newline eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register." rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater." newline rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE" newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting" rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving" eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.." line.long 0x14 "IMASK2,Interrupt Masks 2" hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask" line.long 0x18 "IMASK1,Interrupt Masks 1" hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask" line.long 0x1C "IFLAG2,Interrupt Flags 2" hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt" line.long 0x20 "IFLAG1,Interrupt Flags 1" hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.." newline eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.." eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.." newline hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved" eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.." line.long 0x24 "CTRL2,Control 2" bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable" bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable" bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable" newline hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Receive FIFO Filters" hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay" newline bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from RX FIFO and continues on..,1: Matching starts from message buffers and.." bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored" newline bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable" bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick" newline bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled" bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable" newline bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.." bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled" newline bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?" bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid" newline bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,Cyclic Redundancy Check" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,RX FIFO Global Mask" hexmask.long 0x0 0.--31. 1. "FGM,RX FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,RX FIFO Information" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x880)++0x3 line.long 0x0 "RXIMR[$1],Receive Individual Mask" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" repeat.end group.long 0xAE0++0xF line.long 0x0 "MECR,Memory Error Control" bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable" bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable" bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word." bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable" bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.." line.long 0x4 "ERRIAR,Error Injection Address" hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High" rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3" line.long 0x8 "ERRIDPR,Error Injection Data Pattern" hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern" line.long 0xC "ERRIPPR,Error Injection Parity Pattern" hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)" hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2" newline hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1" hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)" rgroup.long 0xAF0++0xB line.long 0x0 "RERRAR,Error Report Address" bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error" bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected" line.long 0x4 "RERRDR,Error Report Data" hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error" line.long 0x8 "RERRSYNR,Error Report Syndrome" bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)" newline bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2" newline bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1" newline bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)" group.long 0xAFC++0x3 line.long 0x0 "ERRSR,Error Status" eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" group.long 0xBF0++0x17 line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers" hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor" hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor" line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing" hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width" hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2" newline hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1" line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing" hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width" hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2" newline hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1" line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation" bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable" newline hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset" eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value" line.long 0x10 "FDCTRL,CAN FD Control" bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable" bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" newline eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" newline hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x14 "FDCBT,CAN FD Bit Timing" hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC30)++0x3 line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp" hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp" repeat.end tree.end tree "CAN_4" base ad:0x40314000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable" bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RFEN,RX FIFO Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode." bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers" newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable" rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode" newline bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable" bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected." hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer" line.long 0x4 "CTRL1,Control 1" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled" bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled" bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.." newline bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled" bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable" newline bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." newline bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free-Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x27 line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask" hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers" line.long 0x4 "RX14MASK,Receive 14 Mask" hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Receive 15 Mask" hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1" rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.." eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.." eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized" eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.." newline eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register." rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater." newline rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE" newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting" rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving" eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.." line.long 0x14 "IMASK2,Interrupt Masks 2" hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask" line.long 0x18 "IMASK1,Interrupt Masks 1" hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask" line.long 0x1C "IFLAG2,Interrupt Flags 2" hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt" line.long 0x20 "IFLAG1,Interrupt Flags 1" hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.." newline eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.." eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.." newline hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved" eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.." line.long 0x24 "CTRL2,Control 2" bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable" bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable" bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable" newline hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Receive FIFO Filters" hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay" newline bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from RX FIFO and continues on..,1: Matching starts from message buffers and.." bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored" newline bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable" bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick" newline bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled" bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable" newline bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.." bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled" newline bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?" bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid" newline bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,Cyclic Redundancy Check" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,RX FIFO Global Mask" hexmask.long 0x0 0.--31. 1. "FGM,RX FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,RX FIFO Information" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x880)++0x3 line.long 0x0 "RXIMR[$1],Receive Individual Mask" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" repeat.end group.long 0xAE0++0xF line.long 0x0 "MECR,Memory Error Control" bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable" bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable" bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word." bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable" bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.." line.long 0x4 "ERRIAR,Error Injection Address" hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High" rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3" line.long 0x8 "ERRIDPR,Error Injection Data Pattern" hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern" line.long 0xC "ERRIPPR,Error Injection Parity Pattern" hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)" hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2" newline hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1" hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)" rgroup.long 0xAF0++0xB line.long 0x0 "RERRAR,Error Report Address" bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error" bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected" line.long 0x4 "RERRDR,Error Report Data" hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error" line.long 0x8 "RERRSYNR,Error Report Syndrome" bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)" newline bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2" newline bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1" newline bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)" group.long 0xAFC++0x3 line.long 0x0 "ERRSR,Error Status" eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" group.long 0xBF0++0x17 line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers" hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor" hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor" line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing" hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width" hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2" newline hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1" line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing" hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width" hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2" newline hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1" line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation" bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable" newline hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset" eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value" line.long 0x10 "FDCTRL,CAN FD Control" bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable" bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" newline eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" newline hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x14 "FDCBT,CAN FD Bit Timing" hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC30)++0x3 line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp" hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp" repeat.end tree.end tree "CAN_5" base ad:0x40318000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable" bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RFEN,RX FIFO Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode." bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers" newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable" rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode" newline bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable" bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable" bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected." hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer" line.long 0x4 "CTRL1,Control 1" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled" bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled" newline bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled" bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.." newline bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled" bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable" newline bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." newline bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free-Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x27 line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask" hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers" line.long 0x4 "RX14MASK,Receive 14 Mask" hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Receive 15 Mask" hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1" rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.." eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun" newline eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.." eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized" eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.." newline eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register." rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater." newline rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE" newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting" rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving" eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.." line.long 0x14 "IMASK2,Interrupt Masks 2" hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask" line.long 0x18 "IMASK1,Interrupt Masks 1" hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask" line.long 0x1C "IFLAG2,Interrupt Flags 2" hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt" line.long 0x20 "IFLAG1,Interrupt Flags 1" hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.." newline eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.." eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.." newline hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved" eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.." line.long 0x24 "CTRL2,Control 2" bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable" bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable" bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable" newline hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Receive FIFO Filters" hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay" newline bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from RX FIFO and continues on..,1: Matching starts from message buffers and.." bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored" newline bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable" bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick" newline bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled" bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable" newline bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.." bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled" newline bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?" bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid" newline bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,Cyclic Redundancy Check" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,RX FIFO Global Mask" hexmask.long 0x0 0.--31. 1. "FGM,RX FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,RX FIFO Information" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x880)++0x3 line.long 0x0 "RXIMR[$1],Receive Individual Mask" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" repeat.end group.long 0xAE0++0xF line.long 0x0 "MECR,Memory Error Control" bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable" bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable" bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable" bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word." bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable" newline bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable" bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.." line.long 0x4 "ERRIAR,Error Injection Address" hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High" rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3" line.long 0x8 "ERRIDPR,Error Injection Data Pattern" hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern" line.long 0xC "ERRIPPR,Error Injection Parity Pattern" hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)" hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2" newline hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1" hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)" rgroup.long 0xAF0++0xB line.long 0x0 "RERRAR,Error Report Address" bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error" bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected" line.long 0x4 "RERRDR,Error Report Data" hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error" line.long 0x8 "RERRSYNR,Error Report Syndrome" bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)" newline bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2" newline bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1" newline bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read." hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)" group.long 0xAFC++0x3 line.long 0x0 "ERRSR,Error Status" eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" newline eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected" group.long 0xBF0++0x17 line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers" hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor" hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor" line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing" hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width" hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2" newline hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1" line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing" hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width" hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2" newline hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1" line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation" bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable" newline hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset" eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" newline hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value" line.long 0x10 "FDCTRL,CAN FD Control" bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable" bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" newline bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes" bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable" newline eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range" hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" newline hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x14 "FDCBT,CAN FD Bit Timing" hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC30)++0x3 line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp" hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp" repeat.end tree.end tree.end tree "FLEXIO (Flexible I/O)" base ad:0x40324000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 24.--31. 1. "TRIGGER,Trigger Number" hexmask.long.byte 0x4 16.--23. 1. "PIN,Pin Number" newline hexmask.long.byte 0x4 8.--15. 1. "TIMER,Timer Number" hexmask.long.byte 0x4 0.--7. 1. "SHIFTER,Shifter Number" group.long 0x8++0x3 line.long 0x0 "CTRL,FLEXIO Control" bitfld.long 0x0 30. "DBGE,Debug Enable" "0: FLEXIO is disabled in Debug modes.,1: FLEXIO is enabled in Debug modes." bitfld.long 0x0 2. "FASTACC,Fast Access" "0: Configures for normal register accesses to FLEXIO,1: Configures for fast register accesses to FLEXIO" newline bitfld.long 0x0 1. "SWRST,Software Reset" "0: Software reset is disabled,1: Software reset is enabled. All FLEXIO registers.." bitfld.long 0x0 0. "FLEXEN,FLEXIO Enable" "0: FLEXIO module is disabled.,1: FLEXIO module is enabled." rgroup.long 0xC++0x3 line.long 0x0 "PIN,Pin State" hexmask.long 0x0 0.--31. 1. "PDI,Pin Data Input" group.long 0x10++0xB line.long 0x0 "SHIFTSTAT,Shifter Status" hexmask.long.byte 0x0 0.--7. 1. "SSF,Shifter Status Flag" line.long 0x4 "SHIFTERR,Shifter Error" hexmask.long.byte 0x4 0.--7. 1. "SEF,Shifter Error Flags" line.long 0x8 "TIMSTAT,Timer Status" hexmask.long.byte 0x8 0.--7. 1. "TSF,Timer Status Flags" group.long 0x20++0xB line.long 0x0 "SHIFTSIEN,Shifter Status Interrupt Enable" hexmask.long.byte 0x0 0.--7. 1. "SSIE,Shifter Status Interrupt Enable" line.long 0x4 "SHIFTEIEN,Shifter Error Interrupt Enable" hexmask.long.byte 0x4 0.--7. 1. "SEIE,Shifter Error Interrupt Enable" line.long 0x8 "TIMIEN,Timer Interrupt Enable" hexmask.long.byte 0x8 0.--7. 1. "TEIE,Timer Status Interrupt Enable" group.long 0x30++0x3 line.long 0x0 "SHIFTSDEN,Shifter Status DMA Enable" hexmask.long.byte 0x0 0.--7. 1. "SSDE,Shifter Status DMA Enable" group.long 0x38++0x3 line.long 0x0 "TIMERSDEN,Timer Status DMA Enable" hexmask.long.byte 0x0 0.--7. 1. "TSDE,Timer Status DMA Enable" group.long 0x40++0x3 line.long 0x0 "SHIFTSTATE,Shifter State" bitfld.long 0x0 0.--2. "STATE,Current State Pointer" "0,1,2,3,4,5,6,7" group.long 0x48++0x2F line.long 0x0 "TRGSTAT,Trigger Status" hexmask.long.byte 0x0 0.--3. 1. "ETSF,External Trigger Status Flags" line.long 0x4 "TRIGIEN,External Trigger Interrupt Enable" hexmask.long.byte 0x4 0.--3. 1. "TRIE,External Trigger Interrupt Enable" line.long 0x8 "PINSTAT,Pin Status" hexmask.long 0x8 0.--31. 1. "PSF,Pin Status Flags" line.long 0xC "PINIEN,Pin Interrupt Enable" hexmask.long 0xC 0.--31. 1. "PSIE,Pin Status Interrupt Enable" line.long 0x10 "PINREN,Pin Rising Edge Enable" hexmask.long 0x10 0.--31. 1. "PRE,Pin Rising Edge" line.long 0x14 "PINFEN,Pin Falling Edge Enable" hexmask.long 0x14 0.--31. 1. "PFE,Pin Falling Edge" line.long 0x18 "PINOUTD,Pin Output Data" hexmask.long 0x18 0.--31. 1. "OUTD,Output Data" line.long 0x1C "PINOUTE,Pin Output Enable" hexmask.long 0x1C 0.--31. 1. "OUTE,Output Enable" line.long 0x20 "PINOUTDIS,Pin Output Disable" hexmask.long 0x20 0.--31. 1. "OUTDIS,Output Disable" line.long 0x24 "PINOUTCLR,Pin Output Clear" hexmask.long 0x24 0.--31. 1. "OUTCLR,Output Clear" line.long 0x28 "PINOUTSET,Pin Output Set" hexmask.long 0x28 0.--31. 1. "OUTSET,Output Set" line.long 0x2C "PINOUTTOG,Pin Output Toggle" hexmask.long 0x2C 0.--31. 1. "OUTTOG,Output Toggle" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SHIFTCTL[$1],Shifter Control N" bitfld.long 0x0 24.--26. "TIMSEL,Timer Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. "TIMPOL,Timer Polarity" "0: Shift on posedge of shift clock,1: Shift on negedge of shift clock" newline bitfld.long 0x0 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open-drain or bidirectional output..,2: Shifter pin bidirectional output data,3: Shifter pin output" hexmask.long.byte 0x0 8.--12. 1. "PINSEL,Shifter Pin Select" newline bitfld.long 0x0 7. "PINPOL,Shifter Pin Polarity" "0: Pin is active high,1: Pin is active low" bitfld.long 0x0 0.--2. "SMOD,Shifter Mode" "0: Disabled.,1: Receive mode. Captures the current shifter..,2: Transmit mode. Load SHIFTBUF contents into the..,?,4: Match Store mode. Shifter data is compared to..,5: Match Continuous mode. Shifter data is..,6: State mode. SHIFTBUF contents are used for..,7: Logic mode. SHIFTBUF contents are used for.." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "SHIFTCFG[$1],Shifter Configuration N" hexmask.long.byte 0x0 16.--20. 1. "PWIDTH,Parallel Width" bitfld.long 0x0 12. "SSIZE,Shifter Size" "0: Shift register is 32-bit.,1: Shift register is 24-bit." newline bitfld.long 0x0 9. "LATST,Late Store" "0: Shift register stores the pre-shift register..,1: Shift register stores the post-shift register.." bitfld.long 0x0 8. "INSRC,Input Source" "0: Pin,1: Shifter N+1 Output" newline bitfld.long 0x0 4.--5. "SSTOP,Shifter Stop bit" "0: Stop bit disabled for transmitter/receiver/match..,1: Stop bit disabled for transmitter/receiver/match..,2: Transmitter outputs stop bit value 0 on store.,3: Transmitter outputs stop bit value 1 on store." bitfld.long 0x0 0.--1. "SSTART,Shifter Start Bit" "0: Start bit disabled for..,1: Start bit disabled for..,2: Transmitter outputs start bit value 0 before..,3: Transmitter outputs start bit value 1 before.." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "SHIFTBUF[$1],Shifter Buffer N" hexmask.long 0x0 0.--31. 1. "SHIFTBUF,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x280)++0x3 line.long 0x0 "SHIFTBUFBIS[$1],Shifter Buffer N Bit Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFBIS,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x300)++0x3 line.long 0x0 "SHIFTBUFBYS[$1],Shifter Buffer N Byte Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFBYS,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x380)++0x3 line.long 0x0 "SHIFTBUFBBS[$1],Shifter Buffer N Bit Byte Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFBBS,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x400)++0x3 line.long 0x0 "TIMCTL[$1],Timer Control N" hexmask.long.byte 0x0 24.--29. 1. "TRGSEL,Trigger Select" bitfld.long 0x0 23. "TRGPOL,Trigger Polarity" "0: Trigger active high,1: Trigger active low" newline bitfld.long 0x0 22. "TRGSRC,Trigger Source" "0: External trigger selected,1: Internal trigger selected" bitfld.long 0x0 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open-drain or bidirectional output..,2: Timer pin bidirectional output data,3: Timer pin output" newline hexmask.long.byte 0x0 8.--12. 1. "PINSEL,Timer Pin Select" bitfld.long 0x0 7. "PINPOL,Timer Pin Polarity" "0: Pin is active high,1: Pin is active low" newline bitfld.long 0x0 6. "PININS,Timer Pin Input Select" "0: Timer pin input and output are selected by PINSEL.,1: Timer pin input is selected by PINSEL+1. Timer.." bitfld.long 0x0 5. "ONETIM,Timer One Time Operation" "0: The timer enable event is generated as normal.,1: The timer enable event is blocked unless timer.." newline bitfld.long 0x0 0.--2. "TIMOD,Timer Mode" "0: Timer disabled.,1: Dual 8-bit counters baud mode.,2: Dual 8-bit counters PWM high mode.,3: Single 16-bit counter mode.,4: Single 16-bit counter disable mode.,5: Dual 8-bit counters word mode.,6: Dual 8-bit counters PWM low mode.,7: Single 16-bit input capture mode." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x480)++0x3 line.long 0x0 "TIMCFG[$1],Timer Configuration N" bitfld.long 0x0 24.--25. "TIMOUT,Timer Output" "0: Timer output is logic one when enabled and is..,1: Timer output is logic zero when enabled and is..,2: Timer output is logic one when enabled and on..,3: Timer output is logic zero when enabled and on.." bitfld.long 0x0 20.--22. "TIMDEC,Timer Decrement" "0: Decrement counter on FLEXIO clock. Shift clock..,1: Decrement counter on trigger input (both edges).,2: Decrement counter on pin input (both edges).,3: Decrement counter on trigger input (both edges).,4: Decrement counter on FLEXIO clock divided by 16.,5: Decrement counter on FLEXIO clock divided by..,6: Decrement counter on pin input (rising edge).,7: Decrement counter on trigger input (rising.." newline bitfld.long 0x0 16.--18. "TIMRST,Timer Reset" "0: Timer never reset,1: Timer reset on timer output high.,2: Timer reset on timer pin equal to timer output,3: Timer reset on timer trigger equal to timer output,4: Timer reset on timer pin rising edge,?,6: Timer reset on trigger rising edge,7: Timer reset on trigger rising or falling edge" bitfld.long 0x0 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on Timer N-1 disable,2: Timer disabled on timer compare (upper 8-bits..,3: Timer disabled on timer compare (upper 8-bits..,4: Timer disabled on pin rising or falling edge,5: Timer disabled on pin rising or falling edge..,6: Timer disabled on trigger falling edge,?" newline bitfld.long 0x0 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on Timer N-1 enable,2: Timer enabled on Trigger high,3: Timer enabled on Trigger high and Pin high,4: Timer enabled on Pin rising edge,5: Timer enabled on Pin rising edge and Trigger high,6: Timer enabled on Trigger rising edge,7: Timer enabled on Trigger rising or falling edge" bitfld.long 0x0 4.--5. "TSTOP,Timer Stop Bit" "0: Stop bit disabled,1: Stop bit is enabled on timer compare,2: Stop bit is enabled on timer disable,3: Stop bit is enabled on timer compare and timer.." newline bitfld.long 0x0 1. "TSTART,Timer Start Bit" "0: Start bit disabled,1: Start bit enabled" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x500)++0x3 line.long 0x0 "TIMCMP[$1],Timer Compare N" hexmask.long.word 0x0 0.--15. 1. "CMP,Timer Compare Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x680)++0x3 line.long 0x0 "SHIFTBUFNBS[$1],Shifter Buffer N Nibble Byte Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFNBS,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x700)++0x3 line.long 0x0 "SHIFTBUFHWS[$1],Shifter Buffer N Halfword Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFHWS,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x780)++0x3 line.long 0x0 "SHIFTBUFNIS[$1],Shifter Buffer N Nibble Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFNIS,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "SHIFTBUFOES[$1],Shifter Buffer N Odd Even Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFOES,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x880)++0x3 line.long 0x0 "SHIFTBUFEOS[$1],Shifter Buffer N Even Odd Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFEOS,Shift Buffer" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x900)++0x3 line.long 0x0 "SHIFTBUFHBS[$1],Shifter Buffer N Halfword Byte Swapped" hexmask.long 0x0 0.--31. 1. "SHIFTBUFHBS,Shift Buffer" repeat.end tree.end tree "FLEXPWM (Motor Control Pulse Width Modulator Module)" base ad:0x0 tree "EFLEXPWM_0" base ad:0x406B8000 rgroup.word 0x0++0x1 line.word 0x0 "SM0_CNT,Submodule 0 Counter" hexmask.word 0x0 0.--15. 1. "CNT,Counter Value" group.word 0x2++0x5 line.word 0x0 "SM0_INIT,Submodule 0 Initial Count" hexmask.word 0x0 0.--15. 1. "INIT,Initial Count" line.word 0x2 "SM0_CTRL2,Submodule 0 Control 2" bitfld.word 0x2 15. "DBGEN,Run In Debug Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 14. "WAITEN,Run In Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 13. "INDEP,Independent Operation" "0: Complementary PWM pair,1: Independent PWMs" newline bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1" newline bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1" newline bitfld.word 0x2 10. "PWMX_INIT,PWMn_X Initial Value" "0,1" newline bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Source Select" "0: Local sync (PWMn_X),1: Master reload (from submodule 0),2: Master sync from submodule 0,3: External sync (EXT_SYNC)" newline bitfld.word 0x2 7. "FRCEN,Force Initialization Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 6. "FORCE,Force Initialization" "0: No effect,1: Force initialization" newline bitfld.word 0x2 3.--5. "FORCE_SEL,Force Output Source Select" "0: Local force signal (FORCE),1: Master force signal (from submodule 0).,2: Local reload signal.,3: Master reload signal (from submodule 0).,4: Local sync signal,5: Master sync signal (from submodule 0).,6: External force signal (EXT_FORCE),7: External sync signal (EXT_SYNC)" newline bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: Local RELOAD signal,1: Master RELOAD signal (from submodule 0)." newline bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: IPBus clock,1: EXT_CLK,2: Submodule 0 clock (AUX_CLK),?" line.word 0x4 "SM0_CTRL,Submodule 0 Control" hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency" newline bitfld.word 0x4 11. "HALF,Half-Period Reload" "0: Disabled,1: Enabled" newline bitfld.word 0x4 10. "FULL,Full-Period Reload" "0: Disabled,1: Enabled" newline rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3" newline bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: Equal to,1: Equal to or greater than" newline bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: No divider,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" newline bitfld.word 0x4 3. "SPLIT,Split DBLPWM" "0: Not split. PWMA and PWMB each have double pulses.,1: Split to PWMA and PWMB." newline bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Next PWM reload if submodule Load Okay is asserted,1: Load Okay assertion" newline bitfld.word 0x4 1. "DBLX,PWMX Double Switching Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Disabled,1: Enabled" group.word 0xA++0x35 line.word 0x0 "SM0_VAL0,Submodule 0 Value 0" hexmask.word 0x0 0.--15. 1. "VAL0,Timing Value 0" line.word 0x2 "SM0_FRACVAL1,Submodule 0 Fractional Value 1" hexmask.word.byte 0x2 11.--15. 1. "FRACVAL1,Fractional Timing Value 1" line.word 0x4 "SM0_VAL1,Submodule 0 Value 1" hexmask.word 0x4 0.--15. 1. "VAL1,Timing Value 1" line.word 0x6 "SM0_FRACVAL2,Submodule 0 Fractional Value 2" hexmask.word.byte 0x6 11.--15. 1. "FRACVAL2,Fractional Timing Value 2" line.word 0x8 "SM0_VAL2,Submodule 0 Value 2" hexmask.word 0x8 0.--15. 1. "VAL2,Timing Value 2" line.word 0xA "SM0_FRACVAL3,Submodule 0 Fractional Value 3" hexmask.word.byte 0xA 11.--15. 1. "FRACVAL3,Fractional Timing Value 3" line.word 0xC "SM0_VAL3,Submodule 0 Value 3" hexmask.word 0xC 0.--15. 1. "VAL3,Timing Value 3" line.word 0xE "SM0_FRACVAL4,Submodule 0 Fractional Value 4" hexmask.word.byte 0xE 11.--15. 1. "FRACVAL4,Fractional Timing Value 4" line.word 0x10 "SM0_VAL4,Submodule 0 Value 4" hexmask.word 0x10 0.--15. 1. "VAL4,Timing Value 4" line.word 0x12 "SM0_FRACVAL5,Submodule 0 Fractional Value 5" hexmask.word.byte 0x12 11.--15. 1. "FRACVAL5,Fractional Timing Value 5" line.word 0x14 "SM0_VAL5,Submodule 0 Value 5" hexmask.word 0x14 0.--15. 1. "VAL5,Timing Value 5" line.word 0x16 "SM0_FRCTRL,Submodule 0 Fractional Control" bitfld.word 0x16 8. "FRAC_PU,Fractional Delay Power Up" "0: Off,1: On" newline bitfld.word 0x16 4. "FRAC45_EN,Fractional Cycle Placement Enable for PWMn_B" "0: Disable,1: Enable" newline bitfld.word 0x16 2. "FRAC23_EN,Fractional Cycle Placement Enable for PWMn_A" "0: Disable,1: Enable" newline bitfld.word 0x16 1. "FRAC1_EN,Fractional Cycle PWM Period Enable" "0: Disable,1: Enable" line.word 0x18 "SM0_OCTRL,Submodule 0 Output Control" rbitfld.word 0x18 15. "PWMA_IN,PWMn_A Input" "0,1" newline rbitfld.word 0x18 14. "PWMB_IN,PWMn_B Input" "0,1" newline rbitfld.word 0x18 13. "PWMX_IN,PWMn_X Input" "0,1" newline bitfld.word 0x18 10. "POLA,PWMn_A Output Polarity" "0: Not inverted. PWMn_A is active high.,1: Inverted. PWMn_A is active low." newline bitfld.word 0x18 9. "POLB,PWMn_B Output Polarity" "0: Not inverted. PWMn_B is active high.,1: Inverted. PWMn_B is active low." newline bitfld.word 0x18 8. "POLX,PWMn_X Output Polarity" "0: Not inverted. PWMn_X is active high.,1: Inverted. PWMn_X is active low." newline bitfld.word 0x18 4.--5. "PWMAFS,PWMn_A Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 2.--3. "PWMBFS,PWMn_B Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 0.--1. "PWMXFS,PWMn_X Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" line.word 0x1A "SM0_STS,Submodule 0 Status" rbitfld.word 0x1A 14. "RUF,Registers Updated Flag" "0: No register update since last reload,1: At least one double-buffered register updated.." newline eventfld.word 0x1A 13. "REF,Reload Error Flag" "0: No reload error,1: Reload error" newline eventfld.word 0x1A 12. "RF,Reload Flag" "0: No new reload since last clearing,1: New reload since last clearing" newline eventfld.word 0x1A 11. "CFA1,Capture A1 Flag" "0,1" newline eventfld.word 0x1A 10. "CFA0,Capture A0 Flag" "0,1" newline eventfld.word 0x1A 9. "CFB1,Capture B1 Flag" "0,1" newline eventfld.word 0x1A 8. "CFB0,Capture B0 Flag" "0,1" newline eventfld.word 0x1A 7. "CFX1,Capture X1 Flag" "0,1" newline eventfld.word 0x1A 6. "CFX0,Capture X0 Flag" "0,1" newline hexmask.word.byte 0x1A 0.--5. 1. "CMPF,Compare Flags" line.word 0x1C "SM0_INTEN,Submodule 0 Interrupt Enable" bitfld.word 0x1C 13. "REIE,Reload Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 12. "RIE,Reload Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 11. "CA1IE,Capture A1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 10. "CA0IE,Capture A0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 9. "CB1IE,Capture B1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 8. "CB0IE,Capture B0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 7. "CX1IE,Capture X1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 6. "CX0IE,Capture X0 Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x1C 0.--5. 1. "CMPIE,Compare Interrupt Enables" line.word 0x1E "SM0_DMAEN,Submodule 0 DMA Enable" bitfld.word 0x1E 9. "VALDE,Value Registers DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 8. "FAND,FIFO Watermark AND Control" "0: OR: Any enabled FIFO watermark exceeded sets the..,1: AND: All enabled FIFO watermarks must be.." newline bitfld.word 0x1E 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Disable read DMA requests,1: Exceeding a FIFO watermark.,2: Local sync.,3: Local reload." newline bitfld.word 0x1E 5. "CA1DE,Capture A1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 4. "CA0DE,Capture A0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 3. "CB1DE,Capture B1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 2. "CB0DE,Capture B0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 1. "CX1DE,Capture X1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 0. "CX0DE,Capture X0 FIFO DMA Enable" "0: Disable,1: Enable" line.word 0x20 "SM0_TCTRL,Submodule 0 Output Trigger Control" bitfld.word 0x20 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route PWMn_OUT_TRIG0 signal to PWMn_MUX_TRIG0..,1: Route PWMn_A output to PWMn_MUX_TRIG0 port." newline bitfld.word 0x20 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route PWMn_OUT_TRIG1 signal to PWMn_MUX_TRIG1..,1: Route PWMn_B output to PWMn_MUX_TRIG1 port." newline bitfld.word 0x20 12. "TRGFRQ,Trigger Frequency" "0: Every period,1: Final period" newline hexmask.word.byte 0x20 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables" line.word 0x22 "SM0_DISMAP0,Submodule 0 Fault Disable Mapping" hexmask.word.byte 0x22 8.--11. 1. "DIS0X,PWMn_X Fault Disable Mask 0" newline hexmask.word.byte 0x22 4.--7. 1. "DIS0B,PWMn_B Fault Disable Mask 0" newline hexmask.word.byte 0x22 0.--3. 1. "DIS0A,PWMn_A Fault Disable Mask 0" line.word 0x24 "SM0_DISMAP1,Submodule 0 Fault Disable Mapping" hexmask.word.byte 0x24 8.--11. 1. "DIS1X,PWMn_X Fault Disable Mask 1" newline hexmask.word.byte 0x24 4.--7. 1. "DIS1B,PWMn_B Fault Disable Mask 1" newline hexmask.word.byte 0x24 0.--3. 1. "DIS1A,PWMn_A Fault Disable Mask 1" line.word 0x26 "SM0_DTCNT0,Submodule 0 Deadtime Count 0" hexmask.word 0x26 0.--15. 1. "DTCNT0,Deadtime Count 0" line.word 0x28 "SM0_DTCNT1,Submodule 0 Deadtime Count 1" hexmask.word 0x28 0.--15. 1. "DTCNT1,Deadtime Count 1" line.word 0x2A "SM0_CAPTCTRLA,Submodule 0 Capture Control A" rbitfld.word 0x2A 13.--15. "CA1CNT,Capture A1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2A 10.--12. "CA0CNT,Capture A0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2A 8.--9. "CFAWM,Capture A FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2A 7. "EDGCNTA_EN,Edge Counter A Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2A 6. "INP_SELA,Input Select A" "0: Raw PWMn_A input signal,1: Output of edge counter/compare." newline bitfld.word 0x2A 4.--5. "EDGA1,Edge A 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 2.--3. "EDGA0,Edge A 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 1. "ONESHOTA,One Shot Mode A" "0: Free-running,1: One-shot" newline bitfld.word 0x2A 0. "ARMA,Arm A" "0: Disarm input capture,1: Arm input capture as specified by the input edges" line.word 0x2C "SM0_CAPTCOMPA,Submodule 0 Capture Compare A" hexmask.word.byte 0x2C 8.--15. 1. "EDGCNTA,Edge Counter A" newline hexmask.word.byte 0x2C 0.--7. 1. "EDGCMPA,Edge Compare A" line.word 0x2E "SM0_CAPTCTRLB,Submodule 0 Capture Control B" rbitfld.word 0x2E 13.--15. "CB1CNT,Capture B1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2E 10.--12. "CB0CNT,Capture B0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2E 8.--9. "CFBWM,Capture B FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2E 7. "EDGCNTB_EN,Edge Counter B Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2E 6. "INP_SELB,Input Select B" "0: Raw PWMn_B input signal,1: Output of edge counter/compare" newline bitfld.word 0x2E 4.--5. "EDGB1,Edge B 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 2.--3. "EDGB0,Edge B 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 1. "ONESHOTB,One Shot Mode B" "0: Free-running,1: One-shot" newline bitfld.word 0x2E 0. "ARMB,Arm B" "0: Disarm input capture,1: Arm input capture as specified by EDGBn" line.word 0x30 "SM0_CAPTCOMPB,Submodule 0 Capture Compare B" hexmask.word.byte 0x30 8.--15. 1. "EDGCNTB,Edge Counter B" newline hexmask.word.byte 0x30 0.--7. 1. "EDGCMPB,Edge Compare B" line.word 0x32 "SM0_CAPTCTRLX,Submodule 0 Capture Control X" rbitfld.word 0x32 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x32 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x32 8.--9. "CFXWM,Capture X FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x32 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x32 6. "INP_SELX,Input Select X" "0: Raw PWMn_X input signal,1: Output of edge counter/compare." newline bitfld.word 0x32 4.--5. "EDGX1,Edge X 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 2.--3. "EDGX0,Edge X 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 1. "ONESHOTX,One Shot Mode X" "0: Free-running,1: One-shot" newline bitfld.word 0x32 0. "ARMX,Arm X" "0: Disarm input capture,1: Arm input capture as specified by EDGAn" line.word 0x34 "SM0_CAPTCOMPX,Submodule 0 Capture Compare X" hexmask.word.byte 0x34 8.--15. 1. "EDGCNTX,Edge Counter X" newline hexmask.word.byte 0x34 0.--7. 1. "EDGCMPX,Edge Compare X" rgroup.word 0x40++0x17 line.word 0x0 "SM0_CVAL0,Submodule 0 Capture Value 0" hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0" line.word 0x2 "SM0_CVAL0CYC,Submodule 0 Capture Value 0 Cycle" hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle" line.word 0x4 "SM0_CVAL1,Submodule 0 Capture Value 1" hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1" line.word 0x6 "SM0_CVAL1CYC,Submodule 0 Capture Value 1 Cycle" hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle" line.word 0x8 "SM0_CVAL2,Submodule 0 Capture Value 2" hexmask.word 0x8 0.--15. 1. "CAPTVAL2,Capture Value 2" line.word 0xA "SM0_CVAL2CYC,Submodule 0 Capture Value 2 Cycle" hexmask.word.byte 0xA 0.--3. 1. "CVAL2CYC,Capture Value 2 Cycle" line.word 0xC "SM0_CVAL3,Submodule 0 Capture Value 3" hexmask.word 0xC 0.--15. 1. "CAPTVAL3,Capture Value 3" line.word 0xE "SM0_CVAL3CYC,Submodule 0 Capture Value 3 Cycle" hexmask.word.byte 0xE 0.--3. 1. "CVAL3CYC,Capture Value 3 Cycle" line.word 0x10 "SM0_CVAL4,Submodule 0 Capture Value 4" hexmask.word 0x10 0.--15. 1. "CAPTVAL4,Capture Value 4" line.word 0x12 "SM0_CVAL4CYC,Submodule 0 Capture Value 4 Cycle" hexmask.word.byte 0x12 0.--3. 1. "CVAL4CYC,Capture Value 4 Cycle" line.word 0x14 "SM0_CVAL5,Submodule 0 Capture Value 5" hexmask.word 0x14 0.--15. 1. "CAPTVAL5,Capture Value 5" line.word 0x16 "SM0_CVAL5CYC,Submodule 0 Capture Value 5 Cycle" hexmask.word.byte 0x16 0.--3. 1. "CVAL5CYC,Capture Value 5 Cycle" rgroup.word 0x60++0x1 line.word 0x0 "SM1_CNT,Submodule 1 Counter" hexmask.word 0x0 0.--15. 1. "CNT,Counter Value" group.word 0x62++0x5 line.word 0x0 "SM1_INIT,Submodule 1 Initial Count" hexmask.word 0x0 0.--15. 1. "INIT,Initial Count" line.word 0x2 "SM1_CTRL2,Submodule 1 Control 2" bitfld.word 0x2 15. "DBGEN,Run In Debug Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 14. "WAITEN,Run In Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 13. "INDEP,Independent Operation" "0: Complementary PWM pair,1: Independent PWMs" newline bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1" newline bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1" newline bitfld.word 0x2 10. "PWMX_INIT,PWMn_X Initial Value" "0,1" newline bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Source Select" "0: Local sync (PWMn_X),1: Master reload (from submodule 0),2: Master sync from submodule 0,3: External sync (EXT_SYNC)" newline bitfld.word 0x2 7. "FRCEN,Force Initialization Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 6. "FORCE,Force Initialization" "0: No effect,1: Force initialization" newline bitfld.word 0x2 3.--5. "FORCE_SEL,Force Output Source Select" "0: Local force signal (FORCE),1: Master force signal (from submodule 0).,2: Local reload signal.,3: Master reload signal (from submodule 0).,4: Local sync signal,5: Master sync signal (from submodule 0).,6: External force signal (EXT_FORCE),7: External sync signal (EXT_SYNC)" newline bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: Local RELOAD signal,1: Master RELOAD signal (from submodule 0)." newline bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: IPBus clock,1: EXT_CLK,2: Submodule 0 clock (AUX_CLK),?" line.word 0x4 "SM1_CTRL,Submodule 1 Control" hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency" newline bitfld.word 0x4 11. "HALF,Half-Period Reload" "0: Disabled,1: Enabled" newline bitfld.word 0x4 10. "FULL,Full-Period Reload" "0: Disabled,1: Enabled" newline rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3" newline bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: Equal to,1: Equal to or greater than" newline bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: No divider,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" newline bitfld.word 0x4 3. "SPLIT,Split DBLPWM" "0: Not split. PWMA and PWMB each have double pulses.,1: Split to PWMA and PWMB." newline bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Next PWM reload if submodule Load Okay is asserted,1: Load Okay assertion" newline bitfld.word 0x4 1. "DBLX,PWMX Double Switching Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Disabled,1: Enabled" group.word 0x6A++0x35 line.word 0x0 "SM1_VAL0,Submodule 1 Value 0" hexmask.word 0x0 0.--15. 1. "VAL0,Timing Value 0" line.word 0x2 "SM1_FRACVAL1,Submodule 1 Fractional Value 1" hexmask.word.byte 0x2 11.--15. 1. "FRACVAL1,Fractional Timing Value 1" line.word 0x4 "SM1_VAL1,Submodule 1 Value 1" hexmask.word 0x4 0.--15. 1. "VAL1,Timing Value 1" line.word 0x6 "SM1_FRACVAL2,Submodule 1 Fractional Value 2" hexmask.word.byte 0x6 11.--15. 1. "FRACVAL2,Fractional Timing Value 2" line.word 0x8 "SM1_VAL2,Submodule 1 Value 2" hexmask.word 0x8 0.--15. 1. "VAL2,Timing Value 2" line.word 0xA "SM1_FRACVAL3,Submodule 1 Fractional Value 3" hexmask.word.byte 0xA 11.--15. 1. "FRACVAL3,Fractional Timing Value 3" line.word 0xC "SM1_VAL3,Submodule 1 Value 3" hexmask.word 0xC 0.--15. 1. "VAL3,Timing Value 3" line.word 0xE "SM1_FRACVAL4,Submodule 1 Fractional Value 4" hexmask.word.byte 0xE 11.--15. 1. "FRACVAL4,Fractional Timing Value 4" line.word 0x10 "SM1_VAL4,Submodule 1 Value 4" hexmask.word 0x10 0.--15. 1. "VAL4,Timing Value 4" line.word 0x12 "SM1_FRACVAL5,Submodule 1 Fractional Value 5" hexmask.word.byte 0x12 11.--15. 1. "FRACVAL5,Fractional Timing Value 5" line.word 0x14 "SM1_VAL5,Submodule 1 Value 5" hexmask.word 0x14 0.--15. 1. "VAL5,Timing Value 5" line.word 0x16 "SM1_FRCTRL,Submodule 1 Fractional Control" bitfld.word 0x16 8. "FRAC_PU,Fractional Delay Power Up" "0: Off,1: On" newline bitfld.word 0x16 4. "FRAC45_EN,Fractional Cycle Placement Enable for PWMn_B" "0: Disable,1: Enable" newline bitfld.word 0x16 2. "FRAC23_EN,Fractional Cycle Placement Enable for PWMn_A" "0: Disable,1: Enable" newline bitfld.word 0x16 1. "FRAC1_EN,Fractional Cycle PWM Period Enable" "0: Disable,1: Enable" line.word 0x18 "SM1_OCTRL,Submodule 1 Output Control" rbitfld.word 0x18 15. "PWMA_IN,PWMn_A Input" "0,1" newline rbitfld.word 0x18 14. "PWMB_IN,PWMn_B Input" "0,1" newline rbitfld.word 0x18 13. "PWMX_IN,PWMn_X Input" "0,1" newline bitfld.word 0x18 10. "POLA,PWMn_A Output Polarity" "0: Not inverted. PWMn_A is active high.,1: Inverted. PWMn_A is active low." newline bitfld.word 0x18 9. "POLB,PWMn_B Output Polarity" "0: Not inverted. PWMn_B is active high.,1: Inverted. PWMn_B is active low." newline bitfld.word 0x18 8. "POLX,PWMn_X Output Polarity" "0: Not inverted. PWMn_X is active high.,1: Inverted. PWMn_X is active low." newline bitfld.word 0x18 4.--5. "PWMAFS,PWMn_A Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 2.--3. "PWMBFS,PWMn_B Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 0.--1. "PWMXFS,PWMn_X Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" line.word 0x1A "SM1_STS,Submodule 1 Status" rbitfld.word 0x1A 14. "RUF,Registers Updated Flag" "0: No register update since last reload,1: At least one double-buffered register updated.." newline eventfld.word 0x1A 13. "REF,Reload Error Flag" "0: No reload error,1: Reload error" newline eventfld.word 0x1A 12. "RF,Reload Flag" "0: No new reload since last clearing,1: New reload since last clearing" newline eventfld.word 0x1A 11. "CFA1,Capture A1 Flag" "0,1" newline eventfld.word 0x1A 10. "CFA0,Capture A0 Flag" "0,1" newline eventfld.word 0x1A 9. "CFB1,Capture B1 Flag" "0,1" newline eventfld.word 0x1A 8. "CFB0,Capture B0 Flag" "0,1" newline eventfld.word 0x1A 7. "CFX1,Capture X1 Flag" "0,1" newline eventfld.word 0x1A 6. "CFX0,Capture X0 Flag" "0,1" newline hexmask.word.byte 0x1A 0.--5. 1. "CMPF,Compare Flags" line.word 0x1C "SM1_INTEN,Submodule 1 Interrupt Enable" bitfld.word 0x1C 13. "REIE,Reload Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 12. "RIE,Reload Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 11. "CA1IE,Capture A1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 10. "CA0IE,Capture A0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 9. "CB1IE,Capture B1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 8. "CB0IE,Capture B0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 7. "CX1IE,Capture X1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 6. "CX0IE,Capture X0 Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x1C 0.--5. 1. "CMPIE,Compare Interrupt Enables" line.word 0x1E "SM1_DMAEN,Submodule 1 DMA Enable" bitfld.word 0x1E 9. "VALDE,Value Registers DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 8. "FAND,FIFO Watermark AND Control" "0: OR: Any enabled FIFO watermark exceeded sets the..,1: AND: All enabled FIFO watermarks must be.." newline bitfld.word 0x1E 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Disable read DMA requests,1: Exceeding a FIFO watermark.,2: Local sync.,3: Local reload." newline bitfld.word 0x1E 5. "CA1DE,Capture A1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 4. "CA0DE,Capture A0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 3. "CB1DE,Capture B1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 2. "CB0DE,Capture B0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 1. "CX1DE,Capture X1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 0. "CX0DE,Capture X0 FIFO DMA Enable" "0: Disable,1: Enable" line.word 0x20 "SM1_TCTRL,Submodule 1 Output Trigger Control" bitfld.word 0x20 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route PWMn_OUT_TRIG0 signal to PWMn_MUX_TRIG0..,1: Route PWMn_A output to PWMn_MUX_TRIG0 port." newline bitfld.word 0x20 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route PWMn_OUT_TRIG1 signal to PWMn_MUX_TRIG1..,1: Route PWMn_B output to PWMn_MUX_TRIG1 port." newline bitfld.word 0x20 12. "TRGFRQ,Trigger Frequency" "0: Every period,1: Final period" newline hexmask.word.byte 0x20 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables" line.word 0x22 "SM1_DISMAP0,Submodule 1 Fault Disable Mapping" hexmask.word.byte 0x22 8.--11. 1. "DIS0X,PWMn_X Fault Disable Mask 0" newline hexmask.word.byte 0x22 4.--7. 1. "DIS0B,PWMn_B Fault Disable Mask 0" newline hexmask.word.byte 0x22 0.--3. 1. "DIS0A,PWMn_A Fault Disable Mask 0" line.word 0x24 "SM1_DISMAP1,Submodule 1 Fault Disable Mapping" hexmask.word.byte 0x24 8.--11. 1. "DIS1X,PWMn_X Fault Disable Mask 1" newline hexmask.word.byte 0x24 4.--7. 1. "DIS1B,PWMn_B Fault Disable Mask 1" newline hexmask.word.byte 0x24 0.--3. 1. "DIS1A,PWMn_A Fault Disable Mask 1" line.word 0x26 "SM1_DTCNT0,Submodule 1 Deadtime Count 0" hexmask.word 0x26 0.--15. 1. "DTCNT0,Deadtime Count 0" line.word 0x28 "SM1_DTCNT1,Submodule 1 Deadtime Count 1" hexmask.word 0x28 0.--15. 1. "DTCNT1,Deadtime Count 1" line.word 0x2A "SM1_CAPTCTRLA,Submodule 1 Capture Control A" rbitfld.word 0x2A 13.--15. "CA1CNT,Capture A1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2A 10.--12. "CA0CNT,Capture A0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2A 8.--9. "CFAWM,Capture A FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2A 7. "EDGCNTA_EN,Edge Counter A Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2A 6. "INP_SELA,Input Select A" "0: Raw PWMn_A input signal,1: Output of edge counter/compare." newline bitfld.word 0x2A 4.--5. "EDGA1,Edge A 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 2.--3. "EDGA0,Edge A 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 1. "ONESHOTA,One Shot Mode A" "0: Free-running,1: One-shot" newline bitfld.word 0x2A 0. "ARMA,Arm A" "0: Disarm input capture,1: Arm input capture as specified by the input edges" line.word 0x2C "SM1_CAPTCOMPA,Submodule 1 Capture Compare A" hexmask.word.byte 0x2C 8.--15. 1. "EDGCNTA,Edge Counter A" newline hexmask.word.byte 0x2C 0.--7. 1. "EDGCMPA,Edge Compare A" line.word 0x2E "SM1_CAPTCTRLB,Submodule 1 Capture Control B" rbitfld.word 0x2E 13.--15. "CB1CNT,Capture B1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2E 10.--12. "CB0CNT,Capture B0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2E 8.--9. "CFBWM,Capture B FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2E 7. "EDGCNTB_EN,Edge Counter B Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2E 6. "INP_SELB,Input Select B" "0: Raw PWMn_B input signal,1: Output of edge counter/compare" newline bitfld.word 0x2E 4.--5. "EDGB1,Edge B 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 2.--3. "EDGB0,Edge B 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 1. "ONESHOTB,One Shot Mode B" "0: Free-running,1: One-shot" newline bitfld.word 0x2E 0. "ARMB,Arm B" "0: Disarm input capture,1: Arm input capture as specified by EDGBn" line.word 0x30 "SM1_CAPTCOMPB,Submodule 1 Capture Compare B" hexmask.word.byte 0x30 8.--15. 1. "EDGCNTB,Edge Counter B" newline hexmask.word.byte 0x30 0.--7. 1. "EDGCMPB,Edge Compare B" line.word 0x32 "SM1_CAPTCTRLX,Submodule 1 Capture Control X" rbitfld.word 0x32 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x32 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x32 8.--9. "CFXWM,Capture X FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x32 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x32 6. "INP_SELX,Input Select X" "0: Raw PWMn_X input signal,1: Output of edge counter/compare." newline bitfld.word 0x32 4.--5. "EDGX1,Edge X 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 2.--3. "EDGX0,Edge X 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 1. "ONESHOTX,One Shot Mode X" "0: Free-running,1: One-shot" newline bitfld.word 0x32 0. "ARMX,Arm X" "0: Disarm input capture,1: Arm input capture as specified by EDGAn" line.word 0x34 "SM1_CAPTCOMPX,Submodule 1 Capture Compare X" hexmask.word.byte 0x34 8.--15. 1. "EDGCNTX,Edge Counter X" newline hexmask.word.byte 0x34 0.--7. 1. "EDGCMPX,Edge Compare X" rgroup.word 0xA0++0x17 line.word 0x0 "SM1_CVAL0,Submodule 1 Capture Value 0" hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0" line.word 0x2 "SM1_CVAL0CYC,Submodule 1 Capture Value 0 Cycle" hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle" line.word 0x4 "SM1_CVAL1,Submodule 1 Capture Value 1" hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1" line.word 0x6 "SM1_CVAL1CYC,Submodule 1 Capture Value 1 Cycle" hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle" line.word 0x8 "SM1_CVAL2,Submodule 1 Capture Value 2" hexmask.word 0x8 0.--15. 1. "CAPTVAL2,Capture Value 2" line.word 0xA "SM1_CVAL2CYC,Submodule 1 Capture Value 2 Cycle" hexmask.word.byte 0xA 0.--3. 1. "CVAL2CYC,Capture Value 2 Cycle" line.word 0xC "SM1_CVAL3,Submodule 1 Capture Value 3" hexmask.word 0xC 0.--15. 1. "CAPTVAL3,Capture Value 3" line.word 0xE "SM1_CVAL3CYC,Submodule 1 Capture Value 3 Cycle" hexmask.word.byte 0xE 0.--3. 1. "CVAL3CYC,Capture Value 3 Cycle" line.word 0x10 "SM1_CVAL4,Submodule 1 Capture Value 4" hexmask.word 0x10 0.--15. 1. "CAPTVAL4,Capture Value 4" line.word 0x12 "SM1_CVAL4CYC,Submodule 1 Capture Value 4 Cycle" hexmask.word.byte 0x12 0.--3. 1. "CVAL4CYC,Capture Value 4 Cycle" line.word 0x14 "SM1_CVAL5,Submodule 1 Capture Value 5" hexmask.word 0x14 0.--15. 1. "CAPTVAL5,Capture Value 5" line.word 0x16 "SM1_CVAL5CYC,Submodule 1 Capture Value 5 Cycle" hexmask.word.byte 0x16 0.--3. 1. "CVAL5CYC,Capture Value 5 Cycle" group.word 0xB8++0x1 line.word 0x0 "SM1_PHASEDLY,Submodule 1 Phase Delay" hexmask.word 0x0 0.--15. 1. "PHASEDLY,Phase Delay" rgroup.word 0xC0++0x1 line.word 0x0 "SM2_CNT,Submodule 2 Counter" hexmask.word 0x0 0.--15. 1. "CNT,Counter Value" group.word 0xC2++0x5 line.word 0x0 "SM2_INIT,Submodule 2 Initial Count" hexmask.word 0x0 0.--15. 1. "INIT,Initial Count" line.word 0x2 "SM2_CTRL2,Submodule 2 Control 2" bitfld.word 0x2 15. "DBGEN,Run In Debug Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 14. "WAITEN,Run In Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 13. "INDEP,Independent Operation" "0: Complementary PWM pair,1: Independent PWMs" newline bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1" newline bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1" newline bitfld.word 0x2 10. "PWMX_INIT,PWMn_X Initial Value" "0,1" newline bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Source Select" "0: Local sync (PWMn_X),1: Master reload (from submodule 0),2: Master sync from submodule 0,3: External sync (EXT_SYNC)" newline bitfld.word 0x2 7. "FRCEN,Force Initialization Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 6. "FORCE,Force Initialization" "0: No effect,1: Force initialization" newline bitfld.word 0x2 3.--5. "FORCE_SEL,Force Output Source Select" "0: Local force signal (FORCE),1: Master force signal (from submodule 0).,2: Local reload signal.,3: Master reload signal (from submodule 0).,4: Local sync signal,5: Master sync signal (from submodule 0).,6: External force signal (EXT_FORCE),7: External sync signal (EXT_SYNC)" newline bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: Local RELOAD signal,1: Master RELOAD signal (from submodule 0)." newline bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: IPBus clock,1: EXT_CLK,2: Submodule 0 clock (AUX_CLK),?" line.word 0x4 "SM2_CTRL,Submodule 2 Control" hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency" newline bitfld.word 0x4 11. "HALF,Half-Period Reload" "0: Disabled,1: Enabled" newline bitfld.word 0x4 10. "FULL,Full-Period Reload" "0: Disabled,1: Enabled" newline rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3" newline bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: Equal to,1: Equal to or greater than" newline bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: No divider,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" newline bitfld.word 0x4 3. "SPLIT,Split DBLPWM" "0: Not split. PWMA and PWMB each have double pulses.,1: Split to PWMA and PWMB." newline bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Next PWM reload if submodule Load Okay is asserted,1: Load Okay assertion" newline bitfld.word 0x4 1. "DBLX,PWMX Double Switching Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Disabled,1: Enabled" group.word 0xCA++0x35 line.word 0x0 "SM2_VAL0,Submodule 2 Value 0" hexmask.word 0x0 0.--15. 1. "VAL0,Timing Value 0" line.word 0x2 "SM2_FRACVAL1,Submodule 2 Fractional Value 1" hexmask.word.byte 0x2 11.--15. 1. "FRACVAL1,Fractional Timing Value 1" line.word 0x4 "SM2_VAL1,Submodule 2 Value 1" hexmask.word 0x4 0.--15. 1. "VAL1,Timing Value 1" line.word 0x6 "SM2_FRACVAL2,Submodule 2 Fractional Value 2" hexmask.word.byte 0x6 11.--15. 1. "FRACVAL2,Fractional Timing Value 2" line.word 0x8 "SM2_VAL2,Submodule 2 Value 2" hexmask.word 0x8 0.--15. 1. "VAL2,Timing Value 2" line.word 0xA "SM2_FRACVAL3,Submodule 2 Fractional Value 3" hexmask.word.byte 0xA 11.--15. 1. "FRACVAL3,Fractional Timing Value 3" line.word 0xC "SM2_VAL3,Submodule 2 Value 3" hexmask.word 0xC 0.--15. 1. "VAL3,Timing Value 3" line.word 0xE "SM2_FRACVAL4,Submodule 2 Fractional Value 4" hexmask.word.byte 0xE 11.--15. 1. "FRACVAL4,Fractional Timing Value 4" line.word 0x10 "SM2_VAL4,Submodule 2 Value 4" hexmask.word 0x10 0.--15. 1. "VAL4,Timing Value 4" line.word 0x12 "SM2_FRACVAL5,Submodule 2 Fractional Value 5" hexmask.word.byte 0x12 11.--15. 1. "FRACVAL5,Fractional Timing Value 5" line.word 0x14 "SM2_VAL5,Submodule 2 Value 5" hexmask.word 0x14 0.--15. 1. "VAL5,Timing Value 5" line.word 0x16 "SM2_FRCTRL,Submodule 2 Fractional Control" bitfld.word 0x16 8. "FRAC_PU,Fractional Delay Power Up" "0: Off,1: On" newline bitfld.word 0x16 4. "FRAC45_EN,Fractional Cycle Placement Enable for PWMn_B" "0: Disable,1: Enable" newline bitfld.word 0x16 2. "FRAC23_EN,Fractional Cycle Placement Enable for PWMn_A" "0: Disable,1: Enable" newline bitfld.word 0x16 1. "FRAC1_EN,Fractional Cycle PWM Period Enable" "0: Disable,1: Enable" line.word 0x18 "SM2_OCTRL,Submodule 2 Output Control" rbitfld.word 0x18 15. "PWMA_IN,PWMn_A Input" "0,1" newline rbitfld.word 0x18 14. "PWMB_IN,PWMn_B Input" "0,1" newline rbitfld.word 0x18 13. "PWMX_IN,PWMn_X Input" "0,1" newline bitfld.word 0x18 10. "POLA,PWMn_A Output Polarity" "0: Not inverted. PWMn_A is active high.,1: Inverted. PWMn_A is active low." newline bitfld.word 0x18 9. "POLB,PWMn_B Output Polarity" "0: Not inverted. PWMn_B is active high.,1: Inverted. PWMn_B is active low." newline bitfld.word 0x18 8. "POLX,PWMn_X Output Polarity" "0: Not inverted. PWMn_X is active high.,1: Inverted. PWMn_X is active low." newline bitfld.word 0x18 4.--5. "PWMAFS,PWMn_A Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 2.--3. "PWMBFS,PWMn_B Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 0.--1. "PWMXFS,PWMn_X Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" line.word 0x1A "SM2_STS,Submodule 2 Status" rbitfld.word 0x1A 14. "RUF,Registers Updated Flag" "0: No register update since last reload,1: At least one double-buffered register updated.." newline eventfld.word 0x1A 13. "REF,Reload Error Flag" "0: No reload error,1: Reload error" newline eventfld.word 0x1A 12. "RF,Reload Flag" "0: No new reload since last clearing,1: New reload since last clearing" newline eventfld.word 0x1A 11. "CFA1,Capture A1 Flag" "0,1" newline eventfld.word 0x1A 10. "CFA0,Capture A0 Flag" "0,1" newline eventfld.word 0x1A 9. "CFB1,Capture B1 Flag" "0,1" newline eventfld.word 0x1A 8. "CFB0,Capture B0 Flag" "0,1" newline eventfld.word 0x1A 7. "CFX1,Capture X1 Flag" "0,1" newline eventfld.word 0x1A 6. "CFX0,Capture X0 Flag" "0,1" newline hexmask.word.byte 0x1A 0.--5. 1. "CMPF,Compare Flags" line.word 0x1C "SM2_INTEN,Submodule 2 Interrupt Enable" bitfld.word 0x1C 13. "REIE,Reload Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 12. "RIE,Reload Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 11. "CA1IE,Capture A1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 10. "CA0IE,Capture A0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 9. "CB1IE,Capture B1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 8. "CB0IE,Capture B0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 7. "CX1IE,Capture X1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 6. "CX0IE,Capture X0 Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x1C 0.--5. 1. "CMPIE,Compare Interrupt Enables" line.word 0x1E "SM2_DMAEN,Submodule 2 DMA Enable" bitfld.word 0x1E 9. "VALDE,Value Registers DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 8. "FAND,FIFO Watermark AND Control" "0: OR: Any enabled FIFO watermark exceeded sets the..,1: AND: All enabled FIFO watermarks must be.." newline bitfld.word 0x1E 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Disable read DMA requests,1: Exceeding a FIFO watermark.,2: Local sync.,3: Local reload." newline bitfld.word 0x1E 5. "CA1DE,Capture A1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 4. "CA0DE,Capture A0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 3. "CB1DE,Capture B1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 2. "CB0DE,Capture B0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 1. "CX1DE,Capture X1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 0. "CX0DE,Capture X0 FIFO DMA Enable" "0: Disable,1: Enable" line.word 0x20 "SM2_TCTRL,Submodule 2 Output Trigger Control" bitfld.word 0x20 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route PWMn_OUT_TRIG0 signal to PWMn_MUX_TRIG0..,1: Route PWMn_A output to PWMn_MUX_TRIG0 port." newline bitfld.word 0x20 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route PWMn_OUT_TRIG1 signal to PWMn_MUX_TRIG1..,1: Route PWMn_B output to PWMn_MUX_TRIG1 port." newline bitfld.word 0x20 12. "TRGFRQ,Trigger Frequency" "0: Every period,1: Final period" newline hexmask.word.byte 0x20 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables" line.word 0x22 "SM2_DISMAP0,Submodule 2 Fault Disable Mapping" hexmask.word.byte 0x22 8.--11. 1. "DIS0X,PWMn_X Fault Disable Mask 0" newline hexmask.word.byte 0x22 4.--7. 1. "DIS0B,PWMn_B Fault Disable Mask 0" newline hexmask.word.byte 0x22 0.--3. 1. "DIS0A,PWMn_A Fault Disable Mask 0" line.word 0x24 "SM2_DISMAP1,Submodule 2 Fault Disable Mapping" hexmask.word.byte 0x24 8.--11. 1. "DIS1X,PWMn_X Fault Disable Mask 1" newline hexmask.word.byte 0x24 4.--7. 1. "DIS1B,PWMn_B Fault Disable Mask 1" newline hexmask.word.byte 0x24 0.--3. 1. "DIS1A,PWMn_A Fault Disable Mask 1" line.word 0x26 "SM2_DTCNT0,Submodule 2 Deadtime Count 0" hexmask.word 0x26 0.--15. 1. "DTCNT0,Deadtime Count 0" line.word 0x28 "SM2_DTCNT1,Submodule 2 Deadtime Count 1" hexmask.word 0x28 0.--15. 1. "DTCNT1,Deadtime Count 1" line.word 0x2A "SM2_CAPTCTRLA,Submodule 2 Capture Control A" rbitfld.word 0x2A 13.--15. "CA1CNT,Capture A1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2A 10.--12. "CA0CNT,Capture A0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2A 8.--9. "CFAWM,Capture A FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2A 7. "EDGCNTA_EN,Edge Counter A Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2A 6. "INP_SELA,Input Select A" "0: Raw PWMn_A input signal,1: Output of edge counter/compare." newline bitfld.word 0x2A 4.--5. "EDGA1,Edge A 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 2.--3. "EDGA0,Edge A 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 1. "ONESHOTA,One Shot Mode A" "0: Free-running,1: One-shot" newline bitfld.word 0x2A 0. "ARMA,Arm A" "0: Disarm input capture,1: Arm input capture as specified by the input edges" line.word 0x2C "SM2_CAPTCOMPA,Submodule 2 Capture Compare A" hexmask.word.byte 0x2C 8.--15. 1. "EDGCNTA,Edge Counter A" newline hexmask.word.byte 0x2C 0.--7. 1. "EDGCMPA,Edge Compare A" line.word 0x2E "SM2_CAPTCTRLB,Submodule 2 Capture Control B" rbitfld.word 0x2E 13.--15. "CB1CNT,Capture B1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2E 10.--12. "CB0CNT,Capture B0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2E 8.--9. "CFBWM,Capture B FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2E 7. "EDGCNTB_EN,Edge Counter B Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2E 6. "INP_SELB,Input Select B" "0: Raw PWMn_B input signal,1: Output of edge counter/compare" newline bitfld.word 0x2E 4.--5. "EDGB1,Edge B 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 2.--3. "EDGB0,Edge B 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 1. "ONESHOTB,One Shot Mode B" "0: Free-running,1: One-shot" newline bitfld.word 0x2E 0. "ARMB,Arm B" "0: Disarm input capture,1: Arm input capture as specified by EDGBn" line.word 0x30 "SM2_CAPTCOMPB,Submodule 2 Capture Compare B" hexmask.word.byte 0x30 8.--15. 1. "EDGCNTB,Edge Counter B" newline hexmask.word.byte 0x30 0.--7. 1. "EDGCMPB,Edge Compare B" line.word 0x32 "SM2_CAPTCTRLX,Submodule 2 Capture Control X" rbitfld.word 0x32 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x32 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x32 8.--9. "CFXWM,Capture X FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x32 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x32 6. "INP_SELX,Input Select X" "0: Raw PWMn_X input signal,1: Output of edge counter/compare." newline bitfld.word 0x32 4.--5. "EDGX1,Edge X 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 2.--3. "EDGX0,Edge X 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 1. "ONESHOTX,One Shot Mode X" "0: Free-running,1: One-shot" newline bitfld.word 0x32 0. "ARMX,Arm X" "0: Disarm input capture,1: Arm input capture as specified by EDGAn" line.word 0x34 "SM2_CAPTCOMPX,Submodule 2 Capture Compare X" hexmask.word.byte 0x34 8.--15. 1. "EDGCNTX,Edge Counter X" newline hexmask.word.byte 0x34 0.--7. 1. "EDGCMPX,Edge Compare X" rgroup.word 0x100++0x17 line.word 0x0 "SM2_CVAL0,Submodule 2 Capture Value 0" hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0" line.word 0x2 "SM2_CVAL0CYC,Submodule 2 Capture Value 0 Cycle" hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle" line.word 0x4 "SM2_CVAL1,Submodule 2 Capture Value 1" hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1" line.word 0x6 "SM2_CVAL1CYC,Submodule 2 Capture Value 1 Cycle" hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle" line.word 0x8 "SM2_CVAL2,Submodule 2 Capture Value 2" hexmask.word 0x8 0.--15. 1. "CAPTVAL2,Capture Value 2" line.word 0xA "SM2_CVAL2CYC,Submodule 2 Capture Value 2 Cycle" hexmask.word.byte 0xA 0.--3. 1. "CVAL2CYC,Capture Value 2 Cycle" line.word 0xC "SM2_CVAL3,Submodule 2 Capture Value 3" hexmask.word 0xC 0.--15. 1. "CAPTVAL3,Capture Value 3" line.word 0xE "SM2_CVAL3CYC,Submodule 2 Capture Value 3 Cycle" hexmask.word.byte 0xE 0.--3. 1. "CVAL3CYC,Capture Value 3 Cycle" line.word 0x10 "SM2_CVAL4,Submodule 2 Capture Value 4" hexmask.word 0x10 0.--15. 1. "CAPTVAL4,Capture Value 4" line.word 0x12 "SM2_CVAL4CYC,Submodule 2 Capture Value 4 Cycle" hexmask.word.byte 0x12 0.--3. 1. "CVAL4CYC,Capture Value 4 Cycle" line.word 0x14 "SM2_CVAL5,Submodule 2 Capture Value 5" hexmask.word 0x14 0.--15. 1. "CAPTVAL5,Capture Value 5" line.word 0x16 "SM2_CVAL5CYC,Submodule 2 Capture Value 5 Cycle" hexmask.word.byte 0x16 0.--3. 1. "CVAL5CYC,Capture Value 5 Cycle" group.word 0x118++0x1 line.word 0x0 "SM2_PHASEDLY,Submodule 2 Phase Delay" hexmask.word 0x0 0.--15. 1. "PHASEDLY,Phase Delay" rgroup.word 0x120++0x1 line.word 0x0 "SM3_CNT,Submodule 3 Counter" hexmask.word 0x0 0.--15. 1. "CNT,Counter Value" group.word 0x122++0x5 line.word 0x0 "SM3_INIT,Submodule 3 Initial Count" hexmask.word 0x0 0.--15. 1. "INIT,Initial Count" line.word 0x2 "SM3_CTRL2,Submodule 3 Control 2" bitfld.word 0x2 15. "DBGEN,Run In Debug Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 14. "WAITEN,Run In Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 13. "INDEP,Independent Operation" "0: Complementary PWM pair,1: Independent PWMs" newline bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1" newline bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1" newline bitfld.word 0x2 10. "PWMX_INIT,PWMn_X Initial Value" "0,1" newline bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Source Select" "0: Local sync (PWMn_X),1: Master reload (from submodule 0),2: Master sync from submodule 0,3: External sync (EXT_SYNC)" newline bitfld.word 0x2 7. "FRCEN,Force Initialization Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 6. "FORCE,Force Initialization" "0: No effect,1: Force initialization" newline bitfld.word 0x2 3.--5. "FORCE_SEL,Force Output Source Select" "0: Local force signal (FORCE),1: Master force signal (from submodule 0).,2: Local reload signal.,3: Master reload signal (from submodule 0).,4: Local sync signal,5: Master sync signal (from submodule 0).,6: External force signal (EXT_FORCE),7: External sync signal (EXT_SYNC)" newline bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: Local RELOAD signal,1: Master RELOAD signal (from submodule 0)." newline bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: IPBus clock,1: EXT_CLK,2: Submodule 0 clock (AUX_CLK),?" line.word 0x4 "SM3_CTRL,Submodule 3 Control" hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency" newline bitfld.word 0x4 11. "HALF,Half-Period Reload" "0: Disabled,1: Enabled" newline bitfld.word 0x4 10. "FULL,Full-Period Reload" "0: Disabled,1: Enabled" newline rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3" newline bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: Equal to,1: Equal to or greater than" newline bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: No divider,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" newline bitfld.word 0x4 3. "SPLIT,Split DBLPWM" "0: Not split. PWMA and PWMB each have double pulses.,1: Split to PWMA and PWMB." newline bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Next PWM reload if submodule Load Okay is asserted,1: Load Okay assertion" newline bitfld.word 0x4 1. "DBLX,PWMX Double Switching Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Disabled,1: Enabled" group.word 0x12A++0x35 line.word 0x0 "SM3_VAL0,Submodule 3 Value 0" hexmask.word 0x0 0.--15. 1. "VAL0,Timing Value 0" line.word 0x2 "SM3_FRACVAL1,Submodule 3 Fractional Value 1" hexmask.word.byte 0x2 11.--15. 1. "FRACVAL1,Fractional Timing Value 1" line.word 0x4 "SM3_VAL1,Submodule 3 Value 1" hexmask.word 0x4 0.--15. 1. "VAL1,Timing Value 1" line.word 0x6 "SM3_FRACVAL2,Submodule 3 Fractional Value 2" hexmask.word.byte 0x6 11.--15. 1. "FRACVAL2,Fractional Timing Value 2" line.word 0x8 "SM3_VAL2,Submodule 3 Value 2" hexmask.word 0x8 0.--15. 1. "VAL2,Timing Value 2" line.word 0xA "SM3_FRACVAL3,Submodule 3 Fractional Value 3" hexmask.word.byte 0xA 11.--15. 1. "FRACVAL3,Fractional Timing Value 3" line.word 0xC "SM3_VAL3,Submodule 3 Value 3" hexmask.word 0xC 0.--15. 1. "VAL3,Timing Value 3" line.word 0xE "SM3_FRACVAL4,Submodule 3 Fractional Value 4" hexmask.word.byte 0xE 11.--15. 1. "FRACVAL4,Fractional Timing Value 4" line.word 0x10 "SM3_VAL4,Submodule 3 Value 4" hexmask.word 0x10 0.--15. 1. "VAL4,Timing Value 4" line.word 0x12 "SM3_FRACVAL5,Submodule 3 Fractional Value 5" hexmask.word.byte 0x12 11.--15. 1. "FRACVAL5,Fractional Timing Value 5" line.word 0x14 "SM3_VAL5,Submodule 3 Value 5" hexmask.word 0x14 0.--15. 1. "VAL5,Timing Value 5" line.word 0x16 "SM3_FRCTRL,Submodule 3 Fractional Control" bitfld.word 0x16 8. "FRAC_PU,Fractional Delay Power Up" "0: Off,1: On" newline bitfld.word 0x16 4. "FRAC45_EN,Fractional Cycle Placement Enable for PWMn_B" "0: Disable,1: Enable" newline bitfld.word 0x16 2. "FRAC23_EN,Fractional Cycle Placement Enable for PWMn_A" "0: Disable,1: Enable" newline bitfld.word 0x16 1. "FRAC1_EN,Fractional Cycle PWM Period Enable" "0: Disable,1: Enable" line.word 0x18 "SM3_OCTRL,Submodule 3 Output Control" rbitfld.word 0x18 15. "PWMA_IN,PWMn_A Input" "0,1" newline rbitfld.word 0x18 14. "PWMB_IN,PWMn_B Input" "0,1" newline rbitfld.word 0x18 13. "PWMX_IN,PWMn_X Input" "0,1" newline bitfld.word 0x18 10. "POLA,PWMn_A Output Polarity" "0: Not inverted. PWMn_A is active high.,1: Inverted. PWMn_A is active low." newline bitfld.word 0x18 9. "POLB,PWMn_B Output Polarity" "0: Not inverted. PWMn_B is active high.,1: Inverted. PWMn_B is active low." newline bitfld.word 0x18 8. "POLX,PWMn_X Output Polarity" "0: Not inverted. PWMn_X is active high.,1: Inverted. PWMn_X is active low." newline bitfld.word 0x18 4.--5. "PWMAFS,PWMn_A Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 2.--3. "PWMBFS,PWMn_B Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 0.--1. "PWMXFS,PWMn_X Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" line.word 0x1A "SM3_STS,Submodule 3 Status" rbitfld.word 0x1A 14. "RUF,Registers Updated Flag" "0: No register update since last reload,1: At least one double-buffered register updated.." newline eventfld.word 0x1A 13. "REF,Reload Error Flag" "0: No reload error,1: Reload error" newline eventfld.word 0x1A 12. "RF,Reload Flag" "0: No new reload since last clearing,1: New reload since last clearing" newline eventfld.word 0x1A 11. "CFA1,Capture A1 Flag" "0,1" newline eventfld.word 0x1A 10. "CFA0,Capture A0 Flag" "0,1" newline eventfld.word 0x1A 9. "CFB1,Capture B1 Flag" "0,1" newline eventfld.word 0x1A 8. "CFB0,Capture B0 Flag" "0,1" newline eventfld.word 0x1A 7. "CFX1,Capture X1 Flag" "0,1" newline eventfld.word 0x1A 6. "CFX0,Capture X0 Flag" "0,1" newline hexmask.word.byte 0x1A 0.--5. 1. "CMPF,Compare Flags" line.word 0x1C "SM3_INTEN,Submodule 3 Interrupt Enable" bitfld.word 0x1C 13. "REIE,Reload Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 12. "RIE,Reload Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 11. "CA1IE,Capture A1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 10. "CA0IE,Capture A0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 9. "CB1IE,Capture B1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 8. "CB0IE,Capture B0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 7. "CX1IE,Capture X1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 6. "CX0IE,Capture X0 Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x1C 0.--5. 1. "CMPIE,Compare Interrupt Enables" line.word 0x1E "SM3_DMAEN,Submodule 3 DMA Enable" bitfld.word 0x1E 9. "VALDE,Value Registers DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 8. "FAND,FIFO Watermark AND Control" "0: OR: Any enabled FIFO watermark exceeded sets the..,1: AND: All enabled FIFO watermarks must be.." newline bitfld.word 0x1E 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Disable read DMA requests,1: Exceeding a FIFO watermark.,2: Local sync.,3: Local reload." newline bitfld.word 0x1E 5. "CA1DE,Capture A1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 4. "CA0DE,Capture A0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 3. "CB1DE,Capture B1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 2. "CB0DE,Capture B0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 1. "CX1DE,Capture X1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 0. "CX0DE,Capture X0 FIFO DMA Enable" "0: Disable,1: Enable" line.word 0x20 "SM3_TCTRL,Submodule 3 Output Trigger Control" bitfld.word 0x20 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route PWMn_OUT_TRIG0 signal to PWMn_MUX_TRIG0..,1: Route PWMn_A output to PWMn_MUX_TRIG0 port." newline bitfld.word 0x20 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route PWMn_OUT_TRIG1 signal to PWMn_MUX_TRIG1..,1: Route PWMn_B output to PWMn_MUX_TRIG1 port." newline bitfld.word 0x20 12. "TRGFRQ,Trigger Frequency" "0: Every period,1: Final period" newline hexmask.word.byte 0x20 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables" line.word 0x22 "SM3_DISMAP0,Submodule 3 Fault Disable Mapping" hexmask.word.byte 0x22 8.--11. 1. "DIS0X,PWMn_X Fault Disable Mask 0" newline hexmask.word.byte 0x22 4.--7. 1. "DIS0B,PWMn_B Fault Disable Mask 0" newline hexmask.word.byte 0x22 0.--3. 1. "DIS0A,PWMn_A Fault Disable Mask 0" line.word 0x24 "SM3_DISMAP1,Submodule 3 Fault Disable Mapping" hexmask.word.byte 0x24 8.--11. 1. "DIS1X,PWMn_X Fault Disable Mask 1" newline hexmask.word.byte 0x24 4.--7. 1. "DIS1B,PWMn_B Fault Disable Mask 1" newline hexmask.word.byte 0x24 0.--3. 1. "DIS1A,PWMn_A Fault Disable Mask 1" line.word 0x26 "SM3_DTCNT0,Submodule 3 Deadtime Count 0" hexmask.word 0x26 0.--15. 1. "DTCNT0,Deadtime Count 0" line.word 0x28 "SM3_DTCNT1,Submodule 3 Deadtime Count 1" hexmask.word 0x28 0.--15. 1. "DTCNT1,Deadtime Count 1" line.word 0x2A "SM3_CAPTCTRLA,Submodule 3 Capture Control A" rbitfld.word 0x2A 13.--15. "CA1CNT,Capture A1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2A 10.--12. "CA0CNT,Capture A0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2A 8.--9. "CFAWM,Capture A FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2A 7. "EDGCNTA_EN,Edge Counter A Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2A 6. "INP_SELA,Input Select A" "0: Raw PWMn_A input signal,1: Output of edge counter/compare." newline bitfld.word 0x2A 4.--5. "EDGA1,Edge A 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 2.--3. "EDGA0,Edge A 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 1. "ONESHOTA,One Shot Mode A" "0: Free-running,1: One-shot" newline bitfld.word 0x2A 0. "ARMA,Arm A" "0: Disarm input capture,1: Arm input capture as specified by the input edges" line.word 0x2C "SM3_CAPTCOMPA,Submodule 3 Capture Compare A" hexmask.word.byte 0x2C 8.--15. 1. "EDGCNTA,Edge Counter A" newline hexmask.word.byte 0x2C 0.--7. 1. "EDGCMPA,Edge Compare A" line.word 0x2E "SM3_CAPTCTRLB,Submodule 3 Capture Control B" rbitfld.word 0x2E 13.--15. "CB1CNT,Capture B1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2E 10.--12. "CB0CNT,Capture B0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2E 8.--9. "CFBWM,Capture B FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2E 7. "EDGCNTB_EN,Edge Counter B Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2E 6. "INP_SELB,Input Select B" "0: Raw PWMn_B input signal,1: Output of edge counter/compare" newline bitfld.word 0x2E 4.--5. "EDGB1,Edge B 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 2.--3. "EDGB0,Edge B 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 1. "ONESHOTB,One Shot Mode B" "0: Free-running,1: One-shot" newline bitfld.word 0x2E 0. "ARMB,Arm B" "0: Disarm input capture,1: Arm input capture as specified by EDGBn" line.word 0x30 "SM3_CAPTCOMPB,Submodule 3 Capture Compare B" hexmask.word.byte 0x30 8.--15. 1. "EDGCNTB,Edge Counter B" newline hexmask.word.byte 0x30 0.--7. 1. "EDGCMPB,Edge Compare B" line.word 0x32 "SM3_CAPTCTRLX,Submodule 3 Capture Control X" rbitfld.word 0x32 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x32 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x32 8.--9. "CFXWM,Capture X FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x32 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x32 6. "INP_SELX,Input Select X" "0: Raw PWMn_X input signal,1: Output of edge counter/compare." newline bitfld.word 0x32 4.--5. "EDGX1,Edge X 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 2.--3. "EDGX0,Edge X 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 1. "ONESHOTX,One Shot Mode X" "0: Free-running,1: One-shot" newline bitfld.word 0x32 0. "ARMX,Arm X" "0: Disarm input capture,1: Arm input capture as specified by EDGAn" line.word 0x34 "SM3_CAPTCOMPX,Submodule 3 Capture Compare X" hexmask.word.byte 0x34 8.--15. 1. "EDGCNTX,Edge Counter X" newline hexmask.word.byte 0x34 0.--7. 1. "EDGCMPX,Edge Compare X" rgroup.word 0x160++0x17 line.word 0x0 "SM3_CVAL0,Submodule 3 Capture Value 0" hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0" line.word 0x2 "SM3_CVAL0CYC,Submodule 3 Capture Value 0 Cycle" hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle" line.word 0x4 "SM3_CVAL1,Submodule 3 Capture Value 1" hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1" line.word 0x6 "SM3_CVAL1CYC,Submodule 3 Capture Value 1 Cycle" hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle" line.word 0x8 "SM3_CVAL2,Submodule 3 Capture Value 2" hexmask.word 0x8 0.--15. 1. "CAPTVAL2,Capture Value 2" line.word 0xA "SM3_CVAL2CYC,Submodule 3 Capture Value 2 Cycle" hexmask.word.byte 0xA 0.--3. 1. "CVAL2CYC,Capture Value 2 Cycle" line.word 0xC "SM3_CVAL3,Submodule 3 Capture Value 3" hexmask.word 0xC 0.--15. 1. "CAPTVAL3,Capture Value 3" line.word 0xE "SM3_CVAL3CYC,Submodule 3 Capture Value 3 Cycle" hexmask.word.byte 0xE 0.--3. 1. "CVAL3CYC,Capture Value 3 Cycle" line.word 0x10 "SM3_CVAL4,Submodule 3 Capture Value 4" hexmask.word 0x10 0.--15. 1. "CAPTVAL4,Capture Value 4" line.word 0x12 "SM3_CVAL4CYC,Submodule 3 Capture Value 4 Cycle" hexmask.word.byte 0x12 0.--3. 1. "CVAL4CYC,Capture Value 4 Cycle" line.word 0x14 "SM3_CVAL5,Submodule 3 Capture Value 5" hexmask.word 0x14 0.--15. 1. "CAPTVAL5,Capture Value 5" line.word 0x16 "SM3_CVAL5CYC,Submodule 3 Capture Value 5 Cycle" hexmask.word.byte 0x16 0.--3. 1. "CVAL5CYC,Capture Value 5 Cycle" group.word 0x178++0x1 line.word 0x0 "SM3_PHASEDLY,Submodule 3 Phase Delay" hexmask.word 0x0 0.--15. 1. "PHASEDLY,Phase Delay" group.word 0x180++0x15 line.word 0x0 "OUTEN,Output Enable" hexmask.word.byte 0x0 8.--11. 1. "PWMA_EN,PWMn_A Output Enables" newline hexmask.word.byte 0x0 4.--7. 1. "PWMB_EN,PWMn_B Output Enables" newline hexmask.word.byte 0x0 0.--3. 1. "PWMX_EN,PWMn_X Output Enables" line.word 0x2 "MASK,Mask" hexmask.word.byte 0x2 12.--15. 1. "UPDATE_MASK,Update Mask Bits Immediately" newline hexmask.word.byte 0x2 8.--11. 1. "MASKA,PWMn_A Masks" newline hexmask.word.byte 0x2 4.--7. 1. "MASKB,PWMn_B Masks" newline hexmask.word.byte 0x2 0.--3. 1. "MASKX,PWMn_X Masks" line.word 0x4 "SWCOUT,Software Controlled Output" bitfld.word 0x4 7. "SM3OUT23,Submodule 3 Software Controlled Output 23" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 6. "SM3OUT45,Submodule 3 Software Controlled Output 45" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 5. "SM2OUT23,Submodule 2 Software Controlled Output 23" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 4. "SM2OUT45,Submodule 2 Software Controlled Output 45" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 3. "SM1OUT23,Submodule 1 Software Controlled Output 23" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 2. "SM1OUT45,Submodule 1 Software Controlled Output 45" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 1. "SM0OUT23,Submodule 0 Software Controlled Output 23" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 0. "SM0OUT45,Submodule 0 Software Controlled Output 45" "0: Logic 0,1: Logic 1" line.word 0x6 "DTSRCSEL,PWM Source Select" bitfld.word 0x6 14.--15. "SM3SEL23,Submodule 3 PWM23 Control Select" "0: Generated SM3PWM23 signal,1: Inverted SM3PWM23 signal,2: Software control,3: PWM3_EXTA signal" newline bitfld.word 0x6 12.--13. "SM3SEL45,Submodule 3 PWM45 Control Select" "0: Generated SM3PWM45 signal,1: Inverted SM3PWM45 signal,2: Software control,3: PWM3_EXTB signal" newline bitfld.word 0x6 10.--11. "SM2SEL23,Submodule 2 PWM23 Control Select" "0: Generated SM2PWM23 signal,1: Inverted SM2PWM23 signal,2: Software control,3: PWM2_EXTA signal" newline bitfld.word 0x6 8.--9. "SM2SEL45,Submodule 2 PWM45 Control Select" "0: Generated SM2PWM45 signal,1: Inverted SM2PWM45 signal,2: Software control,3: PWM2_EXTB signal" newline bitfld.word 0x6 6.--7. "SM1SEL23,Submodule 1 PWM23 Control Select" "0: Generated SM1PWM23 signal,1: Inverted SM1PWM23 signal,2: Software control,3: PWM1_EXTA signal" newline bitfld.word 0x6 4.--5. "SM1SEL45,Submodule 1 PWM45 Control Select" "0: Generated SM1PWM45 signal,1: Inverted SM1PWM45 signal,2: Software control,3: PWM1_EXTB signal" newline bitfld.word 0x6 2.--3. "SM0SEL23,Submodule 0 PWM23 Control Select" "0: Generated SM0PWM23 signal,1: Inverted SM0PWM23 signal,2: Software control,3: PWM0_EXTA signal" newline bitfld.word 0x6 0.--1. "SM0SEL45,Submodule 0 PWM45 Control Select" "0: Generated SM0PWM45 signal,1: Inverted SM0PWM45 signal,2: Software control,3: PWM0_EXTB signal" line.word 0x8 "MCTRL,Master Control" hexmask.word.byte 0x8 12.--15. 1. "IPOL,Current Polarity" newline hexmask.word.byte 0x8 8.--11. 1. "RUN,Run" newline hexmask.word.byte 0x8 4.--7. 1. "CLDOK,Clear Load Okay" newline hexmask.word.byte 0x8 0.--3. 1. "LDOK,Load Okay" line.word 0xA "MCTRL2,Master Control 2" bitfld.word 0xA 0.--1. "MONPLL,Monitor PLL State" "0: PLL not locked do not monitor PLL operation. If..,1: PLL not locked monitor PLL operation. If the PLL..,2: PLL locked do not monitor PLL operation. If the..,3: PLL locked monitor PLL operation. If the PLL.." line.word 0xC "FP0_CTRL,Fault Protection 0 Control" hexmask.word.byte 0xC 12.--15. 1. "FLVL,Fault Level" newline hexmask.word.byte 0xC 8.--11. 1. "FAUTO,Automatic Fault Clearing" newline hexmask.word.byte 0xC 4.--7. 1. "FSAFE,Fault Safety Mode" newline hexmask.word.byte 0xC 0.--3. 1. "FIE,Fault Interrupt Enables" line.word 0xE "FP0_STS,Fault Protection 0 Status" hexmask.word.byte 0xE 12.--15. 1. "FHALF,Half-Period Fault Recovery" newline hexmask.word.byte 0xE 8.--11. 1. "FFPIN,Filtered Fault Pins" newline hexmask.word.byte 0xE 4.--7. 1. "FFULL,Full-Period Fault Recovery" newline hexmask.word.byte 0xE 0.--3. 1. "FFLAG,Fault Flags" line.word 0x10 "FP0_FILT,Fault Protection 0 Filter" bitfld.word 0x10 15. "GSTR,Fault Glitch Stretch Enable" "0: Disable,1: Enable" newline bitfld.word 0x10 8.--10. "FILT_CNT,Fault Filter Count" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x10 0.--7. 1. "FILT_PER,Fault Filter Period" line.word 0x12 "FP0_TST,Fault Protection 0 Test" bitfld.word 0x12 0. "FTEST,Fault Test" "0: No fault,1: Cause a simulated fault" line.word 0x14 "FP0_CTRL2,Fault Protection 0 Control 2" hexmask.word.byte 0x14 0.--3. 1. "NOCOMB,No Combinational Path" group.word 0x1B0++0x1 line.word 0x0 "DLLSR,DLL Status" eventfld.word 0x0 1. "LOL,Loss-Of-Lock flag" "0: No loss of lock detected,1: Loss of lock detected" newline rbitfld.word 0x0 0. "LOCK,Lock status" "0: Unlocked,1: Locked" group.word 0x1B8++0xF line.word 0x0 "SM0_BIST_CTRL,Submodule 0 BIST Control" bitfld.word 0x0 13.--15. "COUNTER_THRESHOLD,Counter Threshold" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 8.--12. 1. "CLK_FINAL,Clock Counter Final" newline bitfld.word 0x0 7. "MANUAL_TOGGLE,Manual Toggle Switch" "0: frac_test,1: frac_test_reverse" newline bitfld.word 0x0 6. "TOGGLE_MODE,Toggle Mode" "0: Automatic,1: Manual" newline hexmask.word.byte 0x0 1.--5. 1. "CLK_INITIAL,Initial Value for BIST CLK Counter" newline bitfld.word 0x0 0. "BIST_ENABLE,Enable BIST Logic" "0: Disables,1: Enables" line.word 0x2 "SM0_BIST_CTRL1,Submodule 0 BIST Control" hexmask.word.byte 0x2 8.--12. 1. "DATA_FINAL,Final Data Counter" newline hexmask.word.byte 0x2 0.--4. 1. "DATA_INITIAL,Initial Data Counter" line.word 0x4 "SM1_BIST_CTRL,Submodule 1 BIST Control" bitfld.word 0x4 13.--15. "COUNTER_THRESHOLD,Counter Threshold" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x4 8.--12. 1. "CLK_FINAL,Clock Counter Final" newline bitfld.word 0x4 7. "MANUAL_TOGGLE,Manual Toggle Switch" "0: frac_test,1: frac_test_reverse" newline bitfld.word 0x4 6. "TOGGLE_MODE,Toggle Mode" "0: Automatic,1: Manual" newline hexmask.word.byte 0x4 1.--5. 1. "CLK_INITIAL,Initial Value for BIST CLK Counter" newline bitfld.word 0x4 0. "BIST_ENABLE,Enable BIST Logic" "0: Disables,1: Enables" line.word 0x6 "SM1_BIST_CTRL1,Submodule 1 BIST Control" hexmask.word.byte 0x6 8.--12. 1. "DATA_FINAL,Final Data Counter" newline hexmask.word.byte 0x6 0.--4. 1. "DATA_INITIAL,Initial Data Counter" line.word 0x8 "SM2_BIST_CTRL,Submodule 2 BIST Control" bitfld.word 0x8 13.--15. "COUNTER_THRESHOLD,Counter Threshold" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x8 8.--12. 1. "CLK_FINAL,Clock Counter Final" newline bitfld.word 0x8 7. "MANUAL_TOGGLE,Manual Toggle Switch" "0: frac_test,1: frac_test_reverse" newline bitfld.word 0x8 6. "TOGGLE_MODE,Toggle Mode" "0: Automatic,1: Manual" newline hexmask.word.byte 0x8 1.--5. 1. "CLK_INITIAL,Initial Value for BIST CLK Counter" newline bitfld.word 0x8 0. "BIST_ENABLE,Enable BIST Logic" "0: Disables,1: Enables" line.word 0xA "SM2_BIST_CTRL1,Submodule 2 BIST Control" hexmask.word.byte 0xA 8.--12. 1. "DATA_FINAL,Final Data Counter" newline hexmask.word.byte 0xA 0.--4. 1. "DATA_INITIAL,Initial Data Counter" line.word 0xC "SM3_BIST_CTRL,Submodule 3 BIST Control" bitfld.word 0xC 13.--15. "COUNTER_THRESHOLD,Counter Threshold" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0xC 8.--12. 1. "CLK_FINAL,Clock Counter Final" newline bitfld.word 0xC 7. "MANUAL_TOGGLE,Manual Toggle Switch" "0: frac_test,1: frac_test_reverse" newline bitfld.word 0xC 6. "TOGGLE_MODE,Toggle Mode" "0: Automatic,1: Manual" newline hexmask.word.byte 0xC 1.--5. 1. "CLK_INITIAL,Initial Value for BIST CLK Counter" newline bitfld.word 0xC 0. "BIST_ENABLE,Enable BIST Logic" "0: Disables,1: Enables" line.word 0xE "SM3_BIST_CTRL1,Submodule 3 BIST Control" hexmask.word.byte 0xE 8.--12. 1. "DATA_FINAL,Final Data Counter" newline hexmask.word.byte 0xE 0.--4. 1. "DATA_INITIAL,Initial Data Counter" rgroup.word 0x1C8++0xF line.word 0x0 "SM0_BIST_STATUS,Submodule 0 BIST Status" hexmask.word.byte 0x0 8.--12. 1. "FAIL_CLK,Fail Clock" newline bitfld.word 0x0 1. "BIST_PASS,BIST Pass" "0: Fail,1: Pass" newline bitfld.word 0x0 0. "BIST_DONE,BIST Completion" "0,1" line.word 0x2 "SM0_BIST_STATUS1,Submodule 0 BIST Status" hexmask.word.byte 0x2 0.--4. 1. "FAIL_DATA,Fail Data" line.word 0x4 "SM1_BIST_STATUS,Submodule 1 BIST Status" hexmask.word.byte 0x4 8.--12. 1. "FAIL_CLK,Fail Clock" newline bitfld.word 0x4 1. "BIST_PASS,BIST Pass" "0: Fail,1: Pass" newline bitfld.word 0x4 0. "BIST_DONE,BIST Completion" "0,1" line.word 0x6 "SM1_BIST_STATUS1,Submodule 1 BIST Status" hexmask.word.byte 0x6 0.--4. 1. "FAIL_DATA,Fail Data" line.word 0x8 "SM2_BIST_STATUS,Submodule 2 BIST Status" hexmask.word.byte 0x8 8.--12. 1. "FAIL_CLK,Fail Clock" newline bitfld.word 0x8 1. "BIST_PASS,BIST Pass" "0: Fail,1: Pass" newline bitfld.word 0x8 0. "BIST_DONE,BIST Completion" "0,1" line.word 0xA "SM2_BIST_STATUS1,Submodule 2 BIST Status" hexmask.word.byte 0xA 0.--4. 1. "FAIL_DATA,Fail Data" line.word 0xC "SM3_BIST_STATUS,Submodule 3 BIST Status" hexmask.word.byte 0xC 8.--12. 1. "FAIL_CLK,Fail Clock" newline bitfld.word 0xC 1. "BIST_PASS,BIST Pass" "0: Fail,1: Pass" newline bitfld.word 0xC 0. "BIST_DONE,BIST Completion" "0,1" line.word 0xE "SM3_BIST_STATUS1,Submodule 3 BIST Status" hexmask.word.byte 0xE 0.--4. 1. "FAIL_DATA,Fail Data" tree.end tree "EFLEXPWM_1" base ad:0x406BC000 rgroup.word 0x0++0x1 line.word 0x0 "SM0_CNT,Submodule 0 Counter" hexmask.word 0x0 0.--15. 1. "CNT,Counter Value" group.word 0x2++0x5 line.word 0x0 "SM0_INIT,Submodule 0 Initial Count" hexmask.word 0x0 0.--15. 1. "INIT,Initial Count" line.word 0x2 "SM0_CTRL2,Submodule 0 Control 2" bitfld.word 0x2 15. "DBGEN,Run In Debug Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 14. "WAITEN,Run In Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 13. "INDEP,Independent Operation" "0: Complementary PWM pair,1: Independent PWMs" newline bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1" newline bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1" newline bitfld.word 0x2 10. "PWMX_INIT,PWMn_X Initial Value" "0,1" newline bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Source Select" "0: Local sync (PWMn_X),1: Master reload (from submodule 0),2: Master sync from submodule 0,3: External sync (EXT_SYNC)" newline bitfld.word 0x2 7. "FRCEN,Force Initialization Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 6. "FORCE,Force Initialization" "0: No effect,1: Force initialization" newline bitfld.word 0x2 3.--5. "FORCE_SEL,Force Output Source Select" "0: Local force signal (FORCE),1: Master force signal (from submodule 0).,2: Local reload signal.,3: Master reload signal (from submodule 0).,4: Local sync signal,5: Master sync signal (from submodule 0).,6: External force signal (EXT_FORCE),7: External sync signal (EXT_SYNC)" newline bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: Local RELOAD signal,1: Master RELOAD signal (from submodule 0)." newline bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: IPBus clock,1: EXT_CLK,2: Submodule 0 clock (AUX_CLK),?" line.word 0x4 "SM0_CTRL,Submodule 0 Control" hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency" newline bitfld.word 0x4 11. "HALF,Half-Period Reload" "0: Disabled,1: Enabled" newline bitfld.word 0x4 10. "FULL,Full-Period Reload" "0: Disabled,1: Enabled" newline rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3" newline bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: Equal to,1: Equal to or greater than" newline bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: No divider,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" newline bitfld.word 0x4 3. "SPLIT,Split DBLPWM" "0: Not split. PWMA and PWMB each have double pulses.,1: Split to PWMA and PWMB." newline bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Next PWM reload if submodule Load Okay is asserted,1: Load Okay assertion" newline bitfld.word 0x4 1. "DBLX,PWMX Double Switching Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Disabled,1: Enabled" group.word 0xA++0x35 line.word 0x0 "SM0_VAL0,Submodule 0 Value 0" hexmask.word 0x0 0.--15. 1. "VAL0,Timing Value 0" line.word 0x2 "SM0_FRACVAL1,Submodule 0 Fractional Value 1" hexmask.word.byte 0x2 11.--15. 1. "FRACVAL1,Fractional Timing Value 1" line.word 0x4 "SM0_VAL1,Submodule 0 Value 1" hexmask.word 0x4 0.--15. 1. "VAL1,Timing Value 1" line.word 0x6 "SM0_FRACVAL2,Submodule 0 Fractional Value 2" hexmask.word.byte 0x6 11.--15. 1. "FRACVAL2,Fractional Timing Value 2" line.word 0x8 "SM0_VAL2,Submodule 0 Value 2" hexmask.word 0x8 0.--15. 1. "VAL2,Timing Value 2" line.word 0xA "SM0_FRACVAL3,Submodule 0 Fractional Value 3" hexmask.word.byte 0xA 11.--15. 1. "FRACVAL3,Fractional Timing Value 3" line.word 0xC "SM0_VAL3,Submodule 0 Value 3" hexmask.word 0xC 0.--15. 1. "VAL3,Timing Value 3" line.word 0xE "SM0_FRACVAL4,Submodule 0 Fractional Value 4" hexmask.word.byte 0xE 11.--15. 1. "FRACVAL4,Fractional Timing Value 4" line.word 0x10 "SM0_VAL4,Submodule 0 Value 4" hexmask.word 0x10 0.--15. 1. "VAL4,Timing Value 4" line.word 0x12 "SM0_FRACVAL5,Submodule 0 Fractional Value 5" hexmask.word.byte 0x12 11.--15. 1. "FRACVAL5,Fractional Timing Value 5" line.word 0x14 "SM0_VAL5,Submodule 0 Value 5" hexmask.word 0x14 0.--15. 1. "VAL5,Timing Value 5" line.word 0x16 "SM0_FRCTRL,Submodule 0 Fractional Control" bitfld.word 0x16 8. "FRAC_PU,Fractional Delay Power Up" "0: Off,1: On" newline bitfld.word 0x16 4. "FRAC45_EN,Fractional Cycle Placement Enable for PWMn_B" "0: Disable,1: Enable" newline bitfld.word 0x16 2. "FRAC23_EN,Fractional Cycle Placement Enable for PWMn_A" "0: Disable,1: Enable" newline bitfld.word 0x16 1. "FRAC1_EN,Fractional Cycle PWM Period Enable" "0: Disable,1: Enable" line.word 0x18 "SM0_OCTRL,Submodule 0 Output Control" rbitfld.word 0x18 15. "PWMA_IN,PWMn_A Input" "0,1" newline rbitfld.word 0x18 14. "PWMB_IN,PWMn_B Input" "0,1" newline rbitfld.word 0x18 13. "PWMX_IN,PWMn_X Input" "0,1" newline bitfld.word 0x18 10. "POLA,PWMn_A Output Polarity" "0: Not inverted. PWMn_A is active high.,1: Inverted. PWMn_A is active low." newline bitfld.word 0x18 9. "POLB,PWMn_B Output Polarity" "0: Not inverted. PWMn_B is active high.,1: Inverted. PWMn_B is active low." newline bitfld.word 0x18 8. "POLX,PWMn_X Output Polarity" "0: Not inverted. PWMn_X is active high.,1: Inverted. PWMn_X is active low." newline bitfld.word 0x18 4.--5. "PWMAFS,PWMn_A Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 2.--3. "PWMBFS,PWMn_B Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 0.--1. "PWMXFS,PWMn_X Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" line.word 0x1A "SM0_STS,Submodule 0 Status" rbitfld.word 0x1A 14. "RUF,Registers Updated Flag" "0: No register update since last reload,1: At least one double-buffered register updated.." newline eventfld.word 0x1A 13. "REF,Reload Error Flag" "0: No reload error,1: Reload error" newline eventfld.word 0x1A 12. "RF,Reload Flag" "0: No new reload since last clearing,1: New reload since last clearing" newline eventfld.word 0x1A 11. "CFA1,Capture A1 Flag" "0,1" newline eventfld.word 0x1A 10. "CFA0,Capture A0 Flag" "0,1" newline eventfld.word 0x1A 9. "CFB1,Capture B1 Flag" "0,1" newline eventfld.word 0x1A 8. "CFB0,Capture B0 Flag" "0,1" newline eventfld.word 0x1A 7. "CFX1,Capture X1 Flag" "0,1" newline eventfld.word 0x1A 6. "CFX0,Capture X0 Flag" "0,1" newline hexmask.word.byte 0x1A 0.--5. 1. "CMPF,Compare Flags" line.word 0x1C "SM0_INTEN,Submodule 0 Interrupt Enable" bitfld.word 0x1C 13. "REIE,Reload Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 12. "RIE,Reload Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 11. "CA1IE,Capture A1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 10. "CA0IE,Capture A0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 9. "CB1IE,Capture B1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 8. "CB0IE,Capture B0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 7. "CX1IE,Capture X1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 6. "CX0IE,Capture X0 Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x1C 0.--5. 1. "CMPIE,Compare Interrupt Enables" line.word 0x1E "SM0_DMAEN,Submodule 0 DMA Enable" bitfld.word 0x1E 9. "VALDE,Value Registers DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 8. "FAND,FIFO Watermark AND Control" "0: OR: Any enabled FIFO watermark exceeded sets the..,1: AND: All enabled FIFO watermarks must be.." newline bitfld.word 0x1E 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Disable read DMA requests,1: Exceeding a FIFO watermark.,2: Local sync.,3: Local reload." newline bitfld.word 0x1E 5. "CA1DE,Capture A1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 4. "CA0DE,Capture A0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 3. "CB1DE,Capture B1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 2. "CB0DE,Capture B0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 1. "CX1DE,Capture X1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 0. "CX0DE,Capture X0 FIFO DMA Enable" "0: Disable,1: Enable" line.word 0x20 "SM0_TCTRL,Submodule 0 Output Trigger Control" bitfld.word 0x20 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route PWMn_OUT_TRIG0 signal to PWMn_MUX_TRIG0..,1: Route PWMn_A output to PWMn_MUX_TRIG0 port." newline bitfld.word 0x20 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route PWMn_OUT_TRIG1 signal to PWMn_MUX_TRIG1..,1: Route PWMn_B output to PWMn_MUX_TRIG1 port." newline bitfld.word 0x20 12. "TRGFRQ,Trigger Frequency" "0: Every period,1: Final period" newline hexmask.word.byte 0x20 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables" line.word 0x22 "SM0_DISMAP0,Submodule 0 Fault Disable Mapping" hexmask.word.byte 0x22 8.--11. 1. "DIS0X,PWMn_X Fault Disable Mask 0" newline hexmask.word.byte 0x22 4.--7. 1. "DIS0B,PWMn_B Fault Disable Mask 0" newline hexmask.word.byte 0x22 0.--3. 1. "DIS0A,PWMn_A Fault Disable Mask 0" line.word 0x24 "SM0_DISMAP1,Submodule 0 Fault Disable Mapping" hexmask.word.byte 0x24 8.--11. 1. "DIS1X,PWMn_X Fault Disable Mask 1" newline hexmask.word.byte 0x24 4.--7. 1. "DIS1B,PWMn_B Fault Disable Mask 1" newline hexmask.word.byte 0x24 0.--3. 1. "DIS1A,PWMn_A Fault Disable Mask 1" line.word 0x26 "SM0_DTCNT0,Submodule 0 Deadtime Count 0" hexmask.word 0x26 0.--15. 1. "DTCNT0,Deadtime Count 0" line.word 0x28 "SM0_DTCNT1,Submodule 0 Deadtime Count 1" hexmask.word 0x28 0.--15. 1. "DTCNT1,Deadtime Count 1" line.word 0x2A "SM0_CAPTCTRLA,Submodule 0 Capture Control A" rbitfld.word 0x2A 13.--15. "CA1CNT,Capture A1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2A 10.--12. "CA0CNT,Capture A0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2A 8.--9. "CFAWM,Capture A FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2A 7. "EDGCNTA_EN,Edge Counter A Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2A 6. "INP_SELA,Input Select A" "0: Raw PWMn_A input signal,1: Output of edge counter/compare." newline bitfld.word 0x2A 4.--5. "EDGA1,Edge A 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 2.--3. "EDGA0,Edge A 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 1. "ONESHOTA,One Shot Mode A" "0: Free-running,1: One-shot" newline bitfld.word 0x2A 0. "ARMA,Arm A" "0: Disarm input capture,1: Arm input capture as specified by the input edges" line.word 0x2C "SM0_CAPTCOMPA,Submodule 0 Capture Compare A" hexmask.word.byte 0x2C 8.--15. 1. "EDGCNTA,Edge Counter A" newline hexmask.word.byte 0x2C 0.--7. 1. "EDGCMPA,Edge Compare A" line.word 0x2E "SM0_CAPTCTRLB,Submodule 0 Capture Control B" rbitfld.word 0x2E 13.--15. "CB1CNT,Capture B1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2E 10.--12. "CB0CNT,Capture B0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2E 8.--9. "CFBWM,Capture B FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2E 7. "EDGCNTB_EN,Edge Counter B Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2E 6. "INP_SELB,Input Select B" "0: Raw PWMn_B input signal,1: Output of edge counter/compare" newline bitfld.word 0x2E 4.--5. "EDGB1,Edge B 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 2.--3. "EDGB0,Edge B 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 1. "ONESHOTB,One Shot Mode B" "0: Free-running,1: One-shot" newline bitfld.word 0x2E 0. "ARMB,Arm B" "0: Disarm input capture,1: Arm input capture as specified by EDGBn" line.word 0x30 "SM0_CAPTCOMPB,Submodule 0 Capture Compare B" hexmask.word.byte 0x30 8.--15. 1. "EDGCNTB,Edge Counter B" newline hexmask.word.byte 0x30 0.--7. 1. "EDGCMPB,Edge Compare B" line.word 0x32 "SM0_CAPTCTRLX,Submodule 0 Capture Control X" rbitfld.word 0x32 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x32 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x32 8.--9. "CFXWM,Capture X FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x32 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x32 6. "INP_SELX,Input Select X" "0: Raw PWMn_X input signal,1: Output of edge counter/compare." newline bitfld.word 0x32 4.--5. "EDGX1,Edge X 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 2.--3. "EDGX0,Edge X 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 1. "ONESHOTX,One Shot Mode X" "0: Free-running,1: One-shot" newline bitfld.word 0x32 0. "ARMX,Arm X" "0: Disarm input capture,1: Arm input capture as specified by EDGAn" line.word 0x34 "SM0_CAPTCOMPX,Submodule 0 Capture Compare X" hexmask.word.byte 0x34 8.--15. 1. "EDGCNTX,Edge Counter X" newline hexmask.word.byte 0x34 0.--7. 1. "EDGCMPX,Edge Compare X" rgroup.word 0x40++0x17 line.word 0x0 "SM0_CVAL0,Submodule 0 Capture Value 0" hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0" line.word 0x2 "SM0_CVAL0CYC,Submodule 0 Capture Value 0 Cycle" hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle" line.word 0x4 "SM0_CVAL1,Submodule 0 Capture Value 1" hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1" line.word 0x6 "SM0_CVAL1CYC,Submodule 0 Capture Value 1 Cycle" hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle" line.word 0x8 "SM0_CVAL2,Submodule 0 Capture Value 2" hexmask.word 0x8 0.--15. 1. "CAPTVAL2,Capture Value 2" line.word 0xA "SM0_CVAL2CYC,Submodule 0 Capture Value 2 Cycle" hexmask.word.byte 0xA 0.--3. 1. "CVAL2CYC,Capture Value 2 Cycle" line.word 0xC "SM0_CVAL3,Submodule 0 Capture Value 3" hexmask.word 0xC 0.--15. 1. "CAPTVAL3,Capture Value 3" line.word 0xE "SM0_CVAL3CYC,Submodule 0 Capture Value 3 Cycle" hexmask.word.byte 0xE 0.--3. 1. "CVAL3CYC,Capture Value 3 Cycle" line.word 0x10 "SM0_CVAL4,Submodule 0 Capture Value 4" hexmask.word 0x10 0.--15. 1. "CAPTVAL4,Capture Value 4" line.word 0x12 "SM0_CVAL4CYC,Submodule 0 Capture Value 4 Cycle" hexmask.word.byte 0x12 0.--3. 1. "CVAL4CYC,Capture Value 4 Cycle" line.word 0x14 "SM0_CVAL5,Submodule 0 Capture Value 5" hexmask.word 0x14 0.--15. 1. "CAPTVAL5,Capture Value 5" line.word 0x16 "SM0_CVAL5CYC,Submodule 0 Capture Value 5 Cycle" hexmask.word.byte 0x16 0.--3. 1. "CVAL5CYC,Capture Value 5 Cycle" rgroup.word 0x60++0x1 line.word 0x0 "SM1_CNT,Submodule 1 Counter" hexmask.word 0x0 0.--15. 1. "CNT,Counter Value" group.word 0x62++0x5 line.word 0x0 "SM1_INIT,Submodule 1 Initial Count" hexmask.word 0x0 0.--15. 1. "INIT,Initial Count" line.word 0x2 "SM1_CTRL2,Submodule 1 Control 2" bitfld.word 0x2 15. "DBGEN,Run In Debug Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 14. "WAITEN,Run In Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 13. "INDEP,Independent Operation" "0: Complementary PWM pair,1: Independent PWMs" newline bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1" newline bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1" newline bitfld.word 0x2 10. "PWMX_INIT,PWMn_X Initial Value" "0,1" newline bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Source Select" "0: Local sync (PWMn_X),1: Master reload (from submodule 0),2: Master sync from submodule 0,3: External sync (EXT_SYNC)" newline bitfld.word 0x2 7. "FRCEN,Force Initialization Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 6. "FORCE,Force Initialization" "0: No effect,1: Force initialization" newline bitfld.word 0x2 3.--5. "FORCE_SEL,Force Output Source Select" "0: Local force signal (FORCE),1: Master force signal (from submodule 0).,2: Local reload signal.,3: Master reload signal (from submodule 0).,4: Local sync signal,5: Master sync signal (from submodule 0).,6: External force signal (EXT_FORCE),7: External sync signal (EXT_SYNC)" newline bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: Local RELOAD signal,1: Master RELOAD signal (from submodule 0)." newline bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: IPBus clock,1: EXT_CLK,2: Submodule 0 clock (AUX_CLK),?" line.word 0x4 "SM1_CTRL,Submodule 1 Control" hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency" newline bitfld.word 0x4 11. "HALF,Half-Period Reload" "0: Disabled,1: Enabled" newline bitfld.word 0x4 10. "FULL,Full-Period Reload" "0: Disabled,1: Enabled" newline rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3" newline bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: Equal to,1: Equal to or greater than" newline bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: No divider,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" newline bitfld.word 0x4 3. "SPLIT,Split DBLPWM" "0: Not split. PWMA and PWMB each have double pulses.,1: Split to PWMA and PWMB." newline bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Next PWM reload if submodule Load Okay is asserted,1: Load Okay assertion" newline bitfld.word 0x4 1. "DBLX,PWMX Double Switching Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Disabled,1: Enabled" group.word 0x6A++0x35 line.word 0x0 "SM1_VAL0,Submodule 1 Value 0" hexmask.word 0x0 0.--15. 1. "VAL0,Timing Value 0" line.word 0x2 "SM1_FRACVAL1,Submodule 1 Fractional Value 1" hexmask.word.byte 0x2 11.--15. 1. "FRACVAL1,Fractional Timing Value 1" line.word 0x4 "SM1_VAL1,Submodule 1 Value 1" hexmask.word 0x4 0.--15. 1. "VAL1,Timing Value 1" line.word 0x6 "SM1_FRACVAL2,Submodule 1 Fractional Value 2" hexmask.word.byte 0x6 11.--15. 1. "FRACVAL2,Fractional Timing Value 2" line.word 0x8 "SM1_VAL2,Submodule 1 Value 2" hexmask.word 0x8 0.--15. 1. "VAL2,Timing Value 2" line.word 0xA "SM1_FRACVAL3,Submodule 1 Fractional Value 3" hexmask.word.byte 0xA 11.--15. 1. "FRACVAL3,Fractional Timing Value 3" line.word 0xC "SM1_VAL3,Submodule 1 Value 3" hexmask.word 0xC 0.--15. 1. "VAL3,Timing Value 3" line.word 0xE "SM1_FRACVAL4,Submodule 1 Fractional Value 4" hexmask.word.byte 0xE 11.--15. 1. "FRACVAL4,Fractional Timing Value 4" line.word 0x10 "SM1_VAL4,Submodule 1 Value 4" hexmask.word 0x10 0.--15. 1. "VAL4,Timing Value 4" line.word 0x12 "SM1_FRACVAL5,Submodule 1 Fractional Value 5" hexmask.word.byte 0x12 11.--15. 1. "FRACVAL5,Fractional Timing Value 5" line.word 0x14 "SM1_VAL5,Submodule 1 Value 5" hexmask.word 0x14 0.--15. 1. "VAL5,Timing Value 5" line.word 0x16 "SM1_FRCTRL,Submodule 1 Fractional Control" bitfld.word 0x16 8. "FRAC_PU,Fractional Delay Power Up" "0: Off,1: On" newline bitfld.word 0x16 4. "FRAC45_EN,Fractional Cycle Placement Enable for PWMn_B" "0: Disable,1: Enable" newline bitfld.word 0x16 2. "FRAC23_EN,Fractional Cycle Placement Enable for PWMn_A" "0: Disable,1: Enable" newline bitfld.word 0x16 1. "FRAC1_EN,Fractional Cycle PWM Period Enable" "0: Disable,1: Enable" line.word 0x18 "SM1_OCTRL,Submodule 1 Output Control" rbitfld.word 0x18 15. "PWMA_IN,PWMn_A Input" "0,1" newline rbitfld.word 0x18 14. "PWMB_IN,PWMn_B Input" "0,1" newline rbitfld.word 0x18 13. "PWMX_IN,PWMn_X Input" "0,1" newline bitfld.word 0x18 10. "POLA,PWMn_A Output Polarity" "0: Not inverted. PWMn_A is active high.,1: Inverted. PWMn_A is active low." newline bitfld.word 0x18 9. "POLB,PWMn_B Output Polarity" "0: Not inverted. PWMn_B is active high.,1: Inverted. PWMn_B is active low." newline bitfld.word 0x18 8. "POLX,PWMn_X Output Polarity" "0: Not inverted. PWMn_X is active high.,1: Inverted. PWMn_X is active low." newline bitfld.word 0x18 4.--5. "PWMAFS,PWMn_A Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 2.--3. "PWMBFS,PWMn_B Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 0.--1. "PWMXFS,PWMn_X Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" line.word 0x1A "SM1_STS,Submodule 1 Status" rbitfld.word 0x1A 14. "RUF,Registers Updated Flag" "0: No register update since last reload,1: At least one double-buffered register updated.." newline eventfld.word 0x1A 13. "REF,Reload Error Flag" "0: No reload error,1: Reload error" newline eventfld.word 0x1A 12. "RF,Reload Flag" "0: No new reload since last clearing,1: New reload since last clearing" newline eventfld.word 0x1A 11. "CFA1,Capture A1 Flag" "0,1" newline eventfld.word 0x1A 10. "CFA0,Capture A0 Flag" "0,1" newline eventfld.word 0x1A 9. "CFB1,Capture B1 Flag" "0,1" newline eventfld.word 0x1A 8. "CFB0,Capture B0 Flag" "0,1" newline eventfld.word 0x1A 7. "CFX1,Capture X1 Flag" "0,1" newline eventfld.word 0x1A 6. "CFX0,Capture X0 Flag" "0,1" newline hexmask.word.byte 0x1A 0.--5. 1. "CMPF,Compare Flags" line.word 0x1C "SM1_INTEN,Submodule 1 Interrupt Enable" bitfld.word 0x1C 13. "REIE,Reload Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 12. "RIE,Reload Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 11. "CA1IE,Capture A1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 10. "CA0IE,Capture A0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 9. "CB1IE,Capture B1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 8. "CB0IE,Capture B0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 7. "CX1IE,Capture X1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 6. "CX0IE,Capture X0 Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x1C 0.--5. 1. "CMPIE,Compare Interrupt Enables" line.word 0x1E "SM1_DMAEN,Submodule 1 DMA Enable" bitfld.word 0x1E 9. "VALDE,Value Registers DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 8. "FAND,FIFO Watermark AND Control" "0: OR: Any enabled FIFO watermark exceeded sets the..,1: AND: All enabled FIFO watermarks must be.." newline bitfld.word 0x1E 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Disable read DMA requests,1: Exceeding a FIFO watermark.,2: Local sync.,3: Local reload." newline bitfld.word 0x1E 5. "CA1DE,Capture A1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 4. "CA0DE,Capture A0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 3. "CB1DE,Capture B1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 2. "CB0DE,Capture B0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 1. "CX1DE,Capture X1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 0. "CX0DE,Capture X0 FIFO DMA Enable" "0: Disable,1: Enable" line.word 0x20 "SM1_TCTRL,Submodule 1 Output Trigger Control" bitfld.word 0x20 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route PWMn_OUT_TRIG0 signal to PWMn_MUX_TRIG0..,1: Route PWMn_A output to PWMn_MUX_TRIG0 port." newline bitfld.word 0x20 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route PWMn_OUT_TRIG1 signal to PWMn_MUX_TRIG1..,1: Route PWMn_B output to PWMn_MUX_TRIG1 port." newline bitfld.word 0x20 12. "TRGFRQ,Trigger Frequency" "0: Every period,1: Final period" newline hexmask.word.byte 0x20 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables" line.word 0x22 "SM1_DISMAP0,Submodule 1 Fault Disable Mapping" hexmask.word.byte 0x22 8.--11. 1. "DIS0X,PWMn_X Fault Disable Mask 0" newline hexmask.word.byte 0x22 4.--7. 1. "DIS0B,PWMn_B Fault Disable Mask 0" newline hexmask.word.byte 0x22 0.--3. 1. "DIS0A,PWMn_A Fault Disable Mask 0" line.word 0x24 "SM1_DISMAP1,Submodule 1 Fault Disable Mapping" hexmask.word.byte 0x24 8.--11. 1. "DIS1X,PWMn_X Fault Disable Mask 1" newline hexmask.word.byte 0x24 4.--7. 1. "DIS1B,PWMn_B Fault Disable Mask 1" newline hexmask.word.byte 0x24 0.--3. 1. "DIS1A,PWMn_A Fault Disable Mask 1" line.word 0x26 "SM1_DTCNT0,Submodule 1 Deadtime Count 0" hexmask.word 0x26 0.--15. 1. "DTCNT0,Deadtime Count 0" line.word 0x28 "SM1_DTCNT1,Submodule 1 Deadtime Count 1" hexmask.word 0x28 0.--15. 1. "DTCNT1,Deadtime Count 1" line.word 0x2A "SM1_CAPTCTRLA,Submodule 1 Capture Control A" rbitfld.word 0x2A 13.--15. "CA1CNT,Capture A1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2A 10.--12. "CA0CNT,Capture A0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2A 8.--9. "CFAWM,Capture A FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2A 7. "EDGCNTA_EN,Edge Counter A Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2A 6. "INP_SELA,Input Select A" "0: Raw PWMn_A input signal,1: Output of edge counter/compare." newline bitfld.word 0x2A 4.--5. "EDGA1,Edge A 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 2.--3. "EDGA0,Edge A 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 1. "ONESHOTA,One Shot Mode A" "0: Free-running,1: One-shot" newline bitfld.word 0x2A 0. "ARMA,Arm A" "0: Disarm input capture,1: Arm input capture as specified by the input edges" line.word 0x2C "SM1_CAPTCOMPA,Submodule 1 Capture Compare A" hexmask.word.byte 0x2C 8.--15. 1. "EDGCNTA,Edge Counter A" newline hexmask.word.byte 0x2C 0.--7. 1. "EDGCMPA,Edge Compare A" line.word 0x2E "SM1_CAPTCTRLB,Submodule 1 Capture Control B" rbitfld.word 0x2E 13.--15. "CB1CNT,Capture B1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2E 10.--12. "CB0CNT,Capture B0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2E 8.--9. "CFBWM,Capture B FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2E 7. "EDGCNTB_EN,Edge Counter B Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2E 6. "INP_SELB,Input Select B" "0: Raw PWMn_B input signal,1: Output of edge counter/compare" newline bitfld.word 0x2E 4.--5. "EDGB1,Edge B 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 2.--3. "EDGB0,Edge B 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 1. "ONESHOTB,One Shot Mode B" "0: Free-running,1: One-shot" newline bitfld.word 0x2E 0. "ARMB,Arm B" "0: Disarm input capture,1: Arm input capture as specified by EDGBn" line.word 0x30 "SM1_CAPTCOMPB,Submodule 1 Capture Compare B" hexmask.word.byte 0x30 8.--15. 1. "EDGCNTB,Edge Counter B" newline hexmask.word.byte 0x30 0.--7. 1. "EDGCMPB,Edge Compare B" line.word 0x32 "SM1_CAPTCTRLX,Submodule 1 Capture Control X" rbitfld.word 0x32 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x32 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x32 8.--9. "CFXWM,Capture X FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x32 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x32 6. "INP_SELX,Input Select X" "0: Raw PWMn_X input signal,1: Output of edge counter/compare." newline bitfld.word 0x32 4.--5. "EDGX1,Edge X 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 2.--3. "EDGX0,Edge X 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 1. "ONESHOTX,One Shot Mode X" "0: Free-running,1: One-shot" newline bitfld.word 0x32 0. "ARMX,Arm X" "0: Disarm input capture,1: Arm input capture as specified by EDGAn" line.word 0x34 "SM1_CAPTCOMPX,Submodule 1 Capture Compare X" hexmask.word.byte 0x34 8.--15. 1. "EDGCNTX,Edge Counter X" newline hexmask.word.byte 0x34 0.--7. 1. "EDGCMPX,Edge Compare X" rgroup.word 0xA0++0x17 line.word 0x0 "SM1_CVAL0,Submodule 1 Capture Value 0" hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0" line.word 0x2 "SM1_CVAL0CYC,Submodule 1 Capture Value 0 Cycle" hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle" line.word 0x4 "SM1_CVAL1,Submodule 1 Capture Value 1" hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1" line.word 0x6 "SM1_CVAL1CYC,Submodule 1 Capture Value 1 Cycle" hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle" line.word 0x8 "SM1_CVAL2,Submodule 1 Capture Value 2" hexmask.word 0x8 0.--15. 1. "CAPTVAL2,Capture Value 2" line.word 0xA "SM1_CVAL2CYC,Submodule 1 Capture Value 2 Cycle" hexmask.word.byte 0xA 0.--3. 1. "CVAL2CYC,Capture Value 2 Cycle" line.word 0xC "SM1_CVAL3,Submodule 1 Capture Value 3" hexmask.word 0xC 0.--15. 1. "CAPTVAL3,Capture Value 3" line.word 0xE "SM1_CVAL3CYC,Submodule 1 Capture Value 3 Cycle" hexmask.word.byte 0xE 0.--3. 1. "CVAL3CYC,Capture Value 3 Cycle" line.word 0x10 "SM1_CVAL4,Submodule 1 Capture Value 4" hexmask.word 0x10 0.--15. 1. "CAPTVAL4,Capture Value 4" line.word 0x12 "SM1_CVAL4CYC,Submodule 1 Capture Value 4 Cycle" hexmask.word.byte 0x12 0.--3. 1. "CVAL4CYC,Capture Value 4 Cycle" line.word 0x14 "SM1_CVAL5,Submodule 1 Capture Value 5" hexmask.word 0x14 0.--15. 1. "CAPTVAL5,Capture Value 5" line.word 0x16 "SM1_CVAL5CYC,Submodule 1 Capture Value 5 Cycle" hexmask.word.byte 0x16 0.--3. 1. "CVAL5CYC,Capture Value 5 Cycle" group.word 0xB8++0x1 line.word 0x0 "SM1_PHASEDLY,Submodule 1 Phase Delay" hexmask.word 0x0 0.--15. 1. "PHASEDLY,Phase Delay" rgroup.word 0xC0++0x1 line.word 0x0 "SM2_CNT,Submodule 2 Counter" hexmask.word 0x0 0.--15. 1. "CNT,Counter Value" group.word 0xC2++0x5 line.word 0x0 "SM2_INIT,Submodule 2 Initial Count" hexmask.word 0x0 0.--15. 1. "INIT,Initial Count" line.word 0x2 "SM2_CTRL2,Submodule 2 Control 2" bitfld.word 0x2 15. "DBGEN,Run In Debug Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 14. "WAITEN,Run In Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 13. "INDEP,Independent Operation" "0: Complementary PWM pair,1: Independent PWMs" newline bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1" newline bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1" newline bitfld.word 0x2 10. "PWMX_INIT,PWMn_X Initial Value" "0,1" newline bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Source Select" "0: Local sync (PWMn_X),1: Master reload (from submodule 0),2: Master sync from submodule 0,3: External sync (EXT_SYNC)" newline bitfld.word 0x2 7. "FRCEN,Force Initialization Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 6. "FORCE,Force Initialization" "0: No effect,1: Force initialization" newline bitfld.word 0x2 3.--5. "FORCE_SEL,Force Output Source Select" "0: Local force signal (FORCE),1: Master force signal (from submodule 0).,2: Local reload signal.,3: Master reload signal (from submodule 0).,4: Local sync signal,5: Master sync signal (from submodule 0).,6: External force signal (EXT_FORCE),7: External sync signal (EXT_SYNC)" newline bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: Local RELOAD signal,1: Master RELOAD signal (from submodule 0)." newline bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: IPBus clock,1: EXT_CLK,2: Submodule 0 clock (AUX_CLK),?" line.word 0x4 "SM2_CTRL,Submodule 2 Control" hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency" newline bitfld.word 0x4 11. "HALF,Half-Period Reload" "0: Disabled,1: Enabled" newline bitfld.word 0x4 10. "FULL,Full-Period Reload" "0: Disabled,1: Enabled" newline rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3" newline bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: Equal to,1: Equal to or greater than" newline bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: No divider,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" newline bitfld.word 0x4 3. "SPLIT,Split DBLPWM" "0: Not split. PWMA and PWMB each have double pulses.,1: Split to PWMA and PWMB." newline bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Next PWM reload if submodule Load Okay is asserted,1: Load Okay assertion" newline bitfld.word 0x4 1. "DBLX,PWMX Double Switching Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Disabled,1: Enabled" group.word 0xCA++0x35 line.word 0x0 "SM2_VAL0,Submodule 2 Value 0" hexmask.word 0x0 0.--15. 1. "VAL0,Timing Value 0" line.word 0x2 "SM2_FRACVAL1,Submodule 2 Fractional Value 1" hexmask.word.byte 0x2 11.--15. 1. "FRACVAL1,Fractional Timing Value 1" line.word 0x4 "SM2_VAL1,Submodule 2 Value 1" hexmask.word 0x4 0.--15. 1. "VAL1,Timing Value 1" line.word 0x6 "SM2_FRACVAL2,Submodule 2 Fractional Value 2" hexmask.word.byte 0x6 11.--15. 1. "FRACVAL2,Fractional Timing Value 2" line.word 0x8 "SM2_VAL2,Submodule 2 Value 2" hexmask.word 0x8 0.--15. 1. "VAL2,Timing Value 2" line.word 0xA "SM2_FRACVAL3,Submodule 2 Fractional Value 3" hexmask.word.byte 0xA 11.--15. 1. "FRACVAL3,Fractional Timing Value 3" line.word 0xC "SM2_VAL3,Submodule 2 Value 3" hexmask.word 0xC 0.--15. 1. "VAL3,Timing Value 3" line.word 0xE "SM2_FRACVAL4,Submodule 2 Fractional Value 4" hexmask.word.byte 0xE 11.--15. 1. "FRACVAL4,Fractional Timing Value 4" line.word 0x10 "SM2_VAL4,Submodule 2 Value 4" hexmask.word 0x10 0.--15. 1. "VAL4,Timing Value 4" line.word 0x12 "SM2_FRACVAL5,Submodule 2 Fractional Value 5" hexmask.word.byte 0x12 11.--15. 1. "FRACVAL5,Fractional Timing Value 5" line.word 0x14 "SM2_VAL5,Submodule 2 Value 5" hexmask.word 0x14 0.--15. 1. "VAL5,Timing Value 5" line.word 0x16 "SM2_FRCTRL,Submodule 2 Fractional Control" bitfld.word 0x16 8. "FRAC_PU,Fractional Delay Power Up" "0: Off,1: On" newline bitfld.word 0x16 4. "FRAC45_EN,Fractional Cycle Placement Enable for PWMn_B" "0: Disable,1: Enable" newline bitfld.word 0x16 2. "FRAC23_EN,Fractional Cycle Placement Enable for PWMn_A" "0: Disable,1: Enable" newline bitfld.word 0x16 1. "FRAC1_EN,Fractional Cycle PWM Period Enable" "0: Disable,1: Enable" line.word 0x18 "SM2_OCTRL,Submodule 2 Output Control" rbitfld.word 0x18 15. "PWMA_IN,PWMn_A Input" "0,1" newline rbitfld.word 0x18 14. "PWMB_IN,PWMn_B Input" "0,1" newline rbitfld.word 0x18 13. "PWMX_IN,PWMn_X Input" "0,1" newline bitfld.word 0x18 10. "POLA,PWMn_A Output Polarity" "0: Not inverted. PWMn_A is active high.,1: Inverted. PWMn_A is active low." newline bitfld.word 0x18 9. "POLB,PWMn_B Output Polarity" "0: Not inverted. PWMn_B is active high.,1: Inverted. PWMn_B is active low." newline bitfld.word 0x18 8. "POLX,PWMn_X Output Polarity" "0: Not inverted. PWMn_X is active high.,1: Inverted. PWMn_X is active low." newline bitfld.word 0x18 4.--5. "PWMAFS,PWMn_A Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 2.--3. "PWMBFS,PWMn_B Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 0.--1. "PWMXFS,PWMn_X Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" line.word 0x1A "SM2_STS,Submodule 2 Status" rbitfld.word 0x1A 14. "RUF,Registers Updated Flag" "0: No register update since last reload,1: At least one double-buffered register updated.." newline eventfld.word 0x1A 13. "REF,Reload Error Flag" "0: No reload error,1: Reload error" newline eventfld.word 0x1A 12. "RF,Reload Flag" "0: No new reload since last clearing,1: New reload since last clearing" newline eventfld.word 0x1A 11. "CFA1,Capture A1 Flag" "0,1" newline eventfld.word 0x1A 10. "CFA0,Capture A0 Flag" "0,1" newline eventfld.word 0x1A 9. "CFB1,Capture B1 Flag" "0,1" newline eventfld.word 0x1A 8. "CFB0,Capture B0 Flag" "0,1" newline eventfld.word 0x1A 7. "CFX1,Capture X1 Flag" "0,1" newline eventfld.word 0x1A 6. "CFX0,Capture X0 Flag" "0,1" newline hexmask.word.byte 0x1A 0.--5. 1. "CMPF,Compare Flags" line.word 0x1C "SM2_INTEN,Submodule 2 Interrupt Enable" bitfld.word 0x1C 13. "REIE,Reload Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 12. "RIE,Reload Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 11. "CA1IE,Capture A1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 10. "CA0IE,Capture A0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 9. "CB1IE,Capture B1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 8. "CB0IE,Capture B0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 7. "CX1IE,Capture X1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 6. "CX0IE,Capture X0 Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x1C 0.--5. 1. "CMPIE,Compare Interrupt Enables" line.word 0x1E "SM2_DMAEN,Submodule 2 DMA Enable" bitfld.word 0x1E 9. "VALDE,Value Registers DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 8. "FAND,FIFO Watermark AND Control" "0: OR: Any enabled FIFO watermark exceeded sets the..,1: AND: All enabled FIFO watermarks must be.." newline bitfld.word 0x1E 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Disable read DMA requests,1: Exceeding a FIFO watermark.,2: Local sync.,3: Local reload." newline bitfld.word 0x1E 5. "CA1DE,Capture A1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 4. "CA0DE,Capture A0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 3. "CB1DE,Capture B1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 2. "CB0DE,Capture B0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 1. "CX1DE,Capture X1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 0. "CX0DE,Capture X0 FIFO DMA Enable" "0: Disable,1: Enable" line.word 0x20 "SM2_TCTRL,Submodule 2 Output Trigger Control" bitfld.word 0x20 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route PWMn_OUT_TRIG0 signal to PWMn_MUX_TRIG0..,1: Route PWMn_A output to PWMn_MUX_TRIG0 port." newline bitfld.word 0x20 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route PWMn_OUT_TRIG1 signal to PWMn_MUX_TRIG1..,1: Route PWMn_B output to PWMn_MUX_TRIG1 port." newline bitfld.word 0x20 12. "TRGFRQ,Trigger Frequency" "0: Every period,1: Final period" newline hexmask.word.byte 0x20 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables" line.word 0x22 "SM2_DISMAP0,Submodule 2 Fault Disable Mapping" hexmask.word.byte 0x22 8.--11. 1. "DIS0X,PWMn_X Fault Disable Mask 0" newline hexmask.word.byte 0x22 4.--7. 1. "DIS0B,PWMn_B Fault Disable Mask 0" newline hexmask.word.byte 0x22 0.--3. 1. "DIS0A,PWMn_A Fault Disable Mask 0" line.word 0x24 "SM2_DISMAP1,Submodule 2 Fault Disable Mapping" hexmask.word.byte 0x24 8.--11. 1. "DIS1X,PWMn_X Fault Disable Mask 1" newline hexmask.word.byte 0x24 4.--7. 1. "DIS1B,PWMn_B Fault Disable Mask 1" newline hexmask.word.byte 0x24 0.--3. 1. "DIS1A,PWMn_A Fault Disable Mask 1" line.word 0x26 "SM2_DTCNT0,Submodule 2 Deadtime Count 0" hexmask.word 0x26 0.--15. 1. "DTCNT0,Deadtime Count 0" line.word 0x28 "SM2_DTCNT1,Submodule 2 Deadtime Count 1" hexmask.word 0x28 0.--15. 1. "DTCNT1,Deadtime Count 1" line.word 0x2A "SM2_CAPTCTRLA,Submodule 2 Capture Control A" rbitfld.word 0x2A 13.--15. "CA1CNT,Capture A1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2A 10.--12. "CA0CNT,Capture A0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2A 8.--9. "CFAWM,Capture A FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2A 7. "EDGCNTA_EN,Edge Counter A Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2A 6. "INP_SELA,Input Select A" "0: Raw PWMn_A input signal,1: Output of edge counter/compare." newline bitfld.word 0x2A 4.--5. "EDGA1,Edge A 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 2.--3. "EDGA0,Edge A 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 1. "ONESHOTA,One Shot Mode A" "0: Free-running,1: One-shot" newline bitfld.word 0x2A 0. "ARMA,Arm A" "0: Disarm input capture,1: Arm input capture as specified by the input edges" line.word 0x2C "SM2_CAPTCOMPA,Submodule 2 Capture Compare A" hexmask.word.byte 0x2C 8.--15. 1. "EDGCNTA,Edge Counter A" newline hexmask.word.byte 0x2C 0.--7. 1. "EDGCMPA,Edge Compare A" line.word 0x2E "SM2_CAPTCTRLB,Submodule 2 Capture Control B" rbitfld.word 0x2E 13.--15. "CB1CNT,Capture B1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2E 10.--12. "CB0CNT,Capture B0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2E 8.--9. "CFBWM,Capture B FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2E 7. "EDGCNTB_EN,Edge Counter B Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2E 6. "INP_SELB,Input Select B" "0: Raw PWMn_B input signal,1: Output of edge counter/compare" newline bitfld.word 0x2E 4.--5. "EDGB1,Edge B 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 2.--3. "EDGB0,Edge B 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 1. "ONESHOTB,One Shot Mode B" "0: Free-running,1: One-shot" newline bitfld.word 0x2E 0. "ARMB,Arm B" "0: Disarm input capture,1: Arm input capture as specified by EDGBn" line.word 0x30 "SM2_CAPTCOMPB,Submodule 2 Capture Compare B" hexmask.word.byte 0x30 8.--15. 1. "EDGCNTB,Edge Counter B" newline hexmask.word.byte 0x30 0.--7. 1. "EDGCMPB,Edge Compare B" line.word 0x32 "SM2_CAPTCTRLX,Submodule 2 Capture Control X" rbitfld.word 0x32 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x32 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x32 8.--9. "CFXWM,Capture X FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x32 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x32 6. "INP_SELX,Input Select X" "0: Raw PWMn_X input signal,1: Output of edge counter/compare." newline bitfld.word 0x32 4.--5. "EDGX1,Edge X 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 2.--3. "EDGX0,Edge X 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 1. "ONESHOTX,One Shot Mode X" "0: Free-running,1: One-shot" newline bitfld.word 0x32 0. "ARMX,Arm X" "0: Disarm input capture,1: Arm input capture as specified by EDGAn" line.word 0x34 "SM2_CAPTCOMPX,Submodule 2 Capture Compare X" hexmask.word.byte 0x34 8.--15. 1. "EDGCNTX,Edge Counter X" newline hexmask.word.byte 0x34 0.--7. 1. "EDGCMPX,Edge Compare X" rgroup.word 0x100++0x17 line.word 0x0 "SM2_CVAL0,Submodule 2 Capture Value 0" hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0" line.word 0x2 "SM2_CVAL0CYC,Submodule 2 Capture Value 0 Cycle" hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle" line.word 0x4 "SM2_CVAL1,Submodule 2 Capture Value 1" hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1" line.word 0x6 "SM2_CVAL1CYC,Submodule 2 Capture Value 1 Cycle" hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle" line.word 0x8 "SM2_CVAL2,Submodule 2 Capture Value 2" hexmask.word 0x8 0.--15. 1. "CAPTVAL2,Capture Value 2" line.word 0xA "SM2_CVAL2CYC,Submodule 2 Capture Value 2 Cycle" hexmask.word.byte 0xA 0.--3. 1. "CVAL2CYC,Capture Value 2 Cycle" line.word 0xC "SM2_CVAL3,Submodule 2 Capture Value 3" hexmask.word 0xC 0.--15. 1. "CAPTVAL3,Capture Value 3" line.word 0xE "SM2_CVAL3CYC,Submodule 2 Capture Value 3 Cycle" hexmask.word.byte 0xE 0.--3. 1. "CVAL3CYC,Capture Value 3 Cycle" line.word 0x10 "SM2_CVAL4,Submodule 2 Capture Value 4" hexmask.word 0x10 0.--15. 1. "CAPTVAL4,Capture Value 4" line.word 0x12 "SM2_CVAL4CYC,Submodule 2 Capture Value 4 Cycle" hexmask.word.byte 0x12 0.--3. 1. "CVAL4CYC,Capture Value 4 Cycle" line.word 0x14 "SM2_CVAL5,Submodule 2 Capture Value 5" hexmask.word 0x14 0.--15. 1. "CAPTVAL5,Capture Value 5" line.word 0x16 "SM2_CVAL5CYC,Submodule 2 Capture Value 5 Cycle" hexmask.word.byte 0x16 0.--3. 1. "CVAL5CYC,Capture Value 5 Cycle" group.word 0x118++0x1 line.word 0x0 "SM2_PHASEDLY,Submodule 2 Phase Delay" hexmask.word 0x0 0.--15. 1. "PHASEDLY,Phase Delay" rgroup.word 0x120++0x1 line.word 0x0 "SM3_CNT,Submodule 3 Counter" hexmask.word 0x0 0.--15. 1. "CNT,Counter Value" group.word 0x122++0x5 line.word 0x0 "SM3_INIT,Submodule 3 Initial Count" hexmask.word 0x0 0.--15. 1. "INIT,Initial Count" line.word 0x2 "SM3_CTRL2,Submodule 3 Control 2" bitfld.word 0x2 15. "DBGEN,Run In Debug Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 14. "WAITEN,Run In Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 13. "INDEP,Independent Operation" "0: Complementary PWM pair,1: Independent PWMs" newline bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1" newline bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1" newline bitfld.word 0x2 10. "PWMX_INIT,PWMn_X Initial Value" "0,1" newline bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Source Select" "0: Local sync (PWMn_X),1: Master reload (from submodule 0),2: Master sync from submodule 0,3: External sync (EXT_SYNC)" newline bitfld.word 0x2 7. "FRCEN,Force Initialization Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x2 6. "FORCE,Force Initialization" "0: No effect,1: Force initialization" newline bitfld.word 0x2 3.--5. "FORCE_SEL,Force Output Source Select" "0: Local force signal (FORCE),1: Master force signal (from submodule 0).,2: Local reload signal.,3: Master reload signal (from submodule 0).,4: Local sync signal,5: Master sync signal (from submodule 0).,6: External force signal (EXT_FORCE),7: External sync signal (EXT_SYNC)" newline bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: Local RELOAD signal,1: Master RELOAD signal (from submodule 0)." newline bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: IPBus clock,1: EXT_CLK,2: Submodule 0 clock (AUX_CLK),?" line.word 0x4 "SM3_CTRL,Submodule 3 Control" hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency" newline bitfld.word 0x4 11. "HALF,Half-Period Reload" "0: Disabled,1: Enabled" newline bitfld.word 0x4 10. "FULL,Full-Period Reload" "0: Disabled,1: Enabled" newline rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3" newline bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: Equal to,1: Equal to or greater than" newline bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: No divider,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" newline bitfld.word 0x4 3. "SPLIT,Split DBLPWM" "0: Not split. PWMA and PWMB each have double pulses.,1: Split to PWMA and PWMB." newline bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Next PWM reload if submodule Load Okay is asserted,1: Load Okay assertion" newline bitfld.word 0x4 1. "DBLX,PWMX Double Switching Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Disabled,1: Enabled" group.word 0x12A++0x35 line.word 0x0 "SM3_VAL0,Submodule 3 Value 0" hexmask.word 0x0 0.--15. 1. "VAL0,Timing Value 0" line.word 0x2 "SM3_FRACVAL1,Submodule 3 Fractional Value 1" hexmask.word.byte 0x2 11.--15. 1. "FRACVAL1,Fractional Timing Value 1" line.word 0x4 "SM3_VAL1,Submodule 3 Value 1" hexmask.word 0x4 0.--15. 1. "VAL1,Timing Value 1" line.word 0x6 "SM3_FRACVAL2,Submodule 3 Fractional Value 2" hexmask.word.byte 0x6 11.--15. 1. "FRACVAL2,Fractional Timing Value 2" line.word 0x8 "SM3_VAL2,Submodule 3 Value 2" hexmask.word 0x8 0.--15. 1. "VAL2,Timing Value 2" line.word 0xA "SM3_FRACVAL3,Submodule 3 Fractional Value 3" hexmask.word.byte 0xA 11.--15. 1. "FRACVAL3,Fractional Timing Value 3" line.word 0xC "SM3_VAL3,Submodule 3 Value 3" hexmask.word 0xC 0.--15. 1. "VAL3,Timing Value 3" line.word 0xE "SM3_FRACVAL4,Submodule 3 Fractional Value 4" hexmask.word.byte 0xE 11.--15. 1. "FRACVAL4,Fractional Timing Value 4" line.word 0x10 "SM3_VAL4,Submodule 3 Value 4" hexmask.word 0x10 0.--15. 1. "VAL4,Timing Value 4" line.word 0x12 "SM3_FRACVAL5,Submodule 3 Fractional Value 5" hexmask.word.byte 0x12 11.--15. 1. "FRACVAL5,Fractional Timing Value 5" line.word 0x14 "SM3_VAL5,Submodule 3 Value 5" hexmask.word 0x14 0.--15. 1. "VAL5,Timing Value 5" line.word 0x16 "SM3_FRCTRL,Submodule 3 Fractional Control" bitfld.word 0x16 8. "FRAC_PU,Fractional Delay Power Up" "0: Off,1: On" newline bitfld.word 0x16 4. "FRAC45_EN,Fractional Cycle Placement Enable for PWMn_B" "0: Disable,1: Enable" newline bitfld.word 0x16 2. "FRAC23_EN,Fractional Cycle Placement Enable for PWMn_A" "0: Disable,1: Enable" newline bitfld.word 0x16 1. "FRAC1_EN,Fractional Cycle PWM Period Enable" "0: Disable,1: Enable" line.word 0x18 "SM3_OCTRL,Submodule 3 Output Control" rbitfld.word 0x18 15. "PWMA_IN,PWMn_A Input" "0,1" newline rbitfld.word 0x18 14. "PWMB_IN,PWMn_B Input" "0,1" newline rbitfld.word 0x18 13. "PWMX_IN,PWMn_X Input" "0,1" newline bitfld.word 0x18 10. "POLA,PWMn_A Output Polarity" "0: Not inverted. PWMn_A is active high.,1: Inverted. PWMn_A is active low." newline bitfld.word 0x18 9. "POLB,PWMn_B Output Polarity" "0: Not inverted. PWMn_B is active high.,1: Inverted. PWMn_B is active low." newline bitfld.word 0x18 8. "POLX,PWMn_X Output Polarity" "0: Not inverted. PWMn_X is active high.,1: Inverted. PWMn_X is active low." newline bitfld.word 0x18 4.--5. "PWMAFS,PWMn_A Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 2.--3. "PWMBFS,PWMn_B Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" newline bitfld.word 0x18 0.--1. "PWMXFS,PWMn_X Fault State" "0: Forced to logic 0 before consideration of output..,1: Forced to logic 1 before consideration of output..,2: Tristated,3: Tristated" line.word 0x1A "SM3_STS,Submodule 3 Status" rbitfld.word 0x1A 14. "RUF,Registers Updated Flag" "0: No register update since last reload,1: At least one double-buffered register updated.." newline eventfld.word 0x1A 13. "REF,Reload Error Flag" "0: No reload error,1: Reload error" newline eventfld.word 0x1A 12. "RF,Reload Flag" "0: No new reload since last clearing,1: New reload since last clearing" newline eventfld.word 0x1A 11. "CFA1,Capture A1 Flag" "0,1" newline eventfld.word 0x1A 10. "CFA0,Capture A0 Flag" "0,1" newline eventfld.word 0x1A 9. "CFB1,Capture B1 Flag" "0,1" newline eventfld.word 0x1A 8. "CFB0,Capture B0 Flag" "0,1" newline eventfld.word 0x1A 7. "CFX1,Capture X1 Flag" "0,1" newline eventfld.word 0x1A 6. "CFX0,Capture X0 Flag" "0,1" newline hexmask.word.byte 0x1A 0.--5. 1. "CMPF,Compare Flags" line.word 0x1C "SM3_INTEN,Submodule 3 Interrupt Enable" bitfld.word 0x1C 13. "REIE,Reload Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 12. "RIE,Reload Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 11. "CA1IE,Capture A1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 10. "CA0IE,Capture A0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 9. "CB1IE,Capture B1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 8. "CB0IE,Capture B0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 7. "CX1IE,Capture X1 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x1C 6. "CX0IE,Capture X0 Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x1C 0.--5. 1. "CMPIE,Compare Interrupt Enables" line.word 0x1E "SM3_DMAEN,Submodule 3 DMA Enable" bitfld.word 0x1E 9. "VALDE,Value Registers DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 8. "FAND,FIFO Watermark AND Control" "0: OR: Any enabled FIFO watermark exceeded sets the..,1: AND: All enabled FIFO watermarks must be.." newline bitfld.word 0x1E 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Disable read DMA requests,1: Exceeding a FIFO watermark.,2: Local sync.,3: Local reload." newline bitfld.word 0x1E 5. "CA1DE,Capture A1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 4. "CA0DE,Capture A0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 3. "CB1DE,Capture B1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 2. "CB0DE,Capture B0 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 1. "CX1DE,Capture X1 FIFO DMA Enable" "0: Disable,1: Enable" newline bitfld.word 0x1E 0. "CX0DE,Capture X0 FIFO DMA Enable" "0: Disable,1: Enable" line.word 0x20 "SM3_TCTRL,Submodule 3 Output Trigger Control" bitfld.word 0x20 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route PWMn_OUT_TRIG0 signal to PWMn_MUX_TRIG0..,1: Route PWMn_A output to PWMn_MUX_TRIG0 port." newline bitfld.word 0x20 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route PWMn_OUT_TRIG1 signal to PWMn_MUX_TRIG1..,1: Route PWMn_B output to PWMn_MUX_TRIG1 port." newline bitfld.word 0x20 12. "TRGFRQ,Trigger Frequency" "0: Every period,1: Final period" newline hexmask.word.byte 0x20 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables" line.word 0x22 "SM3_DISMAP0,Submodule 3 Fault Disable Mapping" hexmask.word.byte 0x22 8.--11. 1. "DIS0X,PWMn_X Fault Disable Mask 0" newline hexmask.word.byte 0x22 4.--7. 1. "DIS0B,PWMn_B Fault Disable Mask 0" newline hexmask.word.byte 0x22 0.--3. 1. "DIS0A,PWMn_A Fault Disable Mask 0" line.word 0x24 "SM3_DISMAP1,Submodule 3 Fault Disable Mapping" hexmask.word.byte 0x24 8.--11. 1. "DIS1X,PWMn_X Fault Disable Mask 1" newline hexmask.word.byte 0x24 4.--7. 1. "DIS1B,PWMn_B Fault Disable Mask 1" newline hexmask.word.byte 0x24 0.--3. 1. "DIS1A,PWMn_A Fault Disable Mask 1" line.word 0x26 "SM3_DTCNT0,Submodule 3 Deadtime Count 0" hexmask.word 0x26 0.--15. 1. "DTCNT0,Deadtime Count 0" line.word 0x28 "SM3_DTCNT1,Submodule 3 Deadtime Count 1" hexmask.word 0x28 0.--15. 1. "DTCNT1,Deadtime Count 1" line.word 0x2A "SM3_CAPTCTRLA,Submodule 3 Capture Control A" rbitfld.word 0x2A 13.--15. "CA1CNT,Capture A1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2A 10.--12. "CA0CNT,Capture A0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2A 8.--9. "CFAWM,Capture A FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2A 7. "EDGCNTA_EN,Edge Counter A Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2A 6. "INP_SELA,Input Select A" "0: Raw PWMn_A input signal,1: Output of edge counter/compare." newline bitfld.word 0x2A 4.--5. "EDGA1,Edge A 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 2.--3. "EDGA0,Edge A 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2A 1. "ONESHOTA,One Shot Mode A" "0: Free-running,1: One-shot" newline bitfld.word 0x2A 0. "ARMA,Arm A" "0: Disarm input capture,1: Arm input capture as specified by the input edges" line.word 0x2C "SM3_CAPTCOMPA,Submodule 3 Capture Compare A" hexmask.word.byte 0x2C 8.--15. 1. "EDGCNTA,Edge Counter A" newline hexmask.word.byte 0x2C 0.--7. 1. "EDGCMPA,Edge Compare A" line.word 0x2E "SM3_CAPTCTRLB,Submodule 3 Capture Control B" rbitfld.word 0x2E 13.--15. "CB1CNT,Capture B1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x2E 10.--12. "CB0CNT,Capture B0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x2E 8.--9. "CFBWM,Capture B FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x2E 7. "EDGCNTB_EN,Edge Counter B Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x2E 6. "INP_SELB,Input Select B" "0: Raw PWMn_B input signal,1: Output of edge counter/compare" newline bitfld.word 0x2E 4.--5. "EDGB1,Edge B 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 2.--3. "EDGB0,Edge B 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x2E 1. "ONESHOTB,One Shot Mode B" "0: Free-running,1: One-shot" newline bitfld.word 0x2E 0. "ARMB,Arm B" "0: Disarm input capture,1: Arm input capture as specified by EDGBn" line.word 0x30 "SM3_CAPTCOMPB,Submodule 3 Capture Compare B" hexmask.word.byte 0x30 8.--15. 1. "EDGCNTB,Edge Counter B" newline hexmask.word.byte 0x30 0.--7. 1. "EDGCMPB,Edge Compare B" line.word 0x32 "SM3_CAPTCTRLX,Submodule 3 Capture Control X" rbitfld.word 0x32 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7" newline rbitfld.word 0x32 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7" newline bitfld.word 0x32 8.--9. "CFXWM,Capture X FIFOs Watermark" "0,1,2,3" newline bitfld.word 0x32 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Disable and hold in reset,1: Enable" newline bitfld.word 0x32 6. "INP_SELX,Input Select X" "0: Raw PWMn_X input signal,1: Output of edge counter/compare." newline bitfld.word 0x32 4.--5. "EDGX1,Edge X 1" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 2.--3. "EDGX0,Edge X 0" "0: Disable,1: Capture falling edges,2: Capture rising edges,3: Capture any edge" newline bitfld.word 0x32 1. "ONESHOTX,One Shot Mode X" "0: Free-running,1: One-shot" newline bitfld.word 0x32 0. "ARMX,Arm X" "0: Disarm input capture,1: Arm input capture as specified by EDGAn" line.word 0x34 "SM3_CAPTCOMPX,Submodule 3 Capture Compare X" hexmask.word.byte 0x34 8.--15. 1. "EDGCNTX,Edge Counter X" newline hexmask.word.byte 0x34 0.--7. 1. "EDGCMPX,Edge Compare X" rgroup.word 0x160++0x17 line.word 0x0 "SM3_CVAL0,Submodule 3 Capture Value 0" hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0" line.word 0x2 "SM3_CVAL0CYC,Submodule 3 Capture Value 0 Cycle" hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle" line.word 0x4 "SM3_CVAL1,Submodule 3 Capture Value 1" hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1" line.word 0x6 "SM3_CVAL1CYC,Submodule 3 Capture Value 1 Cycle" hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle" line.word 0x8 "SM3_CVAL2,Submodule 3 Capture Value 2" hexmask.word 0x8 0.--15. 1. "CAPTVAL2,Capture Value 2" line.word 0xA "SM3_CVAL2CYC,Submodule 3 Capture Value 2 Cycle" hexmask.word.byte 0xA 0.--3. 1. "CVAL2CYC,Capture Value 2 Cycle" line.word 0xC "SM3_CVAL3,Submodule 3 Capture Value 3" hexmask.word 0xC 0.--15. 1. "CAPTVAL3,Capture Value 3" line.word 0xE "SM3_CVAL3CYC,Submodule 3 Capture Value 3 Cycle" hexmask.word.byte 0xE 0.--3. 1. "CVAL3CYC,Capture Value 3 Cycle" line.word 0x10 "SM3_CVAL4,Submodule 3 Capture Value 4" hexmask.word 0x10 0.--15. 1. "CAPTVAL4,Capture Value 4" line.word 0x12 "SM3_CVAL4CYC,Submodule 3 Capture Value 4 Cycle" hexmask.word.byte 0x12 0.--3. 1. "CVAL4CYC,Capture Value 4 Cycle" line.word 0x14 "SM3_CVAL5,Submodule 3 Capture Value 5" hexmask.word 0x14 0.--15. 1. "CAPTVAL5,Capture Value 5" line.word 0x16 "SM3_CVAL5CYC,Submodule 3 Capture Value 5 Cycle" hexmask.word.byte 0x16 0.--3. 1. "CVAL5CYC,Capture Value 5 Cycle" group.word 0x178++0x1 line.word 0x0 "SM3_PHASEDLY,Submodule 3 Phase Delay" hexmask.word 0x0 0.--15. 1. "PHASEDLY,Phase Delay" group.word 0x180++0x15 line.word 0x0 "OUTEN,Output Enable" hexmask.word.byte 0x0 8.--11. 1. "PWMA_EN,PWMn_A Output Enables" newline hexmask.word.byte 0x0 4.--7. 1. "PWMB_EN,PWMn_B Output Enables" newline hexmask.word.byte 0x0 0.--3. 1. "PWMX_EN,PWMn_X Output Enables" line.word 0x2 "MASK,Mask" hexmask.word.byte 0x2 12.--15. 1. "UPDATE_MASK,Update Mask Bits Immediately" newline hexmask.word.byte 0x2 8.--11. 1. "MASKA,PWMn_A Masks" newline hexmask.word.byte 0x2 4.--7. 1. "MASKB,PWMn_B Masks" newline hexmask.word.byte 0x2 0.--3. 1. "MASKX,PWMn_X Masks" line.word 0x4 "SWCOUT,Software Controlled Output" bitfld.word 0x4 7. "SM3OUT23,Submodule 3 Software Controlled Output 23" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 6. "SM3OUT45,Submodule 3 Software Controlled Output 45" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 5. "SM2OUT23,Submodule 2 Software Controlled Output 23" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 4. "SM2OUT45,Submodule 2 Software Controlled Output 45" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 3. "SM1OUT23,Submodule 1 Software Controlled Output 23" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 2. "SM1OUT45,Submodule 1 Software Controlled Output 45" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 1. "SM0OUT23,Submodule 0 Software Controlled Output 23" "0: Logic 0,1: Logic 1" newline bitfld.word 0x4 0. "SM0OUT45,Submodule 0 Software Controlled Output 45" "0: Logic 0,1: Logic 1" line.word 0x6 "DTSRCSEL,PWM Source Select" bitfld.word 0x6 14.--15. "SM3SEL23,Submodule 3 PWM23 Control Select" "0: Generated SM3PWM23 signal,1: Inverted SM3PWM23 signal,2: Software control,3: PWM3_EXTA signal" newline bitfld.word 0x6 12.--13. "SM3SEL45,Submodule 3 PWM45 Control Select" "0: Generated SM3PWM45 signal,1: Inverted SM3PWM45 signal,2: Software control,3: PWM3_EXTB signal" newline bitfld.word 0x6 10.--11. "SM2SEL23,Submodule 2 PWM23 Control Select" "0: Generated SM2PWM23 signal,1: Inverted SM2PWM23 signal,2: Software control,3: PWM2_EXTA signal" newline bitfld.word 0x6 8.--9. "SM2SEL45,Submodule 2 PWM45 Control Select" "0: Generated SM2PWM45 signal,1: Inverted SM2PWM45 signal,2: Software control,3: PWM2_EXTB signal" newline bitfld.word 0x6 6.--7. "SM1SEL23,Submodule 1 PWM23 Control Select" "0: Generated SM1PWM23 signal,1: Inverted SM1PWM23 signal,2: Software control,3: PWM1_EXTA signal" newline bitfld.word 0x6 4.--5. "SM1SEL45,Submodule 1 PWM45 Control Select" "0: Generated SM1PWM45 signal,1: Inverted SM1PWM45 signal,2: Software control,3: PWM1_EXTB signal" newline bitfld.word 0x6 2.--3. "SM0SEL23,Submodule 0 PWM23 Control Select" "0: Generated SM0PWM23 signal,1: Inverted SM0PWM23 signal,2: Software control,3: PWM0_EXTA signal" newline bitfld.word 0x6 0.--1. "SM0SEL45,Submodule 0 PWM45 Control Select" "0: Generated SM0PWM45 signal,1: Inverted SM0PWM45 signal,2: Software control,3: PWM0_EXTB signal" line.word 0x8 "MCTRL,Master Control" hexmask.word.byte 0x8 12.--15. 1. "IPOL,Current Polarity" newline hexmask.word.byte 0x8 8.--11. 1. "RUN,Run" newline hexmask.word.byte 0x8 4.--7. 1. "CLDOK,Clear Load Okay" newline hexmask.word.byte 0x8 0.--3. 1. "LDOK,Load Okay" line.word 0xA "MCTRL2,Master Control 2" bitfld.word 0xA 0.--1. "MONPLL,Monitor PLL State" "0: PLL not locked do not monitor PLL operation. If..,1: PLL not locked monitor PLL operation. If the PLL..,2: PLL locked do not monitor PLL operation. If the..,3: PLL locked monitor PLL operation. If the PLL.." line.word 0xC "FP0_CTRL,Fault Protection 0 Control" hexmask.word.byte 0xC 12.--15. 1. "FLVL,Fault Level" newline hexmask.word.byte 0xC 8.--11. 1. "FAUTO,Automatic Fault Clearing" newline hexmask.word.byte 0xC 4.--7. 1. "FSAFE,Fault Safety Mode" newline hexmask.word.byte 0xC 0.--3. 1. "FIE,Fault Interrupt Enables" line.word 0xE "FP0_STS,Fault Protection 0 Status" hexmask.word.byte 0xE 12.--15. 1. "FHALF,Half-Period Fault Recovery" newline hexmask.word.byte 0xE 8.--11. 1. "FFPIN,Filtered Fault Pins" newline hexmask.word.byte 0xE 4.--7. 1. "FFULL,Full-Period Fault Recovery" newline hexmask.word.byte 0xE 0.--3. 1. "FFLAG,Fault Flags" line.word 0x10 "FP0_FILT,Fault Protection 0 Filter" bitfld.word 0x10 15. "GSTR,Fault Glitch Stretch Enable" "0: Disable,1: Enable" newline bitfld.word 0x10 8.--10. "FILT_CNT,Fault Filter Count" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x10 0.--7. 1. "FILT_PER,Fault Filter Period" line.word 0x12 "FP0_TST,Fault Protection 0 Test" bitfld.word 0x12 0. "FTEST,Fault Test" "0: No fault,1: Cause a simulated fault" line.word 0x14 "FP0_CTRL2,Fault Protection 0 Control 2" hexmask.word.byte 0x14 0.--3. 1. "NOCOMB,No Combinational Path" group.word 0x1B0++0x1 line.word 0x0 "DLLSR,DLL Status" eventfld.word 0x0 1. "LOL,Loss-Of-Lock flag" "0: No loss of lock detected,1: Loss of lock detected" newline rbitfld.word 0x0 0. "LOCK,Lock status" "0: Unlocked,1: Locked" group.word 0x1B8++0xF line.word 0x0 "SM0_BIST_CTRL,Submodule 0 BIST Control" bitfld.word 0x0 13.--15. "COUNTER_THRESHOLD,Counter Threshold" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 8.--12. 1. "CLK_FINAL,Clock Counter Final" newline bitfld.word 0x0 7. "MANUAL_TOGGLE,Manual Toggle Switch" "0: frac_test,1: frac_test_reverse" newline bitfld.word 0x0 6. "TOGGLE_MODE,Toggle Mode" "0: Automatic,1: Manual" newline hexmask.word.byte 0x0 1.--5. 1. "CLK_INITIAL,Initial Value for BIST CLK Counter" newline bitfld.word 0x0 0. "BIST_ENABLE,Enable BIST Logic" "0: Disables,1: Enables" line.word 0x2 "SM0_BIST_CTRL1,Submodule 0 BIST Control" hexmask.word.byte 0x2 8.--12. 1. "DATA_FINAL,Final Data Counter" newline hexmask.word.byte 0x2 0.--4. 1. "DATA_INITIAL,Initial Data Counter" line.word 0x4 "SM1_BIST_CTRL,Submodule 1 BIST Control" bitfld.word 0x4 13.--15. "COUNTER_THRESHOLD,Counter Threshold" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x4 8.--12. 1. "CLK_FINAL,Clock Counter Final" newline bitfld.word 0x4 7. "MANUAL_TOGGLE,Manual Toggle Switch" "0: frac_test,1: frac_test_reverse" newline bitfld.word 0x4 6. "TOGGLE_MODE,Toggle Mode" "0: Automatic,1: Manual" newline hexmask.word.byte 0x4 1.--5. 1. "CLK_INITIAL,Initial Value for BIST CLK Counter" newline bitfld.word 0x4 0. "BIST_ENABLE,Enable BIST Logic" "0: Disables,1: Enables" line.word 0x6 "SM1_BIST_CTRL1,Submodule 1 BIST Control" hexmask.word.byte 0x6 8.--12. 1. "DATA_FINAL,Final Data Counter" newline hexmask.word.byte 0x6 0.--4. 1. "DATA_INITIAL,Initial Data Counter" line.word 0x8 "SM2_BIST_CTRL,Submodule 2 BIST Control" bitfld.word 0x8 13.--15. "COUNTER_THRESHOLD,Counter Threshold" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x8 8.--12. 1. "CLK_FINAL,Clock Counter Final" newline bitfld.word 0x8 7. "MANUAL_TOGGLE,Manual Toggle Switch" "0: frac_test,1: frac_test_reverse" newline bitfld.word 0x8 6. "TOGGLE_MODE,Toggle Mode" "0: Automatic,1: Manual" newline hexmask.word.byte 0x8 1.--5. 1. "CLK_INITIAL,Initial Value for BIST CLK Counter" newline bitfld.word 0x8 0. "BIST_ENABLE,Enable BIST Logic" "0: Disables,1: Enables" line.word 0xA "SM2_BIST_CTRL1,Submodule 2 BIST Control" hexmask.word.byte 0xA 8.--12. 1. "DATA_FINAL,Final Data Counter" newline hexmask.word.byte 0xA 0.--4. 1. "DATA_INITIAL,Initial Data Counter" line.word 0xC "SM3_BIST_CTRL,Submodule 3 BIST Control" bitfld.word 0xC 13.--15. "COUNTER_THRESHOLD,Counter Threshold" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0xC 8.--12. 1. "CLK_FINAL,Clock Counter Final" newline bitfld.word 0xC 7. "MANUAL_TOGGLE,Manual Toggle Switch" "0: frac_test,1: frac_test_reverse" newline bitfld.word 0xC 6. "TOGGLE_MODE,Toggle Mode" "0: Automatic,1: Manual" newline hexmask.word.byte 0xC 1.--5. 1. "CLK_INITIAL,Initial Value for BIST CLK Counter" newline bitfld.word 0xC 0. "BIST_ENABLE,Enable BIST Logic" "0: Disables,1: Enables" line.word 0xE "SM3_BIST_CTRL1,Submodule 3 BIST Control" hexmask.word.byte 0xE 8.--12. 1. "DATA_FINAL,Final Data Counter" newline hexmask.word.byte 0xE 0.--4. 1. "DATA_INITIAL,Initial Data Counter" rgroup.word 0x1C8++0xF line.word 0x0 "SM0_BIST_STATUS,Submodule 0 BIST Status" hexmask.word.byte 0x0 8.--12. 1. "FAIL_CLK,Fail Clock" newline bitfld.word 0x0 1. "BIST_PASS,BIST Pass" "0: Fail,1: Pass" newline bitfld.word 0x0 0. "BIST_DONE,BIST Completion" "0,1" line.word 0x2 "SM0_BIST_STATUS1,Submodule 0 BIST Status" hexmask.word.byte 0x2 0.--4. 1. "FAIL_DATA,Fail Data" line.word 0x4 "SM1_BIST_STATUS,Submodule 1 BIST Status" hexmask.word.byte 0x4 8.--12. 1. "FAIL_CLK,Fail Clock" newline bitfld.word 0x4 1. "BIST_PASS,BIST Pass" "0: Fail,1: Pass" newline bitfld.word 0x4 0. "BIST_DONE,BIST Completion" "0,1" line.word 0x6 "SM1_BIST_STATUS1,Submodule 1 BIST Status" hexmask.word.byte 0x6 0.--4. 1. "FAIL_DATA,Fail Data" line.word 0x8 "SM2_BIST_STATUS,Submodule 2 BIST Status" hexmask.word.byte 0x8 8.--12. 1. "FAIL_CLK,Fail Clock" newline bitfld.word 0x8 1. "BIST_PASS,BIST Pass" "0: Fail,1: Pass" newline bitfld.word 0x8 0. "BIST_DONE,BIST Completion" "0,1" line.word 0xA "SM2_BIST_STATUS1,Submodule 2 BIST Status" hexmask.word.byte 0xA 0.--4. 1. "FAIL_DATA,Fail Data" line.word 0xC "SM3_BIST_STATUS,Submodule 3 BIST Status" hexmask.word.byte 0xC 8.--12. 1. "FAIL_CLK,Fail Clock" newline bitfld.word 0xC 1. "BIST_PASS,BIST Pass" "0: Fail,1: Pass" newline bitfld.word 0xC 0. "BIST_DONE,BIST Completion" "0,1" line.word 0xE "SM3_BIST_STATUS1,Submodule 3 BIST Status" hexmask.word.byte 0xE 0.--4. 1. "FAIL_DATA,Fail Data" tree.end tree.end tree "FXOSC (Fast External Crystal Oscillator)" base ad:0x402D4000 group.long 0x0++0x3 line.long 0x0 "CTRL,FXOSC Control Register" bitfld.long 0x0 31. "OSC_BYP,Oscillator bypass" "0: Internal oscillator not bypassed,1: Internal oscillator bypassed" bitfld.long 0x0 24. "COMP_EN,Comparator enable" "0: Comparator disabled,1: Comparator enabled" hexmask.long.byte 0x0 16.--23. 1. "EOCV,End of count value" newline hexmask.long.byte 0x0 4.--7. 1. "GM_SEL,Crystal overdrive protection" bitfld.long 0x0 2. "ALC_D,Automatic level controller enable" "0: Enables automatic level controller,1: Disables automatic level controller" bitfld.long 0x0 0. "OSCON,Crystal oscillator power-down control" "0: Disables FXOSC,1: Enables FXOSC" rgroup.long 0x4++0x3 line.long 0x0 "STAT,Oscillator Status Register" bitfld.long 0x0 31. "OSC_STAT,Crystal oscillator status" "0: Crystal oscillator is off or on but not stable.,1: Crystal oscillator is on and providing a stable.." tree.end tree "IGF (Input Glitch Filter)" base ad:0x406B0000 group.long 0x0++0x7 line.long 0x0 "MCR0,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR0,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x10++0x3 line.long 0x0 "PRESR0,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x1C++0x7 line.long 0x0 "RTHR0,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR0,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x40++0x7 line.long 0x0 "MCR1,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR1,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x50++0x3 line.long 0x0 "PRESR1,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x5C++0x7 line.long 0x0 "RTHR1,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR1,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x80++0x7 line.long 0x0 "MCR2,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR2,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x90++0x3 line.long 0x0 "PRESR2,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x9C++0x7 line.long 0x0 "RTHR2,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR2,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0xC0++0x7 line.long 0x0 "MCR3,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR3,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0xD0++0x3 line.long 0x0 "PRESR3,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0xDC++0x7 line.long 0x0 "RTHR3,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR3,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x100++0x7 line.long 0x0 "MCR4,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR4,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x110++0x3 line.long 0x0 "PRESR4,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x11C++0x7 line.long 0x0 "RTHR4,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR4,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x140++0x7 line.long 0x0 "MCR5,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR5,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x150++0x3 line.long 0x0 "PRESR5,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x15C++0x7 line.long 0x0 "RTHR5,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR5,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x180++0x7 line.long 0x0 "MCR6,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR6,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x190++0x3 line.long 0x0 "PRESR6,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x19C++0x7 line.long 0x0 "RTHR6,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR6,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x1C0++0x7 line.long 0x0 "MCR7,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR7,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x1D0++0x3 line.long 0x0 "PRESR7,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x1DC++0x7 line.long 0x0 "RTHR7,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR7,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x200++0x7 line.long 0x0 "MCR8,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR8,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x210++0x3 line.long 0x0 "PRESR8,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x21C++0x7 line.long 0x0 "RTHR8,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR8,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x240++0x7 line.long 0x0 "MCR9,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR9,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x250++0x3 line.long 0x0 "PRESR9,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x25C++0x7 line.long 0x0 "RTHR9,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR9,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x280++0x7 line.long 0x0 "MCR10,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR10,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x290++0x3 line.long 0x0 "PRESR10,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x29C++0x7 line.long 0x0 "RTHR10,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR10,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x2C0++0x7 line.long 0x0 "MCR11,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR11,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x2D0++0x3 line.long 0x0 "PRESR11,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x2DC++0x7 line.long 0x0 "RTHR11,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR11,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x300++0x7 line.long 0x0 "MCR12,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR12,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x310++0x3 line.long 0x0 "PRESR12,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x31C++0x7 line.long 0x0 "RTHR12,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR12,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x340++0x7 line.long 0x0 "MCR13,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR13,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x350++0x3 line.long 0x0 "PRESR13,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x35C++0x7 line.long 0x0 "RTHR13,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR13,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x380++0x7 line.long 0x0 "MCR14,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR14,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x390++0x3 line.long 0x0 "PRESR14,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x39C++0x7 line.long 0x0 "RTHR14,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR14,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x3C0++0x7 line.long 0x0 "MCR15,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR15,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x3D0++0x3 line.long 0x0 "PRESR15,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x3DC++0x7 line.long 0x0 "RTHR15,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR15,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x400++0x7 line.long 0x0 "MCR16,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR16,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x410++0x3 line.long 0x0 "PRESR16,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x41C++0x7 line.long 0x0 "RTHR16,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR16,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x440++0x7 line.long 0x0 "MCR17,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR17,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x450++0x3 line.long 0x0 "PRESR17,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x45C++0x7 line.long 0x0 "RTHR17,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR17,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x480++0x7 line.long 0x0 "MCR18,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR18,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x490++0x3 line.long 0x0 "PRESR18,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x49C++0x7 line.long 0x0 "RTHR18,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR18,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x4C0++0x7 line.long 0x0 "MCR19,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR19,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x4D0++0x3 line.long 0x0 "PRESR19,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x4DC++0x7 line.long 0x0 "RTHR19,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR19,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x500++0x7 line.long 0x0 "MCR20,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR20,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x510++0x3 line.long 0x0 "PRESR20,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x51C++0x7 line.long 0x0 "RTHR20,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR20,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x540++0x7 line.long 0x0 "MCR21,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR21,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x550++0x3 line.long 0x0 "PRESR21,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x55C++0x7 line.long 0x0 "RTHR21,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR21,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x580++0x7 line.long 0x0 "MCR22,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR22,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x590++0x3 line.long 0x0 "PRESR22,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x59C++0x7 line.long 0x0 "RTHR22,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR22,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x5C0++0x7 line.long 0x0 "MCR23,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR23,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x5D0++0x3 line.long 0x0 "PRESR23,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x5DC++0x7 line.long 0x0 "RTHR23,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR23,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x600++0x7 line.long 0x0 "MCR24,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR24,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x610++0x3 line.long 0x0 "PRESR24,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x61C++0x7 line.long 0x0 "RTHR24,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR24,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x640++0x7 line.long 0x0 "MCR25,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR25,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x650++0x3 line.long 0x0 "PRESR25,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x65C++0x7 line.long 0x0 "RTHR25,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR25,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x680++0x7 line.long 0x0 "MCR26,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR26,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x690++0x3 line.long 0x0 "PRESR26,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x69C++0x7 line.long 0x0 "RTHR26,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR26,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x6C0++0x7 line.long 0x0 "MCR27,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR27,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x6D0++0x3 line.long 0x0 "PRESR27,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x6DC++0x7 line.long 0x0 "RTHR27,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR27,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x700++0x7 line.long 0x0 "MCR28,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR28,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x710++0x3 line.long 0x0 "PRESR28,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x71C++0x7 line.long 0x0 "RTHR28,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR28,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x740++0x7 line.long 0x0 "MCR29,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR29,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x750++0x3 line.long 0x0 "PRESR29,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x75C++0x7 line.long 0x0 "RTHR29,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR29,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x780++0x7 line.long 0x0 "MCR30,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR30,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x790++0x3 line.long 0x0 "PRESR30,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x79C++0x7 line.long 0x0 "RTHR30,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR30,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" group.long 0x7C0++0x7 line.long 0x0 "MCR31,Module Configuration Register" bitfld.long 0x0 30. "MDIS,Module Disable" "0: Input Glitch Filter is not in low power mode due..,1: Input Glitch Filter is in low power mode" bitfld.long 0x0 29. "FRZ,Freeze bit for debug operation" "0: Freeze mode disabled,1: Freeze mode enabled" newline bitfld.long 0x0 28. "FBP,Force Bypass" "0: no filter bypass,1: transfer input signal value to the filter output" bitfld.long 0x0 27. "FOH,Force filter output high" "0: no action,1: forces the filter output to '1'" newline bitfld.long 0x0 26. "FOL,Force filter output low" "0: no action,1: forces the filter output to '0'" bitfld.long 0x0 9. "IMM,Immediate edge propagation control bit" "0: edge propagation depends on prescaler,1: edge propagation within three system clock cycles" newline bitfld.long 0x0 8. "PSSEL,Prescaler selection bit" "0: Internal prescaler selected,1: external prescaler selected" bitfld.long 0x0 7. "POL,Output polarity bit" "0: not inverted output,1: inverted output" newline bitfld.long 0x0 6. "FGEN,Filter global enable" "0: filter is disabled: filter output keeps current..,1: filter is enabled: filtering is applied to.." bitfld.long 0x0 3.--5. "FFM,Falling edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" newline bitfld.long 0x0 0.--2. "RFM,Rising edge filter type selection" "0: bypass: edge is propagated to filter output..,1: windowing: windowing filter is selected for the..,2: integrating: integrating filter is selected for..,3: integrating-hold: integrating-hold filter is..,4: windowing with post sample: windowing filter..,?,?,?" line.long 0x4 "MSR31,Module Status Register" eventfld.long 0x4 5. "WEDGE,Filter is active waiting for an edge" "0: Input Glitch Filter is disabled or the internal..,1: Input Glitch Filter is waiting for an edge" eventfld.long 0x4 4. "FEDGE,Filter is active processing an edge" "0: Input Glitch Filter internal counter is not active,1: Input Glitch Filter internal counter is active" newline eventfld.long 0x4 3. "RNDET,Rise noise detected bit" "0: noise was not detected,1: noise was detected after a rising edge" eventfld.long 0x4 2. "FNDET,Fall noise detected bit" "0: noise was not detected,1: noise was detected after a falling edge" newline rbitfld.long 0x4 1. "FLI,Filter input" "0,1" rbitfld.long 0x4 0. "FLO,Filter output" "0,1" group.long 0x7D0++0x3 line.long 0x0 "PRESR31,Prescaler Register" hexmask.long.byte 0x0 0.--5. 1. "FPRE,Filter prescaler" group.long 0x7DC++0x7 line.long 0x0 "RTHR31,Rising edge Threshold Register" hexmask.long.byte 0x0 0.--5. 1. "RTH,Rising edge threshold" line.long 0x4 "FTHR31,Falling edge Threshold Register" hexmask.long.byte 0x4 0.--5. 1. "FTH,Falling edge threshold" tree.end tree "INTM (Interrupt Monitor)" base ad:0x4027C000 group.long 0x0++0x3 line.long 0x0 "INTM_MM,Monitor Mode" bitfld.long 0x0 0. "MM,Monitor Mode" "0: Disable,1: Enable" wgroup.long 0x4++0x3 line.long 0x0 "INTM_IACK,Interrupt Acknowledge" hexmask.long.word 0x0 0.--9. 1. "IRQ,Interrupt Request" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x4027C008 ad:0x4027C018 ad:0x4027C028 ad:0x4027C038) tree "mon[$1]" base $2 group.long ($2)++0xB line.long 0x0 "INTM_IRQSEL,Interrupt Request Select for Monitor mon_index" hexmask.long.word 0x0 0.--9. 1. "IRQ,Interrupt Request" line.long 0x4 "INTM_LATENCY,Interrupt Latency for Monitor mon_index" hexmask.long.tbyte 0x4 0.--23. 1. "LAT,Latency" line.long 0x8 "INTM_TIMER,Timer for Monitor mon_index" hexmask.long.tbyte 0x8 0.--23. 1. "TIMER,Timer" rgroup.long ($2+0xC)++0x3 line.long 0x0 "INTM_STATUS,Status for Monitor mon_index" bitfld.long 0x0 0. "STATUS,Monitor status" "0: Did not exceed,1: Exceeded" tree.end repeat.end tree.end tree "JDC (JTAG Data Communication)" base ad:0x40394000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 16. "JIN_IEN,JIN Interrupt Enable" "0: Setting MSR[JIN_INT] bit does not assert the JIN..,1: Setting MSR[JIN_INT] bit asserts the JIN interrupt" bitfld.long 0x0 0. "JOUT_IEN,JOUT Interrupt Enable" "0: Setting MSR[JOUT_INT] bit does not assert the..,1: Setting MSR[JOUT_INT] bit asserts the JOUT.." line.long 0x4 "MSR,Module Status Register" rbitfld.long 0x4 18. "JIN_RDY,JIN Ready (read only)" "0: Cleared upon software read of JIN_IPS contents..,1: Set when new data is written to the JIN_IPS.." eventfld.long 0x4 16. "JIN_INT,JIN Interrupt" "0: Cleared by writing logic 1,1: Set when new data is written to the JIN_IPS.." newline rbitfld.long 0x4 2. "JOUT_RDY,JOUT Ready (read only)" "0: Cleared upon tool read of JOUT register via JTAG..,1: Set when new data is written to the JOUT_IPS.." eventfld.long 0x4 0. "JOUT_INT,JOUT Interrupt" "0: Cleared by writing logic 1,1: Set when JOUT_RDY bit is cleared by tool reading.." line.long 0x8 "JOUT_IPS,JTAG Output Data Register" hexmask.long 0x8 0.--31. 1. "Data,JOUT_IPS Data" rgroup.long 0xC++0x3 line.long 0x0 "JIN_IPS,JTAG Input Data Register" hexmask.long 0x0 0.--31. 1. "Data,JIN_IPS data" tree.end tree "LCU (Logic Control Unit)" base ad:0x0 tree "LCU_0" base ad:0x40098000 repeat 3. (list 0x0 0x1 0x2)(list ad:0x40098000 ad:0x40098040 ad:0x40098080) tree "LC[$1]" base $2 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "LC_LUTCTRL$1,LC n Output m LUT Control" hexmask.long.word 0x0 0.--15. 1. "LUTCTRL,LUT Control" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "LC_FILT$1,LC n Output m Filter" hexmask.long.word 0x0 16.--31. 1. "LUT_RISE_FILT,Rise Filter" hexmask.long.word 0x0 0.--15. 1. "LUT_FALL_FILT,Fall Filter" repeat.end group.long ($2+0x20)++0x17 line.long 0x0 "LC_INTDMAEN,LC n Interrupt and DMA Enable" hexmask.long.byte 0x0 24.--27. 1. "FORCE_DMA_EN,Force DMA Enable" hexmask.long.byte 0x0 16.--19. 1. "FORCE_INT_EN,Force Interrupt Enable" newline hexmask.long.byte 0x0 8.--11. 1. "LUT_DMA_EN,LUT DMA Enable" hexmask.long.byte 0x0 0.--3. 1. "LUT_INT_EN,LUT Interrupt Enable" line.long 0x4 "LC_STS,LC n Status" hexmask.long.byte 0x4 8.--11. 1. "FORCESTS,Force Event" hexmask.long.byte 0x4 0.--3. 1. "LUT_STS,LUT Event" line.long 0x8 "LC_OUTPOL,LC n Output Polarity Control" hexmask.long.byte 0x8 0.--3. 1. "OUTPOL,Output Polarity" line.long 0xC "LC_FFILT,LC n Force Filter" hexmask.long.byte 0xC 28.--31. 1. "COMB_FORCE,Combined Sensed Force Input" hexmask.long.byte 0xC 24.--27. 1. "COMB_EN,Combinational Force Path (CFP) Enable" newline hexmask.long.byte 0xC 16.--19. 1. "FORCE_POL,Force Input Polarity" hexmask.long.byte 0xC 0.--7. 1. "FORCE_FILT,Force Filter" line.long 0x10 "LC_FCTRL,LC n Force Control" bitfld.long 0x10 30.--31. "SYNC_SEL3,Sync Select" "0: Sync input 0,1: Sync input 1,?,?" bitfld.long 0x10 28.--29. "FORCE_MODE3,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion" newline hexmask.long.byte 0x10 24.--27. 1. "FORCE_SENSE3,Force Input Sensitivity" bitfld.long 0x10 22.--23. "SYNC_SEL2,Sync Select" "0: Sync input 0,1: Sync input 1,?,?" newline bitfld.long 0x10 20.--21. "FORCE_MODE2,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion" hexmask.long.byte 0x10 16.--19. 1. "FORCE_SENSE2,Force Input Sensitivity" newline bitfld.long 0x10 14.--15. "SYNC_SEL1,Sync Select" "0: Sync input 0,1: Sync input 1,?,?" bitfld.long 0x10 12.--13. "FORCE_MODE1,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion" newline hexmask.long.byte 0x10 8.--11. 1. "FORCE_SENSE1,Force Input Sensitivity" bitfld.long 0x10 6.--7. "SYNC_SEL0,Sync Select" "0: Sync input 0,1: Sync input 1,?,?" newline bitfld.long 0x10 4.--5. "FORCE_MODE0,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion" hexmask.long.byte 0x10 0.--3. 1. "FORCE_SENSE0,Force Input Sensitivity" line.long 0x14 "LC_SCTRL,LC n Sync Control" bitfld.long 0x14 8. "SW_SYNC_SEL,Software Sync Select" "0: Sync input 0,1: Sync input 1" hexmask.long.byte 0x14 0.--3. 1. "SW_MODE,Software Sync Mode" tree.end repeat.end base ad:0x40098000 newline repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "MUXSEL[$1],Mux Select" hexmask.long.byte 0x0 0.--7. 1. "MUXSEL,Mux Select" repeat.end group.long 0x280++0xF line.long 0x0 "CFG,Configuration" hexmask.long.byte 0x0 24.--31. 1. "NUM_LOGIC_CELLS,LCs" hexmask.long.byte 0x0 16.--23. 1. "NUM_FORCES,Force Inputs" hexmask.long.byte 0x0 8.--15. 1. "NUM_SYNCS,Sync Inputs" rbitfld.long 0x0 7. "INCL_MUXES,Input Muxing" "0: Not supported,1: Supported" newline bitfld.long 0x0 0. "WP,Write Protect" "0: No effect,1: Turn on write protection" line.long 0x4 "SWEN,Software Override Enable" hexmask.long.word 0x4 0.--11. 1. "SWEN,Software Override Enable" line.long 0x8 "SWVALUE,Software Override Value" hexmask.long.word 0x8 0.--11. 1. "SWVALUE,Software Override Value" line.long 0xC "OUTEN,Output Enable" hexmask.long.word 0xC 0.--11. 1. "OUTEN,Output Enables" rgroup.long 0x290++0xF line.long 0x0 "LCIN,Logic Inputs" hexmask.long.word 0x0 0.--11. 1. "LC_INPUTS,Logic Inputs" line.long 0x4 "SWOUT,Overridden Inputs" hexmask.long.word 0x4 0.--11. 1. "SWOUT,Overridden Inputs" line.long 0x8 "LCOUT,Logic Outputs" hexmask.long.word 0x8 0.--11. 1. "LCOUT,Logic Outputs" line.long 0xC "FORCEOUT,Forced Outputs" hexmask.long.word 0xC 0.--11. 1. "FORCEOUT,Forced Outputs" group.long 0x2A0++0x3 line.long 0x0 "FORCESTS,Force Status" hexmask.long.word 0x0 0.--11. 1. "FORCESTS,Force Status" group.long 0x2A8++0x3 line.long 0x0 "DBGEN,Debug Mode Enable" hexmask.long.word 0x0 0.--11. 1. "DBGEN,Debug Mode Enable" tree.end tree "LCU_1" base ad:0x4009C000 repeat 3. (list 0x0 0x1 0x2)(list ad:0x4009C000 ad:0x4009C040 ad:0x4009C080) tree "LC[$1]" base $2 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "LC_LUTCTRL$1,LC n Output m LUT Control" hexmask.long.word 0x0 0.--15. 1. "LUTCTRL,LUT Control" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "LC_FILT$1,LC n Output m Filter" hexmask.long.word 0x0 16.--31. 1. "LUT_RISE_FILT,Rise Filter" hexmask.long.word 0x0 0.--15. 1. "LUT_FALL_FILT,Fall Filter" repeat.end group.long ($2+0x20)++0x17 line.long 0x0 "LC_INTDMAEN,LC n Interrupt and DMA Enable" hexmask.long.byte 0x0 24.--27. 1. "FORCE_DMA_EN,Force DMA Enable" hexmask.long.byte 0x0 16.--19. 1. "FORCE_INT_EN,Force Interrupt Enable" newline hexmask.long.byte 0x0 8.--11. 1. "LUT_DMA_EN,LUT DMA Enable" hexmask.long.byte 0x0 0.--3. 1. "LUT_INT_EN,LUT Interrupt Enable" line.long 0x4 "LC_STS,LC n Status" hexmask.long.byte 0x4 8.--11. 1. "FORCESTS,Force Event" hexmask.long.byte 0x4 0.--3. 1. "LUT_STS,LUT Event" line.long 0x8 "LC_OUTPOL,LC n Output Polarity Control" hexmask.long.byte 0x8 0.--3. 1. "OUTPOL,Output Polarity" line.long 0xC "LC_FFILT,LC n Force Filter" hexmask.long.byte 0xC 28.--31. 1. "COMB_FORCE,Combined Sensed Force Input" hexmask.long.byte 0xC 24.--27. 1. "COMB_EN,Combinational Force Path (CFP) Enable" newline hexmask.long.byte 0xC 16.--19. 1. "FORCE_POL,Force Input Polarity" hexmask.long.byte 0xC 0.--7. 1. "FORCE_FILT,Force Filter" line.long 0x10 "LC_FCTRL,LC n Force Control" bitfld.long 0x10 30.--31. "SYNC_SEL3,Sync Select" "0: Sync input 0,1: Sync input 1,?,?" bitfld.long 0x10 28.--29. "FORCE_MODE3,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion" newline hexmask.long.byte 0x10 24.--27. 1. "FORCE_SENSE3,Force Input Sensitivity" bitfld.long 0x10 22.--23. "SYNC_SEL2,Sync Select" "0: Sync input 0,1: Sync input 1,?,?" newline bitfld.long 0x10 20.--21. "FORCE_MODE2,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion" hexmask.long.byte 0x10 16.--19. 1. "FORCE_SENSE2,Force Input Sensitivity" newline bitfld.long 0x10 14.--15. "SYNC_SEL1,Sync Select" "0: Sync input 0,1: Sync input 1,?,?" bitfld.long 0x10 12.--13. "FORCE_MODE1,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion" newline hexmask.long.byte 0x10 8.--11. 1. "FORCE_SENSE1,Force Input Sensitivity" bitfld.long 0x10 6.--7. "SYNC_SEL0,Sync Select" "0: Sync input 0,1: Sync input 1,?,?" newline bitfld.long 0x10 4.--5. "FORCE_MODE0,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion" hexmask.long.byte 0x10 0.--3. 1. "FORCE_SENSE0,Force Input Sensitivity" line.long 0x14 "LC_SCTRL,LC n Sync Control" bitfld.long 0x14 8. "SW_SYNC_SEL,Software Sync Select" "0: Sync input 0,1: Sync input 1" hexmask.long.byte 0x14 0.--3. 1. "SW_MODE,Software Sync Mode" tree.end repeat.end base ad:0x4009C000 newline repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "MUXSEL[$1],Mux Select" hexmask.long.byte 0x0 0.--7. 1. "MUXSEL,Mux Select" repeat.end group.long 0x280++0xF line.long 0x0 "CFG,Configuration" hexmask.long.byte 0x0 24.--31. 1. "NUM_LOGIC_CELLS,LCs" hexmask.long.byte 0x0 16.--23. 1. "NUM_FORCES,Force Inputs" hexmask.long.byte 0x0 8.--15. 1. "NUM_SYNCS,Sync Inputs" rbitfld.long 0x0 7. "INCL_MUXES,Input Muxing" "0: Not supported,1: Supported" newline bitfld.long 0x0 0. "WP,Write Protect" "0: No effect,1: Turn on write protection" line.long 0x4 "SWEN,Software Override Enable" hexmask.long.word 0x4 0.--11. 1. "SWEN,Software Override Enable" line.long 0x8 "SWVALUE,Software Override Value" hexmask.long.word 0x8 0.--11. 1. "SWVALUE,Software Override Value" line.long 0xC "OUTEN,Output Enable" hexmask.long.word 0xC 0.--11. 1. "OUTEN,Output Enables" rgroup.long 0x290++0xF line.long 0x0 "LCIN,Logic Inputs" hexmask.long.word 0x0 0.--11. 1. "LC_INPUTS,Logic Inputs" line.long 0x4 "SWOUT,Overridden Inputs" hexmask.long.word 0x4 0.--11. 1. "SWOUT,Overridden Inputs" line.long 0x8 "LCOUT,Logic Outputs" hexmask.long.word 0x8 0.--11. 1. "LCOUT,Logic Outputs" line.long 0xC "FORCEOUT,Forced Outputs" hexmask.long.word 0xC 0.--11. 1. "FORCEOUT,Forced Outputs" group.long 0x2A0++0x3 line.long 0x0 "FORCESTS,Force Status" hexmask.long.word 0x0 0.--11. 1. "FORCESTS,Force Status" group.long 0x2A8++0x3 line.long 0x0 "DBGEN,Debug Mode Enable" hexmask.long.word 0x0 0.--11. 1. "DBGEN,Debug Mode Enable" tree.end tree.end tree "LPCMP (Low Power Comparator)" base ad:0x0 tree "LPCMP_0" base ad:0x40370000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 0.--3. 1. "DAC_RES,DAC Resolution" group.long 0x8++0xB line.long 0x0 "CCR0,Comparator Control Register 0" bitfld.long 0x0 1. "CMP_STOP_EN,Comparator STANDBY Mode Enable" "0: Disable the analog comparator regardless of..,1: Allows CMP_EN to enable the analog comparator." bitfld.long 0x0 0. "CMP_EN,Comparator Enable" "0: Disables (The analog logic remains off and..,1: Enables" line.long 0x4 "CCR1,Comparator Control Register 1" hexmask.long.byte 0x4 24.--31. 1. "FILT_PER,Filter Sample Period" bitfld.long 0x4 16.--18. "FILT_CNT,Filter Sample Count" "0: Filter is bypassed: COUT = COUTA,1: 1 consecutive sample (Comparator output is..,2: 2 consecutive samples,3: 3 consecutive samples,4: 4 consecutive samples,5: 5 consecutive samples,6: 6 consecutive samples,7: 7 consecutive samples" newline bitfld.long 0x4 10.--11. "EVT_SEL,CMPO Event Select" "0: Both edges,1: Falling edge,2: Both edges,3: Both edges" bitfld.long 0x4 9. "WINDOW_CLS,CMPO Event Window Close" "0: CMPO event cannot close the window,1: CMPO event can close the window" newline bitfld.long 0x4 8. "WINDOW_INV,WINDOW/SAMPLE Signal Invert" "0: Do not invert,1: Invert" bitfld.long 0x4 7. "COUTA_OW,COUTA Output Level for Closed Window" "0: COUTA is 0,1: COUTA is 1" newline bitfld.long 0x4 6. "COUTA_OWEN,COUTA_OW Enable" "0: COUTA holds the last sampled value.,1: Enables the COUTA signal value to be defined by.." bitfld.long 0x4 5. "COUT_PEN,Comparator Output Pin Enable" "0: Not available,1: Available" newline bitfld.long 0x4 4. "COUT_SEL,Comparator Output Select" "0: Use COUT (filtered),1: Use COUTA (unfiltered)" bitfld.long 0x4 3. "COUT_INV,Comparator Invert" "0: Do not invert,1: Invert" newline bitfld.long 0x4 2. "DMA_EN,DMA Enable" "0: Disables,1: Enables" bitfld.long 0x4 1. "SAMPLE_EN,Sampling Enable" "0: Disables,1: Enables" newline bitfld.long 0x4 0. "WINDOW_EN,Windowing Enable" "0: Disables,1: Enables" line.long 0x8 "CCR2,Comparator Control Register 2" bitfld.long 0x8 28.--29. "INMSEL,Input Minus Select" "0: IN0: from the 8-bit DAC output,1: IN1: from the analog 8-1 mux,?,?" bitfld.long 0x8 24.--25. "INPSEL,Input Plus Select" "0: IN0: from the 8-bit DAC output,1: IN1: from the analog 8-1 mux,?,?" newline bitfld.long 0x8 20.--22. "MSEL,Minus Input MUX Select" "0: Input channel 0,1: Input channel 1,2: Input channel 2,3: Input channel 3,4: Input channel 4,5: Input channel 5,6: Input channel 6,7: Input channel 7" bitfld.long 0x8 16.--18. "PSEL,Plus Input MUX Select" "0: Input channel 0,1: Input channel 1,2: Input channel 2,3: Input channel 3,4: Input channel 4,5: Input channel 5,6: Input channel 6,7: Input channel 7" newline bitfld.long 0x8 4.--5. "HYSTCTR,Comparator Hysteresis Control" "0: Level 0,1: Level 1,2: Level 2,3: Level 3" bitfld.long 0x8 2. "OFFSET,Comparator Offset Control" "0: Level 0: The hysteresis selected by HYSTCTR is..,1: Level 1: Hysteresis does not apply when INP.." newline bitfld.long 0x8 0. "CMP_HPMD,CMP High Power Mode Select" "0: Low power (speed) comparison mode,1: High power (speed) comparison mode" group.long 0x18++0x1B line.long 0x0 "DCR,DAC Control" hexmask.long.byte 0x0 16.--23. 1. "DAC_DATA,DAC Output Voltage Select" bitfld.long 0x0 8. "VRSEL,DAC Reference High Voltage Source Select" "0: vrefh0,1: vrefh1" newline bitfld.long 0x0 1. "DAC_HPMD,DAC High Power Mode Select" "0: Disables,1: Enables" bitfld.long 0x0 0. "DAC_EN,DAC Enable" "0: Disables,1: Enables" line.long 0x4 "IER,Interrupt Enable" bitfld.long 0x4 2. "RRF_IE,Round-Robin Flag Interrupt Enable" "0: Disables the round-robin flag interrupt.,1: Enables the round-robin flag interrupt when the.." bitfld.long 0x4 1. "CFF_IE,Comparator Flag Falling Interrupt Enable" "0: Disables the comparator flag falling interrupt.,1: Enables the comparator flag falling interrupt.." newline bitfld.long 0x4 0. "CFR_IE,Comparator Flag Rising Interrupt Enable" "0: Disables the comparator flag rising interrupt.,1: Enables the comparator flag rising interrupt.." line.long 0x8 "CSR,Comparator Status" rbitfld.long 0x8 8. "COUT,Analog Comparator Output" "0,1" eventfld.long 0x8 2. "RRF,Round-Robin Flag" "0: Not detected,1: Detected" newline eventfld.long 0x8 1. "CFF,Analog Comparator Flag Falling" "0: Not detected,1: Detected" eventfld.long 0x8 0. "CFR,Analog Comparator Flag Rising" "0: Not detected,1: Detected" line.long 0xC "RRCR0,Round Robin Control Register 0" hexmask.long.byte 0xC 16.--21. 1. "RR_INITMOD,Initialization Delay Modulus" bitfld.long 0xC 8.--9. "RR_NSAM,Number of Sample Clocks" "0: 0 clock,1: 1 clock,2: 2 clocks,3: 3 clocks" newline bitfld.long 0xC 0. "RR_EN,Round-Robin Enable" "0: Disables,1: Enables" line.long 0x10 "RRCR1,Round Robin Control Register 1" bitfld.long 0x10 20.--22. "FIXCH,Fixed Channel Select" "0: Channel 0,1: Channel 1,2: Channel 2,3: Channel 3,4: Channel 4,5: Channel 5,6: Channel 6,7: Channel 7" bitfld.long 0x10 16. "FIXP,Fixed Port" "0: Fix the plus port. Sweep only the inputs to the..,1: Fix the minus port. Sweep only the inputs to the.." newline bitfld.long 0x10 7. "RR_CH7EN,Channel 7 Input Enable in Trigger Mode" "0: Disables,1: Enables" bitfld.long 0x10 6. "RR_CH6EN,Channel 6 Input Enable in Trigger Mode" "0: Disables,1: Enables" newline bitfld.long 0x10 5. "RR_CH5EN,Channel 5 Input Enable in Trigger Mode" "0: Disables,1: Enables" bitfld.long 0x10 4. "RR_CH4EN,Channel 4 Input Enable in Trigger Mode" "0: Disables,1: Enables" newline bitfld.long 0x10 3. "RR_CH3EN,Channel 3 Input Enable in Trigger Mode" "0: Disables,1: Enables" bitfld.long 0x10 2. "RR_CH2EN,Channel 2 Input Enable in Trigger Mode" "0: Disables,1: Enables" newline bitfld.long 0x10 1. "RR_CH1EN,Channel 1 Input Enable in Trigger Mode" "0: Disables,1: Enables" bitfld.long 0x10 0. "RR_CH0EN,Channel 0 Input Enable in Trigger Mode" "0: Disables,1: Enables" line.long 0x14 "RRCSR,Round Robin Control and Status" bitfld.long 0x14 7. "RR_CH7OUT,Comparison Result for Channel 7" "0,1" bitfld.long 0x14 6. "RR_CH6OUT,Comparison Result for Channel 6" "0,1" newline bitfld.long 0x14 5. "RR_CH5OUT,Comparison Result for Channel 5" "0,1" bitfld.long 0x14 4. "RR_CH4OUT,Comparison Result for Channel 4" "0,1" newline bitfld.long 0x14 3. "RR_CH3OUT,Comparison Result for Channel 3" "0,1" bitfld.long 0x14 2. "RR_CH2OUT,Comparison Result for Channel 2" "0,1" newline bitfld.long 0x14 1. "RR_CH1OUT,Comparison Result for Channel 1" "0,1" bitfld.long 0x14 0. "RR_CH0OUT,Comparison Result for Channel 0" "0,1" line.long 0x18 "RRSR,Round Robin Status" eventfld.long 0x18 7. "RR_CH7F,Channel 7 Input Changed Flag" "0: Not different,1: Different" eventfld.long 0x18 6. "RR_CH6F,Channel 6 Input Changed Flag" "0: Not different,1: Different" newline eventfld.long 0x18 5. "RR_CH5F,Channel 5 Input Changed Flag" "0: Not different,1: Different" eventfld.long 0x18 4. "RR_CH4F,Channel 4 Input Changed Flag" "0: Not different,1: Different" newline eventfld.long 0x18 3. "RR_CH3F,Channel 3 Input Changed Flag" "0: Not different,1: Different" eventfld.long 0x18 2. "RR_CH2F,Channel 2 Input Changed Flag" "0: Not different,1: Different" newline eventfld.long 0x18 1. "RR_CH1F,Channel 1 Input Changed Flag" "0: Not different,1: Different" eventfld.long 0x18 0. "RR_CH0F,Channel 0 Input Changed Flag" "0: Not different,1: Different" tree.end tree "LPCMP_1" base ad:0x40374000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 0.--3. 1. "DAC_RES,DAC Resolution" group.long 0x8++0xB line.long 0x0 "CCR0,Comparator Control Register 0" bitfld.long 0x0 1. "CMP_STOP_EN,Comparator STANDBY Mode Enable" "0: Disable the analog comparator regardless of..,1: Allows CMP_EN to enable the analog comparator." bitfld.long 0x0 0. "CMP_EN,Comparator Enable" "0: Disables (The analog logic remains off and..,1: Enables" line.long 0x4 "CCR1,Comparator Control Register 1" hexmask.long.byte 0x4 24.--31. 1. "FILT_PER,Filter Sample Period" bitfld.long 0x4 16.--18. "FILT_CNT,Filter Sample Count" "0: Filter is bypassed: COUT = COUTA,1: 1 consecutive sample (Comparator output is..,2: 2 consecutive samples,3: 3 consecutive samples,4: 4 consecutive samples,5: 5 consecutive samples,6: 6 consecutive samples,7: 7 consecutive samples" newline bitfld.long 0x4 10.--11. "EVT_SEL,CMPO Event Select" "0: Both edges,1: Falling edge,2: Both edges,3: Both edges" bitfld.long 0x4 9. "WINDOW_CLS,CMPO Event Window Close" "0: CMPO event cannot close the window,1: CMPO event can close the window" newline bitfld.long 0x4 8. "WINDOW_INV,WINDOW/SAMPLE Signal Invert" "0: Do not invert,1: Invert" bitfld.long 0x4 7. "COUTA_OW,COUTA Output Level for Closed Window" "0: COUTA is 0,1: COUTA is 1" newline bitfld.long 0x4 6. "COUTA_OWEN,COUTA_OW Enable" "0: COUTA holds the last sampled value.,1: Enables the COUTA signal value to be defined by.." bitfld.long 0x4 5. "COUT_PEN,Comparator Output Pin Enable" "0: Not available,1: Available" newline bitfld.long 0x4 4. "COUT_SEL,Comparator Output Select" "0: Use COUT (filtered),1: Use COUTA (unfiltered)" bitfld.long 0x4 3. "COUT_INV,Comparator Invert" "0: Do not invert,1: Invert" newline bitfld.long 0x4 2. "DMA_EN,DMA Enable" "0: Disables,1: Enables" bitfld.long 0x4 1. "SAMPLE_EN,Sampling Enable" "0: Disables,1: Enables" newline bitfld.long 0x4 0. "WINDOW_EN,Windowing Enable" "0: Disables,1: Enables" line.long 0x8 "CCR2,Comparator Control Register 2" bitfld.long 0x8 28.--29. "INMSEL,Input Minus Select" "0: IN0: from the 8-bit DAC output,1: IN1: from the analog 8-1 mux,?,?" bitfld.long 0x8 24.--25. "INPSEL,Input Plus Select" "0: IN0: from the 8-bit DAC output,1: IN1: from the analog 8-1 mux,?,?" newline bitfld.long 0x8 20.--22. "MSEL,Minus Input MUX Select" "0: Input channel 0,1: Input channel 1,2: Input channel 2,3: Input channel 3,4: Input channel 4,5: Input channel 5,6: Input channel 6,7: Input channel 7" bitfld.long 0x8 16.--18. "PSEL,Plus Input MUX Select" "0: Input channel 0,1: Input channel 1,2: Input channel 2,3: Input channel 3,4: Input channel 4,5: Input channel 5,6: Input channel 6,7: Input channel 7" newline bitfld.long 0x8 4.--5. "HYSTCTR,Comparator Hysteresis Control" "0: Level 0,1: Level 1,2: Level 2,3: Level 3" bitfld.long 0x8 2. "OFFSET,Comparator Offset Control" "0: Level 0: The hysteresis selected by HYSTCTR is..,1: Level 1: Hysteresis does not apply when INP.." newline bitfld.long 0x8 0. "CMP_HPMD,CMP High Power Mode Select" "0: Low power (speed) comparison mode,1: High power (speed) comparison mode" group.long 0x18++0x1B line.long 0x0 "DCR,DAC Control" hexmask.long.byte 0x0 16.--23. 1. "DAC_DATA,DAC Output Voltage Select" bitfld.long 0x0 8. "VRSEL,DAC Reference High Voltage Source Select" "0: vrefh0,1: vrefh1" newline bitfld.long 0x0 1. "DAC_HPMD,DAC High Power Mode Select" "0: Disables,1: Enables" bitfld.long 0x0 0. "DAC_EN,DAC Enable" "0: Disables,1: Enables" line.long 0x4 "IER,Interrupt Enable" bitfld.long 0x4 2. "RRF_IE,Round-Robin Flag Interrupt Enable" "0: Disables the round-robin flag interrupt.,1: Enables the round-robin flag interrupt when the.." bitfld.long 0x4 1. "CFF_IE,Comparator Flag Falling Interrupt Enable" "0: Disables the comparator flag falling interrupt.,1: Enables the comparator flag falling interrupt.." newline bitfld.long 0x4 0. "CFR_IE,Comparator Flag Rising Interrupt Enable" "0: Disables the comparator flag rising interrupt.,1: Enables the comparator flag rising interrupt.." line.long 0x8 "CSR,Comparator Status" rbitfld.long 0x8 8. "COUT,Analog Comparator Output" "0,1" eventfld.long 0x8 2. "RRF,Round-Robin Flag" "0: Not detected,1: Detected" newline eventfld.long 0x8 1. "CFF,Analog Comparator Flag Falling" "0: Not detected,1: Detected" eventfld.long 0x8 0. "CFR,Analog Comparator Flag Rising" "0: Not detected,1: Detected" line.long 0xC "RRCR0,Round Robin Control Register 0" hexmask.long.byte 0xC 16.--21. 1. "RR_INITMOD,Initialization Delay Modulus" bitfld.long 0xC 8.--9. "RR_NSAM,Number of Sample Clocks" "0: 0 clock,1: 1 clock,2: 2 clocks,3: 3 clocks" newline bitfld.long 0xC 0. "RR_EN,Round-Robin Enable" "0: Disables,1: Enables" line.long 0x10 "RRCR1,Round Robin Control Register 1" bitfld.long 0x10 20.--22. "FIXCH,Fixed Channel Select" "0: Channel 0,1: Channel 1,2: Channel 2,3: Channel 3,4: Channel 4,5: Channel 5,6: Channel 6,7: Channel 7" bitfld.long 0x10 16. "FIXP,Fixed Port" "0: Fix the plus port. Sweep only the inputs to the..,1: Fix the minus port. Sweep only the inputs to the.." newline bitfld.long 0x10 7. "RR_CH7EN,Channel 7 Input Enable in Trigger Mode" "0: Disables,1: Enables" bitfld.long 0x10 6. "RR_CH6EN,Channel 6 Input Enable in Trigger Mode" "0: Disables,1: Enables" newline bitfld.long 0x10 5. "RR_CH5EN,Channel 5 Input Enable in Trigger Mode" "0: Disables,1: Enables" bitfld.long 0x10 4. "RR_CH4EN,Channel 4 Input Enable in Trigger Mode" "0: Disables,1: Enables" newline bitfld.long 0x10 3. "RR_CH3EN,Channel 3 Input Enable in Trigger Mode" "0: Disables,1: Enables" bitfld.long 0x10 2. "RR_CH2EN,Channel 2 Input Enable in Trigger Mode" "0: Disables,1: Enables" newline bitfld.long 0x10 1. "RR_CH1EN,Channel 1 Input Enable in Trigger Mode" "0: Disables,1: Enables" bitfld.long 0x10 0. "RR_CH0EN,Channel 0 Input Enable in Trigger Mode" "0: Disables,1: Enables" line.long 0x14 "RRCSR,Round Robin Control and Status" bitfld.long 0x14 7. "RR_CH7OUT,Comparison Result for Channel 7" "0,1" bitfld.long 0x14 6. "RR_CH6OUT,Comparison Result for Channel 6" "0,1" newline bitfld.long 0x14 5. "RR_CH5OUT,Comparison Result for Channel 5" "0,1" bitfld.long 0x14 4. "RR_CH4OUT,Comparison Result for Channel 4" "0,1" newline bitfld.long 0x14 3. "RR_CH3OUT,Comparison Result for Channel 3" "0,1" bitfld.long 0x14 2. "RR_CH2OUT,Comparison Result for Channel 2" "0,1" newline bitfld.long 0x14 1. "RR_CH1OUT,Comparison Result for Channel 1" "0,1" bitfld.long 0x14 0. "RR_CH0OUT,Comparison Result for Channel 0" "0,1" line.long 0x18 "RRSR,Round Robin Status" eventfld.long 0x18 7. "RR_CH7F,Channel 7 Input Changed Flag" "0: Not different,1: Different" eventfld.long 0x18 6. "RR_CH6F,Channel 6 Input Changed Flag" "0: Not different,1: Different" newline eventfld.long 0x18 5. "RR_CH5F,Channel 5 Input Changed Flag" "0: Not different,1: Different" eventfld.long 0x18 4. "RR_CH4F,Channel 4 Input Changed Flag" "0: Not different,1: Different" newline eventfld.long 0x18 3. "RR_CH3F,Channel 3 Input Changed Flag" "0: Not different,1: Different" eventfld.long 0x18 2. "RR_CH2F,Channel 2 Input Changed Flag" "0: Not different,1: Different" newline eventfld.long 0x18 1. "RR_CH1F,Channel 1 Input Changed Flag" "0: Not different,1: Different" eventfld.long 0x18 0. "RR_CH0F,Channel 0 Input Changed Flag" "0: Not different,1: Different" tree.end tree.end tree "LPI2C (Low Power Inter-Integrated Circuit)" base ad:0x0 tree "LPI2C_0" base ad:0x40350000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size" hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size" group.long 0x10++0x1F line.long 0x0 "MCR,Controller Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO" newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable" newline bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset" bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable" line.long 0x4 "MSR,Controller Status" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy" rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy" newline eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received" eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred" newline eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error" eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration" newline eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected" eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated" newline eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated" rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready" newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested" line.long 0x8 "MIER,Controller Interrupt Enable" bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "MDER,Controller DMA Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" line.long 0x10 "MCFGR0,Controller Configuration 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set" bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable" newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger" bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high" newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable" line.long 0x14 "MCFGR1,Controller Configuration 1" bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.." newline bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA" bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK" newline bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated" bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" line.long 0x18 "MCFGR2,Controller Configuration 2" hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout" line.long 0x1C "MCFGR3,Controller Configuration 3" hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout" group.long 0x40++0x3 line.long 0x0 "MDMR,Controller Data Match" hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value" hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value" group.long 0x48++0x3 line.long 0x0 "MCCR0,Controller Clock Configuration 0" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x50++0x3 line.long 0x0 "MCCR1,Controller Clock Configuration 1" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x58++0x3 line.long 0x0 "MFCR,Controller FIFO Control" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "MFSR,Controller FIFO Status" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" wgroup.long 0x60++0x3 line.long 0x0 "MTDR,Controller Transmit Data" bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.." hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x70++0x3 line.long 0x0 "MRDR,Controller Receive Data" bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty" hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data" group.long 0x110++0xF line.long 0x0 "SCR,Target Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty" newline bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable" bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable" line.long 0x4 "SSR,Target Status" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy" rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy" newline rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected" rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected" newline rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received" rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received" newline eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error" eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred" newline eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected" eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected" newline rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required" rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid" newline rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready" rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested" line.long 0x8 "SIER,Target Interrupt Enable" bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "SDER,Target DMA Enable" bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request" newline bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" group.long 0x124++0x7 line.long 0x0 "SCFGR1,Target Configuration 1" bitfld.long 0x0 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.." bitfld.long 0x0 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK" bitfld.long 0x0 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.." newline bitfld.long 0x0 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty" bitfld.long 0x0 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "GCEN,General Call Enable" "0: Disable,1: Enable" bitfld.long 0x0 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable" bitfld.long 0x0 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable" line.long 0x4 "SCFGR2,Target Configuration 2" hexmask.long.byte 0x4 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x4 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.byte 0x4 8.--13. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x4 0.--3. 1. "CLKHOLD,Clock Hold Time" group.long 0x140++0x3 line.long 0x0 "SAMR,Target Address Match" hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value" hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value" rgroup.long 0x150++0x3 line.long 0x0 "SASR,Target Address Status" bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid" hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address" group.long 0x154++0x3 line.long 0x0 "STAR,Target Transmit ACK" bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK" wgroup.long 0x160++0x3 line.long 0x0 "STDR,Target Transmit Data" hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x170++0x3 line.long 0x0 "SRDR,Target Receive Data" bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First" bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty" newline bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data" tree.end tree "LPI2C_1" base ad:0x40354000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size" hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size" group.long 0x10++0x1F line.long 0x0 "MCR,Controller Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO" newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable" newline bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset" bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable" line.long 0x4 "MSR,Controller Status" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy" rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy" newline eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received" eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred" newline eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error" eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration" newline eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected" eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated" newline eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated" rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready" newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested" line.long 0x8 "MIER,Controller Interrupt Enable" bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "MDER,Controller DMA Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" line.long 0x10 "MCFGR0,Controller Configuration 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set" bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable" newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger" bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high" newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable" line.long 0x14 "MCFGR1,Controller Configuration 1" bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.." newline bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA" bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK" newline bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated" bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" line.long 0x18 "MCFGR2,Controller Configuration 2" hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout" line.long 0x1C "MCFGR3,Controller Configuration 3" hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout" group.long 0x40++0x3 line.long 0x0 "MDMR,Controller Data Match" hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value" hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value" group.long 0x48++0x3 line.long 0x0 "MCCR0,Controller Clock Configuration 0" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x50++0x3 line.long 0x0 "MCCR1,Controller Clock Configuration 1" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x58++0x3 line.long 0x0 "MFCR,Controller FIFO Control" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "MFSR,Controller FIFO Status" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" wgroup.long 0x60++0x3 line.long 0x0 "MTDR,Controller Transmit Data" bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.." hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x70++0x3 line.long 0x0 "MRDR,Controller Receive Data" bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty" hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data" group.long 0x110++0xF line.long 0x0 "SCR,Target Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty" newline bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable" bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable" line.long 0x4 "SSR,Target Status" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy" rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy" newline rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected" rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected" newline rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received" rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received" newline eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error" eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred" newline eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected" eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected" newline rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required" rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid" newline rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready" rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested" line.long 0x8 "SIER,Target Interrupt Enable" bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "SDER,Target DMA Enable" bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request" newline bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" group.long 0x124++0x7 line.long 0x0 "SCFGR1,Target Configuration 1" bitfld.long 0x0 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.." bitfld.long 0x0 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK" bitfld.long 0x0 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.." newline bitfld.long 0x0 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty" bitfld.long 0x0 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "GCEN,General Call Enable" "0: Disable,1: Enable" bitfld.long 0x0 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable" bitfld.long 0x0 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable" line.long 0x4 "SCFGR2,Target Configuration 2" hexmask.long.byte 0x4 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x4 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.byte 0x4 8.--13. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x4 0.--3. 1. "CLKHOLD,Clock Hold Time" group.long 0x140++0x3 line.long 0x0 "SAMR,Target Address Match" hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value" hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value" rgroup.long 0x150++0x3 line.long 0x0 "SASR,Target Address Status" bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid" hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address" group.long 0x154++0x3 line.long 0x0 "STAR,Target Transmit ACK" bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK" wgroup.long 0x160++0x3 line.long 0x0 "STDR,Target Transmit Data" hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x170++0x3 line.long 0x0 "SRDR,Target Receive Data" bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First" bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty" newline bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data" tree.end tree.end tree "LPSPI (Low Power Serial Peripheral Interface)" base ad:0x0 tree "LPSPI_0" base ad:0x40358000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" newline hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset" newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" newline bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable" line.long 0x4 "SR,Status" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy" eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match" newline eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow" eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun" newline eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete" eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete" newline eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete" rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready" newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested" line.long 0x8 "IER,Interrupt Enable" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "DER,DMA Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" line.long 0x10 "CFGR0,Configuration 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable" bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable" newline bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output" bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger" newline bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low" bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable" line.long 0x14 "CFGR1,Configuration 1" bitfld.long 0x14 27.--28. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[7:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit..,?,3: PCS[7:2] are configured for half-duplex 4-bit.." bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.." bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.." newline hexmask.long.byte 0x14 8.--15. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store" newline bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable" bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable" newline bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge" bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode" group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x7 line.long 0x0 "CCR,Clock Configuration" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" line.long 0x4 "CCR1,Clock Configuration 1" hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay" hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay" newline hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold" hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high" bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed" newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" bitfld.long 0x0 24.--26. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3],4: Transfer using PCS[4],5: Transfer using PCS[5],6: Transfer using PCS[6],7: Transfer using PCS[7]" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first" bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled" bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer" newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked" bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data" newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,3: 8-bit transfer" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0xB line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word" line.long 0x4 "RDR,Receive Data" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" line.long 0x8 "RDROR,Receive Data Read Only" hexmask.long 0x8 0.--31. 1. "DATA,Receive Data" wgroup.long 0x3FC++0x3 line.long 0x0 "TCBR,Transmit Command Burst" hexmask.long 0x0 0.--31. 1. "DATA,Command Data" repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x400)++0x3 line.long 0x0 "TDBR[$1],Transmit Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x600)++0x3 line.long 0x0 "RDBR[$1],Receive Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end tree.end tree "LPSPI_1" base ad:0x4035C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" newline hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset" newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" newline bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable" line.long 0x4 "SR,Status" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy" eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match" newline eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow" eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun" newline eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete" eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete" newline eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete" rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready" newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested" line.long 0x8 "IER,Interrupt Enable" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "DER,DMA Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" line.long 0x10 "CFGR0,Configuration 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable" bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable" newline bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output" bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger" newline bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low" bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable" line.long 0x14 "CFGR1,Configuration 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[5:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.." bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.." bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.." newline hexmask.long.byte 0x14 8.--13. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store" newline bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable" bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable" newline bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge" bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode" group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x7 line.long 0x0 "CCR,Clock Configuration" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" line.long 0x4 "CCR1,Clock Configuration 1" hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay" hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay" newline hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold" hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high" bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed" newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" bitfld.long 0x0 24.--26. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3],4: Transfer using PCS[4],5: Transfer using PCS[5],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first" bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled" bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer" newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked" bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data" newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0xB line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word" line.long 0x4 "RDR,Receive Data" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" line.long 0x8 "RDROR,Receive Data Read Only" hexmask.long 0x8 0.--31. 1. "DATA,Receive Data" wgroup.long 0x3FC++0x3 line.long 0x0 "TCBR,Transmit Command Burst" hexmask.long 0x0 0.--31. 1. "DATA,Command Data" repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x400)++0x3 line.long 0x0 "TDBR[$1],Transmit Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x600)++0x3 line.long 0x0 "RDBR[$1],Receive Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end tree.end tree "LPSPI_2" base ad:0x40360000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" newline hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset" newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" newline bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable" line.long 0x4 "SR,Status" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy" eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match" newline eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow" eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun" newline eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete" eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete" newline eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete" rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready" newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested" line.long 0x8 "IER,Interrupt Enable" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "DER,DMA Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" line.long 0x10 "CFGR0,Configuration 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable" bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable" newline bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output" bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger" newline bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low" bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable" line.long 0x14 "CFGR1,Configuration 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.." bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.." bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.." newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store" newline bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable" bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable" newline bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge" bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode" group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x7 line.long 0x0 "CCR,Clock Configuration" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" line.long 0x4 "CCR1,Clock Configuration 1" hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay" hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay" newline hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold" hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high" bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed" newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3]" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first" bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled" bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer" newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked" bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data" newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0xB line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word" line.long 0x4 "RDR,Receive Data" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" line.long 0x8 "RDROR,Receive Data Read Only" hexmask.long 0x8 0.--31. 1. "DATA,Receive Data" wgroup.long 0x3FC++0x3 line.long 0x0 "TCBR,Transmit Command Burst" hexmask.long 0x0 0.--31. 1. "DATA,Command Data" repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x400)++0x3 line.long 0x0 "TDBR[$1],Transmit Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x600)++0x3 line.long 0x0 "RDBR[$1],Receive Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end tree.end tree "LPSPI_3" base ad:0x40364000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" newline hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset" newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" newline bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable" line.long 0x4 "SR,Status" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy" eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match" newline eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow" eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun" newline eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete" eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete" newline eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete" rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready" newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested" line.long 0x8 "IER,Interrupt Enable" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "DER,DMA Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" line.long 0x10 "CFGR0,Configuration 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable" bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable" newline bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output" bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger" newline bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low" bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable" line.long 0x14 "CFGR1,Configuration 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.." bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.." bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.." newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store" newline bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable" bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable" newline bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge" bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode" group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x7 line.long 0x0 "CCR,Clock Configuration" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" line.long 0x4 "CCR1,Clock Configuration 1" hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay" hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay" newline hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold" hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high" bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed" newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3]" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first" bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled" bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer" newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked" bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data" newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0xB line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word" line.long 0x4 "RDR,Receive Data" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" line.long 0x8 "RDROR,Receive Data Read Only" hexmask.long 0x8 0.--31. 1. "DATA,Receive Data" wgroup.long 0x3FC++0x3 line.long 0x0 "TCBR,Transmit Command Burst" hexmask.long 0x0 0.--31. 1. "DATA,Command Data" repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x400)++0x3 line.long 0x0 "TDBR[$1],Transmit Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x600)++0x3 line.long 0x0 "RDBR[$1],Receive Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end tree.end tree "LPSPI_4" base ad:0x404BC000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" newline hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset" newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" newline bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable" line.long 0x4 "SR,Status" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy" eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match" newline eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow" eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun" newline eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete" eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete" newline eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete" rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready" newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested" line.long 0x8 "IER,Interrupt Enable" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "DER,DMA Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" line.long 0x10 "CFGR0,Configuration 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable" bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable" newline bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output" bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger" newline bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low" bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable" line.long 0x14 "CFGR1,Configuration 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.." bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.." bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.." newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store" newline bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable" bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable" newline bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge" bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode" group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x7 line.long 0x0 "CCR,Clock Configuration" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" line.long 0x4 "CCR1,Clock Configuration 1" hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay" hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay" newline hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold" hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high" bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed" newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3]" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first" bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled" bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer" newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked" bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data" newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0xB line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word" line.long 0x4 "RDR,Receive Data" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" line.long 0x8 "RDROR,Receive Data Read Only" hexmask.long 0x8 0.--31. 1. "DATA,Receive Data" wgroup.long 0x3FC++0x3 line.long 0x0 "TCBR,Transmit Command Burst" hexmask.long 0x0 0.--31. 1. "DATA,Command Data" repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x400)++0x3 line.long 0x0 "TDBR[$1],Transmit Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x600)++0x3 line.long 0x0 "RDBR[$1],Receive Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end tree.end tree "LPSPI_5" base ad:0x404C0000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" newline hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset" bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset" newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" newline bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable" line.long 0x4 "SR,Status" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy" eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match" newline eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow" eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun" newline eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete" eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete" newline eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete" rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready" newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested" line.long 0x8 "IER,Interrupt Enable" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable" line.long 0xC "DER,DMA Enable" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable" bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable" line.long 0x10 "CFGR0,Configuration 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable" bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable" newline bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output" bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger" newline bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low" bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable" line.long 0x14 "CFGR1,Configuration 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.." bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.." bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.." newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store" newline bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable" bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable" newline bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge" bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode" group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x7 line.long 0x0 "CCR,Clock Configuration" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" line.long 0x4 "CCR1,Clock Configuration 1" hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay" hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay" newline hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold" hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high" bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed" newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3]" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first" bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled" bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer" newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked" bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data" newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0xB line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word" line.long 0x4 "RDR,Receive Data" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" line.long 0x8 "RDROR,Receive Data Read Only" hexmask.long 0x8 0.--31. 1. "DATA,Receive Data" wgroup.long 0x3FC++0x3 line.long 0x0 "TCBR,Transmit Command Burst" hexmask.long 0x0 0.--31. 1. "DATA,Command Data" repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x400)++0x3 line.long 0x0 "TDBR[$1],Transmit Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x600)++0x3 line.long 0x0 "RDBR[$1],Receive Data Burst" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end tree.end tree.end tree "LPUART (Low Power Universal Asynchronous Receiver/Transmitter)" base ad:0x0 tree "LPUART_0" base ad:0x40328000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,Global" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" line.long 0x4 "PINCFG,Pin Configuration" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.." line.long 0x8 "BAUD,Baud Rate" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables" bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables" newline bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request" bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request" newline bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.." bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." newline bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization" bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1" newline bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].." bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits" newline hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor" line.long 0xC "STAT,Status" eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected" eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred" newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB" bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted" newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1" bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times" newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables" rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)" newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark" rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)" newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark" eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected" newline eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)" eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected" newline eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected" eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected" newline eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1" eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2" newline rbitfld.long 0xC 9. "TSF,Timeout Status Flag" "0: Field is 0,1: Field is 1" rbitfld.long 0xC 8. "MSF,MODEM Status Flag" "0: Field is 0,1: Field is 1" newline bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.." bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect" line.long 0x10 "CTRL,Control" bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode" bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted" newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1" newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables" bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent" newline bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters" bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode" bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables" newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode" bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters" newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup" bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit" newline bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables" bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity" line.long 0x14 "DATA,Data" rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise" rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error" newline bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty" newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle" rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected" newline bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1" bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1" newline bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1" bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1" newline bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1" bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1" newline bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1" bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1" newline bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1" bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1" line.long 0x18 "MATCH,Match Address" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,MODEM IrDA" bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables" bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR" newline hexmask.long.byte 0x1C 8.--11. 1. "RTSWATER,Receive RTS Configuration" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle" bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high" bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables" line.long 0x20 "FIFO,FIFO" rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty" rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty" newline eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow" eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow" newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out" bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out" newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.." bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords" line.long 0x24 "WATER,Watermark" hexmask.long.byte 0x24 24.--28. 1. "RXCOUNT,Receive Counter" hexmask.long.byte 0x24 16.--19. 1. "RXWATER,Receive Watermark" newline hexmask.long.byte 0x24 8.--12. 1. "TXCOUNT,Transmit Counter" hexmask.long.byte 0x24 0.--3. 1. "TXWATER,Transmit Watermark" rgroup.long 0x30++0x3 line.long 0x0 "DATARO,Data Read-Only" hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data" group.long 0x40++0x13 line.long 0x0 "MCR,MODEM Control" bitfld.long 0x0 9. "RTS,Request To Send" "0: Default state is logic one,1: Default state is logic zero" bitfld.long 0x0 8. "DTR,Data Terminal Ready" "0: Default state is logic one,1: Default state is logic zero" newline bitfld.long 0x0 3. "DCD,Data Carrier Detect" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x0 2. "RIN,Ring Indicator" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x0 1. "DSR,Data Set Ready" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x0 0. "CTS,Clear To Send" "0: Interrupt disabled,1: Interrupt enabled" line.long 0x4 "MSR,MODEM Status" rbitfld.long 0x4 7. "DCD,Data Carrier Detect" "0: The DCD_B pin is logic one,1: The DCD_B pin is logic zero" rbitfld.long 0x4 6. "RIN,Ring Indicator" "0: The RIN_B pin is logic one,1: The RIN_B pin is logic zero" newline rbitfld.long 0x4 5. "DSR,Data Set Ready" "0: The DSR_B pin is logic one,1: The DSR_B pin is logic zero" rbitfld.long 0x4 4. "CTS,Clear To Send" "0: The CTS_B pin is logic one,1: The CTS_B pin is logic zero" newline eventfld.long 0x4 3. "DDCD,Delta Data Carrier Detect" "0: Did not change state,1: Changed state" eventfld.long 0x4 2. "DRI,Delta Ring Indicator" "0: Did not change state,1: Changed state" newline eventfld.long 0x4 1. "DDSR,Delta Data Set Ready" "0: Did not change state,1: Changed state" eventfld.long 0x4 0. "DCTS,Delta Clear To Send" "0: Did not change state,1: Changed state" line.long 0x8 "REIR,Receiver Extended Idle" hexmask.long.word 0x8 0.--13. 1. "IDTIME,Idle Time" line.long 0xC "TEIR,Transmitter Extended Idle" hexmask.long.word 0xC 0.--13. 1. "IDTIME,Idle Time" line.long 0x10 "HDCR,Half Duplex Control" hexmask.long.byte 0x10 8.--15. 1. "RTSEXT,RTS Extended" bitfld.long 0x10 3. "RXMSK,Receive Mask" "0: Does not mask,1: Masks" newline bitfld.long 0x10 2. "RXWRMSK,Receive FIFO Write Mask" "0: Does not mask,1: Masks" bitfld.long 0x10 1. "RXSEL,Receive Select" "0: RXD,1: TXD" newline bitfld.long 0x10 0. "TXSTALL,Transmit Stall" "0: No effect,1: Does not become busy" group.long 0x58++0x7 line.long 0x0 "TOCR,Timeout Control" hexmask.long.byte 0x0 8.--11. 1. "TOIE,Timeout Interrupt Enable" hexmask.long.byte 0x0 0.--3. 1. "TOEN,Timeout Enable" line.long 0x4 "TOSR,Timeout Status" hexmask.long.byte 0x4 8.--11. 1. "TOF,Timeout Flag" hexmask.long.byte 0x4 0.--3. 1. "TOZ,Timeout Zero" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "TIMEOUT[$1],Timeout N" bitfld.long 0x0 30.--31. "CFG,Idle Configuration" "0: Becomes 1 after timeout characters are received,1: Becomes 1 when idle for timeout bit clocks,2: Becomes 1 when idle for timeout bit clocks..,3: Becomes 1 when idle for at least timeout bit.." hexmask.long.word 0x0 0.--13. 1. "TIMEOUT,Timeout Value" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x200)++0x3 line.long 0x0 "TCBR[$1],Transmit Command Burst" hexmask.long.word 0x0 0.--15. 1. "DATA,Data" repeat.end repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x400)++0x3 line.long 0x0 "TDBR[$1],Transmit Data Burst" hexmask.long.byte 0x0 24.--31. 1. "DATA3,Data3" hexmask.long.byte 0x0 16.--23. 1. "DATA2,Data2" newline hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data1" hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data0" repeat.end tree.end tree "LPUART_1" base ad:0x4032C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,Global" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" line.long 0x4 "PINCFG,Pin Configuration" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.." line.long 0x8 "BAUD,Baud Rate" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables" bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables" newline bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request" bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request" newline bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.." bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." newline bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization" bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1" newline bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].." bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits" newline hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor" line.long 0xC "STAT,Status" eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected" eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred" newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB" bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted" newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1" bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times" newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables" rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)" newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark" rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)" newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark" eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected" newline eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)" eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected" newline eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected" eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected" newline eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1" eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2" newline rbitfld.long 0xC 9. "TSF,Timeout Status Flag" "0: Field is 0,1: Field is 1" rbitfld.long 0xC 8. "MSF,MODEM Status Flag" "0: Field is 0,1: Field is 1" newline bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.." bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect" line.long 0x10 "CTRL,Control" bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode" bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted" newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1" newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables" bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent" newline bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters" bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode" bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables" newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode" bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters" newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup" bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit" newline bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables" bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity" line.long 0x14 "DATA,Data" rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise" rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error" newline bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty" newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle" rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected" newline bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1" bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1" newline bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1" bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1" newline bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1" bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1" newline bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1" bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1" newline bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1" bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1" line.long 0x18 "MATCH,Match Address" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,MODEM IrDA" bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables" bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR" newline hexmask.long.byte 0x1C 8.--11. 1. "RTSWATER,Receive RTS Configuration" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle" bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high" bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables" line.long 0x20 "FIFO,FIFO" rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty" rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty" newline eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow" eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow" newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out" bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out" newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.." bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords" line.long 0x24 "WATER,Watermark" hexmask.long.byte 0x24 24.--28. 1. "RXCOUNT,Receive Counter" hexmask.long.byte 0x24 16.--19. 1. "RXWATER,Receive Watermark" newline hexmask.long.byte 0x24 8.--12. 1. "TXCOUNT,Transmit Counter" hexmask.long.byte 0x24 0.--3. 1. "TXWATER,Transmit Watermark" rgroup.long 0x30++0x3 line.long 0x0 "DATARO,Data Read-Only" hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data" group.long 0x40++0x13 line.long 0x0 "MCR,MODEM Control" bitfld.long 0x0 9. "RTS,Request To Send" "0: Default state is logic one,1: Default state is logic zero" bitfld.long 0x0 8. "DTR,Data Terminal Ready" "0: Default state is logic one,1: Default state is logic zero" newline bitfld.long 0x0 3. "DCD,Data Carrier Detect" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x0 2. "RIN,Ring Indicator" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x0 1. "DSR,Data Set Ready" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x0 0. "CTS,Clear To Send" "0: Interrupt disabled,1: Interrupt enabled" line.long 0x4 "MSR,MODEM Status" rbitfld.long 0x4 7. "DCD,Data Carrier Detect" "0: The DCD_B pin is logic one,1: The DCD_B pin is logic zero" rbitfld.long 0x4 6. "RIN,Ring Indicator" "0: The RIN_B pin is logic one,1: The RIN_B pin is logic zero" newline rbitfld.long 0x4 5. "DSR,Data Set Ready" "0: The DSR_B pin is logic one,1: The DSR_B pin is logic zero" rbitfld.long 0x4 4. "CTS,Clear To Send" "0: The CTS_B pin is logic one,1: The CTS_B pin is logic zero" newline eventfld.long 0x4 3. "DDCD,Delta Data Carrier Detect" "0: Did not change state,1: Changed state" eventfld.long 0x4 2. "DRI,Delta Ring Indicator" "0: Did not change state,1: Changed state" newline eventfld.long 0x4 1. "DDSR,Delta Data Set Ready" "0: Did not change state,1: Changed state" eventfld.long 0x4 0. "DCTS,Delta Clear To Send" "0: Did not change state,1: Changed state" line.long 0x8 "REIR,Receiver Extended Idle" hexmask.long.word 0x8 0.--13. 1. "IDTIME,Idle Time" line.long 0xC "TEIR,Transmitter Extended Idle" hexmask.long.word 0xC 0.--13. 1. "IDTIME,Idle Time" line.long 0x10 "HDCR,Half Duplex Control" hexmask.long.byte 0x10 8.--15. 1. "RTSEXT,RTS Extended" bitfld.long 0x10 3. "RXMSK,Receive Mask" "0: Does not mask,1: Masks" newline bitfld.long 0x10 2. "RXWRMSK,Receive FIFO Write Mask" "0: Does not mask,1: Masks" bitfld.long 0x10 1. "RXSEL,Receive Select" "0: RXD,1: TXD" newline bitfld.long 0x10 0. "TXSTALL,Transmit Stall" "0: No effect,1: Does not become busy" group.long 0x58++0x7 line.long 0x0 "TOCR,Timeout Control" hexmask.long.byte 0x0 8.--11. 1. "TOIE,Timeout Interrupt Enable" hexmask.long.byte 0x0 0.--3. 1. "TOEN,Timeout Enable" line.long 0x4 "TOSR,Timeout Status" hexmask.long.byte 0x4 8.--11. 1. "TOF,Timeout Flag" hexmask.long.byte 0x4 0.--3. 1. "TOZ,Timeout Zero" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "TIMEOUT[$1],Timeout N" bitfld.long 0x0 30.--31. "CFG,Idle Configuration" "0: Becomes 1 after timeout characters are received,1: Becomes 1 when idle for timeout bit clocks,2: Becomes 1 when idle for timeout bit clocks..,3: Becomes 1 when idle for at least timeout bit.." hexmask.long.word 0x0 0.--13. 1. "TIMEOUT,Timeout Value" repeat.end repeat 128. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x200)++0x3 line.long 0x0 "TCBR[$1],Transmit Command Burst" hexmask.long.word 0x0 0.--15. 1. "DATA,Data" repeat.end repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x400)++0x3 line.long 0x0 "TDBR[$1],Transmit Data Burst" hexmask.long.byte 0x0 24.--31. 1. "DATA3,Data3" hexmask.long.byte 0x0 16.--23. 1. "DATA2,Data2" newline hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data1" hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data0" repeat.end tree.end tree "LPUART_2" base ad:0x40330000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,Global" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" line.long 0x4 "PINCFG,Pin Configuration" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.." line.long 0x8 "BAUD,Baud Rate" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables" bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables" newline bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request" bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request" newline bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.." bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." newline bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization" bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1" newline bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].." bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits" newline hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor" line.long 0xC "STAT,Status" eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected" eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred" newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB" bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted" newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1" bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times" newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables" rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)" newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark" rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)" newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark" eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected" newline eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)" eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected" newline eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected" eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected" newline eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1" eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2" newline bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.." bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect" line.long 0x10 "CTRL,Control" bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode" bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted" newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1" newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables" bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent" newline bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters" bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode" bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables" newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode" bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters" newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup" bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit" newline bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables" bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity" line.long 0x14 "DATA,Data" rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise" rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error" newline bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty" newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle" rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected" newline bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1" bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1" newline bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1" bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1" newline bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1" bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1" newline bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1" bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1" newline bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1" bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1" line.long 0x18 "MATCH,Match Address" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,MODEM IrDA" bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables" bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR" newline bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle" bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high" bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables" line.long 0x20 "FIFO,FIFO" rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty" rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty" newline eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow" eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow" newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out" bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out" newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.." bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords" line.long 0x24 "WATER,Watermark" rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3" newline rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3" rgroup.long 0x30++0x3 line.long 0x0 "DATARO,Data Read-Only" hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data" tree.end tree "LPUART_3" base ad:0x40334000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,Global" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" line.long 0x4 "PINCFG,Pin Configuration" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.." line.long 0x8 "BAUD,Baud Rate" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables" bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables" newline bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request" bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request" newline bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.." bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." newline bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization" bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1" newline bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].." bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits" newline hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor" line.long 0xC "STAT,Status" eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected" eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred" newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB" bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted" newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1" bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times" newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables" rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)" newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark" rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)" newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark" eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected" newline eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)" eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected" newline eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected" eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected" newline eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1" eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2" newline bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.." bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect" line.long 0x10 "CTRL,Control" bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode" bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted" newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1" newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables" bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent" newline bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters" bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode" bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables" newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode" bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters" newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup" bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit" newline bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables" bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity" line.long 0x14 "DATA,Data" rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise" rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error" newline bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty" newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle" rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected" newline bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1" bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1" newline bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1" bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1" newline bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1" bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1" newline bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1" bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1" newline bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1" bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1" line.long 0x18 "MATCH,Match Address" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,MODEM IrDA" bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables" bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR" newline bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle" bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high" bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables" line.long 0x20 "FIFO,FIFO" rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty" rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty" newline eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow" eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow" newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out" bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out" newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.." bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords" line.long 0x24 "WATER,Watermark" rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3" newline rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3" rgroup.long 0x30++0x3 line.long 0x0 "DATARO,Data Read-Only" hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data" tree.end tree "LPUART_MSC" base ad:0x40504000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,Global" bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset" line.long 0x4 "PINCFG,Pin Configuration" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.." line.long 0x8 "BAUD,Baud Rate" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables" bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables" newline bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request" bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request" newline bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.." bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." newline bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization" bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1" newline bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].." bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits" newline hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor" line.long 0xC "STAT,Status" eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected" eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred" newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB" bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted" newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1" bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times" newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables" rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)" newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark" rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)" newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark" eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected" newline eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)" eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected" newline eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected" eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected" newline eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1" eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2" newline bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.." bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect" line.long 0x10 "CTRL,Control" bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode" bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted" newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1" newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables" bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent" newline bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters" bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode" bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables" newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode" bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters" newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup" bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit" newline bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables" bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity" line.long 0x14 "DATA,Data" rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise" rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error" newline bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty" newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle" rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected" newline bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1" bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1" newline bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1" bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1" newline bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1" bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1" newline bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1" bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1" newline bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1" bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1" line.long 0x18 "MATCH,Match Address" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,MODEM IrDA" bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables" bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR" newline bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle" bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high" bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables" newline bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables" line.long 0x20 "FIFO,FIFO" rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty" rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty" newline eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow" eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow" newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out" bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out" newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.." bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables" newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords" line.long 0x24 "WATER,Watermark" rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3" newline rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3" rgroup.long 0x30++0x3 line.long 0x0 "DATARO,Data Read-Only" hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data" tree.end tree.end tree "MC_CGM (Clock Generation Module)" base ad:0x402D8000 group.long 0x0++0x3 line.long 0x0 "PCFS_SDUR,PCFS Step Duration" hexmask.long.word 0x0 0.--15. 1. "SDUR,Step duration" group.long 0x58++0xB line.long 0x0 "PCFS_DIVC8,PCFS Divider Change 8 Register" hexmask.long.word 0x0 16.--31. 1. "INIT,Divider change initial value" hexmask.long.byte 0x0 0.--7. 1. "RATE,Divider change rate" line.long 0x4 "PCFS_DIVE8,PCFS Divider End 8 Register" hexmask.long.tbyte 0x4 0.--19. 1. "DIVE,Divider end value" line.long 0x8 "PCFS_DIVS8,PCFS Divider Start 8 Register" hexmask.long.tbyte 0x8 0.--19. 1. "DIVS,Divider start value" group.long 0x300++0x3 line.long 0x0 "MUX_0_CSC,Clock Mux 0 Select Control Register" hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" bitfld.long 0x0 1. "RAMPDOWN,PCFS ramp-down" "0,1" newline bitfld.long 0x0 0. "RAMPUP,PCFS ramp-up" "0,1" rgroup.long 0x304++0x3 line.long 0x0 "MUX_0_CSS,Clock Mux 0 Select Status Register" hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." bitfld.long 0x0 1. "RAMPDOWN,PCFS ramp-down" "0: No ramp-down operation was requested.,1: Ramp-down operation was requested." newline bitfld.long 0x0 0. "RAMPUP,PCFS ramp-up" "0: No ramp-up operation was requested.,1: Ramp-up operation was requested." group.long 0x308++0x1F line.long 0x0 "MUX_0_DC_0,Clock Mux 0 Divider 0 Control Register" rbitfld.long 0x0 31. "DE,Divider enable" "0: Unused,1: Divider is enabled." bitfld.long 0x0 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" line.long 0x4 "MUX_0_DC_1,Clock Mux 0 Divider 1 Control Register" rbitfld.long 0x4 31. "DE,Divider enable" "0: Unused,1: Divider is enabled." bitfld.long 0x4 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" line.long 0x8 "MUX_0_DC_2,Clock Mux 0 Divider 2 Control Register" rbitfld.long 0x8 31. "DE,Divider enable" "0: Unused,1: Divider is enabled." hexmask.long.byte 0x8 16.--19. 1. "DIV,Division value" line.long 0xC "MUX_0_DC_3,Clock Mux 0 Divider 3 Control Register" rbitfld.long 0xC 31. "DE,Divider enable" "0: Unused,1: Divider is enabled." bitfld.long 0xC 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" line.long 0x10 "MUX_0_DC_4,Clock Mux 0 Divider 4 Control Register" rbitfld.long 0x10 31. "DE,Divider enable" "0: Unused,1: Divider is enabled." bitfld.long 0x10 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" line.long 0x14 "MUX_0_DC_5,Clock Mux 0 Divider 5 Control Register" rbitfld.long 0x14 31. "DE,Divider enable" "0: Unused,1: Divider is enabled." bitfld.long 0x14 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" line.long 0x18 "MUX_0_DC_6,Clock Mux 0 Divider 6 Control Register" rbitfld.long 0x18 31. "DE,Divider enable" "0: Unused,1: Divider is enabled." bitfld.long 0x18 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" line.long 0x1C "MUX_0_DC_7,Clock Mux 0 Divider 7 Control Register" rbitfld.long 0x1C 31. "DE,Divider enable" "0: Unused,1: Divider is enabled." bitfld.long 0x1C 16.--17. "DIV,Division value" "0,1,2,3" group.long 0x334++0x7 line.long 0x0 "MUX_0_DIV_TRIG_CTRL,Clock Mux 0 Divider Trigger Control Register" bitfld.long 0x0 31. "HHEN,Halt handshake enable" "0: No halt handshake protocol is initiated.,1: Halt handshake protocol is initiated." bitfld.long 0x0 0. "TCTL,Trigger control" "0: Immediate divider update,1: Common trigger divider update" line.long 0x4 "MUX_0_DIV_TRIG,Clock Mux 0 Divider Trigger Register" hexmask.long 0x4 0.--31. 1. "TRIGGER,Trigger for divider update" rgroup.long 0x33C++0x3 line.long 0x0 "MUX_0_DIV_UPD_STAT,Clock Mux 0 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 0" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x340++0x3 line.long 0x0 "MUX_1_CSC,Clock Mux 1 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x344++0x3 line.long 0x0 "MUX_1_CSS,Clock Mux 1 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x348++0x3 line.long 0x0 "MUX_1_DC_0,Clock Mux 1 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16. "DIV,Division value" "0,1" rgroup.long 0x37C++0x3 line.long 0x0 "MUX_1_DIV_UPD_STAT,Clock Mux 1 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 1" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x380++0x3 line.long 0x0 "MUX_2_CSC,Clock Mux 2 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x384++0x3 line.long 0x0 "MUX_2_CSS,Clock Mux 2 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x388++0x3 line.long 0x0 "MUX_2_DC_0,Clock Mux 2 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16. "DIV,Division value" "0,1" rgroup.long 0x3BC++0x3 line.long 0x0 "MUX_2_DIV_UPD_STAT,Clock Mux 2 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 2" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x3C0++0x3 line.long 0x0 "MUX_3_CSC,Clock Mux 3 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x3C4++0x3 line.long 0x0 "MUX_3_CSS,Clock Mux 3 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x3C8++0x3 line.long 0x0 "MUX_3_DC_0,Clock Mux 3 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16.--17. "DIV,Division value" "0,1,2,3" rgroup.long 0x3FC++0x3 line.long 0x0 "MUX_3_DIV_UPD_STAT,Clock Mux 3 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 3" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x400++0x3 line.long 0x0 "MUX_4_CSC,Clock Mux 4 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x404++0x3 line.long 0x0 "MUX_4_CSS,Clock Mux 4 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x408++0x3 line.long 0x0 "MUX_4_DC_0,Clock Mux 4 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16.--17. "DIV,Division value" "0,1,2,3" rgroup.long 0x43C++0x3 line.long 0x0 "MUX_4_DIV_UPD_STAT,Clock Mux 4 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 4" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x440++0x3 line.long 0x0 "MUX_5_CSC,Clock Mux 5 Select Control Register" hexmask.long.byte 0x0 24.--29. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "FCG,Force clock gate" "0,1" newline bitfld.long 0x0 2. "CG,Clock gate" "0,1" rgroup.long 0x444++0x3 line.long 0x0 "MUX_5_CSS,Clock Mux 5 Select Status Register" hexmask.long.byte 0x0 24.--29. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17. "CS,Clock status" "0: Clock is gated to logic-0 at output of clock mux,1: Clock mux is transparent. Active clock pulses at.." newline bitfld.long 0x0 16. "GRIP,Gating request is in progress." "0: Clock source gating or ungating has completed.,1: Clock source gating or ungating is in progress." group.long 0x448++0x3 line.long 0x0 "MUX_5_DC_0,Clock Mux 5 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" rgroup.long 0x47C++0x3 line.long 0x0 "MUX_5_DIV_UPD_STAT,Clock Mux 5 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 5" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x480++0x3 line.long 0x0 "MUX_6_CSC,Clock Mux 6 Select Control Register" hexmask.long.byte 0x0 24.--29. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "FCG,Force clock gate" "0,1" newline bitfld.long 0x0 2. "CG,Clock gate" "0,1" rgroup.long 0x484++0x3 line.long 0x0 "MUX_6_CSS,Clock Mux 6 Select Status Register" hexmask.long.byte 0x0 24.--29. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17. "CS,Clock status" "0: Clock is gated to logic-0 at output of clock mux,1: Clock mux is transparent. Active clock pulses at.." newline bitfld.long 0x0 16. "GRIP,Gating request is in progress." "0: Clock source gating or ungating has completed.,1: Clock source gating or ungating is in progress." group.long 0x488++0x3 line.long 0x0 "MUX_6_DC_0,Clock Mux 6 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." hexmask.long.byte 0x0 16.--21. 1. "DIV,Division value" rgroup.long 0x4BC++0x3 line.long 0x0 "MUX_6_DIV_UPD_STAT,Clock Mux 6 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 6" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x4C0++0x3 line.long 0x0 "MUX_7_CSC,Clock Mux 7 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x4C4++0x3 line.long 0x0 "MUX_7_CSS,Clock Mux 7 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x4C8++0x3 line.long 0x0 "MUX_7_DC_0,Clock Mux 7 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." hexmask.long.byte 0x0 16.--21. 1. "DIV,Division value" rgroup.long 0x4FC++0x3 line.long 0x0 "MUX_7_DIV_UPD_STAT,Clock Mux 7 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 7" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x500++0x3 line.long 0x0 "MUX_8_CSC,Clock Mux 8 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x504++0x3 line.long 0x0 "MUX_8_CSS,Clock Mux 8 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x508++0x3 line.long 0x0 "MUX_8_DC_0,Clock Mux 8 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." hexmask.long.byte 0x0 16.--21. 1. "DIV,Division value" rgroup.long 0x53C++0x3 line.long 0x0 "MUX_8_DIV_UPD_STAT,Clock Mux 8 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 8" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x540++0x3 line.long 0x0 "MUX_9_CSC,Clock Mux 9 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x544++0x3 line.long 0x0 "MUX_9_CSS,Clock Mux 9 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x548++0x3 line.long 0x0 "MUX_9_DC_0,Clock Mux 9 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." hexmask.long.byte 0x0 16.--21. 1. "DIV,Division value" rgroup.long 0x57C++0x3 line.long 0x0 "MUX_9_DIV_UPD_STAT,Clock Mux 9 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 9" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x580++0x3 line.long 0x0 "MUX_10_CSC,Clock Mux 10 Select Control Register" hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x584++0x3 line.long 0x0 "MUX_10_CSS,Clock Mux 10 Select Status Register" hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x588++0x3 line.long 0x0 "MUX_10_DC_0,Clock Mux 10 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" rgroup.long 0x5BC++0x3 line.long 0x0 "MUX_10_DIV_UPD_STAT,Clock Mux 10 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 10" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x5C0++0x3 line.long 0x0 "MUX_11_CSC,Clock Mux 11 Select Control Register" hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "FCG,Force clock gate" "0,1" newline bitfld.long 0x0 2. "CG,Clock gate" "0,1" rgroup.long 0x5C4++0x3 line.long 0x0 "MUX_11_CSS,Clock Mux 11 Select Status Register" hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17. "CS,Clock status" "0: Clock is gated to logic-0 at output of clock mux,1: Clock mux is transparent. Active clock pulses at.." newline bitfld.long 0x0 16. "GRIP,Gating request is in progress." "0: Clock source gating or ungating has completed.,1: Clock source gating or ungating is in progress." group.long 0x5C8++0x3 line.long 0x0 "MUX_11_DC_0,Clock Mux 11 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." hexmask.long.byte 0x0 16.--19. 1. "DIV,Division value" rgroup.long 0x5FC++0x3 line.long 0x0 "MUX_11_DIV_UPD_STAT,Clock Mux 11 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 11" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x600++0x3 line.long 0x0 "MUX_12_CSC,Clock Mux 12 Select Control Register" hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x604++0x3 line.long 0x0 "MUX_12_CSS,Clock Mux 12 Select Status Register" hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x608++0x3 line.long 0x0 "MUX_12_DC_0,Clock Mux 12 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." hexmask.long.byte 0x0 16.--21. 1. "DIV,Division value" rgroup.long 0x63C++0x3 line.long 0x0 "MUX_12_DIV_UPD_STAT,Clock Mux 12 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 12" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x640++0x3 line.long 0x0 "MUX_13_CSC,Clock Mux 13 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x644++0x3 line.long 0x0 "MUX_13_CSS,Clock Mux 13 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x648++0x3 line.long 0x0 "MUX_13_DC_0,Clock Mux 13 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16. "DIV,Division value" "0,1" rgroup.long 0x67C++0x3 line.long 0x0 "MUX_13_DIV_UPD_STAT,Clock Mux 13 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 13" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x6C0++0x3 line.long 0x0 "MUX_15_CSC,Clock Mux 15 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x6C4++0x3 line.long 0x0 "MUX_15_CSS,Clock Mux 15 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x6C8++0x3 line.long 0x0 "MUX_15_DC_0,Clock Mux 15 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7" rgroup.long 0x6FC++0x3 line.long 0x0 "MUX_15_DIV_UPD_STAT,Clock Mux 15 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 15" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." group.long 0x700++0x3 line.long 0x0 "MUX_16_CSC,Clock Mux 16 Select Control Register" hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control" bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1" newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1" rgroup.long 0x704++0x3 line.long 0x0 "MUX_16_CSS,Clock Mux 16 Select Status Register" hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status" bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?" newline bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress." bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested." newline bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested." group.long 0x708++0x3 line.long 0x0 "MUX_16_DC_0,Clock Mux 16 Divider 0 Control Register" bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled." bitfld.long 0x0 16.--17. "DIV,Division value" "0,1,2,3" rgroup.long 0x73C++0x3 line.long 0x0 "MUX_16_DIV_UPD_STAT,Clock Mux 16 Divider Update Status Register" bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 16" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.." tree.end tree "MC_ME (Mode Entry Module)" base ad:0x402DC000 group.long 0x0++0xB line.long 0x0 "CTL_KEY,Control Key Register" hexmask.long.word 0x0 0.--15. 1. "KEY,Control key" line.long 0x4 "MODE_CONF,Mode Configuration Register" bitfld.long 0x4 15. "STANDBY,Standby request" "0,1" bitfld.long 0x4 1. "FUNC_RST,Functional reset request" "0,1" bitfld.long 0x4 0. "DEST_RST,Destructive reset request" "0,1" line.long 0x8 "MODE_UPD,Mode Update Register" bitfld.long 0x8 0. "MODE_UPD,Mode update" "0,1" rgroup.long 0xC++0x3 line.long 0x0 "MODE_STAT,Mode Status Register" bitfld.long 0x0 0. "PREV_MODE,Previous mode" "0: The previous mode was reset (any reset).,1: The previous mode was standby." group.long 0x10++0x3 line.long 0x0 "MAIN_COREID,Main Core ID Register" hexmask.long.byte 0x0 8.--12. 1. "PIDX,Partition index" bitfld.long 0x0 0.--2. "CIDX,Core index" "0,1,2,3,4,5,6,7" rgroup.long 0x100++0xB line.long 0x0 "PRTN0_PCONF,Partition 0 Process Configuration Register" bitfld.long 0x0 0. "PCE,Partition clock enable" "?,1: Enable the clock to IPs" line.long 0x4 "PRTN0_PUPD,Partition 0 Process Update Register" line.long 0x8 "PRTN0_STAT,Partition 0 Status Register" bitfld.long 0x8 0. "PCS,Partition clock status" "?,1: Clock is active" group.long 0x10C++0x3 line.long 0x0 "PRTN0_CORE_LOCKSTEP,Partition 0 Core Lockstep Control Register" bitfld.long 0x0 2. "LS2,Lockstep 2" "0: Lockstep disabled,1: Lockstep enabled" rgroup.long 0x110++0x7 line.long 0x0 "PRTN0_COFB0_STAT,Partition 0 COFB Set 0 Clock Status Register" bitfld.long 0x0 20. "BLOCK20,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 19. "BLOCK19,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 18. "BLOCK18,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 17. "BLOCK17,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 16. "BLOCK16,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 15. "BLOCK15,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 14. "BLOCK14,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 13. "BLOCK13,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 12. "BLOCK12,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 11. "BLOCK11,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 10. "BLOCK10,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 9. "BLOCK9,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 8. "BLOCK8,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 7. "BLOCK7,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 6. "BLOCK6,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 5. "BLOCK5,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 4. "BLOCK4,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 3. "BLOCK3,IP block status" "0: Clock is not running.,1: Clock is running." line.long 0x4 "PRTN0_COFB1_STAT,Partition 0 COFB Set 1 Clock Status Register" bitfld.long 0x4 17. "BLOCK49,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 16. "BLOCK48,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 15. "BLOCK47,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 14. "BLOCK46,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 13. "BLOCK45,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 12. "BLOCK44,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 11. "BLOCK43,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 10. "BLOCK42,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 9. "BLOCK41,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 8. "BLOCK40,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 7. "BLOCK39,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 6. "BLOCK38,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 2. "BLOCK34,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 1. "BLOCK33,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 0. "BLOCK32,IP block status" "0: Clock is not running.,1: Clock is running." group.long 0x140++0x7 line.long 0x0 "PRTN0_CORE0_PCONF,Partition 0 Core 0 Process Configuration Register" bitfld.long 0x0 0. "CCE,Core 0 clock enable" "0: Disable the core clock,1: Enable the core clock" line.long 0x4 "PRTN0_CORE0_PUPD,Partition 0 Core 0 Process Update Register" bitfld.long 0x4 0. "CCUPD,Core 0 clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process" rgroup.long 0x148++0x3 line.long 0x0 "PRTN0_CORE0_STAT,Partition 0 Core 0 Status Register" bitfld.long 0x0 31. "WFI,Wait for interrupt status" "0: No WFI executed,1: WFI executed" bitfld.long 0x0 0. "CCS,Core 0 clock process status" "0: Clock is inactive.,1: Clock is active." group.long 0x14C++0x3 line.long 0x0 "PRTN0_CORE0_ADDR,Partition 0 Core 0 Address Register" hexmask.long 0x0 2.--31. 1. "ADDR,Address" group.long 0x160++0x7 line.long 0x0 "PRTN0_CORE1_PCONF,Partition 0 Core 1 Process Configuration Register" bitfld.long 0x0 0. "CCE,Core 1 clock enable" "0: Disable the core clock,1: Enable the core clock" line.long 0x4 "PRTN0_CORE1_PUPD,Partition 0 Core 1 Process Update Register" bitfld.long 0x4 0. "CCUPD,Core 1 clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process" rgroup.long 0x168++0x3 line.long 0x0 "PRTN0_CORE1_STAT,Partition 0 Core 1 Status Register" bitfld.long 0x0 31. "WFI,Wait for interrupt status" "0: No WFI executed,1: WFI executed" bitfld.long 0x0 0. "CCS,Core 1 clock process status" "0: Clock is inactive.,1: Clock is active." group.long 0x16C++0x3 line.long 0x0 "PRTN0_CORE1_ADDR,Partition 0 Core 1 Address Register" hexmask.long 0x0 2.--31. 1. "ADDR,Address" rgroup.long 0x188++0x7 line.long 0x0 "PRTN0_CORE2_STAT,Partition 0 Core 2 Status Register" bitfld.long 0x0 31. "WFI,Wait for interrupt status" "0: No WFI executed,1: WFI executed" bitfld.long 0x0 0. "CCS,Core 2 clock process status" "?,1: Clock is active." line.long 0x4 "PRTN0_CORE2_ADDR,Partition 0 Core 2 Address Register" hexmask.long 0x4 2.--31. 1. "ADDR,Address" group.long 0x1C0++0x7 line.long 0x0 "PRTN0_CORE4_PCONF,Partition 0 Core 4 Process Configuration Register" bitfld.long 0x0 0. "CCE,Core 4 clock enable" "0: Disable the core clock,1: Enable the core clock" line.long 0x4 "PRTN0_CORE4_PUPD,Partition 0 Core 4 Process Update Register" bitfld.long 0x4 0. "CCUPD,Core 4 clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process" rgroup.long 0x1C8++0x3 line.long 0x0 "PRTN0_CORE4_STAT,Partition 0 Core 4 Status Register" bitfld.long 0x0 31. "WFI,Wait for interrupt status" "0: No WFI executed,1: WFI executed" bitfld.long 0x0 0. "CCS,Core 4 clock process status" "0: Clock is inactive.,1: Clock is active." group.long 0x1CC++0x3 line.long 0x0 "PRTN0_CORE4_ADDR,Partition 0 Core 4 Address Register" hexmask.long 0x0 2.--31. 1. "ADDR,Address" group.long 0x1E0++0x7 line.long 0x0 "PRTN0_CORE5_PCONF,Partition 0 Core 5 Process Configuration Register" bitfld.long 0x0 0. "CCE,Core 5 clock enable" "0: Disable the core clock,1: Enable the core clock" line.long 0x4 "PRTN0_CORE5_PUPD,Partition 0 Core 5 Process Update Register" bitfld.long 0x4 0. "CCUPD,Core 5 clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process" rgroup.long 0x1E8++0x3 line.long 0x0 "PRTN0_CORE5_STAT,Partition 0 Core 5 Status Register" bitfld.long 0x0 31. "WFI,Wait for interrupt status" "0: No WFI executed,1: WFI executed" bitfld.long 0x0 0. "CCS,Core 5 clock process status" "0: Clock is inactive.,1: Clock is active." group.long 0x1EC++0x3 line.long 0x0 "PRTN0_CORE5_ADDR,Partition 0 Core 5 Address Register" hexmask.long 0x0 2.--31. 1. "ADDR,Address" group.long 0x300++0x7 line.long 0x0 "PRTN1_PCONF,Partition 1 Process Configuration Register" bitfld.long 0x0 0. "PCE,Partition clock enable" "0: Disable the clock to IPs,1: Enable the clock to IPs" line.long 0x4 "PRTN1_PUPD,Partition 1 Process Update Register" bitfld.long 0x4 0. "PCUD,Partition clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process" rgroup.long 0x308++0x3 line.long 0x0 "PRTN1_STAT,Partition 1 Status Register" bitfld.long 0x0 0. "PCS,Partition clock status" "0: Clock is inactive,1: Clock is active" rgroup.long 0x310++0xF line.long 0x0 "PRTN1_COFB0_STAT,Partition 1 COFB Set 0 Clock Status Register" bitfld.long 0x0 31. "BLOCK31,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 30. "BLOCK30,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 29. "BLOCK29,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 28. "BLOCK28,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 27. "BLOCK27,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 26. "BLOCK26,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 25. "BLOCK25,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 24. "BLOCK24,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 23. "BLOCK23,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 21. "BLOCK21,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 20. "BLOCK20,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 19. "BLOCK19,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 18. "BLOCK18,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 17. "BLOCK17,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 16. "BLOCK16,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 15. "BLOCK15,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 14. "BLOCK14,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 13. "BLOCK13,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 12. "BLOCK12,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 11. "BLOCK11,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 10. "BLOCK10,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 9. "BLOCK9,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 8. "BLOCK8,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 7. "BLOCK7,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 6. "BLOCK6,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 5. "BLOCK5,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 4. "BLOCK4,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 3. "BLOCK3,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 2. "BLOCK2,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 1. "BLOCK1,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 0. "BLOCK0,IP block status" "0: Clock is not running.,1: Clock is running." line.long 0x4 "PRTN1_COFB1_STAT,Partition 1 COFB Set 1 Clock Status Register" bitfld.long 0x4 31. "BLOCK63,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 30. "BLOCK62,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 29. "BLOCK61,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 28. "BLOCK60,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 27. "BLOCK59,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 26. "BLOCK58,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 24. "BLOCK56,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 23. "BLOCK55,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 22. "BLOCK54,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 21. "BLOCK53,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 20. "BLOCK52,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 18. "BLOCK50,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 15. "BLOCK47,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 13. "BLOCK45,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 11. "BLOCK43,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 10. "BLOCK42,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 9. "BLOCK41,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 8. "BLOCK40,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 7. "BLOCK39,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 6. "BLOCK38,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 5. "BLOCK37,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 4. "BLOCK36,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 3. "BLOCK35,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 2. "BLOCK34,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 1. "BLOCK33,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 0. "BLOCK32,IP block status" "0: Clock is not running.,1: Clock is running." line.long 0x8 "PRTN1_COFB2_STAT,Partition 1 COFB Set 2 Clock Status Register" bitfld.long 0x8 31. "BLOCK95,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 29. "BLOCK93,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 28. "BLOCK92,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 25. "BLOCK89,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 24. "BLOCK88,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 23. "BLOCK87,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 22. "BLOCK86,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 21. "BLOCK85,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 20. "BLOCK84,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 13. "BLOCK77,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 12. "BLOCK76,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 11. "BLOCK75,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 10. "BLOCK74,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 9. "BLOCK73,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 6. "BLOCK70,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 5. "BLOCK69,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 4. "BLOCK68,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 3. "BLOCK67,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 2. "BLOCK66,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 1. "BLOCK65,IP block status" "0: Clock is not running.,1: Clock is running." line.long 0xC "PRTN1_COFB3_STAT,Partition 1 COFB Set 3 Clock Status Register" bitfld.long 0xC 14. "BLOCK110,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0xC 12. "BLOCK108,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0xC 11. "BLOCK107,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0xC 10. "BLOCK106,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0xC 9. "BLOCK105,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0xC 8. "BLOCK104,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0xC 7. "BLOCK103,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0xC 6. "BLOCK102,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0xC 5. "BLOCK101,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0xC 3. "BLOCK99,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0xC 2. "BLOCK98,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0xC 1. "BLOCK97,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0xC 0. "BLOCK96,IP block status" "0: Clock is not running.,1: Clock is running." group.long 0x330++0xF line.long 0x0 "PRTN1_COFB0_CLKEN,Partition 1 COFB Set 0 Clock Enable Register" bitfld.long 0x0 31. "REQ31,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 29. "REQ29,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 28. "REQ28,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 24. "REQ24,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 23. "REQ23,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 21. "REQ21,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 15. "REQ15,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 14. "REQ14,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 13. "REQ13,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 12. "REQ12,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 11. "REQ11,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 10. "REQ10,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 9. "REQ9,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 8. "REQ8,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 7. "REQ7,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 6. "REQ6,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 5. "REQ5,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 4. "REQ4,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 3. "REQ3,Clock enable" "0: Clock is turned off.,1: Clock is turned on." line.long 0x4 "PRTN1_COFB1_CLKEN,Partition 1 COFB Set 1 Clock Enable Register" bitfld.long 0x4 31. "REQ63,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 24. "REQ56,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 21. "REQ53,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 15. "REQ47,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 13. "REQ45,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 10. "REQ42,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 2. "REQ34,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 1. "REQ33,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 0. "REQ32,Clock enable" "0: Clock is turned off.,1: Clock is turned on." line.long 0x8 "PRTN1_COFB2_CLKEN,Partition 1 COFB Set 2 Clock Enable Register" bitfld.long 0x8 31. "REQ95,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 29. "REQ93,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 28. "REQ92,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x8 25. "REQ89,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 24. "REQ88,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 23. "REQ87,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x8 22. "REQ86,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 21. "REQ85,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 20. "REQ84,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x8 13. "REQ77,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 12. "REQ76,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 11. "REQ75,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x8 10. "REQ74,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 9. "REQ73,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 6. "REQ70,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x8 5. "REQ69,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 4. "REQ68,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 3. "REQ67,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x8 2. "REQ66,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 1. "REQ65,Clock enable" "0: Clock is turned off.,1: Clock is turned on." line.long 0xC "PRTN1_COFB3_CLKEN,Partition 1 COFB Set 3 Clock Enable Register" bitfld.long 0xC 8. "REQ104,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0xC 6. "REQ102,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0xC 0. "REQ96,Clock enable" "0: Clock is turned off.,1: Clock is turned on." group.long 0x500++0x7 line.long 0x0 "PRTN2_PCONF,Partition 2 Process Configuration Register" bitfld.long 0x0 0. "PCE,Partition clock enable" "0: Disable the clock to IPs,1: Enable the clock to IPs" line.long 0x4 "PRTN2_PUPD,Partition 2 Process Update Register" bitfld.long 0x4 0. "PCUD,Partition clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process" rgroup.long 0x508++0x3 line.long 0x0 "PRTN2_STAT,Partition 2 Status Register" bitfld.long 0x0 0. "PCS,Partition clock status" "0: Clock is inactive,1: Clock is active" rgroup.long 0x510++0xB line.long 0x0 "PRTN2_COFB0_STAT,Partition 2 COFB Set 0 Clock Status Register" bitfld.long 0x0 30. "BLOCK30,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 29. "BLOCK29,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 28. "BLOCK28,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 27. "BLOCK27,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 25. "BLOCK25,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 24. "BLOCK24,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 23. "BLOCK23,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 22. "BLOCK22,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 21. "BLOCK21,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 20. "BLOCK20,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 19. "BLOCK19,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 18. "BLOCK18,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 17. "BLOCK17,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 16. "BLOCK16,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 15. "BLOCK15,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 14. "BLOCK14,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 13. "BLOCK13,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 12. "BLOCK12,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 11. "BLOCK11,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 10. "BLOCK10,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 9. "BLOCK9,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 8. "BLOCK8,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 7. "BLOCK7,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 6. "BLOCK6,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 5. "BLOCK5,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 4. "BLOCK4,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 1. "BLOCK1,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 0. "BLOCK0,IP block status" "0: Clock is not running.,1: Clock is running." line.long 0x4 "PRTN2_COFB1_STAT,Partition 2 COFB Set 1 Clock Status Register" bitfld.long 0x4 31. "BLOCK63,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 30. "BLOCK62,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 29. "BLOCK61,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 28. "BLOCK60,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 27. "BLOCK59,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 19. "BLOCK51,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 16. "BLOCK48,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 15. "BLOCK47,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 0. "BLOCK32,IP block status" "0: Clock is not running.,1: Clock is running." line.long 0x8 "PRTN2_COFB2_STAT,Partition 2 COFB Set 2 Clock Status Register" bitfld.long 0x8 11. "BLOCK75,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 10. "BLOCK74,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 9. "BLOCK73,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 8. "BLOCK72,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 7. "BLOCK71,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 6. "BLOCK70,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 5. "BLOCK69,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 4. "BLOCK68,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 3. "BLOCK67,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x8 2. "BLOCK66,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 1. "BLOCK65,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 0. "BLOCK64,IP block status" "0: Clock is not running.,1: Clock is running." group.long 0x530++0xB line.long 0x0 "PRTN2_COFB0_CLKEN,Partition 2 COFB Set 0 Clock Enable Register" bitfld.long 0x0 30. "REQ30,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 29. "REQ29,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 28. "REQ28,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 27. "REQ27,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 24. "REQ24,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 23. "REQ23,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 22. "REQ22,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 21. "REQ21,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 20. "REQ20,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 19. "REQ19,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 18. "REQ18,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 17. "REQ17,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 16. "REQ16,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 15. "REQ15,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 14. "REQ14,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 13. "REQ13,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 12. "REQ12,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 11. "REQ11,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 10. "REQ10,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 9. "REQ9,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 8. "REQ8,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 7. "REQ7,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 6. "REQ6,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 5. "REQ5,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 4. "REQ4,Clock enable" "0: Clock is turned off.,1: Clock is turned on." line.long 0x4 "PRTN2_COFB1_CLKEN,Partition 2 COFB Set 1 Clock Enable Register" bitfld.long 0x4 31. "REQ63,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 30. "REQ62,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 29. "REQ61,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 28. "REQ60,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 19. "REQ51,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 16. "REQ48,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 15. "REQ47,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 0. "REQ32,Clock enable" "0: Clock is turned off.,1: Clock is turned on." line.long 0x8 "PRTN2_COFB2_CLKEN,Partition 2 COFB Set 2 Clock Enable Register" bitfld.long 0x8 5. "REQ69,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 4. "REQ68,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 3. "REQ67,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x8 2. "REQ66,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 1. "REQ65,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 0. "REQ64,Clock enable" "0: Clock is turned off.,1: Clock is turned on." group.long 0x700++0x7 line.long 0x0 "PRTN3_PCONF,Partition 3 Process Configuration Register" bitfld.long 0x0 0. "PCE,Partition clock enable" "0: Disable the clock to IPs,1: Enable the clock to IPs" line.long 0x4 "PRTN3_PUPD,Partition 3 Process Update Register" bitfld.long 0x4 0. "PCUD,Partition clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process" rgroup.long 0x708++0x3 line.long 0x0 "PRTN3_STAT,Partition 3 Status Register" bitfld.long 0x0 0. "PCS,Partition clock status" "0: Clock is inactive,1: Clock is active" rgroup.long 0x710++0xB line.long 0x0 "PRTN3_COFB0_STAT,Partition 3 COFB Set 0 Clock Status Register" bitfld.long 0x0 30. "BLOCK30,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 29. "BLOCK29,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 15. "BLOCK15,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 14. "BLOCK14,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 13. "BLOCK13,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 12. "BLOCK12,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 11. "BLOCK11,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 10. "BLOCK10,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 9. "BLOCK9,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 8. "BLOCK8,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 7. "BLOCK7,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 6. "BLOCK6,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 5. "BLOCK5,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 4. "BLOCK4,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 3. "BLOCK3,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x0 2. "BLOCK2,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 1. "BLOCK1,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x0 0. "BLOCK0,IP block status" "0: Clock is not running.,1: Clock is running." line.long 0x4 "PRTN3_COFB1_STAT,Partition 3 COFB Set 1 Clock Status Register" bitfld.long 0x4 31. "BLOCK63,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 30. "BLOCK62,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 29. "BLOCK61,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 27. "BLOCK59,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 26. "BLOCK58,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 25. "BLOCK57,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 24. "BLOCK56,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 23. "BLOCK55,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 22. "BLOCK54,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 21. "BLOCK53,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 20. "BLOCK52,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 19. "BLOCK51,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 18. "BLOCK50,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 17. "BLOCK49,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 16. "BLOCK48,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 15. "BLOCK47,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 14. "BLOCK46,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 12. "BLOCK44,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 9. "BLOCK41,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 8. "BLOCK40,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 5. "BLOCK37,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 4. "BLOCK36,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 3. "BLOCK35,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x4 2. "BLOCK34,IP block status" "0: Clock is not running.,1: Clock is running." newline bitfld.long 0x4 0. "BLOCK32,IP block status" "0: Clock is not running.,1: Clock is running." line.long 0x8 "PRTN3_COFB2_STAT,Partition 3 COFB Set 2 Clock Status Register" bitfld.long 0x8 1. "BLOCK65,IP block status" "0: Clock is not running.,1: Clock is running." bitfld.long 0x8 0. "BLOCK64,IP block status" "0: Clock is not running.,1: Clock is running." group.long 0x730++0xB line.long 0x0 "PRTN3_COFB0_CLKEN,Partition 3 COFB Set 0 Clock Enable Register" bitfld.long 0x0 15. "REQ15,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 14. "REQ14,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 13. "REQ13,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 12. "REQ12,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 11. "REQ11,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 10. "REQ10,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 9. "REQ9,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 8. "REQ8,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 7. "REQ7,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 6. "REQ6,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 5. "REQ5,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 4. "REQ4,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 3. "REQ3,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 2. "REQ2,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x0 1. "REQ1,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x0 0. "REQ0,Clock enable" "0: Clock is turned off.,1: Clock is turned on." line.long 0x4 "PRTN3_COFB1_CLKEN,Partition 3 COFB Set 1 Clock Enable Register" bitfld.long 0x4 31. "REQ63,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 30. "REQ62,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 29. "REQ61,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 27. "REQ59,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 26. "REQ58,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 25. "REQ57,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 24. "REQ56,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 23. "REQ55,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 22. "REQ54,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 21. "REQ53,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 20. "REQ52,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 19. "REQ51,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 18. "REQ50,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 17. "REQ49,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 16. "REQ48,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 15. "REQ47,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 14. "REQ46,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 12. "REQ44,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 9. "REQ41,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 8. "REQ40,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 5. "REQ37,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 4. "REQ36,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 3. "REQ35,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x4 2. "REQ34,Clock enable" "0: Clock is turned off.,1: Clock is turned on." newline bitfld.long 0x4 0. "REQ32,Clock enable" "0: Clock is turned off.,1: Clock is turned on." line.long 0x8 "PRTN3_COFB2_CLKEN,Partition 3 COFB Set 2 Clock Enable Register" bitfld.long 0x8 1. "REQ65,Clock enable" "0: Clock is turned off.,1: Clock is turned on." bitfld.long 0x8 0. "REQ64,Clock enable" "0: Clock is turned off.,1: Clock is turned on." tree.end tree "MC_RGM (Reset Generation Module)" base ad:0x4028C000 group.long 0x0++0x3 line.long 0x0 "DES,Destructive Event Status Register" eventfld.long 0x0 30. "DEBUG_DEST,Flag for 'Destructive' Reset DEBUG_DEST" "0: 'Destructive' reset event DEBUG_DEST has not..,1: 'Destructive' reset event DEBUG_DEST has occurred." eventfld.long 0x0 29. "SW_DEST,Flag for 'Destructive' Reset SW_DEST" "0: 'Destructive' reset event SW_DEST has not..,1: 'Destructive' reset event SW_DEST has occurred." newline eventfld.long 0x0 18. "HSE_SNVS_RST,Flag for 'Destructive' Reset HSE_SNVS_RST" "0: 'Destructive' reset event HSE_SNVS_RST has not..,1: 'Destructive' reset event HSE_SNVS_RST has.." eventfld.long 0x0 17. "HSE_TMPR_RST,Flag for 'Destructive' Reset HSE_TMPR_RST" "0: 'Destructive' reset event HSE_TMPR_RST has not..,1: 'Destructive' reset event HSE_TMPR_RST has.." newline eventfld.long 0x0 16. "CM7_CORE_CLK_FAIL,Flag for 'Destructive' Reset CM7_CORE_CLK_FAIL" "0: 'Destructive' reset event CM7_CORE_CLK_FAIL has..,1: 'Destructive' reset event CM7_CORE_CLK_FAIL has.." eventfld.long 0x0 15. "SYS_DIV_FAIL,Flag for 'Destructive' Reset SYS_DIV_FAIL" "0: 'Destructive' reset event SYS_DIV_FAIL has not..,1: 'Destructive' reset event SYS_DIV_FAIL has.." newline eventfld.long 0x0 14. "HSE_CLK_FAIL,Flag for 'Destructive' Reset HSE_CLK_FAIL" "0: 'Destructive' reset event HSE_CLK_FAIL has not..,1: 'Destructive' reset event HSE_CLK_FAIL has.." eventfld.long 0x0 12. "AIPS_PLAT_CLK_FAIL,Flag for 'Destructive' Reset AIPS_PLAT_CLK_FAIL" "0: 'Destructive' reset event AIPS_PLAT_CLK_FAIL has..,1: 'Destructive' reset event AIPS_PLAT_CLK_FAIL has.." newline eventfld.long 0x0 10. "CORE_CLK_FAIL,Flag for 'Destructive' Reset CORE_CLK_FAIL" "0: 'Destructive' reset event CORE_CLK_FAIL has not..,1: 'Destructive' reset event CORE_CLK_FAIL has.." eventfld.long 0x0 9. "PLL_LOL,Flag for 'Destructive' Reset PLL_LOL" "0: 'Destructive' reset event PLL_LOL has not..,1: 'Destructive' reset event PLL_LOL has occurred." newline eventfld.long 0x0 8. "FXOSC_FAIL,Flag for 'Destructive' Reset FXOSC_FAIL" "0: 'Destructive' reset event FXOSC_FAIL has not..,1: 'Destructive' reset event FXOSC_FAIL has occurred." eventfld.long 0x0 6. "MC_RGM_FRE,Flag for 'Destructive' Reset MC_RGM_FRE" "0: 'Destructive' reset event MC_RGM_FRE has not..,1: 'Destructive' reset event MC_RGM_FRE has occurred." newline eventfld.long 0x0 4. "STCU_URF,Flag for 'Destructive' Reset STCU_URF" "0: 'Destructive' reset event STCU_URF has not..,1: 'Destructive' reset event STCU_URF has occurred." eventfld.long 0x0 3. "FCCU_FTR,Flag for 'Destructive' Reset FCCU_FTR" "0: 'Destructive' reset event FCCU_FTR has not..,1: 'Destructive' reset event FCCU_FTR has occurred." newline eventfld.long 0x0 0. "F_POR,Flag for power-on reset" "0: No power-on event has occurred since the last..,1: A power-on event has occurred." group.long 0x8++0x1F line.long 0x0 "FES,Functional /External Reset Status Register" eventfld.long 0x0 30. "DEBUG_FUNC,Flag for 'Functional' Reset DEBUG_FUNC" "0: 'Functional' reset event DEBUG_FUNC has not..,1: 'Functional' reset event DEBUG_FUNC has occurred." eventfld.long 0x0 29. "SW_FUNC,Flag for 'Functional' Reset SW_FUNC" "0: 'Functional' reset event SW_FUNC has not..,1: 'Functional' reset event SW_FUNC has occurred." newline eventfld.long 0x0 20. "HSE_BOOT_RST,Flag for 'Functional' Reset HSE_BOOT_RST" "0: 'Functional' reset event HSE_BOOT_RST has not..,1: 'Functional' reset event HSE_BOOT_RST has.." eventfld.long 0x0 16. "HSE_SWT_RST,Flag for 'Functional' Reset HSE_SWT_RST" "0: 'Functional' reset event HSE_SWT_RST has not..,1: 'Functional' reset event HSE_SWT_RST has occurred." newline eventfld.long 0x0 9. "JTAG_RST,Flag for 'Functional' Reset JTAG_RST" "0: 'Functional' reset event JTAG_RST has not..,1: 'Functional' reset event JTAG_RST has occurred." eventfld.long 0x0 8. "SWT2_RST,Flag for 'Functional' Reset SWT2_RST" "0: 'Functional' reset event SWT2_RST has not..,1: 'Functional' reset event SWT2_RST has occurred." newline eventfld.long 0x0 7. "SWT1_RST,Flag for 'Functional' Reset SWT1_RST" "0: 'Functional' reset event SWT1_RST has not..,1: 'Functional' reset event SWT1_RST has occurred." eventfld.long 0x0 6. "SWT0_RST,Flag for 'Functional' Reset SWT0_RST" "0: 'Functional' reset event SWT0_RST has not..,1: 'Functional' reset event SWT0_RST has occurred." newline eventfld.long 0x0 4. "ST_DONE,Flag for 'Functional' Reset ST_DONE" "0: 'Functional' reset event ST_DONE has not..,1: 'Functional' reset event ST_DONE has occurred." eventfld.long 0x0 3. "FCCU_RST,Flag for 'Functional' Reset FCCU_RST" "0: 'Functional' reset event FCCU_RST has not..,1: 'Functional' reset event FCCU_RST has occurred." newline eventfld.long 0x0 0. "F_EXR,Flag for External Reset" "0: No external reset event has occurred since..,1: An external reset event has occurred." line.long 0x4 "FERD,Functional Event Reset Disable Register" bitfld.long 0x4 30. "D_DEBUG_FUNC,DEBUG_FUNC Disable Control" "0: Functional reset event DEBUG_FUNC triggers a..,1: Functional reset event DEBUG_FUNC generates an.." bitfld.long 0x4 9. "D_JTAG_RST,JTAG_RST Disable Control" "0: Functional reset event JTAG_RST triggers a reset..,1: Functional reset event JTAG_RST generates an.." newline bitfld.long 0x4 8. "D_SWT2_RST,SWT2_RST Disable Control" "0: Functional reset event SWT2_RST triggers a reset..,1: Functional reset event SWT2_RST generates an.." bitfld.long 0x4 7. "D_SWT1_RST,SWT1_RST Disable Control" "0: Functional reset event SWT1_RST triggers a reset..,1: Functional reset event SWT1_RST generates an.." newline bitfld.long 0x4 6. "D_SWT0_RST,SWT0_RST Disable Control" "0: Functional reset event SWT0_RST triggers a reset..,1: Functional reset event SWT0_RST generates an.." bitfld.long 0x4 3. "D_FCCU_RST,FCCU_RST Disable Control" "0: Functional reset event FCCU_RST triggers a reset..,1: Functional reset event FCCU_RST generates an.." line.long 0x8 "FBRE,Functional Bidirectional Reset Enable Register" rbitfld.long 0x8 30. "BE_DEBUG_FUNC,Bidirectional Reset Enables for 'Functional' Reset DEBUG_FUNC" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." rbitfld.long 0x8 29. "BE_SW_FUNC,Bidirectional Reset Enables for 'Functional' Reset SW_FUNC" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." newline rbitfld.long 0x8 20. "BE_HSE_BOOT_RST,Bidirectional Reset Enables for 'Functional' Reset HSE_BOOT_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." rbitfld.long 0x8 16. "BE_HSE_SWT_RST,Bidirectional Reset Enables for 'Functional' Reset HSE_SWT_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." newline rbitfld.long 0x8 9. "BE_JTAG_RST,Bidirectional Reset Enables for 'Functional' Reset JTAG_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." rbitfld.long 0x8 8. "BE_SWT2_RST,Bidirectional Reset Enables for 'Functional' Reset SWT2_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." newline rbitfld.long 0x8 7. "BE_SWT1_RST,Bidirectional Reset Enables for 'Functional' Reset SWT1_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." rbitfld.long 0x8 6. "BE_SWT0_RST,Bidirectional Reset Enables for 'Functional' Reset SWT0_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." newline bitfld.long 0x8 4. "BE_ST_DONE,Bidirectional Reset Enables for 'Functional' Reset ST_DONE" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." rbitfld.long 0x8 3. "BE_FCCU_RST,Bidirectional Reset Enables for 'Functional' Reset FCCU_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.." line.long 0xC "FREC,Functional Reset Escalation Counter Register" hexmask.long.byte 0xC 0.--3. 1. "FREC,Functional' Reset Escalation Counter" line.long 0x10 "FRET,Functional Reset Escalation Threshold Register" hexmask.long.byte 0x10 0.--3. 1. "FRET,'Functional' Reset Escalation Threshold" line.long 0x14 "DRET,Destructive Reset Escalation Threshold Register" hexmask.long.byte 0x14 0.--3. 1. "DRET,'Destructive' Reset Escalation Threshold" line.long 0x18 "ERCTRL,External Reset Control Register" bitfld.long 0x18 0. "ERASSERT,ERASSERT" "0: No change,1: External reset is asserted" line.long 0x1C "RDSS,Reset During Standby Status Register" eventfld.long 0x1C 1. "FES_RES,FES_RES" "0: No functional reset event occurred during..,1: Functional reset event occurred during standby.." eventfld.long 0x1C 0. "DES_RES,DES_RES" "0: No destructive reset event occurred during..,1: Destructive reset event occurred during standby.." tree.end tree "MCM_CM7 (Miscellaneous Control Module (Cortex-M7))" base ad:0x0 tree "MCM_0_CM7" base ad:0xE0080000 rgroup.word 0x0++0x3 line.word 0x0 "PLREV,SoC-defined Platform Revision" hexmask.word 0x0 0.--15. 1. "PLREV,The PLREV[15:0] field is specified by a platform input signal to define a software-visible revision number." line.word 0x2 "PCT,Processor Core Type" hexmask.word 0x2 0.--15. 1. "PCT,This MCM design supports the Arm Cortex M7 core. The following value identifies this core complex." group.long 0xC++0x7 line.long 0x0 "CPCR,Core Platform Control" bitfld.long 0x0 27. "CM7_AHBSPRI,AHB Slave Priority" "0: Uses a round-robin arbitration scheme,1: AHB-slave access has priority over a core access" line.long 0x4 "ISCR,Interrupt Status and Control" bitfld.long 0x4 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 21. "WABE,TCM Write Abort Interrupt Enable" "0: Disable interrupt,1: Enable Interrupt" rbitfld.long 0x4 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 6. "WABSO,Write Abort on Slave Overrun" "0: No write abort overrun,1: Write abort overrun occurred" newline eventfld.long 0x4 5. "WABS,Write Abort on Slave" "0: No write abort occurred on AHBS interface,1: Write abort occurred on AHBS interface" rgroup.long 0x400++0x13 line.long 0x0 "LMEM_DESC_0,Local Memory Descriptor 0" bitfld.long 0x0 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x0 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x0 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x0 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x0 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x0 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x4 "LMEM_DESC_1,Local Memory Descriptor 1" bitfld.long 0x4 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x4 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x4 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x4 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x4 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x4 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x8 "LMEM_DESC_2,Local Memory Descriptor 2" bitfld.long 0x8 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x8 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x8 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x8 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x8 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x8 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0xC "LMEM_DESC_3,Local Memory Descriptor 3" bitfld.long 0xC 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0xC 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0xC 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0xC 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0xC 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0xC 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x10 "LMEM_DESC_4,Local Memory Descriptor 4" bitfld.long 0x10 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x10 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x10 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x10 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x10 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x10 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" tree.end tree "MCM_1_CM7" base ad:0xE0080000 rgroup.word 0x0++0x3 line.word 0x0 "PLREV,SoC-defined Platform Revision" hexmask.word 0x0 0.--15. 1. "PLREV,The PLREV[15:0] field is specified by a platform input signal to define a software-visible revision number." line.word 0x2 "PCT,Processor Core Type" hexmask.word 0x2 0.--15. 1. "PCT,This MCM design supports the Arm Cortex M7 core. The following value identifies this core complex." group.long 0xC++0x7 line.long 0x0 "CPCR,Core Platform Control" bitfld.long 0x0 27. "CM7_AHBSPRI,AHB Slave Priority" "0: Uses a round-robin arbitration scheme,1: AHB-slave access has priority over a core access" line.long 0x4 "ISCR,Interrupt Status and Control" bitfld.long 0x4 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 21. "WABE,TCM Write Abort Interrupt Enable" "0: Disable interrupt,1: Enable Interrupt" rbitfld.long 0x4 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 6. "WABSO,Write Abort on Slave Overrun" "0: No write abort overrun,1: Write abort overrun occurred" newline eventfld.long 0x4 5. "WABS,Write Abort on Slave" "0: No write abort occurred on AHBS interface,1: Write abort occurred on AHBS interface" rgroup.long 0x400++0x13 line.long 0x0 "LMEM_DESC_0,Local Memory Descriptor 0" bitfld.long 0x0 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x0 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x0 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x0 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x0 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x0 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x4 "LMEM_DESC_1,Local Memory Descriptor 1" bitfld.long 0x4 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x4 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x4 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x4 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x4 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x4 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x8 "LMEM_DESC_2,Local Memory Descriptor 2" bitfld.long 0x8 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x8 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x8 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x8 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x8 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x8 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0xC "LMEM_DESC_3,Local Memory Descriptor 3" bitfld.long 0xC 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0xC 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0xC 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0xC 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0xC 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0xC 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x10 "LMEM_DESC_4,Local Memory Descriptor 4" bitfld.long 0x10 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x10 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x10 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x10 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x10 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x10 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" tree.end tree "MCM_2_CM7" base ad:0xE0080000 rgroup.word 0x0++0x3 line.word 0x0 "PLREV,SoC-defined Platform Revision" hexmask.word 0x0 0.--15. 1. "PLREV,The PLREV[15:0] field is specified by a platform input signal to define a software-visible revision number." line.word 0x2 "PCT,Processor Core Type" hexmask.word 0x2 0.--15. 1. "PCT,This MCM design supports the Arm Cortex M7 core. The following value identifies this core complex." group.long 0xC++0x7 line.long 0x0 "CPCR,Core Platform Control" bitfld.long 0x0 27. "CM7_AHBSPRI,AHB Slave Priority" "0: Uses a round-robin arbitration scheme,1: AHB-slave access has priority over a core access" line.long 0x4 "ISCR,Interrupt Status and Control" bitfld.long 0x4 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 21. "WABE,TCM Write Abort Interrupt Enable" "0: Disable interrupt,1: Enable Interrupt" rbitfld.long 0x4 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 6. "WABSO,Write Abort on Slave Overrun" "0: No write abort overrun,1: Write abort overrun occurred" newline eventfld.long 0x4 5. "WABS,Write Abort on Slave" "0: No write abort occurred on AHBS interface,1: Write abort occurred on AHBS interface" rgroup.long 0x400++0x13 line.long 0x0 "LMEM_DESC_0,Local Memory Descriptor 0" bitfld.long 0x0 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x0 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x0 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x0 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x0 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x0 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x4 "LMEM_DESC_1,Local Memory Descriptor 1" bitfld.long 0x4 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x4 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x4 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x4 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x4 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x4 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x8 "LMEM_DESC_2,Local Memory Descriptor 2" bitfld.long 0x8 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x8 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x8 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x8 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x8 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x8 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0xC "LMEM_DESC_3,Local Memory Descriptor 3" bitfld.long 0xC 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0xC 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0xC 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0xC 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0xC 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0xC 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x10 "LMEM_DESC_4,Local Memory Descriptor 4" bitfld.long 0x10 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x10 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x10 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x10 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x10 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x10 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" tree.end tree "MCM_3_CM7" base ad:0xE0080000 rgroup.word 0x0++0x3 line.word 0x0 "PLREV,SoC-defined Platform Revision" hexmask.word 0x0 0.--15. 1. "PLREV,The PLREV[15:0] field is specified by a platform input signal to define a software-visible revision number." line.word 0x2 "PCT,Processor Core Type" hexmask.word 0x2 0.--15. 1. "PCT,This MCM design supports the Arm Cortex M7 core. The following value identifies this core complex." group.long 0xC++0x7 line.long 0x0 "CPCR,Core Platform Control" bitfld.long 0x0 27. "CM7_AHBSPRI,AHB Slave Priority" "0: Uses a round-robin arbitration scheme,1: AHB-slave access has priority over a core access" line.long 0x4 "ISCR,Interrupt Status and Control" bitfld.long 0x4 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x4 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x4 21. "WABE,TCM Write Abort Interrupt Enable" "0: Disable interrupt,1: Enable Interrupt" rbitfld.long 0x4 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x4 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x4 6. "WABSO,Write Abort on Slave Overrun" "0: No write abort overrun,1: Write abort overrun occurred" newline eventfld.long 0x4 5. "WABS,Write Abort on Slave" "0: No write abort occurred on AHBS interface,1: Write abort occurred on AHBS interface" rgroup.long 0x400++0x13 line.long 0x0 "LMEM_DESC_0,Local Memory Descriptor 0" bitfld.long 0x0 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x0 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x0 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x0 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x0 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x0 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x4 "LMEM_DESC_1,Local Memory Descriptor 1" bitfld.long 0x4 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x4 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x4 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x4 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x4 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x4 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x8 "LMEM_DESC_2,Local Memory Descriptor 2" bitfld.long 0x8 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x8 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x8 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x8 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x8 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x8 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0xC "LMEM_DESC_3,Local Memory Descriptor 3" bitfld.long 0xC 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0xC 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0xC 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0xC 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0xC 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0xC 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" line.long 0x10 "LMEM_DESC_4,Local Memory Descriptor 4" bitfld.long 0x10 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present" bitfld.long 0x10 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.." newline hexmask.long.byte 0x10 24.--27. 1. "LMSZ,Local Memory Size" hexmask.long.byte 0x10 20.--23. 1. "WY,Level 1 Cache Ways" newline bitfld.long 0x10 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?" bitfld.long 0x10 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?" tree.end tree.end tree "MDM_AP (Miscellaneous Debug Module Access Port)" base edp:0x600 rgroup.long 0x0++0x3 line.long 0x0 "MDMAPSTTS,Status" bitfld.long 0x0 31. "CM72DBGRSTRD,Cortex-M7_2 Debug Restarted" "0: In Debug mode,1: In Normal mode" newline bitfld.long 0x0 29. "CM71DBGRSTRD,Cortex-M7_1 Debug Restarted" "0: In Debug mode,1: In Normal mode" newline bitfld.long 0x0 28. "CM70DBGRSTRD,Cortex-M7_0 Debug Restarted" "0: In Debug mode,1: In Normal mode" newline bitfld.long 0x0 22. "CM72SLPNG,CM7_2 Sleeping" "0: Not in Sleep mode,1: In Sleep mode" newline bitfld.long 0x0 21. "CM71SLPNG,CM7_1 Sleeping" "0: Not in Sleep mode,1: In Sleep mode" newline bitfld.long 0x0 20. "CM70SLPNG,Cortex-M7_0 Sleeping" "0: Not in Sleep mode,1: In Sleep mode" newline bitfld.long 0x0 18. "CM72DPSLP,Cortex-M7_2 Deep Sleep" "0: Not in Deep Sleep mode,1: In Deep Sleep mode" newline bitfld.long 0x0 17. "CM71DPSLP,Cortex-M7_1 Deep Sleep" "0: Not in Deep Sleep mode,1: In Deep Sleep mode" newline bitfld.long 0x0 16. "CM70DPSLP,Cortex-M7_0 Deep Sleep" "0: Not in Deep Sleep mode,1: In Deep Sleep mode" newline bitfld.long 0x0 14. "CM72HLT,CM7_2 Debug Halted" "0: Core is not halted,1: Core is halted" newline bitfld.long 0x0 13. "CM71HLT,CM7_1 Debug Halted" "0: Core is not halted,1: Core is halted" newline bitfld.long 0x0 12. "CM70HLT,Cortex-M7_0 Halted" "0: Core is not halted,1: Core is halted" newline bitfld.long 0x0 2. "FUNCRST,Functional Reset" "0: Not in functional reset,1: In functional reset" newline bitfld.long 0x0 1. "DESTRST,Destructive Reset" "0: Not in destructive reset,1: In destructive reset" group.long 0x4++0x27 line.long 0x0 "MDMAPCTL,Control" bitfld.long 0x0 31. "CM72DBGRSRT,Cortex-M7_2 Debug Restart" "0: Normal operation,1: Request asserted" newline bitfld.long 0x0 29. "CM71DBGRSRT,Cortex-M7_1 Debug Restart" "0: Normal operation,1: Request asserted" newline bitfld.long 0x0 28. "CM70DBGRSRT,Cortex-M7_0 Debug Restart" "0: Normal operation,1: Request asserted" newline bitfld.long 0x0 22. "SWOOVRD,SWO Override" "0: Not overridden and SWO generates the trace..,1: Is overridden" newline bitfld.long 0x0 20. "TRIUOVRD,TPIU Override" "0: Not overridden and TPIU generates the trace..,1: Is overridden and asserted" newline bitfld.long 0x0 19. "CM7_2_CHK_CORE_ACCESS,Debugger Access To Application Cortex-M7_2 checker core" "0: Supported,1: Not supported" newline bitfld.long 0x0 18. "CM7_2_CORE_ACCESS,Debugger Access To Application Cortex-M7_2" "0: Supported,1: Not supported" newline bitfld.long 0x0 17. "CM7_1_CORE_ACCESS,Debugger Access To Application Cortex-M7_1" "0: Supported,1: Not supported" newline bitfld.long 0x0 16. "CM7_0_CORE_ACCESS,Debugger Access To Application Cortex-M7_0" "0: Supported,1: Not supported" newline bitfld.long 0x0 15. "POR_WDG_DIS,Power Watchdog Status" "0: Power watchdog is disabled,1: Power watchdog is enabled" newline bitfld.long 0x0 13. "DBGRSTFASTPAD,Debug Over Reset Via Fast Pads" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "DBGRSTSLOWPAD,Debug Over Reset Via Slow Pads" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "CM72DBGREQ,Cortex-M7_2 Debug Request" "0: Debug request is not generated,1: Debug request is generated" newline bitfld.long 0x0 9. "CM71DBGREQ,Cortex-M7_1 Debug Request" "0: Debug request is not generated,1: Debug request is generated" newline bitfld.long 0x0 8. "CM70DBGREQ,Cortex-M7_0 Debug Request" "0: Debug request is not generated,1: Debug request is generated" newline bitfld.long 0x0 5. "SYSFUNCRST,System Functional Reset" "0: Deasserted,1: Asserted" newline bitfld.long 0x0 4. "SYSRESETREQ,System Destructive Reset" "0: Deasserted,1: Asserted" line.long 0x4 "MDMAPDTSEN,DTS Enable" bitfld.long 0x4 3. "DTSEND,Enable the Trigger Functionality using DTS Semaphore D Register" "0: Disable Triggers,1: Enable Triggers" newline bitfld.long 0x4 2. "DTSENC,Enable the Trigger Functionality using DTS Semaphore C Register" "0: Disable Triggers,1: Enable Triggers" newline bitfld.long 0x4 1. "DTSENB,Enable the Trigger Functionality using DTS Semaphore B Register" "0: Disable Triggers,1: Enable Triggers" newline bitfld.long 0x4 0. "DTSEN,Enable the Trigger Functionality using DTS Semaphore Register" "0: Disable Triggers,1: Enable Triggers" line.long 0x8 "MDMAPDTSSTARTUP,DTS Startup" hexmask.long 0x8 0.--31. 1. "AD,Application Dependent register bits. Application Dependent register bits. The bits have no defined meaning to the microcontroller. They are used by an external tool to pass information (for example application options and status) to the application.." line.long 0xC "MDMAPDTSSTARTUPB,DTS Startup B" hexmask.long 0xC 0.--31. 1. "AD,Application Dependent register bits. Application Dependent register bits. The bits have no defined meaning to the microcontroller. They are used by an external tool to pass information (for example application options and status) to the application.." line.long 0x10 "MDMAPDTSSTARTUPC,DTS Startup C" hexmask.long 0x10 0.--31. 1. "AD,Application Dependent register bits. Application Dependent register bits. The bits have no defined meaning to the microcontroller. They are used by an external tool to pass information (for example application options and status) to the application.." line.long 0x14 "MDMAPDTSSTARTUPD,DTS Startup D" hexmask.long 0x14 0.--31. 1. "AD,Application Dependent register bits. Application Dependent register bits. The bits have no defined meaning to the microcontroller. They are used by an external tool to pass information (for example application options and status) to the application.." line.long 0x18 "MDMAPDTSSEMAPHORE,DTS Semaphore" hexmask.long 0x18 0.--31. 1. "ST,Semaphore Trigger" line.long 0x1C "MDMAPDTSSEMAPHOREB,DTS Semaphore B" hexmask.long 0x1C 0.--31. 1. "ST,Semaphore Trigger Extension" line.long 0x20 "MDMAPDTSSEMAPHOREC,DTS Semaphore C" hexmask.long 0x20 0.--31. 1. "ST,Semaphore Trigger Extension" line.long 0x24 "MDMAPDTSSEMAPHORED,DTS Semaphore D" hexmask.long 0x24 0.--31. 1. "ST,Semaphore Trigger Extension" group.long 0x30++0x3 line.long 0x0 "MDMAPWIREN,WIR Enable" bitfld.long 0x0 1. "LWPRSTPRVT,Low-Power Entry" "0: Prevents MC_RGM from generating the reset until..,1: Prevents MC_RGM from generating the reset even.." newline bitfld.long 0x0 0. "LWPWREN,Low Power Debug Enable" "0: Disabled,1: Enabled" rgroup.long 0x34++0x3 line.long 0x0 "MDMAPWIRSTTS,WIR Status" hexmask.long 0x0 0.--31. 1. "MDM_DAP_WIR_STATUS,MDM_AP WIR Status" group.long 0x38++0x3 line.long 0x0 "MDMAPWIRREL,WIR Release" bitfld.long 0x0 1. "PRVNTRSTRGM,Prevent Reset" "0: Normal operation,1: MC_RGM prevented" newline bitfld.long 0x0 0. "WTRSTRGM,Wait In Reset B" "0: Normal operation,1: Wait supported" rgroup.long 0xFC++0x3 line.long 0x0 "ID,Identity" hexmask.long 0x0 0.--31. 1. "ID,Identity" tree.end tree "MSCM (Miscellaneous System Control Module)" base ad:0x40260000 rgroup.long 0x0++0x17 line.long 0x0 "CPXTYPE,Processor X Type" hexmask.long 0x0 0.--31. 1. "PERSONALITY,Personality of CPx" line.long 0x4 "CPXNUM,Processor X Number" bitfld.long 0x4 0.--1. "CPN,Processor Number" "0: Cortex-M7 core 0,1: Cortex-M7 core 1,2: Cortex-M7 core 2,?" line.long 0x8 "CPXREV,Processor X Revision" hexmask.long.byte 0x8 0.--7. 1. "RYPZ,Processor Revision" line.long 0xC "CPXCFG0,Processor X Configuration 0" hexmask.long.byte 0xC 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size" hexmask.long.byte 0xC 16.--23. 1. "ICWY,L1 Instruction Cache Ways" newline hexmask.long.byte 0xC 8.--15. 1. "DCSZ,L1 Data Cache Size" hexmask.long.byte 0xC 0.--7. 1. "DCWY,L1 Data Cache Ways" line.long 0x10 "CPXCFG1,Processor X Configuration 1" hexmask.long.byte 0x10 24.--31. 1. "L2SZ,L2 Cache Size" hexmask.long.byte 0x10 16.--23. 1. "L2WY,L2 Cache Ways" line.long 0x14 "CPXCFG2,Processor X Configuration 2" hexmask.long.byte 0x14 24.--31. 1. "DTCMSZ,Tightly Coupled Data Memory Size" hexmask.long.byte 0x14 16.--23. 1. "ITCMSZ,Instruction Tightly Coupled Memory Size" rgroup.long 0x20++0x17 line.long 0x0 "CP0TYPE,Processor 0 Type" hexmask.long 0x0 0.--31. 1. "PERSONALITY,Processor Personality" line.long 0x4 "CP0NUM,Processor 0 Number" bitfld.long 0x4 0.--1. "CPN,Processor Number" "0,1,2,3" line.long 0x8 "CP0REV,Processor 0 Count" hexmask.long.byte 0x8 0.--7. 1. "RYPZ,Processor Revision" line.long 0xC "CP0CFG0,Processor 0 Configuration 0" hexmask.long.byte 0xC 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size" hexmask.long.byte 0xC 16.--23. 1. "ICWY,L1 Instruction Cache Ways" newline hexmask.long.byte 0xC 8.--15. 1. "DCSZ,L1 Data Cache Size" hexmask.long.byte 0xC 0.--7. 1. "DCWY,L1 Data Cache Ways" line.long 0x10 "CP0CFG1,Processor 0 Configuration 1" hexmask.long.byte 0x10 24.--31. 1. "L2SZ,L2 Cache Size" hexmask.long.byte 0x10 16.--23. 1. "L2WY,L2 Cache Ways" line.long 0x14 "CP0CFG2,Processor 0 Configuration 2" hexmask.long.byte 0x14 24.--31. 1. "DTCMSZ,Tightly Coupled Data Memory Size" hexmask.long.byte 0x14 16.--23. 1. "ITCMSZ,Instruction Tightly Coupled Memory Size" rgroup.long 0x40++0x17 line.long 0x0 "CP1TYPE,Processor 1 Type" hexmask.long 0x0 0.--31. 1. "PERSONALITY,Personality Processor" line.long 0x4 "CP1NUM,Processor 1 Number" bitfld.long 0x4 0.--1. "CPN,Processor Number" "0,1,2,3" line.long 0x8 "CP1REV,Processor 1 Count" hexmask.long.byte 0x8 0.--7. 1. "RYPZ,Processor Revision" line.long 0xC "CP1CFG0,Processor 1 Configuration 0" hexmask.long.byte 0xC 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size" hexmask.long.byte 0xC 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways" newline hexmask.long.byte 0xC 8.--15. 1. "DCSZ,L1 Data Cache Size" hexmask.long.byte 0xC 0.--7. 1. "DCWY,L1 Data Cache Ways" line.long 0x10 "CP1CFG1,Processor 1 Configuration 1" hexmask.long.byte 0x10 24.--31. 1. "L2SZ,L2 Cache Size" hexmask.long.byte 0x10 16.--23. 1. "L2WY,L2 Cache Ways" line.long 0x14 "CP1CFG2,Processor 1 Configuration 2" hexmask.long.byte 0x14 24.--31. 1. "DTCMSZ,Tightly Coupled Data Memory Size" hexmask.long.byte 0x14 16.--23. 1. "ITCMSZ,Instruction Tightly Coupled Memory Size" rgroup.long 0x60++0x17 line.long 0x0 "CP2TYPE,Processor 2 Type" hexmask.long 0x0 0.--31. 1. "PERSONALITY,Processor Personality" line.long 0x4 "CP2NUM,Processor 2 Number" bitfld.long 0x4 0.--1. "CPN,Processor Number" "0,1,2,3" line.long 0x8 "CP2REV,Processor 2 Count" hexmask.long.byte 0x8 0.--7. 1. "RYPZ,Processor Revision" line.long 0xC "CP2CFG0,Processor 2 Configuration 0" hexmask.long.byte 0xC 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size" hexmask.long.byte 0xC 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways" newline hexmask.long.byte 0xC 8.--15. 1. "DCSZ,L1 Data Cache Size" hexmask.long.byte 0xC 0.--7. 1. "DCWY,L1 Data Cache Ways" line.long 0x10 "CP2CFG1,Processor 2 Configuration 1" hexmask.long.byte 0x10 24.--31. 1. "L2SZ,L2 Cache Size" hexmask.long.byte 0x10 16.--23. 1. "L2WY,L2 Cache Ways" line.long 0x14 "CP2CFG2,Processor 2 Configuration 2" hexmask.long.byte 0x14 24.--31. 1. "DTCMSZ,Tightly Coupled Data Memory Size" hexmask.long.byte 0x14 16.--23. 1. "ITCMSZ,Instruction Tightly Coupled Memory Size" group.long 0x200++0x17 line.long 0x0 "IRCP0ISR0,Interrupt Router CP0 Interrupt Status" eventfld.long 0x0 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x0 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x0 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0x4 "IRCP0IGR0,Interrupt Router CP0 Interrupt Generation" bitfld.long 0x4 0. "INT_EN,Interrupt Enable" "0,1" line.long 0x8 "IRCP0ISR1,Interrupt Router CP0 Interrupt Status" eventfld.long 0x8 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x8 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x8 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0xC "IRCP0IGR1,Interrupt Router CP0 Interrupt Generation" bitfld.long 0xC 0. "INT_EN,Interrupt Enable" "0,1" line.long 0x10 "IRCP0ISR2,Interrupt Router CP0 Interrupt Status" eventfld.long 0x10 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x10 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x10 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0x14 "IRCP0IGR2,Interrupt Router CP0 Interrupt Generation" bitfld.long 0x14 0. "INT_EN,Interrupt Enable" "0,1" group.long 0x220++0x17 line.long 0x0 "IRCP1ISR0,Interrupt Router CP1 Interrupt Status" eventfld.long 0x0 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x0 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x0 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0x4 "IRCP1IGR0,Interrupt Router CP1 Interrupt Generation" bitfld.long 0x4 0. "INT_EN,Interrupt Enable" "0,1" line.long 0x8 "IRCP1ISR1,Interrupt Router CP1 Interrupt Status" eventfld.long 0x8 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x8 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x8 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0xC "IRCP1IGR1,Interrupt Router CP1 Interrupt Generation" bitfld.long 0xC 0. "INT_EN,Interrupt Enable" "0,1" line.long 0x10 "IRCP1ISR2,Interrupt Router CP1 Interrupt Status" eventfld.long 0x10 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x10 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x10 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0x14 "IRCP1IGR2,Interrupt Router CP1 Interrupt Generation" bitfld.long 0x14 0. "INT_EN,Interrupt Enable" "0,1" group.long 0x240++0x17 line.long 0x0 "IRCP2ISR0,Interrupt Router CP2 Interrupt Status" eventfld.long 0x0 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x0 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x0 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0x4 "IRCP2IGR0,Interrupt Router CP2 Interrupt Generation" bitfld.long 0x4 0. "INT_EN,Interrupt Enable" "0,1" line.long 0x8 "IRCP2ISR1,Interrupt Router CP2 Interrupt Status" eventfld.long 0x8 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x8 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x8 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0xC "IRCP2IGR1,Interrupt Router CP2 Interrupt Generation" bitfld.long 0xC 0. "INT_EN,Interrupt Enable" "0,1" line.long 0x10 "IRCP2ISR2,Interrupt Router CP2 Interrupt Status" eventfld.long 0x10 2. "CP2_INT,CP2-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" eventfld.long 0x10 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: Interrupt to CPn is asserted" newline eventfld.long 0x10 0. "CP0_INT,CP0-to-CPn Interrupt" "0: No interrupt asserted to CPn,1: Interrupt to CPn asserted" line.long 0x14 "IRCP2IGR2,Interrupt Router CP2 Interrupt Generation" bitfld.long 0x14 0. "INT_EN,Interrupt Enable" "0,1" group.long 0x400++0x3 line.long 0x0 "IRCPCFG,Interrupt Router Configuration" bitfld.long 0x0 31. "LOCK,Lock" "0: Register can be written by any privileged write,1: Register is locked (read-only) until the next.." bitfld.long 0x0 2. "CP2_TR,CP2 as Trusted Core" "0: Not trusted,1: Trusted" newline bitfld.long 0x0 1. "CP1_TR,CP1 as Trusted Core" "0: Not trusted,1: Trusted" bitfld.long 0x0 0. "CP0_TR,CP0 as Trusted Core" "0: Not trusted,1: Trusted" group.long 0x500++0x3 line.long 0x0 "XN_CTRL,Memory Execution Control" bitfld.long 0x0 31. "HLK,Hard Lock" "0: Disabled,1: Enabled" bitfld.long 0x0 30. "SLK,Soft Lock" "0: Disabled,1: Enabled" newline bitfld.long 0x0 22. "CM7_2_DTCM,Transaction Control For Cortex-M7_2 DTCM" "0: Transaction enabled,1: Transaction disabled" bitfld.long 0x0 21. "CM7_1_DTCM,Transaction Control For Cortex-M7_1 DTCM" "0: Transaction enabled,1: Transaction disabled" newline bitfld.long 0x0 20. "CM7_0_DTCM,Transaction Control For Cortex-M7_0 DTCM" "0: Transaction enabled,1: Transaction disabled" bitfld.long 0x0 18. "CM7_2_DIS_D0_D1TCM_EXEC,Disable D0 and D1 TCM Execution For Cortex-M7_2" "0: Execution enabled,1: Execution disabled" newline bitfld.long 0x0 17. "CM7_1_DIS_D0_D1TCM_EXEC,D0 and D1 TCM Execution For Cortex-M7_1" "0: Execution enabled,1: Execution disabled" bitfld.long 0x0 16. "CM7_0_DIS_D0_D1TCM_EXEC,D0 And D1 TCM Execution For Cortex-M7_0" "0: Execution enabled,1: Execution disabled" newline bitfld.long 0x0 14. "CM7_2_ITCM,Transaction Control For Cortex-M7_2 ITCM" "0: Execution enabled,1: Execution disabled" bitfld.long 0x0 13. "CM7_1_ITCM,Transaction Control For Cortex-M7_1 ITCM" "0: Execution enabled,1: Execution disabled" newline bitfld.long 0x0 12. "CM7_0_ITCM,Transaction Control For Cortex-M7_0 ITCM" "0: Execution enabled,1: Execution disabled" bitfld.long 0x0 10. "CM7_2_DIS_ITCM_EXEC,ITCM Execution for Cortex-M7_2" "0: Execution enabled,1: Execution disabled" newline bitfld.long 0x0 9. "CM7_1_DIS_ITCM_EXEC,ITCM Execution For Cortex-M7_1" "0: Execution enabled,1: Execution disabled" bitfld.long 0x0 8. "CM7_0_DIS_ITCM_EXEC,ITCM Execution For Cortex-M7_0" "0: Execution enabled,1: Execution disabled" newline bitfld.long 0x0 1. "PRAM_1,Transaction Control For PRAM 1" "0: Transaction enabled,1: Transaction disabled" bitfld.long 0x0 0. "PRAM0,Transaction Control For PRAM 0" "0: Transaction enabled,1: Transaction disabled" group.long 0x600++0x7 line.long 0x0 "ENEDC,Enable Interconnect Error Detection" bitfld.long 0x0 29. "ADD_CM7_1_TCM,Address Check For Cortex-M7_1_TCM" "0: Disabled,1: Enabled" bitfld.long 0x0 28. "CM7_1_TCM,Write Data Check For Cortex-M7_1_TCM" "0: Disabled,1: Enabled" newline bitfld.long 0x0 27. "ADD_CM7_0_TCM,Address Check For Cortex-M7_0_TCM" "0: Disabled,1: Enabled" bitfld.long 0x0 26. "CM7_0_TCM,Write Data Check For Cortex-M7_0_TCM" "0: Disabled,1: Enabled" newline bitfld.long 0x0 25. "ADD_AIPS2,Address Check For AIPS2" "0: Disabled,1: Enabled" bitfld.long 0x0 24. "AIPS2,Write Data Check For AIPS2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 23. "ADD_AIPS1,Address Check For AIPS1" "0: Disabled,1: Enabled" bitfld.long 0x0 22. "AIPS1,Write Data Check For AIPS1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "ADD_AIPS0,Address Check For AIPS0" "0: Disabled,1: Enabled" bitfld.long 0x0 20. "AIPS0,Write Data Check For AIPS0" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "ADD_QSPI,Address Check For QuadSPI" "0: Disabled,1: Enabled" bitfld.long 0x0 18. "QSPI,Write Data Check For QuadSPI" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "ADD_TCM_BACKDOOR,Write Data Check For TCM Backdoor" "0: Disabled,1: Enabled" bitfld.long 0x0 16. "TCM_BACKDOOR,Write Data Check For TCM Backdoor" "0: Disabled,1: Enabled" newline bitfld.long 0x0 15. "ADD_PRAM1,Address Check For PRAM1" "0: Disabled,1: Enabled" bitfld.long 0x0 14. "PRAM1,Write Data Check For PRAM1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "ADD_PRAM0,Address Check For PRAM0" "0: Disabled,1: Enabled" bitfld.long 0x0 12. "PRAM0,Write Data Check For PRAM0" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "ADD_PF2,Enable Address Check For PF2" "0: Disabled,1: Enabled" bitfld.long 0x0 10. "ADD_PF1,Address Check For PF1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "ADD_PF0,Address Check For PF0" "0: Disabled,1: Enabled" bitfld.long 0x0 8. "TCM,Read Data Check For TCM" "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "CM7_1_AHBP,Read Data Check For Cortex-M7_1_AHBP" "0: Disabled,1: Enabled" bitfld.long 0x0 6. "CM7_1_AHBM,Read Data Check For Cortex-M7_1_AHBM" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "ENET,Read Data Check For ENET" "0: Disabled,1: Enabled" bitfld.long 0x0 4. "HSE,Read Data Check For HSE_B" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "EDMA,Read Data Check For eDMA" "0: Disabled,1: Enabled" bitfld.long 0x0 1. "CM7_0_AHBP,Read Data Check For Cortex-M7_0_AHBP" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "CM7_0_AHBM,Read Data Check For Cortex-M7_0_AHBM" "0: Disabled,1: Enabled" line.long 0x4 "ENEDC1,Enable Interconnect Error Detection" bitfld.long 0x4 15. "ADD_CM7_2_TCM,Enable Address Check Cortex-M7_2_TCM" "0: Disabled,1: Enabled" bitfld.long 0x4 14. "CM7_2_TCM,Enable Write Data Check Cortex-M7_2_TCM" "0: Disabled,1: Enabled" newline bitfld.long 0x4 13. "ADD_AIPS3,Enable Address Check AIPS3" "0: Disabled,1: Enabled" bitfld.long 0x4 12. "AIPS3,Enable Write Data Check AIPS3" "0: Disabled,1: Enabled" newline bitfld.long 0x4 8. "EDMA1_S1,Enable Address Check eDMA1 S1" "0: Disabled,1: Enabled" bitfld.long 0x4 7. "EDMA1_S0,Enable Address Check eDMA1 S0" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "EDMA_S1,Enable Address Check eDMA S1" "0: Disabled,1: Enabled" bitfld.long 0x4 5. "EDMA_S0,Enable Address Check eDMA S0" "0: Disabled,1: Enabled" newline bitfld.long 0x4 4. "PFLASH_3,Enable Address Check PFlash3" "0: Disabled,1: Enabled" bitfld.long 0x4 3. "CM7_2_AHBP,Enable Read Data Check Cortex-M7_2_AHBP" "0: Disabled,1: Enabled" newline bitfld.long 0x4 2. "CM7_2_AHBM,Enable Read Data Check Cortex-M7_2_AHBM" "0: Disabled,1: Enabled" bitfld.long 0x4 1. "ZIPWIRE,Enable Read Data Check Zipwire" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0. "EDMA1,Enable Read Data Check eDMA1" "0: Disabled,1: Enabled" repeat 240. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x880)++0x1 line.word 0x0 "IRSPRC[$1],Interrupt Router Shared Peripheral Routing Control" bitfld.word 0x0 15. "LOCK,Lock" "0: Writes to IRSPRCn allowed,1: Writes to IRSPRCn ignored" bitfld.word 0x0 2. "M7_2,Enable Cortex-M7_2 Interrupt Steering" "0: Routing disabled,1: Routing enabled" newline bitfld.word 0x0 1. "M7_1,Enable Cortex-M7_1 Interrupt Steering" "0: Routing disabled,1: Routing enabled" bitfld.word 0x0 0. "M7_0,Enable Cortex-M7_0 Interrupt Steering" "0: Routing disabled,1: Routing enabled" repeat.end tree.end tree "MU (Messaging Unit)" base ad:0x0 tree "MU_0__MUB" base ad:0x4038C000 rgroup.long 0x0++0x7 line.long 0x0 "VER,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Set Number" line.long 0x4 "PAR,Parameter" hexmask.long.byte 0x4 24.--31. 1. "FLAG_WIDTH,Flag Width" hexmask.long.byte 0x4 16.--23. 1. "GIR_NUM,General-Purpose Interrupt Request Number" newline hexmask.long.byte 0x4 8.--15. 1. "RR_NUM,Receive Register Number" hexmask.long.byte 0x4 0.--7. 1. "TR_NUM,Transmit Register Number" group.long 0x8++0xB line.long 0x0 "CR,Control" bitfld.long 0x0 1. "MURIE,MUB Reset Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "MUR,MU Reset" "0: Idle,1: Reset" line.long 0x4 "SR,Status" rbitfld.long 0x4 6. "RFP,MUB Receive Full Pending" "0: Not pending. MUA is not writing to a TRn register.,1: Pending. MUA is writing to a TRn register." rbitfld.long 0x4 5. "TEP,MUB Transmit Empty Pending" "0: Not pending. MUA is reading no RRn register.,1: Pending. MUA is reading an RRn register." newline rbitfld.long 0x4 4. "GIRP,MUB General-Purpose Interrupt Pending" "0: No request sent,1: Request sent" rbitfld.long 0x4 3. "FUP,MUB Flags Update Pending" "0: No pending update flags (initiated by MUB),1: Pending update flags (initiated by MUB)" newline rbitfld.long 0x4 2. "EP,MUB Side Event Pending" "0: Not pending,1: Pending" eventfld.long 0x4 1. "MURIP,MU Reset Interrupt Pending Flag" "0: Reset not issued,1: Reset issued" newline rbitfld.long 0x4 0. "MURS,MUA and MUB Reset State" "0: Out of reset,1: In reset" line.long 0x8 "CCR0,Core Control 0" bitfld.long 0x8 0. "NMI,MUA Nonmaskable Interrupt Request" "0: Nonmaskable interrupt not issued,1: Nonmaskable interrupt issued" group.long 0x18++0x3 line.long 0x0 "CSSR0,Core Sticky Status 0" eventfld.long 0x0 0. "NMIC,Processor B Nonmaskable Interrupt Clear" "0: Default,1: Clear MUA_CCR0[NMI]" group.long 0x100++0x3 line.long 0x0 "FCR,Flag Control" bitfld.long 0x0 31. "F31,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 30. "F30,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 29. "F29,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 28. "F28,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 27. "F27,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 26. "F26,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 25. "F25,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 24. "F24,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 23. "F23,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 22. "F22,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 21. "F21,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 20. "F20,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 19. "F19,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 18. "F18,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 17. "F17,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 16. "F16,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 15. "F15,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 14. "F14,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 13. "F13,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 12. "F12,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 11. "F11,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 10. "F10,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 9. "F9,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 8. "F8,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 7. "F7,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 6. "F6,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 5. "F5,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 4. "F4,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 3. "F3,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 2. "F2,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 1. "F1,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 0. "F0,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." rgroup.long 0x104++0x3 line.long 0x0 "FSR,Flag Status" bitfld.long 0x0 31. "F31,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 30. "F30,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 29. "F29,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 28. "F28,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 27. "F27,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 26. "F26,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 25. "F25,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 24. "F24,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 23. "F23,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 22. "F22,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 21. "F21,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 20. "F20,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 19. "F19,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 18. "F18,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 17. "F17,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 16. "F16,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 15. "F15,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 14. "F14,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 13. "F13,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 12. "F12,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 11. "F11,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 10. "F10,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 9. "F9,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 8. "F8,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 7. "F7,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 6. "F6,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 5. "F5,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 4. "F4,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 3. "F3,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 2. "F2,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 1. "F1,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 0. "F0,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." group.long 0x110++0xB line.long 0x0 "GIER,General-Purpose Interrupt Enable" bitfld.long 0x0 31. "GIE31,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 30. "GIE30,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "GIE29,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 28. "GIE28,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "GIE27,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 26. "GIE26,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "GIE25,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 24. "GIE24,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "GIE23,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 22. "GIE22,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "GIE21,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 20. "GIE20,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "GIE19,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 18. "GIE18,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "GIE17,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 16. "GIE16,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "GIE15,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 14. "GIE14,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "GIE13,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 12. "GIE12,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "GIE11,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 10. "GIE10,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "GIE9,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 8. "GIE8,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "GIE7,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 6. "GIE6,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "GIE5,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 4. "GIE4,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "GIE3,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "GIE2,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "GIE1,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "GIE0,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" line.long 0x4 "GCR,General-Purpose Control" bitfld.long 0x4 31. "GIR31,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 30. "GIR30,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 29. "GIR29,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 28. "GIR28,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 27. "GIR27,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 26. "GIR26,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 25. "GIR25,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 24. "GIR24,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 23. "GIR23,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 22. "GIR22,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 21. "GIR21,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 20. "GIR20,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 19. "GIR19,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 18. "GIR18,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 17. "GIR17,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 16. "GIR16,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 15. "GIR15,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 14. "GIR14,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 13. "GIR13,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 12. "GIR12,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 11. "GIR11,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 10. "GIR10,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 9. "GIR9,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 8. "GIR8,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 7. "GIR7,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 6. "GIR6,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 5. "GIR5,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 4. "GIR4,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 3. "GIR3,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 2. "GIR2,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 1. "GIR1,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 0. "GIR0,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" line.long 0x8 "GSR,General-purpose Status" eventfld.long 0x8 31. "GIP31,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 30. "GIP30,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 29. "GIP29,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 28. "GIP28,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 27. "GIP27,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 26. "GIP26,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 25. "GIP25,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 24. "GIP24,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 23. "GIP23,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 22. "GIP22,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 21. "GIP21,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 20. "GIP20,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 19. "GIP19,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 18. "GIP18,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 17. "GIP17,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 16. "GIP16,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 15. "GIP15,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 14. "GIP14,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 13. "GIP13,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 12. "GIP12,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 11. "GIP11,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 10. "GIP10,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 9. "GIP9,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 8. "GIP8,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 7. "GIP7,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 6. "GIP6,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 5. "GIP5,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 4. "GIP4,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 3. "GIP3,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 2. "GIP2,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 1. "GIP1,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 0. "GIP0,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" group.long 0x120++0x3 line.long 0x0 "TCR,Transmit Control" bitfld.long 0x0 3. "TIE3,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "TIE2,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "TIE1,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "TIE0,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable" rgroup.long 0x124++0x3 line.long 0x0 "TSR,Transmit Status" bitfld.long 0x0 3. "TE3,MUB Transmit n Empty" "0: Not empty,1: Empty" bitfld.long 0x0 2. "TE2,MUB Transmit n Empty" "0: Not empty,1: Empty" newline bitfld.long 0x0 1. "TE1,MUB Transmit n Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "TE0,MUB Transmit n Empty" "0: Not empty,1: Empty" group.long 0x128++0x3 line.long 0x0 "RCR,Receive Control" bitfld.long 0x0 3. "RIE3,MUB Receive Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "RIE2,MUB Receive Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "RIE1,MUB Receive Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "RIE0,MUB Receive Interrupt Enable n" "0: Disable,1: Enable" rgroup.long 0x12C++0x3 line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 3. "RF3,MUB Receive Register n Full" "0: Not full,1: Full" bitfld.long 0x0 2. "RF2,MUB Receive Register n Full" "0: Not full,1: Full" newline bitfld.long 0x0 1. "RF1,MUB Receive Register n Full" "0: Not full,1: Full" bitfld.long 0x0 0. "RF0,MUB Receive Register n Full" "0: Not full,1: Full" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "TR[$1],Transmit" hexmask.long 0x0 0.--31. 1. "TR_DATA,MUB Transmit Data" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x280)++0x3 line.long 0x0 "RR[$1],Receive" hexmask.long 0x0 0.--31. 1. "RR_DATA,MUB Receive Data" repeat.end tree.end tree "MU_1__MUB" base ad:0x404EC000 rgroup.long 0x0++0x7 line.long 0x0 "VER,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Set Number" line.long 0x4 "PAR,Parameter" hexmask.long.byte 0x4 24.--31. 1. "FLAG_WIDTH,Flag Width" hexmask.long.byte 0x4 16.--23. 1. "GIR_NUM,General-Purpose Interrupt Request Number" newline hexmask.long.byte 0x4 8.--15. 1. "RR_NUM,Receive Register Number" hexmask.long.byte 0x4 0.--7. 1. "TR_NUM,Transmit Register Number" group.long 0x8++0xB line.long 0x0 "CR,Control" bitfld.long 0x0 1. "MURIE,MUB Reset Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "MUR,MU Reset" "0: Idle,1: Reset" line.long 0x4 "SR,Status" rbitfld.long 0x4 6. "RFP,MUB Receive Full Pending" "0: Not pending. MUA is not writing to a TRn register.,1: Pending. MUA is writing to a TRn register." rbitfld.long 0x4 5. "TEP,MUB Transmit Empty Pending" "0: Not pending. MUA is reading no RRn register.,1: Pending. MUA is reading an RRn register." newline rbitfld.long 0x4 4. "GIRP,MUB General-Purpose Interrupt Pending" "0: No request sent,1: Request sent" rbitfld.long 0x4 3. "FUP,MUB Flags Update Pending" "0: No pending update flags (initiated by MUB),1: Pending update flags (initiated by MUB)" newline rbitfld.long 0x4 2. "EP,MUB Side Event Pending" "0: Not pending,1: Pending" eventfld.long 0x4 1. "MURIP,MU Reset Interrupt Pending Flag" "0: Reset not issued,1: Reset issued" newline rbitfld.long 0x4 0. "MURS,MUA and MUB Reset State" "0: Out of reset,1: In reset" line.long 0x8 "CCR0,Core Control 0" bitfld.long 0x8 0. "NMI,MUA Nonmaskable Interrupt Request" "0: Nonmaskable interrupt not issued,1: Nonmaskable interrupt issued" group.long 0x18++0x3 line.long 0x0 "CSSR0,Core Sticky Status 0" eventfld.long 0x0 0. "NMIC,Processor B Nonmaskable Interrupt Clear" "0: Default,1: Clear MUA_CCR0[NMI]" group.long 0x100++0x3 line.long 0x0 "FCR,Flag Control" bitfld.long 0x0 31. "F31,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 30. "F30,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 29. "F29,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 28. "F28,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 27. "F27,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 26. "F26,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 25. "F25,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 24. "F24,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 23. "F23,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 22. "F22,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 21. "F21,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 20. "F20,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 19. "F19,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 18. "F18,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 17. "F17,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 16. "F16,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 15. "F15,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 14. "F14,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 13. "F13,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 12. "F12,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 11. "F11,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 10. "F10,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 9. "F9,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 8. "F8,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 7. "F7,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 6. "F6,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 5. "F5,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 4. "F4,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 3. "F3,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 2. "F2,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." newline bitfld.long 0x0 1. "F1,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." bitfld.long 0x0 0. "F0,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]." rgroup.long 0x104++0x3 line.long 0x0 "FSR,Flag Status" bitfld.long 0x0 31. "F31,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 30. "F30,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 29. "F29,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 28. "F28,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 27. "F27,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 26. "F26,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 25. "F25,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 24. "F24,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 23. "F23,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 22. "F22,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 21. "F21,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 20. "F20,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 19. "F19,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 18. "F18,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 17. "F17,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 16. "F16,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 15. "F15,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 14. "F14,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 13. "F13,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 12. "F12,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 11. "F11,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 10. "F10,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 9. "F9,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 8. "F8,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 7. "F7,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 6. "F6,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 5. "F5,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 4. "F4,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 3. "F3,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 2. "F2,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." newline bitfld.long 0x0 1. "F1,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." bitfld.long 0x0 0. "F0,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1." group.long 0x110++0xB line.long 0x0 "GIER,General-Purpose Interrupt Enable" bitfld.long 0x0 31. "GIE31,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 30. "GIE30,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "GIE29,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 28. "GIE28,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "GIE27,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 26. "GIE26,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "GIE25,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 24. "GIE24,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "GIE23,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 22. "GIE22,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "GIE21,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 20. "GIE20,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "GIE19,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 18. "GIE18,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "GIE17,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 16. "GIE16,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "GIE15,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 14. "GIE14,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "GIE13,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 12. "GIE12,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "GIE11,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 10. "GIE10,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "GIE9,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 8. "GIE8,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "GIE7,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 6. "GIE6,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "GIE5,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 4. "GIE4,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "GIE3,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "GIE2,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "GIE1,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "GIE0,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable" line.long 0x4 "GCR,General-Purpose Control" bitfld.long 0x4 31. "GIR31,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 30. "GIR30,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 29. "GIR29,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 28. "GIR28,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 27. "GIR27,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 26. "GIR26,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 25. "GIR25,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 24. "GIR24,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 23. "GIR23,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 22. "GIR22,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 21. "GIR21,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 20. "GIR20,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 19. "GIR19,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 18. "GIR18,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 17. "GIR17,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 16. "GIR16,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 15. "GIR15,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 14. "GIR14,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 13. "GIR13,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 12. "GIR12,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 11. "GIR11,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 10. "GIR10,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 9. "GIR9,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 8. "GIR8,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 7. "GIR7,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 6. "GIR6,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 5. "GIR5,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 4. "GIR4,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 3. "GIR3,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 2. "GIR2,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" newline bitfld.long 0x4 1. "GIR1,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" bitfld.long 0x4 0. "GIR0,MUB General-Purpose Interrupt Request n" "0: Not requested,1: Requested" line.long 0x8 "GSR,General-purpose Status" eventfld.long 0x8 31. "GIP31,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 30. "GIP30,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 29. "GIP29,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 28. "GIP28,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 27. "GIP27,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 26. "GIP26,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 25. "GIP25,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 24. "GIP24,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 23. "GIP23,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 22. "GIP22,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 21. "GIP21,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 20. "GIP20,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 19. "GIP19,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 18. "GIP18,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 17. "GIP17,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 16. "GIP16,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 15. "GIP15,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 14. "GIP14,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 13. "GIP13,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 12. "GIP12,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 11. "GIP11,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 10. "GIP10,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 9. "GIP9,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 8. "GIP8,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 7. "GIP7,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 6. "GIP6,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 5. "GIP5,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 4. "GIP4,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 3. "GIP3,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 2. "GIP2,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" newline eventfld.long 0x8 1. "GIP1,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" eventfld.long 0x8 0. "GIP0,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" group.long 0x120++0x3 line.long 0x0 "TCR,Transmit Control" bitfld.long 0x0 3. "TIE3,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "TIE2,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "TIE1,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "TIE0,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable" rgroup.long 0x124++0x3 line.long 0x0 "TSR,Transmit Status" bitfld.long 0x0 3. "TE3,MUB Transmit n Empty" "0: Not empty,1: Empty" bitfld.long 0x0 2. "TE2,MUB Transmit n Empty" "0: Not empty,1: Empty" newline bitfld.long 0x0 1. "TE1,MUB Transmit n Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "TE0,MUB Transmit n Empty" "0: Not empty,1: Empty" group.long 0x128++0x3 line.long 0x0 "RCR,Receive Control" bitfld.long 0x0 3. "RIE3,MUB Receive Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "RIE2,MUB Receive Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "RIE1,MUB Receive Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "RIE0,MUB Receive Interrupt Enable n" "0: Disable,1: Enable" rgroup.long 0x12C++0x3 line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 3. "RF3,MUB Receive Register n Full" "0: Not full,1: Full" bitfld.long 0x0 2. "RF2,MUB Receive Register n Full" "0: Not full,1: Full" newline bitfld.long 0x0 1. "RF1,MUB Receive Register n Full" "0: Not full,1: Full" bitfld.long 0x0 0. "RF0,MUB Receive Register n Full" "0: Not full,1: Full" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "TR[$1],Transmit" hexmask.long 0x0 0.--31. 1. "TR_DATA,MUB Transmit Data" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x280)++0x3 line.long 0x0 "RR[$1],Receive" hexmask.long 0x0 0.--31. 1. "RR_DATA,MUB Receive Data" repeat.end tree.end tree "MU_2__MUA" base ad:0x400B8000 rgroup.long 0x0++0x7 line.long 0x0 "VER,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Set Number" line.long 0x4 "PAR,Parameter" hexmask.long.byte 0x4 24.--31. 1. "FLAG_WIDTH,Flag Width" hexmask.long.byte 0x4 16.--23. 1. "GIR_NUM,General-Purpose Interrupt Request Number" newline hexmask.long.byte 0x4 8.--15. 1. "RR_NUM,Receive Register Number" hexmask.long.byte 0x4 0.--7. 1. "TR_NUM,Transmit Register Number" group.long 0x8++0x7 line.long 0x0 "CR,Control" bitfld.long 0x0 1. "MURIE,MUA Reset Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "MUR,MU Reset" "0: Idle,1: Reset" line.long 0x4 "SR,Status" rbitfld.long 0x4 6. "RFP,MUA Receive Full Pending" "0: Not pending. MUB is not writing to a TRn register.,1: Pending. MUB is writing to a TRn register." rbitfld.long 0x4 5. "TEP,MUA Transmit Empty Pending" "0: Not pending. MUB is reading no RRn register.,1: Pending. MUB is reading an RRn register." newline rbitfld.long 0x4 4. "GIRP,MUA General-Purpose Interrupt Pending" "0: No request sent,1: Request sent" rbitfld.long 0x4 3. "FUP,MUA Flags Update Pending" "0: No pending update flags (initiated by MUA),1: Pending update flags (initiated by MUA)" newline rbitfld.long 0x4 2. "EP,MUA Side Event Pending" "0: Not pending,1: Pending" eventfld.long 0x4 1. "MURIP,MU Reset Interrupt Pending Flag" "0: Reset not issued,1: Reset issued" newline rbitfld.long 0x4 0. "MURS,MUA and MUB Reset State" "0: Out of reset,1: In reset" group.long 0x100++0x3 line.long 0x0 "FCR,Flag Control" bitfld.long 0x0 2. "F2,MUA to MUB Flag n" "0: Clear MUB_FSR[Fn].,1: Set MUB_FSR[Fn]." bitfld.long 0x0 1. "F1,MUA to MUB Flag n" "0: Clear MUB_FSR[Fn].,1: Set MUB_FSR[Fn]." newline bitfld.long 0x0 0. "F0,MUA to MUB Flag n" "0: Clear MUB_FSR[Fn].,1: Set MUB_FSR[Fn]." rgroup.long 0x104++0x3 line.long 0x0 "FSR,Flag Status" bitfld.long 0x0 2. "F2,MUB to MUA-Side Flag n" "0: MUB_FCR[Fn] = 0.,1: MUB_FCR[Fn] = 1." bitfld.long 0x0 1. "F1,MUB to MUA-Side Flag n" "0: MUB_FCR[Fn] = 0.,1: MUB_FCR[Fn] = 1." newline bitfld.long 0x0 0. "F0,MUB to MUA-Side Flag n" "0: MUB_FCR[Fn] = 0.,1: MUB_FCR[Fn] = 1." group.long 0x110++0xB line.long 0x0 "GIER,General-Purpose Interrupt Enable" bitfld.long 0x0 0. "GIE0,MUA General-purpose Interrupt Enable n" "0: Disable,1: Enable" line.long 0x4 "GCR,General-Purpose Control" bitfld.long 0x4 0. "GIR0,MUA General-Purpose Interrupt Request n" "0: Not requested,1: Requested" line.long 0x8 "GSR,General-purpose Status" eventfld.long 0x8 0. "GIP0,MUA General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" group.long 0x120++0x3 line.long 0x0 "TCR,Transmit Control" bitfld.long 0x0 3. "TIE3,MUA Transmit Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "TIE2,MUA Transmit Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "TIE1,MUA Transmit Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "TIE0,MUA Transmit Interrupt Enable n" "0: Disable,1: Enable" rgroup.long 0x124++0x3 line.long 0x0 "TSR,Transmit Status" bitfld.long 0x0 3. "TE3,MUA Transmit n Empty" "0: Not empty,1: Empty" bitfld.long 0x0 2. "TE2,MUA Transmit n Empty" "0: Not empty,1: Empty" newline bitfld.long 0x0 1. "TE1,MUA Transmit n Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "TE0,MUA Transmit n Empty" "0: Not empty,1: Empty" group.long 0x128++0x3 line.long 0x0 "RCR,Receive Control" bitfld.long 0x0 3. "RIE3,MUA Receive Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "RIE2,MUA Receive Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "RIE1,MUA Receive Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "RIE0,MUA Receive Interrupt Enable n" "0: Disable,1: Enable" rgroup.long 0x12C++0x3 line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 3. "RF3,MUA Receive Register n Full" "0: Not full,1: Full" bitfld.long 0x0 2. "RF2,MUA Receive Register n Full" "0: Not full,1: Full" newline bitfld.long 0x0 1. "RF1,MUA Receive Register n Full" "0: Not full,1: Full" bitfld.long 0x0 0. "RF0,MUA Receive Register n Full" "0: Not full,1: Full" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "TR[$1],Transmit" hexmask.long 0x0 0.--31. 1. "TR_DATA,MUA Transmit Data" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x280)++0x3 line.long 0x0 "RR[$1],Receive" hexmask.long 0x0 0.--31. 1. "RR_DATA,MUA Receive Data" repeat.end tree.end tree "MU_2__MUB" base ad:0x400BC000 rgroup.long 0x0++0x7 line.long 0x0 "VER,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Set Number" line.long 0x4 "PAR,Parameter" hexmask.long.byte 0x4 24.--31. 1. "FLAG_WIDTH,Flag Width" hexmask.long.byte 0x4 16.--23. 1. "GIR_NUM,General-Purpose Interrupt Request Number" newline hexmask.long.byte 0x4 8.--15. 1. "RR_NUM,Receive Register Number" hexmask.long.byte 0x4 0.--7. 1. "TR_NUM,Transmit Register Number" group.long 0x8++0x7 line.long 0x0 "CR,Control" bitfld.long 0x0 1. "MURIE,MUA Reset Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "MUR,MU Reset" "0: Idle,1: Reset" line.long 0x4 "SR,Status" rbitfld.long 0x4 6. "RFP,MUA Receive Full Pending" "0: Not pending. MUB is not writing to a TRn register.,1: Pending. MUB is writing to a TRn register." rbitfld.long 0x4 5. "TEP,MUA Transmit Empty Pending" "0: Not pending. MUB is reading no RRn register.,1: Pending. MUB is reading an RRn register." newline rbitfld.long 0x4 4. "GIRP,MUA General-Purpose Interrupt Pending" "0: No request sent,1: Request sent" rbitfld.long 0x4 3. "FUP,MUA Flags Update Pending" "0: No pending update flags (initiated by MUA),1: Pending update flags (initiated by MUA)" newline rbitfld.long 0x4 2. "EP,MUA Side Event Pending" "0: Not pending,1: Pending" eventfld.long 0x4 1. "MURIP,MU Reset Interrupt Pending Flag" "0: Reset not issued,1: Reset issued" newline rbitfld.long 0x4 0. "MURS,MUA and MUB Reset State" "0: Out of reset,1: In reset" group.long 0x100++0x3 line.long 0x0 "FCR,Flag Control" bitfld.long 0x0 2. "F2,MUA to MUB Flag n" "0: Clear MUB_FSR[Fn].,1: Set MUB_FSR[Fn]." bitfld.long 0x0 1. "F1,MUA to MUB Flag n" "0: Clear MUB_FSR[Fn].,1: Set MUB_FSR[Fn]." newline bitfld.long 0x0 0. "F0,MUA to MUB Flag n" "0: Clear MUB_FSR[Fn].,1: Set MUB_FSR[Fn]." rgroup.long 0x104++0x3 line.long 0x0 "FSR,Flag Status" bitfld.long 0x0 2. "F2,MUB to MUA-Side Flag n" "0: MUB_FCR[Fn] = 0.,1: MUB_FCR[Fn] = 1." bitfld.long 0x0 1. "F1,MUB to MUA-Side Flag n" "0: MUB_FCR[Fn] = 0.,1: MUB_FCR[Fn] = 1." newline bitfld.long 0x0 0. "F0,MUB to MUA-Side Flag n" "0: MUB_FCR[Fn] = 0.,1: MUB_FCR[Fn] = 1." group.long 0x110++0xB line.long 0x0 "GIER,General-Purpose Interrupt Enable" bitfld.long 0x0 0. "GIE0,MUA General-purpose Interrupt Enable n" "0: Disable,1: Enable" line.long 0x4 "GCR,General-Purpose Control" bitfld.long 0x4 0. "GIR0,MUA General-Purpose Interrupt Request n" "0: Not requested,1: Requested" line.long 0x8 "GSR,General-purpose Status" eventfld.long 0x8 0. "GIP0,MUA General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending" group.long 0x120++0x3 line.long 0x0 "TCR,Transmit Control" bitfld.long 0x0 3. "TIE3,MUA Transmit Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "TIE2,MUA Transmit Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "TIE1,MUA Transmit Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "TIE0,MUA Transmit Interrupt Enable n" "0: Disable,1: Enable" rgroup.long 0x124++0x3 line.long 0x0 "TSR,Transmit Status" bitfld.long 0x0 3. "TE3,MUA Transmit n Empty" "0: Not empty,1: Empty" bitfld.long 0x0 2. "TE2,MUA Transmit n Empty" "0: Not empty,1: Empty" newline bitfld.long 0x0 1. "TE1,MUA Transmit n Empty" "0: Not empty,1: Empty" bitfld.long 0x0 0. "TE0,MUA Transmit n Empty" "0: Not empty,1: Empty" group.long 0x128++0x3 line.long 0x0 "RCR,Receive Control" bitfld.long 0x0 3. "RIE3,MUA Receive Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 2. "RIE2,MUA Receive Interrupt Enable n" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "RIE1,MUA Receive Interrupt Enable n" "0: Disable,1: Enable" bitfld.long 0x0 0. "RIE0,MUA Receive Interrupt Enable n" "0: Disable,1: Enable" rgroup.long 0x12C++0x3 line.long 0x0 "RSR,Receive Status" bitfld.long 0x0 3. "RF3,MUA Receive Register n Full" "0: Not full,1: Full" bitfld.long 0x0 2. "RF2,MUA Receive Register n Full" "0: Not full,1: Full" newline bitfld.long 0x0 1. "RF1,MUA Receive Register n Full" "0: Not full,1: Full" bitfld.long 0x0 0. "RF0,MUA Receive Register n Full" "0: Not full,1: Full" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "TR[$1],Transmit" hexmask.long 0x0 0.--31. 1. "TR_DATA,MUA Transmit Data" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x280)++0x3 line.long 0x0 "RR[$1],Receive" hexmask.long 0x0 0.--31. 1. "RR_DATA,MUA Receive Data" repeat.end tree.end tree.end tree "OMU_CM7 (Overlay Management Unit (Cortex-M7))" base ad:0x0 tree "OMU_CM7_0" base ad:0x40518000 repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40518000 ad:0x40519000 ad:0x4051A000 ad:0x4051B000) tree "ZONE_REGS[$1]" base $2 rgroup.long ($2)++0x3 line.long 0x0 "zZRSR,Zone Request Status zone_index" bitfld.long 0x0 1. "Z1RS,Zone 1 Request Status" "0,1" bitfld.long 0x0 0. "Z0RS,Zone 0 Request Status" "0,1" group.long ($2+0x4)++0x3 line.long 0x0 "ZER,Zone Enable zone_index" bitfld.long 0x0 1. "Z1E,Zone 1 Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "Z0E,Zone 0 Enable" "0: Disable,1: Enable" tree.end repeat.end base ad:0x40518000 newline group.long 0x4000++0x3 line.long 0x0 "OER,OMU Enable" bitfld.long 0x0 1. "ZRGUE,OMU Zone Request Global Update Enable" "0: Not updated,1: Updated" bitfld.long 0x0 0. "OE,OMU Enable" "0: Disable,1: Enable" repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x4051C000 ad:0x4051C010 ad:0x4051C020 ad:0x4051C030 ad:0x4051C040 ad:0x4051C050 ad:0x4051C060 ad:0x4051C070 ad:0x4051C080 ad:0x4051C090 ad:0x4051C0A0 ad:0x4051C0B0 ad:0x4051C0C0 ad:0x4051C0D0 ad:0x4051C0E0 ad:0x4051C0F0) tree "OVERLAY_REGION_DESCRIPTOR[$1]" base $2 group.long ($2+0x400)++0xF line.long 0x0 "ORDLSA,ORDoverlay_index Logical Start Address" hexmask.long.tbyte 0x0 10.--31. 1. "LSA,Logical Start Address" line.long 0x4 "ORDPSA,ORDoverlay_index Physical Start Address" hexmask.long.tbyte 0x4 10.--31. 1. "PSA,Physical Start Address" line.long 0x8 "ORDRS,ORDoverlay_index Region Size" hexmask.long.byte 0x8 0.--3. 1. "RS,Region Size" line.long 0xC "ORDRZA,ORDoverlay_index Region Zone Assignment" hexmask.long.byte 0xC 0.--3. 1. "RZA,Region Zone Assignment" tree.end repeat.end base ad:0x40518000 newline group.long 0x4004++0x3 line.long 0x0 "ZRR,Zone Request" bitfld.long 0x0 7. "Z7R,Zone 7 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 6. "Z6R,Zone 6 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 5. "Z5R,Zone 5 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 4. "Z4R,Zone 4 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 3. "Z3R,Zone 3 Request" "0: Request to disable,1: Request to enable" newline bitfld.long 0x0 2. "Z2R,Zone 2 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 1. "Z1R,Zone 1 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 0. "Z0R,Zone 0 Request" "0: Request to disable,1: Request to enable" rgroup.long 0x4008++0x3 line.long 0x0 "ZESR,Zone Enable Status" bitfld.long 0x0 7. "Z7ES,Zone 7 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 6. "Z6ES,Zone 6 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 5. "Z5ES,Zone 5 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 4. "Z4ES,Zone 4 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 3. "Z3ES,Zone 3 Enable Status" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "Z2ES,Zone 2 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 1. "Z1ES,Zone 1 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 0. "Z0ES,Zone 0 Enable Status" "0: Disable,1: Enable" group.long 0x400C++0x7 line.long 0x0 "GZRR,Global Zone Request" bitfld.long 0x0 7. "GZ7R,Global Zone 7 Request" "0: Disable,1: Enable" bitfld.long 0x0 6. "GZ6R,Global Zone 6 Request" "0: Disable,1: Enable" bitfld.long 0x0 5. "GZ5R,Global Zone 5 Request" "0: Disable,1: Enable" bitfld.long 0x0 4. "GZ4R,Global Zone 4 Request" "0: Disable,1: Enable" bitfld.long 0x0 3. "GZ3R,Global Zone 3 Request" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "GZ2R,Global Zone 2 Request" "0: Disable,1: Enable" bitfld.long 0x0 1. "GZ1R,Global Zone 1 Request" "0: Disable,1: Enable" bitfld.long 0x0 0. "GZ0R,Global Zone 0 Request" "0: Disable,1: Enable" line.long 0x4 "GZRUDR,Global Zone Request Update Delay" hexmask.long.byte 0x4 8.--12. 1. "RDEL,Remote Delay" hexmask.long.byte 0x4 0.--4. 1. "LDEL,Local Delay" tree.end tree "OMU_CM7_1" base ad:0x40520000 repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40520000 ad:0x40521000 ad:0x40522000 ad:0x40523000) tree "ZONE_REGS[$1]" base $2 rgroup.long ($2)++0x3 line.long 0x0 "zZRSR,Zone Request Status zone_index" bitfld.long 0x0 1. "Z1RS,Zone 1 Request Status" "0,1" bitfld.long 0x0 0. "Z0RS,Zone 0 Request Status" "0,1" group.long ($2+0x4)++0x3 line.long 0x0 "ZER,Zone Enable zone_index" bitfld.long 0x0 1. "Z1E,Zone 1 Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "Z0E,Zone 0 Enable" "0: Disable,1: Enable" tree.end repeat.end base ad:0x40520000 newline group.long 0x4000++0x3 line.long 0x0 "OER,OMU Enable" bitfld.long 0x0 1. "ZRGUE,OMU Zone Request Global Update Enable" "0: Not updated,1: Updated" bitfld.long 0x0 0. "OE,OMU Enable" "0: Disable,1: Enable" repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x40524000 ad:0x40524010 ad:0x40524020 ad:0x40524030 ad:0x40524040 ad:0x40524050 ad:0x40524060 ad:0x40524070 ad:0x40524080 ad:0x40524090 ad:0x405240A0 ad:0x405240B0 ad:0x405240C0 ad:0x405240D0 ad:0x405240E0 ad:0x405240F0) tree "OVERLAY_REGION_DESCRIPTOR[$1]" base $2 group.long ($2+0x400)++0xF line.long 0x0 "ORDLSA,ORDoverlay_index Logical Start Address" hexmask.long.tbyte 0x0 10.--31. 1. "LSA,Logical Start Address" line.long 0x4 "ORDPSA,ORDoverlay_index Physical Start Address" hexmask.long.tbyte 0x4 10.--31. 1. "PSA,Physical Start Address" line.long 0x8 "ORDRS,ORDoverlay_index Region Size" hexmask.long.byte 0x8 0.--3. 1. "RS,Region Size" line.long 0xC "ORDRZA,ORDoverlay_index Region Zone Assignment" hexmask.long.byte 0xC 0.--3. 1. "RZA,Region Zone Assignment" tree.end repeat.end base ad:0x40520000 newline group.long 0x4004++0x3 line.long 0x0 "ZRR,Zone Request" bitfld.long 0x0 7. "Z7R,Zone 7 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 6. "Z6R,Zone 6 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 5. "Z5R,Zone 5 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 4. "Z4R,Zone 4 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 3. "Z3R,Zone 3 Request" "0: Request to disable,1: Request to enable" newline bitfld.long 0x0 2. "Z2R,Zone 2 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 1. "Z1R,Zone 1 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 0. "Z0R,Zone 0 Request" "0: Request to disable,1: Request to enable" rgroup.long 0x4008++0x3 line.long 0x0 "ZESR,Zone Enable Status" bitfld.long 0x0 7. "Z7ES,Zone 7 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 6. "Z6ES,Zone 6 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 5. "Z5ES,Zone 5 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 4. "Z4ES,Zone 4 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 3. "Z3ES,Zone 3 Enable Status" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "Z2ES,Zone 2 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 1. "Z1ES,Zone 1 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 0. "Z0ES,Zone 0 Enable Status" "0: Disable,1: Enable" group.long 0x400C++0x7 line.long 0x0 "GZRR,Global Zone Request" bitfld.long 0x0 7. "GZ7R,Global Zone 7 Request" "0: Disable,1: Enable" bitfld.long 0x0 6. "GZ6R,Global Zone 6 Request" "0: Disable,1: Enable" bitfld.long 0x0 5. "GZ5R,Global Zone 5 Request" "0: Disable,1: Enable" bitfld.long 0x0 4. "GZ4R,Global Zone 4 Request" "0: Disable,1: Enable" bitfld.long 0x0 3. "GZ3R,Global Zone 3 Request" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "GZ2R,Global Zone 2 Request" "0: Disable,1: Enable" bitfld.long 0x0 1. "GZ1R,Global Zone 1 Request" "0: Disable,1: Enable" bitfld.long 0x0 0. "GZ0R,Global Zone 0 Request" "0: Disable,1: Enable" line.long 0x4 "GZRUDR,Global Zone Request Update Delay" hexmask.long.byte 0x4 8.--12. 1. "RDEL,Remote Delay" hexmask.long.byte 0x4 0.--4. 1. "LDEL,Local Delay" tree.end tree "OMU_CM7_2" base ad:0x40528000 repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40528000 ad:0x40529000 ad:0x4052A000 ad:0x4052B000) tree "ZONE_REGS[$1]" base $2 rgroup.long ($2)++0x3 line.long 0x0 "zZRSR,Zone Request Status zone_index" bitfld.long 0x0 1. "Z1RS,Zone 1 Request Status" "0,1" bitfld.long 0x0 0. "Z0RS,Zone 0 Request Status" "0,1" group.long ($2+0x4)++0x3 line.long 0x0 "ZER,Zone Enable zone_index" bitfld.long 0x0 1. "Z1E,Zone 1 Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "Z0E,Zone 0 Enable" "0: Disable,1: Enable" tree.end repeat.end base ad:0x40528000 newline group.long 0x4000++0x3 line.long 0x0 "OER,OMU Enable" bitfld.long 0x0 1. "ZRGUE,OMU Zone Request Global Update Enable" "0: Not updated,1: Updated" bitfld.long 0x0 0. "OE,OMU Enable" "0: Disable,1: Enable" repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x4052C000 ad:0x4052C010 ad:0x4052C020 ad:0x4052C030 ad:0x4052C040 ad:0x4052C050 ad:0x4052C060 ad:0x4052C070 ad:0x4052C080 ad:0x4052C090 ad:0x4052C0A0 ad:0x4052C0B0 ad:0x4052C0C0 ad:0x4052C0D0 ad:0x4052C0E0 ad:0x4052C0F0) tree "OVERLAY_REGION_DESCRIPTOR[$1]" base $2 group.long ($2+0x400)++0xF line.long 0x0 "ORDLSA,ORDoverlay_index Logical Start Address" hexmask.long.tbyte 0x0 10.--31. 1. "LSA,Logical Start Address" line.long 0x4 "ORDPSA,ORDoverlay_index Physical Start Address" hexmask.long.tbyte 0x4 10.--31. 1. "PSA,Physical Start Address" line.long 0x8 "ORDRS,ORDoverlay_index Region Size" hexmask.long.byte 0x8 0.--3. 1. "RS,Region Size" line.long 0xC "ORDRZA,ORDoverlay_index Region Zone Assignment" hexmask.long.byte 0xC 0.--3. 1. "RZA,Region Zone Assignment" tree.end repeat.end base ad:0x40528000 newline group.long 0x4004++0x3 line.long 0x0 "ZRR,Zone Request" bitfld.long 0x0 7. "Z7R,Zone 7 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 6. "Z6R,Zone 6 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 5. "Z5R,Zone 5 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 4. "Z4R,Zone 4 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 3. "Z3R,Zone 3 Request" "0: Request to disable,1: Request to enable" newline bitfld.long 0x0 2. "Z2R,Zone 2 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 1. "Z1R,Zone 1 Request" "0: Request to disable,1: Request to enable" bitfld.long 0x0 0. "Z0R,Zone 0 Request" "0: Request to disable,1: Request to enable" rgroup.long 0x4008++0x3 line.long 0x0 "ZESR,Zone Enable Status" bitfld.long 0x0 7. "Z7ES,Zone 7 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 6. "Z6ES,Zone 6 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 5. "Z5ES,Zone 5 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 4. "Z4ES,Zone 4 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 3. "Z3ES,Zone 3 Enable Status" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "Z2ES,Zone 2 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 1. "Z1ES,Zone 1 Enable Status" "0: Disable,1: Enable" bitfld.long 0x0 0. "Z0ES,Zone 0 Enable Status" "0: Disable,1: Enable" group.long 0x400C++0x7 line.long 0x0 "GZRR,Global Zone Request" bitfld.long 0x0 7. "GZ7R,Global Zone 7 Request" "0: Disable,1: Enable" bitfld.long 0x0 6. "GZ6R,Global Zone 6 Request" "0: Disable,1: Enable" bitfld.long 0x0 5. "GZ5R,Global Zone 5 Request" "0: Disable,1: Enable" bitfld.long 0x0 4. "GZ4R,Global Zone 4 Request" "0: Disable,1: Enable" bitfld.long 0x0 3. "GZ3R,Global Zone 3 Request" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "GZ2R,Global Zone 2 Request" "0: Disable,1: Enable" bitfld.long 0x0 1. "GZ1R,Global Zone 1 Request" "0: Disable,1: Enable" bitfld.long 0x0 0. "GZ0R,Global Zone 0 Request" "0: Disable,1: Enable" line.long 0x4 "GZRUDR,Global Zone Request Update Delay" hexmask.long.byte 0x4 8.--12. 1. "RDEL,Remote Delay" hexmask.long.byte 0x4 0.--4. 1. "LDEL,Local Delay" tree.end tree.end tree "PFLASH (Flash Memory Controller)" base ad:0x0 tree "PFLASH" base ad:0x40268000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "PFCR[$1],Platform Flash Memory Configuration i" bitfld.long 0x0 5. "P0_DPFEN,Port0 Data Prefetch Enable" "0: Disable,1: Enable" bitfld.long 0x0 4. "P0_CPFEN,Port0 Code Prefetch Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "P0_DBFEN,Port0 PFLASH Line Read Data Buffers Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "P0_CBFEN,Port0 PFLASH Line Read Code Buffers Enable" "0: Disable,1: Enable" repeat.end group.long 0x10++0x7 line.long 0x0 "PFCR4,Platform Flash Memory Configuration 4" bitfld.long 0x0 7. "DMEEE,Disable Multi-Bit ECC Error Exception" "0: Error response sent on system bus for multi-bit..,1: Error response not sent on system bus for.." bitfld.long 0x0 1.--3. "BLK4_PS,Block 4 Pipe Select" "0: Block 4 access can be through any of the command..,1: Block 4 access is always through pipe1,2: Block 4 access is always through pipe2,3: Block 4 access is always through pipe3,4: Block 4 access can be through any of the command..,5: Block 4 access can be through any of the command..,6: Block 4 access can be through any of the command..,7: Block 4 access can be through any of the command.." newline bitfld.long 0x0 0. "DERR_SUP,Data Error Suppression" "0: Reports ECC events on data flash memory accesses,1: Single-bit and multi-bit ECC events on data.." line.long 0x4 "PFAPR,Platform Flash Memory Access Protection" bitfld.long 0x4 30.--31. "M0AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 28.--29. "M1AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 26.--27. "M2AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 24.--25. "M3AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 22.--23. "M4AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 20.--21. "M5AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 18.--19. "M6AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 16.--17. "M7AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 14.--15. "M8AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 12.--13. "M9AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 10.--11. "M10AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 8.--9. "M11AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 6.--7. "M12AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 4.--5. "M13AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 2.--3. "M14AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 0.--1. "M15AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" group.long 0x300++0x3 line.long 0x0 "PFCPGM_PEADR_L,Platform Flash Memory Program Erase Address Logical" hexmask.long 0x0 0.--31. 1. "PEADR_L,Program Erase Address Logical" rgroup.long 0x304++0x3 line.long 0x0 "PFCPGM_PEADR_P,Platform Flash Memory Program Erase Address Physical" hexmask.long 0x0 0.--31. 1. "PEADR_P,Program Erase Address Physical" group.long 0x308++0x3 line.long 0x0 "PFCPGM_XPEADR_L,Platform Flash Memory Express Program Erase Address Logical" hexmask.long 0x0 0.--31. 1. "XPEADR_L,Express Program Erase Address Logical" rgroup.long 0x30C++0x3 line.long 0x0 "PFCPGM_XPEADR_P,Platform Flash Memory Express Program Erase Address Physical" hexmask.long 0x0 0.--31. 1. "XPEADR_P,Express Program Erase Address Physical" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x340)++0x3 line.long 0x0 "PFCBLK_SPELOCK[$1],Block n Sector Program Erase Lock" hexmask.long 0x0 0.--31. 1. "SLCK,Sector Lock" repeat.end group.long 0x358++0x3 line.long 0x0 "PFCBLKU_SPELOCK,Block UTEST Sector Program Erase Lock" bitfld.long 0x0 0. "SLCK,Sector Lock" "0,1" repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x35C)++0x3 line.long 0x0 "PFCBLK_SSPELOCK[$1],Block n Super Sector Program Erase Lock" hexmask.long 0x0 0.--27. 1. "SSLCK,Super Sector Lock" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x380)++0x3 line.long 0x0 "PFCBLK_SETSLOCK[$1],Block n Set Sector Lock" hexmask.long 0x0 0.--31. 1. "SETSLCK,If the vector bit value = 0 the corresponding lock bit is not owned by any master" repeat.end group.long 0x398++0x3 line.long 0x0 "PFCBLKU_SETSLOCK,Block UTEST Set Sector Lock" bitfld.long 0x0 0. "SETSLCK,Set Sector Lock" "0,1" repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x39C)++0x3 line.long 0x0 "PFCBLK_SSETSLOCK[$1],Block n Set Super Sector Lock" hexmask.long 0x0 0.--27. 1. "SSETSLCK,Set Super Sector Lock" repeat.end repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x402683C0 ad:0x402683E0 ad:0x40268400 ad:0x40268420) tree "PFCBLKi_LOCKMASTER_S[$1]" base $2 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "PFCBLK_LOCKMASTER_S[$1],Block a Lock Master Sector b" hexmask.long 0x0 0.--31. 1. "LOCKMASTER_S,Block a Lock Master Sector b" repeat.end tree.end repeat.end base ad:0x40268000 newline rgroup.long 0x480++0x3 line.long 0x0 "PFCBLKU_LOCKMASTER_S,Block UTEST Lock Master Sector" hexmask.long.byte 0x0 0.--7. 1. "LOCKMASTER_S,Lock Master Sector" repeat 3. (list 0x0 0x1 0x2)(list ad:0x40268484 ad:0x402684A0 ad:0x402684BC) tree "PFCBLKi_LOCKMASTER_SS[$1]" base $2 repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "PFCBLK_LOCKMASTER_SS[$1],Block m Lock Master Super Sector n" hexmask.long 0x0 0.--31. 1. "LOCKMASTER_SS,Block a Lock Master Super Sector b" repeat.end tree.end repeat.end tree.end tree "PFLASH_ALT" base ad:0x4026C000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "PFCR[$1],Platform Flash Memory Configuration i" bitfld.long 0x0 5. "P0_DPFEN,Port0 Data Prefetch Enable" "0: Disable,1: Enable" bitfld.long 0x0 4. "P0_CPFEN,Port0 Code Prefetch Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "P0_DBFEN,Port0 PFLASH Line Read Data Buffers Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "P0_CBFEN,Port0 PFLASH Line Read Code Buffers Enable" "0: Disable,1: Enable" repeat.end group.long 0x10++0x7 line.long 0x0 "PFCR4,Platform Flash Memory Configuration 4" bitfld.long 0x0 7. "DMEEE,Disable Multi-Bit ECC Error Exception" "0: Error response sent on system bus for multi-bit..,1: Error response not sent on system bus for.." bitfld.long 0x0 1.--3. "BLK4_PS,Block 4 Pipe Select" "0: Block 4 access can be through any of the command..,1: Block 4 access is always through pipe1,2: Block 4 access is always through pipe2,3: Block 4 access is always through pipe3,4: Block 4 access can be through any of the command..,5: Block 4 access can be through any of the command..,6: Block 4 access can be through any of the command..,7: Block 4 access can be through any of the command.." newline bitfld.long 0x0 0. "DERR_SUP,Data Error Suppression" "0: Reports ECC events on data flash memory accesses,1: Single-bit and multi-bit ECC events on data.." line.long 0x4 "PFAPR,Platform Flash Memory Access Protection" bitfld.long 0x4 30.--31. "M0AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 28.--29. "M1AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 26.--27. "M2AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 24.--25. "M3AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 22.--23. "M4AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 20.--21. "M5AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 18.--19. "M6AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 16.--17. "M7AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 14.--15. "M8AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 12.--13. "M9AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 10.--11. "M10AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 8.--9. "M11AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 6.--7. "M12AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 4.--5. "M13AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" newline bitfld.long 0x4 2.--3. "M14AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" bitfld.long 0x4 0.--1. "M15AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses" group.long 0x300++0x3 line.long 0x0 "PFCPGM_PEADR_L,Platform Flash Memory Program Erase Address Logical" hexmask.long 0x0 0.--31. 1. "PEADR_L,Program Erase Address Logical" rgroup.long 0x304++0x3 line.long 0x0 "PFCPGM_PEADR_P,Platform Flash Memory Program Erase Address Physical" hexmask.long 0x0 0.--31. 1. "PEADR_P,Program Erase Address Physical" group.long 0x308++0x3 line.long 0x0 "PFCPGM_XPEADR_L,Platform Flash Memory Express Program Erase Address Logical" hexmask.long 0x0 0.--31. 1. "XPEADR_L,Express Program Erase Address Logical" rgroup.long 0x30C++0x3 line.long 0x0 "PFCPGM_XPEADR_P,Platform Flash Memory Express Program Erase Address Physical" hexmask.long 0x0 0.--31. 1. "XPEADR_P,Express Program Erase Address Physical" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x340)++0x3 line.long 0x0 "PFCBLK_SPELOCK[$1],Block n Sector Program Erase Lock" hexmask.long 0x0 0.--31. 1. "SLCK,Sector Lock" repeat.end group.long 0x358++0x3 line.long 0x0 "PFCBLKU_SPELOCK,Block UTEST Sector Program Erase Lock" bitfld.long 0x0 0. "SLCK,Sector Lock" "0,1" repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x35C)++0x3 line.long 0x0 "PFCBLK_SSPELOCK[$1],Block n Super Sector Program Erase Lock" hexmask.long 0x0 0.--27. 1. "SSLCK,Super Sector Lock" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x380)++0x3 line.long 0x0 "PFCBLK_SETSLOCK[$1],Block n Set Sector Lock" hexmask.long 0x0 0.--31. 1. "SETSLCK,If the vector bit value = 0 the corresponding lock bit is not owned by any master" repeat.end group.long 0x398++0x3 line.long 0x0 "PFCBLKU_SETSLOCK,Block UTEST Set Sector Lock" bitfld.long 0x0 0. "SETSLCK,Set Sector Lock" "0,1" repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x39C)++0x3 line.long 0x0 "PFCBLK_SSETSLOCK[$1],Block n Set Super Sector Lock" hexmask.long 0x0 0.--27. 1. "SSETSLCK,Set Super Sector Lock" repeat.end repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x4026C3C0 ad:0x4026C3E0 ad:0x4026C400 ad:0x4026C420) tree "PFCBLKi_LOCKMASTER_S[$1]" base $2 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "PFCBLK_LOCKMASTER_S[$1],Block a Lock Master Sector b" hexmask.long 0x0 0.--31. 1. "LOCKMASTER_S,Block a Lock Master Sector b" repeat.end tree.end repeat.end base ad:0x4026C000 newline rgroup.long 0x480++0x3 line.long 0x0 "PFCBLKU_LOCKMASTER_S,Block UTEST Lock Master Sector" hexmask.long.byte 0x0 0.--7. 1. "LOCKMASTER_S,Lock Master Sector" repeat 3. (list 0x0 0x1 0x2)(list ad:0x4026C484 ad:0x4026C4A0 ad:0x4026C4BC) tree "PFCBLKi_LOCKMASTER_SS[$1]" base $2 repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "PFCBLK_LOCKMASTER_SS[$1],Block m Lock Master Super Sector n" hexmask.long 0x0 0.--31. 1. "LOCKMASTER_SS,Block a Lock Master Super Sector b" repeat.end tree.end repeat.end tree.end tree.end tree "PIT (Periodic Interrupt Timer)" base ad:0x0 tree "PIT_0" base ad:0x400B0000 group.long 0x0++0x3 line.long 0x0 "MCR,PIT Module Control" bitfld.long 0x0 2. "MDIS_RTI,Module Disable for RTI" "0: Enables,1: Disables" bitfld.long 0x0 1. "MDIS,Module Disable for PIT" "0: Enables,1: Disables" bitfld.long 0x0 0. "FRZ,Freeze" "0: Timers run in Debug mode,1: Timers stop in Debug mode" rgroup.long 0xE0++0x7 line.long 0x0 "LTMR64H,PIT Upper Lifetimer" hexmask.long 0x0 0.--31. 1. "LTH,Lifetimer Value" line.long 0x4 "LTMR64L,PIT Lower Lifetimer" hexmask.long 0x4 0.--31. 1. "LTL,Lifetimer Value" group.long 0xEC++0x7 line.long 0x0 "RTI_LDVAL_STAT,RTI Timer Load Value Sync Status" bitfld.long 0x0 0. "RT_STAT,Sync Status" "0: Not loaded,1: Loaded" line.long 0x4 "RTI_LDVAL,RTI Timer Load Value" hexmask.long 0x4 0.--31. 1. "TSV,Timer Start Value" rgroup.long 0xF4++0x3 line.long 0x0 "RTI_CVAL,Current RTI Timer Value" hexmask.long 0x0 0.--31. 1. "TVL,Current Timer Value" group.long 0xF8++0x7 line.long 0x0 "RTI_TCTRL,RTI Timer Control" bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x0 0. "TEN,Timer Enable Bit" "0: Disables,1: Enables. The RTI timer begins counting down." line.long 0x4 "RTI_TFLG,RTI Timer Interrupt Flag" eventfld.long 0x4 0. "TIF,Timer Interrupt Flag" "0: Timer still counting down,1: Timer has expired" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x400B0100 ad:0x400B0110 ad:0x400B0120 ad:0x400B0130) tree "TIMER[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "LDVAL,Timer Load Value" hexmask.long 0x0 0.--31. 1. "TSV,Timer Start Value" rgroup.long ($2+0x4)++0x3 line.long 0x0 "CVAL,Current Timer Value" hexmask.long 0x0 0.--31. 1. "TVL,Timer Value" group.long ($2+0x8)++0x7 line.long 0x0 "TCTRL,Timer Control" bitfld.long 0x0 2. "CHN,Chain Mode" "0: Unchains,1: Chains" bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disables,1: Enables. The timer begins counting down." line.long 0x4 "TFLG,Timer Flag" eventfld.long 0x4 0. "TIF,Timer Interrupt Flag" "0: Timer has not expired,1: Timer expired" tree.end repeat.end tree.end tree "PIT_1" base ad:0x400B4000 group.long 0x0++0x3 line.long 0x0 "MCR,PIT Module Control" bitfld.long 0x0 1. "MDIS,Module Disable for PIT" "0: Enables,1: Disables" bitfld.long 0x0 0. "FRZ,Freeze" "0: Timers run in Debug mode,1: Timers stop in Debug mode" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x400B4100 ad:0x400B4110 ad:0x400B4120 ad:0x400B4130) tree "TIMER[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "LDVAL,Timer Load Value" hexmask.long 0x0 0.--31. 1. "TSV,Timer Start Value" rgroup.long ($2+0x4)++0x3 line.long 0x0 "CVAL,Current Timer Value" hexmask.long 0x0 0.--31. 1. "TVL,Timer Value" group.long ($2+0x8)++0x7 line.long 0x0 "TCTRL,Timer Control" bitfld.long 0x0 2. "CHN,Chain Mode" "0: Unchains,1: Chains" bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disables,1: Enables. The timer begins counting down." line.long 0x4 "TFLG,Timer Flag" eventfld.long 0x4 0. "TIF,Timer Interrupt Flag" "0: Timer has not expired,1: Timer expired" tree.end repeat.end tree.end tree "PIT_2" base ad:0x402FC000 group.long 0x0++0x3 line.long 0x0 "MCR,PIT Module Control" bitfld.long 0x0 1. "MDIS,Module Disable for PIT" "0: Enables,1: Disables" bitfld.long 0x0 0. "FRZ,Freeze" "0: Timers run in Debug mode,1: Timers stop in Debug mode" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x402FC100 ad:0x402FC110 ad:0x402FC120 ad:0x402FC130) tree "TIMER[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "LDVAL,Timer Load Value" hexmask.long 0x0 0.--31. 1. "TSV,Timer Start Value" rgroup.long ($2+0x4)++0x3 line.long 0x0 "CVAL,Current Timer Value" hexmask.long 0x0 0.--31. 1. "TVL,Timer Value" group.long ($2+0x8)++0x7 line.long 0x0 "TCTRL,Timer Control" bitfld.long 0x0 2. "CHN,Chain Mode" "0: Unchains,1: Chains" bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disables,1: Enables. The timer begins counting down." line.long 0x4 "TFLG,Timer Flag" eventfld.long 0x4 0. "TIF,Timer Interrupt Flag" "0: Timer has not expired,1: Timer expired" tree.end repeat.end tree.end tree.end tree "PLL (PLL Digital Interface)" base ad:0x402E0000 group.long 0x0++0x13 line.long 0x0 "PLLCR,PLL Control" bitfld.long 0x0 31. "PLLPD,PLL Power Down" "0: Powered up,1: Powered down" line.long 0x4 "PLLSR,PLL Status" eventfld.long 0x4 3. "LOL,Loss-Of-Lock Flag" "0: No loss of lock detected,1: Loss of lock detected" rbitfld.long 0x4 2. "LOCK,Lock Status" "0: Unlocked,1: Locked" line.long 0x8 "PLLDV,PLL Divider" hexmask.long.byte 0x8 25.--30. 1. "ODIV2,Output frequency divider for raw PLL clock." bitfld.long 0x8 12.--14. "RDIV,Input Clock Predivider" "0: Divide by 1,1: Divide by 1,2: Divide by 2,3: Divide by 3,4: Divide by 4,5: Divide by 5,6: Divide by 6,7: Divide by 7" hexmask.long.byte 0x8 0.--7. 1. "MFI,Integer Portion Of Loop Divider" line.long 0xC "PLLFM,PLL Frequency Modulation" bitfld.long 0xC 30. "SSCGBYP,Frequency Modulation (Spread Spectrum Clock Generation) Bypass" "0: Not bypassed,1: Bypassed" bitfld.long 0xC 29. "SPREADCTL,Modulation Type Selection" "?,1: Spread below nominal frequency" hexmask.long.word 0xC 16.--25. 1. "STEPSIZE,Frequency Modulation Step Size" newline hexmask.long.word 0xC 0.--10. 1. "STEPNO,Number Of Steps Of Modulation Period Or Frequency Modulation" line.long 0x10 "PLLFD,PLL Fractional Divider" bitfld.long 0x10 30. "SDMEN,Fractional Mode Enable" "0: Disabled,1: Enabled" bitfld.long 0x10 29. "SDM2,Fractional Mode Configuration" "0,1" bitfld.long 0x10 28. "SDM3,Fractional Mode Configuration" "0,1" newline hexmask.long.word 0x10 0.--14. 1. "MFN,Numerator Of Fractional Loop Division Factor" group.long 0x18++0x3 line.long 0x0 "PLLCAL2,PLL Calibration Register 2" bitfld.long 0x0 7.--8. "ULKCTL,Unlock Control Accuracy" "0: Unlock range = Expected value +/- 9 (recommended..,1: Unlock range = Expected value +/- 17..,2: Unlock range = Expected value +/- 33,3: Unlock range = Expected value +/- 5" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "PLLODIV_[$1],PLL Output Divider" bitfld.long 0x0 31. "DE,Divider Enable" "0: Disabled,1: Enabled" hexmask.long.byte 0x0 16.--23. 1. "DIV,Division Value" repeat.end tree.end tree "PMC (Power Management Controller)" base ad:0x402E8000 group.long 0x0++0xB line.long 0x0 "LVSC,Low Voltage Status and Control" eventfld.long 0x0 31. "PORF,POR Flag" "0: No POR event,1: POR event" eventfld.long 0x0 30. "GNGSWGF,Go/NoGo Detect Flag On VDD_SWG Domain" "0: No event,1: NoGo event" eventfld.long 0x0 29. "GNGSDADC1F,Go/NoGo Detect Flag On VDD_SD_ADC1 Domain" "0: No event,1: NoGo event" newline eventfld.long 0x0 28. "GNGSDADC0F,Go/NoGo Detect Flag On VDD_SD_ADC0 Domain" "0: No event,1: NoGo vent" eventfld.long 0x0 27. "GNG11OSC2F,Go/NoGo Detect Flag On Second PLL Part Of V11 Domain" "0: No event,1: NoGo event" eventfld.long 0x0 26. "GNG25OSC2F,GO/NoGo Detect Flag On Second PLL Part Of V25 Domain" "0: No event,1: NoGo event" newline eventfld.long 0x0 25. "GNG11OSCF,Go/NoGo Detect Flag On Osc Part Of V11 Domain" "0: No event,1: NoGo event" eventfld.long 0x0 24. "GNG25OSCF,GO/NoGo Detect Flag On Osc Part Of V25 Domain" "0: No event,1: NoGo event" eventfld.long 0x0 23. "LVR11LPF,LVR11LP Flag On V11 Domain" "0: No event,1: Event" newline eventfld.long 0x0 22. "LVR11F,LVR11 Flag On V11 Domain In FPM" "0: No event,1: Event" eventfld.long 0x0 21. "LVR25LPF,LVR25LP Flag On V25 Domain" "0: No event,1: Event" eventfld.long 0x0 20. "LVR25F,LVR25 Flag On V25 Domain In FPM" "0: No event,1: Event" newline eventfld.long 0x0 19. "LVRBLPF,LVRBLP Flag On VDD_HV_B Domain" "0: No event,1: Event" eventfld.long 0x0 18. "LVRBF,LVRB Flag On VDD_HV_B Domain In FPM" "0: No event,1: Event" eventfld.long 0x0 17. "LVRALPF,LVRALP Flag On VDD_HV_A Domain" "0: No event,1: Event" newline eventfld.long 0x0 16. "LVRAF,LVRA Flag On VDD_HV_A Domain In FPM" "0: No event,1: Event" rbitfld.long 0x0 15. "LVDSS,LVDS Status On VDD_LVDS Domain In FPM" "0: Above threshold,1: Below threshold" rbitfld.long 0x0 14. "HVD15S,HVD15 Status On V15 Domain In FPM" "0: Below threshold or LPM,1: Above threshold and FPM" newline rbitfld.long 0x0 12. "LVD5AS,LVD5A Status On VDD_HV_A Domain In FPM" "0: Above threshold,1: Below threshold" rbitfld.long 0x0 11. "HVD11S,HVD11 Status On V11 Domain In FPM" "0: Below threshold or LPM,1: Above threshold and FPM" rbitfld.long 0x0 10. "HVD25S,HVD25 Status On V25 Domain In FPM" "0: Below threshold or LPM,1: Above threshold and FPM" newline rbitfld.long 0x0 9. "HVDBS,HVDB Status On VDD_HV_B Domain In FPM" "0: Below threshold or LPM,1: Above threshold and FPM" rbitfld.long 0x0 8. "HVDAS,HVDA Status On VDD_HV_A Domain In FPM" "0: Below threshold or LPM,1: Above threshold and FPM" eventfld.long 0x0 7. "LVDSF,LVDS Flag On VDD_LVDS Domain In FPM" "0: Not changed,1: Changed" newline eventfld.long 0x0 6. "HVD15F,HVD15 Flag On V15 Domain In FPM" "0: Not changed,1: Changed" eventfld.long 0x0 4. "LVD5AF,LVD5A Flag On VDD_HV_A Domain In FPM" "0: Not changed,1: Changed" eventfld.long 0x0 3. "HVD11F,HVD11 Flag On V11 Domain In FPM" "0: Not changed,1: Changed" newline eventfld.long 0x0 2. "HVD25F,HVD25 Flag On V25 Domain In FPM" "0: Not changed,1: Changed" eventfld.long 0x0 1. "HVDBF,HVDB Flag On VDD_HV_B Domain In FPM" "0: Not changed,1: Changed" eventfld.long 0x0 0. "HVDAF,HVDA Flag On VDD_HV_A Domain In FPM" "0: Not changed,1: Changed" line.long 0x4 "CONFIG,PMC Configuration" bitfld.long 0x4 9. "LVDIE,Low Voltage Detect Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x4 8. "HVDIE,HVD Interrupt Enable" "0: Disables,1: Enables" bitfld.long 0x4 7. "LMSMPSEN,V15 Switched-Mode Power Supply Enable" "0: Disables,1: Enables" newline bitfld.long 0x4 4. "LVRBLPEN,LVRBLP Enable During LPM" "0: Disables,1: Enables" bitfld.long 0x4 3. "LPM25EN,V25 Domain Enable During LPM" "0: Disables,1: Enables" rbitfld.long 0x4 0. "LMEN,Last Mile Regulator Enable" "0,1" line.long 0x8 "SMPSCONFIG,SMPS Configuration" hexmask.long.byte 0x8 24.--28. 1. "ONTIME5V,SMPS Duty Cycle For 5 V Range" rbitfld.long 0x8 23. "PGATES,PMOS_CTRL Status" "0: Driven to VSS_DCDC,1: Driven to VDD_DCDC" hexmask.long.byte 0x8 16.--20. 1. "ONTIME3V,SMPS Duty Cycle For 3 V Range" newline hexmask.long.byte 0x8 8.--12. 1. "PERIOD,SMPS Period" bitfld.long 0x8 7. "DITHEREN,IRC Dither Enable" "0: Disables,1: Enables" bitfld.long 0x8 5.--6. "DITHERCFG,IRC Dither Configuration" "0,1,2,3" newline bitfld.long 0x8 4. "LPM15EN,V15 Domain Enable During LPM" "0: Not kept on target,1: Kept on target" hexmask.long.byte 0x8 0.--3. 1. "CFG,SMPS Configuration Select" rgroup.long 0xC++0x3 line.long 0x0 "VERID,Version ID" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" bitfld.long 0x0 0. "LMFEAT,Last Mile Regulator Feature" "0: Not available,1: Available" tree.end tree "PRAMC (RAM Controller)" base ad:0x0 tree "PRAMC_0" base ad:0x40264000 group.long 0x0++0x3 line.long 0x0 "PRCR1,Platform RAM Configuration register 1" bitfld.long 0x0 6. "P0_BO_DIS,Port p0 read burst optimization disable." "0: 64-bit WRP4 read bursts are optimized such that..,1: 64-bit WRP4 read bursts are not optimized; the.." bitfld.long 0x0 0. "FT_DIS,Flow-through disabled" "0: RAM read data is passed directly to the system..,1: RAM read data is registered prior to returning.." tree.end tree "PRAMC_1" base ad:0x40464000 group.long 0x0++0x3 line.long 0x0 "PRCR1,Platform RAM Configuration register 1" bitfld.long 0x0 6. "P0_BO_DIS,Port p0 read burst optimization disable." "0: 64-bit WRP4 read bursts are optimized such that..,1: 64-bit WRP4 read bursts are not optimized; the.." bitfld.long 0x0 0. "FT_DIS,Flow-through disabled" "0: RAM read data is passed directly to the system..,1: RAM read data is registered prior to returning.." tree.end tree.end tree "QUADSPI (Quad Serial Peripheral Interface)" base ad:0x0 tree "QUADSPI" base ad:0x404CC000 group.long 0x0++0x3 line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 24.--25. "DQS_FA_SEL,DQS clock for sampling read data at flash memory A" "0,1,2,3" newline bitfld.long 0x0 17. "ISD3FA,Idle signal drive IOFA[3] flash memory A" "0: IOFA[3] is driven to logic L,1: IOFA[3] is driven to logic H" newline bitfld.long 0x0 16. "ISD2FA,Idle signal drive IOFA[2] flash memory A" "0: IOFA[2] is driven to logic L.,1: IOFA[2] is driven to logic H." newline bitfld.long 0x0 14. "MDIS,Module disable" "0: Enable QuadSPI clocks,1: Allow external logic to disable QuadSPI clocks" newline bitfld.long 0x0 12. "DLPEN,Data learning pattern enable" "0,1" newline bitfld.long 0x0 11. "CLR_TXF,Clear TX FIFO/buffer" "0: No action,1: Read and write pointers of the TX buffer are.." newline bitfld.long 0x0 10. "CLR_RXF,Clear RX FIFO" "0: No action,1: Read and write pointers of the RX buffer are.." newline bitfld.long 0x0 8. "VAR_LAT_EN,Variable latency" "0: Fixed latency: Twice + 1 latency enable,1: Variable latency: 'Once' or 'twice + 1' the.." newline bitfld.long 0x0 7. "DDR_EN,DDR mode enable" "0: 2x clock disabled for SDR instructions only,1: 2x clock enabled for DDR instructions. Note: 2x.." newline bitfld.long 0x0 6. "DQS_EN,DQS enable" "?,1: DQS enabled" newline bitfld.long 0x0 4. "DQS_OUT_EN,DQS as an output" "0: DQS as an output from controller is disabled.,1: DQS as an output from controller is enabled." newline bitfld.long 0x0 1. "SWRSTHD,Software reset for AHB domain" "0,1" newline bitfld.long 0x0 0. "SWRSTSD,Software reset for serial flash memory domain" "0,1" group.long 0x8++0x1F line.long 0x0 "IPCR,IP Configuration Register" hexmask.long.byte 0x0 24.--27. 1. "SEQID,Points to a sequence in the LUT" newline bitfld.long 0x0 23. "ARB_UNLOCK,Arbitration Unlock" "0,1" newline bitfld.long 0x0 22. "ARB_LOCK,Arbitration Lock" "0,1" newline hexmask.long.word 0x0 0.--15. 1. "IDATSZ,IP data transfer size" line.long 0x4 "FLSHCR,Flash Memory Configuration Register" bitfld.long 0x4 16.--17. "TDH,Serial flash memory data in hold time" "0: Data aligned with the posedge of internal..,1: Data aligned with 2x serial flash memory half..,?,?" newline hexmask.long.byte 0x4 8.--11. 1. "TCSH,Serial flash memory CS hold time" newline hexmask.long.byte 0x4 0.--3. 1. "TCSS,Serial flash memory CS setup time" line.long 0x8 "BUF0CR,Buffer 0 Configuration Register" hexmask.long.byte 0x8 8.--15. 1. "ADATSZ,AHB data transfer size" newline hexmask.long.byte 0x8 0.--3. 1. "MSTRID,Master ID" line.long 0xC "BUF1CR,Buffer 1 Configuration Register" hexmask.long.byte 0xC 8.--15. 1. "ADATSZ,AHB data transfer size" newline hexmask.long.byte 0xC 0.--3. 1. "MSTRID,Master ID" line.long 0x10 "BUF2CR,Buffer 2 Configuration Register" hexmask.long.byte 0x10 8.--15. 1. "ADATSZ,AHB data transfer size" newline hexmask.long.byte 0x10 0.--3. 1. "MSTRID,Master ID" line.long 0x14 "BUF3CR,Buffer 3 Configuration Register" bitfld.long 0x14 31. "ALLMST,All master enable" "0,1" newline hexmask.long.byte 0x14 8.--15. 1. "ADATSZ,AHB data transfer size" newline hexmask.long.byte 0x14 0.--3. 1. "MSTRID,Master ID" line.long 0x18 "BFGENCR,Buffer Generic Configuration Register" hexmask.long.byte 0x18 28.--31. 1. "SEQID_WR,Write Sequence ID" newline bitfld.long 0x18 17. "SEQID_WR_EN,Enable Write Sequence ID" "0,1" newline hexmask.long.byte 0x18 12.--15. 1. "SEQID,Points to a sequence in the LUT." line.long 0x1C "SOCCR,SOC Configuration Register" hexmask.long 0x1C 0.--31. 1. "SOCCFG,SOC configuration" group.long 0x30++0xB line.long 0x0 "BUF0IND,Buffer 0 Top Index Register" hexmask.long.byte 0x0 3.--10. 1. "TPINDX0,Top index of buffer 0" line.long 0x4 "BUF1IND,Buffer 1 Top Index Register" hexmask.long.byte 0x4 3.--10. 1. "TPINDX1,Top index of buffer 1" line.long 0x8 "BUF2IND,Buffer 2 Top Index Register" hexmask.long.byte 0x8 3.--10. 1. "TPINDX2,Top index of buffer 2" group.long 0x50++0x3 line.long 0x0 "AWRCR,AHB Write Configuration Register" bitfld.long 0x0 15. "PPW_WR_DIS,Page program wait write disabled" "0: Enables subsequent writes,1: Disables subsequent writes to the flash memory." newline bitfld.long 0x0 14. "PPW_RD_DIS,Page program wait read disabled" "0: Enables subsequent reads,1: Disables subsequent reads to the flash memory." newline hexmask.long.byte 0x0 0.--7. 1. "AWTRGLVL,AHB write trigger level" group.long 0x60++0x3 line.long 0x0 "DLLCRA,DLL Flash Memory A Configuration Register" bitfld.long 0x0 31. "DLLEN,DLL enable" "0: DLL reference logic remains in reset and should..,1: Enables DLL logic. Set it to 1 after all the.." newline bitfld.long 0x0 30. "FREQEN,Frequency enable" "0: Selects delay chain for low frequency of operation,1: Selects delay chain for high frequency of.." newline hexmask.long.byte 0x0 24.--27. 1. "DLL_REFCNTR,DLL reference counter" newline hexmask.long.byte 0x0 20.--23. 1. "DLLRES,DLL resolution" newline hexmask.long.byte 0x0 16.--19. 1. "SLV_FINE_OFFSET,Fine offset delay elements in incoming DQS" newline bitfld.long 0x0 12.--14. "SLV_DLY_OFFSET,T/16 offset delay elements in incoming DQS" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 8.--11. 1. "SLV_DLY_COARSE,Delay elements in each delay tap" newline bitfld.long 0x0 4. "DLL_CDL8,DLL CDL8 Enable" "0: DLL is implemented to support within 2x variation,1: DLL is implemented to support within 3x.." newline bitfld.long 0x0 3. "SLAVE_AUTO_UPDT,Slave chain update" "0: Auto-update feature is disabled.,1: Auto-update feature is enabled." newline bitfld.long 0x0 2. "SLV_EN,Slave enable" "0: DLL slave logic remains in reset and its value..,1: Enables DQS slave delay chain and should be 1.." newline bitfld.long 0x0 1. "SLV_DLL_BYPASS,Slave DLL bypass" "0: Disables manual selection of coarse delays in..,1: Enables selection of number of delays in each.." newline bitfld.long 0x0 0. "SLV_UPD,Slave update" "0: Disables any further update on DQS slave delay..,1: Updates the DQS slave delay chain with either.." group.long 0x6C++0x3 line.long 0x0 "PARITYCR,Parity Configuration Register" bitfld.long 0x0 15. "CRC_WNDW_FA,CRC address window configuration" "0: Calculates parity (CRC) over fixed address..,1: Calculates parity (CRC) over incremental window.." newline hexmask.long.byte 0x0 9.--14. 1. "CHUNKSIZE_FA,Chunk size for flash memory A" newline bitfld.long 0x0 8. "BYTE_SIZE_FA,Byte size for flash memory A" "0,1" newline bitfld.long 0x0 7. "CRCEN_FA,CRC parity checker logic" "0: Disables parity mechanism. In case of parity..,1: CRC parity checker logic for flash memory A read.." newline bitfld.long 0x0 6. "CRCBEN_FA,Adds CRC bar parity from flash memory A output to QuadSPI controller" "0,1" newline bitfld.long 0x0 5. "CRCBIN_FA,Adds CRC bar parity to flash memory A input from QuadSPI controller" "0,1" group.long 0x100++0xB line.long 0x0 "SFAR,Serial Flash Memory Address Register" hexmask.long 0x0 0.--31. 1. "SFADR,Serial flash memory address" line.long 0x4 "SFACR,Serial Flash Memory Address Configuration Register" bitfld.long 0x4 20. "CAS_INTRLVD,CAS Interleaving" "0: CAS interleaving is disabled,1: CAS interleaving is enabled" newline bitfld.long 0x4 17. "BYTE_SWAP,Byte swapping" "0: One word of two bytes at [nth n+1th] address,1: One word of two bytes at [n+1th nth] address" newline bitfld.long 0x4 16. "WA,Word addressable" "0: Byte addressable serial flash memory mode,1: Word (2-byte) addressable serial flash memory mode" newline hexmask.long.byte 0x4 8.--12. 1. "PPWB,Page program boundary" newline hexmask.long.byte 0x4 0.--3. 1. "CAS,Column address space" line.long 0x8 "SMPR,Sampling Register" bitfld.long 0x8 24.--26. "DLLFSMPFA,Selects the nth tap provided by slave delay chain for flash memory A" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 6. "FSDLY,Full-speed delay selection for internal/pad loop back DQS sampling" "0,1" newline bitfld.long 0x8 5. "FSPHS,Full-speed phase selection for SDR instructions" "0,1" rgroup.long 0x10C++0x3 line.long 0x0 "RBSR,RX Buffer Status Register" hexmask.long.word 0x0 16.--31. 1. "RDCTR,Read counter" newline hexmask.long.byte 0x0 0.--5. 1. "RDBFL,RX buffer fill level" group.long 0x110++0x3 line.long 0x0 "RBCT,RX Buffer Control Register" bitfld.long 0x0 8. "RXBRD,RX buffer readout" "0,1" newline hexmask.long.byte 0x0 0.--4. 1. "WMRK,RX buffer watermark" rgroup.long 0x120++0x3 line.long 0x0 "AWRSR,AHB Write Status Register" bitfld.long 0x0 2. "SEQAUJOIN,Sequence auto join" "0,1" rgroup.long 0x12C++0x3 line.long 0x0 "DLLSR,DLL Status Register" bitfld.long 0x0 15. "DLLA_LOCK,DLL A lock status" "0,1" newline bitfld.long 0x0 14. "SLVA_LOCK,Slave high lock status" "0,1" newline bitfld.long 0x0 13. "DLLA_RANGE_ERR,DLL master delay chain" "0,1" newline bitfld.long 0x0 12. "DLLA_FINE_UNDERFLOW,Fine delay chain underflow" "0,1" newline hexmask.long.byte 0x0 4.--7. 1. "DLLA_SLV_FINE_VAL,Fine delay cells in slave delay chain" newline hexmask.long.byte 0x0 0.--3. 1. "DLLA_SLV_COARSE_VAL,Coarse delay cells in slave delay chain" group.long 0x130++0x3 line.long 0x0 "DLCR,Data Learning Configuration Register" bitfld.long 0x0 24. "DL_NONDLP_FLSH,Data learning enabled for non-DLP flash memory" "0,1" newline bitfld.long 0x0 14.--15. "DLP_SEL_FA,Selects pattern matching IO pads" "0: Pattern matching is ignored. This is only for..,1: IO1 is used for matching,2: IO3 is used for matching. This is only for..,3: Both IO1 and IO3 are used for pattern matching" rgroup.long 0x134++0x3 line.long 0x0 "DLSR_FA,Data Learning Status Flash Memory A Register" bitfld.long 0x0 31. "DLPFFA,Data learning pattern fail" "0,1" newline hexmask.long.byte 0x0 8.--15. 1. "POS_EDGE,DLP positive edge match signature for flash memory A" newline hexmask.long.byte 0x0 0.--7. 1. "NEG_EDGE,DLP negative edge match signature for flash memory A" rgroup.long 0x150++0x3 line.long 0x0 "TBSR,TX Buffer Status Register" hexmask.long.word 0x0 16.--31. 1. "TRCTR,Transmit counter" newline hexmask.long.word 0x0 0.--8. 1. "TRBFL,TX buffer fill level" group.long 0x154++0x7 line.long 0x0 "TBDR,TX Buffer Data Register" hexmask.long 0x0 0.--31. 1. "TXDATA,TX data" line.long 0x4 "TBCT,TX Buffer Control Register" hexmask.long.byte 0x4 0.--7. 1. "WMRK,Watermark for TX buffer" rgroup.long 0x15C++0x3 line.long 0x0 "SR,Status Register" bitfld.long 0x0 27. "TXFULL,TX buffer full" "0,1" newline bitfld.long 0x0 26. "TXDMA,TX DMA" "0,1" newline bitfld.long 0x0 25. "TXWA,TX buffer watermark available" "0,1" newline bitfld.long 0x0 24. "TXNE,TX buffer not empty" "0,1" newline bitfld.long 0x0 23. "RXDMA,RX buffer DMA" "0,1" newline bitfld.long 0x0 19. "RXFULL,RX buffer full" "0,1" newline bitfld.long 0x0 16. "RXWE,RX buffer watermark exceeded" "0,1" newline bitfld.long 0x0 14. "AHB3FUL,AHB 3 buffer full" "0,1" newline bitfld.long 0x0 13. "AHB2FUL,AHB 2 buffer full" "0,1" newline bitfld.long 0x0 12. "AHB1FUL,AHB 1 buffer full" "0,1" newline bitfld.long 0x0 11. "AHB0FUL,AHB 0 buffer full" "0,1" newline bitfld.long 0x0 10. "AHB3NE,AHB 3 buffer not empty" "0,1" newline bitfld.long 0x0 9. "AHB2NE,AHB 2 buffer not empty" "0,1" newline bitfld.long 0x0 8. "AHB1NE,AHB 1 buffer not empty" "0,1" newline bitfld.long 0x0 7. "AHB0NE,AHB 0 buffer not empty" "0,1" newline bitfld.long 0x0 6. "AHBTRN,AHB access transaction pending" "0,1" newline bitfld.long 0x0 4. "AWRACC,AHB write access" "0,1" newline bitfld.long 0x0 2. "AHB_ACC,AHB read access" "0,1" newline bitfld.long 0x0 1. "IP_ACC,IP access" "0,1" newline bitfld.long 0x0 0. "BUSY,Module busy" "0,1" group.long 0x160++0x7 line.long 0x0 "FR,Flag Register" eventfld.long 0x0 31. "DLPFF,Data learning pattern failure flag" "0,1" newline eventfld.long 0x0 28. "DLLABRT,DLL abort" "?,1: This field is set whenever DLL is unlocked while.." newline eventfld.long 0x0 27. "TBFF,TX buffer fill flag" "0,1" newline eventfld.long 0x0 26. "TBUF,TX buffer underrun flag" "0,1" newline eventfld.long 0x0 24. "DLLUNLCK,DLL unlock" "?,1: This field is set whenever DLL unlock event.." newline eventfld.long 0x0 23. "ILLINE,Illegal instruction error flag" "0,1" newline eventfld.long 0x0 17. "RBOF,RX buffer overflow flag" "0,1" newline eventfld.long 0x0 16. "RBDF,RX buffer drain flag" "0,1" newline eventfld.long 0x0 15. "AAEF,AHB abort error flag" "0,1" newline eventfld.long 0x0 14. "AITEF,AHB illegal transaction error flag" "0,1" newline eventfld.long 0x0 13. "AIBSEF,AHB illegal burst size error flag" "0,1" newline eventfld.long 0x0 12. "ABOF,AHB buffer overflow flag" "0,1" newline eventfld.long 0x0 10. "CRCAEF,Sets when there is CRC or ECC error for flash memory A" "0: CRCEF interrupt is not generated.,1: CRCEF interrupt is generated." newline eventfld.long 0x0 8. "PPWF,Page-program wait flag after flash memory write flag" "0,1" newline eventfld.long 0x0 6. "IPIEF,IP command trigger could not be executed error flag" "0,1" newline eventfld.long 0x0 0. "TFF,IP command transaction finished flag" "0,1" line.long 0x4 "RSER,Interrupt and DMA Request Select and Enable Register" bitfld.long 0x4 31. "DLPFIE,Data learning pattern failure interrupt enable" "0: No DLPFF interrupt is generated.,1: DLPFF interrupt is generated." newline bitfld.long 0x4 27. "TBFIE,TX buffer fill interrupt enable flag" "0: No TBFF interrupt is generated.,1: TBFF interrupt is generated." newline bitfld.long 0x4 26. "TBUIE,TX buffer underrun interrupt enable flag" "0: No TBUF interrupt is generated,1: TBUF interrupt is generated" newline bitfld.long 0x4 25. "TBFDE,TX buffer fill DMA enable" "0: No DMA request is generated,1: DMA request is generated" newline bitfld.long 0x4 24. "DLLULIE,DLL unlock interrupt enable" "?,1: Write 1 to this to enable generation of.." newline bitfld.long 0x4 23. "ILLINIE,Illegal instruction error interrupt enable" "0: No ILLINE interrupt is generated.,1: ILLINE interrupt is generated." newline bitfld.long 0x4 21. "RBDDE,RX buffer drain DMA enable" "0: No DMA request is generated.,1: DMA request is generated." newline bitfld.long 0x4 17. "RBOIE,RX buffer overflow interrupt enable" "0: No RBOF interrupt is generated.,1: RBOF interrupt is generated." newline bitfld.long 0x4 16. "RBDIE,RX buffer drain interrupt enable" "0: No RBDF interrupt is generated.,1: RBDF Interrupt is generated." newline bitfld.long 0x4 15. "AAIE,AHB abort error interrupt enable" "0: No AAEF interrupt is generated,1: AAEF interrupt is generated" newline bitfld.long 0x4 14. "AITIE,AHB illegal transaction interrupt enable flag" "0: No AITEF interrupt is generated.,1: AITEF interrupt is generated." newline bitfld.long 0x4 13. "AIBSIE,AHB illegal burst size interrupt enable flag" "0: No AIBSEF interrupt is generated.,1: AIBSEF interrupt is generated." newline bitfld.long 0x4 12. "ABOIE,AHB buffer overflow interrupt enable flag" "0: No ABOF interrupt is generated.,1: ABOF interrupt is generated." newline bitfld.long 0x4 10. "CRCAIE,CRC and ECC interrupt enable for flash memory A" "0: CRCAEF interrupt is not generated.,1: CRCAEF interrupt is generated." newline bitfld.long 0x4 8. "PPWIE,Page-program wait interrupt flag" "0: No PPWIE interrupt is generated,1: PPWIE interrupt is generated" newline bitfld.long 0x4 6. "IPIEIE,IP command trigger during IP access error interrupt enable flag" "0: No IPIEF interrupt is generated,1: IPIEF interrupt is generated" newline bitfld.long 0x4 0. "TFIE,Transaction finished interrupt enable flag" "0: No TFF interrupt is generated.,1: TFF interrupt is generated." group.long 0x16C++0x3 line.long 0x0 "SPTRCLR,Sequence Pointer Clear Register" bitfld.long 0x0 18. "STREAM_EN,Enable Streaming Port" "?,1: Enables AHB read as streaming port with 64K.." newline bitfld.long 0x0 17. "PREFETCH_DIS,Prefetch disable" "0,1" newline bitfld.long 0x0 16. "ABRT_CLR,Flash memory Abort/AHB buffer clear" "0,1" newline bitfld.long 0x0 8. "IPPTRC,IP pointer clear" "?,1: Clears the sequence pointer for IP accesses as.." newline bitfld.long 0x0 0. "BFPTRC,Buffer pointer clear" "?,1: Clears the sequence pointer for AHB read.." group.long 0x180++0x7 line.long 0x0 "SFA1AD,Serial Flash Memory A1 Top Address Register" hexmask.long.tbyte 0x0 10.--31. 1. "TPADA1,Top address for serial flash memory A1" line.long 0x4 "SFA2AD,Serial Flash Memory A2 Top Address Register" hexmask.long.tbyte 0x4 10.--31. 1. "TPADA2,Top address for serial flash memory A2" group.long 0x190++0x3 line.long 0x0 "DLPR,Data Learn Pattern Register" hexmask.long 0x0 0.--31. 1. "DLPV,Data learning pattern value" rgroup.long 0x194++0x3 line.long 0x0 "FAILA_ADDR,Flash Memory A Failing Address Status Register" hexmask.long 0x0 0.--31. 1. "ADDR,Failing address for flash memory A" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x200)++0x3 line.long 0x0 "RBDR[$1],RX Buffer Data Register" hexmask.long 0x0 0.--31. 1. "RXDATA,RX data" repeat.end group.long 0x300++0x7 line.long 0x0 "LUTKEY,LUT Key Register" hexmask.long 0x0 0.--31. 1. "KEY,Key to lock or unlock the LUT" line.long 0x4 "LCKCR,LUT Lock Configuration Register" bitfld.long 0x4 1. "UNLOCK,Unlock LUT" "0,1" newline bitfld.long 0x4 0. "LOCK,Lock LUT" "0,1" group.long 0x310++0x13F line.long 0x0 "LUT0,LUT Register" hexmask.long.byte 0x0 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x0 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x0 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x0 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x0 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x0 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x4 "LUT1,LUT Register" hexmask.long.byte 0x4 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x4 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x4 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x4 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x4 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x4 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x8 "LUT2,LUT Register" hexmask.long.byte 0x8 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x8 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x8 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x8 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x8 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x8 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xC "LUT3,LUT Register" hexmask.long.byte 0xC 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xC 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xC 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xC 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xC 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xC 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x10 "LUT4,LUT Register" hexmask.long.byte 0x10 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x10 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x10 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x10 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x10 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x10 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x14 "LUT5,LUT Register" hexmask.long.byte 0x14 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x14 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x14 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x14 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x14 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x14 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x18 "LUT6,LUT Register" hexmask.long.byte 0x18 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x18 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x18 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x18 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x18 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x18 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x1C "LUT7,LUT Register" hexmask.long.byte 0x1C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x1C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x1C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x1C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x1C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x1C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x20 "LUT8,LUT Register" hexmask.long.byte 0x20 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x20 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x20 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x20 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x20 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x20 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x24 "LUT9,LUT Register" hexmask.long.byte 0x24 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x24 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x24 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x24 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x24 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x24 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x28 "LUT10,LUT Register" hexmask.long.byte 0x28 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x28 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x28 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x28 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x28 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x28 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x2C "LUT11,LUT Register" hexmask.long.byte 0x2C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x2C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x2C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x2C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x2C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x2C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x30 "LUT12,LUT Register" hexmask.long.byte 0x30 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x30 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x30 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x30 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x30 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x30 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x34 "LUT13,LUT Register" hexmask.long.byte 0x34 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x34 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x34 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x34 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x34 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x34 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x38 "LUT14,LUT Register" hexmask.long.byte 0x38 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x38 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x38 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x38 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x38 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x38 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x3C "LUT15,LUT Register" hexmask.long.byte 0x3C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x3C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x3C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x3C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x3C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x3C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x40 "LUT16,LUT Register" hexmask.long.byte 0x40 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x40 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x40 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x40 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x40 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x40 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x44 "LUT17,LUT Register" hexmask.long.byte 0x44 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x44 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x44 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x44 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x44 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x44 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x48 "LUT18,LUT Register" hexmask.long.byte 0x48 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x48 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x48 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x48 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x48 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x48 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x4C "LUT19,LUT Register" hexmask.long.byte 0x4C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x4C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x4C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x4C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x4C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x4C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x50 "LUT20,LUT Register" hexmask.long.byte 0x50 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x50 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x50 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x50 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x50 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x50 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x54 "LUT21,LUT Register" hexmask.long.byte 0x54 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x54 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x54 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x54 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x54 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x54 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x58 "LUT22,LUT Register" hexmask.long.byte 0x58 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x58 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x58 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x58 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x58 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x58 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x5C "LUT23,LUT Register" hexmask.long.byte 0x5C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x5C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x5C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x5C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x5C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x5C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x60 "LUT24,LUT Register" hexmask.long.byte 0x60 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x60 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x60 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x60 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x60 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x60 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x64 "LUT25,LUT Register" hexmask.long.byte 0x64 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x64 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x64 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x64 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x64 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x64 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x68 "LUT26,LUT Register" hexmask.long.byte 0x68 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x68 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x68 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x68 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x68 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x68 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x6C "LUT27,LUT Register" hexmask.long.byte 0x6C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x6C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x6C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x6C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x6C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x6C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x70 "LUT28,LUT Register" hexmask.long.byte 0x70 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x70 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x70 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x70 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x70 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x70 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x74 "LUT29,LUT Register" hexmask.long.byte 0x74 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x74 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x74 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x74 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x74 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x74 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x78 "LUT30,LUT Register" hexmask.long.byte 0x78 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x78 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x78 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x78 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x78 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x78 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x7C "LUT31,LUT Register" hexmask.long.byte 0x7C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x7C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x7C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x7C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x7C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x7C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x80 "LUT32,LUT Register" hexmask.long.byte 0x80 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x80 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x80 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x80 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x80 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x80 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x84 "LUT33,LUT Register" hexmask.long.byte 0x84 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x84 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x84 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x84 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x84 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x84 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x88 "LUT34,LUT Register" hexmask.long.byte 0x88 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x88 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x88 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x88 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x88 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x88 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x8C "LUT35,LUT Register" hexmask.long.byte 0x8C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x8C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x8C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x8C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x8C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x8C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x90 "LUT36,LUT Register" hexmask.long.byte 0x90 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x90 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x90 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x90 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x90 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x90 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x94 "LUT37,LUT Register" hexmask.long.byte 0x94 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x94 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x94 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x94 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x94 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x94 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x98 "LUT38,LUT Register" hexmask.long.byte 0x98 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x98 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x98 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x98 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x98 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x98 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x9C "LUT39,LUT Register" hexmask.long.byte 0x9C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x9C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x9C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x9C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x9C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x9C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xA0 "LUT40,LUT Register" hexmask.long.byte 0xA0 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xA0 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xA0 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xA0 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xA0 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xA0 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xA4 "LUT41,LUT Register" hexmask.long.byte 0xA4 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xA4 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xA4 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xA4 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xA4 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xA4 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xA8 "LUT42,LUT Register" hexmask.long.byte 0xA8 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xA8 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xA8 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xA8 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xA8 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xA8 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xAC "LUT43,LUT Register" hexmask.long.byte 0xAC 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xAC 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xAC 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xAC 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xAC 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xAC 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xB0 "LUT44,LUT Register" hexmask.long.byte 0xB0 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xB0 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xB0 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xB0 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xB0 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xB0 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xB4 "LUT45,LUT Register" hexmask.long.byte 0xB4 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xB4 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xB4 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xB4 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xB4 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xB4 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xB8 "LUT46,LUT Register" hexmask.long.byte 0xB8 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xB8 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xB8 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xB8 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xB8 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xB8 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xBC "LUT47,LUT Register" hexmask.long.byte 0xBC 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xBC 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xBC 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xBC 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xBC 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xBC 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xC0 "LUT48,LUT Register" hexmask.long.byte 0xC0 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xC0 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xC0 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xC0 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xC0 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xC0 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xC4 "LUT49,LUT Register" hexmask.long.byte 0xC4 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xC4 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xC4 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xC4 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xC4 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xC4 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xC8 "LUT50,LUT Register" hexmask.long.byte 0xC8 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xC8 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xC8 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xC8 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xC8 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xC8 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xCC "LUT51,LUT Register" hexmask.long.byte 0xCC 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xCC 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xCC 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xCC 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xCC 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xCC 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xD0 "LUT52,LUT Register" hexmask.long.byte 0xD0 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xD0 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xD0 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xD0 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xD0 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xD0 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xD4 "LUT53,LUT Register" hexmask.long.byte 0xD4 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xD4 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xD4 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xD4 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xD4 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xD4 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xD8 "LUT54,LUT Register" hexmask.long.byte 0xD8 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xD8 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xD8 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xD8 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xD8 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xD8 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xDC "LUT55,LUT Register" hexmask.long.byte 0xDC 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xDC 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xDC 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xDC 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xDC 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xDC 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xE0 "LUT56,LUT Register" hexmask.long.byte 0xE0 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xE0 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xE0 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xE0 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xE0 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xE0 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xE4 "LUT57,LUT Register" hexmask.long.byte 0xE4 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xE4 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xE4 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xE4 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xE4 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xE4 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xE8 "LUT58,LUT Register" hexmask.long.byte 0xE8 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xE8 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xE8 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xE8 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xE8 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xE8 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xEC "LUT59,LUT Register" hexmask.long.byte 0xEC 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xEC 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xEC 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xEC 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xEC 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xEC 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xF0 "LUT60,LUT Register" hexmask.long.byte 0xF0 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xF0 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xF0 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xF0 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xF0 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xF0 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xF4 "LUT61,LUT Register" hexmask.long.byte 0xF4 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xF4 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xF4 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xF4 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xF4 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xF4 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xF8 "LUT62,LUT Register" hexmask.long.byte 0xF8 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xF8 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xF8 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xF8 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xF8 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xF8 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0xFC "LUT63,LUT Register" hexmask.long.byte 0xFC 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0xFC 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xFC 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0xFC 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0xFC 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0xFC 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x100 "LUT64,LUT Register" hexmask.long.byte 0x100 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x100 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x100 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x100 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x100 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x100 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x104 "LUT65,LUT Register" hexmask.long.byte 0x104 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x104 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x104 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x104 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x104 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x104 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x108 "LUT66,LUT Register" hexmask.long.byte 0x108 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x108 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x108 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x108 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x108 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x108 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x10C "LUT67,LUT Register" hexmask.long.byte 0x10C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x10C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x10C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x10C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x10C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x10C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x110 "LUT68,LUT Register" hexmask.long.byte 0x110 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x110 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x110 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x110 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x110 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x110 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x114 "LUT69,LUT Register" hexmask.long.byte 0x114 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x114 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x114 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x114 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x114 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x114 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x118 "LUT70,LUT Register" hexmask.long.byte 0x118 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x118 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x118 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x118 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x118 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x118 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x11C "LUT71,LUT Register" hexmask.long.byte 0x11C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x11C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x11C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x11C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x11C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x11C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x120 "LUT72,LUT Register" hexmask.long.byte 0x120 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x120 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x120 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x120 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x120 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x120 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x124 "LUT73,LUT Register" hexmask.long.byte 0x124 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x124 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x124 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x124 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x124 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x124 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x128 "LUT74,LUT Register" hexmask.long.byte 0x128 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x128 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x128 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x128 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x128 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x128 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x12C "LUT75,LUT Register" hexmask.long.byte 0x12C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x12C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x12C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x12C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x12C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x12C 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x130 "LUT76,LUT Register" hexmask.long.byte 0x130 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x130 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x130 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x130 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x130 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x130 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x134 "LUT77,LUT Register" hexmask.long.byte 0x134 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x134 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x134 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x134 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x134 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x134 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x138 "LUT78,LUT Register" hexmask.long.byte 0x138 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x138 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x138 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x138 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x138 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x138 0.--7. 1. "OPRND0,Operand for INSTR0" line.long 0x13C "LUT79,LUT Register" hexmask.long.byte 0x13C 26.--31. 1. "INSTR1,Instruction 1" newline bitfld.long 0x13C 24.--25. "PAD1,Pad information for INSTR1" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x13C 16.--23. 1. "OPRND1,Operand for INSTR1" newline hexmask.long.byte 0x13C 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x13C 8.--9. "PAD0,Pad information for INSTR0" "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads" newline hexmask.long.byte 0x13C 0.--7. 1. "OPRND0,Operand for INSTR0" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x404CC800 ad:0x404CC820 ad:0x404CC840 ad:0x404CC860 ad:0x404CC880 ad:0x404CC8A0 ad:0x404CC8C0 ad:0x404CC8E0) tree "FRAD[$1]" base $2 group.long ($2)++0xF line.long 0x0 "FRAD_WORD0,Flash Region Start Address" hexmask.long.word 0x0 16.--31. 1. "STARTADR,Start Address" line.long 0x4 "FRAD_WORD1,Flash Region End Address" hexmask.long.word 0x4 16.--31. 1. "ENDADR,End Address" line.long 0x8 "FRAD_WORD2,Flash Region Privileges" hexmask.long.byte 0x8 24.--29. 1. "EALO,Exclusive Access Lock Owner" bitfld.long 0x8 3.--5. "MD1ACP,Master Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "MD0ACP,Master Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "FRAD_WORD3,Flash Region Lock Control" bitfld.long 0xC 31. "VLD,Valid" "0: FRAD-Assignment is invalid,1: FRAD-Assignment is valid" bitfld.long 0xC 29.--30. "LOCK,Descriptor Lock" "0: Lock disabled. Descriptor registers can be..,1: Lock disabled. Descriptor registers can be..,2: Lock enabled. Descriptors are read-only. MDnACP..,3: Lock enabled. Descriptor registers are read-only." newline bitfld.long 0xC 24.--25. "EAL,Exclusive Access Lock" "0: No lock. Write permissions available for all..,1: NA,2: Lock enabled. Write permissions revoked for all..,3: Lock enabled. Exclusive write permission for.." rgroup.long ($2+0x10)++0x7 line.long 0x0 "FRAD_WORD4,Flash Region Compare Address Status" hexmask.long 0x0 0.--31. 1. "CMP_ADDR,Capture Address" line.long 0x4 "FRAD_WORD5,Flash Region Compare Status Data" bitfld.long 0x4 30. "CMPVALID,Comparison Valid" "0: Access result/status not available,1: Access result/status is available" bitfld.long 0x4 29. "CMP_ERR,Comparison Error" "0: No error,1: Access error" newline bitfld.long 0x4 7. "CMP_PA,Capture Privilege Attribute" "0: Non-privilege transaction,1: Privilege transaction" bitfld.long 0x4 6. "CMP_SA,Capture Secure Attribute" "0: Non-secure transaction,1: Secure transaction" newline hexmask.long.byte 0x4 0.--5. 1. "CMP_MDID,Capture MDID Value" tree.end repeat.end repeat 2. (list 0x0 0x1)(list ad:0x404CC900 ad:0x404CC910) tree "MDAD[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "TGMDAD,Target Group n Master Domain Access Descriptor" bitfld.long 0x0 31. "VLD,Valid" "0: MDAD-Assignment is invalid,1: MDAD-Assignment is valid" bitfld.long 0x0 29. "LCK,Descriptor Lock" "0: Lock disabled. Registers can be written.,1: Lock disabled registers are read-only" newline bitfld.long 0x0 14.--15. "SA,Secure Attribute" "0: NA. This option should not be used. Allows the..,1: Allow the bus attribute for this master to..,2: Allow the bus attribute for this master to..,3: Allow the bus master's attribute: Both secure.." bitfld.long 0x0 12. "MASKTYPE,Mask Type" "0: ANDed mask,1: ORed mask" newline hexmask.long.byte 0x0 6.--11. 1. "MASK,Mask" hexmask.long.byte 0x0 0.--5. 1. "MIDMATCH,Master ID Reference" rgroup.long ($2+0x4)++0x3 line.long 0x0 "TGSFAR,Target Group n SFAR Address" hexmask.long 0x0 0.--31. 1. "SFARADDR,SFAR Address" group.long ($2+0x8)++0x7 line.long 0x0 "TGSFARS,Target Group n SFAR Status" rbitfld.long 0x0 31. "VLD,Valid" "0: SFAR-Assignment is invalid,1: SFAR-Assignment is valid" rbitfld.long 0x0 30. "ERR,Error" "0: SFAR with required attributes,1: SFAR without required attributes" newline eventfld.long 0x0 29. "CLR,Clear" "0,1" rbitfld.long 0x0 12. "PA,Privileged Attribute" "0: Non-privileged,1: Privileged" newline rbitfld.long 0x0 10. "SA,Secure Attribute" "0: Non-secure,1: Secure" hexmask.long.byte 0x0 0.--5. 1. "TG_MID,Transaction Master ID" line.long 0x4 "TGIPCRS,Target Group n IPCR Status" rbitfld.long 0x4 31. "VLD,Valid" "0: IPCR-assignment is invalid,1: IPCR-assignment is valid and queue is locked." rbitfld.long 0x4 29.--30. "ERR,Error" "0: IPCR programming with required attributes,1: IPCR-DATZ programming without required attributes,2: IPCR-SEQID programming without required attributes,3: IPCR-DATZ and SEQID both programming without.." newline eventfld.long 0x4 28. "CLR,Clear" "0,1" rbitfld.long 0x4 22. "ARB_UNLOCK,Arbitration Unlock" "0: No effect,1: Arbitration unlock is requested" newline rbitfld.long 0x4 21. "ARB_LOCK,Arbitration Lock" "0: No effect,1: Arbitration lock is requested" rbitfld.long 0x4 20. "PAR,Parallel Mode Enable Value" "0,1" newline hexmask.long.byte 0x4 16.--19. 1. "SEQID,SEQID Value" hexmask.long.word 0x4 0.--15. 1. "IDATSZ,IDATSZ Value" tree.end repeat.end base ad:0x404CC000 newline group.long 0x920++0xF line.long 0x0 "MGC,Master Global Configuration" bitfld.long 0x0 31. "GVLD,Global Valid access control" "0: Access controls are disabled. No descriptor..,1: Access controls are enabled." newline bitfld.long 0x0 29. "GVLDMDAD,Global Valid MDAD" "0: MDADs are disabled,1: MDADs are enabled" newline bitfld.long 0x0 27. "GVLDFRAD,Global Valid FRAD" "0: FRADs are disabled,1: FRADs are enabled" newline bitfld.long 0x0 10.--11. "GCLCK,Global Configuration Lock" "0: Global Lock disabled. Registers can be written..,1: NA,2: Lock enabled. Only the global configuration lock..,3: Lock enabled. All registers are read only until.." newline hexmask.long.byte 0x0 0.--5. 1. "GCLCKMID,Global configuration Lock Owner Status" line.long 0x4 "MRC,Master Read Command" bitfld.long 0x4 30. "VLDCMD03,Valid command" "0: READ_CMD3 value invalid,1: READ_CMD3 value valid" newline hexmask.long.byte 0x4 24.--29. 1. "READ_CMD3,Read Command 3" newline bitfld.long 0x4 22. "VLDCMD02,Valid command" "0: READ_CMD2 value invalid,1: READ_CMD2 value valid" newline hexmask.long.byte 0x4 16.--21. 1. "READ_CMD2,Read Command 2" newline hexmask.long.byte 0x4 8.--13. 1. "READ_CMD1,Read Command 1" newline hexmask.long.byte 0x4 0.--5. 1. "READ_CMD0,Read Command 0" line.long 0x8 "MTO,Master Timeout" hexmask.long 0x8 0.--31. 1. "WRITE_TO,Write Timeout" line.long 0xC "FLSEQREQ,FlashSeq Request" rbitfld.long 0xC 31. "VLD,Valid" "0: Status is invalid,1: Status is valid" newline eventfld.long 0xC 29. "CLR,Clear" "0,1" newline rbitfld.long 0xC 27. "TIMEOUT,Timeout Error Status" "0: Instruction completed without timeout error,1: Instruction aborted after timeout error" newline rbitfld.long 0xC 22. "CMD,Instruction Type" "0: Read Instruction Sequence,1: Non-Read Instruction Sequence" newline hexmask.long.byte 0xC 16.--19. 1. "SEQID,Sequence ID" newline rbitfld.long 0xC 12.--14. "FRAD,Flash Region Descriptor Number" "0,1,2,3,4,5,6,7" newline rbitfld.long 0xC 10. "ARB_LOCK,Arbitration Lock" "0: Arbitration was not locked,1: Arbitration was locked" newline rbitfld.long 0xC 9. "PA,Privilege Attribute" "0: Non-privilege Transaction,1: Privilege Transaction" newline rbitfld.long 0xC 8. "SA,Secure Attribute" "0: Non-secure Transaction,1: Secure Transaction" newline rbitfld.long 0xC 6. "REQ_TG,FlashSeq Request Target Group" "0: TG0,1: TG1" newline hexmask.long.byte 0xC 0.--5. 1. "REQ_MID,FlashSeq Request Master ID" rgroup.long 0x930++0x3 line.long 0x0 "FSMSTAT,FSM Status" bitfld.long 0x0 31. "VLD,Valid" "0: Status is invalid. No IPS transfer is queued.,1: Status is valid. IPS transfer is queued or.." newline bitfld.long 0x0 17. "ARB_LOCK,Arbitration Lock" "0: Arbitration not locked,1: Arbitration locked" newline bitfld.long 0x0 16. "CMD,Command" "0: Read instruction sequence,1: Non-read instruction sequence" newline hexmask.long.byte 0x0 8.--13. 1. "MID,Master ID" newline bitfld.long 0x0 0.--1. "STATE,FSM State Status" "0: Transaction is Queued but QuadSPI is busy with..,1: TBDR lock is open. IPS master can write in TBDR.,2: Write transfer is triggered. SEQID is written to..,3: Read transfer is triggered. SEQID is written to.." group.long 0x934++0xB line.long 0x0 "IPSERROR,IPS Error" eventfld.long 0x0 29. "CLR,Clear" "0,1" newline rbitfld.long 0x0 15. "FRADPROG,FRAD Descriptor Program Status" "0: Some or all of the FRAD descriptors are programmed,1: None of the FRAD descriptors are programmed" newline rbitfld.long 0x0 14. "MDADPROG,TG/MDAD Descriptor Program Status" "0: One or both of target group descriptors programmed,1: None of the target group descriptors are.." newline rbitfld.long 0x0 13. "TG1MID,TGn Master-ID Status" "0: TGn master-ID check passed,1: TGn master-ID check failed" newline rbitfld.long 0x0 12. "TG0MID,TGn Master-ID Status" "0: TGn master-ID check passed,1: TGn master-ID check failed" newline rbitfld.long 0x0 11. "TG1SEC,TGn Security Status" "0: Security attribute check passed for TGn,1: Security attribute check failed for TGn" newline rbitfld.long 0x0 10. "TG0SEC,TGn Security Status" "0: Security attribute check passed for TGn,1: Security attribute check failed for TGn" newline rbitfld.long 0x0 9. "TG1LCK,TGn Lock" "0: TGn queue SEQID is not written yet.,1: TGn queue SEQID is written and queue is locked" newline rbitfld.long 0x0 8. "TG0LCK,TGn Lock" "0: TGn queue SEQID is not written yet.,1: TGn queue SEQID is written and queue is locked" newline hexmask.long.byte 0x0 0.--5. 1. "MID,IPS DID Master ID" line.long 0x4 "ERRSTAT,Error Status" rbitfld.long 0x4 14. "TO_ERR,Timeout Error" "0: No timeout Error generated,1: Timeout error is generated" newline rbitfld.long 0x4 13. "TG1IPCR,TGn IPCR Error" "0: No Error generated,1: Error is generated" newline rbitfld.long 0x4 12. "TG0IPCR,TGn IPCR Error" "0: No Error generated,1: Error is generated" newline rbitfld.long 0x4 11. "TG1SFAR,TGn SFAR Error" "0: No Error generated,1: Error is generated" newline rbitfld.long 0x4 10. "TG0SFAR,TGn SFAR Error" "0: No Error generated,1: Error is generated" newline rbitfld.long 0x4 9. "IPS_ERR,IPS Error" "0: No Error generated,1: Error is generated" newline eventfld.long 0x4 8. "FRAD7ACC,FRADn Access Error" "0: No valid Error transaction,1: Transaction is with error and target queue is.." newline eventfld.long 0x4 7. "FRAD6ACC,FRADn Access Error" "0: No valid Error transaction,1: Transaction is with error and target queue is.." newline eventfld.long 0x4 6. "FRAD5ACC,FRADn Access Error" "0: No valid Error transaction,1: Transaction is with error and target queue is.." newline eventfld.long 0x4 5. "FRAD4ACC,FRADn Access Error" "0: No valid Error transaction,1: Transaction is with error and target queue is.." newline eventfld.long 0x4 4. "FRAD3ACC,FRADn Access Error" "0: No valid Error transaction,1: Transaction is with error and target queue is.." newline eventfld.long 0x4 3. "FRAD2ACC,FRADn Access Error" "0: No valid Error transaction,1: Transaction is with error and target queue is.." newline eventfld.long 0x4 2. "FRAD1ACC,FRADn Access Error" "0: No valid Error transaction,1: Transaction is with error and target queue is.." newline eventfld.long 0x4 1. "FRAD0ACC,FRADn Access Error" "0: No valid Error transaction,1: Transaction is with error and target queue is.." newline eventfld.long 0x4 0. "FRADMTCH,No FRAD Match Error" "0: No Error generated,1: Transaction does not lie within any FRAD address.." line.long 0x8 "INT_EN,Interrupt Enable" bitfld.long 0x8 14. "TO_ERR,Timeout Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 13. "TG1IPCR,TGn IPCR Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 12. "TG0IPCR,TGn IPCR Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 11. "TG1SFAR,TGn SFAR Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 10. "TG0SFAR,TGn SFAR Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 9. "IPS_ERR,IPS Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 8. "FRAD7ACC,FRADn Access Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 7. "FRAD6ACC,FRADn Access Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 6. "FRAD5ACC,FRADn Access Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 5. "FRAD4ACC,FRADn Access Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 4. "FRAD3ACC,FRADn Access Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 3. "FRAD2ACC,FRADn Access Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 2. "FRAD1ACC,FRADn Access Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 1. "FRAD0ACC,FRADn Access Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x8 0. "FRADMTCH,No FRAD Match Error Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" tree.end tree "QUADSPI_ARDB" base ad:0x68000000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "ARDB[$1],AHB RX Data Buffer Register" hexmask.long 0x0 0.--31. 1. "ARXD,ARDB provided RX buffer data" repeat.end tree.end tree.end tree "RTC (Real Time Clock)" base ad:0x40288000 group.long 0x0++0xB line.long 0x0 "RTCSUPV,RTC Supervisor control register" bitfld.long 0x0 31. "SUPV,RTC Supervisor Bit" "0: All registers are accessible in both user as..,1: All other registers are accessible in the.." line.long 0x4 "RTCC,RTC Control register" bitfld.long 0x4 31. "CNTEN,Counter Enable" "0: Counter disabled,1: Counter enabled" bitfld.long 0x4 30. "RTCIE,RTC Interrupt Enable" "0: RTC interrupts disabled,1: RTC interrupts enabled" newline bitfld.long 0x4 29. "FRZEN,Freeze Enable Bit" "0: Counter does not freeze in debug mode,1: Counter freezes in debug mode" bitfld.long 0x4 28. "ROVREN,Counter Roll Over wakeup/Interrupt Enable" "0: RTC rollover wakeup/interrupt disabled,1: RTC rollover wakeup/interrupt enabled" newline bitfld.long 0x4 15. "APIEN,Autonomous Periodic Interrupt Enable" "0: API disabled,1: API enabled" bitfld.long 0x4 14. "APIIE,API Interrupt Enable" "0: API interrupts disabled,1: API interrupts enabled" newline bitfld.long 0x4 12.--13. "CLKSEL,Clock select" "0: Clock source 0,1: Clock source 1,2: Clock source 2,3: Clock source 3" bitfld.long 0x4 11. "DIV512EN,Divide by 512 enable" "0: Divide by 512 is disabled,1: Divide by 512 is enabled" newline bitfld.long 0x4 10. "DIV32EN,Divide by 32 enable" "0: Divide by 32 is disabled,1: Divide by 32 is enabled" bitfld.long 0x4 0. "TRIG_EN,Trigger enable for Analog Comparator" "0,1" line.long 0x8 "RTCS,RTC Status register" eventfld.long 0x8 29. "RTCF,RTC Interrupt Flag" "0: RTC counter is not equal to RTCVAL,1: RTC counter matches RTCVAL" rbitfld.long 0x8 18. "INV_RTC,Invalid RTC write" "0,1" newline rbitfld.long 0x8 17. "INV_API,Invalid APIVAL write" "0,1" eventfld.long 0x8 13. "APIF,API Interrupt Flag" "0: Counter is not equal to API offset value,1: Counter matches the API offset value" newline eventfld.long 0x8 10. "ROVRF,Counter Roll Over Interrupt Flag" "0: RTC has not rolled over,1: RTC has rolled over" rgroup.long 0xC++0x3 line.long 0x0 "RTCCNT,RTC Counter register" hexmask.long 0x0 0.--31. 1. "RTCCNT,RTC Counter Value" group.long 0x10++0x7 line.long 0x0 "APIVAL,API Compare value register" hexmask.long 0x0 0.--31. 1. "APIVAL,API Compare Value" line.long 0x4 "RTCVAL,RTC Compare value register" hexmask.long 0x4 0.--31. 1. "RTCVAL,RTC Compare Value" tree.end tree "SDA_AP (Serial Data Access Port)" base edp:0x700 rgroup.long 0x0++0x3 line.long 0x0 "AUTHSTTS,Authentication Status" bitfld.long 0x0 30. "APPDBGEN,Application Debug Enabled or Disabled" "0: Application debug disabled,1: Application debug enabled" bitfld.long 0x0 3. "SWAPPDBG,Software Application Debug" "0: Software application debug disabled,1: Software application debug enabled" newline bitfld.long 0x0 2. "UIDSTATUS,User Identification Status" "0: UID is not ready and is invalid,1: UID is ready and is valid" bitfld.long 0x0 0. "CHALRDY,Challenge Ready" "0: Challenge is not ready,1: Challenge is ready" group.long 0x4++0x3 line.long 0x0 "AUTHCTL,Authentication Control" bitfld.long 0x0 1. "HSENEWDATACTL,New Data Control" "0: Does not indicate that the debugger has consumed..,1: Indicates that the debugger has consumed the.." bitfld.long 0x0 0. "HSEAUTHREQ,Debug Enablement Authentication Request" "0: Does not start the authentication request,1: Starts the authentication request" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x10)++0x3 line.long 0x0 "KEYCHAL[$1],Key Challenge" hexmask.long 0x0 0.--31. 1. "KEYCHAL,Debug Enablement Key Challenge" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x40)++0x3 line.long 0x0 "KEYRESP[$1],Key Response" hexmask.long 0x0 0.--31. 1. "KEYRESP,Debug Enablement Key Response" repeat.end rgroup.long 0x70++0x7 line.long 0x0 "UID0,User Identification 0" hexmask.long 0x0 0.--31. 1. "UID0,User ID 0" line.long 0x4 "UID1,User Identification 1" hexmask.long 0x4 0.--31. 1. "UID1,User ID 1" group.long 0x80++0x3 line.long 0x0 "DBGENCTRL,Debug Enable Control" bitfld.long 0x0 29. "CNIDEN,Core Non-Invasive Debug Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 28. "CDBGEN,Core Debug Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "GSPNIDEN,Global Secure Privileged Non-Invasive Debug Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 6. "GSPIDEN,Global Secure Privileged Debug Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "GNIDEN,Global Non-Invasive Debug Enable" "0: Disabled,1: Enabled" bitfld.long 0x0 4. "GDBGEN,Global Debug Enable" "0: Disabled,1: Enabled" group.long 0x90++0x3 line.long 0x0 "SDAAPRSTCTRL,Reset Control" bitfld.long 0x0 27. "RSTRELTLCM72,Reset Release Cortex-M7_2" "0: Core is in reset,1: Reset is released" bitfld.long 0x0 26. "RSTRELTLCM71,Reset Release Cortex-M7_1" "0: Core is in reset,1: Reset is released" newline bitfld.long 0x0 25. "RSTRELTLCM70,Reset Release Cortex-M7_0" "0: Core is in reset,1: Reset is released" rgroup.long 0xA0++0x3 line.long 0x0 "SDAAPGENSTATUS0,SDA_AP Generic Status" hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status" group.long 0xA4++0x3 line.long 0x0 "SDAAPGENCTRL0,Generic Control 0" bitfld.long 0x0 0. "JTAG_CR_EN,JTAG CR Enable" "0: Function performed on the basis of SWJ-DP mode,1: Function performed on the basis of JTAG mode" rgroup.long 0xB0++0x3 line.long 0x0 "SDAAPGENSTATUS1,SDA_AP Generic Status" hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status" rgroup.long 0xC0++0x3 line.long 0x0 "SDAAPGENSTATUS2,SDA_AP Generic Status" hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status" rgroup.long 0xD0++0x3 line.long 0x0 "SDAAPGENSTATUS3,SDA_AP Generic Status" hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status" rgroup.long 0xE0++0x3 line.long 0x0 "SDAAPGENSTATUS4,SDA_AP Generic Status" hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status" rgroup.long 0xFC++0x3 line.long 0x0 "ID,Identity" hexmask.long 0x0 0.--31. 1. "ID,Identity" tree.end tree "SDADC (Sigma Delta Analog to Digital Converter)" base ad:0x0 tree "SDADC_0" base ad:0x406F4000 group.long 0x0++0x1F line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "BIASGEN_EN,BIAS Generator Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 24.--28. 1. "PDR,Programmable Decimation Rate" newline bitfld.long 0x0 20.--21. "PGAN,Programmable Gain" "0: Gain = 1,1: Gain = 2,2: Gain = 4,3: Gain = 8" bitfld.long 0x0 19. "ODF,Output Data Format" "0: Output data is unsigned. Data in CDR represents..,1: Output data is signed and sign extended to 16 bits" newline bitfld.long 0x0 17. "EMSEL,External Modulator Selection" "0: External modulator data and clock inputs are..,1: External modulator data stream and clock inputs.." bitfld.long 0x0 15. "WDGEN,Watchdog Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13.--14. "TRIGEDSEL,Trigger Edge Selection" "0: Falling edge of trigger input is selected,1: Rising edge of trigger input is selected,2: Both edges of trigger input are selected,3: Both edges of trigger input are selected" bitfld.long 0x0 12. "TRIGEN,Trigger Enable" "0: Disable,1: Enable" newline hexmask.long.byte 0x0 8.--11. 1. "TRIGSEL,Trigger Input Selection" bitfld.long 0x0 7. "FRZ,Freeze" "0: Conversions are not stopped.,1: Conversions are stopped." newline bitfld.long 0x0 6. "VCOM2EN,Common Mode Voltage Enable" "0: Disable,1: Enable" bitfld.long 0x0 4.--5. "VCOMSEL,Common Voltage Bias Selection" "0: Negative input terminal is biased with vcom0_hv,1: Negative input terminal is biased with vcom1_hv,2: Negative input terminal is biased with vcom2_hv,3: Negative input terminal is biased with vcom0_hv" newline bitfld.long 0x0 3. "WRMODE,Wrap-Around Mode" "0: Disable,1: Enable" bitfld.long 0x0 1. "MODE,Mode Selection" "0: Differential input mode selected,1: Single-ended input mode selected" newline bitfld.long 0x0 0. "EN,Enable for SDADC Block" "0: SDADC internal modulator placed in low..,1: SDADC internal modulator enabled" line.long 0x4 "CSR,Channel Selection Register" hexmask.long.byte 0x4 16.--23. 1. "BIASEN,Bias Enable" bitfld.long 0x4 8.--10. "ANCHSEL_WRAP,Analog Channel Selection Wraparound Value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "ANCHSEL,Analog Channel Selection" "0,1,2,3,4,5,6,7" line.long 0x8 "RKR,Reset Key Register" hexmask.long.word 0x8 0.--15. 1. "RESET_KEY,Reset Key" line.long 0xC "SFR,Status Flag Register" rbitfld.long 0xC 16.--18. "ANCHSEL_CNT,Analog Channel Selection Counter" "0,1,2,3,4,5,6,7" rbitfld.long 0xC 8. "DFEF,Data FIFO Empty Flag" "0: Not empty,1: Empty" newline eventfld.long 0xC 4. "WTHH,Watchdog Upper Threshold Cross Over Event" "0: Did not occur,1: Occurred" eventfld.long 0xC 3. "WTHL,Watchdog Lower Threshold Cross Over Event" "0: Did not occur,1: Occurred" newline rbitfld.long 0xC 2. "CDVF,Converted Data Valid Flag" "0: Data is not valid,1: Data is valid" eventfld.long 0xC 1. "DFORF,Data FIFO Overrun Flag" "0: No overrun has occurred since the last time the..,1: Overrun has occurred or DFORF has not been.." newline eventfld.long 0xC 0. "DFFF,Data FIFO Full Flag" "0,1" line.long 0x10 "RSER,Request Select and Enable Register" bitfld.long 0x10 17. "WTHDIRS,WDG Threshold Cross Over Event DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" bitfld.long 0x10 16. "DFFDIRS,Data FIFO Full DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" newline bitfld.long 0x10 3. "WTHDIRE,WDG Threshold Cross Over Event DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled on WDG..,1: Interrupt/DMA request is enabled on WDG.." bitfld.long 0x10 1. "DFORIE,Data FIFO Overrun Interrupt Enable" "0: Interrupt request is disabled when data FIFO..,1: Interrupt request is enabled when data FIFO.." newline bitfld.long 0x10 0. "DFFDIRE,Data FIFO Full DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled when data FIFO..,1: Interrupt/DMA request is enabled when data FIFO.." line.long 0x14 "OSDR,Output Settling Delay Register" hexmask.long.byte 0x14 0.--7. 1. "OSD,Output Settling Delay" line.long 0x18 "FCR,FIFO Control Register" bitfld.long 0x18 16. "FRST,FIFO Flush Reset" "0: No effect.,1: Generate a single cycle reset event to flush FIFO." hexmask.long.byte 0x18 8.--11. 1. "FTHLD,FIFO Threshold" newline bitfld.long 0x18 3. "FOWEN,FIFO Over Write Enable" "0: Disable,1: Enable" rbitfld.long 0x18 1.--2. "FSIZE,FIFO Size" "0: FIFO depth = 1 dataword,1: FIFO depth = 4 datawords,2: FIFO depth = 8 datawords,3: FIFO depth = 16 datawords" newline bitfld.long 0x18 0. "FE,FIFO Enable" "0: Data FIFO is not enabled for multiple datawords;..,1: Data FIFO is enabled; FIFO depth is indicated by.." line.long 0x1C "STKR,Software Trigger Key Register" hexmask.long.word 0x1C 0.--15. 1. "ST_KEY,Software Trigger Key" rgroup.long 0x20++0x3 line.long 0x0 "CDR,Converted Data Register" hexmask.long.word 0x0 0.--15. 1. "CDATA,Converted Data" group.long 0x24++0x3 line.long 0x0 "WTHHLR,WDG Threshold Register" hexmask.long.word 0x0 16.--31. 1. "THRH,WDG Upper Threshold Value" hexmask.long.word 0x0 0.--15. 1. "THRL,WDG Lower Threshold Value" group.long 0x30++0x3 line.long 0x0 "TCR,Test Configuration Register" bitfld.long 0x0 3. "INMUX_EN,Input Mux Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "TESTMUX_EN,Test Mux Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "TEST_SDADC_EN,Test SDADC Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "TEST_EN,Test Enable" "0: Disable,1: Enable" tree.end tree "SDADC_1 (SDADC)" base ad:0x406F8000 group.long 0x0++0x1F line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "BIASGEN_EN,BIAS Generator Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 24.--28. 1. "PDR,Programmable Decimation Rate" newline bitfld.long 0x0 20.--21. "PGAN,Programmable Gain" "0: Gain = 1,1: Gain = 2,2: Gain = 4,3: Gain = 8" bitfld.long 0x0 19. "ODF,Output Data Format" "0: Output data is unsigned. Data in CDR represents..,1: Output data is signed and sign extended to 16 bits" newline bitfld.long 0x0 17. "EMSEL,External Modulator Selection" "0: External modulator data and clock inputs are..,1: External modulator data stream and clock inputs.." bitfld.long 0x0 15. "WDGEN,Watchdog Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13.--14. "TRIGEDSEL,Trigger Edge Selection" "0: Falling edge of trigger input is selected,1: Rising edge of trigger input is selected,2: Both edges of trigger input are selected,3: Both edges of trigger input are selected" bitfld.long 0x0 12. "TRIGEN,Trigger Enable" "0: Disable,1: Enable" newline hexmask.long.byte 0x0 8.--11. 1. "TRIGSEL,Trigger Input Selection" bitfld.long 0x0 7. "FRZ,Freeze" "0: Conversions are not stopped.,1: Conversions are stopped." newline bitfld.long 0x0 6. "VCOM2EN,Common Mode Voltage Enable" "0: Disable,1: Enable" bitfld.long 0x0 4.--5. "VCOMSEL,Common Voltage Bias Selection" "0: Negative input terminal is biased with vcom0_hv,1: Negative input terminal is biased with vcom1_hv,2: Negative input terminal is biased with vcom2_hv,3: Negative input terminal is biased with vcom0_hv" newline bitfld.long 0x0 3. "WRMODE,Wrap-Around Mode" "0: Disable,1: Enable" bitfld.long 0x0 1. "MODE,Mode Selection" "0: Differential input mode selected,1: Single-ended input mode selected" newline bitfld.long 0x0 0. "EN,Enable for SDADC Block" "0: SDADC internal modulator placed in low..,1: SDADC internal modulator enabled" line.long 0x4 "CSR,Channel Selection Register" hexmask.long.byte 0x4 16.--23. 1. "BIASEN,Bias Enable" bitfld.long 0x4 8.--10. "ANCHSEL_WRAP,Analog Channel Selection Wraparound Value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "ANCHSEL,Analog Channel Selection" "0,1,2,3,4,5,6,7" line.long 0x8 "RKR,Reset Key Register" hexmask.long.word 0x8 0.--15. 1. "RESET_KEY,Reset Key" line.long 0xC "SFR,Status Flag Register" rbitfld.long 0xC 16.--18. "ANCHSEL_CNT,Analog Channel Selection Counter" "0,1,2,3,4,5,6,7" rbitfld.long 0xC 8. "DFEF,Data FIFO Empty Flag" "0: Not empty,1: Empty" newline eventfld.long 0xC 4. "WTHH,Watchdog Upper Threshold Cross Over Event" "0: Did not occur,1: Occurred" eventfld.long 0xC 3. "WTHL,Watchdog Lower Threshold Cross Over Event" "0: Did not occur,1: Occurred" newline rbitfld.long 0xC 2. "CDVF,Converted Data Valid Flag" "0: Data is not valid,1: Data is valid" eventfld.long 0xC 1. "DFORF,Data FIFO Overrun Flag" "0: No overrun has occurred since the last time the..,1: Overrun has occurred or DFORF has not been.." newline eventfld.long 0xC 0. "DFFF,Data FIFO Full Flag" "0,1" line.long 0x10 "RSER,Request Select and Enable Register" bitfld.long 0x10 17. "WTHDIRS,WDG Threshold Cross Over Event DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" bitfld.long 0x10 16. "DFFDIRS,Data FIFO Full DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" newline bitfld.long 0x10 3. "WTHDIRE,WDG Threshold Cross Over Event DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled on WDG..,1: Interrupt/DMA request is enabled on WDG.." bitfld.long 0x10 1. "DFORIE,Data FIFO Overrun Interrupt Enable" "0: Interrupt request is disabled when data FIFO..,1: Interrupt request is enabled when data FIFO.." newline bitfld.long 0x10 0. "DFFDIRE,Data FIFO Full DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled when data FIFO..,1: Interrupt/DMA request is enabled when data FIFO.." line.long 0x14 "OSDR,Output Settling Delay Register" hexmask.long.byte 0x14 0.--7. 1. "OSD,Output Settling Delay" line.long 0x18 "FCR,FIFO Control Register" bitfld.long 0x18 16. "FRST,FIFO Flush Reset" "0: No effect.,1: Generate a single cycle reset event to flush FIFO." hexmask.long.byte 0x18 8.--11. 1. "FTHLD,FIFO Threshold" newline bitfld.long 0x18 3. "FOWEN,FIFO Over Write Enable" "0: Disable,1: Enable" rbitfld.long 0x18 1.--2. "FSIZE,FIFO Size" "0: FIFO depth = 1 dataword,1: FIFO depth = 4 datawords,2: FIFO depth = 8 datawords,3: FIFO depth = 16 datawords" newline bitfld.long 0x18 0. "FE,FIFO Enable" "0: Data FIFO is not enabled for multiple datawords;..,1: Data FIFO is enabled; FIFO depth is indicated by.." line.long 0x1C "STKR,Software Trigger Key Register" hexmask.long.word 0x1C 0.--15. 1. "ST_KEY,Software Trigger Key" rgroup.long 0x20++0x3 line.long 0x0 "CDR,Converted Data Register" hexmask.long.word 0x0 0.--15. 1. "CDATA,Converted Data" group.long 0x24++0x3 line.long 0x0 "WTHHLR,WDG Threshold Register" hexmask.long.word 0x0 16.--31. 1. "THRH,WDG Upper Threshold Value" hexmask.long.word 0x0 0.--15. 1. "THRL,WDG Lower Threshold Value" group.long 0x30++0x3 line.long 0x0 "TCR,Test Configuration Register" bitfld.long 0x0 3. "INMUX_EN,Input Mux Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "TESTMUX_EN,Test Mux Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "TEST_SDADC_EN,Test SDADC Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "TEST_EN,Test Enable" "0: Disable,1: Enable" tree.end tree "SDADC_2 (SDADC)" base ad:0x406FC000 group.long 0x0++0x1F line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "BIASGEN_EN,BIAS Generator Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 24.--28. 1. "PDR,Programmable Decimation Rate" newline bitfld.long 0x0 20.--21. "PGAN,Programmable Gain" "0: Gain = 1,1: Gain = 2,2: Gain = 4,3: Gain = 8" bitfld.long 0x0 19. "ODF,Output Data Format" "0: Output data is unsigned. Data in CDR represents..,1: Output data is signed and sign extended to 16 bits" newline bitfld.long 0x0 17. "EMSEL,External Modulator Selection" "0: External modulator data and clock inputs are..,1: External modulator data stream and clock inputs.." bitfld.long 0x0 15. "WDGEN,Watchdog Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13.--14. "TRIGEDSEL,Trigger Edge Selection" "0: Falling edge of trigger input is selected,1: Rising edge of trigger input is selected,2: Both edges of trigger input are selected,3: Both edges of trigger input are selected" bitfld.long 0x0 12. "TRIGEN,Trigger Enable" "0: Disable,1: Enable" newline hexmask.long.byte 0x0 8.--11. 1. "TRIGSEL,Trigger Input Selection" bitfld.long 0x0 7. "FRZ,Freeze" "0: Conversions are not stopped.,1: Conversions are stopped." newline bitfld.long 0x0 6. "VCOM2EN,Common Mode Voltage Enable" "0: Disable,1: Enable" bitfld.long 0x0 4.--5. "VCOMSEL,Common Voltage Bias Selection" "0: Negative input terminal is biased with vcom0_hv,1: Negative input terminal is biased with vcom1_hv,2: Negative input terminal is biased with vcom2_hv,3: Negative input terminal is biased with vcom0_hv" newline bitfld.long 0x0 3. "WRMODE,Wrap-Around Mode" "0: Disable,1: Enable" bitfld.long 0x0 1. "MODE,Mode Selection" "0: Differential input mode selected,1: Single-ended input mode selected" newline bitfld.long 0x0 0. "EN,Enable for SDADC Block" "0: SDADC internal modulator placed in low..,1: SDADC internal modulator enabled" line.long 0x4 "CSR,Channel Selection Register" hexmask.long.byte 0x4 16.--23. 1. "BIASEN,Bias Enable" bitfld.long 0x4 8.--10. "ANCHSEL_WRAP,Analog Channel Selection Wraparound Value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "ANCHSEL,Analog Channel Selection" "0,1,2,3,4,5,6,7" line.long 0x8 "RKR,Reset Key Register" hexmask.long.word 0x8 0.--15. 1. "RESET_KEY,Reset Key" line.long 0xC "SFR,Status Flag Register" rbitfld.long 0xC 16.--18. "ANCHSEL_CNT,Analog Channel Selection Counter" "0,1,2,3,4,5,6,7" rbitfld.long 0xC 8. "DFEF,Data FIFO Empty Flag" "0: Not empty,1: Empty" newline eventfld.long 0xC 4. "WTHH,Watchdog Upper Threshold Cross Over Event" "0: Did not occur,1: Occurred" eventfld.long 0xC 3. "WTHL,Watchdog Lower Threshold Cross Over Event" "0: Did not occur,1: Occurred" newline rbitfld.long 0xC 2. "CDVF,Converted Data Valid Flag" "0: Data is not valid,1: Data is valid" eventfld.long 0xC 1. "DFORF,Data FIFO Overrun Flag" "0: No overrun has occurred since the last time the..,1: Overrun has occurred or DFORF has not been.." newline eventfld.long 0xC 0. "DFFF,Data FIFO Full Flag" "0,1" line.long 0x10 "RSER,Request Select and Enable Register" bitfld.long 0x10 17. "WTHDIRS,WDG Threshold Cross Over Event DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" bitfld.long 0x10 16. "DFFDIRS,Data FIFO Full DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" newline bitfld.long 0x10 3. "WTHDIRE,WDG Threshold Cross Over Event DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled on WDG..,1: Interrupt/DMA request is enabled on WDG.." bitfld.long 0x10 1. "DFORIE,Data FIFO Overrun Interrupt Enable" "0: Interrupt request is disabled when data FIFO..,1: Interrupt request is enabled when data FIFO.." newline bitfld.long 0x10 0. "DFFDIRE,Data FIFO Full DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled when data FIFO..,1: Interrupt/DMA request is enabled when data FIFO.." line.long 0x14 "OSDR,Output Settling Delay Register" hexmask.long.byte 0x14 0.--7. 1. "OSD,Output Settling Delay" line.long 0x18 "FCR,FIFO Control Register" bitfld.long 0x18 16. "FRST,FIFO Flush Reset" "0: No effect.,1: Generate a single cycle reset event to flush FIFO." hexmask.long.byte 0x18 8.--11. 1. "FTHLD,FIFO Threshold" newline bitfld.long 0x18 3. "FOWEN,FIFO Over Write Enable" "0: Disable,1: Enable" rbitfld.long 0x18 1.--2. "FSIZE,FIFO Size" "0: FIFO depth = 1 dataword,1: FIFO depth = 4 datawords,2: FIFO depth = 8 datawords,3: FIFO depth = 16 datawords" newline bitfld.long 0x18 0. "FE,FIFO Enable" "0: Data FIFO is not enabled for multiple datawords;..,1: Data FIFO is enabled; FIFO depth is indicated by.." line.long 0x1C "STKR,Software Trigger Key Register" hexmask.long.word 0x1C 0.--15. 1. "ST_KEY,Software Trigger Key" rgroup.long 0x20++0x3 line.long 0x0 "CDR,Converted Data Register" hexmask.long.word 0x0 0.--15. 1. "CDATA,Converted Data" group.long 0x24++0x3 line.long 0x0 "WTHHLR,WDG Threshold Register" hexmask.long.word 0x0 16.--31. 1. "THRH,WDG Upper Threshold Value" hexmask.long.word 0x0 0.--15. 1. "THRL,WDG Lower Threshold Value" group.long 0x30++0x3 line.long 0x0 "TCR,Test Configuration Register" bitfld.long 0x0 3. "INMUX_EN,Input Mux Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "TESTMUX_EN,Test Mux Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "TEST_SDADC_EN,Test SDADC Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "TEST_EN,Test Enable" "0: Disable,1: Enable" tree.end tree "SDADC_3 (SDADC)" base ad:0x40700000 group.long 0x0++0x1F line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "BIASGEN_EN,BIAS Generator Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 24.--28. 1. "PDR,Programmable Decimation Rate" newline bitfld.long 0x0 20.--21. "PGAN,Programmable Gain" "0: Gain = 1,1: Gain = 2,2: Gain = 4,3: Gain = 8" bitfld.long 0x0 19. "ODF,Output Data Format" "0: Output data is unsigned. Data in CDR represents..,1: Output data is signed and sign extended to 16 bits" newline bitfld.long 0x0 17. "EMSEL,External Modulator Selection" "0: External modulator data and clock inputs are..,1: External modulator data stream and clock inputs.." bitfld.long 0x0 15. "WDGEN,Watchdog Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13.--14. "TRIGEDSEL,Trigger Edge Selection" "0: Falling edge of trigger input is selected,1: Rising edge of trigger input is selected,2: Both edges of trigger input are selected,3: Both edges of trigger input are selected" bitfld.long 0x0 12. "TRIGEN,Trigger Enable" "0: Disable,1: Enable" newline hexmask.long.byte 0x0 8.--11. 1. "TRIGSEL,Trigger Input Selection" bitfld.long 0x0 7. "FRZ,Freeze" "0: Conversions are not stopped.,1: Conversions are stopped." newline bitfld.long 0x0 6. "VCOM2EN,Common Mode Voltage Enable" "0: Disable,1: Enable" bitfld.long 0x0 4.--5. "VCOMSEL,Common Voltage Bias Selection" "0: Negative input terminal is biased with vcom0_hv,1: Negative input terminal is biased with vcom1_hv,2: Negative input terminal is biased with vcom2_hv,3: Negative input terminal is biased with vcom0_hv" newline bitfld.long 0x0 3. "WRMODE,Wrap-Around Mode" "0: Disable,1: Enable" bitfld.long 0x0 1. "MODE,Mode Selection" "0: Differential input mode selected,1: Single-ended input mode selected" newline bitfld.long 0x0 0. "EN,Enable for SDADC Block" "0: SDADC internal modulator placed in low..,1: SDADC internal modulator enabled" line.long 0x4 "CSR,Channel Selection Register" hexmask.long.byte 0x4 16.--23. 1. "BIASEN,Bias Enable" bitfld.long 0x4 8.--10. "ANCHSEL_WRAP,Analog Channel Selection Wraparound Value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "ANCHSEL,Analog Channel Selection" "0,1,2,3,4,5,6,7" line.long 0x8 "RKR,Reset Key Register" hexmask.long.word 0x8 0.--15. 1. "RESET_KEY,Reset Key" line.long 0xC "SFR,Status Flag Register" rbitfld.long 0xC 16.--18. "ANCHSEL_CNT,Analog Channel Selection Counter" "0,1,2,3,4,5,6,7" rbitfld.long 0xC 8. "DFEF,Data FIFO Empty Flag" "0: Not empty,1: Empty" newline eventfld.long 0xC 4. "WTHH,Watchdog Upper Threshold Cross Over Event" "0: Did not occur,1: Occurred" eventfld.long 0xC 3. "WTHL,Watchdog Lower Threshold Cross Over Event" "0: Did not occur,1: Occurred" newline rbitfld.long 0xC 2. "CDVF,Converted Data Valid Flag" "0: Data is not valid,1: Data is valid" eventfld.long 0xC 1. "DFORF,Data FIFO Overrun Flag" "0: No overrun has occurred since the last time the..,1: Overrun has occurred or DFORF has not been.." newline eventfld.long 0xC 0. "DFFF,Data FIFO Full Flag" "0,1" line.long 0x10 "RSER,Request Select and Enable Register" bitfld.long 0x10 17. "WTHDIRS,WDG Threshold Cross Over Event DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" bitfld.long 0x10 16. "DFFDIRS,Data FIFO Full DMA/Interrupt Request Select" "0: Interrupt request is selected,1: DMA request is selected" newline bitfld.long 0x10 3. "WTHDIRE,WDG Threshold Cross Over Event DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled on WDG..,1: Interrupt/DMA request is enabled on WDG.." bitfld.long 0x10 1. "DFORIE,Data FIFO Overrun Interrupt Enable" "0: Interrupt request is disabled when data FIFO..,1: Interrupt request is enabled when data FIFO.." newline bitfld.long 0x10 0. "DFFDIRE,Data FIFO Full DMA/Interrupt Request Enable" "0: Interrupt/DMA request is disabled when data FIFO..,1: Interrupt/DMA request is enabled when data FIFO.." line.long 0x14 "OSDR,Output Settling Delay Register" hexmask.long.byte 0x14 0.--7. 1. "OSD,Output Settling Delay" line.long 0x18 "FCR,FIFO Control Register" bitfld.long 0x18 16. "FRST,FIFO Flush Reset" "0: No effect.,1: Generate a single cycle reset event to flush FIFO." hexmask.long.byte 0x18 8.--11. 1. "FTHLD,FIFO Threshold" newline bitfld.long 0x18 3. "FOWEN,FIFO Over Write Enable" "0: Disable,1: Enable" rbitfld.long 0x18 1.--2. "FSIZE,FIFO Size" "0: FIFO depth = 1 dataword,1: FIFO depth = 4 datawords,2: FIFO depth = 8 datawords,3: FIFO depth = 16 datawords" newline bitfld.long 0x18 0. "FE,FIFO Enable" "0: Data FIFO is not enabled for multiple datawords;..,1: Data FIFO is enabled; FIFO depth is indicated by.." line.long 0x1C "STKR,Software Trigger Key Register" hexmask.long.word 0x1C 0.--15. 1. "ST_KEY,Software Trigger Key" rgroup.long 0x20++0x3 line.long 0x0 "CDR,Converted Data Register" hexmask.long.word 0x0 0.--15. 1. "CDATA,Converted Data" group.long 0x24++0x3 line.long 0x0 "WTHHLR,WDG Threshold Register" hexmask.long.word 0x0 16.--31. 1. "THRH,WDG Upper Threshold Value" hexmask.long.word 0x0 0.--15. 1. "THRL,WDG Lower Threshold Value" group.long 0x30++0x3 line.long 0x0 "TCR,Test Configuration Register" bitfld.long 0x0 3. "INMUX_EN,Input Mux Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "TESTMUX_EN,Test Mux Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "TEST_SDADC_EN,Test SDADC Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "TEST_EN,Test Enable" "0: Disable,1: Enable" tree.end tree.end tree "SELFTEST_GPR (Self-Test General-Purpose Registers)" base ad:0x403B0000 group.long 0x0++0x3 line.long 0x0 "CONFIG_REG,Configuration register" bitfld.long 0x0 8. "PCS_ENABLE_END,PCS Enable End" "0,1" bitfld.long 0x0 7. "PCS_ENABLE_START,PCS Enable Start" "0,1" bitfld.long 0x0 4.--6. "PCS_STEP_SIZE,PCS Step Size" "0,1,2,3,4,5,6,7" group.long 0x14++0x3 line.long 0x0 "LBIST_PROG_REG,LBIST Program" hexmask.long.byte 0x0 0.--7. 1. "LBIST_SHIFT_COUNT,LBIST Shift Count" tree.end tree "SEMA42 (Semaphores2)" base ad:0x40460000 group.byte 0x0++0xF line.byte 0x0 "GATE3,Gate" hexmask.byte 0x0 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x1 "GATE2,Gate" hexmask.byte 0x1 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x2 "GATE1,Gate" hexmask.byte 0x2 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x3 "GATE0,Gate" hexmask.byte 0x3 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x4 "GATE7,Gate" hexmask.byte 0x4 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x5 "GATE6,Gate" hexmask.byte 0x5 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x6 "GATE5,Gate" hexmask.byte 0x6 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x7 "GATE4,Gate" hexmask.byte 0x7 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x8 "GATE11,Gate" hexmask.byte 0x8 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0x9 "GATE10,Gate" hexmask.byte 0x9 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0xA "GATE9,Gate" hexmask.byte 0xA 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0xB "GATE8,Gate" hexmask.byte 0xB 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0xC "GATE15,Gate" hexmask.byte 0xC 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0xD "GATE14,Gate" hexmask.byte 0xD 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0xE "GATE13,Gate" hexmask.byte 0xE 0.--3. 1. "GTFSM,Gate Finite State Machine" line.byte 0xF "GATE12,Gate" hexmask.byte 0xF 0.--3. 1. "GTFSM,Gate Finite State Machine" rgroup.word 0x42++0x1 line.word 0x0 "RSTGT_R,Reset Gate Read" bitfld.word 0x0 12.--13. "RSTGSM,Reset Gate Finite State Machine" "0: Idle waiting for the first data pattern write.,1: Waiting for the second data pattern write,2: The 2-write sequence has completed. Generate the..,?" hexmask.word.byte 0x0 8.--11. 1. "RSTGMS,Reset Gate Domain" hexmask.word.byte 0x0 0.--7. 1. "RSTGTN,Reset Gate Number" wgroup.word 0x42++0x1 line.word 0x0 "RSTGT_W,Reset Gate Write" hexmask.word.byte 0x0 8.--15. 1. "RSTGDP,Reset Gate Data Pattern" hexmask.word.byte 0x0 0.--7. 1. "RSTGTN,Reset Gate Number" tree.end tree "SGEN (Sine Wave Generator)" base ad:0x0 tree "SGEN_0" base ad:0x406C8000 group.long 0x0++0x7 line.long 0x0 "CTRL,Control Register" bitfld.long 0x0 31. "LDOS,Load sine wave frequency" "0: Wait for I/O sine wave frequency,1: Load I/O sine wave frequency" hexmask.long.byte 0x0 26.--29. 1. "IOAMPL,IO sine wave amplitude" newline bitfld.long 0x0 24.--25. "WINDOW,Phase alignement acceptance window width" "0: +- 1% from the zero crossing,1: +- 10% from the zero crossing,2: +- 15% from the zero crossing,3: +- 25% from the zero crossing" bitfld.long 0x0 23. "SEMASK,Sine wave generator error mask interrupt register" "0: Mask the SGEN error interrupt source,1: Enable the SGEN error interrupt source" newline bitfld.long 0x0 18. "TRIG_MODE,Input phase align trigger mode selection bit" "0: Software trigger mode is selected.,1: Hardware trigger mode is selected." bitfld.long 0x0 16. "PDS,Enter/exit Power Down mode" "0: Force SGEN to exit Power Down mode.,1: Force SGEN to enter Power Down mode." newline hexmask.long.word 0x0 0.--15. 1. "IOFREQ,Output sine wave frequency" line.long 0x4 "STAT,Status Register" eventfld.long 0x4 23. "SERR,Error interrupt status" "0: No error interrupt pending,1: Error interrupt pending" bitfld.long 0x4 19. "FERR,Software generated demodulator error interrupt" "0: An error interrupt will not be forced.,1: An error interrupt will be forced." newline bitfld.long 0x4 18. "PHERR,Software generated phase error interrupt" "0,1" tree.end tree "SGEN_1" base ad:0x406CC000 group.long 0x0++0x7 line.long 0x0 "CTRL,Control Register" bitfld.long 0x0 31. "LDOS,Load sine wave frequency" "0: Wait for I/O sine wave frequency,1: Load I/O sine wave frequency" hexmask.long.byte 0x0 26.--29. 1. "IOAMPL,IO sine wave amplitude" newline bitfld.long 0x0 24.--25. "WINDOW,Phase alignement acceptance window width" "0: +- 1% from the zero crossing,1: +- 10% from the zero crossing,2: +- 15% from the zero crossing,3: +- 25% from the zero crossing" bitfld.long 0x0 23. "SEMASK,Sine wave generator error mask interrupt register" "0: Mask the SGEN error interrupt source,1: Enable the SGEN error interrupt source" newline bitfld.long 0x0 18. "TRIG_MODE,Input phase align trigger mode selection bit" "0: Software trigger mode is selected.,1: Hardware trigger mode is selected." bitfld.long 0x0 16. "PDS,Enter/exit Power Down mode" "0: Force SGEN to exit Power Down mode.,1: Force SGEN to enter Power Down mode." newline hexmask.long.word 0x0 0.--15. 1. "IOFREQ,Output sine wave frequency" line.long 0x4 "STAT,Status Register" eventfld.long 0x4 23. "SERR,Error interrupt status" "0: No error interrupt pending,1: Error interrupt pending" bitfld.long 0x4 19. "FERR,Software generated demodulator error interrupt" "0: An error interrupt will not be forced.,1: An error interrupt will be forced." newline bitfld.long 0x4 18. "PHERR,Software generated phase error interrupt" "0,1" tree.end tree.end tree "SIPI (Serial Interprocessor Interface)" base ad:0x404F0000 group.long 0x0++0x7 line.long 0x0 "CCR0,SIPI Channel Control Register 0" bitfld.long 0x0 16. "TC,Send Trigger Command." "0: Trigger command not sent,1: Trigger command sent" bitfld.long 0x0 6.--7. "WL,Word Length Transfer." "0: 8-bit,1: 16-bit,2: 32-bit,3: not used" newline bitfld.long 0x0 5. "CHEN,Channel Enable." "0: Channel is disabled,1: Channel is enabled" bitfld.long 0x0 3. "IDT,ID Read Request Transfer." "0: ID read request not sent,1: ID read request sent" newline bitfld.long 0x0 2. "RRT,Read Request Transfer." "0: Read request will not be sent,1: Read request transfer by the initiator. This bit.." bitfld.long 0x0 1. "WRT,Write Request Transfer." "0: No write request will be sent,1: Write request transfer by the initiator. This.." newline bitfld.long 0x0 0. "DEN,DMA Enable." "?,1: Channel will be used for DMA access" line.long 0x4 "CSR0,SIPI Channel Status Register 0" eventfld.long 0x4 9. "WRITE_RX,WRITE_RX" "0: Write frame not received,1: Write frame received" eventfld.long 0x4 8. "READ_RX,READ_RX" "0: Read frame not received,1: Read frame received" newline eventfld.long 0x4 7. "RAR,RAR" "0: Read answer not received,1: Read answer received" rbitfld.long 0x4 4.--6. "TID,Transaction ID of transmitted frame." "0,1,2,3,4,5,6,7" newline eventfld.long 0x4 3. "ACKR,ACKR" "0: Acknowledge not received,1: Acknowledge received" rbitfld.long 0x4 2. "CB,Channel Busy." "0: Channel 0 free,1: Channel 0 busy" group.long 0xC++0x7 line.long 0x0 "CIR0,SIPI Channel Interrupt Register 0" bitfld.long 0x0 5. "WAIE,Write Acknowledge Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 4. "RAIE,Read Answer Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x0 3. "TCIE,Trigger Command Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 2. "TOIE,Timeout Error Interrupt Enabled." "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x0 1. "TIDIE,Transaction ID Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 0. "ACKIE,Acknowledge Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled" line.long 0x4 "CTOR0,SIPI Channel Timeout Register 0" hexmask.long 0x4 0.--31. 1. "TOR,Timeout value for transmitted requests." rgroup.long 0x14++0x3 line.long 0x0 "CCRC0,SIPI Channel CRC Register 0" hexmask.long.word 0x0 16.--31. 1. "CRCI,CRCI" hexmask.long.word 0x0 0.--15. 1. "CRCT,CRCT" group.long 0x18++0xF line.long 0x0 "CAR0,SIPI Channel Address Register 0" hexmask.long 0x0 0.--31. 1. "CAR,CAR" line.long 0x4 "CDR0,SIPI Channel Data Register 0" hexmask.long 0x4 0.--31. 1. "CDR,CDR" line.long 0x8 "CCR1,SIPI Channel Control Register 1" bitfld.long 0x8 16. "TC,Send Trigger Command." "0: Trigger command not sent,1: Trigger command sent" bitfld.long 0x8 6.--7. "WL,Word Length Transfer." "0: 8-bit,1: 16-bit,2: 32-bit,3: not used" newline bitfld.long 0x8 5. "CHEN,Channel Enable." "0: Channel is disabled,1: Channel is enabled" bitfld.long 0x8 3. "IDT,ID Read Request Transfer." "0: ID read request not sent,1: ID read request sent" newline bitfld.long 0x8 2. "RRT,RRT" "0: Read request will not be sent,1: Read request transfer by the initiator. This bit.." bitfld.long 0x8 1. "WRT,Write Request Transfer." "0: No write request will be sent,1: Write request transfer by the initiator. This.." newline bitfld.long 0x8 0. "DEN,DMA Enable." "?,1: Channel will be used for DMA access" line.long 0xC "CSR1,SIPI Channel Status Register 1" eventfld.long 0xC 9. "WRITE_RX,WRITE_RX" "0: Write frame not received,1: Write frame received" eventfld.long 0xC 8. "READ_RX,READ_RX" "0: Read frame not received,1: Read frame received" newline eventfld.long 0xC 7. "RAR,RAR" "0: Read answer not received,1: Read answer received" rbitfld.long 0xC 4.--6. "TID,TID" "0,1,2,3,4,5,6,7" newline eventfld.long 0xC 3. "ACKR,ACKR" "0: Acknowledge not received,1: Acknowledge received" rbitfld.long 0xC 2. "CB,Channel Busy." "0: Channel 1 free,1: Channel 1 busy" group.long 0x2C++0x7 line.long 0x0 "CIR1,SIPI Channel Interrupt Register 1" bitfld.long 0x0 5. "WAIE,WAIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 4. "RAIE,RAIE" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x0 3. "TCIE,TCIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 2. "TOIE,TOIE" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x0 1. "TIDIE,TIDIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 0. "ACKIE,ACKIE" "0: Interrupt is disabled,1: Interrupt is enabled" line.long 0x4 "CTOR1,SIPI Channel Timeout Register 1" hexmask.long 0x4 0.--31. 1. "TOR,Timeout value for transmitted requests." rgroup.long 0x34++0x3 line.long 0x0 "CCRC1,SIPI Channel CRC Register 1" hexmask.long.word 0x0 16.--31. 1. "CRCI,CRCI" hexmask.long.word 0x0 0.--15. 1. "CRCT,CRCT" group.long 0x38++0xF line.long 0x0 "CAR1,SIPI Channel Address Register 1" hexmask.long 0x0 0.--31. 1. "CAR,CAR" line.long 0x4 "CDR1,SIPI Channel Data Register 1" hexmask.long 0x4 0.--31. 1. "CDR,CDR" line.long 0x8 "CCR2,SIPI Channel Control Register 2" bitfld.long 0x8 16. "TC,Send Trigger Command." "0: Trigger command not sent,1: Trigger command sent" bitfld.long 0x8 6.--7. "WL,Word Length Transfer." "0: 8-bit,1: 16-bit,2: 32-bit,3: not used" newline bitfld.long 0x8 5. "CHEN,Channel Enable." "0: Channel is disabled,1: Channel is enabled" bitfld.long 0x8 4. "ST,ST" "0: Streaming transfer is disabled,1: Streaming transfer is enabled" newline bitfld.long 0x8 3. "IDT,ID Read Request Transfer." "0: ID read request not sent,1: ID read request sent" bitfld.long 0x8 2. "RRT,Read Request Transfer." "0: Read request will not be sent,1: Read request transfer by the initiator. This bit.." newline bitfld.long 0x8 1. "WRT,Write Request Transfer." "0: No write request will be sent,1: Write request transfer by the initiator. This.." bitfld.long 0x8 0. "DEN,DMA Enable." "?,1: Channel will be used for DMA access" line.long 0xC "CSR2,SIPI Channel Status Register 2" eventfld.long 0xC 10. "WRITE_STR_RX,WRITE_STR_RX" "0: Stream Write frame not received,1: Stream Write frame received" eventfld.long 0xC 9. "WRITE_RX,WRITE_RX" "0: Write frame not received,1: Write frame received" newline eventfld.long 0xC 8. "READ_RX,READ_RX" "0: Read frame not received,1: Read frame received" eventfld.long 0xC 7. "RAR,RAR" "0: Read answer not received,1: Read answer received" newline rbitfld.long 0xC 4.--6. "TID,Transaction ID of transmitted frame." "0,1,2,3,4,5,6,7" eventfld.long 0xC 3. "ACKR,ACKR" "0: Acknowledge not received,1: Acknowledge received" newline rbitfld.long 0xC 2. "CB,Channel Busy." "0: Channel 2 free,1: Channel 2 busy" group.long 0x4C++0x7 line.long 0x0 "CIR2,SIPI Channel Interrupt Register 2" bitfld.long 0x0 5. "WAIE,WAIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 4. "RAIE,RAIE" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x0 3. "TCIE,TCIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 2. "TOIE,TOIE" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x0 1. "TIDIE,TIDIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 0. "ACKIE,ACKIE" "0: Interrupt is disabled,1: Interrupt is enabled" line.long 0x4 "CTOR2,SIPI Channel Timeout Register 2" hexmask.long 0x4 0.--31. 1. "TOR,Timeout value for transmitted requests." rgroup.long 0x54++0x3 line.long 0x0 "CCRC2,SIPI Channel CRC Register 2" hexmask.long.word 0x0 16.--31. 1. "CRCI,CRCI" hexmask.long.word 0x0 0.--15. 1. "CRCT,CRCT" group.long 0x58++0x3 line.long 0x0 "CAR2,SIPI Channel Address Register 2" hexmask.long 0x0 0.--31. 1. "CAR,CAR" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x5C)++0x3 line.long 0x0 "CDR2_[$1],SIPI Channel Data Register 2" hexmask.long 0x0 0.--31. 1. "CDR2,CDR2" repeat.end group.long 0x7C++0x7 line.long 0x0 "CCR3,SIPI Channel Control Register 3" bitfld.long 0x0 16. "TC,Send Trigger Command." "0: Trigger command not sent,1: Trigger command sent" bitfld.long 0x0 6.--7. "WL,Word Length Transfer." "0: 8-bit,1: 16-bit,2: 32-bit,3: not used" newline bitfld.long 0x0 5. "CHEN,Channel Enable." "0: Channel is disabled,1: Channel is enabled" bitfld.long 0x0 3. "IDT,ID Read Request Transfer." "0: ID read request not sent,1: ID read request sent" newline bitfld.long 0x0 2. "RRT,Read Request Transfer." "0: Read request will not be sent,1: Read request transfer by the initiator. This bit.." bitfld.long 0x0 1. "WRT,Write Request Transfer." "0: No write request will be sent,1: Write request transfer by the initiator. This.." newline bitfld.long 0x0 0. "DEN,DMA Enable." "?,1: Channel will be used for DMA access" line.long 0x4 "CSR3,SIPI Channel Status Register 3" eventfld.long 0x4 9. "WRITE_RX,WRITE_RX" "0: Write frame not received,1: Write frame received" eventfld.long 0x4 8. "READ_RX,READ_RX" "0: Read frame not received,1: Read frame received" newline eventfld.long 0x4 7. "RAR,RAR" "0: Read answer not received,1: Read answer received" rbitfld.long 0x4 4.--6. "TID,Transaction ID of transmitted frame." "0,1,2,3,4,5,6,7" newline eventfld.long 0x4 3. "ACKR,ACKR" "0: Acknowledge not received,1: Acknowledge received" rbitfld.long 0x4 2. "CB,Channel Busy." "0: Channel 3 free,1: Channel 3 busy" group.long 0x88++0x7 line.long 0x0 "CIR3,SIPI Channel Interrupt Register 3" bitfld.long 0x0 5. "WAIE,WAIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 4. "RAIE,RAIE" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x0 3. "TCIE,TCIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 2. "TOIE,TOIE" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x0 1. "TIDIE,TIDIE" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x0 0. "ACKIE,ACKIE" "0: Interrupt is disabled,1: Interrupt is enabled" line.long 0x4 "CTOR3,SIPI Channel Timeout Register 3" hexmask.long 0x4 0.--31. 1. "TOR,Timeout value for transmitted requests." rgroup.long 0x90++0x3 line.long 0x0 "CCRC3,SIPI Channel CRC Register 3" hexmask.long.word 0x0 16.--31. 1. "CRCI,CRCI" hexmask.long.word 0x0 0.--15. 1. "CRCT,CRCT" group.long 0x94++0x1F line.long 0x0 "CAR3,SIPI Channel Address Register 3" hexmask.long 0x0 0.--31. 1. "CAR,CAR" line.long 0x4 "CDR3,SIPI Channel Data Register 3" hexmask.long 0x4 0.--31. 1. "CDR,CDR" line.long 0x8 "MCR,SIPI Module Configuration Register" bitfld.long 0x8 31. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode,1: Enabled to enter Freeze mode" bitfld.long 0x8 29. "HALT,Halt Mode Enable" "0: No Freeze mode request,1: Enters Freeze mode if FRZ bit is asserted." newline hexmask.long.word 0x8 16.--26. 1. "PRSCLR,Timeout counter prescaler" bitfld.long 0x8 14.--15. "AID,Address Increment/Decrement" "0: no change. address stays same,1: address increments by 4,2: address decrements by 4,3: not used" newline bitfld.long 0x8 10. "CRCIE,CRC Error Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled" bitfld.long 0x8 9. "MCRIE,Max Count Reached Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled" newline bitfld.long 0x8 5. "LEGACY_MODE_BIT,Legacy_mode select bit." "0: The write command is triggered with CDR update..,1: The write command and read command both are.." bitfld.long 0x8 4. "CHNSB,Channel coding select bit." "0: Code Table II (see ),1: Code Table I (see )" newline bitfld.long 0x8 3. "TEN,Target Enable" "0,1" bitfld.long 0x8 2. "INIT,Initialization Mode" "0: Normal Mode,1: Initialization Mode" newline bitfld.long 0x8 1. "MOEN,Module Enable" "0,1" bitfld.long 0x8 0. "SR,Soft Reset" "0,1" line.long 0xC "SR,SIPI Status Register" rbitfld.long 0xC 31. "FRZACK,FRZACK" "0: SIPI not in Freeze mode,1: SIPI in Freeze mode" rbitfld.long 0xC 30. "LPMACK,Low Power Mode Acknowledge." "0: SIPI is not in low power mode,1: SIPI is in Disable Mode or Doze mode." newline eventfld.long 0xC 13. "INVALID_FRAME_RX,INVALID_FRAME_RX" "0: No invalid frame received,1: Invalid frame received" eventfld.long 0xC 12. "READ_OK_TX,READ_OK_TX" "0: No Read or ID ACK Transmitted,1: Read or ID ACK Transmitted" newline eventfld.long 0xC 11. "ACK_TX,ACK_TX" "0: No ACK Transmitted,1: ACK Transmitted" eventfld.long 0xC 10. "GCRCE,GCRCE" "0: No CRC error,1: CRC error occurred" newline eventfld.long 0xC 9. "MCR,Maximum Count Reached." "0,1" eventfld.long 0xC 8. "FRAME_TX,FRAME_TX ." "0: No frame transmitted,1: Any frame type transmitted" newline hexmask.long.byte 0xC 4.--7. 1. "TE,TE" hexmask.long.byte 0xC 0.--3. 1. "STATE,STATE" line.long 0x10 "MAXCR,SIPI Max Count Register" hexmask.long 0x10 2.--31. 1. "MXCNT,MXCNT" line.long 0x14 "ARR,SIPI Address Reload Register" hexmask.long 0x14 2.--31. 1. "ADRLD,ADRLD" line.long 0x18 "ACR,SIPI Address Count Register" hexmask.long 0x18 2.--31. 1. "ADCNT,Feflects the count value of address counter at target node." line.long 0x1C "ERR,SIPI Error Register" eventfld.long 0x1C 26. "TOE3,TOE3" "0: Timeout error didn't occur,1: Timeout error occurred" eventfld.long 0x1C 25. "TIDE3,TIDE3" "0: Received transaction ID matched with the stored ID,1: Received transaction ID didn't match with the.." newline eventfld.long 0x1C 24. "ACKE3,ACKE3" "0: Acknowledge received is correct.,1: Acknowledge received is not correct." eventfld.long 0x1C 18. "TOE2,TOE2" "0: Timeout error didn't occur,1: Timeout error occurred" newline eventfld.long 0x1C 17. "TIDE2,TIDE2" "0: Received transaction ID matched with the stored ID,1: Received transaction ID didn't match with the.." eventfld.long 0x1C 16. "ACKE2,ACKE2" "0: Acknowledge received is correct,1: Acknowledge received is not correct" newline eventfld.long 0x1C 10. "TOE1,TOE1" "0: Timeout error didn't occur,1: Timeout error occurred" eventfld.long 0x1C 9. "TIDE1,TIDE1" "0: Received transaction ID matched with the stored ID,1: Received transaction ID didn't match with the.." newline eventfld.long 0x1C 8. "ACKE1,ACKE1" "0: Acknowledge received is correct,1: Acknowledge received is not correct" eventfld.long 0x1C 2. "TOE0,TOE0" "0: Timeout error didn't occur,1: Timeout error occurred" newline eventfld.long 0x1C 1. "TIDE0,TIDE0" "0: Received transaction ID matched with the stored ID,1: Received transaction ID didn't match with the.." eventfld.long 0x1C 0. "ACKE0,ACKE0" "0: Acknowledge received is correct.,1: Acknowledge received is not correct." rgroup.long 0xB4++0x7 line.long 0x0 "DEBUG,SIPI Debug Register" hexmask.long.byte 0x0 16.--19. 1. "OUTSTANDING,OUTSTANDING FRAMES" hexmask.long.word 0x0 0.--15. 1. "STATE,STATE" line.long 0x4 "PMR,SIPI Performance Monitor register" hexmask.long.byte 0x4 24.--31. 1. "BIN3,BIN3" hexmask.long.byte 0x4 16.--23. 1. "BIN2,BIN2" newline hexmask.long.byte 0x4 8.--15. 1. "BIN1,BIN1" hexmask.long.byte 0x4 0.--7. 1. "BIN0,BIN0" tree.end tree "SIRC (Slow Internal RC Oscillator)" base ad:0x402C8000 rgroup.long 0x4++0x3 line.long 0x0 "SR,Status Register" bitfld.long 0x0 0. "STATUS,Status bit for SIRC" "0: SIRC is off or unstable,1: SIRC is on and stable" group.long 0xC++0x3 line.long 0x0 "MISCELLANEOUS_IN,Miscellaneous input" bitfld.long 0x0 8. "STANDBY_ENABLE,Standby Enable for SIRC" "0: SIRC disables in Standby mode,1: SIRC enables in Standby mode" tree.end tree "SIUL2 (System Integration Unit Lite2)" base ad:0x40290000 rgroup.long 0x4++0x7 line.long 0x0 "MIDR1,SIUL2 MCU ID 1" hexmask.long.byte 0x0 26.--31. 1. "PRODUCT_LINE_LETTER,Product Line Letter" newline hexmask.long.word 0x0 16.--25. 1. "PART_NO,MCU Part Number" newline hexmask.long.byte 0x0 4.--7. 1. "MAJOR_MASK,Major Mask Revision" newline hexmask.long.byte 0x0 0.--3. 1. "MINOR_MASK,Minor Mask Revision" line.long 0x4 "MIDR2,SIUL2 MCU ID 2" bitfld.long 0x4 29.--31. "TECHNOLOGY,Technology" "?,1: C40EFS3,?,?,?,?,?,?" newline bitfld.long 0x4 26.--28. "TEMPERATURE,Temperature" "0: C = 85C,?,2: V = 105C,?,4: M = 125C,?,?,?" newline hexmask.long.byte 0x4 20.--25. 1. "PACKAGE,Package" newline hexmask.long.byte 0x4 16.--19. 1. "FREQUENCY,Frequency" newline bitfld.long 0x4 14.--15. "FLASH_CODE,Flash Code" "?,?,2: Monolithic,?" newline bitfld.long 0x4 12.--13. "FLASH_DATA,Flash Data" "?,?,2: Monolithic,?" newline hexmask.long.byte 0x4 8.--11. 1. "FLASH_SIZE_DATA,Flash Size Data" newline hexmask.long.byte 0x4 0.--7. 1. "FLASH_SIZE_CODE,Flash Size Code" group.long 0x10++0x3 line.long 0x0 "DISR0,SIUL2 DMA/Interrupt Status Flag 0" eventfld.long 0x0 31. "EIF31,External Interrupt Status Flag 31" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER31 and.." newline eventfld.long 0x0 30. "EIF30,External Interrupt Status Flag 30" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER30 and.." newline eventfld.long 0x0 29. "EIF29,External Interrupt Status Flag 29" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER29 and.." newline eventfld.long 0x0 28. "EIF28,External Interrupt Status Flag 28" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER28 and.." newline eventfld.long 0x0 27. "EIF27,External Interrupt Status Flag 27" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER27 and.." newline eventfld.long 0x0 26. "EIF26,External Interrupt Status Flag 26" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER26 and.." newline eventfld.long 0x0 25. "EIF25,External Interrupt Status Flag 25" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER25 and.." newline eventfld.long 0x0 24. "EIF24,External Interrupt Status Flag 24" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER24 and.." newline eventfld.long 0x0 23. "EIF23,External Interrupt Status Flag 23" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER23 and.." newline eventfld.long 0x0 22. "EIF22,External Interrupt Status Flag 22" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER22 and.." newline eventfld.long 0x0 21. "EIF21,External Interrupt Status Flag 21" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER21 and.." newline eventfld.long 0x0 20. "EIF20,External Interrupt Status Flag 20" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER20 and.." newline eventfld.long 0x0 19. "EIF19,External Interrupt Status Flag 19" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER19 and.." newline eventfld.long 0x0 18. "EIF18,External Interrupt Status Flag 18" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER18 and.." newline eventfld.long 0x0 17. "EIF17,External Interrupt Status Flag 17" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER17 and.." newline eventfld.long 0x0 16. "EIF16,External Interrupt Status Flag 16" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER16 and.." newline eventfld.long 0x0 15. "EIF15,External Interrupt Status Flag 15" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER15 and.." newline eventfld.long 0x0 14. "EIF14,External Interrupt Status Flag 14" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER14 and.." newline eventfld.long 0x0 13. "EIF13,External Interrupt Status Flag 13" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER13 and.." newline eventfld.long 0x0 12. "EIF12,External Interrupt Status Flag 12" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER12 and.." newline eventfld.long 0x0 11. "EIF11,External Interrupt Status Flag 11" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER11 and.." newline eventfld.long 0x0 10. "EIF10,External Interrupt Status Flag 10" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER10 and.." newline eventfld.long 0x0 9. "EIF9,External Interrupt Status Flag 9" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER9 and.." newline eventfld.long 0x0 8. "EIF8,External Interrupt Status Flag 8" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER8 and.." newline eventfld.long 0x0 7. "EIF7,External Interrupt Status Flag 7" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER7 and.." newline eventfld.long 0x0 6. "EIF6,External Interrupt Status Flag 6" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER6 and.." newline eventfld.long 0x0 5. "EIF5,External Interrupt Status Flag 5" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER5 and.." newline eventfld.long 0x0 4. "EIF4,External Interrupt Status Flag 4" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER4 and.." newline eventfld.long 0x0 3. "EIF3,External Interrupt Status Flag 3" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER3 and.." newline eventfld.long 0x0 2. "EIF2,External Interrupt Status Flag 2" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER2 and.." newline eventfld.long 0x0 1. "EIF1,External Interrupt Status Flag 1" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER1 and.." newline eventfld.long 0x0 0. "EIF0,External Interrupt Status Flag 0" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER0 and.." group.long 0x18++0x3 line.long 0x0 "DIRER0,SIUL2 DMA/Interrupt Request Enable 0" bitfld.long 0x0 31. "EIRE31,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 30. "EIRE30,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 29. "EIRE29,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 28. "EIRE28,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 27. "EIRE27,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 26. "EIRE26,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 25. "EIRE25,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "EIRE24,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 23. "EIRE23,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 22. "EIRE22,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "EIRE21,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "EIRE20,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "EIRE19,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "EIRE18,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "EIRE17,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "EIRE16,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 15. "EIRE15,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "EIRE14,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "EIRE13,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "EIRE12,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "EIRE11,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "EIRE10,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "EIRE9,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "EIRE8,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "EIRE7,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "EIRE6,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "EIRE5,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "EIRE4,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "EIRE3,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "EIRE2,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "EIRE1,External Interrupt Request Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "EIRE0,External Interrupt Request Enable" "0: Disabled,1: Enabled" group.long 0x20++0x3 line.long 0x0 "DIRSR0,SIUL2 DMA/Interrupt Request Select 0" bitfld.long 0x0 31. "DIRSR31,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 30. "DIRSR30,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 29. "DIRSR29,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 28. "DIRSR28,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 27. "DIRSR27,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 26. "DIRSR26,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 25. "DIRSR25,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 24. "DIRSR24,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 23. "DIRSR23,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 22. "DIRSR22,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 21. "DIRSR21,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 20. "DIRSR20,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 19. "DIRSR19,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 18. "DIRSR18,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 17. "DIRSR17,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 16. "DIRSR16,DMA/Interrupt Request Select Register" "0: Interrupt request,?" newline bitfld.long 0x0 15. "DIRSR15,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 14. "DIRSR14,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 13. "DIRSR13,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 12. "DIRSR12,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 11. "DIRSR11,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 10. "DIRSR10,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 9. "DIRSR9,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 8. "DIRSR8,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 7. "DIRSR7,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 6. "DIRSR6,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 5. "DIRSR5,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 4. "DIRSR4,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 3. "DIRSR3,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 2. "DIRSR2,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 1. "DIRSR1,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" newline bitfld.long 0x0 0. "DIRSR0,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request" group.long 0x28++0x3 line.long 0x0 "IREER0,SIUL2 Interrupt Rising-Edge Event Enable 0" bitfld.long 0x0 31. "IREE31,Enables rising-edge events to set DISR0[EIF31]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 30. "IREE30,Enables rising-edge events to set DISR0[EIF30]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 29. "IREE29,Enables rising-edge events to set DISR0[EIF29]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 28. "IREE28,Enables rising-edge events to set DISR0[EIF28]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 27. "IREE27,Enables rising-edge events to set DISR0[EIF27]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 26. "IREE26,Enables rising-edge events to set DISR0[EIF26]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 25. "IREE25,Enables rising-edge events to set DISR0[EIF25]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "IREE24,Enables rising-edge events to set DISR0[EIF24]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 23. "IREE23,Enables rising-edge events to set DISR0[EIF23]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 22. "IREE22,Enables rising-edge events to set DISR0[EIF22]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "IREE21,Enables rising-edge events to set DISR0[EIF21]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "IREE20,Enables rising-edge events to set DISR0[EIF20]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "IREE19,Enables rising-edge events to set DISR0[EIF19]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "IREE18,Enables rising-edge events to set DISR0[EIF18]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "IREE17,Enables rising-edge events to set DISR0[EIF17]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "IREE16,Enables rising-edge events to set DISR0[EIF16]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 15. "IREE15,Enables rising-edge events to set DISR0[EIF15]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "IREE14,Enables rising-edge events to set DISR0[EIF14]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "IREE13,Enables rising-edge events to set DISR0[EIF13]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "IREE12,Enables rising-edge events to set DISR0[EIF12]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "IREE11,Enables rising-edge events to set DISR0[EIF11]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "IREE10,Enables rising-edge events to set DISR0[EIF10]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "IREE9,Enables rising-edge events to set DISR0[EIF9]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "IREE8,Enables rising-edge events to set DISR0[EIF8]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "IREE7,Enables rising-edge events to set DISR0[EIF7]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IREE6,Enables rising-edge events to set DISR0[EIF6]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "IREE5,Enables rising-edge events to set DISR0[EIF5]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "IREE4,Enables rising-edge events to set DISR0[EIF4]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "IREE3,Enables rising-edge events to set DISR0[EIF3]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "IREE2,Enables rising-edge events to set DISR0[EIF2]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "IREE1,Enables rising-edge events to set DISR0[EIF1]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "IREE0,Enables rising-edge events to set DISR0[EIF0]." "0: Disabled,1: Enabled" group.long 0x30++0x3 line.long 0x0 "IFEER0,SIUL2 Interrupt Falling-Edge Event Enable 0" bitfld.long 0x0 31. "IFEE31,Enables falling-edge events to set DISR0[EIF31]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 30. "IFEE30,Enables falling-edge events to set DISR0[EIF30]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 29. "IFEE29,Enables falling-edge events to set DISR0[EIF29]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 28. "IFEE28,Enables falling-edge events to set DISR0[EIF28]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 27. "IFEE27,Enables falling-edge events to set DISR0[EIF27]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 26. "IFEE26,Enables falling-edge events to set DISR0[EIF26]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 25. "IFEE25,Enables falling-edge events to set DISR0[EIF25]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "IFEE24,Enables falling-edge events to set DISR0[EIF24]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 23. "IFEE23,Enables falling-edge events to set DISR0[EIF23]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 22. "IFEE22,Enables falling-edge events to set DISR0[EIF22]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "IFEE21,Enables falling-edge events to set DISR0[EIF21]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "IFEE20,Enables falling-edge events to set DISR0[EIF20]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "IFEE19,Enables falling-edge events to set DISR0[EIF19]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "IFEE18,Enables falling-edge events to set DISR0[EIF18]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "IFEE17,Enables falling-edge events to set DISR0[EIF17]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "IFEE16,Enables falling-edge events to set DISR0[EIF16]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 15. "IFEE15,Enables falling-edge events to set DISR0[EIF15]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "IFEE14,Enables falling-edge events to set DISR0[EIF14]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "IFEE13,Enables falling-edge events to set DISR0[EIF13]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "IFEE12,Enables falling-edge events to set DISR0[EIF12]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "IFEE11,Enables falling-edge events to set DISR0[EIF11]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "IFEE10,Enables falling-edge events to set DISR0[EIF10]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "IFEE9,Enables falling-edge events to set DISR0[EIF9]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "IFEE8,Enables falling-edge events to set DISR0[EIF8]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "IFEE7,Enables falling-edge events to set DISR0[EIF7]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFEE6,Enables falling-edge events to set DISR0[EIF6]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "IFEE5,Enables falling-edge events to set DISR0[EIF5]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "IFEE4,Enables falling-edge events to set DISR0[EIF4]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "IFEE3,Enables falling-edge events to set DISR0[EIF3]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "IFEE2,Enables falling-edge events to set DISR0[EIF2]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "IFEE1,Enables falling-edge events to set DISR0[EIF1]." "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "IFEE0,Enables falling-edge events to set DISR0[EIF0]." "0: Disabled,1: Enabled" group.long 0x38++0x3 line.long 0x0 "IFER0,SIUL2 Interrupt Filter Enable 0" bitfld.long 0x0 31. "IFE31,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 30. "IFE30,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 29. "IFE29,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 28. "IFE28,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 27. "IFE27,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 26. "IFE26,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 25. "IFE25,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 24. "IFE24,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 23. "IFE23,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 22. "IFE22,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 21. "IFE21,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "IFE20,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 19. "IFE19,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "IFE18,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "IFE17,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "IFE16,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 15. "IFE15,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "IFE14,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 13. "IFE13,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 12. "IFE12,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "IFE11,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 10. "IFE10,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 9. "IFE9,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "IFE8,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 7. "IFE7,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE6,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "IFE5,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "IFE4,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "IFE3,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "IFE2,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "IFE1,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "IFE0,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled" group.long 0x40++0x83 line.long 0x0 "IFMCR0,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x0 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x4 "IFMCR1,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x4 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x8 "IFMCR2,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x8 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0xC "IFMCR3,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0xC 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x10 "IFMCR4,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x10 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x14 "IFMCR5,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x14 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x18 "IFMCR6,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x18 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x1C "IFMCR7,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x1C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x20 "IFMCR8,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x20 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x24 "IFMCR9,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x24 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x28 "IFMCR10,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x28 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x2C "IFMCR11,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x2C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x30 "IFMCR12,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x30 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x34 "IFMCR13,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x34 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x38 "IFMCR14,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x38 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x3C "IFMCR15,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x3C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x40 "IFMCR16,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x40 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x44 "IFMCR17,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x44 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x48 "IFMCR18,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x48 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x4C "IFMCR19,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x4C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x50 "IFMCR20,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x50 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x54 "IFMCR21,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x54 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x58 "IFMCR22,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x58 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x5C "IFMCR23,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x5C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x60 "IFMCR24,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x60 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x64 "IFMCR25,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x64 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x68 "IFMCR26,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x68 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x6C "IFMCR27,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x6C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x70 "IFMCR28,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x70 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x74 "IFMCR29,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x74 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x78 "IFMCR30,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x78 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x7C "IFMCR31,SIUL2 Interrupt Filter Maximum Counter" hexmask.long.byte 0x7C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting" line.long 0x80 "IFCPR,SIUL2 Interrupt Filter Clock Prescaler" hexmask.long.byte 0x80 0.--3. 1. "IFCP,Interrupt Filter Clock Prescaler setting" group.long 0x100++0x1F line.long 0x0 "MUX0_TIMER_EN1,SIUL2 User Defined" bitfld.long 0x0 31. "EMIOSFLG15_EN,EMIOS0 Output Flag 15 Monitor Enable" "0,1" newline bitfld.long 0x0 30. "EMIOSFLG14_EN,EMIOS0 Output Flag 14 Monitor Enable" "0,1" newline bitfld.long 0x0 29. "EMIOSFLG13_EN,EMIOS0 Output Flag 13 Monitor Enable" "0,1" newline bitfld.long 0x0 28. "EMIOSFLG12_EN,EMIOS0 Output Flag 12 Monitor Enable" "0,1" newline bitfld.long 0x0 27. "EMIOSFLG11_EN,EMIOS0 Output Flag 11 Monitor Enable" "0,1" newline bitfld.long 0x0 26. "EMIOSFLG10_EN,EMIOS0 Output Flag 10 Monitor Enable" "0,1" newline bitfld.long 0x0 25. "EMIOSFLG9_EN,EMIOS0 Output Flag 9 Monitor Enable" "0,1" newline bitfld.long 0x0 24. "EMIOSFLG8_EN,EMIOS0 Output Flag 8 Monitor Enable" "0,1" newline bitfld.long 0x0 23. "EMIOSFLG7_EN,EMIOS0 Output Flag 7 Monitor Enable" "0,1" newline bitfld.long 0x0 22. "EMIOSFLG6_EN,EMIOS0 Output Flag 6 Monitor Enable" "0,1" newline bitfld.long 0x0 21. "EMIOSFLG5_EN,EMIOS0 Output Flag 5 Monitor Enable" "0,1" newline bitfld.long 0x0 20. "EMIOSFLG4_EN,EMIOS0 Output Flag 4 Monitor Enable" "0,1" newline bitfld.long 0x0 19. "EMIOSFLG3_EN,EMIOS0 Output Flag 3 Monitor Enable" "0,1" newline bitfld.long 0x0 18. "EMIOSFLG2_EN,EMIOS0 Output Flag 2 Monitor Enable" "0,1" newline bitfld.long 0x0 17. "EMIOSFLG1_EN,EMIOS0 Output Flag 1 Monitor Enable" "0,1" newline bitfld.long 0x0 16. "EMIOSFLG0_EN,EMIOS0 Output Flag 0 Monitor Enable" "0,1" newline bitfld.long 0x0 7. "EMIOSFLG23_EN,EMIOS0 Output Flag 23 Monitor Enable" "0,1" newline bitfld.long 0x0 6. "EMIOSFLG22_EN,EMIOS0 Output Flag 22 Monitor Enable" "0,1" newline bitfld.long 0x0 5. "EMIOSFLG21_EN,EMIOS0 Output Flag 21 Monitor Enable" "0,1" newline bitfld.long 0x0 4. "EMIOSFLG20_EN,EMIOS0 Output Flag 20 Monitor Enable" "0,1" newline bitfld.long 0x0 3. "EMIOSFLG19_EN,EMIOS0 Output Flag 19 Monitor Enable" "0,1" newline bitfld.long 0x0 2. "EMIOSFLG18_EN,EMIOS0 Output Flag 18 Monitor Enable" "0,1" newline bitfld.long 0x0 1. "EMIOSFLG17_EN,EMIOS0 Output Flag 17 Monitor Enable" "0,1" newline bitfld.long 0x0 0. "EMIOSFLG16_EN,EMIOS0 Output Flag 16 Monitor Enable" "0,1" line.long 0x4 "MUX0_BCTU1_EN,SIUL2 User Defined" bitfld.long 0x4 28. "BCTU0ADC2INT_EN,BCTU ADC2DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 27. "BCTU0ADC1INT_EN,BCTU ADC1DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 26. "BCTU0ADC0INT_EN,BCTU ADC0DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 25. "BCTU0LISTINT_EN,BCTU Conversion List Interrupt Request Enable" "0,1" newline bitfld.long 0x4 24. "BCTU0FIFO2INT_EN,BCTU FIFO2 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 23. "BCTU0FIFO1INT_EN,BCTU FIFO1 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 22. "BCTU0FIFO0INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 21. "BCTU0ADC2DMA_EN,BCTU ADC2DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 20. "BCTU0ADC1DMA_EN,BCTU ADC1DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 19. "BCTU0ADC0DMA_EN,BCTU ADC0DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 18. "BCTU0FIFO2DMA_EN,BCTU FIFO2 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 17. "BCTU0FIFO1DMA_EN,BCTU FIFO1 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 16. "BCTU0FIFO0DMA_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 14. "BCTU1ADC3INT_EN,BCTU ADC3DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 13. "BCTU1ADC2INT_EN,BCTU ADC2DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 12. "BCTU1ADC1INT_EN,BCTU ADC1DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 11. "BCTU1ADC0INT_EN,BCTU ADC0DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 10. "BCTU1LISTINT_EN,BCTU Conversion List Interrupt Request Enable" "0,1" newline bitfld.long 0x4 9. "BCTU1FIFO2INT_EN,BCTU FIFO2 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 8. "BCTU1FIFO1INT_EN,BCTU FIFO1 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 7. "BCTU1FIFO0INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x4 6. "BCTU1ADC3DMA_EN,BCTU ADC3DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 5. "BCTU1ADC2DMA_EN,BCTU ADC2DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 4. "BCTU1ADC1DMA_EN,BCTU ADC1DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 3. "BCTU1ADC0DMA_EN,BCTU ADC0DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 2. "BCTU1FIFO2DMA_EN,BCTU FIFO2 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 1. "BCTU1FIFO1DMA_EN,BCTU FIFO1 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x4 0. "BCTU1FIFO0DMA_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1" line.long 0x8 "MUX1_TIMER_EN0,SIUL2 User Defined" bitfld.long 0x8 31. "lpi2c_1_trg_slave,LPI2C 1 Slave trigger output" "0,1" newline bitfld.long 0x8 30. "lpi2c_1_trg_master,LPI2C 1 Master trigger output" "0,1" newline bitfld.long 0x8 29. "lpi2c_trg_slave,LPI2C 0 Slave trigger output" "0,1" newline bitfld.long 0x8 28. "lpi2c_trg_master,LPI2C 0 Master trigger output" "0,1" newline bitfld.long 0x8 27. "LPUART3TRG_EN,LPUART3 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x8 26. "LPUART2TRG_EN,LPUART2 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x8 25. "LPUART1TRG_EN,LPUART1 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x8 24. "LPUART0TRG_EN,LPUART0 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x8 22. "ADC6EOC_EN,ADC6 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x8 21. "ADC5EOC_EN,ADC5 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x8 20. "ADC4EOC_EN,ADC4 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x8 19. "ADC3EOC_EN,ADC3 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x8 18. "ADC2EOC_EN,ADC2 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x8 17. "ADC1EOC_EN,ADC1 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x8 16. "ADC0EOC_EN,ADC0 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x8 15. "PWM03OUTB_EN,PWM03 Output B Monitor Enable" "0,1" newline bitfld.long 0x8 14. "PWM02OUTB_EN,PWM02 Output B Monitor Enable" "0,1" newline bitfld.long 0x8 13. "PWM01OUTB_EN,PWM01 Output B Monitor Enable" "0,1" newline bitfld.long 0x8 12. "PWM00OUTB_EN,PWM00 Output B Monitor Enable" "0,1" newline bitfld.long 0x8 11. "PWM03OUTA_EN,PWM03 Output A Monitor Enabl2" "0,1" newline bitfld.long 0x8 10. "PWM02OUTA_EN,PWM02 Output A Monitor Enable" "0,1" newline bitfld.long 0x8 9. "PWM01OUTA_EN,PWM01 Output A Monitor Enable" "0,1" newline bitfld.long 0x8 8. "PWM00OUTA_EN,PWM00 Output A Monitor Enable" "0,1" newline bitfld.long 0x8 7. "PWM03TRG1_EN,PWM03 Output Trigger 1 Monitor Enable" "0,1" newline bitfld.long 0x8 6. "PWM02TRG1_EN,PWM02 Output Trigger 1 Monitor Enable" "0,1" newline bitfld.long 0x8 5. "PWM01TRG1_EN,PWM01 Output Trigger 1 Monitor Enable" "0,1" newline bitfld.long 0x8 4. "PWM00TRG1_EN,PWM00 Output Trigger 1 Monitor Enable" "0,1" newline bitfld.long 0x8 3. "PWM03TRG0_EN,PWM03 Output Trigger 0 Monitor Enable" "0,1" newline bitfld.long 0x8 2. "PWM02TRG0_EN,PWM02 Output Trigger 0 Monitor Enable" "0,1" newline bitfld.long 0x8 1. "PWM01TRG0_EN,PWM01 Output Trigger 0 Monitor Enable" "0,1" newline bitfld.long 0x8 0. "PWM00TRG0_EN,PWM00 Output Trigger 0 Monitor Enable" "0,1" line.long 0xC "MUX1_BCTU0_EN,SIUL2 User Defined" bitfld.long 0xC 16. "PWM0MSTRELOAD_EN,PWM0 Master Reload Monitor Enable" "0,1" newline bitfld.long 0xC 12. "BCTU0ADC2INT_EN,BCTU ADC2DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0xC 11. "BCTU0ADC1INT_EN,BCTU ADC1DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0xC 10. "BCTU0ADC0INT_EN,BCTU ADC0DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0xC 9. "BCTU0LISTINT_EN,BCTU Conversion List Interrupt Request Enable" "0,1" newline bitfld.long 0xC 8. "BCTU0FIFO2INT_EN,BCTU FIFO2 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0xC 7. "BCTU0FIFO1INT_EN,BCTU FIFO1 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0xC 6. "BCTU0FIFO0INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0xC 5. "BCTU0ADC2DMA_EN,BCTU ADC2DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0xC 4. "BCTU0ADC1DMA_EN,BCTU ADC1DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0xC 3. "BCTU0ADC0DMA_EN,BCTU ADC0DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0xC 2. "BCTU0FIFO2DMA_EN,BCTU FIFO2 DMA Request Monitor Enable" "0,1" newline bitfld.long 0xC 1. "BCTU0FIFO1DMA_EN,BCTU FIFO1 DMA Request Monitor Enable" "0,1" newline bitfld.long 0xC 0. "BCTU0FIFO0DMA_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1" line.long 0x10 "MUX1_MISC_EN,SIUL2 User Defined" bitfld.long 0x10 30. "BCTU1ADC3INT_EN,BCTU ADC3DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x10 29. "BCTU1ADC2INT_EN,BCTU ADC2DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x10 28. "BCTU1ADC1INT_EN,BCTU ADC1DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x10 27. "BCTU1ADC0INT_EN,BCTU ADC0DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x10 26. "BCTU1LISTINT_EN,BCTU Conversion List Interrupt Request Enable" "0,1" newline bitfld.long 0x10 25. "BCTU1FIFO2INT_EN,BCTU FIFO2 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x10 24. "BCTU1FIFO1INT_EN,BCTU FIFO1 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x10 23. "BCTU1FIFO0INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x10 22. "BCTU1ADC3DMA_EN,BCTU ADC3DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x10 21. "BCTU1ADC2DMA_EN,BCTU ADC2DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x10 20. "BCTU1ADC1DMA_EN,BCTU ADC1DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x10 19. "BCTU1ADC0DMA_EN,BCTU ADC0DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x10 18. "BCTU1FIFO2DMA_EN,BCTU FIFO2 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x10 17. "BCTU1FIFO1DMA_EN,BCTU FIFO1 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x10 16. "BCTU1FIFO0DMA_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x10 15. "lpi2c_1_trg_slave,LPI2C 1 Slave trigger output" "0,1" newline bitfld.long 0x10 14. "lpi2c_1_trg_master,LPI2C 1 Master trigger output" "0,1" newline bitfld.long 0x10 13. "lpi2c_trg_slave,LPI2C 0 Slave trigger output" "0,1" newline bitfld.long 0x10 12. "lpi2c_trg_master,LPI2C 0 Master trigger output" "0,1" newline bitfld.long 0x10 11. "LPUART3TRG_EN,LPUART3 Output Trigger Monitor Enablee" "0,1" newline bitfld.long 0x10 10. "LPUART2TRG_EN,LPUART2 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x10 9. "LPUART1TRG_EN,LPUART1 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x10 8. "LPUART0TRG_EN,LPUART0 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x10 6. "ADC6EOC_EN,ADC6 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x10 5. "ADC5EOC_EN,ADC5 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x10 4. "ADC4EOC_EN,ADC4 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x10 3. "ADC3EOC_EN,ADC3 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x10 2. "ADC2EOC_EN,ADC2 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x10 1. "ADC1EOC_EN,ADC1 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x10 0. "ADC0EOC_EN,ADC0 End of Conversion Trigger Monitor" "0,1" line.long 0x14 "MUX2_TIMER_EN1,SIUL2 User Defined" bitfld.long 0x14 31. "PWM13OUTB_EN,PWM13 Output B Monitor Enable" "0,1" newline bitfld.long 0x14 30. "PWM12OUTB_EN,PWM12 Output B Monitor Enable" "0,1" newline bitfld.long 0x14 29. "PWM11OUTB_EN,PWM11 Output B Monitor Enable" "0,1" newline bitfld.long 0x14 28. "PWM10OUTB_EN,PWM10 Output B Monitor Enable" "0,1" newline bitfld.long 0x14 27. "PWM13OUTA_EN,PWM13 Output A Monitor Enable" "0,1" newline bitfld.long 0x14 26. "PWM12OUTA_EN,PWM12 Output A Monitor Enable" "0,1" newline bitfld.long 0x14 25. "PWM11OUTA_EN,PWM11 Output A Monitor Enable" "0,1" newline bitfld.long 0x14 24. "PWM10OUTA_EN,PWM10 Output A Monitor Enable" "0,1" newline bitfld.long 0x14 23. "PWM13TRG1_EN,PWM13 Output Trigger 1 Monitor Enable" "0,1" newline bitfld.long 0x14 22. "PWM12TRG1_EN,PWM12 Output Trigger 1 Monitor Enable" "0,1" newline bitfld.long 0x14 21. "PWM11TRG1_EN,PWM11 Output Trigger 1 Monitor Enable" "0,1" newline bitfld.long 0x14 20. "PWM10TRG1_EN,PWM10 Output Trigger 1 Monitor Enable" "0,1" newline bitfld.long 0x14 19. "PWM13TRG0_EN,PWM13 Output Trigger 0 Monitor Enable" "0,1" newline bitfld.long 0x14 18. "PWM12TRG0_EN,PWM12 Output Trigger 0 Monitor Enable" "0,1" newline bitfld.long 0x14 17. "PWM11TRG0_EN,PWM11 Output Trigger 0 Monitor Enable" "0,1" newline bitfld.long 0x14 16. "PWM10TRG0_EN,PWM10 Output Trigger 0 Monitor Enable" "0,1" newline bitfld.long 0x14 0. "PWM1MSTRELOAD_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1" line.long 0x18 "MUX2_BCTU1_EN,SIUL2 User Defined" bitfld.long 0x18 28. "BCTU0ADC2INT_EN,BCTU ADC2DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 27. "BCTU0ADC1INT_EN,BCTU ADC1DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 26. "BCTU0ADC0INT_EN,CTU ADC0DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 25. "BCTU0LISTINT_EN,BCTU Conversion List Interrupt Request Enable" "0,1" newline bitfld.long 0x18 24. "BCTU0FIFO2INT_EN,BCTU FIFO2 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 23. "BCTU0FIFO1INT_EN,BCTU FIFO1 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 22. "BCTU0FIFO0INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 21. "BCTU0ADC2DMA_EN,BCTU ADC2DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 20. "BCTU0ADC1DMA_EN,BCTU ADC1DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 19. "BCTU0ADC0DMA_EN,BCTU ADC0DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 18. "BCTU0FIFO2DMA_EN,BCTU FIFO2 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 17. "BCTU0FIFO1DMA_EN,BCTU FIFO1 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 16. "BCTU0FIFO0DMA_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 14. "BCTU1ADC3INT_EN,BCTU ADC3DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 13. "BCTU1ADC2INT_EN,BCTU ADC2DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 12. "BCTU1ADC1INT_EN,BCTU ADC1DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 11. "BCTU1ADC0INT_EN,BCTU ADC0DR Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 10. "BCTU1LISTINT_EN,BCTU Conversion List Interrupt Request Enable" "0,1" newline bitfld.long 0x18 9. "BCTU1FIFO2INT_EN,BCTU FIFO2 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 8. "BCTU1FIFO1INT_EN,BCTU FIFO1 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 7. "BCTU1FIFO0INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1" newline bitfld.long 0x18 6. "BCTU1ADC3DMA_EN,BCTU ADC3DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 5. "BCTU1ADC2DMA_EN,BCTU ADC2DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 4. "BCTU1ADC1DMA_EN,BCTU ADC1DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 3. "BCTU1ADC0DMA_EN,BCTU ADC0DR DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 2. "BCTU1FIFO2DMA_EN,BCTU FIFO2 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 1. "BCTU1FIFO1DMA_EN,BCTU FIFO1 DMA Request Monitor Enable" "0,1" newline bitfld.long 0x18 0. "BCTU1FIFO0DMA_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1" line.long 0x1C "MUX2_MISC_EN,SIUL2 User Defined" bitfld.long 0x1C 15. "lpi2c_1_trg_slave,LPI2C 1 Slave trigger output" "0,1" newline bitfld.long 0x1C 14. "lpi2c_1_trg_master,LPI2C 1 Master trigger output" "0,1" newline bitfld.long 0x1C 13. "lpi2c_trg_slave,LPI2C 0 Slave trigger output" "0,1" newline bitfld.long 0x1C 12. "lpi2c_trg_master,LPI2C 0 Master trigger outputt" "0,1" newline bitfld.long 0x1C 11. "LPUART3TRG_EN,LPUART3 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x1C 10. "LPUART2TRG_EN,LPUART2 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x1C 9. "LPUART1TRG_EN,LPUART1 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x1C 8. "LPUART0TRG_EN,LPUART0 Output Trigger Monitor Enable" "0,1" newline bitfld.long 0x1C 6. "ADC6EOC_EN,ADC6 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x1C 5. "ADC5EOC_EN,ADC5 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x1C 4. "ADC4EOC_EN,ADC4 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x1C 3. "ADC3EOC_EN,ADC3 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x1C 2. "ADC2EOC_EN,ADC2 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x1C 1. "ADC1EOC_EN,ADC1 End of Conversion Trigger Monitor" "0,1" newline bitfld.long 0x1C 0. "ADC0EOC_EN,ADC0 End of Conversion Trigger Monitor" "0,1" rgroup.long 0x200++0x7 line.long 0x0 "MIDR3,SIUL2 MCU ID 3" hexmask.long.byte 0x0 26.--31. 1. "PROD_FAM_LET,Product Family Letter" newline hexmask.long.word 0x0 16.--25. 1. "PROD_FAM_NO,Product Family Number" newline hexmask.long.byte 0x0 10.--15. 1. "PART_NO_SUF,Part Number Suffix" newline hexmask.long.byte 0x0 0.--5. 1. "SYS_RAM_SIZE,System RAM Size" line.long 0x4 "MIDR4,SIUL2 MCU ID 4" bitfld.long 0x4 14.--15. "CORE_PLAT_FET_1,Core Platform Options Feature" "0,1,2,3" newline bitfld.long 0x4 0.--2. "CORE_PLAT_FET_2,Core Platform Options Feature" "0,1,2,3,4,5,6,7" group.long 0x240++0x2B line.long 0x0 "MSCR0,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR1,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR2,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR3,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR4,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR5,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR6,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR7,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR8,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x24 "MSCR9,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x28 "MSCR10,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x278++0x33 line.long 0x0 "MSCR14,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR15,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR16,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR17,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR18,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR19,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR20,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR21,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR22,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x24 "MSCR23,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x28 "MSCR24,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x2C "MSCR25,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x30 "MSCR26,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x2B0++0x27 line.long 0x0 "MSCR28,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR29,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR30,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR31,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR32,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR33,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR34,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR35,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR36,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x24 "MSCR37,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x2E0++0x57 line.long 0x0 "MSCR40,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR41,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR42,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR43,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR44,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR45,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR46,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR47,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR48,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x24 "MSCR49,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x28 "MSCR50,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x2C "MSCR51,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x30 "MSCR52,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x34 "MSCR53,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x34 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x34 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x34 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x34 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x34 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x34 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x34 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x34 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x34 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x38 "MSCR54,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x38 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x38 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x38 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x38 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x38 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x38 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x38 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x38 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x38 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x3C "MSCR55,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x3C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x3C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x3C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x3C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x3C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x3C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x3C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x3C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x3C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x40 "MSCR56,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x40 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x40 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x40 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x40 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x40 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x40 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x40 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x40 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x40 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x44 "MSCR57,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x44 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x44 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x44 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x44 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x44 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x44 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x44 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x44 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x44 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x48 "MSCR58,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x48 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x48 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x48 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x48 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x48 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x48 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x48 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x48 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x48 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4C "MSCR59,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x50 "MSCR60,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x50 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x50 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x50 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x50 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x50 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x50 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x50 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x50 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x50 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x54 "MSCR61,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x54 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x54 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x54 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x54 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x54 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x54 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x54 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x54 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x54 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x340++0x57 line.long 0x0 "MSCR64,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR65,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR66,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR67,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR68,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR69,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR70,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR71,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR72,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x24 "MSCR73,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x28 "MSCR74,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x2C "MSCR75,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x30 "MSCR76,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x34 "MSCR77,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x34 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x34 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x34 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x34 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x34 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x34 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x34 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x34 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x34 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x38 "MSCR78,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x38 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x38 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x38 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x38 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x38 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x38 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x38 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x38 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x38 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x3C "MSCR79,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x3C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x3C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x3C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x3C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x3C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x3C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x3C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x3C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x3C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x40 "MSCR80,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x40 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x40 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x40 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x40 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x40 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x40 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x40 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x40 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x40 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x44 "MSCR81,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x44 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x44 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x44 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x44 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x44 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x44 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x44 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x44 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x44 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x48 "MSCR82,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x48 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x48 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x48 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x48 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x48 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x48 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x48 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x48 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x48 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4C "MSCR83,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x50 "MSCR84,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x50 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x50 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x50 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x50 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x50 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x50 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x50 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x50 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x50 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x54 "MSCR85,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x54 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x54 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x54 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x54 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x54 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x54 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x54 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x54 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x54 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x39C++0xAF line.long 0x0 "MSCR87,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR88,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR89,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR90,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR91,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR92,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR93,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR94,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR95,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x24 "MSCR96,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x28 "MSCR97,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x2C "MSCR98,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x30 "MSCR99,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x34 "MSCR100,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x34 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x34 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x34 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x34 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x34 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x34 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x34 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x34 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x34 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x38 "MSCR101,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x38 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x38 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x38 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x38 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x38 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x38 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x38 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x38 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x38 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x3C "MSCR102,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x3C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x3C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x3C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x3C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x3C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x3C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x3C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x3C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x3C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x40 "MSCR103,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x40 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x40 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x40 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x40 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x40 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x40 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x40 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x40 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x40 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x44 "MSCR104,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x44 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x44 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x44 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x44 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x44 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x44 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x44 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x44 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x44 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x48 "MSCR105,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x48 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x48 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x48 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x48 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x48 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x48 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x48 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x48 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x48 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4C "MSCR106,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x50 "MSCR107,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x50 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x50 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x50 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x50 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x50 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x50 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x50 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x50 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x50 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x54 "MSCR108,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x54 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x54 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x54 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x54 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x54 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x54 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x54 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x54 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x54 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x58 "MSCR109,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x58 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x58 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x58 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x58 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x58 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x58 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x58 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x58 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x58 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x58 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x58 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x5C "MSCR110,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x5C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x5C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x5C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x5C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x5C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x5C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x5C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x5C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x5C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x60 "MSCR111,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x60 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x60 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x60 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x60 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x60 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x60 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x60 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x60 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x60 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x60 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x60 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x64 "MSCR112,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x64 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x64 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x64 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x64 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x64 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x64 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x64 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x64 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x64 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x64 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x64 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x68 "MSCR113,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x68 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x68 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x68 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x68 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x68 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x68 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x68 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x68 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x68 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x68 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x68 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x6C "MSCR114,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x6C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x6C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x6C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x6C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x6C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x6C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x6C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x6C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x6C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x70 "MSCR115,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x70 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x70 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x70 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x70 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x70 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x70 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x70 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x70 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x70 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x70 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x70 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x70 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x70 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x70 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x74 "MSCR116,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x74 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x74 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x74 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x74 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x74 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x74 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x74 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x74 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x74 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x74 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x74 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x74 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x74 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x74 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x78 "MSCR117,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x78 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x78 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x78 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x78 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x78 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x78 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x78 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x78 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x78 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x78 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x78 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x78 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x78 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x78 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x7C "MSCR118,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x7C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x7C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x7C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x7C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x7C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x7C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x7C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x7C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x7C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x80 "MSCR119,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x80 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x80 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x80 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x80 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x80 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x80 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x80 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x80 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x80 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x80 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x80 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x80 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x80 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x80 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x84 "MSCR120,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x84 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x84 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x84 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x84 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x84 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x84 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x84 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x84 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x84 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x84 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x84 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x84 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x84 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x84 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x88 "MSCR121,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x88 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x88 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x88 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x88 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x88 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x88 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x88 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x88 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x88 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x88 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x88 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x88 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x88 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x88 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8C "MSCR122,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x90 "MSCR123,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x90 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x90 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x90 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x90 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x90 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x90 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x90 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x90 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x90 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x90 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x90 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x90 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x90 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x90 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x94 "MSCR124,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x94 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x94 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x94 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x94 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x94 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x94 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x94 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x94 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x94 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x94 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x94 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x94 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x94 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x94 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x98 "MSCR125,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x98 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x98 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x98 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x98 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x98 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x98 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x98 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x98 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x98 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x98 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x98 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x98 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x98 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x98 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x9C "MSCR126,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x9C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x9C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x9C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x9C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x9C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x9C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x9C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x9C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x9C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x9C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x9C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x9C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x9C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x9C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xA0 "MSCR127,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xA0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xA0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xA0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xA0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xA0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xA0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xA0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xA0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xA0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xA0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xA0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xA4 "MSCR128,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xA4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xA4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xA4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xA4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xA4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xA4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xA4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xA4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xA4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xA4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xA4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xA8 "MSCR129,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xA8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xA8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xA8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xA8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xA8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xA8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xA8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xA8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xA8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xA8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xA8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xA8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xAC "MSCR130,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xAC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xAC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xAC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xAC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xAC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xAC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xAC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xAC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xAC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xAC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xAC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xAC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xAC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xAC 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x450++0x23 line.long 0x0 "MSCR132,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR133,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR134,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR135,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR136,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR137,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR138,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR139,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR140,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x478++0x1F line.long 0x0 "MSCR142,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR143,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR144,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR145,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR146,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR147,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR148,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR149,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x49C++0x3 line.long 0x0 "MSCR151,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x4A8++0x6F line.long 0x0 "MSCR154,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR155,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR156,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR157,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR158,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR159,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR160,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR161,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR162,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x24 "MSCR163,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x28 "MSCR164,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x2C "MSCR165,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x30 "MSCR166,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x34 "MSCR167,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x34 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x34 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x34 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x34 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x34 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x34 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x34 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x34 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x34 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x38 "MSCR168,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x38 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x38 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x38 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x38 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x38 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x38 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x38 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x38 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x38 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x3C "MSCR169,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x3C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x3C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x3C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x3C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x3C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x3C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x3C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x3C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x3C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x40 "MSCR170,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x40 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x40 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x40 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x40 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x40 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x40 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x40 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x40 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x40 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x44 "MSCR171,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x44 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x44 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x44 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x44 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x44 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x44 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x44 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x44 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x44 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x48 "MSCR172,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x48 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x48 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x48 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x48 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x48 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x48 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x48 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x48 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x48 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4C "MSCR173,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x50 "MSCR174,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x50 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x50 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x50 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x50 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x50 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x50 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x50 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x50 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x50 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x54 "MSCR175,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x54 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x54 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x54 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x54 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x54 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x54 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x54 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x54 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x54 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x58 "MSCR176,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x58 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x58 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x58 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x58 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x58 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x58 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x58 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x58 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x58 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x58 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x58 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x5C "MSCR177,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x5C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x5C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x5C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x5C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x5C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x5C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x5C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x5C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x5C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x60 "MSCR178,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x60 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x60 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x60 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x60 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x60 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x60 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x60 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x60 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x60 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x60 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x60 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x64 "MSCR179,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x64 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x64 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x64 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x64 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x64 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x64 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x64 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x64 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x64 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x64 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x64 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x68 "MSCR180,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x68 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x68 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x68 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x68 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x68 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x68 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x68 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x68 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x68 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x68 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x68 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x6C "MSCR181,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x6C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x6C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x6C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x6C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x6C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x6C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x6C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x6C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x6C 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x51C++0x93 line.long 0x0 "MSCR183,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR184,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR185,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR186,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR187,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR188,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x18 "MSCR189,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x1C "MSCR190,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x20 "MSCR191,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x24 "MSCR192,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x28 "MSCR193,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x2C "MSCR194,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x30 "MSCR195,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x34 "MSCR196,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x34 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x34 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x34 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x34 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x34 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x34 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x34 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x34 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x34 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x34 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x34 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x38 "MSCR197,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x38 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x38 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x38 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x38 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x38 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x38 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x38 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x38 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x38 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x38 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x38 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x3C "MSCR198,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x3C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x3C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x3C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x3C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x3C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x3C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x3C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x3C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x3C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x3C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x40 "MSCR199,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x40 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x40 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x40 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x40 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x40 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x40 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x40 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x40 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x40 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x40 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x40 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x44 "MSCR200,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x44 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x44 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x44 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x44 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x44 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x44 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x44 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x44 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x44 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x44 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x44 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x48 "MSCR201,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x48 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x48 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x48 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x48 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x48 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x48 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x48 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x48 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x48 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x48 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x48 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4C "MSCR202,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x50 "MSCR203,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x50 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x50 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x50 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x50 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x50 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x50 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x50 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x50 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x50 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x50 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x50 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x54 "MSCR204,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x54 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x54 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x54 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x54 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x54 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x54 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x54 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x54 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x54 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x54 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x54 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x58 "MSCR205,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x58 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x58 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x58 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x58 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x58 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x58 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x58 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x58 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x58 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x58 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x58 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x58 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x5C "MSCR206,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x5C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x5C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x5C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x5C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x5C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x5C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x5C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x5C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x5C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x5C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x60 "MSCR207,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x60 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x60 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x60 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x60 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x60 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x60 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x60 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x60 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x60 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x60 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x60 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x60 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x64 "MSCR208,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x64 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x64 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x64 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x64 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x64 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x64 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x64 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x64 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x64 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x64 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x64 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x64 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x68 "MSCR209,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x68 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x68 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x68 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x68 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x68 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x68 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x68 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x68 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x68 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x68 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x68 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x68 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x6C "MSCR210,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x6C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x6C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x6C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x6C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x6C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x6C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x6C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x6C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x6C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x6C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x70 "MSCR211,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x70 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x70 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x70 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x70 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x70 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x70 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x70 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x70 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x70 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x70 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x70 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x70 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x70 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x70 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x74 "MSCR212,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x74 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x74 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x74 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x74 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x74 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x74 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x74 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x74 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x74 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x74 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x74 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x74 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x74 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x74 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x78 "MSCR213,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x78 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x78 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x78 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x78 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x78 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x78 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x78 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x78 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x78 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x78 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x78 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x78 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x78 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x78 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x7C "MSCR214,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x7C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x7C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x7C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x7C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x7C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x7C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x7C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x7C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x7C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x7C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x80 "MSCR215,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x80 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x80 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x80 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x80 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x80 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x80 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x80 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x80 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x80 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x80 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x80 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x80 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x80 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x80 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x84 "MSCR216,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x84 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x84 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x84 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x84 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x84 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x84 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x84 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x84 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x84 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x84 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x84 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x84 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x84 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x84 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x88 "MSCR217,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x88 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x88 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x88 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x88 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x88 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x88 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x88 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x88 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x88 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x88 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x88 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x88 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x88 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x88 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8C "MSCR218,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8C 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8C 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8C 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8C 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8C 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8C 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x90 "MSCR219,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x90 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x90 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x90 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x90 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x90 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x90 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x90 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x90 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x90 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x90 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x90 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x90 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x90 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x90 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0x5DC++0x17 line.long 0x0 "MSCR231,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x4 "MSCR232,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x8 "MSCR233,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0xC "MSCR234,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x10 "MSCR235,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1" line.long 0x14 "MSCR236,SIUL2 Multiplexed Signal Configuration Register" bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled" newline bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert" newline bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting" newline bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled" newline bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up" newline bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled" newline bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disabled (high Z),1: Retain" newline bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1" newline bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1" newline bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1" newline bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1" group.long 0xA40++0x17 line.long 0x0 "IMCR0,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR1,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR2,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR3,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR4,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR5,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" group.long 0xA80++0xDF line.long 0x0 "IMCR16,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR17,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR18,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR19,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR20,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR21,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" line.long 0x18 "IMCR22,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select" line.long 0x1C "IMCR23,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select" line.long 0x20 "IMCR24,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select" line.long 0x24 "IMCR25,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select" line.long 0x28 "IMCR26,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select" line.long 0x2C "IMCR27,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select" line.long 0x30 "IMCR28,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select" line.long 0x34 "IMCR29,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select" line.long 0x38 "IMCR30,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select" line.long 0x3C "IMCR31,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select" line.long 0x40 "IMCR32,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select" line.long 0x44 "IMCR33,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select" line.long 0x48 "IMCR34,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select" line.long 0x4C "IMCR35,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select" line.long 0x50 "IMCR36,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select" line.long 0x54 "IMCR37,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select" line.long 0x58 "IMCR38,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select" line.long 0x5C "IMCR39,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select" line.long 0x60 "IMCR40,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x60 0.--3. 1. "SSS,Source Signal Select" line.long 0x64 "IMCR41,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x64 0.--3. 1. "SSS,Source Signal Select" line.long 0x68 "IMCR42,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x68 0.--3. 1. "SSS,Source Signal Select" line.long 0x6C "IMCR43,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x6C 0.--3. 1. "SSS,Source Signal Select" line.long 0x70 "IMCR44,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x70 0.--3. 1. "SSS,Source Signal Select" line.long 0x74 "IMCR45,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x74 0.--3. 1. "SSS,Source Signal Select" line.long 0x78 "IMCR46,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x78 0.--3. 1. "SSS,Source Signal Select" line.long 0x7C "IMCR47,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x7C 0.--3. 1. "SSS,Source Signal Select" line.long 0x80 "IMCR48,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x80 0.--3. 1. "SSS,Source Signal Select" line.long 0x84 "IMCR49,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x84 0.--3. 1. "SSS,Source Signal Select" line.long 0x88 "IMCR50,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x88 0.--3. 1. "SSS,Source Signal Select" line.long 0x8C "IMCR51,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8C 0.--3. 1. "SSS,Source Signal Select" line.long 0x90 "IMCR52,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x90 0.--3. 1. "SSS,Source Signal Select" line.long 0x94 "IMCR53,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x94 0.--3. 1. "SSS,Source Signal Select" line.long 0x98 "IMCR54,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x98 0.--3. 1. "SSS,Source Signal Select" line.long 0x9C "IMCR55,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x9C 0.--3. 1. "SSS,Source Signal Select" line.long 0xA0 "IMCR56,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA0 0.--3. 1. "SSS,Source Signal Select" line.long 0xA4 "IMCR57,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA4 0.--3. 1. "SSS,Source Signal Select" line.long 0xA8 "IMCR58,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA8 0.--3. 1. "SSS,Source Signal Select" line.long 0xAC "IMCR59,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xAC 0.--3. 1. "SSS,Source Signal Select" line.long 0xB0 "IMCR60,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB0 0.--3. 1. "SSS,Source Signal Select" line.long 0xB4 "IMCR61,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB4 0.--3. 1. "SSS,Source Signal Select" line.long 0xB8 "IMCR62,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB8 0.--3. 1. "SSS,Source Signal Select" line.long 0xBC "IMCR63,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xBC 0.--3. 1. "SSS,Source Signal Select" line.long 0xC0 "IMCR64,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC0 0.--3. 1. "SSS,Source Signal Select" line.long 0xC4 "IMCR65,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC4 0.--3. 1. "SSS,Source Signal Select" line.long 0xC8 "IMCR66,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC8 0.--3. 1. "SSS,Source Signal Select" line.long 0xCC "IMCR67,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xCC 0.--3. 1. "SSS,Source Signal Select" line.long 0xD0 "IMCR68,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD0 0.--3. 1. "SSS,Source Signal Select" line.long 0xD4 "IMCR69,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD4 0.--3. 1. "SSS,Source Signal Select" line.long 0xD8 "IMCR70,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD8 0.--3. 1. "SSS,Source Signal Select" line.long 0xDC "IMCR71,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xDC 0.--3. 1. "SSS,Source Signal Select" group.long 0xC80++0x17 line.long 0x0 "IMCR144,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR145,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR146,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR147,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR148,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR149,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" group.long 0xCA0++0x9B line.long 0x0 "IMCR152,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR153,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR154,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR155,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR156,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR157,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" line.long 0x18 "IMCR158,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select" line.long 0x1C "IMCR159,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select" line.long 0x20 "IMCR160,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select" line.long 0x24 "IMCR161,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select" line.long 0x28 "IMCR162,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select" line.long 0x2C "IMCR163,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select" line.long 0x30 "IMCR164,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select" line.long 0x34 "IMCR165,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select" line.long 0x38 "IMCR166,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select" line.long 0x3C "IMCR167,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select" line.long 0x40 "IMCR168,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select" line.long 0x44 "IMCR169,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select" line.long 0x48 "IMCR170,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select" line.long 0x4C "IMCR171,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select" line.long 0x50 "IMCR172,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select" line.long 0x54 "IMCR173,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select" line.long 0x58 "IMCR174,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select" line.long 0x5C "IMCR175,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select" line.long 0x60 "IMCR176,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x60 0.--3. 1. "SSS,Source Signal Select" line.long 0x64 "IMCR177,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x64 0.--3. 1. "SSS,Source Signal Select" line.long 0x68 "IMCR178,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x68 0.--3. 1. "SSS,Source Signal Select" line.long 0x6C "IMCR179,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x6C 0.--3. 1. "SSS,Source Signal Select" line.long 0x70 "IMCR180,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x70 0.--3. 1. "SSS,Source Signal Select" line.long 0x74 "IMCR181,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x74 0.--3. 1. "SSS,Source Signal Select" line.long 0x78 "IMCR182,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x78 0.--3. 1. "SSS,Source Signal Select" line.long 0x7C "IMCR183,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x7C 0.--3. 1. "SSS,Source Signal Select" line.long 0x80 "IMCR184,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x80 0.--3. 1. "SSS,Source Signal Select" line.long 0x84 "IMCR185,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x84 0.--3. 1. "SSS,Source Signal Select" line.long 0x88 "IMCR186,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x88 0.--3. 1. "SSS,Source Signal Select" line.long 0x8C "IMCR187,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8C 0.--3. 1. "SSS,Source Signal Select" line.long 0x90 "IMCR188,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x90 0.--3. 1. "SSS,Source Signal Select" line.long 0x94 "IMCR189,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x94 0.--3. 1. "SSS,Source Signal Select" line.long 0x98 "IMCR190,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x98 0.--3. 1. "SSS,Source Signal Select" group.long 0xD8C++0xE7 line.long 0x0 "IMCR211,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR212,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR213,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR214,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR215,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR216,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" line.long 0x18 "IMCR217,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select" line.long 0x1C "IMCR218,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select" line.long 0x20 "IMCR219,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select" line.long 0x24 "IMCR220,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select" line.long 0x28 "IMCR221,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select" line.long 0x2C "IMCR222,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select" line.long 0x30 "IMCR223,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select" line.long 0x34 "IMCR224,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select" line.long 0x38 "IMCR225,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select" line.long 0x3C "IMCR226,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select" line.long 0x40 "IMCR227,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select" line.long 0x44 "IMCR228,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select" line.long 0x48 "IMCR229,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select" line.long 0x4C "IMCR230,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select" line.long 0x50 "IMCR231,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select" line.long 0x54 "IMCR232,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select" line.long 0x58 "IMCR233,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select" line.long 0x5C "IMCR234,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select" line.long 0x60 "IMCR235,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x60 0.--3. 1. "SSS,Source Signal Select" line.long 0x64 "IMCR236,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x64 0.--3. 1. "SSS,Source Signal Select" line.long 0x68 "IMCR237,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x68 0.--3. 1. "SSS,Source Signal Select" line.long 0x6C "IMCR238,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x6C 0.--3. 1. "SSS,Source Signal Select" line.long 0x70 "IMCR239,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x70 0.--3. 1. "SSS,Source Signal Select" line.long 0x74 "IMCR240,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x74 0.--3. 1. "SSS,Source Signal Select" line.long 0x78 "IMCR241,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x78 0.--3. 1. "SSS,Source Signal Select" line.long 0x7C "IMCR242,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x7C 0.--3. 1. "SSS,Source Signal Select" line.long 0x80 "IMCR243,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x80 0.--3. 1. "SSS,Source Signal Select" line.long 0x84 "IMCR244,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x84 0.--3. 1. "SSS,Source Signal Select" line.long 0x88 "IMCR245,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x88 0.--3. 1. "SSS,Source Signal Select" line.long 0x8C "IMCR246,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8C 0.--3. 1. "SSS,Source Signal Select" line.long 0x90 "IMCR247,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x90 0.--3. 1. "SSS,Source Signal Select" line.long 0x94 "IMCR248,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x94 0.--3. 1. "SSS,Source Signal Select" line.long 0x98 "IMCR249,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x98 0.--3. 1. "SSS,Source Signal Select" line.long 0x9C "IMCR250,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x9C 0.--3. 1. "SSS,Source Signal Select" line.long 0xA0 "IMCR251,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA0 0.--3. 1. "SSS,Source Signal Select" line.long 0xA4 "IMCR252,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA4 0.--3. 1. "SSS,Source Signal Select" line.long 0xA8 "IMCR253,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA8 0.--3. 1. "SSS,Source Signal Select" line.long 0xAC "IMCR254,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xAC 0.--3. 1. "SSS,Source Signal Select" line.long 0xB0 "IMCR255,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB0 0.--3. 1. "SSS,Source Signal Select" line.long 0xB4 "IMCR256,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB4 0.--3. 1. "SSS,Source Signal Select" line.long 0xB8 "IMCR257,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB8 0.--3. 1. "SSS,Source Signal Select" line.long 0xBC "IMCR258,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xBC 0.--3. 1. "SSS,Source Signal Select" line.long 0xC0 "IMCR259,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC0 0.--3. 1. "SSS,Source Signal Select" line.long 0xC4 "IMCR260,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC4 0.--3. 1. "SSS,Source Signal Select" line.long 0xC8 "IMCR261,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC8 0.--3. 1. "SSS,Source Signal Select" line.long 0xCC "IMCR262,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xCC 0.--3. 1. "SSS,Source Signal Select" line.long 0xD0 "IMCR263,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD0 0.--3. 1. "SSS,Source Signal Select" line.long 0xD4 "IMCR264,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD4 0.--3. 1. "SSS,Source Signal Select" line.long 0xD8 "IMCR265,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD8 0.--3. 1. "SSS,Source Signal Select" line.long 0xDC "IMCR266,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xDC 0.--3. 1. "SSS,Source Signal Select" line.long 0xE0 "IMCR267,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xE0 0.--3. 1. "SSS,Source Signal Select" line.long 0xE4 "IMCR268,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xE4 0.--3. 1. "SSS,Source Signal Select" group.long 0xEC4++0x53 line.long 0x0 "IMCR289,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR290,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR291,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR292,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR293,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR294,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" line.long 0x18 "IMCR295,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select" line.long 0x1C "IMCR296,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select" line.long 0x20 "IMCR297,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select" line.long 0x24 "IMCR298,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select" line.long 0x28 "IMCR299,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select" line.long 0x2C "IMCR300,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select" line.long 0x30 "IMCR301,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select" line.long 0x34 "IMCR302,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select" line.long 0x38 "IMCR303,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select" line.long 0x3C "IMCR304,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select" line.long 0x40 "IMCR305,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select" line.long 0x44 "IMCR306,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select" line.long 0x48 "IMCR307,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select" line.long 0x4C "IMCR308,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select" line.long 0x50 "IMCR309,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select" group.long 0xF9C++0x2B line.long 0x0 "IMCR343,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR344,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR345,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR346,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR347,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR348,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" line.long 0x18 "IMCR349,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select" line.long 0x1C "IMCR350,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select" line.long 0x20 "IMCR351,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select" line.long 0x24 "IMCR352,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select" line.long 0x28 "IMCR353,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select" group.long 0xFE0++0x1B line.long 0x0 "IMCR360,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR361,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR362,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR363,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR364,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR365,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" line.long 0x18 "IMCR366,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select" group.long 0x100C++0xA3 line.long 0x0 "IMCR371,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR372,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR373,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR374,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR375,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR376,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" line.long 0x18 "IMCR377,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select" line.long 0x1C "IMCR378,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select" line.long 0x20 "IMCR379,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select" line.long 0x24 "IMCR380,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select" line.long 0x28 "IMCR381,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select" line.long 0x2C "IMCR382,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select" line.long 0x30 "IMCR383,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select" line.long 0x34 "IMCR384,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select" line.long 0x38 "IMCR385,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select" line.long 0x3C "IMCR386,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select" line.long 0x40 "IMCR387,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select" line.long 0x44 "IMCR388,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select" line.long 0x48 "IMCR389,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select" line.long 0x4C "IMCR390,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select" line.long 0x50 "IMCR391,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select" line.long 0x54 "IMCR392,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select" line.long 0x58 "IMCR393,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select" line.long 0x5C "IMCR394,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select" line.long 0x60 "IMCR395,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x60 0.--3. 1. "SSS,Source Signal Select" line.long 0x64 "IMCR396,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x64 0.--3. 1. "SSS,Source Signal Select" line.long 0x68 "IMCR397,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x68 0.--3. 1. "SSS,Source Signal Select" line.long 0x6C "IMCR398,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x6C 0.--3. 1. "SSS,Source Signal Select" line.long 0x70 "IMCR399,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x70 0.--3. 1. "SSS,Source Signal Select" line.long 0x74 "IMCR400,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x74 0.--3. 1. "SSS,Source Signal Select" line.long 0x78 "IMCR401,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x78 0.--3. 1. "SSS,Source Signal Select" line.long 0x7C "IMCR402,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x7C 0.--3. 1. "SSS,Source Signal Select" line.long 0x80 "IMCR403,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x80 0.--3. 1. "SSS,Source Signal Select" line.long 0x84 "IMCR404,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x84 0.--3. 1. "SSS,Source Signal Select" line.long 0x88 "IMCR405,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x88 0.--3. 1. "SSS,Source Signal Select" line.long 0x8C "IMCR406,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8C 0.--3. 1. "SSS,Source Signal Select" line.long 0x90 "IMCR407,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x90 0.--3. 1. "SSS,Source Signal Select" line.long 0x94 "IMCR408,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x94 0.--3. 1. "SSS,Source Signal Select" line.long 0x98 "IMCR409,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x98 0.--3. 1. "SSS,Source Signal Select" line.long 0x9C "IMCR410,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x9C 0.--3. 1. "SSS,Source Signal Select" line.long 0xA0 "IMCR411,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA0 0.--3. 1. "SSS,Source Signal Select" group.long 0x10B4++0x18B line.long 0x0 "IMCR413,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select" line.long 0x4 "IMCR414,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select" line.long 0x8 "IMCR415,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select" line.long 0xC "IMCR416,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select" line.long 0x10 "IMCR417,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select" line.long 0x14 "IMCR418,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select" line.long 0x18 "IMCR419,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select" line.long 0x1C "IMCR420,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select" line.long 0x20 "IMCR421,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select" line.long 0x24 "IMCR422,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select" line.long 0x28 "IMCR423,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select" line.long 0x2C "IMCR424,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select" line.long 0x30 "IMCR425,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select" line.long 0x34 "IMCR426,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select" line.long 0x38 "IMCR427,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select" line.long 0x3C "IMCR428,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select" line.long 0x40 "IMCR429,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select" line.long 0x44 "IMCR430,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select" line.long 0x48 "IMCR431,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select" line.long 0x4C "IMCR432,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select" line.long 0x50 "IMCR433,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select" line.long 0x54 "IMCR434,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select" line.long 0x58 "IMCR435,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select" line.long 0x5C "IMCR436,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select" line.long 0x60 "IMCR437,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x60 0.--3. 1. "SSS,Source Signal Select" line.long 0x64 "IMCR438,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x64 0.--3. 1. "SSS,Source Signal Select" line.long 0x68 "IMCR439,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x68 0.--3. 1. "SSS,Source Signal Select" line.long 0x6C "IMCR440,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x6C 0.--3. 1. "SSS,Source Signal Select" line.long 0x70 "IMCR441,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x70 0.--3. 1. "SSS,Source Signal Select" line.long 0x74 "IMCR442,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x74 0.--3. 1. "SSS,Source Signal Select" line.long 0x78 "IMCR443,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x78 0.--3. 1. "SSS,Source Signal Select" line.long 0x7C "IMCR444,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x7C 0.--3. 1. "SSS,Source Signal Select" line.long 0x80 "IMCR445,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x80 0.--3. 1. "SSS,Source Signal Select" line.long 0x84 "IMCR446,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x84 0.--3. 1. "SSS,Source Signal Select" line.long 0x88 "IMCR447,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x88 0.--3. 1. "SSS,Source Signal Select" line.long 0x8C "IMCR448,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x8C 0.--3. 1. "SSS,Source Signal Select" line.long 0x90 "IMCR449,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x90 0.--3. 1. "SSS,Source Signal Select" line.long 0x94 "IMCR450,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x94 0.--3. 1. "SSS,Source Signal Select" line.long 0x98 "IMCR451,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x98 0.--3. 1. "SSS,Source Signal Select" line.long 0x9C "IMCR452,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x9C 0.--3. 1. "SSS,Source Signal Select" line.long 0xA0 "IMCR453,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA0 0.--3. 1. "SSS,Source Signal Select" line.long 0xA4 "IMCR454,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA4 0.--3. 1. "SSS,Source Signal Select" line.long 0xA8 "IMCR455,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xA8 0.--3. 1. "SSS,Source Signal Select" line.long 0xAC "IMCR456,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xAC 0.--3. 1. "SSS,Source Signal Select" line.long 0xB0 "IMCR457,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB0 0.--3. 1. "SSS,Source Signal Select" line.long 0xB4 "IMCR458,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB4 0.--3. 1. "SSS,Source Signal Select" line.long 0xB8 "IMCR459,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xB8 0.--3. 1. "SSS,Source Signal Select" line.long 0xBC "IMCR460,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xBC 0.--3. 1. "SSS,Source Signal Select" line.long 0xC0 "IMCR461,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC0 0.--3. 1. "SSS,Source Signal Select" line.long 0xC4 "IMCR462,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC4 0.--3. 1. "SSS,Source Signal Select" line.long 0xC8 "IMCR463,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xC8 0.--3. 1. "SSS,Source Signal Select" line.long 0xCC "IMCR464,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xCC 0.--3. 1. "SSS,Source Signal Select" line.long 0xD0 "IMCR465,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD0 0.--3. 1. "SSS,Source Signal Select" line.long 0xD4 "IMCR466,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD4 0.--3. 1. "SSS,Source Signal Select" line.long 0xD8 "IMCR467,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xD8 0.--3. 1. "SSS,Source Signal Select" line.long 0xDC "IMCR468,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xDC 0.--3. 1. "SSS,Source Signal Select" line.long 0xE0 "IMCR469,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xE0 0.--3. 1. "SSS,Source Signal Select" line.long 0xE4 "IMCR470,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xE4 0.--3. 1. "SSS,Source Signal Select" line.long 0xE8 "IMCR471,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xE8 0.--3. 1. "SSS,Source Signal Select" line.long 0xEC "IMCR472,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xEC 0.--3. 1. "SSS,Source Signal Select" line.long 0xF0 "IMCR473,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xF0 0.--3. 1. "SSS,Source Signal Select" line.long 0xF4 "IMCR474,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xF4 0.--3. 1. "SSS,Source Signal Select" line.long 0xF8 "IMCR475,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xF8 0.--3. 1. "SSS,Source Signal Select" line.long 0xFC "IMCR476,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0xFC 0.--3. 1. "SSS,Source Signal Select" line.long 0x100 "IMCR477,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x100 0.--3. 1. "SSS,Source Signal Select" line.long 0x104 "IMCR478,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x104 0.--3. 1. "SSS,Source Signal Select" line.long 0x108 "IMCR479,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x108 0.--3. 1. "SSS,Source Signal Select" line.long 0x10C "IMCR480,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x10C 0.--3. 1. "SSS,Source Signal Select" line.long 0x110 "IMCR481,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x110 0.--3. 1. "SSS,Source Signal Select" line.long 0x114 "IMCR482,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x114 0.--3. 1. "SSS,Source Signal Select" line.long 0x118 "IMCR483,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x118 0.--3. 1. "SSS,Source Signal Select" line.long 0x11C "IMCR484,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x11C 0.--3. 1. "SSS,Source Signal Select" line.long 0x120 "IMCR485,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x120 0.--3. 1. "SSS,Source Signal Select" line.long 0x124 "IMCR486,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x124 0.--3. 1. "SSS,Source Signal Select" line.long 0x128 "IMCR487,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x128 0.--3. 1. "SSS,Source Signal Select" line.long 0x12C "IMCR488,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x12C 0.--3. 1. "SSS,Source Signal Select" line.long 0x130 "IMCR489,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x130 0.--3. 1. "SSS,Source Signal Select" line.long 0x134 "IMCR490,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x134 0.--3. 1. "SSS,Source Signal Select" line.long 0x138 "IMCR491,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x138 0.--3. 1. "SSS,Source Signal Select" line.long 0x13C "IMCR492,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x13C 0.--3. 1. "SSS,Source Signal Select" line.long 0x140 "IMCR493,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x140 0.--3. 1. "SSS,Source Signal Select" line.long 0x144 "IMCR494,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x144 0.--3. 1. "SSS,Source Signal Select" line.long 0x148 "IMCR495,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x148 0.--3. 1. "SSS,Source Signal Select" line.long 0x14C "IMCR496,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x14C 0.--3. 1. "SSS,Source Signal Select" line.long 0x150 "IMCR497,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x150 0.--3. 1. "SSS,Source Signal Select" line.long 0x154 "IMCR498,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x154 0.--3. 1. "SSS,Source Signal Select" line.long 0x158 "IMCR499,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x158 0.--3. 1. "SSS,Source Signal Select" line.long 0x15C "IMCR500,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x15C 0.--3. 1. "SSS,Source Signal Select" line.long 0x160 "IMCR501,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x160 0.--3. 1. "SSS,Source Signal Select" line.long 0x164 "IMCR502,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x164 0.--3. 1. "SSS,Source Signal Select" line.long 0x168 "IMCR503,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x168 0.--3. 1. "SSS,Source Signal Select" line.long 0x16C "IMCR504,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x16C 0.--3. 1. "SSS,Source Signal Select" line.long 0x170 "IMCR505,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x170 0.--3. 1. "SSS,Source Signal Select" line.long 0x174 "IMCR506,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x174 0.--3. 1. "SSS,Source Signal Select" line.long 0x178 "IMCR507,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x178 0.--3. 1. "SSS,Source Signal Select" line.long 0x17C "IMCR508,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x17C 0.--3. 1. "SSS,Source Signal Select" line.long 0x180 "IMCR509,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x180 0.--3. 1. "SSS,Source Signal Select" line.long 0x184 "IMCR510,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x184 0.--3. 1. "SSS,Source Signal Select" line.long 0x188 "IMCR511,SIUL2 Input Multiplexed Signal Configuration" hexmask.long.byte 0x188 0.--3. 1. "SSS,Source Signal Select" group.byte 0x1300++0x7 line.byte 0x0 "GPDO3,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO2,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO1,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO0,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO7,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO6,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO5,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO4,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x1309++0x4 line.byte 0x0 "GPDO10,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO9,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO8,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO15,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO14,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x1310++0x7 line.byte 0x0 "GPDO19,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO18,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO17,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO16,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO23,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO22,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO21,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO20,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x1319++0xA line.byte 0x0 "GPDO26,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO25,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO24,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO31,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO30,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO29,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO28,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO35,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x8 "GPDO34,SIUL2 GPIO Pad Data Output" bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x9 "GPDO33,SIUL2 GPIO Pad Data Output" bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xA "GPDO32,SIUL2 GPIO Pad Data Output" bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x1326++0x15 line.byte 0x0 "GPDO37,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO36,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO43,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO42,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO41,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO40,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO47,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO46,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x8 "GPDO45,SIUL2 GPIO Pad Data Output" bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x9 "GPDO44,SIUL2 GPIO Pad Data Output" bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xA "GPDO51,SIUL2 GPIO Pad Data Output" bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xB "GPDO50,SIUL2 GPIO Pad Data Output" bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xC "GPDO49,SIUL2 GPIO Pad Data Output" bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xD "GPDO48,SIUL2 GPIO Pad Data Output" bitfld.byte 0xD 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xE "GPDO55,SIUL2 GPIO Pad Data Output" bitfld.byte 0xE 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xF "GPDO54,SIUL2 GPIO Pad Data Output" bitfld.byte 0xF 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x10 "GPDO53,SIUL2 GPIO Pad Data Output" bitfld.byte 0x10 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x11 "GPDO52,SIUL2 GPIO Pad Data Output" bitfld.byte 0x11 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x12 "GPDO59,SIUL2 GPIO Pad Data Output" bitfld.byte 0x12 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x13 "GPDO58,SIUL2 GPIO Pad Data Output" bitfld.byte 0x13 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x14 "GPDO57,SIUL2 GPIO Pad Data Output" bitfld.byte 0x14 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x15 "GPDO56,SIUL2 GPIO Pad Data Output" bitfld.byte 0x15 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x133E++0x16 line.byte 0x0 "GPDO61,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO60,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO67,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO66,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO65,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO64,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO71,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO70,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x8 "GPDO69,SIUL2 GPIO Pad Data Output" bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x9 "GPDO68,SIUL2 GPIO Pad Data Output" bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xA "GPDO75,SIUL2 GPIO Pad Data Output" bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xB "GPDO74,SIUL2 GPIO Pad Data Output" bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xC "GPDO73,SIUL2 GPIO Pad Data Output" bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xD "GPDO72,SIUL2 GPIO Pad Data Output" bitfld.byte 0xD 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xE "GPDO79,SIUL2 GPIO Pad Data Output" bitfld.byte 0xE 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xF "GPDO78,SIUL2 GPIO Pad Data Output" bitfld.byte 0xF 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x10 "GPDO77,SIUL2 GPIO Pad Data Output" bitfld.byte 0x10 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x11 "GPDO76,SIUL2 GPIO Pad Data Output" bitfld.byte 0x11 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x12 "GPDO83,SIUL2 GPIO Pad Data Output" bitfld.byte 0x12 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x13 "GPDO82,SIUL2 GPIO Pad Data Output" bitfld.byte 0x13 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x14 "GPDO81,SIUL2 GPIO Pad Data Output" bitfld.byte 0x14 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x15 "GPDO80,SIUL2 GPIO Pad Data Output" bitfld.byte 0x15 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x16 "GPDO87,SIUL2 GPIO Pad Data Output" bitfld.byte 0x16 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x1356++0x29 line.byte 0x0 "GPDO85,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO84,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO91,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO90,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO89,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO88,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO95,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO94,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x8 "GPDO93,SIUL2 GPIO Pad Data Output" bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x9 "GPDO92,SIUL2 GPIO Pad Data Output" bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xA "GPDO99,SIUL2 GPIO Pad Data Output" bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xB "GPDO98,SIUL2 GPIO Pad Data Output" bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xC "GPDO97,SIUL2 GPIO Pad Data Output" bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xD "GPDO96,SIUL2 GPIO Pad Data Output" bitfld.byte 0xD 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xE "GPDO103,SIUL2 GPIO Pad Data Output" bitfld.byte 0xE 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xF "GPDO102,SIUL2 GPIO Pad Data Output" bitfld.byte 0xF 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x10 "GPDO101,SIUL2 GPIO Pad Data Output" bitfld.byte 0x10 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x11 "GPDO100,SIUL2 GPIO Pad Data Output" bitfld.byte 0x11 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x12 "GPDO107,SIUL2 GPIO Pad Data Output" bitfld.byte 0x12 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x13 "GPDO106,SIUL2 GPIO Pad Data Output" bitfld.byte 0x13 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x14 "GPDO105,SIUL2 GPIO Pad Data Output" bitfld.byte 0x14 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x15 "GPDO104,SIUL2 GPIO Pad Data Output" bitfld.byte 0x15 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x16 "GPDO111,SIUL2 GPIO Pad Data Output" bitfld.byte 0x16 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x17 "GPDO110,SIUL2 GPIO Pad Data Output" bitfld.byte 0x17 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x18 "GPDO109,SIUL2 GPIO Pad Data Output" bitfld.byte 0x18 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x19 "GPDO108,SIUL2 GPIO Pad Data Output" bitfld.byte 0x19 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1A "GPDO115,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1A 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1B "GPDO114,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1B 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1C "GPDO113,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1C 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1D "GPDO112,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1D 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1E "GPDO119,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1E 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1F "GPDO118,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1F 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x20 "GPDO117,SIUL2 GPIO Pad Data Output" bitfld.byte 0x20 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x21 "GPDO116,SIUL2 GPIO Pad Data Output" bitfld.byte 0x21 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x22 "GPDO123,SIUL2 GPIO Pad Data Output" bitfld.byte 0x22 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x23 "GPDO122,SIUL2 GPIO Pad Data Output" bitfld.byte 0x23 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x24 "GPDO121,SIUL2 GPIO Pad Data Output" bitfld.byte 0x24 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x25 "GPDO120,SIUL2 GPIO Pad Data Output" bitfld.byte 0x25 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x26 "GPDO127,SIUL2 GPIO Pad Data Output" bitfld.byte 0x26 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x27 "GPDO126,SIUL2 GPIO Pad Data Output" bitfld.byte 0x27 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x28 "GPDO125,SIUL2 GPIO Pad Data Output" bitfld.byte 0x28 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x29 "GPDO124,SIUL2 GPIO Pad Data Output" bitfld.byte 0x29 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x1381++0xC line.byte 0x0 "GPDO130,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO129,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO128,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO135,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO134,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO133,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO132,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO139,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x8 "GPDO138,SIUL2 GPIO Pad Data Output" bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x9 "GPDO137,SIUL2 GPIO Pad Data Output" bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xA "GPDO136,SIUL2 GPIO Pad Data Output" bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xB "GPDO143,SIUL2 GPIO Pad Data Output" bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xC "GPDO142,SIUL2 GPIO Pad Data Output" bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x138F++0x5 line.byte 0x0 "GPDO140,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO147,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO146,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO145,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO144,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO151,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x1396++0x3 line.byte 0x0 "GPDO149,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO148,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO155,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO154,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x139C++0x18 line.byte 0x0 "GPDO159,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO158,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO157,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO156,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO163,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO162,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO161,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO160,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x8 "GPDO167,SIUL2 GPIO Pad Data Output" bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x9 "GPDO166,SIUL2 GPIO Pad Data Output" bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xA "GPDO165,SIUL2 GPIO Pad Data Output" bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xB "GPDO164,SIUL2 GPIO Pad Data Output" bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xC "GPDO171,SIUL2 GPIO Pad Data Output" bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xD "GPDO170,SIUL2 GPIO Pad Data Output" bitfld.byte 0xD 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xE "GPDO169,SIUL2 GPIO Pad Data Output" bitfld.byte 0xE 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xF "GPDO168,SIUL2 GPIO Pad Data Output" bitfld.byte 0xF 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x10 "GPDO175,SIUL2 GPIO Pad Data Output" bitfld.byte 0x10 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x11 "GPDO174,SIUL2 GPIO Pad Data Output" bitfld.byte 0x11 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x12 "GPDO173,SIUL2 GPIO Pad Data Output" bitfld.byte 0x12 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x13 "GPDO172,SIUL2 GPIO Pad Data Output" bitfld.byte 0x13 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x14 "GPDO179,SIUL2 GPIO Pad Data Output" bitfld.byte 0x14 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x15 "GPDO178,SIUL2 GPIO Pad Data Output" bitfld.byte 0x15 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x16 "GPDO177,SIUL2 GPIO Pad Data Output" bitfld.byte 0x16 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x17 "GPDO176,SIUL2 GPIO Pad Data Output" bitfld.byte 0x17 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x18 "GPDO183,SIUL2 GPIO Pad Data Output" bitfld.byte 0x18 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x13B6++0x25 line.byte 0x0 "GPDO181,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO180,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO187,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO186,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x4 "GPDO185,SIUL2 GPIO Pad Data Output" bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x5 "GPDO184,SIUL2 GPIO Pad Data Output" bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x6 "GPDO191,SIUL2 GPIO Pad Data Output" bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x7 "GPDO190,SIUL2 GPIO Pad Data Output" bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x8 "GPDO189,SIUL2 GPIO Pad Data Output" bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x9 "GPDO188,SIUL2 GPIO Pad Data Output" bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xA "GPDO195,SIUL2 GPIO Pad Data Output" bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xB "GPDO194,SIUL2 GPIO Pad Data Output" bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xC "GPDO193,SIUL2 GPIO Pad Data Output" bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xD "GPDO192,SIUL2 GPIO Pad Data Output" bitfld.byte 0xD 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xE "GPDO199,SIUL2 GPIO Pad Data Output" bitfld.byte 0xE 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0xF "GPDO198,SIUL2 GPIO Pad Data Output" bitfld.byte 0xF 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x10 "GPDO197,SIUL2 GPIO Pad Data Output" bitfld.byte 0x10 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x11 "GPDO196,SIUL2 GPIO Pad Data Output" bitfld.byte 0x11 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x12 "GPDO203,SIUL2 GPIO Pad Data Output" bitfld.byte 0x12 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x13 "GPDO202,SIUL2 GPIO Pad Data Output" bitfld.byte 0x13 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x14 "GPDO201,SIUL2 GPIO Pad Data Output" bitfld.byte 0x14 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x15 "GPDO200,SIUL2 GPIO Pad Data Output" bitfld.byte 0x15 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x16 "GPDO207,SIUL2 GPIO Pad Data Output" bitfld.byte 0x16 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x17 "GPDO206,SIUL2 GPIO Pad Data Output" bitfld.byte 0x17 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x18 "GPDO205,SIUL2 GPIO Pad Data Output" bitfld.byte 0x18 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x19 "GPDO204,SIUL2 GPIO Pad Data Output" bitfld.byte 0x19 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1A "GPDO211,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1A 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1B "GPDO210,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1B 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1C "GPDO209,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1C 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1D "GPDO208,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1D 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1E "GPDO215,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1E 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1F "GPDO214,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1F 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x20 "GPDO213,SIUL2 GPIO Pad Data Output" bitfld.byte 0x20 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x21 "GPDO212,SIUL2 GPIO Pad Data Output" bitfld.byte 0x21 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x22 "GPDO219,SIUL2 GPIO Pad Data Output" bitfld.byte 0x22 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x23 "GPDO218,SIUL2 GPIO Pad Data Output" bitfld.byte 0x23 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x24 "GPDO217,SIUL2 GPIO Pad Data Output" bitfld.byte 0x24 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x25 "GPDO216,SIUL2 GPIO Pad Data Output" bitfld.byte 0x25 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x13E4++0x0 line.byte 0x0 "GPDO231,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x13E8++0x3 line.byte 0x0 "GPDO235,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x1 "GPDO234,SIUL2 GPIO Pad Data Output" bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x2 "GPDO233,SIUL2 GPIO Pad Data Output" bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" line.byte 0x3 "GPDO232,SIUL2 GPIO Pad Data Output" bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" group.byte 0x13EF++0x0 line.byte 0x0 "GPDO236,SIUL2 GPIO Pad Data Output" bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High" rgroup.byte 0x1500++0x7 line.byte 0x0 "GPDI3,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI2,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI1,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI0,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI7,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI6,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI5,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI4,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x1509++0x4 line.byte 0x0 "GPDI10,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI9,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI8,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI15,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI14,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x1510++0x7 line.byte 0x0 "GPDI19,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI18,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI17,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI16,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI23,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI22,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI21,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI20,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x1519++0xA line.byte 0x0 "GPDI26,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI25,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI24,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI31,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI30,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI29,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI28,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI35,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x8 "GPDI34,SIUL2 GPIO Pad Data Input" bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x9 "GPDI33,SIUL2 GPIO Pad Data Input" bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xA "GPDI32,SIUL2 GPIO Pad Data Input" bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x1526++0x15 line.byte 0x0 "GPDI37,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI36,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI43,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI42,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI41,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI40,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI47,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI46,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x8 "GPDI45,SIUL2 GPIO Pad Data Input" bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x9 "GPDI44,SIUL2 GPIO Pad Data Input" bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xA "GPDI51,SIUL2 GPIO Pad Data Input" bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xB "GPDI50,SIUL2 GPIO Pad Data Input" bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xC "GPDI49,SIUL2 GPIO Pad Data Input" bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xD "GPDI48,SIUL2 GPIO Pad Data Input" bitfld.byte 0xD 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xE "GPDI55,SIUL2 GPIO Pad Data Input" bitfld.byte 0xE 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xF "GPDI54,SIUL2 GPIO Pad Data Input" bitfld.byte 0xF 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x10 "GPDI53,SIUL2 GPIO Pad Data Input" bitfld.byte 0x10 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x11 "GPDI52,SIUL2 GPIO Pad Data Input" bitfld.byte 0x11 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x12 "GPDI59,SIUL2 GPIO Pad Data Input" bitfld.byte 0x12 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x13 "GPDI58,SIUL2 GPIO Pad Data Input" bitfld.byte 0x13 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x14 "GPDI57,SIUL2 GPIO Pad Data Input" bitfld.byte 0x14 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x15 "GPDI56,SIUL2 GPIO Pad Data Input" bitfld.byte 0x15 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x153E++0x16 line.byte 0x0 "GPDI61,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI60,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI67,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI66,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI65,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI64,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI71,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI70,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x8 "GPDI69,SIUL2 GPIO Pad Data Input" bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x9 "GPDI68,SIUL2 GPIO Pad Data Input" bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xA "GPDI75,SIUL2 GPIO Pad Data Input" bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xB "GPDI74,SIUL2 GPIO Pad Data Input" bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xC "GPDI73,SIUL2 GPIO Pad Data Input" bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xD "GPDI72,SIUL2 GPIO Pad Data Input" bitfld.byte 0xD 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xE "GPDI79,SIUL2 GPIO Pad Data Input" bitfld.byte 0xE 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xF "GPDI78,SIUL2 GPIO Pad Data Input" bitfld.byte 0xF 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x10 "GPDI77,SIUL2 GPIO Pad Data Input" bitfld.byte 0x10 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x11 "GPDI76,SIUL2 GPIO Pad Data Input" bitfld.byte 0x11 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x12 "GPDI83,SIUL2 GPIO Pad Data Input" bitfld.byte 0x12 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x13 "GPDI82,SIUL2 GPIO Pad Data Input" bitfld.byte 0x13 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x14 "GPDI81,SIUL2 GPIO Pad Data Input" bitfld.byte 0x14 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x15 "GPDI80,SIUL2 GPIO Pad Data Input" bitfld.byte 0x15 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x16 "GPDI87,SIUL2 GPIO Pad Data Input" bitfld.byte 0x16 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x1556++0x29 line.byte 0x0 "GPDI85,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI84,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI91,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI90,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI89,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI88,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI95,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI94,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x8 "GPDI93,SIUL2 GPIO Pad Data Input" bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x9 "GPDI92,SIUL2 GPIO Pad Data Input" bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xA "GPDI99,SIUL2 GPIO Pad Data Input" bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xB "GPDI98,SIUL2 GPIO Pad Data Input" bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xC "GPDI97,SIUL2 GPIO Pad Data Input" bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xD "GPDI96,SIUL2 GPIO Pad Data Input" bitfld.byte 0xD 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xE "GPDI103,SIUL2 GPIO Pad Data Input" bitfld.byte 0xE 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xF "GPDI102,SIUL2 GPIO Pad Data Input" bitfld.byte 0xF 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x10 "GPDI101,SIUL2 GPIO Pad Data Input" bitfld.byte 0x10 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x11 "GPDI100,SIUL2 GPIO Pad Data Input" bitfld.byte 0x11 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x12 "GPDI107,SIUL2 GPIO Pad Data Input" bitfld.byte 0x12 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x13 "GPDI106,SIUL2 GPIO Pad Data Input" bitfld.byte 0x13 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x14 "GPDI105,SIUL2 GPIO Pad Data Input" bitfld.byte 0x14 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x15 "GPDI104,SIUL2 GPIO Pad Data Input" bitfld.byte 0x15 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x16 "GPDI111,SIUL2 GPIO Pad Data Input" bitfld.byte 0x16 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x17 "GPDI110,SIUL2 GPIO Pad Data Input" bitfld.byte 0x17 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x18 "GPDI109,SIUL2 GPIO Pad Data Input" bitfld.byte 0x18 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x19 "GPDI108,SIUL2 GPIO Pad Data Input" bitfld.byte 0x19 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1A "GPDI115,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1A 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1B "GPDI114,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1B 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1C "GPDI113,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1C 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1D "GPDI112,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1D 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1E "GPDI119,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1E 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1F "GPDI118,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1F 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x20 "GPDI117,SIUL2 GPIO Pad Data Input" bitfld.byte 0x20 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x21 "GPDI116,SIUL2 GPIO Pad Data Input" bitfld.byte 0x21 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x22 "GPDI123,SIUL2 GPIO Pad Data Input" bitfld.byte 0x22 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x23 "GPDI122,SIUL2 GPIO Pad Data Input" bitfld.byte 0x23 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x24 "GPDI121,SIUL2 GPIO Pad Data Input" bitfld.byte 0x24 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x25 "GPDI120,SIUL2 GPIO Pad Data Input" bitfld.byte 0x25 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x26 "GPDI127,SIUL2 GPIO Pad Data Input" bitfld.byte 0x26 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x27 "GPDI126,SIUL2 GPIO Pad Data Input" bitfld.byte 0x27 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x28 "GPDI125,SIUL2 GPIO Pad Data Input" bitfld.byte 0x28 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x29 "GPDI124,SIUL2 GPIO Pad Data Input" bitfld.byte 0x29 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x1581++0xC line.byte 0x0 "GPDI130,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI129,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI128,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI135,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI134,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI133,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI132,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI139,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x8 "GPDI138,SIUL2 GPIO Pad Data Input" bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x9 "GPDI137,SIUL2 GPIO Pad Data Input" bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xA "GPDI136,SIUL2 GPIO Pad Data Input" bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xB "GPDI143,SIUL2 GPIO Pad Data Input" bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xC "GPDI142,SIUL2 GPIO Pad Data Input" bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x158F++0x5 line.byte 0x0 "GPDI140,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI147,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI146,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI145,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI144,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI151,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x1596++0x3 line.byte 0x0 "GPDI149,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI148,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI155,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI154,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x159C++0x18 line.byte 0x0 "GPDI159,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI158,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI157,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI156,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI163,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI162,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI161,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI160,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x8 "GPDI167,SIUL2 GPIO Pad Data Input" bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x9 "GPDI166,SIUL2 GPIO Pad Data Input" bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xA "GPDI165,SIUL2 GPIO Pad Data Input" bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xB "GPDI164,SIUL2 GPIO Pad Data Input" bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xC "GPDI171,SIUL2 GPIO Pad Data Input" bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xD "GPDI170,SIUL2 GPIO Pad Data Input" bitfld.byte 0xD 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xE "GPDI169,SIUL2 GPIO Pad Data Input" bitfld.byte 0xE 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xF "GPDI168,SIUL2 GPIO Pad Data Input" bitfld.byte 0xF 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x10 "GPDI175,SIUL2 GPIO Pad Data Input" bitfld.byte 0x10 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x11 "GPDI174,SIUL2 GPIO Pad Data Input" bitfld.byte 0x11 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x12 "GPDI173,SIUL2 GPIO Pad Data Input" bitfld.byte 0x12 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x13 "GPDI172,SIUL2 GPIO Pad Data Input" bitfld.byte 0x13 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x14 "GPDI179,SIUL2 GPIO Pad Data Input" bitfld.byte 0x14 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x15 "GPDI178,SIUL2 GPIO Pad Data Input" bitfld.byte 0x15 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x16 "GPDI177,SIUL2 GPIO Pad Data Input" bitfld.byte 0x16 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x17 "GPDI176,SIUL2 GPIO Pad Data Input" bitfld.byte 0x17 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x18 "GPDI183,SIUL2 GPIO Pad Data Input" bitfld.byte 0x18 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x15B6++0x25 line.byte 0x0 "GPDI181,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI180,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI187,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI186,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x4 "GPDI185,SIUL2 GPIO Pad Data Input" bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x5 "GPDI184,SIUL2 GPIO Pad Data Input" bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x6 "GPDI191,SIUL2 GPIO Pad Data Input" bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x7 "GPDI190,SIUL2 GPIO Pad Data Input" bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x8 "GPDI189,SIUL2 GPIO Pad Data Input" bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x9 "GPDI188,SIUL2 GPIO Pad Data Input" bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xA "GPDI195,SIUL2 GPIO Pad Data Input" bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xB "GPDI194,SIUL2 GPIO Pad Data Input" bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xC "GPDI193,SIUL2 GPIO Pad Data Input" bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xD "GPDI192,SIUL2 GPIO Pad Data Input" bitfld.byte 0xD 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xE "GPDI199,SIUL2 GPIO Pad Data Input" bitfld.byte 0xE 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0xF "GPDI198,SIUL2 GPIO Pad Data Input" bitfld.byte 0xF 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x10 "GPDI197,SIUL2 GPIO Pad Data Input" bitfld.byte 0x10 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x11 "GPDI196,SIUL2 GPIO Pad Data Input" bitfld.byte 0x11 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x12 "GPDI203,SIUL2 GPIO Pad Data Input" bitfld.byte 0x12 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x13 "GPDI202,SIUL2 GPIO Pad Data Input" bitfld.byte 0x13 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x14 "GPDI201,SIUL2 GPIO Pad Data Input" bitfld.byte 0x14 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x15 "GPDI200,SIUL2 GPIO Pad Data Input" bitfld.byte 0x15 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x16 "GPDI207,SIUL2 GPIO Pad Data Input" bitfld.byte 0x16 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x17 "GPDI206,SIUL2 GPIO Pad Data Input" bitfld.byte 0x17 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x18 "GPDI205,SIUL2 GPIO Pad Data Input" bitfld.byte 0x18 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x19 "GPDI204,SIUL2 GPIO Pad Data Input" bitfld.byte 0x19 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1A "GPDI211,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1A 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1B "GPDI210,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1B 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1C "GPDI209,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1C 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1D "GPDI208,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1D 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1E "GPDI215,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1E 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1F "GPDI214,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1F 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x20 "GPDI213,SIUL2 GPIO Pad Data Input" bitfld.byte 0x20 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x21 "GPDI212,SIUL2 GPIO Pad Data Input" bitfld.byte 0x21 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x22 "GPDI219,SIUL2 GPIO Pad Data Input" bitfld.byte 0x22 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x23 "GPDI218,SIUL2 GPIO Pad Data Input" bitfld.byte 0x23 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x24 "GPDI217,SIUL2 GPIO Pad Data Input" bitfld.byte 0x24 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x25 "GPDI216,SIUL2 GPIO Pad Data Input" bitfld.byte 0x25 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x15E4++0x0 line.byte 0x0 "GPDI231,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x15E8++0x3 line.byte 0x0 "GPDI235,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x1 "GPDI234,SIUL2 GPIO Pad Data Input" bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x2 "GPDI233,SIUL2 GPIO Pad Data Input" bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" line.byte 0x3 "GPDI232,SIUL2 GPIO Pad Data Input" bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" rgroup.byte 0x15EF++0x0 line.byte 0x0 "GPDI236,SIUL2 GPIO Pad Data Input" bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High" group.word 0x1700++0x1B line.word 0x0 "PGPDO1,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x0 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x0 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x0 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x0 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x0 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x0 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x0 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0x0 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x0 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x0 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x0 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x0 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x0 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0x0 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x0 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0x2 "PGPDO0,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x2 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x2 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x2 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x2 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x2 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x2 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x2 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0x2 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x2 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x2 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x2 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x2 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x2 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0x4 "PGPDO3,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x4 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x4 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x4 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x4 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x4 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x4 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x4 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0x4 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x4 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x4 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x4 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x4 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x4 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x4 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" line.word 0x6 "PGPDO2,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x6 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x6 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x6 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x6 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x6 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x6 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x6 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x6 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x6 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x6 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x6 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x6 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0x6 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x6 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0x8 "PGPDO5,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x8 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x8 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x8 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x8 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x8 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x8 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x8 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x8 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x8 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x8 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x8 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x8 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x8 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0x8 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x8 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0xA "PGPDO4,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0xA 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0xA 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0xA 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0xA 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0xA 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0xA 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0xA 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0xA 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0xA 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0xA 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0xA 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0xA 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0xA 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0xA 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0xA 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0xA 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0xC "PGPDO7,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0xC 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0xC 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0xC 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0xC 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0xC 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0xC 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0xC 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0xC 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0xC 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0xC 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0xC 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0xC 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0xC 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0xC 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0xC 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0xC 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0xE "PGPDO6,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0xE 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0xE 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0xE 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0xE 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0xE 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0xE 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0xE 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0xE 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0xE 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0xE 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0xE 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0xE 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0xE 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0xE 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0xE 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0xE 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0x10 "PGPDO9,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x10 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x10 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x10 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x10 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x10 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x10 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x10 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x10 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x10 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x10 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x10 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0x10 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x10 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0x12 "PGPDO8,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x12 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x12 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x12 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x12 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x12 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x12 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0x12 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x12 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x12 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x12 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x12 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x12 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x12 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x12 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0x14 "PGPDO11,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x14 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x14 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x14 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x14 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x14 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x14 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x14 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x14 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x14 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x14 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x14 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x14 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x14 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0x14 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x14 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0x16 "PGPDO10,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x16 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x16 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x16 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x16 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x16 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x16 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x16 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0x16 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x16 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x16 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x16 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x16 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x16 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x16 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0x16 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x16 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" line.word 0x18 "PGPDO13,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x18 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x18 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x18 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x18 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x18 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x18 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x18 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0x18 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x18 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x18 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x18 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x18 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" line.word 0x1A "PGPDO12,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x1A 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high" group.word 0x171E++0x1 line.word 0x0 "PGPDO14,SIUL2 Parallel GPIO Pad Data Out" bitfld.word 0x0 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high" newline bitfld.word 0x0 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high" newline bitfld.word 0x0 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high" newline bitfld.word 0x0 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high" newline bitfld.word 0x0 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high" newline bitfld.word 0x0 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high" rgroup.word 0x1740++0x1B line.word 0x0 "PGPDI1,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x0 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x0 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x0 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x0 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x0 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x0 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x0 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0x0 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x0 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x0 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x0 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x0 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x0 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0x0 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x0 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0x2 "PGPDI0,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x2 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x2 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x2 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x2 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x2 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x2 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x2 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0x2 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x2 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x2 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x2 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x2 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x2 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0x4 "PGPDI3,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x4 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x4 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x4 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x4 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x4 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x4 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x4 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0x4 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x4 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x4 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x4 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x4 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x4 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x4 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" line.word 0x6 "PGPDI2,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x6 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x6 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x6 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x6 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x6 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x6 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x6 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x6 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x6 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x6 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x6 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x6 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0x6 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x6 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0x8 "PGPDI5,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x8 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x8 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x8 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x8 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x8 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x8 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x8 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x8 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x8 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x8 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x8 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x8 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x8 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0x8 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x8 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0xA "PGPDI4,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0xA 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0xA 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0xA 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0xA 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0xA 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0xA 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0xA 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0xA 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0xA 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0xA 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0xA 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0xA 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0xA 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0xA 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0xA 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0xA 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0xC "PGPDI7,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0xC 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0xC 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0xC 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0xC 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0xC 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0xC 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0xC 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0xC 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0xC 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0xC 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0xC 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0xC 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0xC 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0xC 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0xC 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0xC 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0xE "PGPDI6,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0xE 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0xE 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0xE 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0xE 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0xE 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0xE 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0xE 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0xE 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0xE 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0xE 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0xE 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0xE 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0xE 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0xE 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0xE 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0xE 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0x10 "PGPDI9,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x10 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x10 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x10 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x10 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x10 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x10 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x10 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x10 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x10 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x10 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x10 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0x10 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x10 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0x12 "PGPDI8,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x12 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x12 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x12 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x12 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x12 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x12 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0x12 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x12 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x12 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x12 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x12 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x12 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x12 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x12 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0x14 "PGPDI11,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x14 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x14 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x14 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x14 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x14 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x14 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x14 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x14 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x14 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x14 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x14 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x14 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x14 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0x14 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x14 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0x16 "PGPDI10,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x16 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x16 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x16 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x16 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x16 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x16 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x16 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0x16 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x16 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x16 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x16 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x16 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x16 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x16 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0x16 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x16 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" line.word 0x18 "PGPDI13,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x18 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x18 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x18 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x18 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x18 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x18 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x18 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0x18 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x18 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x18 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x18 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x18 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" line.word 0x1A "PGPDI12,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x1A 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high" newline bitfld.word 0x1A 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high" rgroup.word 0x175E++0x1 line.word 0x0 "PGPDI14,SIUL2 Parallel GPIO Pad Data In" bitfld.word 0x0 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high" newline bitfld.word 0x0 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high" newline bitfld.word 0x0 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high" newline bitfld.word 0x0 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high" newline bitfld.word 0x0 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high" newline bitfld.word 0x0 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high" group.long 0x1780++0x3B line.long 0x0 "MPGPDO0,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x0 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x0 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x0 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x0 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x0 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x0 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x0 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x0 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x0 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x0 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x0 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x0 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x0 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x0 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x0 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x0 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x0 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x0 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x0 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x0 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x0 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x0 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x0 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x0 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x0 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x0 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x4 "MPGPDO1,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x4 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x4 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x4 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x4 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x4 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x4 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x4 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x4 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x4 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x4 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x4 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x4 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x4 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x4 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x4 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x4 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x4 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x4 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x4 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x4 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x4 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x4 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x4 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x4 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x4 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x4 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x4 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x4 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x4 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x4 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x8 "MPGPDO2,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x8 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x8 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x8 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x8 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x8 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x8 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x8 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x8 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x8 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x8 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x8 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x8 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x8 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x8 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x8 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x8 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x8 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x8 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x8 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x8 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x8 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x8 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x8 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x8 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x8 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x8 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x8 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x8 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0xC "MPGPDO3,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0xC 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0xC 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0xC 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0xC 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0xC 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0xC 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0xC 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0xC 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0xC 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0xC 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0xC 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0xC 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0xC 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0xC 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0xC 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0xC 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0xC 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0xC 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0xC 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0xC 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0xC 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0xC 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0xC 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0xC 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0xC 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0xC 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0xC 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0xC 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" line.long 0x10 "MPGPDO4,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x10 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x10 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x10 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x10 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x10 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x10 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x10 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x10 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x10 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x10 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x10 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x10 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x10 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x10 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x10 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x10 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x10 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x10 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x10 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x10 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x10 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x10 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x10 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x10 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x10 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x10 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x10 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x10 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x10 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x10 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x10 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x10 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x14 "MPGPDO5,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x14 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x14 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x14 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x14 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x14 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x14 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x14 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x14 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x14 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x14 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x14 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x14 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x14 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x14 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x14 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x14 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x14 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x14 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x14 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x14 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x14 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x14 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x14 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x14 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x14 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x14 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x14 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x14 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x14 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x14 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x18 "MPGPDO6,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x18 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x18 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x18 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x18 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x18 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x18 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x18 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x18 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x18 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x18 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x18 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x18 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x18 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x18 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x18 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x18 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x18 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x18 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x18 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x18 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x18 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x18 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x18 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x18 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x18 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x18 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x18 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x18 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x18 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x18 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x18 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x18 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x1C "MPGPDO7,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x1C 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x1C 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x1C 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x1C 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x1C 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x1C 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x1C 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x1C 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x1C 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x1C 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x1C 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x1C 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x1C 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x1C 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x1C 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x1C 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x1C 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x1C 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x1C 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x1C 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x1C 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x1C 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x1C 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x1C 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x1C 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x1C 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x1C 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x1C 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x1C 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x1C 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x1C 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x1C 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x20 "MPGPDO8,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x20 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x20 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x20 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x20 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x20 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x20 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x20 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x20 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x20 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x20 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x20 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x20 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x20 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x20 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x20 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x20 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x20 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x20 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x20 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x20 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x20 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x20 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x20 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x20 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x20 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x20 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x20 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x20 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x24 "MPGPDO9,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x24 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x24 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x24 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x24 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x24 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x24 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x24 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x24 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x24 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x24 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x24 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x24 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x24 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x24 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x24 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x24 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x24 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x24 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x24 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x24 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x24 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x24 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x24 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x24 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x24 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x24 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x28 "MPGPDO10,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x28 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x28 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x28 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x28 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x28 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x28 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x28 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x28 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x28 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x28 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x28 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x28 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x28 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x28 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x28 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x28 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x28 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x28 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x28 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x28 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x28 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x28 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x28 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x28 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x28 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x28 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x28 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x28 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x28 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x28 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x28 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x28 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x2C "MPGPDO11,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x2C 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x2C 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x2C 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x2C 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x2C 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x2C 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x2C 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x2C 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x2C 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x2C 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x2C 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x2C 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x2C 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x2C 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x2C 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x2C 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x2C 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x2C 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x2C 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x2C 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x2C 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x2C 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x2C 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x2C 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x2C 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x2C 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x2C 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x2C 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x2C 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x2C 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x30 "MPGPDO12,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x30 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x30 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x30 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x30 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x30 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x30 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x30 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x30 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x30 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x30 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x30 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x30 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x30 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x30 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written" newline bitfld.long 0x30 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written" newline bitfld.long 0x30 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written" newline bitfld.long 0x30 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x30 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x30 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x30 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x30 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x30 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x30 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x30 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x30 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x30 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x30 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x30 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x30 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" newline bitfld.long 0x30 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1" newline bitfld.long 0x30 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1" newline bitfld.long 0x30 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1" line.long 0x34 "MPGPDO13,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x34 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written" newline bitfld.long 0x34 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written" newline bitfld.long 0x34 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written" newline bitfld.long 0x34 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written" newline bitfld.long 0x34 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written" newline bitfld.long 0x34 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written" newline bitfld.long 0x34 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written" newline bitfld.long 0x34 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x34 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x34 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x34 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x34 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x34 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1" newline bitfld.long 0x34 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1" newline bitfld.long 0x34 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1" newline bitfld.long 0x34 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1" newline bitfld.long 0x34 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1" newline bitfld.long 0x34 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1" newline bitfld.long 0x34 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1" newline bitfld.long 0x34 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x34 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x34 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x34 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x34 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" line.long 0x38 "MPGPDO14,SIUL2 Masked Parallel GPIO Pad Data Out" bitfld.long 0x38 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written" newline bitfld.long 0x38 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written" newline bitfld.long 0x38 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written" newline bitfld.long 0x38 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written" newline bitfld.long 0x38 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written" newline bitfld.long 0x38 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written" newline bitfld.long 0x38 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1" newline bitfld.long 0x38 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1" newline bitfld.long 0x38 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1" newline bitfld.long 0x38 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1" newline bitfld.long 0x38 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1" newline bitfld.long 0x38 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1" tree.end tree "STCU (Self-Test Control Unit)" base ad:0x403A0000 group.long 0x4++0x3 line.long 0x0 "RUNSW,STCU2 Run Software" bitfld.long 0x0 9. "MBSWPLLEN,Online MBIST with PLL Enabled" "0: Online MBIST is executed without using the..,1: Online MBIST is executed using the PLL.." bitfld.long 0x0 8. "LBSWPLLEN,Online LBIST with PLL Enabled" "0: Online LBIST is executed without using the..,1: Online LBIST is executed using the PLL.." newline bitfld.long 0x0 0. "RUNSW,The RUNSW bit is automatically cleared by STCU2 when the online self-testing procedure is complete." "0: Idle,1: Online self-testing procedure is running" wgroup.long 0x8++0x3 line.long 0x0 "SKC,STCU2 SK Code" hexmask.long 0x0 0.--31. 1. "SKC,STCU2 SK Code" group.long 0xC++0x3 line.long 0x0 "CFG,STCU2 Configuration" hexmask.long.word 0x0 21.--30. 1. "PTR,First LBIST or MBIST pointer PTR defines the logical pointer to the first LBIST or MBIST to be scheduled when the self-testing procedure is enabled" hexmask.long.byte 0x0 13.--20. 1. "LB_DELAY,Delay LBIST run LB_DELAY defines the delay between the LBIST starts when more than a single LBIST is selected to be executed concurrently with the purpose of smoothing the power consumption transient" newline bitfld.long 0x0 8. "WRP,Write Protection 0: Specific STCU2 registers can be written through IPS bus interface 1: STCU2 registers cannot be written through IPS preventing any user application write operation" "0: Specific STCU2 registers can be written through..,1: STCU2 registers cannot be written through IPS" bitfld.long 0x0 0.--2. "CLK_CFG,Logic Memory BIST and STCU2 CORE_CLK configuration CLK_CFG defines the ratio between the sys_clk and the internal clock used to program both the LBIST and the MBIST and the STCU2 CORE_CLK" "0: sys_clk/1,1: sys_clk/2,2: sys_clk/3,3: sys_clk/4,4: sys_clk/5,5: sys_clk/6,6: sys_clk/7,7: sys_clk/8" group.long 0x14++0x3 line.long 0x0 "WDG,STCU2 Watchdog Granularity" hexmask.long 0x0 0.--31. 1. "WDGEOC,Watchdog End of Count Timer This value has to be set to define the time budget related to the online self-test execution and check that everything is correctly working within this slot of time" group.long 0x24++0x7 line.long 0x0 "ERR_STAT,STCU2 Error" rbitfld.long 0x0 20. "LOCKESW,Online LOCK error You can always read this field" "0: In case PLL is enabled it is correctly locked..,1: When the PLL is enabled this flag highlights.." rbitfld.long 0x0 19. "WDTOSW,Online watchdog timeout You can always read this field" "0: LBIST and MBIST time slots completed within the..,1: LBIST and MBIST time slots not completed within.." newline rbitfld.long 0x0 17. "ENGESW,Online engine error You can always read this field" "0: Valid engine execution,1: Invalid engine execution. The error conditions.." rbitfld.long 0x0 16. "INVPSW,Online invalid pointer You can always read this field" "0: Valid linked pointer list,1: Invalid linked pointer list. The following.." newline bitfld.long 0x0 9. "UFSF,Unrecoverable Faults Status Flag This flag reports the global status of the Unrecoverable Faults(UF)" "0: No errors that trigger the UF condition.,1: There are errors that trigger the UF condition." bitfld.long 0x0 8. "RFSF,Recoverable Faults Status Flag This flag reports the global status of the Recoverable Fault (RF)" "0: No errors that trigger the Recoverable Faults..,1: There are errors that trigger the Recoverable.." line.long 0x4 "ERR_FM,STCU2 Error FM" bitfld.long 0x4 4. "LOCKEUFM,PLL LOCK Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping" bitfld.long 0x4 3. "WDTOUFM,Watchdog Timeout Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping" newline bitfld.long 0x4 1. "ENGEUFM,Engine Error Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping" bitfld.long 0x4 0. "INVPUFM,Invalid Pointer Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Mapping" rgroup.long 0x4C++0x3 line.long 0x0 "LBSSW0,STCU2 Online LBIST Status" bitfld.long 0x0 0. "LBSSW0,LBSSW0" "0: Failed LBIST execution,1: Successful LBIST execution" rgroup.long 0x5C++0x3 line.long 0x0 "LBESW0,STCU2 Online LBIST End Flag" bitfld.long 0x0 0. "LBESW0,LBESW" "0: LBIST execution not yet completed,1: LBIST execution finished" group.long 0x6C++0x3 line.long 0x0 "LBRMSW0,STCU2 Online LBIST Reset Management" bitfld.long 0x0 0. "LBRMSW0,LBRMSW" "0: Dedicated functional reset is pulsed at the end..,1: Global functional reset is pulsed at the end of.." group.long 0x7C++0x3 line.long 0x0 "LBUFM0,STCU2 Online LBIST Unrecoverable FM" bitfld.long 0x0 0. "LBUFM0,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping" rgroup.long 0x10C++0x3 line.long 0x0 "MBSSW0,STCU2 Online MBIST Status" bitfld.long 0x0 11. "MBSSW11,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" bitfld.long 0x0 10. "MBSSW10,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" newline bitfld.long 0x0 9. "MBSSW9,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" bitfld.long 0x0 8. "MBSSW8,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" newline bitfld.long 0x0 7. "MBSSW7,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" bitfld.long 0x0 6. "MBSSW6,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" newline bitfld.long 0x0 5. "MBSSW5,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" bitfld.long 0x0 4. "MBSSW4,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" newline bitfld.long 0x0 3. "MBSSW3,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" bitfld.long 0x0 2. "MBSSW2,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" newline bitfld.long 0x0 1. "MBSSW1,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" bitfld.long 0x0 0. "MBSSW0,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution" rgroup.long 0x14C++0x3 line.long 0x0 "MBESW0,STCU2 Online MBIST End Flag" bitfld.long 0x0 11. "MBESW11,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" bitfld.long 0x0 10. "MBESW10,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" newline bitfld.long 0x0 9. "MBESW9,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" bitfld.long 0x0 8. "MBESW8,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" newline bitfld.long 0x0 7. "MBESW7,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" bitfld.long 0x0 6. "MBESW6,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" newline bitfld.long 0x0 5. "MBESW5,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" bitfld.long 0x0 4. "MBESW4,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" newline bitfld.long 0x0 3. "MBESW3,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" bitfld.long 0x0 2. "MBESW2,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" newline bitfld.long 0x0 1. "MBESW1,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" bitfld.long 0x0 0. "MBESW0,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished" group.long 0x18C++0x3 line.long 0x0 "MBUFM0,STCU2 MBIST Unrecoverable FM" bitfld.long 0x0 11. "MBUFM11,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" bitfld.long 0x0 10. "MBUFM10,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" newline bitfld.long 0x0 9. "MBUFM9,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" bitfld.long 0x0 8. "MBUFM8,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" newline bitfld.long 0x0 7. "MBUFM7,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" bitfld.long 0x0 6. "MBUFM6,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" newline bitfld.long 0x0 5. "MBUFM5,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" bitfld.long 0x0 4. "MBUFM4,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" newline bitfld.long 0x0 3. "MBUFM3,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" bitfld.long 0x0 2. "MBUFM2,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" newline bitfld.long 0x0 1. "MBUFM1,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" bitfld.long 0x0 0. "MBUFM0,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping" group.long 0x200++0x7 line.long 0x0 "LB_CTRL0,STCU2 LBIST Control" bitfld.long 0x0 31. "CSM,Concurrent/sequential mode The next LBIST is scheduled concurrently to the current one if the CSM bit is set to 1; otherwise it is scheduled sequentially to the completion of the current LBIST execution" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x0 21.--30. 1. "PTR,Next LBIST or MBIST pointer PTR defines the logical pointer to the next LBIST or MBIST to be scheduled" newline bitfld.long 0x0 16.--18. "SHS,Shift speed SHS defines the shift speed" "0: Shift at full rate (BIST clock).,1: Shift at 1/2 rate (BIST clock).,2: Shift at 1/3 rate (BIST clock).,3: Shift at 1/4 rate (BIST clock).,4: Shift at 1/5 rate (BIST clock).,5: Shift at 1/6 rate (BIST clock).,6: Shift at 1/7 rate (BIST clock).,7: Shift at 1/8 rate (BIST clock)." hexmask.long.byte 0x0 12.--15. 1. "SCEN_OFF,Scan enable OFF SCEN_OFF information is used to configure the lbist controller hardware to generate off_cycles delay cycles during the scan enable off transition" newline hexmask.long.byte 0x0 8.--11. 1. "SCEN_ON,Scan enable ON SCEN_ON information is used to configure the lbist controller hardware to generate on_cycles delay cycles during the scan enable on transition SCEN_ON delay register value must be programmed to a value >=1" hexmask.long.byte 0x0 0.--5. 1. "CWS,Capture window size CWS defines the capture window size." line.long 0x4 "LB_PCS0,STCU2 LBIST PC Stop" hexmask.long 0x4 0.--25. 1. "PCS,PCS" group.long 0x220++0x7 line.long 0x0 "LB_MISRELSW0,STCU2 Online LBIST MISR Expected Low" hexmask.long 0x0 0.--31. 1. "MISRESWx,Online MISR expected low bits This field defines 32 bits of the expected MISR." line.long 0x4 "LB_MISREHSW0,STCU2 Online LBIST MISR Expected High" hexmask.long 0x4 0.--31. 1. "MISRESWx,Online MISR Expected High Bits This field defines the 32 bits of the expected MISR." rgroup.long 0x228++0x7 line.long 0x0 "LB_MISRRLSW0,STCU2 Online LBIST MISR Read Low" hexmask.long 0x0 0.--31. 1. "MISRRSWx,MISRRSWx" line.long 0x4 "LB_MISRRHSW0,STCU2 Online LBIST MISR Read High" hexmask.long 0x4 0.--31. 1. "MISRRSWx,MISRRSWx" group.long 0x2200++0x3 line.long 0x0 "ALGOSEL,STCU2 Algorithm Select" bitfld.long 0x0 31. "ALGOSEL31,Algorithm Select" "0,1" bitfld.long 0x0 30. "ALGOSEL30,Algorithm Select" "0,1" newline bitfld.long 0x0 29. "ALGOSEL29,Algorithm Select" "0,1" bitfld.long 0x0 28. "ALGOSEL28,Algorithm Select" "0,1" newline bitfld.long 0x0 27. "ALGOSEL27,Algorithm Select" "0,1" bitfld.long 0x0 26. "ALGOSEL26,Algorithm Select" "0,1" newline bitfld.long 0x0 25. "ALGOSEL25,Algorithm Select" "0,1" bitfld.long 0x0 24. "ALGOSEL24,Algorithm Select" "0,1" newline bitfld.long 0x0 23. "ALGOSEL23,Algorithm Select" "0,1" bitfld.long 0x0 22. "ALGOSEL22,Algorithm Select" "0,1" newline bitfld.long 0x0 21. "ALGOSEL21,Algorithm Select" "0,1" bitfld.long 0x0 20. "ALGOSEL20,Algorithm Select" "0,1" newline bitfld.long 0x0 19. "ALGOSEL19,Algorithm Select" "0,1" bitfld.long 0x0 18. "ALGOSEL18,Algorithm Select" "0,1" newline bitfld.long 0x0 17. "ALGOSEL17,Algorithm Select" "0,1" bitfld.long 0x0 16. "ALGOSEL16,Algorithm Select" "0,1" newline bitfld.long 0x0 15. "ALGOSEL15,Algorithm Select" "0,1" bitfld.long 0x0 14. "ALGOSEL14,Algorithm Select" "0,1" newline bitfld.long 0x0 13. "ALGOSEL13,Algorithm Select" "0,1" bitfld.long 0x0 12. "ALGOSEL12,Algorithm Select" "0,1" newline bitfld.long 0x0 11. "ALGOSEL11,Algorithm Select" "0,1" bitfld.long 0x0 10. "ALGOSEL10,Algorithm Select" "0,1" newline bitfld.long 0x0 9. "ALGOSEL9,Algorithm Select" "0,1" bitfld.long 0x0 8. "ALGOSEL8,Algorithm Select" "0,1" newline bitfld.long 0x0 7. "ALGOSEL7,Algorithm Select" "0,1" bitfld.long 0x0 6. "ALGOSEL6,Algorithm Select" "0,1" newline bitfld.long 0x0 5. "ALGOSEL5,Algorithm Select" "0,1" bitfld.long 0x0 4. "ALGOSEL4,Algorithm Select" "0,1" newline bitfld.long 0x0 3. "ALGOSEL3,Algorithm Select" "0,1" bitfld.long 0x0 2. "ALGOSEL2,Algorithm Select" "0,1" newline bitfld.long 0x0 1. "ALGOSEL1,Algorithm Select" "0,1" bitfld.long 0x0 0. "ALGOSEL0,Algorithm Select" "0,1" group.long 0x220C++0x37 line.long 0x0 "STGGR,STCU2 MBIST Stagger" hexmask.long 0x0 0.--31. 1. "STAG,STAG" line.long 0x4 "BSTART,STCU2 BIST Start" bitfld.long 0x4 31. "BSTART31,BIST Start" "0,1" bitfld.long 0x4 30. "BSTART30,BIST Start" "0,1" newline bitfld.long 0x4 29. "BSTART29,BIST Start" "0,1" bitfld.long 0x4 28. "BSTART28,BIST Start" "0,1" newline bitfld.long 0x4 27. "BSTART27,BIST Start" "0,1" bitfld.long 0x4 26. "BSTART26,BIST Start" "0,1" newline bitfld.long 0x4 25. "BSTART25,BIST Start" "0,1" bitfld.long 0x4 24. "BSTART24,BIST Start" "0,1" newline bitfld.long 0x4 23. "BSTART23,BIST Start" "0,1" bitfld.long 0x4 22. "BSTART22,BIST Start" "0,1" newline bitfld.long 0x4 21. "BSTART21,BIST Start" "0,1" bitfld.long 0x4 20. "BSTART20,BIST Start" "0,1" newline bitfld.long 0x4 19. "BSTART19,BIST Start" "0,1" bitfld.long 0x4 18. "BSTART18,BIST Start" "0,1" newline bitfld.long 0x4 17. "BSTART17,BIST Start" "0,1" bitfld.long 0x4 16. "BSTART16,BIST Start" "0,1" newline bitfld.long 0x4 15. "BSTART15,BIST Start" "0,1" bitfld.long 0x4 14. "BSTART14,BIST Start" "0,1" newline bitfld.long 0x4 13. "BSTART13,BIST Start" "0,1" bitfld.long 0x4 12. "BSTART12,BIST Start" "0,1" newline bitfld.long 0x4 11. "BSTART11,BIST Start" "0,1" bitfld.long 0x4 10. "BSTART10,BIST Start" "0,1" newline bitfld.long 0x4 9. "BSTART9,BIST Start" "0,1" bitfld.long 0x4 8. "BSTART8,BIST Start" "0,1" newline bitfld.long 0x4 7. "BSTART7,BIST Start" "0,1" bitfld.long 0x4 6. "BSTART6,BIST Start" "0,1" newline bitfld.long 0x4 5. "BSTART5,BIST Start" "0,1" bitfld.long 0x4 4. "BSTART4,BIST Start" "0,1" newline bitfld.long 0x4 3. "BSTART3,BIST Start" "0,1" bitfld.long 0x4 2. "BSTART2,BIST Start" "0,1" newline bitfld.long 0x4 1. "BSTART1,BIST Start" "0,1" bitfld.long 0x4 0. "BSTART0,BIST Start" "0,1" line.long 0x8 "MB_CTRL0,STCU2 MBIST Control" bitfld.long 0x8 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x8 21.--30. 1. "PTR,PTR" newline bitfld.long 0x8 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0xC "MB_CTRL1,STCU2 MBIST Control" bitfld.long 0xC 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0xC 21.--30. 1. "PTR,PTR" newline bitfld.long 0xC 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x10 "MB_CTRL2,STCU2 MBIST Control" bitfld.long 0x10 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x10 21.--30. 1. "PTR,PTR" newline bitfld.long 0x10 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x14 "MB_CTRL3,STCU2 MBIST Control" bitfld.long 0x14 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x14 21.--30. 1. "PTR,PTR" newline bitfld.long 0x14 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x18 "MB_CTRL4,STCU2 MBIST Control" bitfld.long 0x18 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x18 21.--30. 1. "PTR,PTR" newline bitfld.long 0x18 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x1C "MB_CTRL5,STCU2 MBIST Control" bitfld.long 0x1C 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x1C 21.--30. 1. "PTR,PTR" newline bitfld.long 0x1C 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x20 "MB_CTRL6,STCU2 MBIST Control" bitfld.long 0x20 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x20 21.--30. 1. "PTR,PTR" newline bitfld.long 0x20 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x24 "MB_CTRL7,STCU2 MBIST Control" bitfld.long 0x24 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x24 21.--30. 1. "PTR,PTR" newline bitfld.long 0x24 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x28 "MB_CTRL8,STCU2 MBIST Control" bitfld.long 0x28 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x28 21.--30. 1. "PTR,PTR" newline bitfld.long 0x28 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x2C "MB_CTRL9,STCU2 MBIST Control" bitfld.long 0x2C 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x2C 21.--30. 1. "PTR,PTR" newline bitfld.long 0x2C 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x30 "MB_CTRL10,STCU2 MBIST Control" bitfld.long 0x30 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x30 21.--30. 1. "PTR,PTR" newline bitfld.long 0x30 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." line.long 0x34 "MB_CTRL11,STCU2 MBIST Control" bitfld.long 0x34 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode" hexmask.long.word 0x34 21.--30. 1. "PTR,PTR" newline bitfld.long 0x34 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution." tree.end tree "STM (System Timer Module)" base ad:0x0 tree "STM_0" base ad:0x40274000 group.long 0x0++0x7 line.long 0x0 "CR,Control" hexmask.long.byte 0x0 8.--15. 1. "CPS,Counter Prescaler" bitfld.long 0x0 1. "FRZ,Freeze" "0: Timer runs in Debug mode,1: Timer stops in Debug mode" bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disabled,1: Enabled" line.long 0x4 "CNT,Count" hexmask.long 0x4 0.--31. 1. "CNT,Timer Count" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40274010 ad:0x40274020 ad:0x40274030 ad:0x40274040) tree "CHANNEL[$1]" base $2 group.long ($2)++0xB line.long 0x0 "CCR,Channel Control" bitfld.long 0x0 0. "CEN,Channel Enable" "0: Disabled,1: Enabled" line.long 0x4 "CIR,Channel Interrupt" eventfld.long 0x4 0. "CIF,Channel Interrupt Flag" "0: Read: IRQ is not asserted. Write: No effect.,1: Read: IRQ is asserted. Write: Clear the flag." line.long 0x8 "CMP,Channel Compare" hexmask.long 0x8 0.--31. 1. "CMP,Channel Compare" tree.end repeat.end tree.end tree "STM_1" base ad:0x40474000 group.long 0x0++0x7 line.long 0x0 "CR,Control" hexmask.long.byte 0x0 8.--15. 1. "CPS,Counter Prescaler" bitfld.long 0x0 1. "FRZ,Freeze" "0: Timer runs in Debug mode,1: Timer stops in Debug mode" bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disabled,1: Enabled" line.long 0x4 "CNT,Count" hexmask.long 0x4 0.--31. 1. "CNT,Timer Count" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40474010 ad:0x40474020 ad:0x40474030 ad:0x40474040) tree "CHANNEL[$1]" base $2 group.long ($2)++0xB line.long 0x0 "CCR,Channel Control" bitfld.long 0x0 0. "CEN,Channel Enable" "0: Disabled,1: Enabled" line.long 0x4 "CIR,Channel Interrupt" eventfld.long 0x4 0. "CIF,Channel Interrupt Flag" "0: Read: IRQ is not asserted. Write: No effect.,1: Read: IRQ is asserted. Write: Clear the flag." line.long 0x8 "CMP,Channel Compare" hexmask.long 0x8 0.--31. 1. "CMP,Channel Compare" tree.end repeat.end tree.end tree "STM_2" base ad:0x40478000 group.long 0x0++0x7 line.long 0x0 "CR,Control" hexmask.long.byte 0x0 8.--15. 1. "CPS,Counter Prescaler" bitfld.long 0x0 1. "FRZ,Freeze" "0: Timer runs in Debug mode,1: Timer stops in Debug mode" bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disabled,1: Enabled" line.long 0x4 "CNT,Count" hexmask.long 0x4 0.--31. 1. "CNT,Timer Count" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40478010 ad:0x40478020 ad:0x40478030 ad:0x40478040) tree "CHANNEL[$1]" base $2 group.long ($2)++0xB line.long 0x0 "CCR,Channel Control" bitfld.long 0x0 0. "CEN,Channel Enable" "0: Disabled,1: Enabled" line.long 0x4 "CIR,Channel Interrupt" eventfld.long 0x4 0. "CIF,Channel Interrupt Flag" "0: Read: IRQ is not asserted. Write: No effect.,1: Read: IRQ is asserted. Write: Clear the flag." line.long 0x8 "CMP,Channel Compare" hexmask.long 0x8 0.--31. 1. "CMP,Channel Compare" tree.end repeat.end tree.end tree.end tree "SWT (Software Watchdog Timer)" base ad:0x0 tree "SWT_0" base ad:0x40270000 group.long 0x0++0x13 line.long 0x0 "CR,Control" bitfld.long 0x0 31. "MAP0,Master Access Protection 0" "0: Access disabled,1: Access enabled" bitfld.long 0x0 30. "MAP1,Master Access Protection 1" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 29. "MAP2,Master Access Protection 2" "0: Access disabled,1: Access enabled" bitfld.long 0x0 28. "MAP3,Master Access Protection 3" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 27. "MAP4,Master Access Protection 4" "0: Access disabled,1: Access enabled" bitfld.long 0x0 26. "MAP5,Master Access Protection 5" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 25. "MAP6,Master Access Protection 6" "0: Access disabled,1: Access enabled" bitfld.long 0x0 24. "MAP7,Master Access Protection 7" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence,1: Keyed Service Sequence,?,?" bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Generate a bus error,1: Generate a bus error and reset request" newline bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode,1: Window mode" bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a timeout,1: Generate an interrupt on an initial timeout;.." newline bitfld.long 0x0 5. "HLK,Hard Lock" "0: CR TO WN and SK are read/write registers if SLK..,1: CR TO WN and SK are read-only registers" bitfld.long 0x0 4. "SLK,Soft Lock" "0: CR TO WN and SK are read/write registers if HLK..,1: CR TO WN and SK are read-only registers" newline bitfld.long 0x0 2. "STP,Stop Mode Control" "0: Timer continues,1: Timer stops" bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: Timer continues,1: Timer stops" newline bitfld.long 0x0 0. "WEN,Watchdog Enable" "0: Disabled,1: Enabled" line.long 0x4 "IR,Interrupt" eventfld.long 0x4 0. "TIF,Timeout Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial timeout" line.long 0x8 "TO,Timeout" hexmask.long 0x8 0.--31. 1. "WTO,Watchdog Timeout" line.long 0xC "WN,Window" hexmask.long 0xC 0.--31. 1. "WST,Window Start Value" line.long 0x10 "SR,Service" hexmask.long.word 0x10 0.--15. 1. "WSC,Watchdog Service Code" rgroup.long 0x14++0x3 line.long 0x0 "CO,Counter Output" hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count" group.long 0x18++0x7 line.long 0x0 "SK,Service Key" hexmask.long.word 0x0 0.--15. 1. "SK,Service Key" line.long 0x4 "RRR,Event Request" eventfld.long 0x4 0. "RRF,Reset Request Flag" "0: No reset request,1: Any reset request initiated" tree.end tree "SWT_1" base ad:0x4046C000 group.long 0x0++0x13 line.long 0x0 "CR,Control" bitfld.long 0x0 31. "MAP0,Master Access Protection 0" "0: Access disabled,1: Access enabled" bitfld.long 0x0 30. "MAP1,Master Access Protection 1" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 29. "MAP2,Master Access Protection 2" "0: Access disabled,1: Access enabled" bitfld.long 0x0 28. "MAP3,Master Access Protection 3" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 27. "MAP4,Master Access Protection 4" "0: Access disabled,1: Access enabled" bitfld.long 0x0 26. "MAP5,Master Access Protection 5" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 25. "MAP6,Master Access Protection 6" "0: Access disabled,1: Access enabled" bitfld.long 0x0 24. "MAP7,Master Access Protection 7" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence,1: Keyed Service Sequence,?,?" bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Generate a bus error,1: Generate a bus error and reset request" newline bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode,1: Window mode" bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a timeout,1: Generate an interrupt on an initial timeout;.." newline bitfld.long 0x0 5. "HLK,Hard Lock" "0: CR TO WN and SK are read/write registers if SLK..,1: CR TO WN and SK are read-only registers" bitfld.long 0x0 4. "SLK,Soft Lock" "0: CR TO WN and SK are read/write registers if HLK..,1: CR TO WN and SK are read-only registers" newline bitfld.long 0x0 2. "STP,Stop Mode Control" "0: Timer continues,1: Timer stops" bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: Timer continues,1: Timer stops" newline bitfld.long 0x0 0. "WEN,Watchdog Enable" "0: Disabled,1: Enabled" line.long 0x4 "IR,Interrupt" eventfld.long 0x4 0. "TIF,Timeout Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial timeout" line.long 0x8 "TO,Timeout" hexmask.long 0x8 0.--31. 1. "WTO,Watchdog Timeout" line.long 0xC "WN,Window" hexmask.long 0xC 0.--31. 1. "WST,Window Start Value" line.long 0x10 "SR,Service" hexmask.long.word 0x10 0.--15. 1. "WSC,Watchdog Service Code" rgroup.long 0x14++0x3 line.long 0x0 "CO,Counter Output" hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count" group.long 0x18++0x7 line.long 0x0 "SK,Service Key" hexmask.long.word 0x0 0.--15. 1. "SK,Service Key" line.long 0x4 "RRR,Event Request" eventfld.long 0x4 0. "RRF,Reset Request Flag" "0: No reset request,1: Any reset request initiated" tree.end tree "SWT_2" base ad:0x40470000 group.long 0x0++0x13 line.long 0x0 "CR,Control" bitfld.long 0x0 31. "MAP0,Master Access Protection 0" "0: Access disabled,1: Access enabled" bitfld.long 0x0 30. "MAP1,Master Access Protection 1" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 29. "MAP2,Master Access Protection 2" "0: Access disabled,1: Access enabled" bitfld.long 0x0 28. "MAP3,Master Access Protection 3" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 27. "MAP4,Master Access Protection 4" "0: Access disabled,1: Access enabled" bitfld.long 0x0 26. "MAP5,Master Access Protection 5" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 25. "MAP6,Master Access Protection 6" "0: Access disabled,1: Access enabled" bitfld.long 0x0 24. "MAP7,Master Access Protection 7" "0: Access disabled,1: Access enabled" newline bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence,1: Keyed Service Sequence,?,?" bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Generate a bus error,1: Generate a bus error and reset request" newline bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode,1: Window mode" bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a timeout,1: Generate an interrupt on an initial timeout;.." newline bitfld.long 0x0 5. "HLK,Hard Lock" "0: CR TO WN and SK are read/write registers if SLK..,1: CR TO WN and SK are read-only registers" bitfld.long 0x0 4. "SLK,Soft Lock" "0: CR TO WN and SK are read/write registers if HLK..,1: CR TO WN and SK are read-only registers" newline bitfld.long 0x0 2. "STP,Stop Mode Control" "0: Timer continues,1: Timer stops" bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: Timer continues,1: Timer stops" newline bitfld.long 0x0 0. "WEN,Watchdog Enable" "0: Disabled,1: Enabled" line.long 0x4 "IR,Interrupt" eventfld.long 0x4 0. "TIF,Timeout Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial timeout" line.long 0x8 "TO,Timeout" hexmask.long 0x8 0.--31. 1. "WTO,Watchdog Timeout" line.long 0xC "WN,Window" hexmask.long 0xC 0.--31. 1. "WST,Window Start Value" line.long 0x10 "SR,Service" hexmask.long.word 0x10 0.--15. 1. "WSC,Watchdog Service Code" rgroup.long 0x14++0x3 line.long 0x0 "CO,Counter Output" hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count" group.long 0x18++0x7 line.long 0x0 "SK,Service Key" hexmask.long.word 0x0 0.--15. 1. "SK,Service Key" line.long 0x4 "RRR,Event Request" eventfld.long 0x4 0. "RRF,Reset Request Flag" "0: No reset request,1: Any reset request initiated" tree.end tree.end tree "TCD (Transfer Control Descriptor)" base ad:0x0 tree "TCD_0" base ad:0x40210000 group.long 0x0++0x13 line.long 0x0 "CH0_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH0_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH0_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH0_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH0_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x20++0x3 line.long 0x0 "TCD0_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x24++0x3 line.word 0x0 "TCD0_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD0_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x28++0x3 line.long 0x0 "TCD0_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x28++0xB line.long 0x0 "TCD0_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD0_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD0_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x34++0x3 line.word 0x0 "TCD0_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD0_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x36++0x1 line.word 0x0 "TCD0_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x38++0x3 line.long 0x0 "TCD0_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x3C++0x3 line.word 0x0 "TCD0_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD0_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x3E++0x1 line.word 0x0 "TCD0_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x4000++0x13 line.long 0x0 "CH1_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH1_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH1_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH1_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH1_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x4020++0x3 line.long 0x0 "TCD1_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x4024++0x3 line.word 0x0 "TCD1_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD1_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x4028++0x3 line.long 0x0 "TCD1_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x4028++0xB line.long 0x0 "TCD1_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD1_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD1_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x4034++0x3 line.word 0x0 "TCD1_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD1_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x4036++0x1 line.word 0x0 "TCD1_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x4038++0x3 line.long 0x0 "TCD1_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x403C++0x3 line.word 0x0 "TCD1_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD1_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x403E++0x1 line.word 0x0 "TCD1_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x8000++0x13 line.long 0x0 "CH2_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH2_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH2_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH2_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH2_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x8020++0x3 line.long 0x0 "TCD2_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x8024++0x3 line.word 0x0 "TCD2_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD2_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x8028++0x3 line.long 0x0 "TCD2_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x8028++0xB line.long 0x0 "TCD2_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD2_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD2_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x8034++0x3 line.word 0x0 "TCD2_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD2_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x8036++0x1 line.word 0x0 "TCD2_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x8038++0x3 line.long 0x0 "TCD2_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x803C++0x3 line.word 0x0 "TCD2_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD2_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x803E++0x1 line.word 0x0 "TCD2_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0xC000++0x13 line.long 0x0 "CH3_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH3_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH3_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH3_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH3_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0xC020++0x3 line.long 0x0 "TCD3_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0xC024++0x3 line.word 0x0 "TCD3_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD3_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0xC028++0x3 line.long 0x0 "TCD3_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0xC028++0xB line.long 0x0 "TCD3_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD3_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD3_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0xC034++0x3 line.word 0x0 "TCD3_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD3_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0xC036++0x1 line.word 0x0 "TCD3_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0xC038++0x3 line.long 0x0 "TCD3_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0xC03C++0x3 line.word 0x0 "TCD3_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD3_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0xC03E++0x1 line.word 0x0 "TCD3_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x10000++0x13 line.long 0x0 "CH4_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH4_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH4_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH4_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH4_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x10020++0x3 line.long 0x0 "TCD4_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10024++0x3 line.word 0x0 "TCD4_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD4_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x10028++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x10028++0xB line.long 0x0 "TCD4_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD4_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD4_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10034++0x3 line.word 0x0 "TCD4_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD4_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x10036++0x1 line.word 0x0 "TCD4_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x10038++0x3 line.long 0x0 "TCD4_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x1003C++0x3 line.word 0x0 "TCD4_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD4_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x1003E++0x1 line.word 0x0 "TCD4_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x14000++0x13 line.long 0x0 "CH5_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH5_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH5_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH5_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH5_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x14020++0x3 line.long 0x0 "TCD5_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x14024++0x3 line.word 0x0 "TCD5_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD5_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x14028++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x14028++0xB line.long 0x0 "TCD5_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD5_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD5_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x14034++0x3 line.word 0x0 "TCD5_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD5_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x14036++0x1 line.word 0x0 "TCD5_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x14038++0x3 line.long 0x0 "TCD5_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x1403C++0x3 line.word 0x0 "TCD5_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD5_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x1403E++0x1 line.word 0x0 "TCD5_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x18000++0x13 line.long 0x0 "CH6_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH6_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH6_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH6_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH6_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x18020++0x3 line.long 0x0 "TCD6_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x18024++0x3 line.word 0x0 "TCD6_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD6_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x18028++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x18028++0xB line.long 0x0 "TCD6_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD6_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD6_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x18034++0x3 line.word 0x0 "TCD6_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD6_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x18036++0x1 line.word 0x0 "TCD6_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x18038++0x3 line.long 0x0 "TCD6_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x1803C++0x3 line.word 0x0 "TCD6_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD6_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x1803E++0x1 line.word 0x0 "TCD6_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x1C000++0x13 line.long 0x0 "CH7_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH7_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH7_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH7_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH7_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x1C020++0x3 line.long 0x0 "TCD7_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1C024++0x3 line.word 0x0 "TCD7_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD7_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x1C028++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x1C028++0xB line.long 0x0 "TCD7_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD7_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD7_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1C034++0x3 line.word 0x0 "TCD7_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD7_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x1C036++0x1 line.word 0x0 "TCD7_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x1C038++0x3 line.long 0x0 "TCD7_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x1C03C++0x3 line.word 0x0 "TCD7_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD7_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x1C03E++0x1 line.word 0x0 "TCD7_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x20000++0x13 line.long 0x0 "CH8_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH8_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH8_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH8_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH8_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x20020++0x3 line.long 0x0 "TCD8_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x20024++0x3 line.word 0x0 "TCD8_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD8_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x20028++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x20028++0xB line.long 0x0 "TCD8_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD8_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD8_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x20034++0x3 line.word 0x0 "TCD8_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD8_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x20036++0x1 line.word 0x0 "TCD8_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x20038++0x3 line.long 0x0 "TCD8_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x2003C++0x3 line.word 0x0 "TCD8_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD8_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x2003E++0x1 line.word 0x0 "TCD8_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x24000++0x13 line.long 0x0 "CH9_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH9_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH9_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH9_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH9_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x24020++0x3 line.long 0x0 "TCD9_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x24024++0x3 line.word 0x0 "TCD9_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD9_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x24028++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x24028++0xB line.long 0x0 "TCD9_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD9_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD9_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x24034++0x3 line.word 0x0 "TCD9_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD9_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x24036++0x1 line.word 0x0 "TCD9_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x24038++0x3 line.long 0x0 "TCD9_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x2403C++0x3 line.word 0x0 "TCD9_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD9_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x2403E++0x1 line.word 0x0 "TCD9_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x28000++0x13 line.long 0x0 "CH10_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH10_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH10_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH10_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH10_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x28020++0x3 line.long 0x0 "TCD10_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x28024++0x3 line.word 0x0 "TCD10_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD10_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x28028++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x28028++0xB line.long 0x0 "TCD10_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD10_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD10_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x28034++0x3 line.word 0x0 "TCD10_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD10_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x28036++0x1 line.word 0x0 "TCD10_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x28038++0x3 line.long 0x0 "TCD10_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x2803C++0x3 line.word 0x0 "TCD10_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD10_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x2803E++0x1 line.word 0x0 "TCD10_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x2C000++0x13 line.long 0x0 "CH11_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH11_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH11_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH11_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH11_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x2C020++0x3 line.long 0x0 "TCD11_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x2C024++0x3 line.word 0x0 "TCD11_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD11_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x2C028++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x2C028++0xB line.long 0x0 "TCD11_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD11_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD11_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x2C034++0x3 line.word 0x0 "TCD11_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD11_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x2C036++0x1 line.word 0x0 "TCD11_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x2C038++0x3 line.long 0x0 "TCD11_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x2C03C++0x3 line.word 0x0 "TCD11_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD11_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x2C03E++0x1 line.word 0x0 "TCD11_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x200000++0x13 line.long 0x0 "CH12_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH12_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH12_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH12_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH12_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x200020++0x3 line.long 0x0 "TCD12_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x200024++0x3 line.word 0x0 "TCD12_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD12_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x200028++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x200028++0xB line.long 0x0 "TCD12_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD12_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD12_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x200034++0x3 line.word 0x0 "TCD12_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD12_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x200036++0x1 line.word 0x0 "TCD12_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x200038++0x3 line.long 0x0 "TCD12_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x20003C++0x3 line.word 0x0 "TCD12_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD12_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x20003E++0x1 line.word 0x0 "TCD12_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x204000++0x13 line.long 0x0 "CH13_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH13_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH13_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH13_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH13_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x204020++0x3 line.long 0x0 "TCD13_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x204024++0x3 line.word 0x0 "TCD13_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD13_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x204028++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x204028++0xB line.long 0x0 "TCD13_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD13_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD13_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x204034++0x3 line.word 0x0 "TCD13_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD13_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x204036++0x1 line.word 0x0 "TCD13_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x204038++0x3 line.long 0x0 "TCD13_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x20403C++0x3 line.word 0x0 "TCD13_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD13_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x20403E++0x1 line.word 0x0 "TCD13_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x208000++0x13 line.long 0x0 "CH14_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH14_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH14_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH14_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH14_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x208020++0x3 line.long 0x0 "TCD14_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x208024++0x3 line.word 0x0 "TCD14_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD14_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x208028++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x208028++0xB line.long 0x0 "TCD14_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD14_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD14_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x208034++0x3 line.word 0x0 "TCD14_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD14_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x208036++0x1 line.word 0x0 "TCD14_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x208038++0x3 line.long 0x0 "TCD14_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x20803C++0x3 line.word 0x0 "TCD14_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD14_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x20803E++0x1 line.word 0x0 "TCD14_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x20C000++0x13 line.long 0x0 "CH15_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH15_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH15_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH15_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH15_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x20C020++0x3 line.long 0x0 "TCD15_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x20C024++0x3 line.word 0x0 "TCD15_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD15_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x20C028++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x20C028++0xB line.long 0x0 "TCD15_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD15_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD15_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x20C034++0x3 line.word 0x0 "TCD15_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD15_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x20C036++0x1 line.word 0x0 "TCD15_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x20C038++0x3 line.long 0x0 "TCD15_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x20C03C++0x3 line.word 0x0 "TCD15_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD15_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x20C03E++0x1 line.word 0x0 "TCD15_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x210000++0x13 line.long 0x0 "CH16_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH16_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH16_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH16_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH16_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x210020++0x3 line.long 0x0 "TCD16_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x210024++0x3 line.word 0x0 "TCD16_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD16_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x210028++0x3 line.long 0x0 "TCD16_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x210028++0xB line.long 0x0 "TCD16_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD16_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD16_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x210034++0x3 line.word 0x0 "TCD16_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD16_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x210036++0x1 line.word 0x0 "TCD16_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x210038++0x3 line.long 0x0 "TCD16_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x21003C++0x3 line.word 0x0 "TCD16_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD16_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x21003E++0x1 line.word 0x0 "TCD16_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x214000++0x13 line.long 0x0 "CH17_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH17_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH17_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH17_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH17_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x214020++0x3 line.long 0x0 "TCD17_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x214024++0x3 line.word 0x0 "TCD17_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD17_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x214028++0x3 line.long 0x0 "TCD17_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x214028++0xB line.long 0x0 "TCD17_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD17_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD17_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x214034++0x3 line.word 0x0 "TCD17_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD17_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x214036++0x1 line.word 0x0 "TCD17_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x214038++0x3 line.long 0x0 "TCD17_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x21403C++0x3 line.word 0x0 "TCD17_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD17_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x21403E++0x1 line.word 0x0 "TCD17_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x218000++0x13 line.long 0x0 "CH18_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH18_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH18_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH18_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH18_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x218020++0x3 line.long 0x0 "TCD18_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x218024++0x3 line.word 0x0 "TCD18_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD18_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x218028++0x3 line.long 0x0 "TCD18_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x218028++0xB line.long 0x0 "TCD18_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD18_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD18_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x218034++0x3 line.word 0x0 "TCD18_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD18_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x218036++0x1 line.word 0x0 "TCD18_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x218038++0x3 line.long 0x0 "TCD18_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x21803C++0x3 line.word 0x0 "TCD18_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD18_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x21803E++0x1 line.word 0x0 "TCD18_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x21C000++0x13 line.long 0x0 "CH19_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH19_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH19_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH19_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH19_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x21C020++0x3 line.long 0x0 "TCD19_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x21C024++0x3 line.word 0x0 "TCD19_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD19_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x21C028++0x3 line.long 0x0 "TCD19_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x21C028++0xB line.long 0x0 "TCD19_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD19_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD19_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x21C034++0x3 line.word 0x0 "TCD19_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD19_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x21C036++0x1 line.word 0x0 "TCD19_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x21C038++0x3 line.long 0x0 "TCD19_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x21C03C++0x3 line.word 0x0 "TCD19_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD19_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x21C03E++0x1 line.word 0x0 "TCD19_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x220000++0x13 line.long 0x0 "CH20_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH20_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH20_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH20_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH20_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x220020++0x3 line.long 0x0 "TCD20_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x220024++0x3 line.word 0x0 "TCD20_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD20_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x220028++0x3 line.long 0x0 "TCD20_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x220028++0xB line.long 0x0 "TCD20_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD20_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD20_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x220034++0x3 line.word 0x0 "TCD20_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD20_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x220036++0x1 line.word 0x0 "TCD20_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x220038++0x3 line.long 0x0 "TCD20_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x22003C++0x3 line.word 0x0 "TCD20_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD20_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x22003E++0x1 line.word 0x0 "TCD20_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x224000++0x13 line.long 0x0 "CH21_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH21_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH21_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH21_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH21_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x224020++0x3 line.long 0x0 "TCD21_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x224024++0x3 line.word 0x0 "TCD21_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD21_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x224028++0x3 line.long 0x0 "TCD21_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x224028++0xB line.long 0x0 "TCD21_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD21_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD21_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x224034++0x3 line.word 0x0 "TCD21_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD21_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x224036++0x1 line.word 0x0 "TCD21_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x224038++0x3 line.long 0x0 "TCD21_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x22403C++0x3 line.word 0x0 "TCD21_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD21_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x22403E++0x1 line.word 0x0 "TCD21_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x228000++0x13 line.long 0x0 "CH22_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH22_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH22_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH22_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH22_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x228020++0x3 line.long 0x0 "TCD22_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x228024++0x3 line.word 0x0 "TCD22_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD22_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x228028++0x3 line.long 0x0 "TCD22_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x228028++0xB line.long 0x0 "TCD22_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD22_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD22_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x228034++0x3 line.word 0x0 "TCD22_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD22_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x228036++0x1 line.word 0x0 "TCD22_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x228038++0x3 line.long 0x0 "TCD22_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x22803C++0x3 line.word 0x0 "TCD22_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD22_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x22803E++0x1 line.word 0x0 "TCD22_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x22C000++0x13 line.long 0x0 "CH23_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH23_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH23_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH23_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH23_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x22C020++0x3 line.long 0x0 "TCD23_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x22C024++0x3 line.word 0x0 "TCD23_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD23_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x22C028++0x3 line.long 0x0 "TCD23_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x22C028++0xB line.long 0x0 "TCD23_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD23_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD23_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x22C034++0x3 line.word 0x0 "TCD23_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD23_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x22C036++0x1 line.word 0x0 "TCD23_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x22C038++0x3 line.long 0x0 "TCD23_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x22C03C++0x3 line.word 0x0 "TCD23_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD23_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x22C03E++0x1 line.word 0x0 "TCD23_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x230000++0x13 line.long 0x0 "CH24_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH24_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH24_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH24_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH24_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x230020++0x3 line.long 0x0 "TCD24_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x230024++0x3 line.word 0x0 "TCD24_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD24_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x230028++0x3 line.long 0x0 "TCD24_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x230028++0xB line.long 0x0 "TCD24_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD24_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD24_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x230034++0x3 line.word 0x0 "TCD24_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD24_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x230036++0x1 line.word 0x0 "TCD24_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x230038++0x3 line.long 0x0 "TCD24_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x23003C++0x3 line.word 0x0 "TCD24_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD24_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x23003E++0x1 line.word 0x0 "TCD24_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x234000++0x13 line.long 0x0 "CH25_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH25_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH25_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH25_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH25_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x234020++0x3 line.long 0x0 "TCD25_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x234024++0x3 line.word 0x0 "TCD25_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD25_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x234028++0x3 line.long 0x0 "TCD25_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x234028++0xB line.long 0x0 "TCD25_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD25_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD25_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x234034++0x3 line.word 0x0 "TCD25_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD25_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x234036++0x1 line.word 0x0 "TCD25_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x234038++0x3 line.long 0x0 "TCD25_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x23403C++0x3 line.word 0x0 "TCD25_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD25_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x23403E++0x1 line.word 0x0 "TCD25_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x238000++0x13 line.long 0x0 "CH26_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH26_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH26_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH26_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH26_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x238020++0x3 line.long 0x0 "TCD26_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x238024++0x3 line.word 0x0 "TCD26_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD26_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x238028++0x3 line.long 0x0 "TCD26_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x238028++0xB line.long 0x0 "TCD26_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD26_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD26_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x238034++0x3 line.word 0x0 "TCD26_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD26_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x238036++0x1 line.word 0x0 "TCD26_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x238038++0x3 line.long 0x0 "TCD26_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x23803C++0x3 line.word 0x0 "TCD26_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD26_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x23803E++0x1 line.word 0x0 "TCD26_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x23C000++0x13 line.long 0x0 "CH27_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH27_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH27_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH27_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH27_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x23C020++0x3 line.long 0x0 "TCD27_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x23C024++0x3 line.word 0x0 "TCD27_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD27_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x23C028++0x3 line.long 0x0 "TCD27_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x23C028++0xB line.long 0x0 "TCD27_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD27_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD27_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x23C034++0x3 line.word 0x0 "TCD27_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD27_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x23C036++0x1 line.word 0x0 "TCD27_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x23C038++0x3 line.long 0x0 "TCD27_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x23C03C++0x3 line.word 0x0 "TCD27_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD27_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x23C03E++0x1 line.word 0x0 "TCD27_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x240000++0x13 line.long 0x0 "CH28_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH28_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH28_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH28_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH28_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x240020++0x3 line.long 0x0 "TCD28_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x240024++0x3 line.word 0x0 "TCD28_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD28_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x240028++0x3 line.long 0x0 "TCD28_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x240028++0xB line.long 0x0 "TCD28_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD28_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD28_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x240034++0x3 line.word 0x0 "TCD28_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD28_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x240036++0x1 line.word 0x0 "TCD28_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x240038++0x3 line.long 0x0 "TCD28_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x24003C++0x3 line.word 0x0 "TCD28_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD28_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x24003E++0x1 line.word 0x0 "TCD28_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x244000++0x13 line.long 0x0 "CH29_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH29_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH29_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH29_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH29_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x244020++0x3 line.long 0x0 "TCD29_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x244024++0x3 line.word 0x0 "TCD29_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD29_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x244028++0x3 line.long 0x0 "TCD29_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x244028++0xB line.long 0x0 "TCD29_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD29_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD29_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x244034++0x3 line.word 0x0 "TCD29_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD29_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x244036++0x1 line.word 0x0 "TCD29_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x244038++0x3 line.long 0x0 "TCD29_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x24403C++0x3 line.word 0x0 "TCD29_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD29_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x24403E++0x1 line.word 0x0 "TCD29_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x248000++0x13 line.long 0x0 "CH30_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH30_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH30_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH30_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH30_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x248020++0x3 line.long 0x0 "TCD30_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x248024++0x3 line.word 0x0 "TCD30_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD30_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x248028++0x3 line.long 0x0 "TCD30_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x248028++0xB line.long 0x0 "TCD30_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD30_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD30_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x248034++0x3 line.word 0x0 "TCD30_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD30_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x248036++0x1 line.word 0x0 "TCD30_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x248038++0x3 line.long 0x0 "TCD30_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x24803C++0x3 line.word 0x0 "TCD30_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD30_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x24803E++0x1 line.word 0x0 "TCD30_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x24C000++0x13 line.long 0x0 "CH31_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH31_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH31_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH31_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH31_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x24C020++0x3 line.long 0x0 "TCD31_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x24C024++0x3 line.word 0x0 "TCD31_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD31_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x24C028++0x3 line.long 0x0 "TCD31_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x24C028++0xB line.long 0x0 "TCD31_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD31_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD31_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x24C034++0x3 line.word 0x0 "TCD31_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD31_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x24C036++0x1 line.word 0x0 "TCD31_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x24C038++0x3 line.long 0x0 "TCD31_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x24C03C++0x3 line.word 0x0 "TCD31_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD31_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x24C03E++0x1 line.word 0x0 "TCD31_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" tree.end tree "TCD_1" base ad:0x40014000 group.long 0x0++0x13 line.long 0x0 "CH0_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH0_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH0_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH0_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH0_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x20++0x3 line.long 0x0 "TCD0_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x24++0x3 line.word 0x0 "TCD0_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD0_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x28++0x3 line.long 0x0 "TCD0_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x28++0xB line.long 0x0 "TCD0_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD0_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD0_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x34++0x3 line.word 0x0 "TCD0_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD0_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x36++0x1 line.word 0x0 "TCD0_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x38++0x3 line.long 0x0 "TCD0_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x3C++0x3 line.word 0x0 "TCD0_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD0_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x3E++0x1 line.word 0x0 "TCD0_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x4000++0x13 line.long 0x0 "CH1_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH1_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH1_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH1_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH1_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x4020++0x3 line.long 0x0 "TCD1_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x4024++0x3 line.word 0x0 "TCD1_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD1_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x4028++0x3 line.long 0x0 "TCD1_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x4028++0xB line.long 0x0 "TCD1_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD1_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD1_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x4034++0x3 line.word 0x0 "TCD1_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD1_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x4036++0x1 line.word 0x0 "TCD1_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x4038++0x3 line.long 0x0 "TCD1_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x403C++0x3 line.word 0x0 "TCD1_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD1_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x403E++0x1 line.word 0x0 "TCD1_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x8000++0x13 line.long 0x0 "CH2_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH2_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH2_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH2_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH2_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x8020++0x3 line.long 0x0 "TCD2_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x8024++0x3 line.word 0x0 "TCD2_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD2_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x8028++0x3 line.long 0x0 "TCD2_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x8028++0xB line.long 0x0 "TCD2_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD2_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD2_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x8034++0x3 line.word 0x0 "TCD2_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD2_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x8036++0x1 line.word 0x0 "TCD2_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x8038++0x3 line.long 0x0 "TCD2_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x803C++0x3 line.word 0x0 "TCD2_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD2_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x803E++0x1 line.word 0x0 "TCD2_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0xC000++0x13 line.long 0x0 "CH3_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH3_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH3_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH3_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH3_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0xC020++0x3 line.long 0x0 "TCD3_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0xC024++0x3 line.word 0x0 "TCD3_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD3_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0xC028++0x3 line.long 0x0 "TCD3_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0xC028++0xB line.long 0x0 "TCD3_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD3_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD3_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0xC034++0x3 line.word 0x0 "TCD3_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD3_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0xC036++0x1 line.word 0x0 "TCD3_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0xC038++0x3 line.long 0x0 "TCD3_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0xC03C++0x3 line.word 0x0 "TCD3_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD3_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0xC03E++0x1 line.word 0x0 "TCD3_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x10000++0x13 line.long 0x0 "CH4_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH4_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH4_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH4_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH4_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x10020++0x3 line.long 0x0 "TCD4_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10024++0x3 line.word 0x0 "TCD4_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD4_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x10028++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x10028++0xB line.long 0x0 "TCD4_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD4_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD4_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10034++0x3 line.word 0x0 "TCD4_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD4_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x10036++0x1 line.word 0x0 "TCD4_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x10038++0x3 line.long 0x0 "TCD4_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x1003C++0x3 line.word 0x0 "TCD4_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD4_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x1003E++0x1 line.word 0x0 "TCD4_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x14000++0x13 line.long 0x0 "CH5_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH5_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH5_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH5_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH5_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x14020++0x3 line.long 0x0 "TCD5_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x14024++0x3 line.word 0x0 "TCD5_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD5_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x14028++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x14028++0xB line.long 0x0 "TCD5_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD5_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD5_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x14034++0x3 line.word 0x0 "TCD5_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD5_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x14036++0x1 line.word 0x0 "TCD5_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x14038++0x3 line.long 0x0 "TCD5_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x1403C++0x3 line.word 0x0 "TCD5_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD5_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x1403E++0x1 line.word 0x0 "TCD5_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x18000++0x13 line.long 0x0 "CH6_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH6_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH6_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH6_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH6_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x18020++0x3 line.long 0x0 "TCD6_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x18024++0x3 line.word 0x0 "TCD6_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD6_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x18028++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x18028++0xB line.long 0x0 "TCD6_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD6_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD6_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x18034++0x3 line.word 0x0 "TCD6_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD6_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x18036++0x1 line.word 0x0 "TCD6_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x18038++0x3 line.long 0x0 "TCD6_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x1803C++0x3 line.word 0x0 "TCD6_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD6_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x1803E++0x1 line.word 0x0 "TCD6_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x1C000++0x13 line.long 0x0 "CH7_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH7_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH7_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH7_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH7_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x1C020++0x3 line.long 0x0 "TCD7_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1C024++0x3 line.word 0x0 "TCD7_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD7_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x1C028++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x1C028++0xB line.long 0x0 "TCD7_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD7_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD7_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1C034++0x3 line.word 0x0 "TCD7_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD7_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x1C036++0x1 line.word 0x0 "TCD7_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x1C038++0x3 line.long 0x0 "TCD7_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x1C03C++0x3 line.word 0x0 "TCD7_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD7_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x1C03E++0x1 line.word 0x0 "TCD7_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x20000++0x13 line.long 0x0 "CH8_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH8_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH8_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH8_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH8_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x20020++0x3 line.long 0x0 "TCD8_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x20024++0x3 line.word 0x0 "TCD8_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD8_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x20028++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x20028++0xB line.long 0x0 "TCD8_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD8_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD8_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x20034++0x3 line.word 0x0 "TCD8_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD8_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x20036++0x1 line.word 0x0 "TCD8_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x20038++0x3 line.long 0x0 "TCD8_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x2003C++0x3 line.word 0x0 "TCD8_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD8_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x2003E++0x1 line.word 0x0 "TCD8_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x24000++0x13 line.long 0x0 "CH9_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH9_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH9_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH9_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH9_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x24020++0x3 line.long 0x0 "TCD9_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x24024++0x3 line.word 0x0 "TCD9_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD9_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x24028++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x24028++0xB line.long 0x0 "TCD9_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD9_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD9_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x24034++0x3 line.word 0x0 "TCD9_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD9_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x24036++0x1 line.word 0x0 "TCD9_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x24038++0x3 line.long 0x0 "TCD9_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x2403C++0x3 line.word 0x0 "TCD9_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD9_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x2403E++0x1 line.word 0x0 "TCD9_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x28000++0x13 line.long 0x0 "CH10_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH10_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH10_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH10_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH10_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x28020++0x3 line.long 0x0 "TCD10_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x28024++0x3 line.word 0x0 "TCD10_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD10_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x28028++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x28028++0xB line.long 0x0 "TCD10_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD10_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD10_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x28034++0x3 line.word 0x0 "TCD10_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD10_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x28036++0x1 line.word 0x0 "TCD10_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x28038++0x3 line.long 0x0 "TCD10_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x2803C++0x3 line.word 0x0 "TCD10_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD10_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x2803E++0x1 line.word 0x0 "TCD10_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x2C000++0x13 line.long 0x0 "CH11_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH11_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH11_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH11_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH11_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x2C020++0x3 line.long 0x0 "TCD11_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x2C024++0x3 line.word 0x0 "TCD11_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD11_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x2C028++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x2C028++0xB line.long 0x0 "TCD11_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD11_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD11_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x2C034++0x3 line.word 0x0 "TCD11_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD11_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x2C036++0x1 line.word 0x0 "TCD11_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x2C038++0x3 line.long 0x0 "TCD11_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x2C03C++0x3 line.word 0x0 "TCD11_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD11_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x2C03E++0x1 line.word 0x0 "TCD11_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x30000++0x13 line.long 0x0 "CH12_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH12_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH12_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH12_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH12_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x30020++0x3 line.long 0x0 "TCD12_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x30024++0x3 line.word 0x0 "TCD12_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD12_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x30028++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x30028++0xB line.long 0x0 "TCD12_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD12_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD12_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x30034++0x3 line.word 0x0 "TCD12_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD12_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x30036++0x1 line.word 0x0 "TCD12_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x30038++0x3 line.long 0x0 "TCD12_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x3003C++0x3 line.word 0x0 "TCD12_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD12_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x3003E++0x1 line.word 0x0 "TCD12_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x34000++0x13 line.long 0x0 "CH13_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH13_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH13_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH13_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH13_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x34020++0x3 line.long 0x0 "TCD13_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x34024++0x3 line.word 0x0 "TCD13_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD13_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x34028++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x34028++0xB line.long 0x0 "TCD13_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD13_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD13_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x34034++0x3 line.word 0x0 "TCD13_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD13_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x34036++0x1 line.word 0x0 "TCD13_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x34038++0x3 line.long 0x0 "TCD13_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x3403C++0x3 line.word 0x0 "TCD13_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD13_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x3403E++0x1 line.word 0x0 "TCD13_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x38000++0x13 line.long 0x0 "CH14_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH14_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH14_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH14_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH14_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x38020++0x3 line.long 0x0 "TCD14_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x38024++0x3 line.word 0x0 "TCD14_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD14_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x38028++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x38028++0xB line.long 0x0 "TCD14_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD14_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD14_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x38034++0x3 line.word 0x0 "TCD14_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD14_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x38036++0x1 line.word 0x0 "TCD14_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x38038++0x3 line.long 0x0 "TCD14_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x3803C++0x3 line.word 0x0 "TCD14_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD14_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x3803E++0x1 line.word 0x0 "TCD14_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x3C000++0x13 line.long 0x0 "CH15_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH15_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH15_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH15_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH15_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x3C020++0x3 line.long 0x0 "TCD15_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x3C024++0x3 line.word 0x0 "TCD15_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD15_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x3C028++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x3C028++0xB line.long 0x0 "TCD15_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD15_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD15_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x3C034++0x3 line.word 0x0 "TCD15_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD15_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x3C036++0x1 line.word 0x0 "TCD15_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x3C038++0x3 line.long 0x0 "TCD15_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x3C03C++0x3 line.word 0x0 "TCD15_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD15_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x3C03E++0x1 line.word 0x0 "TCD15_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x5EC000++0x13 line.long 0x0 "CH16_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH16_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH16_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH16_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH16_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x5EC020++0x3 line.long 0x0 "TCD16_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x5EC024++0x3 line.word 0x0 "TCD16_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD16_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x5EC028++0x3 line.long 0x0 "TCD16_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x5EC028++0xB line.long 0x0 "TCD16_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD16_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD16_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x5EC034++0x3 line.word 0x0 "TCD16_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD16_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x5EC036++0x1 line.word 0x0 "TCD16_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x5EC038++0x3 line.long 0x0 "TCD16_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x5EC03C++0x3 line.word 0x0 "TCD16_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD16_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x5EC03E++0x1 line.word 0x0 "TCD16_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x5F0000++0x13 line.long 0x0 "CH17_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH17_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH17_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH17_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH17_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x5F0020++0x3 line.long 0x0 "TCD17_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x5F0024++0x3 line.word 0x0 "TCD17_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD17_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x5F0028++0x3 line.long 0x0 "TCD17_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x5F0028++0xB line.long 0x0 "TCD17_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD17_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD17_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x5F0034++0x3 line.word 0x0 "TCD17_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD17_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x5F0036++0x1 line.word 0x0 "TCD17_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x5F0038++0x3 line.long 0x0 "TCD17_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x5F003C++0x3 line.word 0x0 "TCD17_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD17_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x5F003E++0x1 line.word 0x0 "TCD17_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x5F4000++0x13 line.long 0x0 "CH18_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH18_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH18_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH18_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH18_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x5F4020++0x3 line.long 0x0 "TCD18_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x5F4024++0x3 line.word 0x0 "TCD18_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD18_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x5F4028++0x3 line.long 0x0 "TCD18_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x5F4028++0xB line.long 0x0 "TCD18_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD18_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD18_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x5F4034++0x3 line.word 0x0 "TCD18_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD18_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x5F4036++0x1 line.word 0x0 "TCD18_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x5F4038++0x3 line.long 0x0 "TCD18_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x5F403C++0x3 line.word 0x0 "TCD18_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD18_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x5F403E++0x1 line.word 0x0 "TCD18_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x5F8000++0x13 line.long 0x0 "CH19_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH19_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH19_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH19_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH19_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x5F8020++0x3 line.long 0x0 "TCD19_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x5F8024++0x3 line.word 0x0 "TCD19_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD19_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x5F8028++0x3 line.long 0x0 "TCD19_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x5F8028++0xB line.long 0x0 "TCD19_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD19_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD19_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x5F8034++0x3 line.word 0x0 "TCD19_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD19_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x5F8036++0x1 line.word 0x0 "TCD19_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x5F8038++0x3 line.long 0x0 "TCD19_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x5F803C++0x3 line.word 0x0 "TCD19_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD19_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x5F803E++0x1 line.word 0x0 "TCD19_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x5FC000++0x13 line.long 0x0 "CH20_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH20_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH20_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH20_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH20_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x5FC020++0x3 line.long 0x0 "TCD20_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x5FC024++0x3 line.word 0x0 "TCD20_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD20_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x5FC028++0x3 line.long 0x0 "TCD20_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x5FC028++0xB line.long 0x0 "TCD20_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD20_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD20_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x5FC034++0x3 line.word 0x0 "TCD20_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD20_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x5FC036++0x1 line.word 0x0 "TCD20_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x5FC038++0x3 line.long 0x0 "TCD20_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x5FC03C++0x3 line.word 0x0 "TCD20_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD20_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x5FC03E++0x1 line.word 0x0 "TCD20_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x600000++0x13 line.long 0x0 "CH21_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH21_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH21_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH21_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH21_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x600020++0x3 line.long 0x0 "TCD21_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x600024++0x3 line.word 0x0 "TCD21_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD21_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x600028++0x3 line.long 0x0 "TCD21_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x600028++0xB line.long 0x0 "TCD21_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD21_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD21_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x600034++0x3 line.word 0x0 "TCD21_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD21_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x600036++0x1 line.word 0x0 "TCD21_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x600038++0x3 line.long 0x0 "TCD21_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x60003C++0x3 line.word 0x0 "TCD21_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD21_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x60003E++0x1 line.word 0x0 "TCD21_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x604000++0x13 line.long 0x0 "CH22_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH22_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH22_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH22_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH22_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x604020++0x3 line.long 0x0 "TCD22_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x604024++0x3 line.word 0x0 "TCD22_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD22_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x604028++0x3 line.long 0x0 "TCD22_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x604028++0xB line.long 0x0 "TCD22_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD22_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD22_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x604034++0x3 line.word 0x0 "TCD22_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD22_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x604036++0x1 line.word 0x0 "TCD22_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x604038++0x3 line.long 0x0 "TCD22_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x60403C++0x3 line.word 0x0 "TCD22_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD22_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x60403E++0x1 line.word 0x0 "TCD22_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x608000++0x13 line.long 0x0 "CH23_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH23_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH23_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH23_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH23_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x608020++0x3 line.long 0x0 "TCD23_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x608024++0x3 line.word 0x0 "TCD23_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD23_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x608028++0x3 line.long 0x0 "TCD23_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x608028++0xB line.long 0x0 "TCD23_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD23_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD23_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x608034++0x3 line.word 0x0 "TCD23_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD23_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x608036++0x1 line.word 0x0 "TCD23_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x608038++0x3 line.long 0x0 "TCD23_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x60803C++0x3 line.word 0x0 "TCD23_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD23_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x60803E++0x1 line.word 0x0 "TCD23_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x60C000++0x13 line.long 0x0 "CH24_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH24_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH24_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH24_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH24_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x60C020++0x3 line.long 0x0 "TCD24_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x60C024++0x3 line.word 0x0 "TCD24_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD24_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x60C028++0x3 line.long 0x0 "TCD24_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x60C028++0xB line.long 0x0 "TCD24_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD24_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD24_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x60C034++0x3 line.word 0x0 "TCD24_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD24_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x60C036++0x1 line.word 0x0 "TCD24_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x60C038++0x3 line.long 0x0 "TCD24_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x60C03C++0x3 line.word 0x0 "TCD24_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD24_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x60C03E++0x1 line.word 0x0 "TCD24_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x610000++0x13 line.long 0x0 "CH25_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH25_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH25_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH25_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH25_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x610020++0x3 line.long 0x0 "TCD25_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x610024++0x3 line.word 0x0 "TCD25_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD25_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x610028++0x3 line.long 0x0 "TCD25_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x610028++0xB line.long 0x0 "TCD25_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD25_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD25_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x610034++0x3 line.word 0x0 "TCD25_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD25_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x610036++0x1 line.word 0x0 "TCD25_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x610038++0x3 line.long 0x0 "TCD25_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x61003C++0x3 line.word 0x0 "TCD25_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD25_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x61003E++0x1 line.word 0x0 "TCD25_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x614000++0x13 line.long 0x0 "CH26_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH26_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH26_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH26_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH26_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x614020++0x3 line.long 0x0 "TCD26_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x614024++0x3 line.word 0x0 "TCD26_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD26_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x614028++0x3 line.long 0x0 "TCD26_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x614028++0xB line.long 0x0 "TCD26_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD26_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD26_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x614034++0x3 line.word 0x0 "TCD26_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD26_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x614036++0x1 line.word 0x0 "TCD26_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x614038++0x3 line.long 0x0 "TCD26_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x61403C++0x3 line.word 0x0 "TCD26_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD26_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x61403E++0x1 line.word 0x0 "TCD26_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x618000++0x13 line.long 0x0 "CH27_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH27_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH27_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH27_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH27_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x618020++0x3 line.long 0x0 "TCD27_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x618024++0x3 line.word 0x0 "TCD27_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD27_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x618028++0x3 line.long 0x0 "TCD27_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x618028++0xB line.long 0x0 "TCD27_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD27_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD27_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x618034++0x3 line.word 0x0 "TCD27_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD27_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x618036++0x1 line.word 0x0 "TCD27_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x618038++0x3 line.long 0x0 "TCD27_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x61803C++0x3 line.word 0x0 "TCD27_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD27_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x61803E++0x1 line.word 0x0 "TCD27_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x61C000++0x13 line.long 0x0 "CH28_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH28_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH28_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH28_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH28_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x61C020++0x3 line.long 0x0 "TCD28_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x61C024++0x3 line.word 0x0 "TCD28_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD28_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x61C028++0x3 line.long 0x0 "TCD28_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x61C028++0xB line.long 0x0 "TCD28_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD28_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD28_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x61C034++0x3 line.word 0x0 "TCD28_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD28_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x61C036++0x1 line.word 0x0 "TCD28_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x61C038++0x3 line.long 0x0 "TCD28_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x61C03C++0x3 line.word 0x0 "TCD28_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD28_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x61C03E++0x1 line.word 0x0 "TCD28_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x620000++0x13 line.long 0x0 "CH29_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH29_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH29_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH29_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH29_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x620020++0x3 line.long 0x0 "TCD29_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x620024++0x3 line.word 0x0 "TCD29_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD29_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x620028++0x3 line.long 0x0 "TCD29_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x620028++0xB line.long 0x0 "TCD29_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD29_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD29_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x620034++0x3 line.word 0x0 "TCD29_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD29_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x620036++0x1 line.word 0x0 "TCD29_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x620038++0x3 line.long 0x0 "TCD29_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x62003C++0x3 line.word 0x0 "TCD29_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD29_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x62003E++0x1 line.word 0x0 "TCD29_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x624000++0x13 line.long 0x0 "CH30_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH30_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH30_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH30_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH30_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x624020++0x3 line.long 0x0 "TCD30_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x624024++0x3 line.word 0x0 "TCD30_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD30_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x624028++0x3 line.long 0x0 "TCD30_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x624028++0xB line.long 0x0 "TCD30_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD30_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD30_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x624034++0x3 line.word 0x0 "TCD30_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD30_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x624036++0x1 line.word 0x0 "TCD30_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x624038++0x3 line.long 0x0 "TCD30_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x62403C++0x3 line.word 0x0 "TCD30_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD30_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x62403E++0x1 line.word 0x0 "TCD30_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" group.long 0x628000++0x13 line.long 0x0 "CH31_CSR,Channel Control and Status" rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1" eventfld.long 0x0 30. "DONE,Channel Done" "0,1" newline bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled" bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.." newline bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel" bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.." line.long 0x4 "CH31_ES,Channel Error Status" eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.." newline rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.." rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read" newline rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.." line.long 0x8 "CH31_INT,Channel Interrupt Status" eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active" line.long 0xC "CH31_SBR,Channel System Bus" bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled" newline rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers" hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID" line.long 0x10 "CH31_PRI,Channel Priority" bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.." bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.." newline bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7" group.long 0x628020++0x3 line.long 0x0 "TCD31_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x628024++0x3 line.word 0x0 "TCD31_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset" line.word 0x2 "TCD31_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7" group.long 0x628028++0x3 line.long 0x0 "TCD31_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" group.long 0x628028++0xB line.long 0x0 "TCD31_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset" hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request" line.long 0x4 "TCD31_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address" hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address" line.long 0x8 "TCD31_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x628034++0x3 line.word 0x0 "TCD31_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD31_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x628036++0x1 line.word 0x0 "TCD31_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count" group.long 0x628038++0x3 line.long 0x0 "TCD31_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address" group.word 0x62803C++0x3 line.word 0x0 "TCD31_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W" hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.." bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" newline bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.." bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.." newline bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled" bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled" newline bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.." line.word 0x2 "TCD31_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x62803E++0x1 line.word 0x0 "TCD31_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled" hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count" tree.end tree.end tree "TEMPSENSE (Temperature Sensor)" base ad:0x4037C000 group.long 0x0++0x3 line.long 0x0 "ETSCTL,ETS Control" bitfld.long 0x0 1. "GNDSEL,Ground selection" "0: No exposure of the ground,1: Expose ground on the ADC output if ETS_EN=1" bitfld.long 0x0 0. "ETS_EN,Temperature Sensor enable" "0: Power down,1: Functional mode" rgroup.long 0x8++0xB line.long 0x0 "TCA0,Temperature Coefficient" hexmask.long.word 0x0 0.--15. 1. "TCA0,Temperature coefficient A0" line.long 0x4 "TCA1,Temperature Coefficient" hexmask.long.word 0x4 0.--15. 1. "TCA1,Temperature coefficient A1" line.long 0x8 "TCA2,Temperature Coefficient" hexmask.long.word 0x8 0.--15. 1. "TCA2,Temperature coefficient A2" tree.end tree "TRGMUX (Trigger MUX)" base ad:0x0 tree "TRGMUX_APP" base ad:0x40080000 group.long 0x0++0x57 line.long 0x0 "ADC12_0,TRGMUX ADC12_0" bitfld.long 0x0 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x0 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x0 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x0 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x4 "ADC12_1,TRGMUX ADC12_1" bitfld.long 0x4 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x4 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x4 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x4 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x8 "ADC12_2,TRGMUX ADC12_2" bitfld.long 0x8 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x8 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x8 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x8 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0xC "ADC12_3,TRGMUX ADC12_3" bitfld.long 0xC 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0xC 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0xC 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0xC 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x10 "ADC12_4,TRGMUX ADC12_4" bitfld.long 0x10 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x10 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x10 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x10 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x14 "ADC12_5,TRGMUX ADC12_5" bitfld.long 0x14 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x14 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x14 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x14 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x18 "ADC12_6,TRGMUX ADC12_6" bitfld.long 0x18 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x18 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x18 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x18 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x1C "SD_0,TRGMUX SD_0" bitfld.long 0x1C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x1C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x20 "SD_1,TRGMUX SD_1" bitfld.long 0x20 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x20 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x24 "SD_2,TRGMUX SD_2" bitfld.long 0x24 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x24 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x28 "SD_3,TRGMUX SD_3" bitfld.long 0x28 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x28 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x2C "LPCMP_0,TRGMUX LPCMP_0" bitfld.long 0x2C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x2C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x30 "LPCMP_1,TRGMUX LPCMP_1" bitfld.long 0x30 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x30 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x34 "BCTU_0,TRGMUX BCTU_0" bitfld.long 0x34 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x34 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x34 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x34 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x38 "BCTU_1,TRGMUX BCTU_1" bitfld.long 0x38 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x38 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x38 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x38 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x3C "SWG_0,TRGMUX SWG_0" bitfld.long 0x3C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x3C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x40 "SWG_1,TRGMUX SWG_1" bitfld.long 0x40 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x40 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x44 "eMIOS012_ODIS,TRGMUX eMIOS012_ODIS" bitfld.long 0x44 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x44 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x44 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x44 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x44 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x48 "eMIOS0_ipp_0,TRGMUX eMIOS0_ipp_0" bitfld.long 0x48 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x48 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x48 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x48 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x48 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x4C "eMIOS0_ipp_1,TRGMUX eMIOS0_ipp_1" bitfld.long 0x4C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x4C 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x4C 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x4C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x4C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x50 "eMIOS0_ipp_2,TRGMUX eMIOS0_ipp_2" bitfld.long 0x50 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x50 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x50 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x50 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x50 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x54 "eMIOS0_ipp_3,TRGMUX eMIOS0_ipp_3" bitfld.long 0x54 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x54 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x54 0.--6. 1. "SEL0,TRGMUX Source Select 0" group.long 0x64++0x87 line.long 0x0 "PWM0_fault,TRGMUX PWM0_fault" bitfld.long 0x0 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x0 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x0 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x0 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x0 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x4 "PWM1_fault,TRGMUX PWM1_fault" bitfld.long 0x4 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x4 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x4 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x4 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x4 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x8 "PWM_EXT_SYNC,TRGMUX PWM_EXT_SYNC" bitfld.long 0x8 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x8 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x8 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x8 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x8 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0xC "PWM_EXT_AB_0,TRGMUX PWM_EXT_AB_0" bitfld.long 0xC 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0xC 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0xC 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0xC 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0xC 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x10 "PWM_EXT_AB_1,TRGMUX PWM_EXT_AB_1" bitfld.long 0x10 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x10 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x10 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x10 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x10 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x14 "PWM_EXT_CLK_FORCE,TRGMUX PWM_EXT_CLK_FORCE" bitfld.long 0x14 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x14 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x14 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x14 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x18 "FlexIO,TRGMUX FlexIO" bitfld.long 0x18 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x18 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x18 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x18 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x18 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x1C "SIUL_OUT_0,TRGMUX SIUL_OUT_0" bitfld.long 0x1C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x1C 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x1C 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x1C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x1C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x20 "SIUL_OUT_1,TRGMUX SIUL_OUT_1" bitfld.long 0x20 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x20 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x20 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x20 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x20 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x24 "SIUL_OUT_2,TRGMUX SIUL_OUT_2" bitfld.long 0x24 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x24 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x24 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x24 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x24 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x28 "SIUL_OUT_3,TRGMUX SIUL_OUT_3" bitfld.long 0x28 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x28 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x28 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x28 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x28 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x2C "LPSPI_0,TRGMUX LPSPI_0" bitfld.long 0x2C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x2C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x30 "LPSPI_1,TRGMUX LPSPI_1" bitfld.long 0x30 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x30 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x34 "LPSPI_2,TRGMUX LPSPI_2" bitfld.long 0x34 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x34 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x38 "LPUART_0,TRGMUX LPUART_0" bitfld.long 0x38 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x38 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x3C "LPUART_1,TRGMUX LPUART_1" bitfld.long 0x3C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x3C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x40 "LPUART_2,TRGMUX LPUART_2" bitfld.long 0x40 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x40 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x44 "LPUART_3,TRGMUX LPUART_3" bitfld.long 0x44 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x44 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x48 "DSPI_MSC,TRGMUX DSPI_MSC" bitfld.long 0x48 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x48 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x48 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x4C "LCU0_sync,TRGMUX LCU0_sync" bitfld.long 0x4C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x4C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x4C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x50 "LCU0_force,TRGMUX LCU0_force" bitfld.long 0x50 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x50 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x50 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x50 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x50 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x54 "LCU0_0,TRGMUX LCU0_0" bitfld.long 0x54 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x54 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x54 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x54 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x54 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x58 "LCU0_1,TRGMUX LCU0_1" bitfld.long 0x58 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x58 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x58 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x58 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x58 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x5C "LCU0_2,TRGMUX LCU0_2" bitfld.long 0x5C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x5C 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x5C 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x5C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x5C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x60 "LCU1_sync,TRGMUX LCU1_sync" bitfld.long 0x60 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x60 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x60 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x64 "LCU1_force,TRGMUX LCU1_force" bitfld.long 0x64 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x64 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x64 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x64 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x64 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x68 "LCU1_0,TRGMUX LCU1_0" bitfld.long 0x68 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x68 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x68 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x68 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x68 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x6C "LCU1_1,TRGMUX LCU1_1" bitfld.long 0x6C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x6C 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x6C 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x6C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x6C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x70 "LCU1_2,TRGMUX LCU1_2" bitfld.long 0x70 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x70 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x70 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x70 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x70 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x74 "TRGMUX_MSC_OUT_0,TRGMUX TRGMUX_MSC_OUT_0" bitfld.long 0x74 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x74 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x74 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x74 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x74 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x78 "TRGMUX_MSC_OUT_1,TRGMUX TRGMUX_MSC_OUT_1" bitfld.long 0x78 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x78 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x78 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x78 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x78 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x7C "TRGMUX_MSC_OUT_2,TRGMUX TRGMUX_MSC_OUT_2" bitfld.long 0x7C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x7C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x7C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x80 "COOLFLUX_OUT,TRGMUX COOLFLUX_OUT" bitfld.long 0x80 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x80 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x80 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x80 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x80 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x84 "CM7_RXEV,TRGMUX CM7_RXEV" bitfld.long 0x84 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x84 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x84 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x84 0.--6. 1. "SEL0,TRGMUX Source Select 0" group.long 0xF4++0x3 line.long 0x0 "LPI2C_0_Triggered,TRGMUX LPI2C_0_Triggered" bitfld.long 0x0 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x0 0.--6. 1. "SEL0,TRGMUX Source Select 0" tree.end tree "TRGMUX_MSC" base ad:0x406C0000 group.long 0x0++0x4B line.long 0x0 "DSPI_MSC_Input_0,TRGMUX DSPI_MSC_Input_0" bitfld.long 0x0 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x0 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x0 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x0 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x0 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x4 "DSPI_MSC_Input_1,TRGMUX DSPI_MSC_Input_1" bitfld.long 0x4 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x4 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x4 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x4 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x4 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x8 "DSPI_MSC_Input_2,TRGMUX DSPI_MSC_Input_2" bitfld.long 0x8 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x8 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x8 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x8 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x8 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0xC "DSPI_MSC_Input_3,TRGMUX DSPI_MSC_Input_3" bitfld.long 0xC 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0xC 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0xC 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0xC 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0xC 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x10 "DSPI_MSC_Input_4,TRGMUX DSPI_MSC_Input_4" bitfld.long 0x10 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x10 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x10 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x10 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x10 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x14 "DSPI_MSC_Input_5,TRGMUX DSPI_MSC_Input_5" bitfld.long 0x14 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x14 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x14 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x14 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x14 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x18 "DSPI_MSC_Input_6,TRGMUX DSPI_MSC_Input_6" bitfld.long 0x18 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x18 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x18 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x18 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x18 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x1C "DSPI_MSC_Input_7,TRGMUX DSPI_MSC_Input_7" bitfld.long 0x1C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x1C 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x1C 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x1C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x1C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x20 "DSPI_MSC_Input_8,TRGMUX DSPI_MSC_Input_8" bitfld.long 0x20 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x20 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x20 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x20 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x20 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x24 "DSPI_MSC_Input_9,TRGMUX DSPI_MSC_Input_9" bitfld.long 0x24 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x24 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x24 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x24 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x24 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x28 "DSPI_MSC_Input_10,TRGMUX DSPI_MSC_Input_10" bitfld.long 0x28 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x28 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x28 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x28 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x28 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x2C "DSPI_MSC_Input_11,TRGMUX DSPI_MSC_Input_11" bitfld.long 0x2C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x2C 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x2C 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x2C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x2C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x30 "DSPI_MSC_Input_12,TRGMUX DSPI_MSC_Input_12" bitfld.long 0x30 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x30 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x30 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x30 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x30 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x34 "DSPI_MSC_Input_13,TRGMUX DSPI_MSC_Input_13" bitfld.long 0x34 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x34 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x34 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x34 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x34 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x38 "DSPI_MSC_Input_14,TRGMUX DSPI_MSC_Input_14" bitfld.long 0x38 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x38 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x38 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x38 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x38 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x3C "DSPI_MSC_Input_15,TRGMUX DSPI_MSC_Input_15" bitfld.long 0x3C 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x3C 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x3C 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x3C 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x3C 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x40 "TRGMUX_APP_TRGMUX_OUT_0,TRGMUX TRGMUX_APP_TRGMUX_OUT_0" bitfld.long 0x40 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x40 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x40 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x40 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x40 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x44 "TRGMUX_APP_TRGMUX_OUT_1,TRGMUX TRGMUX_APP_TRGMUX_OUT_1" bitfld.long 0x44 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x44 24.--30. 1. "SEL3,TRGMUX Source Select 3" hexmask.long.byte 0x44 16.--22. 1. "SEL2,TRGMUX Source Select 2" hexmask.long.byte 0x44 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x44 0.--6. 1. "SEL0,TRGMUX Source Select 0" line.long 0x48 "TRGMUX_APP_TRGMUX_OUT_2,TRGMUX TRGMUX_APP_TRGMUX_OUT_2" bitfld.long 0x48 31. "LK,TRGMUX Register Lock" "0: Register is writable,1: Register is not writable until the next system.." hexmask.long.byte 0x48 8.--14. 1. "SEL1,TRGMUX Source Select 1" hexmask.long.byte 0x48 0.--6. 1. "SEL0,TRGMUX Source Select 0" tree.end tree.end tree "VIRT_WRAPPER (Virtual Wrapper)" base ad:0x402A8000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "REG_A$1,Parameter_n Register" bitfld.long 0x0 30.--31. "PAD_15,PAD_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 28.--29. "PAD_14,PAD_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 26.--27. "PAD_13,PAD_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 24.--25. "PAD_12,PAD_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 22.--23. "PAD_11,PAD_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 20.--21. "PAD_10,PAD_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 18.--19. "PAD_9,PAD_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 16.--17. "PAD_8,PAD_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 14.--15. "PAD_7,PAD_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 12.--13. "PAD_6,PAD_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 10.--11. "PAD_5,PAD_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 8.--9. "PAD_4,PAD_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 6.--7. "PAD_3,PAD_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 4.--5. "PAD_2,PAD_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "REG_B$1,Parameter_n Register" bitfld.long 0x0 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" bitfld.long 0x0 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" newline bitfld.long 0x0 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,2: SIUL2_VIRTWRAPPER_PDAC4,3: SIUL2_VIRTWRAPPER_PDAC0" repeat.end group.long 0x100++0x7 line.long 0x0 "REG_C1039_1024,Parameter_n Register" bitfld.long 0x0 0.--1. "INTC_CTRL,Interrupt register control" "0,1,2,3" line.long 0x4 "REG_D1055_1040,Parameter_n Register" bitfld.long 0x4 30.--31. "REG_GCR,GCR Register Of REG_PROT" "0,1,2,3" tree.end tree "WKPU (Wakeup Unit)" base ad:0x402B4000 group.long 0x0++0x3 line.long 0x0 "NSR,NMI Status Flag Register" eventfld.long 0x0 31. "NIF0,NMI Status Flag 0" "0: No event has occurred on the pad,1: An event as defined by NREE0 and NFEE0 has.." eventfld.long 0x0 30. "NOVF0,NMI Overrun Status Flag 0" "0: No overrun has occurred on NMI input 0,1: An overrun has occurred on NMI input 0" newline eventfld.long 0x0 23. "NIF1,NMI Status Flag 1" "0: No event has occurred on the pad,1: An event as defined by NREE1 and NFEE1 has.." eventfld.long 0x0 22. "NOVF1,NMI Overrun Status Flag 1" "0: No overrun has occurred on NMI input 1,1: An overrun has occurred on NMI input 1" newline eventfld.long 0x0 15. "NIF2,NMI Status Flag 2" "0: No event has occurred on the pad,1: An event as defined by NREE2 and NFEE2 has.." eventfld.long 0x0 14. "NOVF2,NMI Overrun Status Flag 2" "0: No overrun has occurred on NMI input 2,1: An overrun has occurred on NMI input 2" group.long 0x8++0x3 line.long 0x0 "NCR,NMI Configuration Register" bitfld.long 0x0 31. "NLOCK0,NMI Configuration Lock Register 0" "0,1" bitfld.long 0x0 29.--30. "NDSS0,NMI Destination Source Select 0" "0: Non-maskable interrupt,?,?,?" newline bitfld.long 0x0 28. "NWRE0,NMI Wakeup Request Enable 0" "0: System wakeup requests from the corresponding..,1: Causes a system wakeup request when NIF0 = 1 or.." bitfld.long 0x0 26. "NREE0,NMI Rising-Edge Events Enable 0" "0: Rising-edge event is disabled,1: Rising-edge event is enabled" newline bitfld.long 0x0 25. "NFEE0,NMI Falling-edge Events Enable 0" "0,1" bitfld.long 0x0 24. "NFE0,NMI Filter Enable 0" "0: Filter is disabled,1: Filter is enabled" newline bitfld.long 0x0 23. "NLOCK1,NMI Configuration Lock Register 1" "0,1" bitfld.long 0x0 21.--22. "NDSS1,NMI Destination Source Select 1" "0: Non-maskable interrupt,?,?,?" newline bitfld.long 0x0 20. "NWRE1,NMI Wakeup Request Enable 1" "0: System wakeup requests from the corresponding..,1: Causes a system wakeup request when NIF1 = 1 or.." bitfld.long 0x0 18. "NREE1,NMI Rising-Edge Events Enable 1" "0: Rising-edge event is disabled,1: Rising-edge event is enabled" newline bitfld.long 0x0 17. "NFEE1,NMI Falling-Edge Events Enable 1" "0,1" bitfld.long 0x0 16. "NFE1,NMI Filter Enable 1" "0: Filter is disabled,1: Filter is enabled" newline bitfld.long 0x0 15. "NLOCK2,NMI Configuration Lock Register 2" "0,1" bitfld.long 0x0 13.--14. "NDSS2,NMI Destination Source Select 2" "0: Non-maskable interrupt,?,?,?" newline bitfld.long 0x0 12. "NWRE2,NMI Wakeup Request Enable 2" "0: System wakeup requests from the corresponding..,1: Causes a system wakeup request when NIF2 = 1 or.." bitfld.long 0x0 10. "NREE2,NMI Rising-Edge Events Enable 2" "0: Rising-edge event is disabled,1: Rising-edge event is enabled" newline bitfld.long 0x0 9. "NFEE2,NMI Falling-Edge Events Enable 2" "0: Falling-edge event is disabled,1: Falling-edge event is enabled" bitfld.long 0x0 8. "NFE2,NMI Filter Enable 2" "0: Filter is disabled,1: Filter is enabled" group.long 0x14++0xB line.long 0x0 "WISR,Wakeup/Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "EIF,External Wakeup/Interrupt Status Flag x" line.long 0x4 "IRER,Interrupt Request Enable Register" hexmask.long 0x4 0.--31. 1. "EIRE,External Interrupt Request Enable x" line.long 0x8 "WRER,Wakeup Request Enable Register" hexmask.long 0x8 0.--31. 1. "WRE,External Wakeup Request Enable x" group.long 0x28++0xB line.long 0x0 "WIREER,Wakeup/Interrupt Rising-Edge Event Enable Register" hexmask.long 0x0 0.--31. 1. "IREE,External Interrupt Rising-edge Events Enable x" line.long 0x4 "WIFEER,Wakeup/Interrupt Falling-Edge Event Enable Register" hexmask.long 0x4 0.--31. 1. "IFEEx,External Interrupt Falling-edge Events Enable x" line.long 0x8 "WIFER,Wakeup/Interrupt Filter Enable Register" hexmask.long 0x8 0.--31. 1. "IFE,External Interrupt Filter Enable x" group.long 0x54++0xB line.long 0x0 "WISR_64,Wakeup/Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "EIF_1,External Wakeup/Interrupt Status Flag x" line.long 0x4 "IRER_64,Interrupt Request Enable Register" hexmask.long 0x4 0.--31. 1. "EIRE_1,External Interrupt Request Enable x" line.long 0x8 "WRER_64,Wakeup Request Enable Register" hexmask.long 0x8 0.--31. 1. "WRE_1,External Wakeup Request Enable x" group.long 0x68++0xB line.long 0x0 "WIREER_64,Wakeup/Interrupt Rising-Edge Event Enable Register" hexmask.long 0x0 0.--31. 1. "IREE_1,External Interrupt Rising-edge Events Enable x" line.long 0x4 "WIFEER_64,Wakeup/Interrupt Falling-Edge Event Enable Register" hexmask.long 0x4 0.--31. 1. "IFEEx_1,External Interrupt Falling-edge Events Enable x" line.long 0x8 "WIFER_64,Wakeup/Interrupt Filter Enable Register" hexmask.long 0x8 0.--31. 1. "IFE_1,External Interrupt Filter Enable x" tree.end tree "XBIC (Crossbar Integrity Checker)" base ad:0x0 tree "EDMA1_XBIC (XBIC)" base ad:0x40674000 group.long 0x0++0xB line.long 0x0 "MCR,XBIC Module Control" bitfld.long 0x0 31. "SE0,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 30. "SE1,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 23. "ME0,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." line.long 0x4 "EIR,XBIC Error Injection" bitfld.long 0x4 31. "EIE,Error Injection Enable" "0: Error injection disabled,1: Error injection enabled" bitfld.long 0x4 12.--14. "SLV,Target Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--11. 1. "MST,Target Master ID" hexmask.long.byte 0x4 0.--7. 1. "SYN,Syndrome" line.long 0x8 "ESR,XBIC Error Status" eventfld.long 0x8 31. "VLD,Error Status Valid" "0: No error detected-other fields of the ESR and..,1: Error detected-all fields of the ESR and EAR.." rbitfld.long 0x8 30. "DPSE0,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 0" newline rbitfld.long 0x8 29. "DPSE1,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 1" rbitfld.long 0x8 28. "DPSE2,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 2" newline rbitfld.long 0x8 27. "DPSE3,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 3" rbitfld.long 0x8 26. "DPSE4,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 4" newline rbitfld.long 0x8 25. "DPSE5,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 5" rbitfld.long 0x8 24. "DPSE6,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 6" newline rbitfld.long 0x8 23. "DPSE7,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 7" rbitfld.long 0x8 22. "DPME0,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 0" newline rbitfld.long 0x8 21. "DPME1,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 1" rbitfld.long 0x8 20. "DPME2,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 2" newline rbitfld.long 0x8 19. "DPME3,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 3" rbitfld.long 0x8 18. "DPME4,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 4" newline rbitfld.long 0x8 17. "DPME5,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 5" rbitfld.long 0x8 16. "DPME6,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 6" newline rbitfld.long 0x8 15. "DPME7,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 7" rbitfld.long 0x8 12.--14. "SLV,Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 8.--11. 1. "MST,Master ID" hexmask.long.byte 0x8 0.--7. 1. "SYN,Syndrome" rgroup.long 0xC++0x3 line.long 0x0 "EAR,XBIC Error Address" hexmask.long 0x0 0.--31. 1. "ADDR,Error Address" tree.end tree "XBIC_AXBS" base ad:0x40204000 group.long 0x0++0xB line.long 0x0 "MCR,XBIC Module Control" bitfld.long 0x0 31. "SE0,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 30. "SE1,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 29. "SE2,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 28. "SE3,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 27. "SE4,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 26. "SE5,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 25. "SE6,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 24. "SE7,Slave Port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 23. "ME0,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." bitfld.long 0x0 22. "ME1,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." newline bitfld.long 0x0 21. "ME2,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." bitfld.long 0x0 20. "ME3,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." newline bitfld.long 0x0 19. "ME4,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." bitfld.long 0x0 18. "ME5,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." newline bitfld.long 0x0 17. "ME6,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." bitfld.long 0x0 16. "ME7,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." line.long 0x4 "EIR,XBIC Error Injection" bitfld.long 0x4 31. "EIE,Error Injection Enable" "0: Error injection disabled,1: Error injection enabled" bitfld.long 0x4 12.--14. "SLV,Target Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--11. 1. "MST,Target Master ID" hexmask.long.byte 0x4 0.--7. 1. "SYN,Syndrome" line.long 0x8 "ESR,XBIC Error Status" eventfld.long 0x8 31. "VLD,Error Status Valid" "0: No error detected-other fields of the ESR and..,1: Error detected-all fields of the ESR and EAR.." rbitfld.long 0x8 30. "DPSE0,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 0" newline rbitfld.long 0x8 29. "DPSE1,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 1" rbitfld.long 0x8 28. "DPSE2,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 2" newline rbitfld.long 0x8 27. "DPSE3,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 3" rbitfld.long 0x8 26. "DPSE4,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 4" newline rbitfld.long 0x8 25. "DPSE5,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 5" rbitfld.long 0x8 24. "DPSE6,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 6" newline rbitfld.long 0x8 23. "DPSE7,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 7" rbitfld.long 0x8 22. "DPME0,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 0" newline rbitfld.long 0x8 21. "DPME1,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 1" rbitfld.long 0x8 20. "DPME2,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 2" newline rbitfld.long 0x8 19. "DPME3,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 3" rbitfld.long 0x8 18. "DPME4,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 4" newline rbitfld.long 0x8 17. "DPME5,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 5" rbitfld.long 0x8 16. "DPME6,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 6" newline rbitfld.long 0x8 15. "DPME7,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 7" rbitfld.long 0x8 12.--14. "SLV,Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 8.--11. 1. "MST,Master ID" hexmask.long.byte 0x8 0.--7. 1. "SYN,Syndrome" rgroup.long 0xC++0x3 line.long 0x0 "EAR,XBIC Error Address" hexmask.long 0x0 0.--31. 1. "ADDR,Error Address" tree.end tree "XBIC_AXBS_EDMA" base ad:0x40404000 group.long 0x0++0xB line.long 0x0 "MCR,XBIC Module Control" bitfld.long 0x0 31. "SE0,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 30. "SE1,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 23. "ME0,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." bitfld.long 0x0 22. "ME1,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." line.long 0x4 "EIR,XBIC Error Injection" bitfld.long 0x4 31. "EIE,Error Injection Enable" "0: Error injection disabled,1: Error injection enabled" bitfld.long 0x4 12.--14. "SLV,Target Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--11. 1. "MST,Target Master ID" hexmask.long.byte 0x4 0.--7. 1. "SYN,Syndrome" line.long 0x8 "ESR,XBIC Error Status" eventfld.long 0x8 31. "VLD,Error Status Valid" "0: No error detected-other fields of the ESR and..,1: Error detected-all fields of the ESR and EAR.." rbitfld.long 0x8 30. "DPSE0,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 0" newline rbitfld.long 0x8 29. "DPSE1,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 1" rbitfld.long 0x8 28. "DPSE2,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 2" newline rbitfld.long 0x8 27. "DPSE3,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 3" rbitfld.long 0x8 26. "DPSE4,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 4" newline rbitfld.long 0x8 25. "DPSE5,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 5" rbitfld.long 0x8 24. "DPSE6,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 6" newline rbitfld.long 0x8 23. "DPSE7,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 7" rbitfld.long 0x8 22. "DPME0,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 0" newline rbitfld.long 0x8 21. "DPME1,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 1" rbitfld.long 0x8 20. "DPME2,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 2" newline rbitfld.long 0x8 19. "DPME3,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 3" rbitfld.long 0x8 18. "DPME4,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 4" newline rbitfld.long 0x8 17. "DPME5,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 5" rbitfld.long 0x8 16. "DPME6,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 6" newline rbitfld.long 0x8 15. "DPME7,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 7" rbitfld.long 0x8 12.--14. "SLV,Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 8.--11. 1. "MST,Master ID" hexmask.long.byte 0x8 0.--7. 1. "SYN,Syndrome" rgroup.long 0xC++0x3 line.long 0x0 "EAR,XBIC Error Address" hexmask.long 0x0 0.--31. 1. "ADDR,Error Address" tree.end tree "XBIC_AXBS_PERI" base ad:0x40208000 group.long 0x0++0xB line.long 0x0 "MCR,XBIC Module Control" bitfld.long 0x0 31. "SE0,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 30. "SE1,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 29. "SE2,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 28. "SE3,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 23. "ME0,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." bitfld.long 0x0 22. "ME1,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." newline bitfld.long 0x0 21. "ME2,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." bitfld.long 0x0 20. "ME3,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." newline bitfld.long 0x0 19. "ME4,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." bitfld.long 0x0 17. "ME6,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." newline bitfld.long 0x0 16. "ME7,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." line.long 0x4 "EIR,XBIC Error Injection" bitfld.long 0x4 31. "EIE,Error Injection Enable" "0: Error injection disabled,1: Error injection enabled" bitfld.long 0x4 12.--14. "SLV,Target Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--11. 1. "MST,Target Master ID" hexmask.long.byte 0x4 0.--7. 1. "SYN,Syndrome" line.long 0x8 "ESR,XBIC Error Status" eventfld.long 0x8 31. "VLD,Error Status Valid" "0: No error detected-other fields of the ESR and..,1: Error detected-all fields of the ESR and EAR.." rbitfld.long 0x8 30. "DPSE0,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 0" newline rbitfld.long 0x8 29. "DPSE1,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 1" rbitfld.long 0x8 28. "DPSE2,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 2" newline rbitfld.long 0x8 27. "DPSE3,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 3" rbitfld.long 0x8 26. "DPSE4,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 4" newline rbitfld.long 0x8 25. "DPSE5,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 5" rbitfld.long 0x8 24. "DPSE6,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 6" newline rbitfld.long 0x8 23. "DPSE7,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 7" rbitfld.long 0x8 22. "DPME0,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 0" newline rbitfld.long 0x8 21. "DPME1,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 1" rbitfld.long 0x8 20. "DPME2,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 2" newline rbitfld.long 0x8 19. "DPME3,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 3" rbitfld.long 0x8 18. "DPME4,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 4" newline rbitfld.long 0x8 17. "DPME5,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 5" rbitfld.long 0x8 16. "DPME6,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 6" newline rbitfld.long 0x8 15. "DPME7,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 7" rbitfld.long 0x8 12.--14. "SLV,Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 8.--11. 1. "MST,Master ID" hexmask.long.byte 0x8 0.--7. 1. "SYN,Syndrome" rgroup.long 0xC++0x3 line.long 0x0 "EAR,XBIC Error Address" hexmask.long 0x0 0.--31. 1. "ADDR,Error Address" tree.end tree "XBIC_AXBS_TCM" base ad:0x40400000 group.long 0x0++0xB line.long 0x0 "MCR,XBIC Module Control" bitfld.long 0x0 31. "SE0,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 30. "SE1,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 29. "SE2,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 23. "ME0,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." line.long 0x4 "EIR,XBIC Error Injection" bitfld.long 0x4 31. "EIE,Error Injection Enable" "0: Error injection disabled,1: Error injection enabled" bitfld.long 0x4 12.--14. "SLV,Target Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--11. 1. "MST,Target Master ID" hexmask.long.byte 0x4 0.--7. 1. "SYN,Syndrome" line.long 0x8 "ESR,XBIC Error Status" eventfld.long 0x8 31. "VLD,Error Status Valid" "0: No error detected-other fields of the ESR and..,1: Error detected-all fields of the ESR and EAR.." rbitfld.long 0x8 30. "DPSE0,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 0" newline rbitfld.long 0x8 29. "DPSE1,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 1" rbitfld.long 0x8 28. "DPSE2,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 2" newline rbitfld.long 0x8 27. "DPSE3,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 3" rbitfld.long 0x8 26. "DPSE4,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 4" newline rbitfld.long 0x8 25. "DPSE5,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 5" rbitfld.long 0x8 24. "DPSE6,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 6" newline rbitfld.long 0x8 23. "DPSE7,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 7" rbitfld.long 0x8 22. "DPME0,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 0" newline rbitfld.long 0x8 21. "DPME1,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 1" rbitfld.long 0x8 20. "DPME2,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 2" newline rbitfld.long 0x8 19. "DPME3,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 3" rbitfld.long 0x8 18. "DPME4,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 4" newline rbitfld.long 0x8 17. "DPME5,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 5" rbitfld.long 0x8 16. "DPME6,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 6" newline rbitfld.long 0x8 15. "DPME7,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 7" rbitfld.long 0x8 12.--14. "SLV,Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 8.--11. 1. "MST,Master ID" hexmask.long.byte 0x8 0.--7. 1. "SYN,Syndrome" rgroup.long 0xC++0x3 line.long 0x0 "EAR,XBIC Error Address" hexmask.long 0x0 0.--31. 1. "ADDR,Error Address" tree.end tree "ZIPWIRE_XBIC (XBIC)" base ad:0x40678000 group.long 0x0++0xB line.long 0x0 "MCR,XBIC Module Control" bitfld.long 0x0 31. "SE0,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." bitfld.long 0x0 30. "SE1,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.." newline bitfld.long 0x0 23. "ME0,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.." line.long 0x4 "EIR,XBIC Error Injection" bitfld.long 0x4 31. "EIE,Error Injection Enable" "0: Error injection disabled,1: Error injection enabled" bitfld.long 0x4 12.--14. "SLV,Target Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--11. 1. "MST,Target Master ID" hexmask.long.byte 0x4 0.--7. 1. "SYN,Syndrome" line.long 0x8 "ESR,XBIC Error Status" eventfld.long 0x8 31. "VLD,Error Status Valid" "0: No error detected-other fields of the ESR and..,1: Error detected-all fields of the ESR and EAR.." rbitfld.long 0x8 30. "DPSE0,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 0" newline rbitfld.long 0x8 29. "DPSE1,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 1" rbitfld.long 0x8 28. "DPSE2,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 2" newline rbitfld.long 0x8 27. "DPSE3,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 3" rbitfld.long 0x8 26. "DPSE4,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 4" newline rbitfld.long 0x8 25. "DPSE5,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 5" rbitfld.long 0x8 24. "DPSE6,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 6" newline rbitfld.long 0x8 23. "DPSE7,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 7" rbitfld.long 0x8 22. "DPME0,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 0" newline rbitfld.long 0x8 21. "DPME1,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 1" rbitfld.long 0x8 20. "DPME2,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 2" newline rbitfld.long 0x8 19. "DPME3,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 3" rbitfld.long 0x8 18. "DPME4,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 4" newline rbitfld.long 0x8 17. "DPME5,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 5" rbitfld.long 0x8 16. "DPME6,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 6" newline rbitfld.long 0x8 15. "DPME7,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 7" rbitfld.long 0x8 12.--14. "SLV,Slave Port" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 8.--11. 1. "MST,Master ID" hexmask.long.byte 0x8 0.--7. 1. "SYN,Syndrome" rgroup.long 0xC++0x3 line.long 0x0 "EAR,XBIC Error Address" hexmask.long 0x0 0.--31. 1. "ADDR,Error Address" tree.end tree.end tree "XRDC (Extended Resource Domain Controller)" base ad:0x40278000 group.long 0x0++0x3 line.long 0x0 "CR,Control" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" rbitfld.long 0x0 8. "VAW,Virtualization Aware" "0: Not virtualization-aware,1: Virtualization-aware" newline rbitfld.long 0x0 7. "MRF,Memory Region Format" "?,1: SMPU family format" hexmask.long.byte 0x0 1.--4. 1. "HRL,Hardware Revision Level" newline bitfld.long 0x0 0. "GVLD,Global Valid (XRDC Global Enable/Disable)" "0: Disables,1: Enables" rgroup.long 0xF0++0xB line.long 0x0 "HWCFG0,Hardware Configuration 0" hexmask.long.byte 0x0 28.--31. 1. "MID,Module ID" hexmask.long.byte 0x0 24.--27. 1. "NPAC,Number Of PACs" newline hexmask.long.byte 0x0 16.--23. 1. "NMRC,Number of MRCs" hexmask.long.byte 0x0 8.--15. 1. "NMSTR,Number Of Bus Masters" newline hexmask.long.byte 0x0 0.--7. 1. "NDID,Number Of DIDs" line.long 0x4 "HWCFG1,Hardware Configuration 1" hexmask.long.byte 0x4 0.--3. 1. "DID,Domain Identifier" line.long 0x8 "HWCFG2,Hardware Configuration 2" bitfld.long 0x8 31. "PIDP31,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 30. "PIDP30,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 29. "PIDP29,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 28. "PIDP28,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 27. "PIDP27,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 26. "PIDP26,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 25. "PIDP25,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 24. "PIDP24,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 23. "PIDP23,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 22. "PIDP22,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 21. "PIDP21,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 20. "PIDP20,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 19. "PIDP19,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 18. "PIDP18,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 17. "PIDP17,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 16. "PIDP16,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 15. "PIDP15,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 14. "PIDP14,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 13. "PIDP13,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 12. "PIDP12,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 11. "PIDP11,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 10. "PIDP10,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 9. "PIDP9,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 8. "PIDP8,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 7. "PIDP7,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 6. "PIDP6,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 5. "PIDP5,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 4. "PIDP4,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 3. "PIDP3,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 2. "PIDP2,Process Identifier Present" "0: Does not have PID register,1: Has PID register" newline bitfld.long 0x8 1. "PIDP1,Process Identifier Present" "0: Does not have PID register,1: Has PID register" bitfld.long 0x8 0. "PIDP0,Process Identifier Present" "0: Does not have PID register,1: Has PID register" rgroup.byte 0x100++0x8 line.byte 0x0 "MDACFG0,Master Domain Assignment Configuration" bitfld.byte 0x0 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x0 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" line.byte 0x1 "MDACFG1,Master Domain Assignment Configuration" bitfld.byte 0x1 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x1 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" line.byte 0x2 "MDACFG2,Master Domain Assignment Configuration" bitfld.byte 0x2 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x2 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" line.byte 0x3 "MDACFG3,Master Domain Assignment Configuration" bitfld.byte 0x3 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x3 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" line.byte 0x4 "MDACFG4,Master Domain Assignment Configuration" bitfld.byte 0x4 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x4 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" line.byte 0x5 "MDACFG5,Master Domain Assignment Configuration" bitfld.byte 0x5 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x5 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" line.byte 0x6 "MDACFG6,Master Domain Assignment Configuration" bitfld.byte 0x6 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x6 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" line.byte 0x7 "MDACFG7,Master Domain Assignment Configuration" bitfld.byte 0x7 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x7 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" line.byte 0x8 "MDACFG8,Master Domain Assignment Configuration" bitfld.byte 0x8 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master" hexmask.byte 0x8 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers" rgroup.byte 0x140++0x3 line.byte 0x0 "MRCFG0,Memory Region Configuration" hexmask.byte 0x0 0.--4. 1. "NMRGD,Number Of Memory Region Descriptors" line.byte 0x1 "MRCFG1,Memory Region Configuration" hexmask.byte 0x1 0.--4. 1. "NMRGD,Number Of Memory Region Descriptors" line.byte 0x2 "MRCFG2,Memory Region Configuration" hexmask.byte 0x2 0.--4. 1. "NMRGD,Number Of Memory Region Descriptors" line.byte 0x3 "MRCFG3,Memory Region Configuration" hexmask.byte 0x3 0.--4. 1. "NMRGD,Number Of Memory Region Descriptors" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x200)++0x3 line.long 0x0 "DERRLOC[$1],Domain Error Location" hexmask.long.byte 0x0 16.--19. 1. "PACINST,PAC Instance" hexmask.long.word 0x0 0.--15. 1. "MRCINST,MRC Instance" repeat.end rgroup.long 0x400++0x7 line.long 0x0 "DERR_W0_0,Domain Error Word 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "DERR_W1_0,Domain Error Word 1" bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected" bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access" bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access" newline hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier" group.long 0x40C++0x3 line.long 0x0 "DERR_W3_0,Domain Error Word 3" bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect" rgroup.long 0x410++0x7 line.long 0x0 "DERR_W0_1,Domain Error Word 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "DERR_W1_1,Domain Error Word 1" bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected" bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access" bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access" newline hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier" group.long 0x41C++0x3 line.long 0x0 "DERR_W3_1,Domain Error Word 3" bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect" rgroup.long 0x420++0x7 line.long 0x0 "DERR_W0_2,Domain Error Word 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "DERR_W1_2,Domain Error Word 1" bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected" bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access" bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access" newline hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier" group.long 0x42C++0x3 line.long 0x0 "DERR_W3_2,Domain Error Word 3" bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect" rgroup.long 0x430++0x7 line.long 0x0 "DERR_W0_3,Domain Error Word 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "DERR_W1_3,Domain Error Word 1" bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected" bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access" bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access" newline hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier" group.long 0x43C++0x3 line.long 0x0 "DERR_W3_3,Domain Error Word 3" bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect" rgroup.long 0x500++0x7 line.long 0x0 "DERR_W0_16,Domain Error Word 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "DERR_W1_16,Domain Error Word 1" bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected" bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access" bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access" newline hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier" group.long 0x50C++0x3 line.long 0x0 "DERR_W3_16,Domain Error Word 3" bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect" rgroup.long 0x510++0x7 line.long 0x0 "DERR_W0_17,Domain Error Word 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "DERR_W1_17,Domain Error Word 1" bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected" bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access" bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access" newline hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier" group.long 0x51C++0x3 line.long 0x0 "DERR_W3_17,Domain Error Word 3" bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect" rgroup.long 0x520++0x7 line.long 0x0 "DERR_W0_18,Domain Error Word 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "DERR_W1_18,Domain Error Word 1" bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected" bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access" bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access" newline hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier" group.long 0x52C++0x3 line.long 0x0 "DERR_W3_18,Domain Error Word 3" bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect" rgroup.long 0x530++0x7 line.long 0x0 "DERR_W0_19,Domain Error Word 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "DERR_W1_19,Domain Error Word 1" bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected" bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access" bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access" newline hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier" group.long 0x53C++0x3 line.long 0x0 "DERR_W3_19,Domain Error Word 3" bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect" group.long 0x700++0x3 line.long 0x0 "PID0,Process Identifier" bitfld.long 0x0 29.--30. "LK2,Lock" "0: Any secure privileged write,1: Any secure privileged write,2: Secure privileged writes from master only,3: Locks" bitfld.long 0x0 28. "TSM,Three-State Model" "0,1" newline hexmask.long.byte 0x0 0.--5. 1. "PID,Process Identifier" group.long 0x70C++0x7 line.long 0x0 "PID3,Process Identifier" bitfld.long 0x0 29.--30. "LK2,Lock" "0: Any secure privileged write,1: Any secure privileged write,2: Secure privileged writes from master only,3: Locks" bitfld.long 0x0 28. "TSM,Three-State Model" "0,1" newline hexmask.long.byte 0x0 0.--5. 1. "PID,Process Identifier" line.long 0x4 "PID4,Process Identifier" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Any secure privileged write,1: Any secure privileged write,2: Secure privileged writes from master only,3: Locks" bitfld.long 0x4 28. "TSM,Three-State Model" "0,1" newline hexmask.long.byte 0x4 0.--5. 1. "PID,Process Identifier" group.long 0x718++0x3 line.long 0x0 "PID6,Process Identifier" bitfld.long 0x0 29.--30. "LK2,Lock" "0: Any secure privileged write,1: Any secure privileged write,2: Secure privileged writes from master only,3: Locks" bitfld.long 0x0 28. "TSM,Three-State Model" "0,1" newline hexmask.long.byte 0x0 0.--5. 1. "PID,Process Identifier" group.long 0x800++0x3 line.long 0x0 "MDA_W0_0_DFMT0,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "0: Core bus master domain assignment (DFMT0),?" hexmask.long.byte 0x0 16.--21. 1. "PID,Process Identifier" newline hexmask.long.byte 0x0 8.--13. 1. "PIDM,Process Identifier Mask" bitfld.long 0x0 6.--7. "PE,Process Identifier Enable" "0: No PID is included,1: No PID is included,2: Partial domain hit = (PID & ~PIDM) == (PIDm[PID]..,3: Partial domain hit = ~((PID & ~PIDM) ==.." newline bitfld.long 0x0 4.--5. "DIDS,DID Select" "0: Use the DID field of this register,1: Use the input DID,2: Concatenate bits 3-2 of this register with the..,?" bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x820++0x3 line.long 0x0 "MDA_W0_1_DFMT1,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "?,1: Bus master domain assignment (DFMT1)" bitfld.long 0x0 8. "DIDB,DID Bypass" "0: Bypass DID input,1: Use DID input" newline bitfld.long 0x0 6.--7. "SA,Secure Attribute" "0: Use secure attribute from the master,1: Force to nonsecure,2: Use secure attribute from the master,3: Use secure attribute from the master" bitfld.long 0x0 4.--5. "PA,Privileged Attribute" "0: Use privileged attribute from the master,1: Force to privileged,2: Use privileged attribute from the master,3: Use privileged attribute from the master" newline bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x840++0x3 line.long 0x0 "MDA_W0_2_DFMT1,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "?,1: Bus master domain assignment (DFMT1)" bitfld.long 0x0 8. "DIDB,DID Bypass" "0: Bypass DID input,1: Use DID input" newline bitfld.long 0x0 6.--7. "SA,Secure Attribute" "0: Use secure attribute from the master,1: Force to nonsecure,2: Use secure attribute from the master,3: Use secure attribute from the master" bitfld.long 0x0 4.--5. "PA,Privileged Attribute" "0: Use privileged attribute from the master,1: Force to privileged,2: Use privileged attribute from the master,3: Use privileged attribute from the master" newline bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x860++0x3 line.long 0x0 "MDA_W0_3_DFMT0,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "0: Core bus master domain assignment (DFMT0),?" hexmask.long.byte 0x0 16.--21. 1. "PID,Process Identifier" newline hexmask.long.byte 0x0 8.--13. 1. "PIDM,Process Identifier Mask" bitfld.long 0x0 6.--7. "PE,Process Identifier Enable" "0: No PID is included,1: No PID is included,2: Partial domain hit = (PID & ~PIDM) == (PIDm[PID]..,3: Partial domain hit = ~((PID & ~PIDM) ==.." newline bitfld.long 0x0 4.--5. "DIDS,DID Select" "0: Use the DID field of this register,1: Use the input DID,2: Concatenate bits 3-2 of this register with the..,?" bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x880++0x3 line.long 0x0 "MDA_W0_4_DFMT0,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "0: Core bus master domain assignment (DFMT0),?" hexmask.long.byte 0x0 16.--21. 1. "PID,Process Identifier" newline hexmask.long.byte 0x0 8.--13. 1. "PIDM,Process Identifier Mask" bitfld.long 0x0 6.--7. "PE,Process Identifier Enable" "0: No PID is included,1: No PID is included,2: Partial domain hit = (PID & ~PIDM) == (PIDm[PID]..,3: Partial domain hit = ~((PID & ~PIDM) ==.." newline bitfld.long 0x0 4.--5. "DIDS,DID Select" "0: Use the DID field of this register,1: Use the input DID,2: Concatenate bits 3-2 of this register with the..,?" bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x8A0++0x3 line.long 0x0 "MDA_W0_5_DFMT1,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "?,1: Bus master domain assignment (DFMT1)" bitfld.long 0x0 8. "DIDB,DID Bypass" "0: Bypass DID input,1: Use DID input" newline bitfld.long 0x0 6.--7. "SA,Secure Attribute" "0: Use secure attribute from the master,1: Force to nonsecure,2: Use secure attribute from the master,3: Use secure attribute from the master" bitfld.long 0x0 4.--5. "PA,Privileged Attribute" "0: Use privileged attribute from the master,1: Force to privileged,2: Use privileged attribute from the master,3: Use privileged attribute from the master" newline bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x8C0++0x3 line.long 0x0 "MDA_W0_6_DFMT0,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "0: Core bus master domain assignment (DFMT0),?" hexmask.long.byte 0x0 16.--21. 1. "PID,Process Identifier" newline hexmask.long.byte 0x0 8.--13. 1. "PIDM,Process Identifier Mask" bitfld.long 0x0 6.--7. "PE,Process Identifier Enable" "0: No PID is included,1: No PID is included,2: Partial domain hit = (PID & ~PIDM) == (PIDm[PID]..,3: Partial domain hit = ~((PID & ~PIDM) ==.." newline bitfld.long 0x0 4.--5. "DIDS,DID Select" "0: Use the DID field of this register,1: Use the input DID,2: Concatenate bits 3-2 of this register with the..,?" bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x8E0++0x3 line.long 0x0 "MDA_W0_7_DFMT1,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "?,1: Bus master domain assignment (DFMT1)" bitfld.long 0x0 8. "DIDB,DID Bypass" "0: Bypass DID input,1: Use DID input" newline bitfld.long 0x0 6.--7. "SA,Secure Attribute" "0: Use secure attribute from the master,1: Force to nonsecure,2: Use secure attribute from the master,3: Use secure attribute from the master" bitfld.long 0x0 4.--5. "PA,Privileged Attribute" "0: Use privileged attribute from the master,1: Force to privileged,2: Use privileged attribute from the master,3: Use privileged attribute from the master" newline bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x900++0x3 line.long 0x0 "MDA_W0_8_DFMT1,Master Domain Assignment" bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks" newline rbitfld.long 0x0 29. "DFMT,Domain Format" "?,1: Bus master domain assignment (DFMT1)" bitfld.long 0x0 8. "DIDB,DID Bypass" "0: Bypass DID input,1: Use DID input" newline bitfld.long 0x0 6.--7. "SA,Secure Attribute" "0: Use secure attribute from the master,1: Force to nonsecure,2: Use secure attribute from the master,3: Use secure attribute from the master" bitfld.long 0x0 4.--5. "PA,Privileged Attribute" "0: Use privileged attribute from the master,1: Force to privileged,2: Use privileged attribute from the master,3: Use privileged attribute from the master" newline bitfld.long 0x0 0.--1. "DID,Domain Identifier" "0,1,2,3" group.long 0x1018++0x8F line.long 0x0 "PDAC_W0_3,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_3,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_4,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_4,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_5,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_5,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_6,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_6,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_7,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_7,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_8,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_8,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_9,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_9,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_10,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_10,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x40 "PDAC_W0_11,Peripheral Domain Access Control Word 0" bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x40 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x44 "PDAC_W1_11,Peripheral Domain Access Control Word 1" bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x48 "PDAC_W0_12,Peripheral Domain Access Control Word 0" bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x48 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4C "PDAC_W1_12,Peripheral Domain Access Control Word 1" bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x50 "PDAC_W0_13,Peripheral Domain Access Control Word 0" bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x50 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x54 "PDAC_W1_13,Peripheral Domain Access Control Word 1" bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x58 "PDAC_W0_14,Peripheral Domain Access Control Word 0" bitfld.long 0x58 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x58 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x58 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x5C "PDAC_W1_14,Peripheral Domain Access Control Word 1" bitfld.long 0x5C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x5C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x60 "PDAC_W0_15,Peripheral Domain Access Control Word 0" bitfld.long 0x60 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x60 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x60 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x60 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x64 "PDAC_W1_15,Peripheral Domain Access Control Word 1" bitfld.long 0x64 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x64 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x68 "PDAC_W0_16,Peripheral Domain Access Control Word 0" bitfld.long 0x68 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x68 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x68 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x6C "PDAC_W1_16,Peripheral Domain Access Control Word 1" bitfld.long 0x6C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x6C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x70 "PDAC_W0_17,Peripheral Domain Access Control Word 0" bitfld.long 0x70 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x70 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x70 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x70 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x74 "PDAC_W1_17,Peripheral Domain Access Control Word 1" bitfld.long 0x74 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x74 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x78 "PDAC_W0_18,Peripheral Domain Access Control Word 0" bitfld.long 0x78 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x78 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x78 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x78 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x7C "PDAC_W1_18,Peripheral Domain Access Control Word 1" bitfld.long 0x7C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x7C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x80 "PDAC_W0_19,Peripheral Domain Access Control Word 0" bitfld.long 0x80 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x80 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x80 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x80 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x80 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x80 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x84 "PDAC_W1_19,Peripheral Domain Access Control Word 1" bitfld.long 0x84 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x84 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x88 "PDAC_W0_20,Peripheral Domain Access Control Word 0" bitfld.long 0x88 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x88 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x88 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x88 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x88 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x88 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x8C "PDAC_W1_20,Peripheral Domain Access Control Word 1" bitfld.long 0x8C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x8C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1100++0x17 line.long 0x0 "PDAC_W0_32,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_32,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_33,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_33,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_34,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_34,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1130++0x5F line.long 0x0 "PDAC_W0_38,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_38,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_39,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_39,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_40,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_40,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_41,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_41,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_42,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_42,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_43,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_43,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_44,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_44,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_45,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_45,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x40 "PDAC_W0_46,Peripheral Domain Access Control Word 0" bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x40 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x44 "PDAC_W1_46,Peripheral Domain Access Control Word 1" bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x48 "PDAC_W0_47,Peripheral Domain Access Control Word 0" bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x48 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4C "PDAC_W1_47,Peripheral Domain Access Control Word 1" bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x50 "PDAC_W0_48,Peripheral Domain Access Control Word 0" bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x50 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x54 "PDAC_W1_48,Peripheral Domain Access Control Word 1" bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x58 "PDAC_W0_49,Peripheral Domain Access Control Word 0" bitfld.long 0x58 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x58 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x58 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x5C "PDAC_W1_49,Peripheral Domain Access Control Word 1" bitfld.long 0x5C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x5C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1400++0xAF line.long 0x0 "PDAC_W0_128,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_128,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_129,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_129,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_130,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_130,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_131,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_131,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_132,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_132,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_133,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_133,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_134,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_134,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_135,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_135,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x40 "PDAC_W0_136,Peripheral Domain Access Control Word 0" bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x40 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x44 "PDAC_W1_136,Peripheral Domain Access Control Word 1" bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x48 "PDAC_W0_137,Peripheral Domain Access Control Word 0" bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x48 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4C "PDAC_W1_137,Peripheral Domain Access Control Word 1" bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x50 "PDAC_W0_138,Peripheral Domain Access Control Word 0" bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x50 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x54 "PDAC_W1_138,Peripheral Domain Access Control Word 1" bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x58 "PDAC_W0_139,Peripheral Domain Access Control Word 0" bitfld.long 0x58 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x58 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x58 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x5C "PDAC_W1_139,Peripheral Domain Access Control Word 1" bitfld.long 0x5C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x5C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x60 "PDAC_W0_140,Peripheral Domain Access Control Word 0" bitfld.long 0x60 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x60 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x60 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x60 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x64 "PDAC_W1_140,Peripheral Domain Access Control Word 1" bitfld.long 0x64 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x64 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x68 "PDAC_W0_141,Peripheral Domain Access Control Word 0" bitfld.long 0x68 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x68 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x68 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x6C "PDAC_W1_141,Peripheral Domain Access Control Word 1" bitfld.long 0x6C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x6C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x70 "PDAC_W0_142,Peripheral Domain Access Control Word 0" bitfld.long 0x70 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x70 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x70 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x70 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x74 "PDAC_W1_142,Peripheral Domain Access Control Word 1" bitfld.long 0x74 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x74 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x78 "PDAC_W0_143,Peripheral Domain Access Control Word 0" bitfld.long 0x78 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x78 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x78 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x78 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x7C "PDAC_W1_143,Peripheral Domain Access Control Word 1" bitfld.long 0x7C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x7C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x80 "PDAC_W0_144,Peripheral Domain Access Control Word 0" bitfld.long 0x80 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x80 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x80 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x80 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x80 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x80 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x84 "PDAC_W1_144,Peripheral Domain Access Control Word 1" bitfld.long 0x84 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x84 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x88 "PDAC_W0_145,Peripheral Domain Access Control Word 0" bitfld.long 0x88 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x88 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x88 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x88 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x88 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x88 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x8C "PDAC_W1_145,Peripheral Domain Access Control Word 1" bitfld.long 0x8C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x8C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x90 "PDAC_W0_146,Peripheral Domain Access Control Word 0" bitfld.long 0x90 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x90 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x90 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x90 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x90 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x90 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x94 "PDAC_W1_146,Peripheral Domain Access Control Word 1" bitfld.long 0x94 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x94 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x98 "PDAC_W0_147,Peripheral Domain Access Control Word 0" bitfld.long 0x98 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x98 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x98 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x98 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x98 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x98 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x9C "PDAC_W1_147,Peripheral Domain Access Control Word 1" bitfld.long 0x9C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x9C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0xA0 "PDAC_W0_148,Peripheral Domain Access Control Word 0" bitfld.long 0xA0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0xA0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0xA0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0xA0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xA4 "PDAC_W1_148,Peripheral Domain Access Control Word 1" bitfld.long 0xA4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xA4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0xA8 "PDAC_W0_149,Peripheral Domain Access Control Word 0" bitfld.long 0xA8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0xA8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0xA8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0xA8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xAC "PDAC_W1_149,Peripheral Domain Access Control Word 1" bitfld.long 0xAC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xAC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x14B8++0xA7 line.long 0x0 "PDAC_W0_151,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_151,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_152,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_152,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_153,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_153,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_154,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_154,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_155,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_155,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_156,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_156,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_157,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_157,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_158,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_158,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x40 "PDAC_W0_159,Peripheral Domain Access Control Word 0" bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x40 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x44 "PDAC_W1_159,Peripheral Domain Access Control Word 1" bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x48 "PDAC_W0_160,Peripheral Domain Access Control Word 0" bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x48 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4C "PDAC_W1_160,Peripheral Domain Access Control Word 1" bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x50 "PDAC_W0_161,Peripheral Domain Access Control Word 0" bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x50 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x54 "PDAC_W1_161,Peripheral Domain Access Control Word 1" bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x58 "PDAC_W0_162,Peripheral Domain Access Control Word 0" bitfld.long 0x58 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x58 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x58 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x5C "PDAC_W1_162,Peripheral Domain Access Control Word 1" bitfld.long 0x5C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x5C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x60 "PDAC_W0_163,Peripheral Domain Access Control Word 0" bitfld.long 0x60 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x60 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x60 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x60 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x64 "PDAC_W1_163,Peripheral Domain Access Control Word 1" bitfld.long 0x64 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x64 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x68 "PDAC_W0_164,Peripheral Domain Access Control Word 0" bitfld.long 0x68 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x68 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x68 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x6C "PDAC_W1_164,Peripheral Domain Access Control Word 1" bitfld.long 0x6C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x6C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x70 "PDAC_W0_165,Peripheral Domain Access Control Word 0" bitfld.long 0x70 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x70 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x70 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x70 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x74 "PDAC_W1_165,Peripheral Domain Access Control Word 1" bitfld.long 0x74 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x74 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x78 "PDAC_W0_166,Peripheral Domain Access Control Word 0" bitfld.long 0x78 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x78 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x78 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x78 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x7C "PDAC_W1_166,Peripheral Domain Access Control Word 1" bitfld.long 0x7C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x7C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x80 "PDAC_W0_167,Peripheral Domain Access Control Word 0" bitfld.long 0x80 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x80 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x80 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x80 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x80 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x80 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x84 "PDAC_W1_167,Peripheral Domain Access Control Word 1" bitfld.long 0x84 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x84 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x88 "PDAC_W0_168,Peripheral Domain Access Control Word 0" bitfld.long 0x88 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x88 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x88 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x88 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x88 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x88 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x8C "PDAC_W1_168,Peripheral Domain Access Control Word 1" bitfld.long 0x8C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x8C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x90 "PDAC_W0_169,Peripheral Domain Access Control Word 0" bitfld.long 0x90 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x90 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x90 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x90 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x90 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x90 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x94 "PDAC_W1_169,Peripheral Domain Access Control Word 1" bitfld.long 0x94 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x94 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x98 "PDAC_W0_170,Peripheral Domain Access Control Word 0" bitfld.long 0x98 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x98 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x98 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x98 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x98 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x98 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x9C "PDAC_W1_170,Peripheral Domain Access Control Word 1" bitfld.long 0x9C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x9C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0xA0 "PDAC_W0_171,Peripheral Domain Access Control Word 0" bitfld.long 0xA0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0xA0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0xA0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0xA0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xA4 "PDAC_W1_171,Peripheral Domain Access Control Word 1" bitfld.long 0xA4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xA4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1568++0x7 line.long 0x0 "PDAC_W0_173,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_173,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1578++0x7 line.long 0x0 "PDAC_W0_175,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_175,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1590++0x7 line.long 0x0 "PDAC_W0_178,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_178,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x15A0++0x27 line.long 0x0 "PDAC_W0_180,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_180,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_181,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_181,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_182,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_182,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_183,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_183,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_184,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_184,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x15D0++0x2F line.long 0x0 "PDAC_W0_186,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_186,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_187,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_187,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_188,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_188,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_189,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_189,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_190,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_190,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_191,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_191,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1608++0x2F line.long 0x0 "PDAC_W0_193,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_193,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_194,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_194,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_195,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_195,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_196,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_196,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_197,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_197,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_198,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_198,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1648++0x27 line.long 0x0 "PDAC_W0_201,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_201,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_202,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_202,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_203,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_203,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_204,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_204,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_205,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_205,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x16A0++0x2F line.long 0x0 "PDAC_W0_212,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_212,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_213,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_213,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_214,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_214,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_215,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_215,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_216,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_216,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_217,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_217,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x16E0++0xF line.long 0x0 "PDAC_W0_220,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_220,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_221,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_221,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x16F8++0x27 line.long 0x0 "PDAC_W0_223,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_223,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_224,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_224,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_225,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_225,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_226,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_226,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_227,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_227,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1728++0x3F line.long 0x0 "PDAC_W0_229,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_229,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_230,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_230,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_231,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_231,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_232,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_232,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_233,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_233,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_234,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_234,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_235,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_235,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_236,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_236,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1770++0x7 line.long 0x0 "PDAC_W0_238,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_238,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1800++0xF line.long 0x0 "PDAC_W0_256,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_256,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_257,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_257,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1820++0xAF line.long 0x0 "PDAC_W0_260,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_260,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_261,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_261,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_262,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_262,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_263,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_263,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_264,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_264,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_265,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_265,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_266,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_266,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_267,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_267,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x40 "PDAC_W0_268,Peripheral Domain Access Control Word 0" bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x40 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x44 "PDAC_W1_268,Peripheral Domain Access Control Word 1" bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x48 "PDAC_W0_269,Peripheral Domain Access Control Word 0" bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x48 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4C "PDAC_W1_269,Peripheral Domain Access Control Word 1" bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x50 "PDAC_W0_270,Peripheral Domain Access Control Word 0" bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x50 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x54 "PDAC_W1_270,Peripheral Domain Access Control Word 1" bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x58 "PDAC_W0_271,Peripheral Domain Access Control Word 0" bitfld.long 0x58 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x58 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x58 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x5C "PDAC_W1_271,Peripheral Domain Access Control Word 1" bitfld.long 0x5C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x5C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x60 "PDAC_W0_272,Peripheral Domain Access Control Word 0" bitfld.long 0x60 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x60 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x60 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x60 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x64 "PDAC_W1_272,Peripheral Domain Access Control Word 1" bitfld.long 0x64 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x64 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x68 "PDAC_W0_273,Peripheral Domain Access Control Word 0" bitfld.long 0x68 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x68 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x68 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x6C "PDAC_W1_273,Peripheral Domain Access Control Word 1" bitfld.long 0x6C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x6C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x70 "PDAC_W0_274,Peripheral Domain Access Control Word 0" bitfld.long 0x70 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x70 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x70 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x70 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x74 "PDAC_W1_274,Peripheral Domain Access Control Word 1" bitfld.long 0x74 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x74 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x78 "PDAC_W0_275,Peripheral Domain Access Control Word 0" bitfld.long 0x78 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x78 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x78 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x78 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x7C "PDAC_W1_275,Peripheral Domain Access Control Word 1" bitfld.long 0x7C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x7C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x80 "PDAC_W0_276,Peripheral Domain Access Control Word 0" bitfld.long 0x80 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x80 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x80 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x80 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x80 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x80 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x84 "PDAC_W1_276,Peripheral Domain Access Control Word 1" bitfld.long 0x84 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x84 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x88 "PDAC_W0_277,Peripheral Domain Access Control Word 0" bitfld.long 0x88 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x88 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x88 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x88 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x88 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x88 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x8C "PDAC_W1_277,Peripheral Domain Access Control Word 1" bitfld.long 0x8C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x8C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x90 "PDAC_W0_278,Peripheral Domain Access Control Word 0" bitfld.long 0x90 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x90 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x90 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x90 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x90 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x90 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x94 "PDAC_W1_278,Peripheral Domain Access Control Word 1" bitfld.long 0x94 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x94 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x98 "PDAC_W0_279,Peripheral Domain Access Control Word 0" bitfld.long 0x98 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x98 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x98 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x98 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x98 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x98 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x9C "PDAC_W1_279,Peripheral Domain Access Control Word 1" bitfld.long 0x9C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x9C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0xA0 "PDAC_W0_280,Peripheral Domain Access Control Word 0" bitfld.long 0xA0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0xA0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0xA0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0xA0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xA4 "PDAC_W1_280,Peripheral Domain Access Control Word 1" bitfld.long 0xA4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xA4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0xA8 "PDAC_W0_281,Peripheral Domain Access Control Word 0" bitfld.long 0xA8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0xA8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0xA8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0xA8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xAC "PDAC_W1_281,Peripheral Domain Access Control Word 1" bitfld.long 0xAC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xAC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x18D8++0x1F line.long 0x0 "PDAC_W0_283,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_283,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_284,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_284,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_285,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_285,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_286,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_286,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1900++0x7 line.long 0x0 "PDAC_W0_288,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_288,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1978++0xF line.long 0x0 "PDAC_W0_303,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_303,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_304,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_304,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1998++0x7 line.long 0x0 "PDAC_W0_307,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_307,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x19D8++0x17 line.long 0x0 "PDAC_W0_315,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_315,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_316,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_316,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_317,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_317,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1A08++0x57 line.long 0x0 "PDAC_W0_321,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_321,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_322,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_322,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_323,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_323,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_324,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_324,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_325,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_325,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_326,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_326,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_327,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_327,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_328,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_328,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x40 "PDAC_W0_329,Peripheral Domain Access Control Word 0" bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x40 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x44 "PDAC_W1_329,Peripheral Domain Access Control Word 1" bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x48 "PDAC_W0_330,Peripheral Domain Access Control Word 0" bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x48 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4C "PDAC_W1_330,Peripheral Domain Access Control Word 1" bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x50 "PDAC_W0_331,Peripheral Domain Access Control Word 0" bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x50 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x54 "PDAC_W1_331,Peripheral Domain Access Control Word 1" bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1C00++0x7F line.long 0x0 "PDAC_W0_384,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_384,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_385,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_385,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_386,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_386,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_387,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_387,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_388,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_388,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_389,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_389,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_390,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_390,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_391,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_391,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x40 "PDAC_W0_392,Peripheral Domain Access Control Word 0" bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x40 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x44 "PDAC_W1_392,Peripheral Domain Access Control Word 1" bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x48 "PDAC_W0_393,Peripheral Domain Access Control Word 0" bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x48 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4C "PDAC_W1_393,Peripheral Domain Access Control Word 1" bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x50 "PDAC_W0_394,Peripheral Domain Access Control Word 0" bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x50 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x54 "PDAC_W1_394,Peripheral Domain Access Control Word 1" bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x58 "PDAC_W0_395,Peripheral Domain Access Control Word 0" bitfld.long 0x58 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x58 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x58 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x5C "PDAC_W1_395,Peripheral Domain Access Control Word 1" bitfld.long 0x5C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x5C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x60 "PDAC_W0_396,Peripheral Domain Access Control Word 0" bitfld.long 0x60 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x60 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x60 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x60 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x64 "PDAC_W1_396,Peripheral Domain Access Control Word 1" bitfld.long 0x64 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x64 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x68 "PDAC_W0_397,Peripheral Domain Access Control Word 0" bitfld.long 0x68 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x68 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x68 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x6C "PDAC_W1_397,Peripheral Domain Access Control Word 1" bitfld.long 0x6C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x6C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x70 "PDAC_W0_398,Peripheral Domain Access Control Word 0" bitfld.long 0x70 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x70 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x70 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x70 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x70 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x74 "PDAC_W1_398,Peripheral Domain Access Control Word 1" bitfld.long 0x74 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x74 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x78 "PDAC_W0_399,Peripheral Domain Access Control Word 0" bitfld.long 0x78 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x78 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x78 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x78 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x78 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x7C "PDAC_W1_399,Peripheral Domain Access Control Word 1" bitfld.long 0x7C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x7C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1CE8++0xF line.long 0x0 "PDAC_W0_413,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_413,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_414,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_414,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1D00++0x7 line.long 0x0 "PDAC_W0_416,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_416,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1D10++0x1F line.long 0x0 "PDAC_W0_418,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_418,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_419,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_419,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_420,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_420,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_421,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_421,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1D40++0xF line.long 0x0 "PDAC_W0_424,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_424,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_425,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_425,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1D60++0x7 line.long 0x0 "PDAC_W0_428,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_428,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1D70++0x6F line.long 0x0 "PDAC_W0_430,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_430,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_431,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_431,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_432,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_432,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_433,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_433,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_434,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_434,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x28 "PDAC_W0_435,Peripheral Domain Access Control Word 0" bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x28 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x2C "PDAC_W1_435,Peripheral Domain Access Control Word 1" bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x30 "PDAC_W0_436,Peripheral Domain Access Control Word 0" bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x30 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x34 "PDAC_W1_436,Peripheral Domain Access Control Word 1" bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x38 "PDAC_W0_437,Peripheral Domain Access Control Word 0" bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x38 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x3C "PDAC_W1_437,Peripheral Domain Access Control Word 1" bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x40 "PDAC_W0_438,Peripheral Domain Access Control Word 0" bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x40 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x44 "PDAC_W1_438,Peripheral Domain Access Control Word 1" bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x48 "PDAC_W0_439,Peripheral Domain Access Control Word 0" bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x48 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4C "PDAC_W1_439,Peripheral Domain Access Control Word 1" bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x50 "PDAC_W0_440,Peripheral Domain Access Control Word 0" bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x50 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x54 "PDAC_W1_440,Peripheral Domain Access Control Word 1" bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x58 "PDAC_W0_441,Peripheral Domain Access Control Word 0" bitfld.long 0x58 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x58 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x58 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x5C "PDAC_W1_441,Peripheral Domain Access Control Word 1" bitfld.long 0x5C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x5C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x60 "PDAC_W0_442,Peripheral Domain Access Control Word 0" bitfld.long 0x60 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x60 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x60 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x60 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x60 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x64 "PDAC_W1_442,Peripheral Domain Access Control Word 1" bitfld.long 0x64 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x64 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x68 "PDAC_W0_443,Peripheral Domain Access Control Word 0" bitfld.long 0x68 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x68 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x68 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x68 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x6C "PDAC_W1_443,Peripheral Domain Access Control Word 1" bitfld.long 0x6C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x6C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x1DE8++0x27 line.long 0x0 "PDAC_W0_445,Peripheral Domain Access Control Word 0" bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x0 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x4 "PDAC_W1_445,Peripheral Domain Access Control Word 1" bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x8 "PDAC_W0_446,Peripheral Domain Access Control Word 0" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "PDAC_W1_446,Peripheral Domain Access Control Word 1" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x10 "PDAC_W0_447,Peripheral Domain Access Control Word 0" bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x10 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x14 "PDAC_W1_447,Peripheral Domain Access Control Word 1" bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x18 "PDAC_W0_448,Peripheral Domain Access Control Word 0" bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x18 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x1C "PDAC_W1_448,Peripheral Domain Access Control Word 1" bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" line.long 0x20 "PDAC_W0_449,Peripheral Domain Access Control Word 0" bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x20 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0x24 "PDAC_W1_449,Peripheral Domain Access Control Word 1" bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)" group.long 0x2000++0xF line.long 0x0 "MRGD_W0_0,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_0,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_0,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_0,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2020++0xF line.long 0x0 "MRGD_W0_1,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_1,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_1,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_1,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2040++0xF line.long 0x0 "MRGD_W0_2,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_2,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_2,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_2,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2060++0xF line.long 0x0 "MRGD_W0_3,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_3,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_3,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_3,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2080++0xF line.long 0x0 "MRGD_W0_4,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_4,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_4,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_4,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x20A0++0xF line.long 0x0 "MRGD_W0_5,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_5,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_5,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_5,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x20C0++0xF line.long 0x0 "MRGD_W0_6,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_6,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_6,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_6,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x20E0++0xF line.long 0x0 "MRGD_W0_7,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_7,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_7,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_7,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2100++0xF line.long 0x0 "MRGD_W0_8,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_8,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_8,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_8,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2120++0xF line.long 0x0 "MRGD_W0_9,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_9,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_9,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_9,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2140++0xF line.long 0x0 "MRGD_W0_10,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_10,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_10,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_10,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2160++0xF line.long 0x0 "MRGD_W0_11,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_11,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_11,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_11,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2180++0xF line.long 0x0 "MRGD_W0_12,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_12,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_12,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_12,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x21A0++0xF line.long 0x0 "MRGD_W0_13,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_13,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_13,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_13,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x21C0++0xF line.long 0x0 "MRGD_W0_14,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_14,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_14,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_14,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x21E0++0xF line.long 0x0 "MRGD_W0_15,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_15,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_15,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_15,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2200++0xF line.long 0x0 "MRGD_W0_16,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_16,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_16,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_16,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2220++0xF line.long 0x0 "MRGD_W0_17,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_17,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_17,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_17,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2240++0xF line.long 0x0 "MRGD_W0_18,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_18,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_18,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_18,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2260++0xF line.long 0x0 "MRGD_W0_19,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_19,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_19,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_19,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2280++0xF line.long 0x0 "MRGD_W0_20,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_20,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_20,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_20,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x22A0++0xF line.long 0x0 "MRGD_W0_21,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_21,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_21,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_21,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x22C0++0xF line.long 0x0 "MRGD_W0_22,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_22,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_22,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_22,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x22E0++0xF line.long 0x0 "MRGD_W0_23,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_23,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_23,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_23,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2300++0xF line.long 0x0 "MRGD_W0_24,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_24,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_24,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_24,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2320++0xF line.long 0x0 "MRGD_W0_25,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_25,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_25,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_25,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2340++0xF line.long 0x0 "MRGD_W0_26,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_26,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_26,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_26,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2360++0xF line.long 0x0 "MRGD_W0_27,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_27,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_27,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_27,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2380++0xF line.long 0x0 "MRGD_W0_28,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_28,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_28,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_28,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x23A0++0xF line.long 0x0 "MRGD_W0_29,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_29,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_29,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_29,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x23C0++0xF line.long 0x0 "MRGD_W0_30,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_30,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_30,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_30,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x23E0++0xF line.long 0x0 "MRGD_W0_31,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_31,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_31,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_31,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2400++0xF line.long 0x0 "MRGD_W0_32,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_32,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_32,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_32,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2420++0xF line.long 0x0 "MRGD_W0_33,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_33,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_33,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_33,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2440++0xF line.long 0x0 "MRGD_W0_34,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_34,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_34,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_34,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2460++0xF line.long 0x0 "MRGD_W0_35,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_35,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_35,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_35,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2600++0xF line.long 0x0 "MRGD_W0_48,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_48,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_48,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_48,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2620++0xF line.long 0x0 "MRGD_W0_49,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_49,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_49,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_49,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2640++0xF line.long 0x0 "MRGD_W0_50,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_50,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_50,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_50,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2660++0xF line.long 0x0 "MRGD_W0_51,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_51,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_51,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_51,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2680++0xF line.long 0x0 "MRGD_W0_52,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_52,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_52,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_52,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x26A0++0xF line.long 0x0 "MRGD_W0_53,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_53,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_53,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_53,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x26C0++0xF line.long 0x0 "MRGD_W0_54,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_54,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_54,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_54,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x26E0++0xF line.long 0x0 "MRGD_W0_55,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_55,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_55,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_55,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2700++0xF line.long 0x0 "MRGD_W0_56,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_56,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_56,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_56,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2720++0xF line.long 0x0 "MRGD_W0_57,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_57,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_57,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_57,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2740++0xF line.long 0x0 "MRGD_W0_58,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_58,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_58,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_58,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2760++0xF line.long 0x0 "MRGD_W0_59,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_59,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_59,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_59,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x2780++0xF line.long 0x0 "MRGD_W0_60,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_60,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_60,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_60,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x27A0++0xF line.long 0x0 "MRGD_W0_61,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_61,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_61,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_61,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x27C0++0xF line.long 0x0 "MRGD_W0_62,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_62,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_62,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_62,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" group.long 0x27E0++0xF line.long 0x0 "MRGD_W0_63,Memory Region Descriptor Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "MRGD_W1_63,Memory Region Descriptor Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "MRGD_W2_63,Memory Region Descriptor Word 2" bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables" hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number" newline bitfld.long 0x8 9.--11. "D3ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. "D2ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7" line.long 0xC "MRGD_W3_63,Memory Region Descriptor Word 3" bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid" bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)" tree.end newline AUTOINDENT.OFF