From f5b55f4a7e9ad7379e54090e9af63002e07e2311 Mon Sep 17 00:00:00 2001 From: woody Date: Mon, 26 Jan 2026 22:30:25 +0900 Subject: [PATCH] Update IPL Code --- .../20200801}/Gen4_ICUMX_Loader/.gitignore | 0 .../20200801}/Gen4_ICUMX_Loader/Makefile | 0 .../Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c | 0 .../Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c | 0 .../Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c | 0 .../Gen4_ICUMX_Loader/common/crc32.c | 0 .../Gen4_ICUMX_Loader/common/log/log.c | 0 .../Gen4_ICUMX_Loader/common/log/scif.c | 0 .../common/scmt_checkpoint.c | 0 .../common/timer/micro_wait.c | 0 .../Gen4_ICUMX_Loader/common/timer/scmt.c | 0 .../Gen4_ICUMX_Loader/cpu_on/cpu_on.c | 0 .../Mobis/20200801}/Gen4_ICUMX_Loader/dos.mk | 0 .../Mobis/20200801}/Gen4_ICUMX_Loader/env.ini | 0 .../Gen4_ICUMX_Loader/image_load/android_ab.c | 0 .../Gen4_ICUMX_Loader/image_load/image_load.c | 0 .../image_load/image_load_emmc.c | 0 .../image_load/image_load_flash.c | 0 .../include/access_protection.h | 0 .../Gen4_ICUMX_Loader/include/android_ab.h | 0 .../include/android_bootloader_message.h | 0 .../include/ap_system_core_register.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/avs.h | 0 .../Gen4_ICUMX_Loader/include/axmm_register.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/bit.h | 0 .../Gen4_ICUMX_Loader/include/cnf_tbl.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/cpg.h | 0 .../Gen4_ICUMX_Loader/include/cpg_register.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/cpu.h | 0 .../Gen4_ICUMX_Loader/include/cpu_on.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/crc.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/dma.h | 0 .../Gen4_ICUMX_Loader/include/dma_register.h | 0 .../Gen4_ICUMX_Loader/include/emmc_boot.h | 0 .../Gen4_ICUMX_Loader/include/emmc_config.h | 0 .../Gen4_ICUMX_Loader/include/emmc_def.h | 0 .../Gen4_ICUMX_Loader/include/emmc_hal.h | 0 .../include/emmc_multiboot.h | 0 .../include/emmc_registers.h | 0 .../Gen4_ICUMX_Loader/include/emmc_std.h | 0 .../Gen4_ICUMX_Loader/include/fcpr.h | 0 .../Gen4_ICUMX_Loader/include/fcpr_register.h | 0 .../Gen4_ICUMX_Loader/include/gpio.h | 0 .../include/hscif_register.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/i2c.h | 0 .../Gen4_ICUMX_Loader/include/i2c_register.h | 0 .../Gen4_ICUMX_Loader/include/image_load.h | 0 .../include/image_load_emmc.h | 0 .../include/image_load_flash.h | 0 .../Gen4_ICUMX_Loader/include/inline_asm.h | 0 .../Gen4_ICUMX_Loader/include/intc.h | 0 .../Gen4_ICUMX_Loader/include/intc_id.h | 0 .../Gen4_ICUMX_Loader/include/ip_control.h | 0 .../Gen4_ICUMX_Loader/include/loader_main.h | 0 .../include/loader_main_common.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/log.h | 0 .../Gen4_ICUMX_Loader/include/mcu_register.h | 0 .../Gen4_ICUMX_Loader/include/mem_io.h | 0 .../Gen4_ICUMX_Loader/include/mfis.h | 0 .../Gen4_ICUMX_Loader/include/mfis_register.h | 0 .../Gen4_ICUMX_Loader/include/micro_wait.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/pfc.h | 0 .../Gen4_ICUMX_Loader/include/pfc_register.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/qos.h | 0 .../Gen4_ICUMX_Loader/include/ram_def.h | 0 .../include/ram_protection.h | 0 .../Gen4_ICUMX_Loader/include/rcar_def.h | 0 .../Gen4_ICUMX_Loader/include/remap.h | 0 .../include/remap_register.h | 0 .../Gen4_ICUMX_Loader/include/rom_api.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/rpc.h | 0 .../Gen4_ICUMX_Loader/include/rpc_register.h | 0 .../Gen4_ICUMX_Loader/include/rpcqspidrv.h | 0 .../Gen4_ICUMX_Loader/include/rst_register.h | 0 .../include/rtsram_register.h | 0 .../Gen4_ICUMX_Loader/include/rtvram.h | 0 .../include/rtvram_register.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/san.h | 0 .../Gen4_ICUMX_Loader/include/scif.h | 0 .../Gen4_ICUMX_Loader/include/scif_register.h | 0 .../Gen4_ICUMX_Loader/include/scmt.h | 0 .../include/scmt_checkpoint.h | 0 .../Gen4_ICUMX_Loader/include/scmt_config.h | 0 .../Gen4_ICUMX_Loader/include/scmt_register.h | 0 .../Gen4_ICUMX_Loader/include/spiflash2drv.h | 0 .../Gen4_ICUMX_Loader/include/sysc.h | 0 .../Gen4_ICUMX_Loader/include/types.h | 0 .../Gen4_ICUMX_Loader/include/vect_set.h | 0 .../20200801}/Gen4_ICUMX_Loader/include/wdt.h | 0 .../Gen4_ICUMX_Loader/include/wdt_register.h | 0 .../20200801}/Gen4_ICUMX_Loader/intc/intc.c | 0 .../Gen4_ICUMX_Loader/intc/vect_set.c | 0 .../Gen4_ICUMX_Loader/intc/vecttbl.S | 0 .../20200801}/Gen4_ICUMX_Loader/ip/avs/avs.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/cpg/cpg.c | 0 .../Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h | 0 .../20200801}/Gen4_ICUMX_Loader/ip/ddr/ddr.mk | 0 .../Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c | 0 .../Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h | 0 .../ip/ddr/s4/lpddr4x/boot_init_dram.c | 0 .../ip/ddr/s4/lpddr4x/boot_init_dram_config.c | 0 .../ip/ddr/s4/lpddr4x/boot_init_dram_config.h | 0 .../ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h | 0 .../ip/ddr/s4/lpddr4x/ddr_regdef.h | 0 .../ip/ddr/s4/lpddr4x/ecc_enable_s4.c | 0 .../ip/ddr/s4/lpddr4x/ecc_enable_s4.h | 0 .../ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h | 0 .../ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h | 0 .../ip/ddr/v4h/lpddr5/ecc_enable_v4h.c | 0 .../ip/ddr/v4h/lpddr5/ecc_enable_v4h.h | 0 .../ip/ddr/v4h/lpddr5/ecm_enable_v4h.c | 0 .../ip/ddr/v4h/lpddr5/ecm_enable_v4h.h | 0 .../ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h | 0 .../ip/ddr/v4m/lpddr5/ecc_enable_v4m.c | 0 .../ip/ddr/v4m/lpddr5/ecc_enable_v4m.h | 0 .../ip/ddr/v4m/lpddr5/ecm_enable_v4m.c | 0 .../ip/ddr/v4m/lpddr5/ecm_enable_v4m.h | 0 .../20200801}/Gen4_ICUMX_Loader/ip/dma/dma.c | 0 .../Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c | 0 .../Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c | 0 .../Gen4_ICUMX_Loader/ip/emmc/emmc_init.c | 0 .../ip/emmc/emmc_interrupt.c | 0 .../Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c | 0 .../ip/emmc/emmc_multiboot.c | 0 .../Gen4_ICUMX_Loader/ip/emmc/emmc_read.c | 0 .../Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c | 0 .../Gen4_ICUMX_Loader/ip/fcpr/fcpr.c | 0 .../Gen4_ICUMX_Loader/ip/gpio/gpio.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/i2c/i2c.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/i2c/i2c5.c | 0 .../Gen4_ICUMX_Loader/ip/ip_control.c | 0 .../Gen4_ICUMX_Loader/ip/mfis/mfis.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/qos/qos.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/rpc/dma2.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/rpc/dma2.h | 0 .../Gen4_ICUMX_Loader/ip/rpc/qspi_xdr_mode.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/rpc/rpc.c | 0 .../Gen4_ICUMX_Loader/ip/rpc/rpcqspidrv.c | 0 .../Gen4_ICUMX_Loader/ip/rpc/spiflash2drv.c | 0 .../Gen4_ICUMX_Loader/ip/rtvram/rtvram.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/san/v4h.c | 0 .../Gen4_ICUMX_Loader/ip/sysc/sysc.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/wdt/rwdt.c | 0 .../20200801}/Gen4_ICUMX_Loader/ip/wdt/wdt.c | 0 .../Gen4_ICUMX_Loader/loader/icumx_loader.ld | 0 .../loader/icumx_loader_v4m.ld | 0 .../Gen4_ICUMX_Loader/loader/loader.S | 0 .../loader/loader_main_common.c | 0 .../Gen4_ICUMX_Loader/loader/loader_main_s4.c | 0 .../loader/loader_main_v4h.c | 0 .../loader/loader_main_v4m.c | 0 .../Gen4_ICUMX_Loader/mcu/codesram_ecc.c | 0 .../Gen4_ICUMX_Loader/mcu/codesram_ecc.h | 0 .../Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c | 0 .../Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h | 0 .../mcu/image_load_for_mcu.c | 0 .../mcu/image_load_for_mcu.h | 0 .../Gen4_ICUMX_Loader/mcu/loader_main_mcu.c | 0 .../Gen4_ICUMX_Loader/mcu/loader_main_mcu.h | 0 .../20200801}/Gen4_ICUMX_Loader/mcu/sdmac.c | 0 .../20200801}/Gen4_ICUMX_Loader/mcu/sdmac.h | 0 .../Gen4_ICUMX_Loader/mcu/sdmac_register.h | 0 .../Mobis/20200801}/Gen4_ICUMX_Loader/mk.sh | 0 .../protect/ram_protection.c | 0 .../Gen4_ICUMX_Loader/protect/region_id.c | 0 .../Gen4_ICUMX_Loader/protect/stack_protect.c | 0 .../20200801}/Gen4_ICUMX_Loader/remap/remap.c | 0 .../Gen4_ICUMX_Loader/rom_api/rom_api.c | 0 .../Mobis/20200801}/Gen4_ICUMX_Loader/t.diff | 0 .../tools/dummy_create/s4/sa9.c | 0 .../tools/dummy_create/s4/sa9.ld | 0 .../tools/dummy_create/sa0.c | 0 .../tools/dummy_create/sa0.ld | 0 .../tools/dummy_create/v4h/sa9.c | 0 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.../ip/ddr/v4h/lpddr5/ecm_enable_v4h.c | 531 +++ .../ip/ddr/v4h/lpddr5/ecm_enable_v4h.h | 42 + .../ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h | 302 ++ .../ip/ddr/v4m/lpddr5/ecc_enable_v4m.c | 217 + .../ip/ddr/v4m/lpddr5/ecc_enable_v4m.h | 123 + .../ip/ddr/v4m/lpddr5/ecm_enable_v4m.c | 534 +++ .../ip/ddr/v4m/lpddr5/ecm_enable_v4m.h | 47 + .../v4h/src/Gen4_ICUMX_Loader/ip/dma/dma.c | 182 + .../src/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c | 249 + .../src/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c | 580 +++ .../src/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c | 311 ++ .../ip/emmc/emmc_interrupt.c | 227 + .../Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c | 767 +++ .../ip/emmc/emmc_multiboot.c | 95 + .../src/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c | 204 + .../Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c | 301 ++ .../v4h/src/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c | 79 + .../v4h/src/Gen4_ICUMX_Loader/ip/i2c/i2c.c | 408 ++ .../v4h/src/Gen4_ICUMX_Loader/ip/ip_control.c | 0 .../v4h/src/Gen4_ICUMX_Loader/ip/mfis/mfis.c | 82 + .../v4h/src/Gen4_ICUMX_Loader/ip/qos/qos.c | 413 ++ .../v4h/src/Gen4_ICUMX_Loader/ip/rpc/rpc.c | 0 .../src/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c | 77 + .../v4h/src/Gen4_ICUMX_Loader/ip/sysc/sysc.c | 109 + .../v4h/src/Gen4_ICUMX_Loader/ip/wdt/wdt.c | 0 .../Gen4_ICUMX_Loader/loader/icumx_loader.ld | 0 .../loader/icumx_loader_v4m.ld | 0 .../v4h/src/Gen4_ICUMX_Loader/loader/loader.S | 168 + .../loader/loader_main_common.c | 0 .../Gen4_ICUMX_Loader/loader/loader_main_s4.c | 490 ++ .../loader/loader_main_v4h.c | 0 .../loader/loader_main_v4m.c | 269 ++ .../src/Gen4_ICUMX_Loader/mcu/codesram_ecc.c | 228 + .../src/Gen4_ICUMX_Loader/mcu/codesram_ecc.h | 39 + .../Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c | 300 ++ .../Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h | 62 + .../mcu/image_load_for_mcu.c | 117 + .../mcu/image_load_for_mcu.h | 67 + .../Gen4_ICUMX_Loader/mcu/loader_main_mcu.c | 456 ++ .../Gen4_ICUMX_Loader/mcu/loader_main_mcu.h | 45 + .../SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.c | 110 + .../SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.h | 99 + .../Gen4_ICUMX_Loader/mcu/sdmac_register.h | 77 + .../protect/ram_protection.c | 271 ++ .../src/Gen4_ICUMX_Loader/protect/region_id.c | 0 .../Gen4_ICUMX_Loader/protect/stack_protect.c | 86 + .../v4h/src/Gen4_ICUMX_Loader/remap/remap.c | 0 .../src/Gen4_ICUMX_Loader/rom_api/rom_api.c | 0 .../tools/dummy_create/s4/sa9.c | 289 ++ .../tools/dummy_create/s4/sa9.ld | 66 + .../tools/dummy_create/sa0.c | 0 .../tools/dummy_create/sa0.ld | 0 .../tools/dummy_create/v4h/sa9.c | 0 .../tools/dummy_create/v4h/sa9.ld | 67 + .../tools/dummy_create/v4m/sa9.c | 316 ++ .../tools/dummy_create/v4m/sa9.ld | 68 + .../tools/sw_min_ver_tbl/ntfmv_ver_tbl.c | 111 + .../tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld | 60 + .../tools/sw_min_ver_tbl/tfmv_ver_tbl.c | 141 + .../tools/sw_min_ver_tbl/tfmv_ver_tbl.ld | 60 + .../SDK/v4h/src/V4H_Cx_Loader/Makefile | 0 .../src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c | 0 .../src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c | 0 .../V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c | 0 .../V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c | 0 .../v4h/src/V4H_Cx_Loader/common/log/log.c | 0 .../v4h/src/V4H_Cx_Loader/common/log/scif.c | 0 .../SDK/v4h/src/V4H_Cx_Loader/common/string.c | 0 .../common/timer/generic_timer.c | 0 .../SDK/v4h/src/V4H_Cx_Loader/cpu_on/cpu_on.c | 0 .../src/V4H_Cx_Loader/image_load/image_load.c | 0 .../V4H_Cx_Loader/include/access_protection.h | 0 .../src/V4H_Cx_Loader/include/axmm_register.h | 0 .../v4h/src/V4H_Cx_Loader/include/cnf_tbl.h | 0 .../v4h/src/V4H_Cx_Loader/include/cpu_on.h | 0 .../v4h/src/V4H_Cx_Loader/include/emmc_boot.h | 0 .../src/V4H_Cx_Loader/include/emmc_config.h | 0 .../v4h/src/V4H_Cx_Loader/include/emmc_def.h | 0 .../v4h/src/V4H_Cx_Loader/include/emmc_hal.h | 0 .../V4H_Cx_Loader/include/emmc_multiboot.h | 0 .../V4H_Cx_Loader/include/emmc_registers.h | 0 .../v4h/src/V4H_Cx_Loader/include/emmc_std.h | 0 .../SDK/v4h/src/V4H_Cx_Loader/include/gic.h | 0 .../V4H_Cx_Loader/include/hscif_register.h | 0 .../src/V4H_Cx_Loader/include/image_load.h | 0 .../V4H_Cx_Loader/include/image_load_emmc.h | 0 .../src/V4H_Cx_Loader/include/inline_asm.h | 0 .../v4h/src/V4H_Cx_Loader/include/interrupt.h | 0 .../src/V4H_Cx_Loader/include/ip_control.h | 0 .../src/V4H_Cx_Loader/include/loader_main.h | 0 .../include/loader_main_common.h | 0 .../V4H_Cx_Loader/include/loader_mmu_table.h | 0 .../SDK/v4h/src/V4H_Cx_Loader/include/log.h | 0 .../v4h/src/V4H_Cx_Loader/include/mem_io.h | 0 .../SDK/v4h/src/V4H_Cx_Loader/include/qos.h | 0 .../V4H_Cx_Loader/include/ram_protection.h | 0 .../v4h/src/V4H_Cx_Loader/include/rcar_def.h | 0 .../src/V4H_Cx_Loader/include/rcar_register.h | 0 .../src/V4H_Cx_Loader/include/rst_register.h | 0 .../v4h/src/V4H_Cx_Loader/include/rtvram.h | 0 .../V4H_Cx_Loader/include/rtvram_register.h | 0 .../SDK/v4h/src/V4H_Cx_Loader/include/scif.h | 0 .../src/V4H_Cx_Loader/include/scif_register.h | 0 .../src/V4H_Cx_Loader/include/secure_boot.h | 0 .../v4h/src/V4H_Cx_Loader/include/string.h | 0 .../SDK/v4h/src/V4H_Cx_Loader/include/swdt.h | 0 .../SDK/v4h/src/V4H_Cx_Loader/include/timer.h | 0 .../SDK/v4h/src/V4H_Cx_Loader/include/types.h | 0 .../src/V4H_Cx_Loader/ip/ddr/boot_init_dram.h | 0 .../SDK/v4h/src/V4H_Cx_Loader/ip/ddr/ddr.mk | 0 .../src/V4H_Cx_Loader/ip/ddr/dram_sub_func.c | 0 .../src/V4H_Cx_Loader/ip/ddr/dram_sub_func.h | 0 .../ip/ddr/v4h/lpddr5/boot_init_dram.c | 0 .../ip/ddr/v4h/lpddr5/boot_init_dram_config.c | 0 .../ip/ddr/v4h/lpddr5/boot_init_dram_config.h | 0 .../ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h | 0 .../ip/ddr/v4h/lpddr5/ddr_regdef.h | 0 .../ip/ddr/v4h/lpddr5/ecc_enable_v4h.c | 0 .../ip/ddr/v4h/lpddr5/ecc_enable_v4h.h | 0 .../ip/ddr/v4h/lpddr5/ecm_enable_v4h.c | 0 .../ip/ddr/v4h/lpddr5/ecm_enable_v4h.h | 0 .../ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h | 0 .../ip/ddr/v4m/lpddr5/boot_init_dram.c | 0 .../ip/ddr/v4m/lpddr5/boot_init_dram_config.c | 0 .../ip/ddr/v4m/lpddr5/boot_init_dram_config.h | 0 .../ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h | 0 .../ip/ddr/v4m/lpddr5/ddr_regdef.h | 0 .../ip/ddr/v4m/lpddr5/ecc_enable_v4m.c | 0 .../ip/ddr/v4m/lpddr5/ecc_enable_v4m.h | 0 .../ip/ddr/v4m/lpddr5/ecm_enable_v4m.c | 0 .../ip/ddr/v4m/lpddr5/ecm_enable_v4m.h | 0 .../ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h | 0 .../v4h/src/V4H_Cx_Loader/ip/emmc/emmc_boot.c | 0 .../v4h/src/V4H_Cx_Loader/ip/emmc/emmc_cmd.c | 0 .../v4h/src/V4H_Cx_Loader/ip/emmc/emmc_init.c | 0 .../V4H_Cx_Loader/ip/emmc/emmc_interrupt.c | 0 .../src/V4H_Cx_Loader/ip/emmc/emmc_mount.c | 0 .../V4H_Cx_Loader/ip/emmc/emmc_multiboot.c | 0 .../v4h/src/V4H_Cx_Loader/ip/emmc/emmc_read.c | 0 .../src/V4H_Cx_Loader/ip/emmc/emmc_utility.c | 0 .../SDK/v4h/src/V4H_Cx_Loader/ip/interrupt.c | 0 .../SDK/v4h/src/V4H_Cx_Loader/ip/ip_control.c | 0 .../SDK/v4h/src/V4H_Cx_Loader/ip/qos/qos.c | 0 .../v4h/src/V4H_Cx_Loader/ip/rtvram/rtvram.c | 0 .../SDK/v4h/src/V4H_Cx_Loader/ip/swdt/swdt.c | 0 .../v4h/src/V4H_Cx_Loader/loader/asm_macros.S | 0 .../V4H_Cx_Loader/loader/loader_exceptions.S | 0 .../src/V4H_Cx_Loader/loader/loader_main.c | 0 .../V4H_Cx_Loader/loader/loader_main_common.c | 0 .../V4H_Cx_Loader/loader/loader_mmu_table.c | 0 .../v4h/src/V4H_Cx_Loader/loader/loader_s4.S | 0 .../v4h/src/V4H_Cx_Loader/loader/loader_s4.ld | 0 .../v4h/src/V4H_Cx_Loader/loader/loader_v4h.S | 0 .../src/V4H_Cx_Loader/loader/loader_v4h.ld | 0 .../v4h/src/V4H_Cx_Loader/loader/loader_v4m.S | 0 .../src/V4H_Cx_Loader/loader/loader_v4m.ld | 0 .../SDK/v4h/src/V4H_Cx_Loader/loader/stack.S | 0 .../protect/region_id/region_id.c | 0 .../src/V4H_Cx_Loader/secure/secure_boot.c | 0 2488 files changed, 45465 insertions(+) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/.gitignore (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/Makefile (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/common/crc32.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/common/log/log.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/common/log/scif.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/common/scmt_checkpoint.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/common/timer/micro_wait.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/common/timer/scmt.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/cpu_on/cpu_on.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/dos.mk (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/env.ini (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/image_load/android_ab.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/image_load/image_load.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/image_load/image_load_emmc.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/image_load/image_load_flash.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/access_protection.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/android_ab.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/android_bootloader_message.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/ap_system_core_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/avs.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/axmm_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/bit.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/cnf_tbl.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/cpg.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/cpg_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/cpu.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/cpu_on.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/crc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/dma.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/dma_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/emmc_boot.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/emmc_config.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/emmc_def.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/emmc_hal.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/emmc_multiboot.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/emmc_registers.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/emmc_std.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/fcpr.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/fcpr_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/gpio.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/hscif_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/i2c.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/i2c_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/image_load.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/image_load_emmc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/image_load_flash.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/inline_asm.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/intc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/intc_id.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/ip_control.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/loader_main.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/loader_main_common.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/log.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/mcu_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/mem_io.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/mfis.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/mfis_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/micro_wait.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/pfc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/pfc_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/qos.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/ram_def.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/ram_protection.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rcar_def.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/remap.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/remap_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rom_api.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rpc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rpc_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rpcqspidrv.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rst_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rtsram_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rtvram.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/rtvram_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/san.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/scif.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/scif_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/scmt.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/scmt_checkpoint.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/scmt_config.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/scmt_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/spiflash2drv.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/sysc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/types.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/vect_set.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/wdt.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/include/wdt_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/intc/intc.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/intc/vect_set.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/intc/vecttbl.S (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/avs/avs.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/cpg/cpg.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/ddr.mk (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/dma/dma.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/gpio/gpio.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/i2c/i2c.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/i2c/i2c5.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/ip_control.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/mfis/mfis.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/qos/qos.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/rpc/dma2.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/rpc/dma2.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/rpc/qspi_xdr_mode.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/rpc/rpc.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/rpc/rpcqspidrv.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/rpc/spiflash2drv.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/san/v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/sysc/sysc.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/wdt/rwdt.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/ip/wdt/wdt.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/loader/icumx_loader.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/loader/loader.S (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/loader/loader_main_common.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/loader/loader_main_s4.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/loader/loader_main_v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/loader/loader_main_v4m.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/codesram_ecc.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/codesram_ecc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/sdmac.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/sdmac.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mcu/sdmac_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/mk.sh (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/protect/ram_protection.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/protect/region_id.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/protect/stack_protect.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/remap/remap.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/rom_api/rom_api.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/t.diff (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/Makefile (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/common/crc32.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/common/log/log.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/common/log/scif.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/common/scmt_checkpoint.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/common/string.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/common/timer/generic_timer.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/common/timer/scmt.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/cpu_on/cpu_on.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/image_load/android_ab.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/image_load/image_load.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/access_protection.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/android_ab.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/android_bootloader_message.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/axmm_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/cnf_tbl.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/cpu_on.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/crc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/emmc_boot.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/emmc_config.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/emmc_def.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/emmc_hal.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/emmc_multiboot.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/emmc_registers.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/emmc_std.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/gic.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/hscif_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/image_load.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/image_load_emmc.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/inline_asm.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/interrupt.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/ip_control.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/loader_main.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/loader_main_common.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/loader_mmu_table.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/log.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/mem_io.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/qos.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/ram_protection.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/rcar_def.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/rcar_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/rst_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/rtvram.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/rtvram_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/scif.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/scif_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/scmt.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/scmt_checkpoint.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/scmt_config.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/scmt_register.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/secure_boot.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/string.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/swdt.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/timer.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/include/types.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/boot_init_dram.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/ddr.mk (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/dram_sub_func.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/dram_sub_func.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/emmc/emmc_boot.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/emmc/emmc_cmd.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/emmc/emmc_init.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/emmc/emmc_mount.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/emmc/emmc_read.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/emmc/emmc_utility.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/gpio (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/interrupt.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/ip_control.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/qos/qos.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/rtvram/rtvram.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/ip/swdt/swdt.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/asm_macros.S (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_exceptions.S (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_main.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_main_common.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_mmu_table.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_s4.S (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_s4.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_v4h.S (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_v4h.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_v4m.S (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/loader_v4m.ld (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/loader/stack.S (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/mk.sh (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/protect/region_id/region_id.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/ICUMXB_modifed.diff (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_auth_cipher.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cipher.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac_short.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_export_she.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_plain.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_she.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_cancel_she.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_cmd_debug.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecc_key_generate.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdh.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_sign.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_verify.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_sign.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_verify.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_id.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_info.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_hash.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac_import.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_iso15118_update.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_key_mgmt.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_lifecycle.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_def.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_install.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify_auto.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_mono_ctr.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_export.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import_ext.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_rand_generate.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_decrypt.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_encrypt.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_key_generate.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_sign.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_verify.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_secure_boot_api.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_she.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_cfg.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_init.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_ecdh_exchange.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_rsa_exchange.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_verify_data.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/icumif/renesas_types.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/include/icum_d_comm_pe_pub.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/include/r_icumif_pub.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/include/user_icumif_api_pub.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/secure_boot.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/shared/src/lorem_ipsum.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/shared/src/mem_info_def.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/shared/src/shared.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/user_api/user_icumif_api.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/V4H_Cx_Loader/secure/user_api/user_icumif_api.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/.gitignore (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/AArch64_boot/boot_mon.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/AArch64_boot/boot_mon.s (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/AArch64_boot/d_armasm.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/AArch64_boot/d_armasm.s (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/AArch64_boot/stack.s (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/LICENSE.md (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/Makefile (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/cert_param.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/common (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/image_load (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/include/bit.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/include/vmsatable.h (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/ip (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/loader (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/main.c (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/memory_cx_ipl.def (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/mk.sh (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/secure (100%) rename Src/0_Tool/{IPL/Customer/Mobis => Gen4_R-Car_IPL/Customer/Mobis/20200801}/ca76_loader/vmsatable.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/Makefile create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/README.md rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/cnf_tbl/cnf_tbl_s4.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_v4h.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_v4m.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/crc32.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/common/log/log.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/log/scif.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/scmt_checkpoint.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/common/timer/micro_wait.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/timer/scmt.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cpu_on/cpu_on.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/dos.mk create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/env.ini create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/git.history create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/android_ab.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/image_load/image_load_emmc.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load_flash.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/access_protection.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/android_ab.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/android_bootloader_message.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/ap_system_core_register.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/avs.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/axmm_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/bit.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cnf_tbl.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/cpg.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpg_register.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/cpu.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/cpu_on.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/crc.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/dma.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/dma_register.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/emmc_boot.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/emmc_config.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/emmc_def.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/emmc_hal.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/emmc_multiboot.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/emmc_registers.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/emmc_std.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/fcpr.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/fcpr_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/gpio.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/hscif_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/i2c.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/i2c_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/image_load_emmc.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load_flash.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/inline_asm.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/intc.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/intc_id.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/ip_control.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/loader_main.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/loader_main_common.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/log.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/mcu_register.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/mem_io.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/mfis.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/mfis_register.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/micro_wait.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/pfc.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pfc_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pmic.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pmic_register.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/qos.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ram_def.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/ram_protection.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/rcar_def.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/remap.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/remap_register.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/rom_api.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpc.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpc_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpcqspidrv.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rst_register.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/rtsram_register.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/rtvram.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/rtvram_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/san.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/scif.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/scif_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_checkpoint.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_config.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/spiflash2drv.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/sysc.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/types.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/include/vect_set.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/wdt.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/wdt_register.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/intc/intc.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/intc/vect_set.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/intc/vecttbl.S (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/avs/avs.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/cpg/cpg.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/boot_init_dram.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/ddr.mk (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/dram_sub_func.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/dram_sub_func.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/s4/lpddr4x/boot_init_dram.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/s4/lpddr4x/boot_init_dram_config.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/s4/lpddr4x/boot_init_dram_config.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/s4/lpddr4x/ddr_regdef.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/s4/lpddr4x/ecc_enable_s4.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/s4/lpddr4x/ecc_enable_s4.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/dma/dma.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/emmc/emmc_boot.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/emmc/emmc_cmd.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/emmc/emmc_init.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/emmc/emmc_interrupt.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/emmc/emmc_mount.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/emmc/emmc_multiboot.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/emmc/emmc_read.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/emmc/emmc_utility.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/fcpr/fcpr.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/gpio/gpio.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/i2c/i2c.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/i2c5.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/pmic.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/pmic_wdt.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ip_control.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/mfis/mfis.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/qos/qos.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/dma2.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/dma2.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/qspi_xdr_mode.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/rpc.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/rpcqspidrv.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/spiflash2drv.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/rtvram/rtvram.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/san/v4h.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/ip/sysc/sysc.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/wdt/rwdt.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/wdt/wdt.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/icumx_loader.ld create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/icumx_loader_v4m.ld rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/loader/loader.S (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_common.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/loader/loader_main_s4.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_v4h.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/loader/loader_main_v4m.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/codesram_ecc.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/codesram_ecc.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/cpu_on_for_mcu.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/cpu_on_for_mcu.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/image_load_for_mcu.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/image_load_for_mcu.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/loader_main_mcu.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/loader_main_mcu.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/sdmac.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/sdmac.h (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/mcu/sdmac_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mk.linux.sh create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mk.win.sh rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/protect/ram_protection.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/protect/region_id.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/protect/stack_protect.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/remap/remap.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/rom_api/rom_api.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/dummy_create/s4/sa9.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/dummy_create/s4/sa9.ld (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/sa0.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/sa0.ld create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4h/sa9.c rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/dummy_create/v4h/sa9.ld (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/dummy_create/v4m/sa9.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/dummy_create/v4m/sa9.ld (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/sw_min_ver_tbl/tfmv_ver_tbl.c (100%) rename Src/0_Tool/{IPL/SDK/v4h/src/Gen4_ICUMX_Loader => Gen4_R-Car_IPL/Customer/Mobis/20260126}/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/stack.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/stack.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/LICENSE.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/cert_param.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/devdrv.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/bit.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/devdrv.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/init_scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/main.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/reg_rcargen3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0_v3h.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv2.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/include/types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/init_scif.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/memory_cr7.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/memory_icumxa.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/scifdrv0.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/scifdrv0_v3h.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_CA53_Program/scifdrv2.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/common/log.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/common/mem_io.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/common/micro_wait.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/common/remap.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/common/scif.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/fw/dummy_fw.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/fw/dummy_fw.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/fw/dummy_fw_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/fw/vecttbl.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/dummy_fw_main.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/log.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/mem_io.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/micro_wait.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/rcar_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/remap.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/remap_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/rst_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_FW/include/scif_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/common/div.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/common/scif.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/debug.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/machine/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/machine/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/mmio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/reg_rcar_gen3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/stdarg.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/stddef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/stdio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/string.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/sys/_null.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/sys/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/sys/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/include/sys/cdefs.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/rtos/rtos.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/rtos/rtos.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/Dummy_RTOS/rtos/rtos_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/.gitignore (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/log.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/scif.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/common/mem_io/mem_io.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/common/timer/micro_wait.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/image_load/image_load.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_lifec.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_memory.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/axi_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpu_on.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/edcinten.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/image_load.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/ip_control.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/lifec_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/loader_main.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/log.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/mem_io.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/micro_wait.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_mstat.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_qoswt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/rcar_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/rom_api.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/rst_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/rtsram_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/sysc_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/include/wdt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/axi-bus_edcint/edcinten.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/cpg/cpg.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_config.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regcheck.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr_regdef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_chk.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3ver2.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3n.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/dma/dma.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ip_control.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/mfis/mfis.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/pfc/pfc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/qos/qos.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/rpc/rpc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/ip/wdt/wdt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/loader/cpu_on.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/loader/icumxa_loader.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/protect/acc_prot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/protect/lifec/acc_prot_lifec.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/protect/memory/acc_prot_memory.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/remap/remap.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api_wrap.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa6.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa6.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/acknowledgements.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl1/aarch64/bl1_arch_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl1/aarch64/bl1_entrypoint.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl1/aarch64/bl1_exceptions.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl1/bl1.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl1/bl1.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl1/bl1_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl1/bl1_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl2/aarch64/bl2_arch_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl2/aarch64/bl2_entrypoint.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl2/bl2.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl2/bl2.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl2/bl2_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl2/bl2_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/aarch64/bl31_arch_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/aarch64/bl31_entrypoint.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/aarch64/context.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/aarch64/cpu_data.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/aarch64/crash_reporting.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/aarch64/runtime_exceptions.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/bl31.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/bl31.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/bl31_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/context_mgmt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/cpu_data_array.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/interrupt_mgmt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl31/runtime_svc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/aarch64/tsp_entrypoint.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/aarch64/tsp_exceptions.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/aarch64/tsp_request.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/tsp.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/tsp.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/tsp_interrupt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/tsp_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/tsp_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl32/tsp/tsp_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl33/aarch64/bl33_entrypoint.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl33/aarch64/crash_reporting.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl33/aarch64/runtime_exceptions.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl33/bl33.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl33/bl33.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl33/bl33_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl33/interrupt_mgmt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/bl33/runtime_svc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/common/aarch64/debug.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/common/aarch64/early_exceptions.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/common/bl_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/common/tf_printf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/contributing.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/auth-framework.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/change-log.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/cpu-specific-build-macros.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/diagrams/non-sec-int-handling.png (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/diagrams/psci-suspend-sequence.png (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/diagrams/rt-svc-descs-layout.png (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/diagrams/sec-int-handling.png (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/firmware-design.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/interrupt-framework-design.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/plat/nvidia-tegra.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/platform-migration-guide.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/porting-guide.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/psci-pd-tree.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/rt-svc-writers-guide.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/spd/optee-dispatcher.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/spd/tlk-dispatcher.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/trusted-board-boot.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/docs/user-guide.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/cci/cci.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/cci400/cci400.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/ccn/ccn.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/ccn/ccn_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/gic/arm_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/gic/gic_v2.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/gic/gic_v3.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/pl011/pl011_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/sp804/sp804_delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/arm/tzc400/tzc400.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/auth_mod.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/crypto_mod.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/img_parser_mod.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509_parser.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/auth/tbbr/tbbr_cot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/console/console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/console/skeleton_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/delay_timer/delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/io/io_fip.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/io/io_memmap.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/io/io_semihosting.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/io/io_storage.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/drivers/ti/uart/16550_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2legacy-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2legacy-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard-no_psci.dtsi (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard.dtsi (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard-no_psci.dtsi (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard.dtsi (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/bl31.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/context.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/context_mgmt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/cpu_data.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/interrupt_mgmt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/runtime_svc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci_compat.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl31/services/std_svc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl32/payloads/tlk.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/platform_tsp.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/tsp.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/common/asm_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/common/assert_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/common/bl_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/common/debug.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/common/el3_common_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/common/firmware_image_package.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/common/tbbr/cot_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/common/tbbr/tbbr_img_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/arm_gic.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci400.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/ccn.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v2.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/nic_400.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/pl011.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/sp804_delay_timer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/arm/tzc400.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_mod.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/auth/crypto_mod.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/auth/img_parser_mod.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/console.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/delay_timer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_driver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_fip.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_memmap.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_semihosting.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_storage.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/drivers/ti/uart/uart_16550.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch_helpers.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/xlat_tables.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/bakery_lock.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/cassert.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/aem_generic.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a53.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a57.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a72.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cpu_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/denver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/mmio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/semihosting.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/lib/spinlock.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_oid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_css_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/v2m_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/aarch64/arm_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/plat_arm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/aarch64/css_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/css_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/common/common_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/plat/common/platform.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/assert.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/inttypes.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_inttypes.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_limits.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/stddef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/stdio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/stdlib.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/string.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/strings.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_null.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_timespec.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/cdefs.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/ctype.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/errno.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/limits.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/stdarg.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/timespec.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/uuid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/time.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_strings.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_time.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/aarch64/cache_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/aarch64/misc_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/aarch64/xlat_helpers.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/aarch64/xlat_tables.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/cpus/aarch64/aem_generic.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/cpus/aarch64/cortex_a53.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/cpus/aarch64/cortex_a57.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/cpus/aarch64/cortex_a72.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/cpus/aarch64/cpu_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/cpus/aarch64/denver.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/cpus/cpu-ops.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/locks/bakery/bakery_lock_coherent.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/locks/bakery/bakery_lock_normal.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/locks/exclusive/spinlock.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/semihosting/aarch64/semihosting_call.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/semihosting/semihosting.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/abort.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/assert.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/exit.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/mem.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/printf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/putchar.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/puts.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/sscanf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/std.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/strchr.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/strcmp.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/strlen.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/strncmp.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/lib/stdlib/subr_prf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/license.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/aarch64/board_arm_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_arm_trusted_boot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotpk_rsa.der (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_bl1_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_bl2_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_bl31_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_io_storage.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_security.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_oid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/tsp/fvp_tsp_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/tsp/tsp-fvp.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/aarch64/juno_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/platform_oid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/juno_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/juno_security.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/tsp/tsp-juno.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/aarch64/arm_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/aarch64/arm_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl1_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl2_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl31_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_io_storage.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_security.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/aarch64/css_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_bl2_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css_security.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_psci_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_mp_stack.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_up_stack.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/common/plat_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/compat/aarch64/plat_helpers_compat.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/compat/plat_compat.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/compat/plat_pm_compat.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/compat/plat_topology_compat.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/plat_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/platform_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/bl31_plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/8250_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/uart8250.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/mcucfg.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/power_tracer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/scu.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/mt8173_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_mt_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_sip_calls.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/power_tracer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/scu.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/aarch64/tegra_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/memctrl/memctrl.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/pmc/pmc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_bl31_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_sip_calls.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/include/drivers/flowctrl.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/include/drivers/memctrl.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/include/drivers/pmc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/include/t132/tegra_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/include/t210/tegra_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/include/tegra_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t132/plat_secondary.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t132/plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t132/platform_t132.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t210/plat_secondary.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t210/plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t210/platform_t210.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/bl2_reset.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_cpg_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_rcar_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_secure_setting.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl31_rcar_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl33_rcar_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/init_dram_tbl_m3_es10.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/ddr.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/avs/avs_driver.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/dma/dma_driver.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/error/bl2_int_error.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_memdrv.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_rcar.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/rpc/rpc_driver.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/scif/scif.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/timer/bl2_swdt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/avs_driver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_axi_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_init.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_dma_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_int_error.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_lifec_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_rpc_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_secure_setting.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_swdt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/dma_driver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_memdrv.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_rcar.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/pfc_init.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/rpc_driver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/ES10/qos_init_h3_es10.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/ES10/qos_init_h3_es10.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_io_storage.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_version.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/readme.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed_macros.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_entry.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_off.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_on.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_suspend.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_system_off.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/services/std_svc/std_svc_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/tools/cert_create/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/cert.h (100%) rename Src/0_Tool/{IPL => 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rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/tools/dummy_create/sa6.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/tools/fip_create/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/tools/fip_create/fip_create.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/tools/fip_create/fip_create.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/tools/fip_create/firmware_image_package.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/Dummy_BL33/tools/fip_create/uuid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/arm_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/auth.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/axi_bus_timeout.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/cpsr_acc.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/div.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/dma_driver.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/ecc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/edc_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/error_output.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/gic_v2.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/lifec_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/llsl.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/common/llsr.s (100%) rename Src/0_Tool/{IPL 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Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_init.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/loader_main.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/micro_wait.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/mmio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/pfc_init.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/protection_setting.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat390.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat780.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_addr.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_pwrc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_version.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/rom_api.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_driver.h (100%) rename Src/0_Tool/{IPL => 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Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/arm_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/common/gic_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/common/gic_common_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/gic_v2.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/gic_v3.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/v2/gicv2_helpers.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/v2/gicv2_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/v2/gicv2_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/v3/gicv3_helpers.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/v3/gicv3_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/gic/v3/gicv3_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch32/pl011_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch64/pl011_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/pl011_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl061/pl061_gpio.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp804/sp804_delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp805/sp805.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc400.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_common_private.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_dmc500.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc400/tzc400.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/auth_mod.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/crypto_mod.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/img_parser_mod.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509_parser.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/auth/tbbr/tbbr_cot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/aarch64/cdns_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/cdns_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/skeleton_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/skeleton_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/console/console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/console/skeleton_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/generic_delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/emmc/emmc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/gpio/gpio.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_block.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_dummy.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_fip.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_memmap.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_semihosting.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_storage.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/16550_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/aarch64/16550_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dtb (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dts (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-motherboard.dtsi (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/fdts/rtsm_ve-motherboard.dtsi (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/bl1/bl1.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/bl1/tbbr/tbbr_img_desc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/bl31/bl31.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/bl31/interrupt_mgmt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/bl32/payloads/tlk.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/bl32/sp_min/platform_sp_min.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/platform_tsp.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/tsp.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/asm_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/assert_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/el3_common_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/asm_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/assert_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/el3_common_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/asm_macros_common.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/bl_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/debug.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/desc_image_load.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/firmware_image_package.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/runtime_svc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/cot_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/tbbr_img_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/arm_gic.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci400.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/ccn.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v2.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv2.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/nic_400.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl011.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl061_gpio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp804_delay_timer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp805.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc400.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_dmc500.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_mod.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/crypto_mod.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/img_parser_mod.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/cadence/cdns_uart.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/console.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/delay_timer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/emmc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/generic_delay_timer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/gpio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_block.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_driver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_dummy.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_fip.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_memmap.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_semihosting.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_storage.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/drivers/ti/uart/uart_16550.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch_helpers.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_helpers.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch_helpers.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/smcc_helpers.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/bakery_lock.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cassert.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/aem_generic.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cortex_a32.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cpu_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/aem_generic.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a35.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a53.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a57.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a72.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a73.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cpu_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/denver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch32/context.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch64/context.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/context_mgmt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/cpu_data.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/fdt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt_env.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/mmio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/pmf/pmf.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/pmf/pmf_asm_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/pmf/pmf_helpers.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci_compat.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/semihosting.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/smcc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/spinlock.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/assert.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/inttypes.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_inttypes.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_limits.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stddef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdlib.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/string.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/strings.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_null.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_timespec.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/cdefs.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/ctype.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/errno.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/limits.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdarg.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/timespec.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/uuid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/time.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_strings.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_time.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/utils.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/lib/xlat_tables.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_oid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_css_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/drivers/norflash.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/v2m_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/arm_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/cci_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/plat_arm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/css/common/aarch64/css_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/css/common/css_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/css/common/css_pm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/common/common_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/plat/common/platform.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/include/services/std_svc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/cache_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/misc_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/cache_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/misc_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/xlat_tables.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch32/aem_generic.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch32/cortex_a32.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch32/cpu_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/aem_generic.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a35.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a53.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a57.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a72.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a73.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cpu_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/denver.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/cpus/cpu-ops.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/context_mgmt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/cpu_data.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context_mgmt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/cpu_data.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/cpu_data_array.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_addresses.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_empty_tree.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_ro.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_rw.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_strerror.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_sw.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_wip.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt_internal.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_coherent.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_normal.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch32/spinlock.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch64/spinlock.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/spinlock.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_smc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch32/psci_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch64/psci_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_lib.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_off.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_on.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_stat.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_suspend.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_system_off.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch32/semihosting_call.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch64/semihosting_call.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/semihosting.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/abort.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/assert.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/exit.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/mem.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/printf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/putchar.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/puts.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/sscanf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/stdlib.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strchr.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strcmp.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strlen.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strncmp.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/subr_prf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch32/xlat_tables.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch64/xlat_tables.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/license.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_env.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_macros.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/make_helpers/cygwin.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/make_helpers/msys.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/make_helpers/plat_helpers.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/make_helpers/tbbr/tbbr_tools.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/make_helpers/unix.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/make_helpers/windows.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch32/board_arm_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch64/board_arm_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_arm_trusted_boot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/drivers/norflash/norflash.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotpk_rsa.der (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch32/fvp_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch64/fvp_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl1_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2u_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl31_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_err.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_io_storage.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_security.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_trusted_boot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_oid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/sp_min-fvp.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/fvp_tsp_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/tsp-fvp.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/aarch64/juno_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_oid.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_bl1_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_err.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_security.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/tsp/tsp-juno.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_fwu.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2u_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl31_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_cci.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_ccn.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv2.c (100%) rename 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Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/aarch64/css_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl1_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2u_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css_security.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/plat_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/platform_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/platform_mp_stack.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/platform_up_stack.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_psci_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_mp_stack.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_up_stack.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_bl1_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv2.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv3.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_psci_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/compat/aarch64/plat_helpers_compat.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_compat.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_pm_compat.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_topology_compat.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/8250_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/uart8250.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/aarch64/plat_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31_plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/mcucfg.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_sip_calls.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/power_tracer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/scu.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/spm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_mt_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/power_tracer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/scu.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/plat_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/platform_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/bl31_plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/rtc/rtc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/rtc/rtc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mcucfg.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mt8173_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_sip_calls.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/power_tracer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/scu.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_mt_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_sip_calls.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/power_tracer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/scu.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/aarch64/tegra_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/memctrl/memctrl.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/pmc/pmc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/tegra_bl31_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/tegra_common.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/tegra_delay_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/tegra_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/tegra_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/tegra_sip_calls.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/common/tegra_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/include/drivers/flowctrl.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/include/drivers/memctrl.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/include/drivers/pmc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/include/t132/tegra_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/include/t210/tegra_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/include/tegra_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/plat_secondary.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/platform_t132.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/plat_secondary.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/platform_t210.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/aarch64/plat_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/dt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl1_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl2_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl31_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_gic.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_io_storage.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/qemu/topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/bl2_reset.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_cpg_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_rcar_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl31_rcar_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/avs/avs_driver.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/cpld/ulcb_cpld.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/dma/dma_driver.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_cmd.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_interrupt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_mount.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_read.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_utility.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/error/bl2_int_error.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_emmcdrv.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_memdrv.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_rcar.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_console.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_call_sram.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rom/rom_api.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rpc/rpc_driver.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/scif/scif.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/timer/bl2_swdt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/wait/micro_wait.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/avs_driver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_init.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_dma_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_int_error.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_rpc_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_swdt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/dma_driver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_hal.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_registers.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_std.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_emmcdrv.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_memdrv.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_rcar.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/micro_wait.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rcar_pm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rom_api.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rpc_driver.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_io_storage.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_version.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/plat_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/platform_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/bl31_plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/drivers/pmu/pmu_com.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_params.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/rockchip_sip_svc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/params_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv2.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv3.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_sip_svc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/pmu/plat_pmu_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/pmu/pmu.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/pmu/pmu.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/soc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/soc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/plat_sip_calls.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/plat_sip_calls.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/rk3368_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dcf_code.inc (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dram.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dram.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/rk3399_gpio.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/pmu.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/pmu.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pwm/pwm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pwm/pwm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/soc/soc.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/soc/soc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/include/plat_sip_calls.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/plat_sip_calls.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/rk3399_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/aarch64/zynqmp_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/bl31_zynqmp_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/include/plat_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/include/platform_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_psci.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_startup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_topology.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_zynqmp.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/platform.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_defs.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/sip_svc_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/tsp/tsp-zynqmp.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/readme.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/teesmc_opteed.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/teesmc_opteed_macros.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_helpers.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_pm.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_private.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/services/std_svc/std_svc_setup.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cert.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cmd_opt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/debug.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/ext.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/key.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/sha.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_cert.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_ext.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_key.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cert.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cmd_opt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/ext.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/key.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/sha.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_cert.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_ext.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_key.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/dummy_create/makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/dummy_create/sa0.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/dummy_create/sa0.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/dummy_create/sa6.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/dummy_create/sa6.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/fip_create.sh (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/fiptool.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/fiptool.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/tbbr_config.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/tbbr_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/AArch32_boot/stack.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/AArch64_boot/stack.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/LICENSE.md (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/cert_param.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/devdrv.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/generic_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/hscifdrv0.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/bit.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/devdrv.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/hscifdrv0.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/init_scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/main.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/mem_io.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/reg_rcargen3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/scifdrv0.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/scifdrv0_v3h.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/scifdrv2.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/scifdrv3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/timer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/include/vmsatable.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/init_scif.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/mem_io.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/memory_cr7.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/memory_smon.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/memory_smon_rgid_on.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/memory_tee.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/memory_tee_rgid_on.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/memory_u_boot.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/memory_u_boot_rgid_on.def (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/scifdrv0.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/scifdrv0_v3h.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/scifdrv2.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/scifdrv3.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_CA76/vmsatable.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/common/log.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/common/mem_io.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/common/micro_wait.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/common/remap.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/common/scif.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/common/wdt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/fw/dummy_fw.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/fw/dummy_fw.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/fw/dummy_fw_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/fw/vecttbl.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/dummy_fw_main.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/log.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/mem_io.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/micro_wait.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/rcar_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/remap.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/remap_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/rst_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/scif_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_FW/include/wdt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/common/div.s (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/common/generic_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/common/scif.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/debug.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/machine/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/machine/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/reg_rcar_gen3.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/stdarg.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/stddef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/stdio.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/string.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/sys/_null.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/sys/_stdint.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/sys/_types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/sys/cdefs.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/include/timer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/rtos/rtos.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/rtos/rtos.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core1.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core2.ld.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Dummy_RTOS/rtos/rtos_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/Makefile (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/log.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/scif.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/timer/micro_wait.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/cpu_on/cpu_on.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_emmc.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_flash.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/access_protection.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ap_system_core_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/avs.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/axmm_register.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/cnf_tbl.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu_on.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_boot.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_config.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_def.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_hal.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_multiboot.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_registers.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_std.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/hscif_register.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_emmc.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_flash.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/inline_asm.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc_id.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ip_control.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main_common.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/log.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mcu_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mem_io.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/micro_wait.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/qos.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_def.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_protection.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rcar_def.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rom_api.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/rst_register.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtsram_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/sysc.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/types.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/vect_set.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/include/wdt.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/intc.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vect_set.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vecttbl.S create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/avs/avs.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/cpg/cpg.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/ddr.mk create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/dma/dma.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/i2c/i2c.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ip_control.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/mfis/mfis.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/qos/qos.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rpc/rpc.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/sysc/sysc.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/ip/wdt/wdt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader.S rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_common.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_s4.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4h.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4m.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac_register.h create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/ram_protection.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/protect/region_id.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/stack_protect.c rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/remap/remap.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/rom_api/rom_api.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c (100%) create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c create mode 100644 Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/Makefile (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/common/log/log.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/common/log/scif.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/common/string.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/common/timer/generic_timer.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/cpu_on/cpu_on.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/image_load/image_load.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/access_protection.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/axmm_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/cnf_tbl.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/cpu_on.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/emmc_boot.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/emmc_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/emmc_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/emmc_hal.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/emmc_multiboot.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/emmc_registers.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/emmc_std.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/gic.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/hscif_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/image_load.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/image_load_emmc.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/inline_asm.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/interrupt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/ip_control.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/loader_main.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/loader_main_common.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/loader_mmu_table.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/log.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/mem_io.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/qos.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/ram_protection.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/rcar_def.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/rcar_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/rst_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/rtvram.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/rtvram_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/scif.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/scif_register.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/secure_boot.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/string.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/swdt.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/timer.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/include/types.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/boot_init_dram.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/ddr.mk (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_boot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_cmd.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_init.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_mount.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_read.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_utility.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/interrupt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/ip_control.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/qos/qos.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/rtvram/rtvram.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/ip/swdt/swdt.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/asm_macros.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_exceptions.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main_common.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_mmu_table.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.ld (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/loader/stack.S (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/protect/region_id/region_id.c (100%) rename Src/0_Tool/{IPL => Gen4_R-Car_IPL}/SDK/v4h/src/V4H_Cx_Loader/secure/secure_boot.c (100%) diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/.gitignore b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/.gitignore similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/.gitignore rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/.gitignore diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/Makefile similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/Makefile diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/crc32.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/crc32.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/crc32.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/crc32.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/log/log.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/log/log.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/log/log.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/log/log.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/log/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/log/scif.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/log/scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/log/scif.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/scmt_checkpoint.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/scmt_checkpoint.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/scmt_checkpoint.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/scmt_checkpoint.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/timer/micro_wait.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/timer/micro_wait.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/timer/micro_wait.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/timer/micro_wait.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/timer/scmt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/timer/scmt.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/common/timer/scmt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/common/timer/scmt.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/cpu_on/cpu_on.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/cpu_on/cpu_on.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/cpu_on/cpu_on.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/cpu_on/cpu_on.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/dos.mk b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/dos.mk similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/dos.mk rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/dos.mk diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/env.ini b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/env.ini similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/env.ini rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/env.ini diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/image_load/android_ab.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/image_load/android_ab.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/image_load/android_ab.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/image_load/android_ab.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/image_load/image_load.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/image_load/image_load.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/image_load/image_load.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/image_load/image_load.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/image_load/image_load_emmc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/image_load/image_load_emmc.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/image_load/image_load_emmc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/image_load/image_load_emmc.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/image_load/image_load_flash.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/image_load/image_load_flash.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/image_load/image_load_flash.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/image_load/image_load_flash.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/access_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/access_protection.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/access_protection.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/access_protection.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/android_ab.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/android_ab.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/android_ab.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/android_ab.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/android_bootloader_message.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/android_bootloader_message.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/android_bootloader_message.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/android_bootloader_message.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/ap_system_core_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/ap_system_core_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/ap_system_core_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/ap_system_core_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/avs.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/avs.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/avs.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/avs.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/axmm_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/axmm_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/axmm_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/axmm_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/bit.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/bit.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/bit.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/bit.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cnf_tbl.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cnf_tbl.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cnf_tbl.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cnf_tbl.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cpg.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cpg.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cpg.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cpg.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cpg_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cpg_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cpg_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cpg_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cpu.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cpu.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cpu.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cpu.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cpu_on.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cpu_on.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/cpu_on.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/cpu_on.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/crc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/crc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/crc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/crc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/dma.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/dma.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/dma.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/dma.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/dma_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/dma_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/dma_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/dma_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_boot.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_boot.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_boot.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_boot.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_config.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_config.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_def.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_def.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_hal.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_hal.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_hal.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_hal.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_multiboot.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_multiboot.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_multiboot.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_multiboot.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_registers.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_registers.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_registers.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_registers.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_std.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_std.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/emmc_std.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/emmc_std.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/fcpr.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/fcpr.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/fcpr.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/fcpr.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/fcpr_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/fcpr_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/fcpr_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/fcpr_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/gpio.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/gpio.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/gpio.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/gpio.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/hscif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/hscif_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/hscif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/hscif_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/i2c.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/i2c.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/i2c.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/i2c.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/i2c_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/i2c_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/i2c_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/i2c_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/image_load.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/image_load.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/image_load.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/image_load.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/image_load_emmc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/image_load_emmc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/image_load_emmc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/image_load_emmc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/image_load_flash.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/image_load_flash.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/image_load_flash.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/image_load_flash.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/inline_asm.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/inline_asm.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/inline_asm.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/inline_asm.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/intc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/intc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/intc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/intc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/intc_id.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/intc_id.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/intc_id.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/intc_id.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/ip_control.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/ip_control.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/ip_control.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/ip_control.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/loader_main.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/loader_main.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/loader_main.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/loader_main.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/loader_main_common.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/loader_main_common.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/loader_main_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/loader_main_common.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/log.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/log.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/log.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/log.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/mcu_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/mcu_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/mcu_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/mcu_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/mem_io.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/mem_io.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/mem_io.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/mem_io.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/mfis.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/mfis.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/mfis.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/mfis.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/mfis_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/mfis_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/mfis_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/mfis_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/micro_wait.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/micro_wait.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/micro_wait.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/pfc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/pfc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/pfc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/pfc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/pfc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/pfc_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/pfc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/pfc_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/qos.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/qos.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/qos.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/qos.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/ram_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/ram_def.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/ram_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/ram_def.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/ram_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/ram_protection.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/ram_protection.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/ram_protection.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rcar_def.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/remap.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/remap.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/remap.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/remap.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/remap_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/remap_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/remap_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/remap_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rom_api.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rom_api.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rom_api.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rom_api.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rpc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rpc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rpc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rpc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rpc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rpc_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rpc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rpc_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rpcqspidrv.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rpcqspidrv.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rpcqspidrv.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rpcqspidrv.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rst_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rst_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rst_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rst_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rtsram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rtsram_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rtsram_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rtsram_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rtvram.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rtvram.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rtvram.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rtvram.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rtvram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rtvram_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/rtvram_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/rtvram_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/san.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/san.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/san.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/san.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scif.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scif_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scif_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scmt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scmt.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scmt.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scmt.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scmt_checkpoint.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scmt_checkpoint.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scmt_checkpoint.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scmt_checkpoint.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scmt_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scmt_config.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scmt_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scmt_config.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scmt_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scmt_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/scmt_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/scmt_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/spiflash2drv.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/spiflash2drv.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/spiflash2drv.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/spiflash2drv.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/sysc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/sysc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/sysc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/sysc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/types.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/types.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/types.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/types.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/vect_set.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/vect_set.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/vect_set.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/vect_set.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/wdt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/wdt.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/wdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/wdt.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/wdt_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/wdt_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/include/wdt_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/include/wdt_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/intc/intc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/intc/intc.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/intc/intc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/intc/intc.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/intc/vect_set.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/intc/vect_set.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/intc/vect_set.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/intc/vect_set.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/intc/vecttbl.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/intc/vecttbl.S similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/intc/vecttbl.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/intc/vecttbl.S diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/avs/avs.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/avs/avs.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/avs/avs.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/avs/avs.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/cpg/cpg.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/cpg/cpg.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/cpg/cpg.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/cpg/cpg.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/ddr.mk b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/ddr.mk similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/ddr.mk rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/ddr.mk diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/dma/dma.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/dma/dma.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/dma/dma.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/dma/dma.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/gpio/gpio.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/gpio/gpio.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/gpio/gpio.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/gpio/gpio.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/i2c/i2c.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/i2c/i2c.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/i2c/i2c.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/i2c/i2c.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/i2c/i2c5.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/i2c/i2c5.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/i2c/i2c5.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/i2c/i2c5.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ip_control.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ip_control.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/ip_control.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/ip_control.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/mfis/mfis.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/mfis/mfis.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/mfis/mfis.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/mfis/mfis.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/qos/qos.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/qos/qos.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/qos/qos.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/qos/qos.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/dma2.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/dma2.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/dma2.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/dma2.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/dma2.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/dma2.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/dma2.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/dma2.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/qspi_xdr_mode.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/qspi_xdr_mode.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/qspi_xdr_mode.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/qspi_xdr_mode.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/rpc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/rpc.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/rpc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/rpc.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/rpcqspidrv.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/rpcqspidrv.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/rpcqspidrv.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/rpcqspidrv.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/spiflash2drv.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/spiflash2drv.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rpc/spiflash2drv.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rpc/spiflash2drv.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/san/v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/san/v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/san/v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/san/v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/sysc/sysc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/sysc/sysc.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/sysc/sysc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/sysc/sysc.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/wdt/rwdt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/wdt/rwdt.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/wdt/rwdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/wdt/rwdt.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/wdt/wdt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/wdt/wdt.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/wdt/wdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/ip/wdt/wdt.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/icumx_loader.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/icumx_loader.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/icumx_loader.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/icumx_loader.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader.S similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader.S diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader_main_common.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader_main_common.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader_main_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader_main_common.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader_main_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader_main_s4.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader_main_s4.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader_main_s4.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader_main_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader_main_v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader_main_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader_main_v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader_main_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader_main_v4m.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/loader/loader_main_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/loader/loader_main_v4m.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/codesram_ecc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/codesram_ecc.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/codesram_ecc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/codesram_ecc.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/codesram_ecc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/codesram_ecc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/codesram_ecc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/codesram_ecc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/sdmac.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/sdmac.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/sdmac.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/sdmac.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/sdmac.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/sdmac.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/sdmac.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/sdmac.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/sdmac_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/sdmac_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/sdmac_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mcu/sdmac_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mk.sh b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mk.sh similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/mk.sh rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/mk.sh diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/protect/ram_protection.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/protect/ram_protection.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/protect/ram_protection.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/protect/ram_protection.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/protect/region_id.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/protect/region_id.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/protect/region_id.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/protect/region_id.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/protect/stack_protect.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/protect/stack_protect.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/protect/stack_protect.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/protect/stack_protect.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/remap/remap.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/remap/remap.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/remap/remap.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/remap/remap.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/rom_api/rom_api.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/rom_api/rom_api.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/rom_api/rom_api.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/rom_api/rom_api.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/t.diff b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/t.diff similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/t.diff rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/t.diff diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/Makefile similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/Makefile diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/crc32.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/crc32.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/crc32.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/crc32.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/log/log.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/log/log.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/log/log.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/log/log.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/log/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/log/scif.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/log/scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/log/scif.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/scmt_checkpoint.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/scmt_checkpoint.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/scmt_checkpoint.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/scmt_checkpoint.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/string.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/string.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/string.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/string.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/timer/generic_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/timer/generic_timer.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/timer/generic_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/timer/generic_timer.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/timer/scmt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/timer/scmt.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/common/timer/scmt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/common/timer/scmt.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cpu_on/cpu_on.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cpu_on/cpu_on.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/cpu_on/cpu_on.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/cpu_on/cpu_on.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/image_load/android_ab.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/image_load/android_ab.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/image_load/android_ab.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/image_load/android_ab.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/image_load/image_load.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/image_load/image_load.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/image_load/image_load.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/image_load/image_load.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/access_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/access_protection.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/access_protection.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/access_protection.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/android_ab.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/android_ab.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/android_ab.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/android_ab.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/android_bootloader_message.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/android_bootloader_message.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/android_bootloader_message.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/android_bootloader_message.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/axmm_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/axmm_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/axmm_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/axmm_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/cnf_tbl.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/cnf_tbl.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/cnf_tbl.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/cnf_tbl.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/cpu_on.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/cpu_on.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/cpu_on.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/cpu_on.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/crc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/crc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/crc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/crc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_boot.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_boot.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_boot.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_boot.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_config.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_config.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_def.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_def.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_hal.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_hal.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_hal.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_hal.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_multiboot.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_multiboot.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_multiboot.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_multiboot.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_registers.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_registers.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_registers.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_registers.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_std.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_std.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/emmc_std.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/emmc_std.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/gic.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/gic.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/gic.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/gic.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/hscif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/hscif_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/hscif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/hscif_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/image_load.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/image_load.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/image_load.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/image_load.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/image_load_emmc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/image_load_emmc.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/image_load_emmc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/image_load_emmc.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/inline_asm.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/inline_asm.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/inline_asm.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/inline_asm.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/interrupt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/interrupt.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/interrupt.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/interrupt.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/ip_control.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/ip_control.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/ip_control.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/ip_control.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/loader_main.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/loader_main.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/loader_main.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/loader_main.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/loader_main_common.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/loader_main_common.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/loader_main_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/loader_main_common.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/loader_mmu_table.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/loader_mmu_table.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/loader_mmu_table.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/loader_mmu_table.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/log.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/log.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/log.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/log.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/mem_io.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/mem_io.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/mem_io.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/mem_io.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/qos.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/qos.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/qos.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/qos.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/ram_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/ram_protection.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/ram_protection.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/ram_protection.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rcar_def.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rcar_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rcar_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rcar_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rcar_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rst_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rst_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rst_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rst_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rtvram.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rtvram.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rtvram.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rtvram.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rtvram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rtvram_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/rtvram_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/rtvram_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scif.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scif_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scif_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scmt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scmt.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scmt.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scmt.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scmt_checkpoint.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scmt_checkpoint.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scmt_checkpoint.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scmt_checkpoint.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scmt_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scmt_config.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scmt_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scmt_config.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scmt_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scmt_register.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/scmt_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/scmt_register.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/secure_boot.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/secure_boot.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/secure_boot.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/secure_boot.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/string.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/string.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/string.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/string.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/swdt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/swdt.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/swdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/swdt.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/timer.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/timer.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/timer.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/types.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/types.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/include/types.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/include/types.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/boot_init_dram.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/boot_init_dram.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/boot_init_dram.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/boot_init_dram.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/ddr.mk b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/ddr.mk similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/ddr.mk rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/ddr.mk diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/dram_sub_func.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/dram_sub_func.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/dram_sub_func.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/dram_sub_func.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/dram_sub_func.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/dram_sub_func.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/dram_sub_func.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/dram_sub_func.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_boot.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_boot.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_cmd.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_cmd.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_cmd.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_cmd.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_init.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_init.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_mount.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_mount.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_mount.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_mount.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_read.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_read.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_read.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_read.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_utility.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_utility.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/emmc/emmc_utility.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/emmc/emmc_utility.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/gpio b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/gpio similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/gpio rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/gpio diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/interrupt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/interrupt.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/interrupt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/interrupt.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ip_control.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ip_control.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/ip_control.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/ip_control.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/qos/qos.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/qos/qos.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/qos/qos.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/qos/qos.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/rtvram/rtvram.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/rtvram/rtvram.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/rtvram/rtvram.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/rtvram/rtvram.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/swdt/swdt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/swdt/swdt.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/ip/swdt/swdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/ip/swdt/swdt.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/asm_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/asm_macros.S similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/asm_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/asm_macros.S diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_exceptions.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_exceptions.S similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_exceptions.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_exceptions.S diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_main.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_main.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_main.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_main_common.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_main_common.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_main_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_main_common.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_mmu_table.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_mmu_table.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_mmu_table.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_mmu_table.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_s4.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_s4.S similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_s4.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_s4.S diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_s4.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_s4.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_s4.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_s4.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_v4h.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_v4h.S similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_v4h.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_v4h.S diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_v4h.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_v4h.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_v4h.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_v4h.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_v4m.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_v4m.S similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_v4m.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_v4m.S diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_v4m.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_v4m.ld similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/loader_v4m.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/loader_v4m.ld diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/stack.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/stack.S similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/loader/stack.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/loader/stack.S diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/mk.sh b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/mk.sh similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/mk.sh rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/mk.sh diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/protect/region_id/region_id.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/protect/region_id/region_id.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/protect/region_id/region_id.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/protect/region_id/region_id.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/ICUMXB_modifed.diff b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/ICUMXB_modifed.diff similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/ICUMXB_modifed.diff rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/ICUMXB_modifed.diff diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_auth_cipher.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_auth_cipher.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_auth_cipher.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_auth_cipher.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cipher.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cipher.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cipher.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cipher.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac_short.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac_short.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac_short.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_cmac_short.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_export_she.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_export_she.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_export_she.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_export_she.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_plain.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_plain.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_plain.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_plain.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_she.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_she.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_she.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_aes_key_update_she.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_cancel_she.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_cancel_she.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_cancel_she.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_cancel_she.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_cmd_debug.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_cmd_debug.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_cmd_debug.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_cmd_debug.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecc_key_generate.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecc_key_generate.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecc_key_generate.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecc_key_generate.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdh.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdh.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdh.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdh.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_sign.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_sign.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_sign.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_sign.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_verify.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_verify.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_verify.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_ecdsa_verify.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_sign.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_sign.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_sign.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_sign.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_verify.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_verify.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_verify.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_eddsa_verify.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_id.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_id.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_id.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_id.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_info.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_info.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_info.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_get_info.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_hash.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_hash.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_hash.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_hash.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac_import.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac_import.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac_import.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_hmac_import.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_iso15118_update.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_iso15118_update.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_iso15118_update.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_iso15118_update.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_key_mgmt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_key_mgmt.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_key_mgmt.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_key_mgmt.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_lifecycle.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_lifecycle.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_lifecycle.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_lifecycle.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_def.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_def.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_install.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_install.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_install.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_install.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify_auto.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify_auto.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify_auto.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mem_cluster_verify_auto.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mono_ctr.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mono_ctr.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_mono_ctr.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_mono_ctr.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_export.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_export.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_export.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_export.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import_ext.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import_ext.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import_ext.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_pk_import_ext.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rand_generate.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rand_generate.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rand_generate.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rand_generate.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_decrypt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_decrypt.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_decrypt.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_decrypt.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_encrypt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_encrypt.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_encrypt.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_encrypt.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_key_generate.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_key_generate.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_key_generate.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_key_generate.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_sign.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_sign.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_sign.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_sign.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_verify.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_verify.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_verify.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_rsa_verify.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_secure_boot_api.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_secure_boot_api.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_secure_boot_api.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_secure_boot_api.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_she.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_she.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_she.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_she.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_cfg.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_cfg.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_cfg.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_cfg.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_init.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_init.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_sys_init.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_ecdh_exchange.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_ecdh_exchange.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_ecdh_exchange.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_ecdh_exchange.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_rsa_exchange.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_rsa_exchange.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_rsa_exchange.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_rsa_exchange.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_verify_data.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_verify_data.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_verify_data.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/r_icumif_api_tls_verify_data.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/renesas_types.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/renesas_types.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/icumif/renesas_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/icumif/renesas_types.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/include/icum_d_comm_pe_pub.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/include/icum_d_comm_pe_pub.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/include/icum_d_comm_pe_pub.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/include/icum_d_comm_pe_pub.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/include/r_icumif_pub.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/include/r_icumif_pub.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/include/r_icumif_pub.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/include/r_icumif_pub.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/include/user_icumif_api_pub.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/include/user_icumif_api_pub.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/include/user_icumif_api_pub.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/include/user_icumif_api_pub.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/secure_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/secure_boot.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/secure_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/secure_boot.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/shared/src/lorem_ipsum.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/shared/src/lorem_ipsum.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/shared/src/lorem_ipsum.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/shared/src/lorem_ipsum.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/shared/src/mem_info_def.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/shared/src/mem_info_def.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/shared/src/mem_info_def.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/shared/src/mem_info_def.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/shared/src/shared.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/shared/src/shared.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/shared/src/shared.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/shared/src/shared.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/src/comm_drv/icum_d_comm_pe.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/src/icumif_lib/r_icumif.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/user_api/user_icumif_api.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/user_api/user_icumif_api.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/user_api/user_icumif_api.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/user_api/user_icumif_api.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/user_api/user_icumif_api.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/user_api/user_icumif_api.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/V4H_Cx_Loader/secure/user_api/user_icumif_api.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/V4H_Cx_Loader/secure/user_api/user_icumif_api.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/.gitignore b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/.gitignore similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/.gitignore rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/.gitignore diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/boot_mon.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/boot_mon.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/boot_mon.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/boot_mon.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/boot_mon.s b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/boot_mon.s similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/boot_mon.s rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/boot_mon.s diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/d_armasm.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/d_armasm.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/d_armasm.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/d_armasm.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/d_armasm.s b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/d_armasm.s similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/d_armasm.s rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/d_armasm.s diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/stack.s b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/stack.s similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/AArch64_boot/stack.s rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/AArch64_boot/stack.s diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/LICENSE.md b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/LICENSE.md similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/LICENSE.md rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/LICENSE.md diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/Makefile similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/Makefile diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/cert_param.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/cert_param.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/cert_param.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/cert_param.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/common b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/common similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/common rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/common diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/image_load b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/image_load similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/image_load rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/image_load diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/include/bit.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/include/bit.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/include/bit.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/include/bit.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/include/vmsatable.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/include/vmsatable.h similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/include/vmsatable.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/include/vmsatable.h diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/ip b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/ip similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/ip rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/ip diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/loader b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/loader similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/loader rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/loader diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/main.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/main.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/main.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/main.c diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/memory_cx_ipl.def b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/memory_cx_ipl.def similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/memory_cx_ipl.def rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/memory_cx_ipl.def diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/mk.sh b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/mk.sh similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/mk.sh rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/mk.sh diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/secure b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/secure similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/secure rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/secure diff --git a/Src/0_Tool/IPL/Customer/Mobis/ca76_loader/vmsatable.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/vmsatable.c similarity index 100% rename from Src/0_Tool/IPL/Customer/Mobis/ca76_loader/vmsatable.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20200801/ca76_loader/vmsatable.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/Makefile new file mode 100644 index 00000000..d863000c --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/Makefile @@ -0,0 +1,667 @@ +#/******************************************************************************* +# * DISCLAIMER +# * This software is supplied by Renesas Electronics Corporation and is only +# * intended for use with Renesas products. No other uses are authorized. This +# * software is owned by Renesas Electronics Corporation and is protected under +# * all applicable laws, including copyright laws. +# * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +# * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +# * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +# * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +# * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +# * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +# * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +# * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +# * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +# * Renesas reserves the right, without notice, to make changes to this software +# * and to discontinue the availability of this software. By using this software, +# * you agree to the additional terms and conditions found by accessing the +# * following link: +# * http://www.renesas.com/disclaimer +# * Copyright 2022-2025 Renesas Electronics Corporation All rights reserved. +# *******************************************************************************/ +# +# ******************************************************************************* +# * DESCRIPTION : makefile for Loader +# ****************************************************************************** + +define add_define +DEFINES += -D$(1)$(if $(value $(1)),=$(value $(1)),) +endef + +INCLUDE_DIR = -Iinclude \ + -Iip/ddr + +OUTDIR := build + +# LSI setting common define +RCAR_S4 := 0 +RCAR_V4H := 1 +RCAR_V4M := 2 +$(eval $(call add_define,RCAR_S4)) +$(eval $(call add_define,RCAR_V4H)) +$(eval $(call add_define,RCAR_V4M)) +ifneq ("$(FORCE_115200)", "") +$(eval $(call add_define,FORCE_115200)) +endif + +#/* Select LSI("S4" or "V4H" or "V4M" )******************************** +ifeq ("$(LSI)", "") +LSI = S4 +endif + +ifeq (${LSI},S4) + RCAR_LSI:=${RCAR_S4} + DIR_NAME_SA9 = s4 + OBJ_FILE += loader/loader_main_s4.o \ + cnf_tbl/cnf_tbl_s4.o \ + ip/qos/qos.o \ + ip/rtvram/rtvram.o \ + ip/ddr/s4/lpddr4x/ecc_enable_s4.o + INCLUDE_DIR += -Imcu + include ip/ddr/ddr.mk +else ifeq (${LSI},V4H) + RCAR_LSI:=${RCAR_V4H} + DIR_NAME_SA9 = v4h + OBJ_FILE += loader/loader_main_v4h.o \ + ip/fcpr/fcpr.o \ + cnf_tbl/cnf_tbl_v4h.o \ + ip/ddr/v4h/lpddr5/ecc_enable_v4h.o \ + ip/ddr/v4h/lpddr5/ecm_enable_v4h.o +else ifeq (${LSI},V4M) + RCAR_LSI:=${RCAR_V4M} + DIR_NAME_SA9 = v4m + OBJ_FILE += loader/loader_main_v4m.o \ + ip/fcpr/fcpr.o \ + cnf_tbl/cnf_tbl_v4m.o \ + ip/sysc/sysc.o \ + ip/avs/avs.o \ + ip/i2c/i2c.o \ + ip/ddr/v4m/lpddr5/ecc_enable_v4m.o \ + ip/ddr/v4m/lpddr5/ecm_enable_v4m.o +else + $(error "Error: ${LSI} is not supported.") +endif +$(eval $(call add_define,RCAR_LSI)) + +# +# timing measurement +# +ifeq ("$(MEASURE_TIME)", "") + MEASURE_TIME = 0 +else + $(eval $(call add_define,MEASURE_TIME)) + #Set log level to Error, so we dont waste time with unnecessary prints + ifndef LOG_LEVEL + LOG_LEVEL := 1 + endif + OBJ_FILE += common/scmt_checkpoint.o \ + common/timer/scmt.o +endif +ifeq ("$(MEASURE_TIME_NOPRINT)", "") + MEASURE_TIME_NOPRINT = 0 +else + $(eval $(call add_define,MEASURE_TIME_NOPRINT)) +endif + +################################################### + +#output file name +FILE_NAME = icumx_loader +FILE_NAME_SA0 = bootparam_sa0 +FILE_NAME_SA9 = cert_header_sa9 +FILE_NAME_TFMV_TBL = tfmv_ver_tbl +FILE_NAME_NTFMV_TBL = ntfmv_ver_tbl + +OUTPUT_FILE = $(FILE_NAME).elf +OUTPUT_FILE_SA0 = $(FILE_NAME_SA0).elf +OUTPUT_FILE_SA9 = $(FILE_NAME_SA9).elf +OUTPUT_FILE_TFMV_TBL = $(FILE_NAME_TFMV_TBL).elf +OUTPUT_FILE_NTFMV_TBL = $(FILE_NAME_NTFMV_TBL).elf + +#object file name +OBJ_FILE += cpu_on/cpu_on.o \ + common/log/log.o \ + common/log/scif.o \ + common/timer/micro_wait.o \ + image_load/image_load.o \ + intc/intc.o \ + intc/vecttbl.o \ + intc/vect_set.o \ + ip/ip_control.o \ + ip/cpg/cpg.o \ + ip/emmc/emmc_boot.o \ + ip/wdt/wdt.o \ + loader/loader.o \ + loader/loader_main_common.o \ + protect/ram_protection.o \ + protect/region_id.o \ + protect/stack_protect.o \ + remap/remap.o \ + rom_api/rom_api.o + +OBJ_FILE_SA0 = tools/dummy_create/sa0.o +OBJ_FILE_SA9 = tools/dummy_create/$(DIR_NAME_SA9)/sa9.o +OBJ_FILE_TFMV_TBL = tools/sw_min_ver_tbl/tfmv_ver_tbl.o +OBJ_FILE_NTFMV_TBL = tools/sw_min_ver_tbl/ntfmv_ver_tbl.o + +#linker script name +ifeq (${LSI},V4M) + MEMORY_DEF = loader/icumx_loader_v4m.ld +else + MEMORY_DEF = loader/icumx_loader.ld +endif + +MEMORY_DEF_SA0 = tools/dummy_create/sa0.ld +MEMORY_DEF_SA9 = tools/dummy_create/$(DIR_NAME_SA9)/sa9.ld +MEMORY_DEF_TFMV_TBL = tools/sw_min_ver_tbl/tfmv_ver_tbl.ld +MEMORY_DEF_NTFMV_TBL = tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld + +################################################### + +# Debug build +DEBUG:=0 + +# Process DEBUG flag +$(eval $(call assert_boolean,DEBUG)) +$(eval $(call add_define,DEBUG)) +ifeq (${DEBUG},0) + $(eval $(call add_define,NDEBUG)) +CFLAGS += -Onone +else +ASFLAGS += -G -dwarf2 +CFLAGS += -G -dwarf2 -Odebug +endif + +# MISRA Option +#------ MISRA ------ +ifndef MISRA +MISRA := MANDATORY +endif +ifeq ("$(MISRA)", "DISABLE") + MISRA_OPTION = DISABLE +else ifeq ("$(MISRA)", "FULL") + MISRA_OPTION = FULL +else ifeq ("$(MISRA)", "MANDATORY") + MISRA_OPTION = MANDATORY +else ifeq ("$(MISRA)", "REQUIRED") + MISRA_OPTION = REQUIRED +endif +CFLAGS_MISRA_FULL = \ + --misra_adv=warn \ + --misra_req=warn \ + --misra_mand=warn \ + --no_misra_runtime \ + --misra_2012=all,-R1.1 # MISRA 2012 Rule 1.1 not allowed with non-strict -c99 or later +CFLAGS_MISRA_REQUIRED = \ + --misra_adv=silent \ + --misra_req=warn \ + --misra_mand=warn \ + --no_misra_runtime \ + --misra_2012=all,-R1.1 # MISRA 2012 Rule 1.1 not allowed with non-strict -c99 or later +CFLAGS_MISRA_MANDATORY = \ + --misra_adv=silent \ + --misra_req=silent \ + --misra_mand=warn \ + --no_misra_runtime \ + --misra_2012=all,-R1.1,-R3.1 # MISRA 2012 Rule 1.1 not allowed with non-strict -c99 or later + # MISRA 2012 Rule 3.1 is confirmed with static analysis +ifeq ("$(MISRA_OPTION)", "FULL") +CFLAGS += $(CFLAGS_MISRA_FULL) +else ifeq ("$(MISRA)", "REQUIRED") +CFLAGS += $(CFLAGS_MISRA_REQUIRED) +else ifeq ("$(MISRA)", "MANDATORY") +CFLAGS += $(CFLAGS_MISRA_MANDATORY) +endif + +# Process LOG_LEVEL +ifndef LOG_LEVEL +LOG_LEVEL := 2 +endif +$(eval $(call add_define,LOG_LEVEL)) +ifeq (${LOG_LEVEL},0) + LDFLAGS += -nostdlib +endif + +# Process SET_FCPR_PARAM flag +# 0:Disable, 1:Enable (Support V4H / V4M Linux OS) +ifeq ($(filter ${LSI},V4H V4M),${LSI}) + ifndef SET_FCPR_PARAM + SET_FCPR_PARAM := 0 + $(eval $(call add_define,SET_FCPR_PARAM)) + else + ifeq (${SET_FCPR_PARAM},0) + $(eval $(call add_define,SET_FCPR_PARAM)) + else ifeq (${SET_FCPR_PARAM},1) + $(eval $(call add_define,SET_FCPR_PARAM)) + else + $(error "Error:SET_FCPR_PARAM=${SET_FCPR_PARAM} is not supported.") + endif + endif +else + SET_FCPR_PARAM := 0 + $(eval $(call add_define,SET_FCPR_PARAM)) +endif + +# Process BOOT_MCU flag (S4 only) +# 0:None, 1:G4MH, 2:Reserved, 3:G4MH+ICUMH +ifeq (${LSI},S4) + ifndef BOOT_MCU + BOOT_MCU :=3 + $(eval $(call add_define,BOOT_MCU)) + else + ifeq (${BOOT_MCU},0) + $(eval $(call add_define,BOOT_MCU)) + else ifeq (${BOOT_MCU},1) + $(eval $(call add_define,BOOT_MCU)) + else ifeq (${BOOT_MCU},2) + $(eval $(call add_define,BOOT_MCU)) + else ifeq (${BOOT_MCU},3) + $(eval $(call add_define,BOOT_MCU)) + else + $(error "Error:BOOT_MCU=${BOOT_MCU} is not supported.") + endif + endif +else + BOOT_MCU :=0 + $(eval $(call add_define,BOOT_MCU)) +endif + +ifneq (${BOOT_MCU},0) +OBJ_FILE += mcu/cpu_on_for_mcu.o \ + mcu/sdmac.o \ + mcu/loader_main_mcu.o \ + mcu/image_load_for_mcu.o \ + mcu/codesram_ecc.o +endif + +# Process RTVRAM_EXTEND flag +ifeq (${LSI},S4) + ifndef RTVRAM_EXTEND + RTVRAM_EXTEND := 1 + $(eval $(call add_define,RTVRAM_EXTEND)) + else + ifeq (${RTVRAM_EXTEND},0) + $(eval $(call add_define,RTVRAM_EXTEND)) + else ifeq (${RTVRAM_EXTEND},1) + $(eval $(call add_define,RTVRAM_EXTEND)) + else + $(error "Error:RTVRAM_EXTEND=${RTVRAM_EXTEND} is not supported.") + endif + endif +endif + +# Process QSPI_DDR_MODE flag +# 0:SDR, 1:DDR +ifndef QSPI_DDR_MODE +QSPI_DDR_MODE := 0 +$(eval $(call add_define,QSPI_DDR_MODE)) +else + ifeq (${QSPI_DDR_MODE},0) + $(eval $(call add_define,QSPI_DDR_MODE)) + else ifeq (${QSPI_DDR_MODE},1) + $(eval $(call add_define,QSPI_DDR_MODE)) + else + $(error "Error:QSPI_DDR_MODE=${QSPI_DDR_MODE} is not supported.") + endif +endif + +# RCAR_QSPI_DDR_DUMMY_CYCLE +ifndef RCAR_QSPI_DDR_DUMMY_CYCLE +RCAR_QSPI_DDR_DUMMY_CYCLE := 9 +endif +$(eval $(call add_define,RCAR_QSPI_DDR_DUMMY_CYCLE)) + +# Process RCAR_SA9_TYPE flag +# 0:Flash, 1:eMMC +ifeq (${LSI},S4) + ifndef RCAR_SA9_TYPE + RCAR_SA9_TYPE := 0 + $(eval $(call add_define,RCAR_SA9_TYPE)) + else + ifeq (${RCAR_SA9_TYPE},0) + $(eval $(call add_define,RCAR_SA9_TYPE)) + else ifeq (${RCAR_SA9_TYPE},1) + $(eval $(call add_define,RCAR_SA9_TYPE)) + else + $(error "Error:RCAR_SA9_TYPE=${RCAR_SA9_TYPE} is not supported.") + endif + endif +else ifeq ($(filter ${LSI},V4H V4M),${LSI}) + RCAR_SA9_TYPE := 0 + $(eval $(call add_define,RCAR_SA9_TYPE)) +endif + + +ifeq (${RCAR_SA9_TYPE},1) +OBJ_FILE += image_load/image_load_emmc.o \ + ip/emmc/emmc_cmd.o \ + ip/emmc/emmc_init.o \ + ip/emmc/emmc_interrupt.o \ + ip/emmc/emmc_mount.o \ + ip/emmc/emmc_multiboot.o \ + ip/emmc/emmc_read.o \ + ip/emmc/emmc_utility.o +else ifeq (${RCAR_SA9_TYPE},0) +OBJ_FILE += image_load/image_load_flash.o \ + ip/dma/dma.o \ + ip/rpc/rpc.o \ + ip/mfis/mfis.o +endif + +# Process CA_LOAD_TYPE flag +# 0:CA Loader 1:BL31 (or Secure Monitor) +ifeq (${LSI},S4) + ifndef CA_LOAD_TYPE + CA_LOAD_TYPE := 0 + $(eval $(call add_define,CA_LOAD_TYPE)) + else + ifeq (${CA_LOAD_TYPE},0) + $(eval $(call add_define,CA_LOAD_TYPE)) + else ifeq (${CA_LOAD_TYPE},1) + $(eval $(call add_define,CA_LOAD_TYPE)) + else + $(error "Error:CA_LOAD_TYPE=${CA_LOAD_TYPE} is not supported.") + endif + endif +else ifeq ($(filter ${LSI},V4H V4M),${LSI}) + CA_LOAD_TYPE := 0 + $(eval $(call add_define,CA_LOAD_TYPE)) +endif + +ifeq (${RCAR_SA9_TYPE},1) + ifeq (${CA_LOAD_TYPE},0) + $(error "Error:RCAR_SA9_TYPE=1 and CA_LOAD_TYPE=0 is not supported.") + endif +endif + +# Process MCU_SECURE_BOOT flag (S4 only) +ifndef MCU_SECURE_BOOT + MCU_SECURE_BOOT := 0 + $(eval $(call add_define,MCU_SECURE_BOOT)) +else + ifeq (${MCU_SECURE_BOOT},0) + $(eval $(call add_define,MCU_SECURE_BOOT)) + else ifeq (${MCU_SECURE_BOOT},1) + ifeq (${BOOT_MCU},0) + $(error "Error:MCU_SECURE_BOOT=${MCU_SECURE_BOOT} and BOOT_MCU=${BOOT_MCU} is not supported.") + else + $(eval $(call add_define,MCU_SECURE_BOOT)) + endif + else + $(error "Error:MCU_SECURE_BOOT=${MCU_SECURE_BOOT} is not supported.") + endif +endif + +# Process SW_VERSION_CHECK flag +# 0:Disable 1:Enable +ifndef SW_VERSION_CHECK +SW_VERSION_CHECK := 0 +$(eval $(call add_define,SW_VERSION_CHECK)) +else + ifeq (${SW_VERSION_CHECK},0) + $(eval $(call add_define,SW_VERSION_CHECK)) + else ifeq (${SW_VERSION_CHECK},1) + $(eval $(call add_define,SW_VERSION_CHECK)) + else + $(error "Error:SW_VERSION_CHECK=${SW_VERSION_CHECK} is not supported.") + endif +endif + +# Process access protection flag +# 0:Disable 1:Enable +ifndef ACC_PROT_ENABLE +ACC_PROT_ENABLE := 0 +$(eval $(call add_define,ACC_PROT_ENABLE)) +else + ifeq (${ACC_PROT_ENABLE},0) + $(eval $(call add_define,ACC_PROT_ENABLE)) + else ifeq (${ACC_PROT_ENABLE},1) + $(eval $(call add_define,ACC_PROT_ENABLE)) + else + $(error "Error:ACC_PROT_ENABLE=${ACC_PROT_ENABLE} is not supported.") + endif +endif + +ifeq (${MCU_SECURE_BOOT},1) +include mcu_secureboot/mcu_secureboot.mk +endif + +# Process ADD_HOTPLUG_MAGIC flag +ifndef ADD_HOTPLUG_MAGIC + ADD_HOTPLUG_MAGIC := 0 + $(eval $(call add_define,ADD_HOTPLUG_MAGIC)) +else + ifeq (${ADD_HOTPLUG_MAGIC},0) + $(eval $(call add_define,ADD_HOTPLUG_MAGIC)) + else ifeq (${ADD_HOTPLUG_MAGIC},1) + $(eval $(call add_define,ADD_HOTPLUG_MAGIC)) + else + $(error "Error:ADD_HOTPLUG_MAGIC=${ADD_HOTPLUG_MAGIC} is not supported.") + endif +endif + +# Process STACK_PROTECT flag +ifndef STACK_PROTECT + STACK_PROTECT := 0 + $(eval $(call add_define,STACK_PROTECT)) +else + ifeq (${STACK_PROTECT},0) + $(eval $(call add_define,STACK_PROTECT)) + else ifeq (${STACK_PROTECT},1) + $(eval $(call add_define,STACK_PROTECT)) + CFLAGS += -stack_protector + else + $(error "Error:STACK_PROTECT=${STACK_PROTECT} is not supported.") + endif +endif + +# Process RTOS_LOAD_NUM flag +# 1:RTOS#0 only 3:RTOS#0,#1,#2 +ifndef RTOS_LOAD_NUM + RTOS_LOAD_NUM := 1 + $(eval $(call add_define,RTOS_LOAD_NUM)) +else + ifeq (${RTOS_LOAD_NUM},1) + $(eval $(call add_define,RTOS_LOAD_NUM)) + else ifeq (${RTOS_LOAD_NUM},3) + $(eval $(call add_define,RTOS_LOAD_NUM)) + else + $(error "Error:RTOS_LOAD_NUM=${RTOS_LOAD_NUM} is not supported.") + endif +endif + +# Process OPTEE_LOAD_ENABLE flag +ifeq ($(filter ${LSI},V4H V4M),${LSI}) + ifndef OPTEE_LOAD_ENABLE + OPTEE_LOAD_ENABLE := 1 + $(eval $(call add_define,OPTEE_LOAD_ENABLE)) + else + ifeq (${OPTEE_LOAD_ENABLE},0) + $(eval $(call add_define,OPTEE_LOAD_ENABLE)) + else ifeq (${OPTEE_LOAD_ENABLE},1) + $(eval $(call add_define,OPTEE_LOAD_ENABLE)) + else + $(error "Error:OPTEE_LOAD_ENABLE=${OPTEE_LOAD_ENABLE} is not supported.") + endif + endif +endif + +################################################### +# pass SecureMonitor parametor +################################################### +# Process SET_CA_PARAM flag +ifeq (${LSI},S4) + ifndef SET_CA_PARAM + SET_CA_PARAM := 1 + $(eval $(call add_define,SET_CA_PARAM)) + else + ifeq (${SET_CA_PARAM},0) + $(eval $(call add_define,SET_CA_PARAM)) + else ifeq (${SET_CA_PARAM},1) + $(eval $(call add_define,SET_CA_PARAM)) + else + $(error "Error:SET_CA_PARAM=${SET_CA_PARAM} is not supported.") + endif + endif +endif + +# Process ECM_ENABLE +ifndef ECM_ENABLE + ECM_ENABLE:= 0 + $(eval $(call add_define,ECM_ENABLE)) +else + ifeq (${ECM_ENABLE},0) + $(eval $(call add_define,ECM_ENABLE)) + else ifeq (${ECM_ENABLE},1) + $(eval $(call add_define,ECM_ENABLE)) + else + $(error "Error: ECM_ENABLE=${ECM_ENABLE} is not supported.") + endif +endif + +# Process ECM_ERROR_ENABLE flag +ifndef ECM_ERROR_ENABLE + ECM_ERROR_ENABLE := 1 + $(eval $(call add_define,ECM_ERROR_ENABLE)) +else + ifeq (${ECM_ERROR_ENABLE},0) + $(eval $(call add_define,ECM_ERROR_ENABLE)) + else ifeq (${ECM_ERROR_ENABLE},1) + $(eval $(call add_define,ECM_ERROR_ENABLE)) + else + $(error "Error:ECM_ERROR_ENABLE=${ECM_ERROR_ENABLE} is not supported.") + endif +endif + + +# Process DBSC HUNGUP WA +ifndef WA_OTLINT5579 + WA_OTLINT5579:= 1 +endif +$(eval $(call add_define,WA_OTLINT5579)) + +################################################### + +OUTDIR_REL := $(OUTDIR)/release +OUTDIR_OBJ := $(OUTDIR)/obj + +OBJ_FILE := $(OBJ_FILE:%.o=$(OUTDIR_OBJ)/%.o) +OBJ_FILE_SA0 := $(OBJ_FILE_SA0:%.o=$(OUTDIR_OBJ)/%.o) +OBJ_FILE_SA9 := $(OBJ_FILE_SA9:%.o=$(OUTDIR_OBJ)/%.o) +OBJ_FILE_TFMV_TBL := $(OBJ_FILE_TFMV_TBL:%.o=$(OUTDIR_OBJ)/%.o) +OBJ_FILE_NTFMV_TBL := $(OBJ_FILE_NTFMV_TBL:%.o=$(OUTDIR_OBJ)/%.o) + +CC = cxrh850 +AS = cxrh850 +LD = cxrh850 +OC = gsrec +OD = gdump + +ASFLAGS += -asm="-preprocess_assembly_files" \ + -asm="-nostartfiles" \ + -D__ASSEMBLY \ + $(INCLUDE_DIR) $(DEFINES) + +CFLAGS += -nostartfiles \ + -c99 \ + $(INCLUDE_DIR) $(DEFINES) \ + --ghstd=last \ + -Wundef \ + --diag_error=193 \ + --prototype_errors +# --ghstd=last : Enable Green Hills Standard Mode +# -Wundef : Output warning if there are any undefined symbols +# --diag_error=193 : Error if zero is applied to undefined symbol +# --prototype_errors : Error if there are no any prototype declaration + +ifeq (${LOG_LEVEL},0) +# There are no any additional options +else +CFLAGS += --diag_suppress=1932 # There is warning that format string parameter in sprintf is not constant +endif + +LDFLAGS += -nostartfiles -Mu + +BUILD_MESSAGE_TIMESTAMP ?= __TIME__", "__DATE__ + +################################################### +.SUFFIXES : .s .c .o + +################################################### +# command + +.PHONY: all +all: $(OUTPUT_FILE) $(OUTPUT_FILE_SA0) $(OUTPUT_FILE_SA9) $(OUTPUT_FILE_TFMV_TBL) $(OUTPUT_FILE_NTFMV_TBL) + +################################################### +# Linker +################################################### +$(OUTPUT_FILE) : $(MEMORY_DEF) $(OBJ_FILE) + @echo 'const char build_message[] = "Built : "$(BUILD_MESSAGE_TIMESTAMP);' > $(OUTDIR_OBJ)/build_message.c + @$(CC) $(CFLAGS) -o $(OUTDIR_OBJ)/build_message.o -c $(OUTDIR_OBJ)/build_message.c + + @$(LD) $(OBJ_FILE) $(OUTDIR_OBJ)/build_message.o \ + -T $(MEMORY_DEF) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE) \ + $(LDFLAGS) \ + -map=$(OUTDIR_REL)/$(FILE_NAME).map + + @$(OC) -S3 -bytes 16 -noS5 $(OUTDIR_REL)/$(OUTPUT_FILE) > $(OUTDIR_REL)/$(FILE_NAME).srec + @$(OD) -full -ysec $(OUTDIR_REL)/$(OUTPUT_FILE) > $(OUTDIR_REL)/$(FILE_NAME).dump + @gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE) -o $(OUTDIR_REL)/$(OUTPUT_FILE:%.elf=%.bin) + +$(OUTPUT_FILE_SA0) : $(MEMORY_DEF_SA0) $(OBJ_FILE_SA0) + @$(LD) $(OBJ_FILE_SA0) \ + -T $(MEMORY_DEF_SA0) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE_SA0) \ + -map=$(OUTDIR_REL)/$(FILE_NAME_SA0).map \ + -nostdlib + + @$(OC) -S3 -bytes 16 -noS5 $(OUTDIR_REL)/$(OUTPUT_FILE_SA0) > $(OUTDIR_REL)/$(FILE_NAME_SA0).srec + @gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE_SA0) -o $(OUTDIR_REL)/$(OUTPUT_FILE_SA0:%.elf=%.bin) + +$(OUTPUT_FILE_SA9) : $(MEMORY_DEF_SA9) $(OBJ_FILE_SA9) + @$(LD) $(OBJ_FILE_SA9) \ + -T $(MEMORY_DEF_SA9) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE_SA9) \ + -map=$(OUTDIR_REL)/$(FILE_NAME_SA9).map \ + -nostdlib + + @$(OC) -S3 -bytes 16 -noS5 $(OUTDIR_REL)/$(OUTPUT_FILE_SA9) > $(OUTDIR_REL)/$(FILE_NAME_SA9).srec + @gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE_SA9) -o $(OUTDIR_REL)/$(OUTPUT_FILE_SA9:%.elf=%.bin) + +$(OUTPUT_FILE_TFMV_TBL) : $(MEMORY_DEF_TFMV_TBL) $(OBJ_FILE_TFMV_TBL) + @$(LD) $(OBJ_FILE_TFMV_TBL) \ + -T $(MEMORY_DEF_TFMV_TBL) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE_TFMV_TBL) \ + -map=$(OUTDIR_REL)/$(FILE_NAME_TFMV_TBL).map \ + -nostdlib + + @gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE_TFMV_TBL) -o $(OUTDIR_REL)/$(OUTPUT_FILE_TFMV_TBL:%.elf=%.bin) + +$(OUTPUT_FILE_NTFMV_TBL) : $(MEMORY_DEF_NTFMV_TBL) $(OBJ_FILE_NTFMV_TBL) + @$(LD) $(OBJ_FILE_NTFMV_TBL) \ + -T $(MEMORY_DEF_NTFMV_TBL) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE_NTFMV_TBL) \ + -map=$(OUTDIR_REL)/$(FILE_NAME_NTFMV_TBL).map \ + -nostdlib + + @gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE_NTFMV_TBL) -o $(OUTDIR_REL)/$(OUTPUT_FILE_NTFMV_TBL:%.elf=%.bin) + +################################################### +# Compile +################################################### + +$(OUTDIR_OBJ)/%.o:%.c + @if [ ! -e `dirname $@` ]; then mkdir -p `dirname $@`; fi + @$(CC) $(CFLAGS) -o $@ -c $< + +$(OUTDIR_OBJ)/%.o:%.S + @if [ ! -e `dirname $@` ]; then mkdir -p `dirname $@`; fi + @$(AS) $(ASFLAGS) -o $@ -c $< + + +.PHONY: clean +clean: + @rm -rf $(OUTDIR) diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/README.md b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/README.md new file mode 100644 index 00000000..30ca470f --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/README.md @@ -0,0 +1,93 @@ +# Gen4_ICUMX_Loader + + + +## Getting started + +To make it easy for you to get started with GitLab, here's a list of recommended next steps. + +Already a pro? Just edit this README.md and make it your own. Want to make it easy? [Use the template at the bottom](#editing-this-readme)! + +## Add your files + +* [Create](https://docs.gitlab.com/ee/user/project/repository/web_editor.html#create-a-file) or [upload](https://docs.gitlab.com/ee/user/project/repository/web_editor.html#upload-a-file) files +* [Add files using the command line](https://docs.gitlab.com/topics/git/add_files/#add-files-to-a-git-repository) or push an existing Git repository with the following command: + +``` +cd existing_repo +git remote add origin http://192.168.100.200/Mobis_PRK3/Gen4_ICUMX_Loader.gitlab.git +git branch -M main +git push -uf origin main +``` + +## Integrate with your tools + +* [Set up project integrations](http://192.168.100.200/Mobis_PRK3/Gen4_ICUMX_Loader.gitlab/-/settings/integrations) + +## Collaborate with your team + +* [Invite team members and collaborators](https://docs.gitlab.com/ee/user/project/members/) +* [Create a new merge request](https://docs.gitlab.com/ee/user/project/merge_requests/creating_merge_requests.html) +* [Automatically close issues from merge requests](https://docs.gitlab.com/ee/user/project/issues/managing_issues.html#closing-issues-automatically) +* [Enable merge request approvals](https://docs.gitlab.com/ee/user/project/merge_requests/approvals/) +* [Set auto-merge](https://docs.gitlab.com/user/project/merge_requests/auto_merge/) + +## Test and Deploy + +Use the built-in continuous integration in GitLab. + +* [Get started with GitLab CI/CD](https://docs.gitlab.com/ee/ci/quick_start/) +* [Analyze your code for known vulnerabilities with Static Application Security Testing (SAST)](https://docs.gitlab.com/ee/user/application_security/sast/) +* [Deploy to Kubernetes, Amazon EC2, or Amazon ECS using Auto Deploy](https://docs.gitlab.com/ee/topics/autodevops/requirements.html) +* [Use pull-based deployments for improved Kubernetes management](https://docs.gitlab.com/ee/user/clusters/agent/) +* [Set up protected environments](https://docs.gitlab.com/ee/ci/environments/protected_environments.html) + +*** + +# Editing this README + +When you're ready to make this README your own, just edit this file and use the handy template below (or feel free to structure it however you want - this is just a starting point!). Thanks to [makeareadme.com](https://www.makeareadme.com/) for this template. + +## Suggestions for a good README + +Every project is different, so consider which of these sections apply to yours. The sections used in the template are suggestions for most open source projects. Also keep in mind that while a README can be too long and detailed, too long is better than too short. If you think your README is too long, consider utilizing another form of documentation rather than cutting out information. + +## Name +Choose a self-explaining name for your project. + +## Description +Let people know what your project can do specifically. Provide context and add a link to any reference visitors might be unfamiliar with. A list of Features or a Background subsection can also be added here. If there are alternatives to your project, this is a good place to list differentiating factors. + +## Badges +On some READMEs, you may see small images that convey metadata, such as whether or not all the tests are passing for the project. You can use Shields to add some to your README. Many services also have instructions for adding a badge. + +## Visuals +Depending on what you are making, it can be a good idea to include screenshots or even a video (you'll frequently see GIFs rather than actual videos). Tools like ttygif can help, but check out Asciinema for a more sophisticated method. + +## Installation +Within a particular ecosystem, there may be a common way of installing things, such as using Yarn, NuGet, or Homebrew. However, consider the possibility that whoever is reading your README is a novice and would like more guidance. Listing specific steps helps remove ambiguity and gets people to using your project as quickly as possible. If it only runs in a specific context like a particular programming language version or operating system or has dependencies that have to be installed manually, also add a Requirements subsection. + +## Usage +Use examples liberally, and show the expected output if you can. It's helpful to have inline the smallest example of usage that you can demonstrate, while providing links to more sophisticated examples if they are too long to reasonably include in the README. + +## Support +Tell people where they can go to for help. It can be any combination of an issue tracker, a chat room, an email address, etc. + +## Roadmap +If you have ideas for releases in the future, it is a good idea to list them in the README. + +## Contributing +State if you are open to contributions and what your requirements are for accepting them. + +For people who want to make changes to your project, it's helpful to have some documentation on how to get started. Perhaps there is a script that they should run or some environment variables that they need to set. Make these steps explicit. These instructions could also be useful to your future self. + +You can also document commands to lint the code or run tests. These steps help to ensure high code quality and reduce the likelihood that the changes inadvertently break something. Having instructions for running tests is especially helpful if it requires external setup, such as starting a Selenium server for testing in a browser. + +## Authors and acknowledgment +Show your appreciation to those who have contributed to the project. + +## License +For open source projects, say how it is licensed. + +## Project status +If you have run out of energy or time for your project, put a note at the top of the README saying that development has slowed down or stopped completely. Someone may choose to fork your project or volunteer to step in as a maintainer or owner, allowing your project to keep going. You can also make an explicit request for maintainers. diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_s4.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_s4.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_v4h.c new file mode 100644 index 00000000..135bc872 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_v4h.c @@ -0,0 +1,4118 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Configuration table + ******************************************************************************/ +/****************************************************************************** + * @file cnf_tbl.c + * - Version : 0.13 + * @brief Configuration table for V4H. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 23.05.2022 0.02 Integration of S4 and V4H + * Renamed from conf_tbl.c to cnf_tbl_v4h.c. + * : 22.11.2022 0.03 Removed QoS configuration table + * : 13.11.2023 0.04 Added setting table for CCI MPU GID register. + * : 11.01.2024 0.05 Updated writing privilege to System RAM. + * Fixed setting value of read/write permissions + * for RT-VRAM1 area2. + * Update Region ID settings. + * The divided areas of SDRAM have been changed. + * : 11.07.2024 0.06 Updated AXI timeout setting value. + * Removed FDT_PAP in g_fdt_tbl. + * : 29.08.2024 0.07 Updated Region ID and RAM protection setting + * for QNX. + * : 05.12.2024 0.08 Update RAM protection settings for ICCOM + * memory area (SDRAM Area5). + * Update Region ID settings for VSPD and VSPX. + * Update Region ID settings for IPMMU. + * : 16.12.2024 0.09 Updated Region ID setting. + * Updated Region ID setting and RAM protection + * setting for booting CR52 3 cores. + * Updated AXI timeout setting value. + * Added IMP Region ID table. + * Added IPMMU Region ID table. + * : 17.03.2025 0.10 Updated AXI timeout setting value. + * : 26.05.2025 0.11 Updated RAM protection settings for + * protection area. + * : 28.07.2025 0.12 Updated Region ID setting and + * AXI timeout setting value. + * : 03.09.2025 0.13 Added Region ID size table and + * updated Region ID setting table. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#define RTDMA_EN (0x00000002U) +#define SYSDMA_EN (0x00003FF4U) + +#pragma ghs section rodata=".qosbw_tbl" +/* not used for V4H */ +const QOS_SETTING_TABLE g_qosbw_tbl[] = {0}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".qoswt_tbl" +/* not used for V4H */ +const QOS_SETTING_TABLE g_qoswt_tbl[] = {0}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_size_tbl" +const REGION_ID_SIZE_TABLE g_rgid_size_tbl[] = { + [0] = {RGID_M_MAX}, /* RGIDM_SIZE */ + [1] = {RGID_R_MAX}, /* RGIDR_SIZE */ + [2] = {RGID_W_MAX}, /* RGIDW_SIZE */ + [3] = {RGID_SEC_MAX}, /* SEC_SIZE */ + [4] = {RGID_AXI_MAX}, /* AXI_SIZE */ + [5] = {RGID_GID_MAX}, /* GID_SIZE */ + [6] = {IPMMU_RGID_MAX}, /* IPMMU_SIZE */ + [7] = {IMP_MASTER_MAX}, /* IMP_M_SIZE */ + [8] = {IMP_SLAVE_MAX}, /* IMP_S_SIZE */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_m_tbl" +const REGION_ID_SETTING_TABLE g_rgid_m_tbl[] = { + [0] = {0xE6581000U, 0x00000002U}, /* RGIDM_MODID[0]:PCI0 */ + [1] = {0xE6581020U, 0x00000002U}, /* RGIDM_MODID[1]:PCI1 */ + [2] = {0xE6581024U, 0x00000002U}, /* RGIDM_MODID[2]:PCI2 */ + [3] = {0xE6581034U, 0x00000002U}, /* RGIDM_MODID[3]:PCI3 */ + [4] = {0xE6581010U, 0x00000002U}, /* RGIDM_MODID[4]:AVB0 */ + [5] = {0xE6581014U, 0x00000001U}, /* RGIDM_MODID[5]:AVB1 */ + [6] = {0xE6581018U, 0x00000001U}, /* RGIDM_MODID[6]:AVB2 */ + [7] = {0xE6581040U, 0x00000002U}, /* RGIDM_MODID[7]:TSN */ + [8] = {0xE6621004U, 0x00000000U}, /* RGIDM_MODID[8]:CR0 */ + [9] = {0xE662100CU, 0x00000000U}, /* RGIDM_MODID[9]:DCLS_ICUMX */ + [10] = {0xE6621010U, 0x00000000U}, /* RGIDM_MODID[10]:ICUMX */ + [11] = {0xE6621014U, 0x00000000U}, /* RGIDM_MODID[11]:SDMAC_ICUMX */ + [12] = {0xFFC41018U, 0x00000001U}, /* RGIDM_MODID[12]:CR52SS0 */ + [13] = {0xFFC4105CU, 0x00000001U}, /* RGIDM_MODID[13]:CR52SS1 */ + [14] = {0xFFC41060U, 0x00000006U}, /* RGIDM_MODID[14]:CR52SS2 */ + [15] = {0xFFC4101CU, 0x00000003U}, /* RGIDM_MODID[15]:CSD */ + [16] = {0xFFC41024U, 0x00000002U}, /* RGIDM_MODID[16]:INTAP0 */ + [17] = {0xFF861018U, 0x00000002U}, /* RGIDM_MODID[17]:FBABUSTOP0 */ + [18] = {0xFF86101CU, 0x00000002U}, /* RGIDM_MODID[18]:FBABUSTOP1 */ + [19] = {0xE7751020U, 0x00000002U}, /* RGIDM_MODID[19]:SDHI0 */ + [20] = {0xE7751010U, 0x00000001U}, /* RGIDM_MODID[20]:FRAY */ + [21] = {0xE7751014U, 0x00000002U}, /* RGIDM_MODID[21]:IPC */ + [22] = {0xFF811000U, 0x00000002U}, /* RGIDM_MODID[22]:AXMM2AXSTM */ + [23] = {0xFF811004U, 0x00000003U}, /* RGIDM_MODID[23]:CSDE0 */ + [24] = {0xFF811008U, 0x00000003U}, /* RGIDM_MODID[24]:CSDE1 */ + [25] = {0xFF881004U, 0x00000002U}, /* RGIDM_MODID[25]:FBABUSIR0 */ + [26] = {0xFF881008U, 0x00000002U}, /* RGIDM_MODID[26]:FBABUSIR1 */ + [27] = {0xFF88100CU, 0x00000002U}, /* RGIDM_MODID[27]:FBABUSIR2 */ + [28] = {0xFF881010U, 0x00000002U}, /* RGIDM_MODID[28]:FBABUSIR3 */ + [29] = {0xFF881014U, 0x00000002U}, /* RGIDM_MODID[29]:FBABUSIR4 */ + [30] = {0xFD811014U, 0x00000002U}, /* RGIDM_MODID[30]:RGX0 */ + [31] = {0xFE681004U, 0x00000002U}, /* RGIDM_MODID[31]:FBABUSVC */ + [32] = {0xFE681008U, 0x00000005U}, /* RGIDM_MODID[32]:FCPCS */ + [33] = {0xFE681010U, 0x00000002U}, /* RGIDM_MODID[33]:IMR00 */ + [34] = {0xFE681014U, 0x00000002U}, /* RGIDM_MODID[34]:IMR01 */ + [35] = {0xFE681024U, 0x00000002U}, /* RGIDM_MODID[35]:IMR10 */ + [36] = {0xFE681028U, 0x00000002U}, /* RGIDM_MODID[36]:IMR11 */ + [37] = {0xFE68100CU, 0x00000002U}, /* RGIDM_MODID[37]:IMR20 */ + [38] = {0xFE681018U, 0x00000002U}, /* RGIDM_MODID[38]:IMR21 */ + [39] = {0xFE681040U, 0x00000002U}, /* RGIDM_MODID[39]:IMS0 */ + [40] = {0xFE681044U, 0x00000002U}, /* RGIDM_MODID[40]:IMS1 */ + [41] = {0xFE681048U, 0x00000005U}, /* RGIDM_MODID[41]:IV1ES */ + [42] = {0xFEBE1000U, 0x00000002U}, /* RGIDM_MODID[42]:DSITLINK0 */ + [43] = {0xFEBE1004U, 0x00000002U}, /* RGIDM_MODID[43]:DSTLINK1 */ + [44] = {0xFEBE1008U, 0x00000002U}, /* RGIDM_MODID[44]:FBABUSVIO */ + [45] = {0xFEBE1014U, 0x00000002U}, /* RGIDM_MODID[45]:FCPVD0 */ + [46] = {0xFEBE1018U, 0x00000002U}, /* RGIDM_MODID[46]:FCPVD1 */ + [47] = {0xFEBE101CU, 0x00000002U}, /* RGIDM_MODID[47]:FCPVX0 */ + [48] = {0xFEBE1020U, 0x00000002U}, /* RGIDM_MODID[48]:FCPVX1 */ + [49] = {0xFEBF1020U, 0x00000002U}, /* RGIDM_MODID[49]:ISP00 */ + [50] = {0xFEBF1024U, 0x00000002U}, /* RGIDM_MODID[50]:ISP01 */ + [51] = {0xFEBF1000U, 0x00000002U}, /* RGIDM_MODID[51]:ISP02 */ + [52] = {0xFEBF1004U, 0x00000002U}, /* RGIDM_MODID[52]:ISP03 */ + [53] = {0xFEBF1008U, 0x00000002U}, /* RGIDM_MODID[53]:ISP04 */ + [54] = {0xFEBF1028U, 0x00000002U}, /* RGIDM_MODID[54]:ISP10 */ + [55] = {0xFEBF102CU, 0x00000002U}, /* RGIDM_MODID[55]:ISP11 */ + [56] = {0xFEBF1044U, 0x00000002U}, /* RGIDM_MODID[56]:ISP12 */ + [57] = {0xFEBF104CU, 0x00000002U}, /* RGIDM_MODID[57]:ISP13 */ + [58] = {0xFEBF1050U, 0x00000002U}, /* RGIDM_MODID[58]:ISP14 */ + [59] = {0xFEBF1010U, 0x00000002U}, /* RGIDM_MODID[59]:VIN0 */ + [60] = {0xFEBF1014U, 0x00000002U}, /* RGIDM_MODID[60]:VIN1 */ + [61] = {0xE7B11004U, 0x00000002U}, /* RGIDM_MODID[61]:FBABUSVIP0 */ + [62] = {0xE7B11010U, 0x00000002U}, /* RGIDM_MODID[62]:SMPO */ + [63] = {0xE7B11018U, 0x00000002U}, /* RGIDM_MODID[63]:SMPS */ + [64] = {0xE7B1101CU, 0x00000002U}, /* RGIDM_MODID[64]:UMFL */ + [65] = {0xE7B41018U, 0x00000002U}, /* RGIDM_MODID[65]:PAP */ + [66] = {0xE7B41028U, 0x00000002U}, /* RGIDM_MODID[66]:FBABUSVIP1 */ + [67] = {0xEB801000U, 0x00000002U}, /* RGIDM_MODID[67]:DSP00 */ + [68] = {0xEB801004U, 0x00000002U}, /* RGIDM_MODID[68]:DSP01 */ + [69] = {0xEB801008U, 0x00000002U}, /* RGIDM_MODID[69]:DSP10 */ + [70] = {0xEB80100CU, 0x00000002U}, /* RGIDM_MODID[70]:DSP11 */ + [71] = {0xEB801010U, 0x00000002U}, /* RGIDM_MODID[71]:DSP20 */ + [72] = {0xEB801014U, 0x00000002U}, /* RGIDM_MODID[72]:DSP21 */ + [73] = {0xEB801018U, 0x00000002U}, /* RGIDM_MODID[73]:DSP30 */ + [74] = {0xEB80101CU, 0x00000002U}, /* RGIDM_MODID[74]:DSP31 */ + [75] = {0xE67BF500U, 0x0000000EU}, /* RGIDM_MODID[75]:VRAM_R */ + [76] = {0xE67BF504U, 0x0000000EU}, /* RGIDM_MODID[76]:VRAM_W */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_r_tbl" +const REGION_ID_SETTING_TABLE g_rgid_r_tbl[] = { + [0] = {0xFFC82000U, 0x0000000FU}, /* RGIDR_MODID[0]:ARMGC0*/ + [1] = {0xFFC82004U, 0x0000000FU}, /* RGIDR_MODID[1]:ARMGC1*/ + [2] = {0xFFC82008U, 0x00000000U}, /* RGIDR_MODID[2]:ARMGC2*/ + [3] = {0xFFC8200CU, 0x0000000FU}, /* RGIDR_MODID[3]:ARRT00*/ + /* After setting */ /* RGIDR_MODID[4]:ARRT01*/ + /* After setting */ /* RGIDR_MODID[5]:ARRT02*/ + [4] = {0xFFC82018U, 0x0000000FU}, /* RGIDR_MODID[6]:ARRT03*/ + [5] = {0xFFC8201CU, 0x0000000FU}, /* RGIDR_MODID[7]:ARRT04*/ + [6] = {0xFFC82020U, 0x0000000FU}, /* RGIDR_MODID[8]:ARRT05*/ + [7] = {0xFFC82024U, 0x0000000FU}, /* RGIDR_MODID[9]:ARRT06*/ + [8] = {0xFFC82028U, 0x0000000FU}, /* RGIDR_MODID[10]:ARRT07*/ + [9] = {0xFFC8202CU, 0x00000000U}, /* RGIDR_MODID[11]:ARRT08*/ + [10] = {0xFFC82030U, 0x00000001U}, /* RGIDR_MODID[12]:LIFEC0*/ + [11] = {0xFFC82034U, 0x0000000EU}, /* RGIDR_MODID[13]:SWDT*/ + [12] = {0xFFC82038U, 0x0000006EU}, /* RGIDR_MODID[14]:TMU0*/ + [13] = {0xFFC8203CU, 0x0000000EU}, /* RGIDR_MODID[15]:WDT*/ + [14] = {0xFFC82040U, 0x0000000EU}, /* RGIDR_MODID[16]:WWDT0*/ + [15] = {0xFFC82044U, 0x0000000EU}, /* RGIDR_MODID[17]:WWDT1*/ + [16] = {0xFFC82048U, 0x0000000EU}, /* RGIDR_MODID[18]:WWDT2*/ + [17] = {0xFFC8204CU, 0x0000000EU}, /* RGIDR_MODID[19]:WWDT3*/ + [18] = {0xFFC82050U, 0x0000000EU}, /* RGIDR_MODID[20]:WWDT4*/ + [19] = {0xFFC82054U, 0x0000000EU}, /* RGIDR_MODID[21]:WWDT5*/ + [20] = {0xFFC82058U, 0x0000000EU}, /* RGIDR_MODID[22]:WWDT6*/ + [21] = {0xFFC82068U, 0x0000000FU}, /* RGIDR_MODID[23]:ECMRT3*/ + [22] = {0xE6002000U, 0x0000000EU}, /* RGIDR_MODID[24]:ADVFSC*/ + [23] = {0xE6002004U, 0x0000000FU}, /* RGIDR_MODID[25]:APMU0*/ + [24] = {0xE6002008U, 0x00000002U}, /* RGIDR_MODID[26]:APMU1*/ + [25] = {0xE600200CU, 0x00000000U}, /* RGIDR_MODID[27]:APMU10*/ + [26] = {0xE6002010U, 0x00000000U}, /* RGIDR_MODID[28]:APMU11*/ + [27] = {0xE6002014U, 0x00000000U}, /* RGIDR_MODID[29]:APMU12*/ + [28] = {0xE6002018U, 0x00000000U}, /* RGIDR_MODID[30]:APMU13*/ + [29] = {0xE600201CU, 0x00000000U}, /* RGIDR_MODID[31]:APMU14*/ + [30] = {0xE6002020U, 0x00000000U}, /* RGIDR_MODID[32]:APMU15*/ + [31] = {0xE6002024U, 0x00000004U}, /* RGIDR_MODID[33]:APMU2*/ + [32] = {0xE6002028U, 0x00000004U}, /* RGIDR_MODID[34]:APMU3*/ + [33] = {0xE600202CU, 0x00000000U}, /* RGIDR_MODID[35]:APMU4*/ + [34] = {0xE6002030U, 0x00000000U}, /* RGIDR_MODID[36]:APMU5*/ + [35] = {0xE6002034U, 0x00000000U}, /* RGIDR_MODID[37]:APMU6*/ + [36] = {0xE6002038U, 0x00000000U}, /* RGIDR_MODID[38]:APMU7*/ + [37] = {0xE600203CU, 0x00000000U}, /* RGIDR_MODID[39]:APMU8*/ + [38] = {0xE6002040U, 0x00000000U}, /* RGIDR_MODID[40]:APMU9*/ + [39] = {0xE6002044U, 0x0000000FU}, /* RGIDR_MODID[41]:ARS00*/ + /* After setting */ /* RGIDR_MODID[42]:ARS01*/ + /* After setting */ /* RGIDR_MODID[43]:ARS02*/ + [40] = {0xE6002050U, 0x0000000FU}, /* RGIDR_MODID[44]:ARS03*/ + [41] = {0xE6002054U, 0x0000000FU}, /* RGIDR_MODID[45]:ARS04*/ + [42] = {0xE6002058U, 0x0000000FU}, /* RGIDR_MODID[46]:ARS05*/ + [43] = {0xE600205CU, 0x0000000FU}, /* RGIDR_MODID[47]:ARS06*/ + [44] = {0xE6002060U, 0x0000000FU}, /* RGIDR_MODID[48]:ARS07*/ + [45] = {0xE6002064U, 0x00000000U}, /* RGIDR_MODID[49]:ARS08*/ + [46] = {0xE6002068U, 0x0000000EU}, /* RGIDR_MODID[50]:CMT0*/ + [47] = {0xE600206CU, 0x0000000EU}, /* RGIDR_MODID[51]:CMT1*/ + [48] = {0xE6002070U, 0x0000000EU}, /* RGIDR_MODID[52]:CMT2*/ + [49] = {0xE6002074U, 0x0000000EU}, /* RGIDR_MODID[53]:CMT3*/ + [50] = {0xE6002078U, 0x0000000AU}, /* RGIDR_MODID[54]:CKM*/ + [51] = {0xE600207CU, 0x0000000EU}, /* RGIDR_MODID[55]:DBE*/ + [52] = {0xE6002080U, 0x0000000EU}, /* RGIDR_MODID[56]:IRQC*/ + [53] = {0xE6002084U, 0x0000000FU}, /* RGIDR_MODID[57]:ECMPS0*/ + [54] = {0xE6002088U, 0x0000000BU}, /* RGIDR_MODID[58]:OTP0*/ + [55] = {0xE600208CU, 0x0000000FU}, /* RGIDR_MODID[59]:OTP1*/ + [56] = {0xE600209CU, 0x0000000EU}, /* RGIDR_MODID[60]:SCMT*/ + [57] = {0xE60020A8U, 0x0000004EU}, /* RGIDR_MODID[61]:TSC1*/ + [58] = {0xE60020ACU, 0x0000004EU}, /* RGIDR_MODID[62]:TSC2*/ + [59] = {0xE60020B0U, 0x0000004EU}, /* RGIDR_MODID[63]:TSC3*/ + [60] = {0xE60020B4U, 0x0000004EU}, /* RGIDR_MODID[64]:TSC4*/ + [61] = {0xE60020B8U, 0x00000006U}, /* RGIDR_MODID[65]:UCMT*/ + [62] = {0xE6002100U, 0x0000006FU}, /* RGIDR_MODID[66]:CPG0*/ + [63] = {0xE6002104U, 0x0000000AU}, /* RGIDR_MODID[67]:CPG1*/ + [64] = {0xE6002108U, 0x0000004EU}, /* RGIDR_MODID[68]:CPG2*/ + [65] = {0xE600210CU, 0x00000028U}, /* RGIDR_MODID[69]:CPG3*/ + [66] = {0xE6002110U, 0x0000006FU}, /* RGIDR_MODID[70]:PFC00*/ + [67] = {0xE6002114U, 0x0000000AU}, /* RGIDR_MODID[71]:PFC01*/ + [68] = {0xE6002118U, 0x0000004EU}, /* RGIDR_MODID[72]:PFC02*/ + [69] = {0xE600211CU, 0x00000028U}, /* RGIDR_MODID[73]:PFC03*/ + [70] = {0xE6002120U, 0x0000006FU}, /* RGIDR_MODID[74]:PFC10*/ + [71] = {0xE6002124U, 0x0000000AU}, /* RGIDR_MODID[75]:PFC11*/ + [72] = {0xE6002128U, 0x0000004EU}, /* RGIDR_MODID[76]:PFC12*/ + [73] = {0xE600212CU, 0x00000028U}, /* RGIDR_MODID[77]:PFC13*/ + [74] = {0xE6002130U, 0x0000006FU}, /* RGIDR_MODID[78]:PFC20*/ + [75] = {0xE6002134U, 0x0000000AU}, /* RGIDR_MODID[79]:PFC21*/ + [76] = {0xE6002138U, 0x0000004EU}, /* RGIDR_MODID[80]:PFC22*/ + [77] = {0xE600213CU, 0x00000028U}, /* RGIDR_MODID[81]:PFC23*/ + [78] = {0xE6002140U, 0x0000006FU}, /* RGIDR_MODID[82]:PFC30*/ + [79] = {0xE6002144U, 0x0000000AU}, /* RGIDR_MODID[83]:PFC31*/ + [80] = {0xE6002148U, 0x0000004EU}, /* RGIDR_MODID[84]:PFC32*/ + [81] = {0xE600214CU, 0x00000028U}, /* RGIDR_MODID[85]:PFC33*/ + [82] = {0xE6002150U, 0x0000006FU}, /* RGIDR_MODID[86]:PFCS0*/ + [83] = {0xE6002154U, 0x0000000AU}, /* RGIDR_MODID[87]:PFCS1*/ + [84] = {0xE6002158U, 0x0000004EU}, /* RGIDR_MODID[88]:PFCS2*/ + [85] = {0xE600215CU, 0x00000028U}, /* RGIDR_MODID[89]:PFCS3*/ + [86] = {0xE6002160U, 0x0000006FU}, /* RGIDR_MODID[90]:RESET0*/ + [87] = {0xE6002164U, 0x0000000AU}, /* RGIDR_MODID[91]:RESET1*/ + [88] = {0xE6002168U, 0x0000004EU}, /* RGIDR_MODID[92]:RESET2*/ + [89] = {0xE600216CU, 0x00000028U}, /* RGIDR_MODID[93]:RESET3*/ + [90] = {0xE6002170U, 0x0000006FU}, /* RGIDR_MODID[94]:SYS0*/ + [91] = {0xE6002174U, 0x0000000AU}, /* RGIDR_MODID[95]:SYS1*/ + [92] = {0xE6002178U, 0x0000004EU}, /* RGIDR_MODID[96]:SYS2*/ + [93] = {0xE600217CU, 0x00000028U}, /* RGIDR_MODID[97]:SYS3*/ + [94] = {0xE7762000U, 0x0000000EU}, /* RGIDR_MODID[98]:DMAMSI0*/ + [95] = {0xE7762004U, 0x0000000EU}, /* RGIDR_MODID[99]:DMAMSI1*/ + [96] = {0xE7762008U, 0x0000000EU}, /* RGIDR_MODID[100]:DMAMSI2*/ + [97] = {0xE776200CU, 0x0000000EU}, /* RGIDR_MODID[101]:DMAMSI3*/ + [98] = {0xE7762010U, 0x0000000EU}, /* RGIDR_MODID[102]:DMAMSI4*/ + [99] = {0xE7762014U, 0x0000000EU}, /* RGIDR_MODID[103]:DMAMSI5*/ + [100] = {0xE7762018U, 0x0000000FU}, /* RGIDR_MODID[104]:ECMSP3*/ + [101] = {0xE7762024U, 0x0000000FU}, /* RGIDR_MODID[105]:ARSP30*/ + /* After setting */ /* RGIDR_MODID[106]:ARSP31*/ + /* After setting */ /* RGIDR_MODID[107]:ARSP32*/ + [102] = {0xE7762030U, 0x0000000FU}, /* RGIDR_MODID[108]:ARSP33*/ + [103] = {0xE7762034U, 0x0000000FU}, /* RGIDR_MODID[109]:ARSP34*/ + [104] = {0xE7762038U, 0x0000000FU}, /* RGIDR_MODID[110]:ARSP35*/ + [105] = {0xE776203CU, 0x0000000FU}, /* RGIDR_MODID[111]:ARSP36*/ + [106] = {0xE7762040U, 0x0000000FU}, /* RGIDR_MODID[112]:ARSP37*/ + [107] = {0xE7762044U, 0x00000000U}, /* RGIDR_MODID[113]:ARSP38*/ + [108] = {0xE7762048U, 0x0000000EU}, /* RGIDR_MODID[114]:MSI0*/ + [109] = {0xE776204CU, 0x0000000EU}, /* RGIDR_MODID[115]:MSI1*/ + [110] = {0xE7762050U, 0x0000000EU}, /* RGIDR_MODID[116]:MSI2*/ + [111] = {0xE7762054U, 0x0000000EU}, /* RGIDR_MODID[117]:MSI3*/ + [112] = {0xE7762058U, 0x0000000EU}, /* RGIDR_MODID[118]:MSI4*/ + [113] = {0xE776205CU, 0x0000000EU}, /* RGIDR_MODID[119]:MSI5*/ + [114] = {0xE7792000U, 0x0000000FU}, /* RGIDR_MODID[120]:ARSP40*/ + /* After setting */ /* RGIDR_MODID[121]:ARSP41*/ + /* After setting */ /* RGIDR_MODID[122]:ARSP42*/ + [115] = {0xE779200CU, 0x0000000FU}, /* RGIDR_MODID[123]:ARSP43*/ + [116] = {0xE7792010U, 0x0000000FU}, /* RGIDR_MODID[124]:ARSP44*/ + [117] = {0xE7792014U, 0x0000000FU}, /* RGIDR_MODID[125]:ARSP45*/ + [118] = {0xE7792018U, 0x0000000FU}, /* RGIDR_MODID[126]:ARSP46*/ + [119] = {0xE779201CU, 0x0000000FU}, /* RGIDR_MODID[127]:ARSP47*/ + [120] = {0xE7792020U, 0x00000000U}, /* RGIDR_MODID[128]:ARSP48*/ + [121] = {0xE7792024U, 0x0000004FU}, /* RGIDR_MODID[129]:DMAHSCIF0*/ + [122] = {0xE7792028U, 0x0000004FU}, /* RGIDR_MODID[130]:DMAHSCIF1*/ + [123] = {0xE779202CU, 0x0000004FU}, /* RGIDR_MODID[131]:DMAHSCIF2*/ + [124] = {0xE7792030U, 0x0000004FU}, /* RGIDR_MODID[132]:DMAHSCIF3*/ + [125] = {0xE7792034U, 0x0000004FU}, /* RGIDR_MODID[133]:DMASCIF0*/ + [126] = {0xE7792038U, 0x0000004FU}, /* RGIDR_MODID[134]:DMASCIF1*/ + [127] = {0xE779203CU, 0x0000004FU}, /* RGIDR_MODID[135]:DMASCIF3*/ + [128] = {0xE7792040U, 0x0000004FU}, /* RGIDR_MODID[136]:DMASCIF4*/ + [129] = {0xE7792044U, 0x0000000FU}, /* RGIDR_MODID[137]:ECMSP4*/ + [130] = {0xE7792048U, 0x0000004FU}, /* RGIDR_MODID[138]:HSCIF0*/ + [131] = {0xE779204CU, 0x0000004FU}, /* RGIDR_MODID[139]:HSCIF1*/ + [132] = {0xE7792050U, 0x0000004FU}, /* RGIDR_MODID[140]:HSCIF2*/ + [133] = {0xE7792054U, 0x0000004FU}, /* RGIDR_MODID[141]:HSCIF3*/ + [134] = {0xE7792058U, 0x0000004FU}, /* RGIDR_MODID[142]:SCIF0*/ + [135] = {0xE779205CU, 0x0000004FU}, /* RGIDR_MODID[143]:SCIF1*/ + [136] = {0xE7792060U, 0x0000004FU}, /* RGIDR_MODID[144]:SCIF3*/ + [137] = {0xE7792064U, 0x0000004FU}, /* RGIDR_MODID[145]:SCIF4*/ + [138] = {0xE7792068U, 0x0000006EU}, /* RGIDR_MODID[146]:TMU1*/ + [139] = {0xE779206CU, 0x0000006EU}, /* RGIDR_MODID[147]:TMU2*/ + [140] = {0xE7792070U, 0x0000006EU}, /* RGIDR_MODID[148]:TMU3*/ + [141] = {0xE7792074U, 0x0000006EU}, /* RGIDR_MODID[149]:TMU4*/ + [142] = {0xE7792078U, 0x0000004AU}, /* RGIDR_MODID[150]:CANFD*/ + [143] = {0xE779207CU, 0x0000004AU}, /* RGIDR_MODID[151]:DMACANFD*/ + [144] = {0xE7792080U, 0x00000002U}, /* RGIDR_MODID[152]:DMATPU0*/ + [145] = {0xE7792084U, 0x00000002U}, /* RGIDR_MODID[153]:PWM0*/ + [146] = {0xE7792088U, 0x00000002U}, /* RGIDR_MODID[154]:PWM1*/ + [147] = {0xE779208CU, 0x00000002U}, /* RGIDR_MODID[155]:PWM2*/ + [148] = {0xE7792090U, 0x00000002U}, /* RGIDR_MODID[156]:PWM3*/ + [149] = {0xE7792094U, 0x00000002U}, /* RGIDR_MODID[157]:PWM4*/ + [150] = {0xE7792098U, 0x00000002U}, /* RGIDR_MODID[158]:PWM5*/ + [151] = {0xE779209CU, 0x00000002U}, /* RGIDR_MODID[159]:PWM6*/ + [152] = {0xE77920A0U, 0x00000002U}, /* RGIDR_MODID[160]:PWM7*/ + [153] = {0xE77920A4U, 0x00000002U}, /* RGIDR_MODID[161]:PWM8*/ + [154] = {0xE77920A8U, 0x00000002U}, /* RGIDR_MODID[162]:PWM9*/ + [155] = {0xE77920ACU, 0x00000002U}, /* RGIDR_MODID[163]:TPU0*/ + [156] = {0xFE672000U, 0x0000002FU}, /* RGIDR_MODID[164]:ARVC10*/ + /* After setting */ /* RGIDR_MODID[165]:ARVC11*/ + /* After setting */ /* RGIDR_MODID[166]:ARVC12*/ + [157] = {0xFE67200CU, 0x0000002FU}, /* RGIDR_MODID[167]:ARVC13*/ + [158] = {0xFE672010U, 0x0000002FU}, /* RGIDR_MODID[168]:ARVC14*/ + [159] = {0xFE672014U, 0x0000002FU}, /* RGIDR_MODID[169]:ARVC15*/ + [160] = {0xFE672018U, 0x0000002FU}, /* RGIDR_MODID[170]:ARVC16*/ + [161] = {0xFE67201CU, 0x0000002FU}, /* RGIDR_MODID[171]:ARVC17*/ + [162] = {0xFE672020U, 0x00000000U}, /* RGIDR_MODID[172]:ARVC18*/ + [163] = {0xFE672024U, 0x0000000FU}, /* RGIDR_MODID[173]:ECMVC1*/ + [164] = {0xFE672028U, 0x00000028U}, /* RGIDR_MODID[174]:FCPCS*/ + [165] = {0xFE67202CU, 0x00000028U}, /* RGIDR_MODID[175]:VCP4LC*/ + [166] = {0xFE672030U, 0x00000028U}, /* RGIDR_MODID[176]:VCP4LV*/ + [167] = {0xFEBD2000U, 0x0000000FU}, /* RGIDR_MODID[177]:ARVI40*/ + /* After setting */ /* RGIDR_MODID[178]:ARVI41*/ + /* After setting */ /* RGIDR_MODID[179]:ARVI42*/ + [168] = {0xFEBD200CU, 0x0000000FU}, /* RGIDR_MODID[180]:ARVI43*/ + [169] = {0xFEBD2010U, 0x0000000FU}, /* RGIDR_MODID[181]:ARVI44*/ + [170] = {0xFEBD2014U, 0x0000000FU}, /* RGIDR_MODID[182]:ARVI45*/ + [171] = {0xFEBD2018U, 0x0000000FU}, /* RGIDR_MODID[183]:ARVI46*/ + [172] = {0xFEBD201CU, 0x0000000FU}, /* RGIDR_MODID[184]:ARVI47*/ + [173] = {0xFEBD2020U, 0x00000000U}, /* RGIDR_MODID[185]:ARVI48*/ + [174] = {0xFEBD2024U, 0x0000000FU}, /* RGIDR_MODID[186]:DIS0*/ + [175] = {0xFEBD202CU, 0x0000000FU}, /* RGIDR_MODID[187]:DSC*/ + [176] = {0xFEBD2030U, 0x0000000FU}, /* RGIDR_MODID[188]:ECMVIO2*/ + [177] = {0xFEBD2034U, 0x0000000FU}, /* RGIDR_MODID[189]:FCPVD0*/ + [178] = {0xFEBD2038U, 0x0000000FU}, /* RGIDR_MODID[190]:FCPVD1*/ + [179] = {0xFEBD203CU, 0x0000004EU}, /* RGIDR_MODID[191]:VSPD0*/ + [180] = {0xFEBD2040U, 0x0000004EU}, /* RGIDR_MODID[192]:VSPD1*/ + [181] = {0xE6582000U, 0x0000000AU}, /* RGIDR_MODID[193]:CKMHSC*/ + [182] = {0xE6582004U, 0x0000000CU}, /* RGIDR_MODID[194]:AXIPCI001*/ + [183] = {0xE6582008U, 0x0000000CU}, /* RGIDR_MODID[195]:AXIPCI002*/ + [184] = {0xE658200CU, 0x0000000CU}, /* RGIDR_MODID[196]:AXIPCI003*/ + [185] = {0xE6582014U, 0x0000000CU}, /* RGIDR_MODID[197]:AXIPCI005*/ + [186] = {0xE6582018U, 0x0000000CU}, /* RGIDR_MODID[198]:AXIPCI006*/ + [187] = {0xE658201CU, 0x0000000CU}, /* RGIDR_MODID[199]:AXIPCI007*/ + [188] = {0xE6582020U, 0x0000000CU}, /* RGIDR_MODID[200]:AXIPCI008*/ + [189] = {0xE6582024U, 0x0000000CU}, /* RGIDR_MODID[201]:AXIPCI009*/ + [190] = {0xE6582028U, 0x0000000CU}, /* RGIDR_MODID[202]:AXIPCI010*/ + [191] = {0xE658202CU, 0x0000000CU}, /* RGIDR_MODID[203]:AXIPCI011*/ + [192] = {0xE6582030U, 0x0000000CU}, /* RGIDR_MODID[204]:AXIPCI012*/ + [193] = {0xE6582034U, 0x0000000CU}, /* RGIDR_MODID[205]:AXIPCI013*/ + [194] = {0xE6582038U, 0x0000000CU}, /* RGIDR_MODID[206]:AXIPCI014*/ + [195] = {0xE658203CU, 0x0000000CU}, /* RGIDR_MODID[207]:AXIPCI015*/ + [196] = {0xE6582040U, 0x0000000CU}, /* RGIDR_MODID[208]:AXIPCI100*/ + [197] = {0xE6582044U, 0x0000000CU}, /* RGIDR_MODID[209]:AXIPCI101*/ + [198] = {0xE6582048U, 0x0000000CU}, /* RGIDR_MODID[210]:AXIPCI102*/ + [199] = {0xE658204CU, 0x0000000CU}, /* RGIDR_MODID[211]:AXIPCI103*/ + [200] = {0xE6582050U, 0x0000000CU}, /* RGIDR_MODID[212]:AXIPCI104*/ + [201] = {0xE6582054U, 0x0000000CU}, /* RGIDR_MODID[213]:AXIPCI105*/ + [202] = {0xE6582058U, 0x0000000CU}, /* RGIDR_MODID[214]:AXIPCI106*/ + [203] = {0xE658205CU, 0x0000000CU}, /* RGIDR_MODID[215]:AXIPCI107*/ + [204] = {0xE6582060U, 0x0000000CU}, /* RGIDR_MODID[216]:AXIPCI108*/ + [205] = {0xE6582064U, 0x0000000CU}, /* RGIDR_MODID[217]:AXIPCI109*/ + [206] = {0xE6582068U, 0x0000000CU}, /* RGIDR_MODID[218]:AXIPCI110*/ + [207] = {0xE658206CU, 0x0000000CU}, /* RGIDR_MODID[219]:AXIPCI111*/ + [208] = {0xE6582070U, 0x0000000CU}, /* RGIDR_MODID[220]:AXIPCI112*/ + [209] = {0xE6582074U, 0x0000000CU}, /* RGIDR_MODID[221]:AXIPCI113*/ + [210] = {0xE6582078U, 0x0000000CU}, /* RGIDR_MODID[222]:AXIPCI114*/ + [211] = {0xE658207CU, 0x0000000CU}, /* RGIDR_MODID[223]:AXIPCI115*/ + [212] = {0xE6582084U, 0x0000000EU}, /* RGIDR_MODID[224]:GPTP*/ + [213] = {0xE6582088U, 0x0000004EU}, /* RGIDR_MODID[225]:IPMMUHC00*/ + [214] = {0xE65820F0U, 0x0000000EU}, /* RGIDR_MODID[226]:TSN0*/ + [215] = {0xE65820F4U, 0x0000000CU}, /* RGIDR_MODID[227]:AXIPCI000*/ + [216] = {0xE65820F8U, 0x0000000CU}, /* RGIDR_MODID[228]:AXIPCI004*/ + [217] = {0xE65820FCU, 0x0000004EU}, /* RGIDR_MODID[229]:IPMMUHC01*/ + [218] = {0xE6582100U, 0x0000004EU}, /* RGIDR_MODID[230]:AVB0*/ + [219] = {0xE6582104U, 0x0000004EU}, /* RGIDR_MODID[231]:AVB1*/ + [220] = {0xE6582108U, 0x0000004EU}, /* RGIDR_MODID[232]:AVB2*/ + [221] = {0xE658210CU, 0x0000004EU}, /* RGIDR_MODID[233]:IPMMUHC10*/ + [222] = {0xE6582110U, 0x0000004EU}, /* RGIDR_MODID[234]:IPMMUHC11*/ + [223] = {0xE6582114U, 0x0000004EU}, /* RGIDR_MODID[235]:IPMMUHC12*/ + [224] = {0xE6582118U, 0x0000004EU}, /* RGIDR_MODID[236]:IPMMUHC13*/ + [225] = {0xE658211CU, 0x0000000CU}, /* RGIDR_MODID[237]:PPHY0*/ + [226] = {0xE6582120U, 0x0000000CU}, /* RGIDR_MODID[238]:PPHY1*/ + [227] = {0xE6582124U, 0x0000004EU}, /* RGIDR_MODID[239]:IPMMUHC14*/ + [228] = {0xE6582128U, 0x0000004EU}, /* RGIDR_MODID[240]:IPMMUHC15*/ + [229] = {0xE658212CU, 0x0000000EU}, /* RGIDR_MODID[241]:FBAHSC*/ + [230] = {0xE6582130U, 0x0000004EU}, /* RGIDR_MODID[242]:IPMMUHC02*/ + [231] = {0xE6582138U, 0x0000000FU}, /* RGIDR_MODID[243]:ECMHSC*/ + [232] = {0xE658213CU, 0x0000000FU}, /* RGIDR_MODID[244]:ARHC0*/ + /* After setting */ /* RGIDR_MODID[245]:ARHC1*/ + /* After setting */ /* RGIDR_MODID[246]:ARHC2*/ + [233] = {0xE6582148U, 0x0000000FU}, /* RGIDR_MODID[247]:ARHC3*/ + [234] = {0xE658214CU, 0x0000000FU}, /* RGIDR_MODID[248]:ARHC4*/ + [235] = {0xE6582150U, 0x0000000FU}, /* RGIDR_MODID[249]:ARHC5*/ + [236] = {0xE6582154U, 0x0000000FU}, /* RGIDR_MODID[250]:ARHC6*/ + [237] = {0xE6582158U, 0x0000000FU}, /* RGIDR_MODID[251]:ARHC7*/ + [238] = {0xE658215CU, 0x00000000U}, /* RGIDR_MODID[252]:ARHC8*/ + [239] = {0xE6582160U, 0x0000004EU}, /* RGIDR_MODID[253]:IPMMUHC03*/ + [240] = {0xE6582164U, 0x0000004EU}, /* RGIDR_MODID[254]:IPMMUHC04*/ + [241] = {0xE6582168U, 0x0000004EU}, /* RGIDR_MODID[255]:IPMMUHC05*/ + [242] = {0xE658216CU, 0x0000004EU}, /* RGIDR_MODID[256]:IPMMUHC06*/ + [243] = {0xE6582170U, 0x0000004EU}, /* RGIDR_MODID[257]:IPMMUHC07*/ + [244] = {0xE6582174U, 0x0000004EU}, /* RGIDR_MODID[258]:IPMMUHC08*/ + [245] = {0xE6582178U, 0x0000004EU}, /* RGIDR_MODID[259]:IPMMUHC09*/ + [246] = {0xFF882000U, 0x0000000FU}, /* RGIDR_MODID[260]:ARIMP00*/ + /* After setting */ /* RGIDR_MODID[261]:ARIMP01*/ + /* After setting */ /* RGIDR_MODID[262]:ARIMP02*/ + [247] = {0xFF88200CU, 0x0000000FU}, /* RGIDR_MODID[263]:ARIMP03*/ + [248] = {0xFF882010U, 0x0000000FU}, /* RGIDR_MODID[264]:ARIMP04*/ + [249] = {0xFF882014U, 0x0000004EU}, /* RGIDR_MODID[265]:AXIFBABUSIR0*/ + [250] = {0xFF882018U, 0x0000004EU}, /* RGIDR_MODID[266]:AXIFBABUSIR1*/ + [251] = {0xFF88201CU, 0x0000004EU}, /* RGIDR_MODID[267]:AXIFBABUSIR2*/ + [252] = {0xFF882020U, 0x0000004EU}, /* RGIDR_MODID[268]:AXIFBABUSIR3*/ + [253] = {0xFF882024U, 0x0000004EU}, /* RGIDR_MODID[269]:AXIFBABUSIR4*/ + [254] = {0xFF882028U, 0x0000004EU}, /* RGIDR_MODID[270]:AXIIMP0*/ + [255] = {0xFF88202CU, 0x0000004EU}, /* RGIDR_MODID[271]:CKMCNR*/ + [256] = {0xFF882030U, 0x0000004EU}, /* RGIDR_MODID[272]:CKMDSP*/ + [257] = {0xFF882034U, 0x0000000FU}, /* RGIDR_MODID[273]:ARIMP05*/ + [258] = {0xFF882038U, 0x0000000FU}, /* RGIDR_MODID[274]:ARIMP06*/ + [259] = {0xFF88203CU, 0x0000000FU}, /* RGIDR_MODID[275]:ARIMP07*/ + [260] = {0xFF882040U, 0x00000000U}, /* RGIDR_MODID[276]:ARIMP08*/ + [261] = {0xFF882044U, 0x0000004EU}, /* RGIDR_MODID[277]:CKMIR*/ + [262] = {0xFF882048U, 0x0000000FU}, /* RGIDR_MODID[278]:ECMIR*/ + [263] = {0xFF88204CU, 0x0000000FU}, /* RGIDR_MODID[279]:DSPPS*/ + [264] = {0xFF882050U, 0x0000004EU}, /* RGIDR_MODID[280]:IPMMUIR1*/ + [265] = {0xFF882054U, 0x0000004EU}, /* RGIDR_MODID[281]:IPMMUIR0*/ + [266] = {0xFF882058U, 0x0000004EU}, /* RGIDR_MODID[282]:IPMMUIR10*/ + [267] = {0xFF88205CU, 0x0000004EU}, /* RGIDR_MODID[283]:IPMMUIR11*/ + [268] = {0xFF882060U, 0x0000004EU}, /* RGIDR_MODID[284]:IPMMUIR12*/ + [269] = {0xFF882064U, 0x0000004EU}, /* RGIDR_MODID[285]:IPMMUIR13*/ + [270] = {0xFF882068U, 0x0000004EU}, /* RGIDR_MODID[286]:IPMMUIR14*/ + [271] = {0xFF88206CU, 0x0000004EU}, /* RGIDR_MODID[287]:IPMMUIR15*/ + [272] = {0xFF882070U, 0x0000004EU}, /* RGIDR_MODID[288]:IPMMUIR2*/ + [273] = {0xFF882074U, 0x0000004EU}, /* RGIDR_MODID[289]:IPMMUIR3*/ + [274] = {0xFF882078U, 0x0000004EU}, /* RGIDR_MODID[290]:IPMMUIR4*/ + [275] = {0xFF88207CU, 0x0000004EU}, /* RGIDR_MODID[291]:IPMMUIR5*/ + [276] = {0xFF882080U, 0x0000004EU}, /* RGIDR_MODID[292]:IPMMUIR6*/ + [277] = {0xFF882084U, 0x0000004EU}, /* RGIDR_MODID[293]:IPMMUIR7*/ + [278] = {0xFF882088U, 0x0000004EU}, /* RGIDR_MODID[294]:IPMMUIR8*/ + [279] = {0xFF88208CU, 0x0000004EU}, /* RGIDR_MODID[295]:IPMMUIR9*/ + [280] = {0xFD812000U, 0x0000000FU}, /* RGIDR_MODID[296]:ARPV0*/ + /* After setting */ /* RGIDR_MODID[297]:ARPV1*/ + [281] = {0xFD812008U, 0x0000002CU}, /* RGIDR_MODID[298]:AXIRGXS*/ + /* After setting */ /* RGIDR_MODID[299]:ARPV2*/ + [282] = {0xFD812010U, 0x0000000FU}, /* RGIDR_MODID[300]:ARPV3*/ + [283] = {0xFD812014U, 0x0000000FU}, /* RGIDR_MODID[301]:ARPV4*/ + [284] = {0xFD812018U, 0x0000000FU}, /* RGIDR_MODID[302]:ARPV5*/ + [285] = {0xFD81201CU, 0x0000000FU}, /* RGIDR_MODID[303]:ARPV6*/ + [286] = {0xFD812020U, 0x0000000FU}, /* RGIDR_MODID[304]:ARPV7*/ + [287] = {0xFD812024U, 0x00000000U}, /* RGIDR_MODID[305]:ARPV8*/ + [288] = {0xFD812028U, 0x0000000AU}, /* RGIDR_MODID[306]:CKM3DG*/ + [289] = {0xFD81202CU, 0x0000000FU}, /* RGIDR_MODID[307]:ECM3DG*/ + [290] = {0xFD812030U, 0x0000000EU}, /* RGIDR_MODID[308]:FBAPVC*/ + [291] = {0xFD812034U, 0x0000000EU}, /* RGIDR_MODID[309]:FBAPVD0*/ + [292] = {0xFD812038U, 0x0000000EU}, /* RGIDR_MODID[310]:FBAPVD1*/ + [293] = {0xFD81203CU, 0x0000000EU}, /* RGIDR_MODID[311]:FBAPVD2*/ + [294] = {0xFD812040U, 0x0000000EU}, /* RGIDR_MODID[312]:FBAPVE*/ + [295] = {0xFD812044U, 0x0000004EU}, /* RGIDR_MODID[313]:IPMMUPV000*/ + [296] = {0xFD812048U, 0x0000004EU}, /* RGIDR_MODID[314]:IPMMUPV001*/ + [297] = {0xFD81204CU, 0x0000004EU}, /* RGIDR_MODID[315]:IPMMUPV010*/ + [298] = {0xFD812050U, 0x0000004EU}, /* RGIDR_MODID[316]:IPMMUPV011*/ + [299] = {0xFD812054U, 0x0000004EU}, /* RGIDR_MODID[317]:IPMMUPV012*/ + [300] = {0xFD812058U, 0x0000004EU}, /* RGIDR_MODID[318]:IPMMUPV013*/ + [301] = {0xFD81205CU, 0x0000004EU}, /* RGIDR_MODID[319]:IPMMUPV014*/ + [302] = {0xFD812060U, 0x0000004EU}, /* RGIDR_MODID[320]:IPMMUPV015*/ + [303] = {0xFD812064U, 0x0000004EU}, /* RGIDR_MODID[321]:IPMMUPV002*/ + [304] = {0xFD812068U, 0x0000004EU}, /* RGIDR_MODID[322]:IPMMUPV003*/ + [305] = {0xFD81206CU, 0x0000004EU}, /* RGIDR_MODID[323]:IPMMUPV004*/ + [306] = {0xFD812070U, 0x0000004EU}, /* RGIDR_MODID[324]:IPMMUPV005*/ + [307] = {0xFD812074U, 0x0000004EU}, /* RGIDR_MODID[325]:IPMMUPV006*/ + [308] = {0xFD812078U, 0x0000004EU}, /* RGIDR_MODID[326]:IPMMUPV007*/ + [309] = {0xFD81207CU, 0x0000004EU}, /* RGIDR_MODID[327]:IPMMUPV008*/ + [310] = {0xFD812080U, 0x0000004EU}, /* RGIDR_MODID[328]:IPMMUPV009*/ + [311] = {0xE6622000U, 0x0000000FU}, /* RGIDR_MODID[329]:ARRC0*/ + /* After setting */ /* RGIDR_MODID[330]:ARRC1*/ + /* After setting */ /* RGIDR_MODID[331]:ARRC2*/ + [312] = {0xE662200CU, 0x0000000FU}, /* RGIDR_MODID[332]:ARRC3*/ + [313] = {0xE6622010U, 0x0000000FU}, /* RGIDR_MODID[333]:ARRC4*/ + [314] = {0xE6622014U, 0x0000000FU}, /* RGIDR_MODID[334]:ARRC5*/ + [315] = {0xE6622018U, 0x0000000FU}, /* RGIDR_MODID[335]:ARRC6*/ + [316] = {0xE662201CU, 0x0000000FU}, /* RGIDR_MODID[336]:ARRC7*/ + [317] = {0xE6622020U, 0x00000000U}, /* RGIDR_MODID[337]:ARRC8*/ + [318] = {0xE6622024U, 0x00000009U}, /* RGIDR_MODID[338]:CR0*/ + [319] = {0xE6622028U, 0x0000004FU}, /* RGIDR_MODID[339]:ICUMX*/ + [320] = {0xE662202CU, 0x0000000FU}, /* RGIDR_MODID[340]:ECMRC*/ + [321] = {0xFFC32000U, 0x0000004EU}, /* RGIDR_MODID[341]:DMAWCRC0*/ + [322] = {0xFFC32004U, 0x0000004EU}, /* RGIDR_MODID[342]:DMAWCRC1*/ + [323] = {0xFFC32008U, 0x0000004EU}, /* RGIDR_MODID[343]:DMAWCRC2*/ + [324] = {0xFFC3200CU, 0x0000004EU}, /* RGIDR_MODID[344]:DMAWCRC3*/ + [325] = {0xFFC42000U, 0x0000000FU}, /* RGIDR_MODID[345]:ARMREG00*/ + [326] = {0xFFC42004U, 0x0000000DU}, /* RGIDR_MODID[346]:ARMREG01*/ + [327] = {0xFFC42008U, 0x00000000U}, /* RGIDR_MODID[347]:ARMREG10*/ + [328] = {0xFFC4200CU, 0x00000000U}, /* RGIDR_MODID[348]:ARMREG11*/ + [329] = {0xFFC42010U, 0x0000000BU}, /* RGIDR_MODID[349]:ARMREG12*/ + [330] = {0xFFC42014U, 0x0000000FU}, /* RGIDR_MODID[350]:ARMREG13*/ + [331] = {0xFFC42018U, 0x0000000BU}, /* RGIDR_MODID[351]:ARMREG14*/ + [332] = {0xFFC4201CU, 0x00000002U}, /* RGIDR_MODID[352]:AXICR52SS0*/ + [333] = {0xFFC42020U, 0x0000000EU}, /* RGIDR_MODID[353]:AXICSD0*/ + [334] = {0xFFC42024U, 0x0000000EU}, /* RGIDR_MODID[354]:AXIINTAP0*/ + [335] = {0xFFC42028U, 0x00000000U}, /* RGIDR_MODID[355]:AXIINTAP1*/ + [336] = {0xFFC4202CU, 0x00000009U}, /* RGIDR_MODID[356]:AXISECROM*/ + [337] = {0xFFC42030U, 0x0000000FU}, /* RGIDR_MODID[357]:AXISYSRAM0*/ + [338] = {0xFFC42034U, 0x0000004FU}, /* RGIDR_MODID[358]:AXISYSRAM1*/ + [339] = {0xFFC42038U, 0x00000000U}, /* RGIDR_MODID[359]:ARGREG15*/ + [340] = {0xFFC4203CU, 0x00000000U}, /* RGIDR_MODID[360]:ARMREG2*/ + [341] = {0xFFC42040U, 0x00000000U}, /* RGIDR_MODID[361]:ARMREG3*/ + [342] = {0xFFC42044U, 0x00000000U}, /* RGIDR_MODID[362]:ARMREG4*/ + [343] = {0xFFC42048U, 0x0000000FU}, /* RGIDR_MODID[363]:ARMREG5*/ + [344] = {0xFFC4204CU, 0x0000000FU}, /* RGIDR_MODID[364]:ARMREG6*/ + [345] = {0xFFC42050U, 0x00000000U}, /* RGIDR_MODID[365]:ARMREG7*/ + [346] = {0xFFC42054U, 0x0000000DU}, /* RGIDR_MODID[366]:ARMREG8*/ + [347] = {0xFFC42058U, 0x0000000DU}, /* RGIDR_MODID[367]:ARMREG9*/ + [348] = {0xFFC4205CU, 0x0000000FU}, /* RGIDR_MODID[368]:ARRD0*/ + /* After setting */ /* RGIDR_MODID[369]:ARRD1*/ + /* After setting */ /* RGIDR_MODID[370]:ARRD2*/ + [349] = {0xFFC42068U, 0x0000000FU}, /* RGIDR_MODID[371]:ARRD3*/ + [350] = {0xFFC4206CU, 0x0000000FU}, /* RGIDR_MODID[372]:ARRD4*/ + [351] = {0xFFC42070U, 0x0000000FU}, /* RGIDR_MODID[373]:ARRD5*/ + [352] = {0xFFC42074U, 0x0000000FU}, /* RGIDR_MODID[374]:ARRD6*/ + [353] = {0xFFC42078U, 0x0000000FU}, /* RGIDR_MODID[375]:ARRD7*/ + [354] = {0xFFC4207CU, 0x00000000U}, /* RGIDR_MODID[376]:ARRD8*/ + [355] = {0xFFC42080U, 0x0000000FU}, /* RGIDR_MODID[377]:ARRT0*/ + /* After setting */ /* RGIDR_MODID[378]:ARRT1*/ + /* After setting */ /* RGIDR_MODID[379]:ARRT2*/ + [356] = {0xFFC4208CU, 0x0000000FU}, /* RGIDR_MODID[380]:ARRT3*/ + [357] = {0xFFC42090U, 0x0000000FU}, /* RGIDR_MODID[381]:ARRT4*/ + [358] = {0xFFC42094U, 0x0000000FU}, /* RGIDR_MODID[382]:ARRT5*/ + [359] = {0xFFC42098U, 0x0000000FU}, /* RGIDR_MODID[383]:ARRT6*/ + [360] = {0xFFC4209CU, 0x0000000FU}, /* RGIDR_MODID[384]:ARRT7*/ + [361] = {0xFFC420A0U, 0x00000000U}, /* RGIDR_MODID[385]:ARRT8*/ + [362] = {0xFFC420A4U, 0x0000000AU}, /* RGIDR_MODID[386]:CKMRT*/ + [363] = {0xFFC420A8U, 0x0000004EU}, /* RGIDR_MODID[387]:CRC0*/ + [364] = {0xFFC420ACU, 0x0000004EU}, /* RGIDR_MODID[388]:CRC1*/ + [365] = {0xFFC420B0U, 0x0000004EU}, /* RGIDR_MODID[389]:CRC2*/ + [366] = {0xFFC420B4U, 0x0000004EU}, /* RGIDR_MODID[390]:CRC3*/ + [367] = {0xFFC420B8U, 0x0000000EU}, /* RGIDR_MODID[391]:CSD*/ + [368] = {0xFFC420BCU, 0x0000000FU}, /* RGIDR_MODID[392]:ECM*/ + [369] = {0xFFC420C0U, 0x0000000FU}, /* RGIDR_MODID[393]:ECMRT*/ + [370] = {0xFFC420C4U, 0x0000000EU}, /* RGIDR_MODID[394]:FBACR52*/ + [371] = {0xFFC420C8U, 0x0000000EU}, /* RGIDR_MODID[395]:FBART*/ + [372] = {0xFFC420CCU, 0x0000000EU}, /* RGIDR_MODID[396]:INTTP*/ + [373] = {0xFFC420D0U, 0x0000004EU}, /* RGIDR_MODID[397]:IPMMURT000*/ + [374] = {0xFFC420D4U, 0x0000004EU}, /* RGIDR_MODID[398]:IPMMURT100*/ + [375] = {0xFFC420D8U, 0x0000004EU}, /* RGIDR_MODID[399]:KCRC4*/ + [376] = {0xFFC420DCU, 0x0000004EU}, /* RGIDR_MODID[400]:KCRC5*/ + [377] = {0xFFC420E0U, 0x0000004EU}, /* RGIDR_MODID[401]:KCRC6*/ + [378] = {0xFFC420E4U, 0x0000004EU}, /* RGIDR_MODID[402]:KCRC7*/ + [379] = {0xFFC420E8U, 0x0000004FU}, /* RGIDR_MODID[403]:MFI00*/ + [380] = {0xFFC420ECU, 0x0000004EU}, /* RGIDR_MODID[404]:MFI01*/ + [381] = {0xFFC420F0U, 0x0000004EU}, /* RGIDR_MODID[405]:MFI10*/ + [382] = {0xFFC420F4U, 0x0000004EU}, /* RGIDR_MODID[406]:MFI02*/ + [383] = {0xFFC420F8U, 0x0000004EU}, /* RGIDR_MODID[407]:MFI03*/ + [384] = {0xFFC420FCU, 0x0000004EU}, /* RGIDR_MODID[408]:MFI04*/ + [385] = {0xFFC42100U, 0x00000000U}, /* RGIDR_MODID[409]:MFI05*/ + [386] = {0xFFC42104U, 0x00000000U}, /* RGIDR_MODID[410]:MFI06*/ + [387] = {0xFFC42108U, 0x00000000U}, /* RGIDR_MODID[411]:MFI07*/ + [388] = {0xFFC4210CU, 0x00000000U}, /* RGIDR_MODID[412]:MFI08*/ + [389] = {0xFFC42110U, 0x0000004EU}, /* RGIDR_MODID[413]:MFI09*/ + [390] = {0xFFC42114U, 0x0000004FU}, /* RGIDR_MODID[414]:MFI15*/ + [391] = {0xFFC42118U, 0x0000000AU}, /* RGIDR_MODID[415]:CKMCR52*/ + [392] = {0xFFC4211CU, 0x0000004BU}, /* RGIDR_MODID[416]:RTDM0P*/ + [393] = {0xFFC42120U, 0x0000000FU}, /* RGIDR_MODID[417]:ECMRD*/ + [394] = {0xFFC42124U, 0x0000004BU}, /* RGIDR_MODID[418]:RTDM1P*/ + [395] = {0xFFC4212CU, 0x0000004BU}, /* RGIDR_MODID[419]:RTDM2P*/ + [396] = {0xFFC42130U, 0x0000000BU}, /* RGIDR_MODID[420]:SYSRAM10*/ + [397] = {0xFFC42134U, 0x0000004BU}, /* RGIDR_MODID[421]:RTDM3P*/ + [398] = {0xFFC42138U, 0x00000003U}, /* RGIDR_MODID[422]:SYSRAM00*/ + [399] = {0xFFC4213CU, 0x0000004EU}, /* RGIDR_MODID[423]:TSIPL0*/ + [400] = {0xFFC42140U, 0x0000004EU}, /* RGIDR_MODID[424]:TSIPL1*/ + [401] = {0xFFC42144U, 0x0000004EU}, /* RGIDR_MODID[425]:TSIPL2*/ + [402] = {0xFFC42148U, 0x0000004EU}, /* RGIDR_MODID[426]:TSIPL3*/ + [403] = {0xFFC4214CU, 0x0000004EU}, /* RGIDR_MODID[427]:TSIPL4*/ + [404] = {0xFFC42150U, 0x0000004EU}, /* RGIDR_MODID[428]:TSIPL5*/ + [405] = {0xFFC42154U, 0x0000004EU}, /* RGIDR_MODID[429]:TSIPL6*/ + [406] = {0xFFC42158U, 0x0000004EU}, /* RGIDR_MODID[430]:TSIPL7*/ + [407] = {0xFFC4215CU, 0x0000004EU}, /* RGIDR_MODID[431]:WCRC0*/ + [408] = {0xFFC42160U, 0x0000004EU}, /* RGIDR_MODID[432]:WCRC1*/ + [409] = {0xFFC42164U, 0x0000004EU}, /* RGIDR_MODID[433]:WCRC2*/ + [410] = {0xFFC42168U, 0x0000004EU}, /* RGIDR_MODID[434]:WCRC3*/ + [411] = {0xFFC42180U, 0x0000004EU}, /* RGIDR_MODID[435]:MFI11*/ + [412] = {0xFFC42184U, 0x00000000U}, /* RGIDR_MODID[436]:MFI12*/ + [413] = {0xFFC42188U, 0x00000000U}, /* RGIDR_MODID[437]:MFI13*/ + [414] = {0xFFC4218CU, 0x00000000U}, /* RGIDR_MODID[438]:MFI14*/ + [415] = {0xFFC42190U, 0x0000004EU}, /* RGIDR_MODID[439]:IPMMURT001*/ + [416] = {0xFFC42194U, 0x0000004EU}, /* RGIDR_MODID[440]:IPMMURT010*/ + [417] = {0xFFC42198U, 0x0000004EU}, /* RGIDR_MODID[441]:IPMMURT011*/ + [418] = {0xFFC4219CU, 0x0000004EU}, /* RGIDR_MODID[442]:IPMMURT012*/ + [419] = {0xFFC421A0U, 0x0000004EU}, /* RGIDR_MODID[443]:IPMMURT013*/ + [420] = {0xFFC421A4U, 0x0000004EU}, /* RGIDR_MODID[444]:IPMMURT014*/ + [421] = {0xFFC421A8U, 0x0000004EU}, /* RGIDR_MODID[445]:IPMMURT015*/ + [422] = {0xFFC421ACU, 0x0000004EU}, /* RGIDR_MODID[446]:IPMMURT002*/ + [423] = {0xFFC421B0U, 0x0000004EU}, /* RGIDR_MODID[447]:IPMMURT003*/ + [424] = {0xFFC421B4U, 0x0000004EU}, /* RGIDR_MODID[448]:IPMMURT004*/ + [425] = {0xFFC421B8U, 0x0000004EU}, /* RGIDR_MODID[449]:IPMMURT005*/ + [426] = {0xFFC421BCU, 0x0000004EU}, /* RGIDR_MODID[450]:IPMMURT006*/ + [427] = {0xFFC421C0U, 0x0000004EU}, /* RGIDR_MODID[451]:IPMMURT007*/ + [428] = {0xFFC421C4U, 0x0000004EU}, /* RGIDR_MODID[452]:IPMMURT008*/ + [429] = {0xFFC421C8U, 0x0000004EU}, /* RGIDR_MODID[453]:IPMMURT009*/ + [430] = {0xFFC421CCU, 0x0000004EU}, /* RGIDR_MODID[454]:IPKMURT101*/ + [431] = {0xFFC421D0U, 0x0000004EU}, /* RGIDR_MODID[455]:IPMMURT110*/ + [432] = {0xFFC421D4U, 0x0000004EU}, /* RGIDR_MODID[456]:IPMMURT111*/ + [433] = {0xFFC421D8U, 0x0000004EU}, /* RGIDR_MODID[457]:IPMMURT112*/ + [434] = {0xFFC421DCU, 0x0000004EU}, /* RGIDR_MODID[458]:IPMMURT113*/ + [435] = {0xFFC421E0U, 0x0000004EU}, /* RGIDR_MODID[459]:IPMMURT114*/ + [436] = {0xFFC421E4U, 0x0000004EU}, /* RGIDR_MODID[460]:IPMMURT115*/ + [437] = {0xFFC421E8U, 0x0000004EU}, /* RGIDR_MODID[461]:IPMMURT102*/ + [438] = {0xFFC421ECU, 0x0000004EU}, /* RGIDR_MODID[462]:IPMMURT103*/ + [439] = {0xFFC421F0U, 0x0000004EU}, /* RGIDR_MODID[463]:IPMMURT104*/ + [440] = {0xFFC421F4U, 0x0000004EU}, /* RGIDR_MODID[464]:IPMMURT105*/ + [441] = {0xFFC421F8U, 0x0000004EU}, /* RGIDR_MODID[465]:IPMMURT106*/ + [442] = {0xFFC421FCU, 0x0000004EU}, /* RGIDR_MODID[466]:IPMMURT107*/ + [443] = {0xFFC42200U, 0x0000004BU}, /* RGIDR_MODID[467]:RTDM000*/ + [444] = {0xFFC42204U, 0x0000004BU}, /* RGIDR_MODID[468]:RTDM001*/ + [445] = {0xFFC42208U, 0x0000004BU}, /* RGIDR_MODID[469]:RTDM010*/ + [446] = {0xFFC4220CU, 0x0000004BU}, /* RGIDR_MODID[470]:RTDM011*/ + [447] = {0xFFC42210U, 0x0000004BU}, /* RGIDR_MODID[471]:RTDM012*/ + [448] = {0xFFC42214U, 0x0000004BU}, /* RGIDR_MODID[472]:RTDM013*/ + [449] = {0xFFC42218U, 0x0000004BU}, /* RGIDR_MODID[473]:RTDM014*/ + [450] = {0xFFC4221CU, 0x0000004BU}, /* RGIDR_MODID[474]:RTDM015*/ + [451] = {0xFFC42220U, 0x0000004BU}, /* RGIDR_MODID[475]:RTDM002*/ + [452] = {0xFFC42224U, 0x0000004BU}, /* RGIDR_MODID[476]:RTDM003*/ + [453] = {0xFFC42228U, 0x0000004BU}, /* RGIDR_MODID[477]:RTDM004*/ + [454] = {0xFFC4222CU, 0x0000004BU}, /* RGIDR_MODID[478]:RTDM005*/ + [455] = {0xFFC42230U, 0x0000004BU}, /* RGIDR_MODID[479]:RTDM006*/ + [456] = {0xFFC42234U, 0x0000004BU}, /* RGIDR_MODID[480]:RTDM007*/ + [457] = {0xFFC42238U, 0x0000004BU}, /* RGIDR_MODID[481]:RTDM008*/ + [458] = {0xFFC4223CU, 0x0000004BU}, /* RGIDR_MODID[482]:RTDM009*/ + [459] = {0xFFC42240U, 0x0000004BU}, /* RGIDR_MODID[483]:RTDM100*/ + [460] = {0xFFC42244U, 0x0000004BU}, /* RGIDR_MODID[484]:RTDM101*/ + [461] = {0xFFC42248U, 0x0000004BU}, /* RGIDR_MODID[485]:RTDM110*/ + [462] = {0xFFC4224CU, 0x0000004BU}, /* RGIDR_MODID[486]:RTDM111*/ + [463] = {0xFFC42250U, 0x0000004BU}, /* RGIDR_MODID[487]:RTDM112*/ + [464] = {0xFFC42254U, 0x0000004BU}, /* RGIDR_MODID[488]:RTDM113*/ + [465] = {0xFFC42258U, 0x0000004BU}, /* RGIDR_MODID[489]:RTDM114*/ + [466] = {0xFFC4225CU, 0x0000004BU}, /* RGIDR_MODID[490]:RTDM115*/ + [467] = {0xFFC42260U, 0x0000004BU}, /* RGIDR_MODID[491]:RTDM102*/ + [468] = {0xFFC42264U, 0x0000004BU}, /* RGIDR_MODID[492]:RTDM103*/ + [469] = {0xFFC42268U, 0x0000004BU}, /* RGIDR_MODID[493]:RTDM104*/ + [470] = {0xFFC4226CU, 0x0000004BU}, /* RGIDR_MODID[494]:RTDM105*/ + [471] = {0xFFC42270U, 0x0000004BU}, /* RGIDR_MODID[495]:RTDM106*/ + [472] = {0xFFC42274U, 0x0000004BU}, /* RGIDR_MODID[496]:RTDM107*/ + [473] = {0xFFC42278U, 0x0000004BU}, /* RGIDR_MODID[497]:RTDM108*/ + [474] = {0xFFC4227CU, 0x0000004BU}, /* RGIDR_MODID[498]:RTDM109*/ + [475] = {0xFFC42280U, 0x0000004BU}, /* RGIDR_MODID[499]:RTDM200*/ + [476] = {0xFFC42284U, 0x0000004BU}, /* RGIDR_MODID[500]:RTDM201*/ + [477] = {0xFFC42288U, 0x0000004BU}, /* RGIDR_MODID[501]:RTDM210*/ + [478] = {0xFFC4228CU, 0x0000004BU}, /* RGIDR_MODID[502]:RTDM211*/ + [479] = {0xFFC42290U, 0x0000004BU}, /* RGIDR_MODID[503]:RTDM212*/ + [480] = {0xFFC42294U, 0x0000004BU}, /* RGIDR_MODID[504]:RTDM213*/ + [481] = {0xFFC42298U, 0x0000004BU}, /* RGIDR_MODID[505]:RTDM214*/ + [482] = {0xFFC4229CU, 0x0000004BU}, /* RGIDR_MODID[506]:RTDM215*/ + [483] = {0xFFC422A0U, 0x0000004BU}, /* RGIDR_MODID[507]:RTDM202*/ + [484] = {0xFFC422A4U, 0x0000004BU}, /* RGIDR_MODID[508]:RTDM203*/ + [485] = {0xFFC422A8U, 0x0000004BU}, /* RGIDR_MODID[509]:RTDM204*/ + [486] = {0xFFC422ACU, 0x0000004BU}, /* RGIDR_MODID[510]:RTDM205*/ + [487] = {0xFFC422B0U, 0x0000004BU}, /* RGIDR_MODID[511]:RTDM206*/ + [488] = {0xFFC422B4U, 0x0000004BU}, /* RGIDR_MODID[512]:RTDM207*/ + [489] = {0xFFC422B8U, 0x0000004BU}, /* RGIDR_MODID[513]:RTDM208*/ + [490] = {0xFFC422BCU, 0x0000004BU}, /* RGIDR_MODID[514]:RTDM209*/ + [491] = {0xFFC422C0U, 0x0000004BU}, /* RGIDR_MODID[515]:RTDM300*/ + [492] = {0xFFC422C4U, 0x0000004BU}, /* RGIDR_MODID[516]:RTDM301*/ + [493] = {0xFFC422C8U, 0x0000004BU}, /* RGIDR_MODID[517]:RTDM310*/ + [494] = {0xFFC422CCU, 0x0000004BU}, /* RGIDR_MODID[518]:RTDM311*/ + [495] = {0xFFC422D0U, 0x0000004BU}, /* RGIDR_MODID[519]:RTDM312*/ + [496] = {0xFFC422D4U, 0x0000004BU}, /* RGIDR_MODID[520]:RTDM313*/ + [497] = {0xFFC422D8U, 0x0000004BU}, /* RGIDR_MODID[521]:RTDM314*/ + [498] = {0xFFC422DCU, 0x0000004BU}, /* RGIDR_MODID[522]:RTDM315*/ + [499] = {0xFFC422E0U, 0x0000004BU}, /* RGIDR_MODID[523]:RTDM302*/ + [500] = {0xFFC422E4U, 0x0000004BU}, /* RGIDR_MODID[524]:RTDM303*/ + [501] = {0xFFC422E8U, 0x0000004BU}, /* RGIDR_MODID[525]:RTDM304*/ + [502] = {0xFFC422ECU, 0x0000004BU}, /* RGIDR_MODID[526]:RTDM305*/ + [503] = {0xFFC422F0U, 0x0000004BU}, /* RGIDR_MODID[527]:RTDM306*/ + [504] = {0xFFC422F4U, 0x0000004BU}, /* RGIDR_MODID[528]:RTDM307*/ + [505] = {0xFFC422F8U, 0x0000004BU}, /* RGIDR_MODID[529]:RTDM308*/ + [506] = {0xFFC422FCU, 0x0000004BU}, /* RGIDR_MODID[530]:RTDM309*/ + [507] = {0xFFC42300U, 0x0000004EU}, /* RGIDR_MODID[531]:IPMMURT108*/ + [508] = {0xFFC42304U, 0x0000004EU}, /* RGIDR_MODID[532]:IPMMURT109*/ + [509] = {0xFFC42308U, 0x00000001U}, /* RGIDR_MODID[533]:SYSRAM01*/ + [510] = {0xFFC4230CU, 0x0000000BU}, /* RGIDR_MODID[534]:SYSRAM02*/ + [511] = {0xFFC42310U, 0x00000001U}, /* RGIDR_MODID[535]:SYSRAM03*/ + [512] = {0xFFC42314U, 0x00000001U}, /* RGIDR_MODID[536]:SYSRAM04*/ + [513] = {0xFFC42318U, 0x00000001U}, /* RGIDR_MODID[537]:SYSRAM05*/ + [514] = {0xFFC4231CU, 0x00000001U}, /* RGIDR_MODID[538]:SYSRAM06*/ + [515] = {0xFFC42320U, 0x00000000U}, /* RGIDR_MODID[539]:SYSRAM07*/ + [516] = {0xFFC42324U, 0x0000000BU}, /* RGIDR_MODID[540]:SYSRAM11*/ + [517] = {0xFFC42328U, 0x0000000BU}, /* RGIDR_MODID[541]:SYSRAM12*/ + [518] = {0xFFC4232CU, 0x0000000BU}, /* RGIDR_MODID[542]:SYSRAM13*/ + [519] = {0xFFC42330U, 0x0000000BU}, /* RGIDR_MODID[543]:SYSRAM14*/ + [520] = {0xFFC42334U, 0x0000000BU}, /* RGIDR_MODID[544]:SYSRAM15*/ + [521] = {0xFFC42338U, 0x0000000BU}, /* RGIDR_MODID[545]:SYSRAM16*/ + [522] = {0xFFC4233CU, 0x00000000U}, /* RGIDR_MODID[546]:SYSRAM17*/ + [523] = {0xFFC42360U, 0x00000002U}, /* RGIDR_MODID[547]:BKBUF*/ + [524] = {0xFFC42364U, 0x00000002U}, /* RGIDR_MODID[548]:AXICR52SS1*/ + [525] = {0xFFC42368U, 0x00000002U}, /* RGIDR_MODID[549]:AXICR52SS2*/ + [526] = {0xFF862000U, 0x0000000FU}, /* RGIDR_MODID[550]:ARSC0*/ + /* After setting */ /* RGIDR_MODID[551]:ARSC1*/ + /* After setting */ /* RGIDR_MODID[552]:ARSC2*/ + [527] = {0xFF86200CU, 0x0000000FU}, /* RGIDR_MODID[553]:ARSC3*/ + [528] = {0xFF862010U, 0x0000000FU}, /* RGIDR_MODID[554]:ARSC4*/ + [529] = {0xFF862014U, 0x0000000FU}, /* RGIDR_MODID[555]:ARSC5*/ + [530] = {0xFF862018U, 0x0000000FU}, /* RGIDR_MODID[556]:ARSC6*/ + [531] = {0xFF86201CU, 0x0000000FU}, /* RGIDR_MODID[557]:ARSC7*/ + [532] = {0xFF862020U, 0x00000000U}, /* RGIDR_MODID[558]:ARSC8*/ + [533] = {0xFF862024U, 0x0000000FU}, /* RGIDR_MODID[559]:ARSTM0*/ + /* After setting */ /* RGIDR_MODID[560]:ARSTM1*/ + [534] = {0xFF86202CU, 0x0000000EU}, /* RGIDR_MODID[561]:CSD1S*/ + [535] = {0xFF862030U, 0x0000000EU}, /* RGIDR_MODID[562]:AXIFBABUSTOP0*/ + [536] = {0xFF862034U, 0x0000000EU}, /* RGIDR_MODID[563]:AXIFBABUSTOP1*/ + /* After setting */ /* RGIDR_MODID[564]:ARSTM2*/ + [537] = {0xFF86203CU, 0x0000000FU}, /* RGIDR_MODID[565]:ARSTM3*/ + [538] = {0xFF862040U, 0x0000000FU}, /* RGIDR_MODID[566]:ARSTM4*/ + [539] = {0xFF862044U, 0x0000000FU}, /* RGIDR_MODID[567]:ARSTM5*/ + [540] = {0xFF862048U, 0x0000000FU}, /* RGIDR_MODID[568]:ARSTM6*/ + [541] = {0xFF86204CU, 0x0000000FU}, /* RGIDR_MODID[569]:ARSTM7*/ + [542] = {0xFF862050U, 0x00000000U}, /* RGIDR_MODID[570]:ARSTM8*/ + [543] = {0xFF862054U, 0x0000000FU}, /* RGIDR_MODID[571]:ECMTOP*/ + [544] = {0xFF862058U, 0x0000000EU}, /* RGIDR_MODID[572]:FBA*/ + [545] = {0xFF86205CU, 0x0000000EU}, /* RGIDR_MODID[573]:FBC*/ + [546] = {0xFF862060U, 0x0000000CU}, /* RGIDR_MODID[574]:AXICCI00*/ + [547] = {0xFF862064U, 0x0000000CU}, /* RGIDR_MODID[575]:AXICCI01*/ + [548] = {0xFF862068U, 0x0000000CU}, /* RGIDR_MODID[576]:AXICCI10*/ + [549] = {0xFF86206CU, 0x0000000CU}, /* RGIDR_MODID[577]:AXICCI11*/ + [550] = {0xFF862070U, 0x0000000CU}, /* RGIDR_MODID[578]:AXICCI12*/ + [551] = {0xFF862074U, 0x0000000CU}, /* RGIDR_MODID[579]:AXICCI13*/ + [552] = {0xFF862078U, 0x0000000CU}, /* RGIDR_MODID[580]:AXICCI14*/ + [553] = {0xFF86207CU, 0x0000000CU}, /* RGIDR_MODID[581]:AXICCI15*/ + [554] = {0xFF862080U, 0x0000000CU}, /* RGIDR_MODID[582]:AXICCI2*/ + [555] = {0xFF862084U, 0x0000000CU}, /* RGIDR_MODID[583]:AXICCI3*/ + [556] = {0xFF862088U, 0x0000000CU}, /* RGIDR_MODID[584]:AXICCI4*/ + [557] = {0xFF86208CU, 0x0000000CU}, /* RGIDR_MODID[585]:AXICCI5*/ + [558] = {0xFF862090U, 0x0000000CU}, /* RGIDR_MODID[586]:AXICCI6*/ + [559] = {0xFF862094U, 0x0000000CU}, /* RGIDR_MODID[587]:AXICCI7*/ + [560] = {0xFF862098U, 0x0000000CU}, /* RGIDR_MODID[588]:AXICCI8*/ + [561] = {0xFF86209CU, 0x0000000FU}, /* RGIDR_MODID[589]:AXICCI9*/ + [562] = {0xFF8620A0U, 0x0000000FU}, /* RGIDR_MODID[590]:ECMSTM*/ + [563] = {0xE7782000U, 0x0000002CU}, /* RGIDR_MODID[591]:DMASSI00*/ + [564] = {0xE7782004U, 0x0000002CU}, /* RGIDR_MODID[592]:DMASSI01*/ + [565] = {0xE7782008U, 0x0000002CU}, /* RGIDR_MODID[593]:DMASSI02*/ + [566] = {0xE778200CU, 0x0000002CU}, /* RGIDR_MODID[594]:DMASSI03*/ + [567] = {0xE7782010U, 0x0000002CU}, /* RGIDR_MODID[595]:DMASSI04*/ + [568] = {0xE7782014U, 0x0000004EU}, /* RGIDR_MODID[596]:DMAI2C0*/ + [569] = {0xE7782018U, 0x0000004EU}, /* RGIDR_MODID[597]:DMAI2C1*/ + [570] = {0xE778201CU, 0x0000004EU}, /* RGIDR_MODID[598]:DMAI2C2*/ + [571] = {0xE7782020U, 0x0000004EU}, /* RGIDR_MODID[599]:DMAI2C3*/ + [572] = {0xE7782024U, 0x0000004EU}, /* RGIDR_MODID[600]:DMAI2C4*/ + [573] = {0xE7782028U, 0x0000004EU}, /* RGIDR_MODID[601]:DMAI2C5*/ + [574] = {0xE778202CU, 0x0000002CU}, /* RGIDR_MODID[602]:DMASSI05*/ + [575] = {0xE7782030U, 0x0000002CU}, /* RGIDR_MODID[603]:DMASSI06*/ + [576] = {0xE7782034U, 0x0000002CU}, /* RGIDR_MODID[604]:DMASSI07*/ + [577] = {0xE67C2000U, 0x00000007U}, /* RGIDR_MODID[605]:ARMM*/ + /* After setting */ /* RGIDR_MODID[606]:AXIARNMM*/ + [578] = {0xE67C2008U, 0x0000000FU}, /* RGIDR_MODID[607]:ARSM0*/ + /* After setting */ /* RGIDR_MODID[608]:ARSM1*/ + /* After setting */ /* RGIDR_MODID[609]:ARSM2*/ + [579] = {0xE67C2014U, 0x0000000FU}, /* RGIDR_MODID[610]:AXIQOS0*/ + [580] = {0xE67C2018U, 0x0000000FU}, /* RGIDR_MODID[611]:AXIQOS1*/ + [581] = {0xE67C201CU, 0x0000000FU}, /* RGIDR_MODID[612]:AXIQOS2*/ + [582] = {0xE67C2020U, 0x0000000FU}, /* RGIDR_MODID[613]:AXIQOS3*/ + [583] = {0xE67C2024U, 0x0000000FU}, /* RGIDR_MODID[614]:AXIQOS4*/ + [584] = {0xE67C2028U, 0x0000000FU}, /* RGIDR_MODID[615]:AXIQOS5*/ + [585] = {0xE67C202CU, 0x0000000FU}, /* RGIDR_MODID[616]:AXIQOS6*/ + [586] = {0xE67C2030U, 0x0000000FU}, /* RGIDR_MODID[617]:AXIQOS7*/ + [587] = {0xE67C2034U, 0x0000000FU}, /* RGIDR_MODID[618]:ARSM3*/ + [588] = {0xE67C2038U, 0x0000000FU}, /* RGIDR_MODID[619]:ARSM4*/ + [589] = {0xE67C203CU, 0x0000000FU}, /* RGIDR_MODID[620]:ARSM5*/ + [590] = {0xE67C2040U, 0x0000000FU}, /* RGIDR_MODID[621]:ARSM6*/ + [591] = {0xE67C2044U, 0x0000000FU}, /* RGIDR_MODID[622]:ARSM7*/ + [592] = {0xE67C2048U, 0x00000000U}, /* RGIDR_MODID[623]:ARSM8*/ + [593] = {0xE67C204CU, 0x0000000BU}, /* RGIDR_MODID[624]:AXMM0*/ + [594] = {0xE67C2050U, 0x0000000BU}, /* RGIDR_MODID[625]:AXMM1*/ + [595] = {0xE67C2054U, 0x00000000U}, /* RGIDR_MODID[626]:AXMMPMON*/ + [596] = {0xE67C2058U, 0x0000000AU}, /* RGIDR_MODID[627]:CKMMM*/ + [597] = {0xE67C205CU, 0x0000000FU}, /* RGIDR_MODID[628]:ECMMM*/ + [598] = {0xE67C2060U, 0x0000000EU}, /* RGIDR_MODID[629]:FBADBSC0*/ + [599] = {0xE67C2064U, 0x0000000EU}, /* RGIDR_MODID[630]:FBADBSC1*/ + [600] = {0xE67C2068U, 0x0000000EU}, /* RGIDR_MODID[631]:FBAMM*/ + [601] = {0xE67C206CU, 0x0000004EU}, /* RGIDR_MODID[632]:IPMMUMM00*/ + [602] = {0xE67C2070U, 0x0000000FU}, /* RGIDR_MODID[633]:DBS0A0*/ + [603] = {0xE67C2074U, 0x0000000AU}, /* RGIDR_MODID[634]:DBS0A1*/ + [604] = {0xE67C2078U, 0x0000000FU}, /* RGIDR_MODID[635]:DBS1A0*/ + [605] = {0xE67C207CU, 0x0000000AU}, /* RGIDR_MODID[636]:DBS1A1*/ + [606] = {0xE67C2080U, 0x0000000FU}, /* RGIDR_MODID[637]:AXCIDBS*/ + [607] = {0xE67C2084U, 0x00000009U}, /* RGIDR_MODID[638]:FCPRC*/ + [608] = {0xE67C2088U, 0x0000000FU}, /* RGIDR_MODID[639]:DBS0D0*/ + [609] = {0xE67C208CU, 0x0000000AU}, /* RGIDR_MODID[640]:DBS0D1*/ + [610] = {0xE67C2090U, 0x0000000FU}, /* RGIDR_MODID[641]:DBS1D0*/ + [611] = {0xE67C2094U, 0x0000000AU}, /* RGIDR_MODID[642]:DBS1D1*/ + [612] = {0xE67C2098U, 0x0000000EU}, /* RGIDR_MODID[643]:FBADDR*/ + [613] = {0xE67C209CU, 0x0000004EU}, /* RGIDR_MODID[644]:IPMMUMM01*/ + [614] = {0xE67C20A0U, 0x0000004EU}, /* RGIDR_MODID[645]:IPMMUMM10*/ + [615] = {0xE67C20A4U, 0x0000004EU}, /* RGIDR_MODID[646]:IPMMUMM11*/ + [616] = {0xE67C20A8U, 0x0000004EU}, /* RGIDR_MODID[647]:IPMMUMM12*/ + [617] = {0xE67C20ACU, 0x0000004EU}, /* RGIDR_MODID[648]:IPMMUMM13*/ + [618] = {0xE67C20B0U, 0x0000004EU}, /* RGIDR_MODID[649]:IPMMUMM14*/ + [619] = {0xE67C20B4U, 0x0000004EU}, /* RGIDR_MODID[650]:IPMMUMM15*/ + [620] = {0xE67C20B8U, 0x0000004EU}, /* RGIDR_MODID[651]:IPMMUMM02*/ + [621] = {0xE67C20BCU, 0x0000004EU}, /* RGIDR_MODID[652]:IPMMUMM03*/ + [622] = {0xE67C20C0U, 0x0000004EU}, /* RGIDR_MODID[653]:IPMMUMM04*/ + [623] = {0xE67C20C4U, 0x0000004EU}, /* RGIDR_MODID[654]:IPMMUMM05*/ + [624] = {0xE67C20C8U, 0x0000004EU}, /* RGIDR_MODID[655]:IPMMUMM06*/ + [625] = {0xE67C20CCU, 0x0000004EU}, /* RGIDR_MODID[656]:IPMMUMM07*/ + [626] = {0xE67C20D0U, 0x0000004EU}, /* RGIDR_MODID[657]:IPMMUMM08*/ + [627] = {0xE67C20D4U, 0x0000004EU}, /* RGIDR_MODID[658]:IPMMUMM09*/ + [628] = {0xFF802000U, 0x0000000FU}, /* RGIDR_MODID[659]:ARSN0*/ + /* After setting */ /* RGIDR_MODID[660]:ARSN1*/ + /* After setting */ /* RGIDR_MODID[661]:ARSN2*/ + [629] = {0xFF80200CU, 0x0000000FU}, /* RGIDR_MODID[662]:ARSN3*/ + [630] = {0xFF802010U, 0x0000000FU}, /* RGIDR_MODID[663]:ARSN4*/ + [631] = {0xFF802014U, 0x0000000FU}, /* RGIDR_MODID[664]:ARSN5*/ + [632] = {0xFF802018U, 0x0000000FU}, /* RGIDR_MODID[665]:ARSN6*/ + [633] = {0xFF80201CU, 0x00000007U}, /* RGIDR_MODID[666]:ARSN7*/ + [634] = {0xFF802020U, 0x00000000U}, /* RGIDR_MODID[667]:ARSN8*/ + [635] = {0xFF802024U, 0x0000000FU}, /* RGIDR_MODID[668]:ECMTOP3*/ + [636] = {0xE7752000U, 0x0000000FU}, /* RGIDR_MODID[669]:ARSD00*/ + /* After setting */ /* RGIDR_MODID[670]:ARSD01*/ + /* After setting */ /* RGIDR_MODID[671]:ARSD02*/ + [637] = {0xE775200CU, 0x0000000FU}, /* RGIDR_MODID[672]:ARSD03*/ + [638] = {0xE7752010U, 0x0000000FU}, /* RGIDR_MODID[673]:ARSD04*/ + [639] = {0xE7752014U, 0x0000000FU}, /* RGIDR_MODID[674]:ARSD05*/ + [640] = {0xE7752018U, 0x0000000FU}, /* RGIDR_MODID[675]:ARSD06*/ + [641] = {0xE775201CU, 0x0000004AU}, /* RGIDR_MODID[676]:AXIFRAY*/ + [642] = {0xE7752020U, 0x0000000FU}, /* RGIDR_MODID[677]:AXIIPC*/ + [643] = {0xE7752028U, 0x0000004FU}, /* RGIDR_MODID[678]:AXIRPC*/ + [644] = {0xE775202CU, 0x0000000FU}, /* RGIDR_MODID[679]:AXISDHI0*/ + [645] = {0xE7752030U, 0x0000000FU}, /* RGIDR_MODID[680]:ARSD07*/ + [646] = {0xE7752034U, 0x00000000U}, /* RGIDR_MODID[681]:ARSD08*/ + [647] = {0xE7752038U, 0x0000000FU}, /* RGIDR_MODID[682]:ARSP00*/ + /* After setting */ /* RGIDR_MODID[683]:ARSP01*/ + /* After setting */ /* RGIDR_MODID[684]:ARSP02*/ + [648] = {0xE7752044U, 0x0000000FU}, /* RGIDR_MODID[685]:ARSP03*/ + [649] = {0xE7752048U, 0x0000000FU}, /* RGIDR_MODID[686]:ARSP04*/ + [650] = {0xE775204CU, 0x0000000FU}, /* RGIDR_MODID[687]:ARSP05*/ + [651] = {0xE7752050U, 0x0000000FU}, /* RGIDR_MODID[688]:ARSP06*/ + [652] = {0xE7752054U, 0x00000007U}, /* RGIDR_MODID[689]:ARSP07*/ + [653] = {0xE7752058U, 0x00000000U}, /* RGIDR_MODID[690]:ARSP08*/ + [654] = {0xE775205CU, 0x0000004EU}, /* RGIDR_MODID[691]:IPMMUDS001*/ + [655] = {0xE7752060U, 0x0000000AU}, /* RGIDR_MODID[692]:CKMPER0*/ + [656] = {0xE7752064U, 0x0000000FU}, /* RGIDR_MODID[693]:ECMPER0*/ + [657] = {0xE7752068U, 0x0000000EU}, /* RGIDR_MODID[694]:FBAPER0*/ + [658] = {0xE775206CU, 0x0000004EU}, /* RGIDR_MODID[695]:FSO0*/ + [659] = {0xE7752070U, 0x0000004EU}, /* RGIDR_MODID[696]:FSO1*/ + [660] = {0xE7752074U, 0x0000004EU}, /* RGIDR_MODID[697]:FSO10*/ + [661] = {0xE7752078U, 0x0000004EU}, /* RGIDR_MODID[698]:FSO2*/ + [662] = {0xE775207CU, 0x0000004EU}, /* RGIDR_MODID[699]:FSO3*/ + [663] = {0xE7752080U, 0x0000004EU}, /* RGIDR_MODID[700]:FSO4*/ + [664] = {0xE7752084U, 0x0000004EU}, /* RGIDR_MODID[701]:FSO5*/ + [665] = {0xE7752088U, 0x0000004EU}, /* RGIDR_MODID[702]:FSO6*/ + [666] = {0xE775208CU, 0x0000004EU}, /* RGIDR_MODID[703]:FSO7*/ + [667] = {0xE7752090U, 0x0000004EU}, /* RGIDR_MODID[704]:FSO8*/ + [668] = {0xE7752094U, 0x0000004EU}, /* RGIDR_MODID[705]:FSO9*/ + [669] = {0xE7752098U, 0x0000002CU}, /* RGIDR_MODID[706]:ADG*/ + [670] = {0xE775209CU, 0x0000000FU}, /* RGIDR_MODID[707]:ECMSD0*/ + [671] = {0xE77520A0U, 0x0000004EU}, /* RGIDR_MODID[708]:IPMMUDS010*/ + [672] = {0xE77520A4U, 0x0000004EU}, /* RGIDR_MODID[709]:IPMMUDS011*/ + [673] = {0xE77520A8U, 0x0000004EU}, /* RGIDR_MODID[710]:I2C0*/ + [674] = {0xE77520ACU, 0x0000004EU}, /* RGIDR_MODID[711]:I2C1*/ + [675] = {0xE77520B0U, 0x0000004EU}, /* RGIDR_MODID[712]:I2C2*/ + [676] = {0xE77520B4U, 0x0000004EU}, /* RGIDR_MODID[713]:I2C3*/ + [677] = {0xE77520B8U, 0x0000004EU}, /* RGIDR_MODID[714]:I2C4*/ + [678] = {0xE77520BCU, 0x0000004EU}, /* RGIDR_MODID[715]:I2C5*/ + [679] = {0xE77520C0U, 0x0000004EU}, /* RGIDR_MODID[716]:IPMMUDS012*/ + [680] = {0xE77520C4U, 0x0000000FU}, /* RGIDR_MODID[717]:IPC*/ + [681] = {0xE77520C8U, 0x0000004EU}, /* RGIDR_MODID[718]:IPMMUDS000*/ + [682] = {0xE77520CCU, 0x0000004EU}, /* RGIDR_MODID[719]:IPMMUDS013*/ + [683] = {0xE77520D0U, 0x0000004EU}, /* RGIDR_MODID[720]:IPMMUDS014*/ + [684] = {0xE77520D4U, 0x0000004EU}, /* RGIDR_MODID[721]:IPMMUDS015*/ + [685] = {0xE77520D8U, 0x0000004EU}, /* RGIDR_MODID[722]:IPMMUDS002*/ + [686] = {0xE77520DCU, 0x0000004EU}, /* RGIDR_MODID[723]:IPMMUDS003*/ + [687] = {0xE77520E0U, 0x0000004EU}, /* RGIDR_MODID[724]:IPMMUDS004*/ + [688] = {0xE77520E4U, 0x0000004EU}, /* RGIDR_MODID[725]:IPMMUDS005*/ + [689] = {0xE77520E8U, 0x0000002CU}, /* RGIDR_MODID[726]:SSI*/ + [690] = {0xE77520ECU, 0x0000004EU}, /* RGIDR_MODID[727]:IPMMUDS006*/ + [691] = {0xE77520F0U, 0x0000004EU}, /* RGIDR_MODID[728]:IPMMUDS007*/ + [692] = {0xE77520F4U, 0x0000000CU}, /* RGIDR_MODID[729]:SYDM1P*/ + [693] = {0xE77520F8U, 0x0000004EU}, /* RGIDR_MODID[730]:IPMMUDS008*/ + [694] = {0xE77520FCU, 0x0000000CU}, /* RGIDR_MODID[731]:SYDM2P*/ + [695] = {0xE7752100U, 0x0000004EU}, /* RGIDR_MODID[732]:IPMMUDS009*/ + [696] = {0xE7752240U, 0x0000000CU}, /* RGIDR_MODID[733]:SYDM100*/ + [697] = {0xE7752244U, 0x0000000CU}, /* RGIDR_MODID[734]:SYDM101*/ + [698] = {0xE7752248U, 0x0000000CU}, /* RGIDR_MODID[735]:SYDM110*/ + [699] = {0xE775224CU, 0x0000000CU}, /* RGIDR_MODID[736]:SYDM111*/ + [700] = {0xE7752250U, 0x0000000CU}, /* RGIDR_MODID[737]:SYDM112*/ + [701] = {0xE7752254U, 0x0000000CU}, /* RGIDR_MODID[738]:SYDM113*/ + [702] = {0xE7752258U, 0x0000000CU}, /* RGIDR_MODID[739]:SYDM114*/ + [703] = {0xE775225CU, 0x0000000CU}, /* RGIDR_MODID[740]:SYDM115*/ + [704] = {0xE7752260U, 0x0000000CU}, /* RGIDR_MODID[741]:SYDM102*/ + [705] = {0xE7752264U, 0x0000000CU}, /* RGIDR_MODID[742]:SYDM103*/ + [706] = {0xE7752268U, 0x0000000CU}, /* RGIDR_MODID[743]:SYDM104*/ + [707] = {0xE775226CU, 0x0000000CU}, /* RGIDR_MODID[744]:SYDM105*/ + [708] = {0xE7752270U, 0x0000000CU}, /* RGIDR_MODID[745]:SYDM106*/ + [709] = {0xE7752274U, 0x0000000CU}, /* RGIDR_MODID[746]:SYDM107*/ + [710] = {0xE7752278U, 0x0000000CU}, /* RGIDR_MODID[747]:SYDM108*/ + [711] = {0xE775227CU, 0x0000000CU}, /* RGIDR_MODID[748]:SYDM109*/ + [712] = {0xE7752280U, 0x0000000CU}, /* RGIDR_MODID[749]:SYDM200*/ + [713] = {0xE7752284U, 0x0000000CU}, /* RGIDR_MODID[750]:SYDM201*/ + [714] = {0xE7752288U, 0x0000000CU}, /* RGIDR_MODID[751]:SYDM210*/ + [715] = {0xE775228CU, 0x0000000CU}, /* RGIDR_MODID[752]:SYDM211*/ + [716] = {0xE7752290U, 0x0000000CU}, /* RGIDR_MODID[753]:SYDM212*/ + [717] = {0xE7752294U, 0x0000000CU}, /* RGIDR_MODID[754]:SYDM213*/ + [718] = {0xE7752298U, 0x0000000CU}, /* RGIDR_MODID[755]:SYDM214*/ + [719] = {0xE775229CU, 0x0000000CU}, /* RGIDR_MODID[756]:SYDM215*/ + [720] = {0xE77522A0U, 0x0000000CU}, /* RGIDR_MODID[757]:SYDM202*/ + [721] = {0xE77522A4U, 0x0000000CU}, /* RGIDR_MODID[758]:SYDM203*/ + [722] = {0xE77522A8U, 0x0000000CU}, /* RGIDR_MODID[759]:SYDM204*/ + [723] = {0xE77522ACU, 0x0000000CU}, /* RGIDR_MODID[760]:SYDM205*/ + [724] = {0xE77522B0U, 0x0000000CU}, /* RGIDR_MODID[761]:SYDM206*/ + [725] = {0xE77522B4U, 0x0000000CU}, /* RGIDR_MODID[762]:SYDM207*/ + [726] = {0xE77522B8U, 0x0000000CU}, /* RGIDR_MODID[763]:SYDM208*/ + [727] = {0xE77522BCU, 0x0000000CU}, /* RGIDR_MODID[764]:SYDM209*/ + [728] = {0xFE682000U, 0x0000000FU}, /* RGIDR_MODID[765]:ARVC0*/ + /* After setting */ /* RGIDR_MODID[766]:ARVC1*/ + /* After setting */ /* RGIDR_MODID[767]:ARVC2*/ + [729] = {0xFE68200CU, 0x0000000FU}, /* RGIDR_MODID[768]:ARVC3*/ + [730] = {0xFE682010U, 0x0000000EU}, /* RGIDR_MODID[769]:AXIFBABUSVC*/ + [731] = {0xFE682014U, 0x0000000FU}, /* RGIDR_MODID[770]:ARVC4*/ + [732] = {0xFE682018U, 0x0000000FU}, /* RGIDR_MODID[771]:ARVC5*/ + [733] = {0xFE68201CU, 0x0000000FU}, /* RGIDR_MODID[772]:ARVC6*/ + [734] = {0xFE682020U, 0x0000000FU}, /* RGIDR_MODID[773]:ARVC7*/ + [735] = {0xFE682024U, 0x00000000U}, /* RGIDR_MODID[774]:ARVC8*/ + [736] = {0xFE682028U, 0x0000000AU}, /* RGIDR_MODID[775]:CKMVC*/ + [737] = {0xFE68202CU, 0x0000000FU}, /* RGIDR_MODID[776]:ECMVC0*/ + [738] = {0xFE682030U, 0x0000004EU}, /* RGIDR_MODID[777]:IMR2*/ + [739] = {0xFE682034U, 0x0000004EU}, /* RGIDR_MODID[778]:IMR0*/ + [740] = {0xFE682038U, 0x0000004EU}, /* RGIDR_MODID[779]:IMR1*/ + [741] = {0xFE68203CU, 0x0000004EU}, /* RGIDR_MODID[780]:IPMMUVC01*/ + [742] = {0xFE682040U, 0x0000004EU}, /* RGIDR_MODID[781]:IPMMUVC10*/ + [743] = {0xFE682044U, 0x0000000CU}, /* RGIDR_MODID[782]:IMS0*/ + [744] = {0xFE682048U, 0x0000000CU}, /* RGIDR_MODID[783]:IMS1*/ + [745] = {0xFE68204CU, 0x0000004EU}, /* RGIDR_MODID[784]:IPMMUVC00*/ + [746] = {0xFE682050U, 0x0000004EU}, /* RGIDR_MODID[785]:IPMMUVC11*/ + [747] = {0xFE682054U, 0x0000004EU}, /* RGIDR_MODID[786]:IPMMUVC12*/ + [748] = {0xFE682058U, 0x0000004EU}, /* RGIDR_MODID[787]:IPMMUVC13*/ + [749] = {0xFE68205CU, 0x0000004EU}, /* RGIDR_MODID[788]:IPMMUVC14*/ + [750] = {0xFE682060U, 0x0000004EU}, /* RGIDR_MODID[789]:IPMMUVC15*/ + [751] = {0xFE682064U, 0x0000004EU}, /* RGIDR_MODID[790]:IPMMUVC02*/ + [752] = {0xFE682068U, 0x0000004EU}, /* RGIDR_MODID[791]:IPMMUVC03*/ + [753] = {0xFE68206CU, 0x0000004EU}, /* RGIDR_MODID[792]:IPMMUVC04*/ + [754] = {0xFE682070U, 0x0000004EU}, /* RGIDR_MODID[793]:IPMMUVC05*/ + [755] = {0xFE682074U, 0x0000004EU}, /* RGIDR_MODID[794]:IPMMUVC06*/ + [756] = {0xFE682078U, 0x0000004EU}, /* RGIDR_MODID[795]:IPMMUVC07*/ + [757] = {0xFE68207CU, 0x0000004EU}, /* RGIDR_MODID[796]:IPMMUVC08*/ + [758] = {0xFE682080U, 0x0000004EU}, /* RGIDR_MODID[797]:IPMMUVC09*/ + [759] = {0xFE682084U, 0x00000028U}, /* RGIDR_MODID[798]:IV1ES*/ + [760] = {0xFEBE2000U, 0x0000004EU}, /* RGIDR_MODID[799]:CSITOP0*/ + [761] = {0xFEBE2004U, 0x0000000FU}, /* RGIDR_MODID[800]:ARVI10*/ + /* After setting */ /* RGIDR_MODID[801]:ARVI11*/ + /* After setting */ /* RGIDR_MODID[802]:ARVI12*/ + [762] = {0xFEBE2010U, 0x0000000FU}, /* RGIDR_MODID[803]:ARVI13*/ + [763] = {0xFEBE2014U, 0x0000000FU}, /* RGIDR_MODID[804]:ARVI14*/ + [764] = {0xFEBE2018U, 0x0000000FU}, /* RGIDR_MODID[805]:ARVI15*/ + [765] = {0xFEBE201CU, 0x0000000FU}, /* RGIDR_MODID[806]:ARVI16*/ + [766] = {0xFEBE2020U, 0x0000000FU}, /* RGIDR_MODID[807]:ARVI17*/ + [767] = {0xFEBE2024U, 0x00000000U}, /* RGIDR_MODID[808]:ARVI18*/ + [768] = {0xFEBE2028U, 0x0000000AU}, /* RGIDR_MODID[809]:CKMVIO*/ + [769] = {0xFEBE202CU, 0x0000004EU}, /* RGIDR_MODID[810]:CSITOP1*/ + [770] = {0xFEBE2034U, 0x0000004EU}, /* RGIDR_MODID[811]:DSITLINK0*/ + [771] = {0xFEBE2038U, 0x0000004EU}, /* RGIDR_MODID[812]:DSITLINK1*/ + [772] = {0xFEBE203CU, 0x0000000FU}, /* RGIDR_MODID[813]:ECMVIO1*/ + [773] = {0xFEBE2044U, 0x0000004EU}, /* RGIDR_MODID[814]:IPMMUVI001*/ + [774] = {0xFEBE2048U, 0x0000000CU}, /* RGIDR_MODID[815]:FCPVX0*/ + [775] = {0xFEBE204CU, 0x0000000CU}, /* RGIDR_MODID[816]:FCPVX1*/ + [776] = {0xFEBE2058U, 0x0000004EU}, /* RGIDR_MODID[817]:IPMMUVI000*/ + [777] = {0xFEBE205CU, 0x0000004EU}, /* RGIDR_MODID[818]:IPMMUVI100*/ + [778] = {0xFEBE2060U, 0x0000004EU}, /* RGIDR_MODID[819]:IPMMUVI010*/ + [779] = {0xFEBE2064U, 0x0000004EU}, /* RGIDR_MODID[820]:IPMMUVI011*/ + [780] = {0xFEBE2068U, 0x0000004EU}, /* RGIDR_MODID[821]:VSPX0*/ + [781] = {0xFEBE206CU, 0x0000004EU}, /* RGIDR_MODID[822]:VSPX1*/ + [782] = {0xFEBE2078U, 0x0000004EU}, /* RGIDR_MODID[823]:IPMMUVI012*/ + [783] = {0xFEBE207CU, 0x0000004EU}, /* RGIDR_MODID[824]:IPMMUVI013*/ + [784] = {0xFEBE2080U, 0x0000004EU}, /* RGIDR_MODID[825]:IPMMUVI014*/ + [785] = {0xFEBE2084U, 0x0000004EU}, /* RGIDR_MODID[826]:IPMMUVI015*/ + [786] = {0xFEBE2088U, 0x0000004EU}, /* RGIDR_MODID[827]:IPMMUVI002*/ + [787] = {0xFEBE208CU, 0x0000004EU}, /* RGIDR_MODID[828]:IPMMUVI003*/ + [788] = {0xFEBE2090U, 0x0000004EU}, /* RGIDR_MODID[829]:IPMMUVI004*/ + [789] = {0xFEBE2094U, 0x0000004EU}, /* RGIDR_MODID[830]:IPMMUVI005*/ + [790] = {0xFEBE2098U, 0x0000004EU}, /* RGIDR_MODID[831]:IPMMUVI006*/ + [791] = {0xFEBE209CU, 0x0000004EU}, /* RGIDR_MODID[832]:IPMMUVI007*/ + [792] = {0xFEBE20A0U, 0x0000004EU}, /* RGIDR_MODID[833]:IPMMUVI008*/ + [793] = {0xFEBE20A4U, 0x0000004EU}, /* RGIDR_MODID[834]:IPMMUVI009*/ + [794] = {0xFEBE20A8U, 0x0000004EU}, /* RGIDR_MODID[835]:IPMMUVI101*/ + [795] = {0xFEBE20ACU, 0x0000004EU}, /* RGIDR_MODID[836]:IPMMUVI110*/ + [796] = {0xFEBE20B0U, 0x0000004EU}, /* RGIDR_MODID[837]:IPMMUVI111*/ + [797] = {0xFEBE20B4U, 0x0000004EU}, /* RGIDR_MODID[838]:IPMMUVI112*/ + [798] = {0xFEBE20B8U, 0x0000004EU}, /* RGIDR_MODID[839]:IPMMUVI113*/ + [799] = {0xFEBE20BCU, 0x0000004EU}, /* RGIDR_MODID[840]:IPMMUVI114*/ + [800] = {0xFEBE20C0U, 0x0000004EU}, /* RGIDR_MODID[841]:IPMMUVI115*/ + [801] = {0xFEBE20C4U, 0x0000004EU}, /* RGIDR_MODID[842]:IPMMUVI102*/ + [802] = {0xFEBE20C8U, 0x0000004EU}, /* RGIDR_MODID[843]:IPMMUVI103*/ + [803] = {0xFEBE20CCU, 0x0000004EU}, /* RGIDR_MODID[844]:IPMMUVI104*/ + [804] = {0xFEBE20D0U, 0x0000004EU}, /* RGIDR_MODID[845]:IPMMUVI105*/ + [805] = {0xFEBE20D4U, 0x0000004EU}, /* RGIDR_MODID[846]:IPMMUVI106*/ + [806] = {0xFEBE20D8U, 0x0000004EU}, /* RGIDR_MODID[847]:IPMMUVI107*/ + [807] = {0xFEBE20DCU, 0x0000004EU}, /* RGIDR_MODID[848]:IPMMUVI108*/ + [808] = {0xFEBE20E0U, 0x0000004EU}, /* RGIDR_MODID[849]:IPMMUVI109*/ + [809] = {0xFEBE2104U, 0x0000000EU}, /* RGIDR_MODID[850]:AXIFBABUSVIO*/ + [810] = {0xFEBF2000U, 0x0000000FU}, /* RGIDR_MODID[851]:ARVI0*/ + /* After setting */ /* RGIDR_MODID[852]:ARVI1*/ + /* After setting */ /* RGIDR_MODID[853]:ARVI2*/ + [811] = {0xFEBF200CU, 0x0000000FU}, /* RGIDR_MODID[854]:ARVI3*/ + [812] = {0xFEBF2010U, 0x0000000FU}, /* RGIDR_MODID[855]:ARVI4*/ + [813] = {0xFEBF2014U, 0x0000000FU}, /* RGIDR_MODID[856]:ARVI5*/ + [814] = {0xFEBF2018U, 0x0000000FU}, /* RGIDR_MODID[857]:ARVI6*/ + [815] = {0xFEBF201CU, 0x0000000FU}, /* RGIDR_MODID[858]:ARVI7*/ + [816] = {0xFEBF2020U, 0x00000000U}, /* RGIDR_MODID[859]:ARVI8*/ + [817] = {0xFEBF2024U, 0x0000000FU}, /* RGIDR_MODID[860]:ECMVIO0*/ + [818] = {0xFEBF2028U, 0x0000004EU}, /* RGIDR_MODID[861]:ISP0*/ + [819] = {0xFEBF202CU, 0x0000004EU}, /* RGIDR_MODID[862]:ISP0CORE*/ + [820] = {0xFEBF2030U, 0x0000004EU}, /* RGIDR_MODID[863]:ISP1*/ + [821] = {0xFEBF2034U, 0x0000004EU}, /* RGIDR_MODID[864]:ISP1CORE*/ + [822] = {0xFEBF2054U, 0x0000004EU}, /* RGIDR_MODID[865]:VIN00*/ + [823] = {0xFEBF2058U, 0x0000004EU}, /* RGIDR_MODID[866]:VIN01*/ + [824] = {0xFEBF205CU, 0x0000004EU}, /* RGIDR_MODID[867]:VIN02*/ + [825] = {0xFEBF2060U, 0x0000004EU}, /* RGIDR_MODID[868]:VIN03*/ + [826] = {0xFEBF2064U, 0x0000004EU}, /* RGIDR_MODID[869]:VIN04*/ + [827] = {0xFEBF2068U, 0x0000004EU}, /* RGIDR_MODID[870]:VIN05*/ + [828] = {0xFEBF206CU, 0x0000004EU}, /* RGIDR_MODID[871]:VIN06*/ + [829] = {0xFEBF2070U, 0x0000004EU}, /* RGIDR_MODID[872]:VIN07*/ + [830] = {0xFEBF2074U, 0x0000004EU}, /* RGIDR_MODID[873]:VIN10*/ + [831] = {0xFEBF2078U, 0x0000004EU}, /* RGIDR_MODID[874]:VIN11*/ + [832] = {0xFEBF207CU, 0x0000004EU}, /* RGIDR_MODID[875]:VIN12*/ + [833] = {0xFEBF2080U, 0x0000004EU}, /* RGIDR_MODID[876]:VIN13*/ + [834] = {0xFEBF2084U, 0x0000004EU}, /* RGIDR_MODID[877]:VIN14*/ + [835] = {0xFEBF2088U, 0x0000004EU}, /* RGIDR_MODID[878]:VIN15*/ + [836] = {0xFEBF208CU, 0x0000004EU}, /* RGIDR_MODID[879]:VIN16*/ + [837] = {0xFEBF2090U, 0x0000004EU}, /* RGIDR_MODID[880]:VIN17*/ + [838] = {0xE7B12000U, 0x0000000FU}, /* RGIDR_MODID[881]:ARVIP00*/ + /* After setting */ /* RGIDR_MODID[882]:ARVIP01*/ + /* After setting */ /* RGIDR_MODID[883]:ARVIP02*/ + [839] = {0xE7B1200CU, 0x0000000FU}, /* RGIDR_MODID[884]:ARVIP03*/ + [840] = {0xE7B12010U, 0x0000000EU}, /* RGIDR_MODID[885]:AXIFBABUSVIP0*/ + [841] = {0xE7B12014U, 0x0000000FU}, /* RGIDR_MODID[886]:ARVIP04*/ + [842] = {0xE7B12018U, 0x0000000FU}, /* RGIDR_MODID[887]:ARVIP05*/ + [843] = {0xE7B1201CU, 0x0000000FU}, /* RGIDR_MODID[888]:ARVIP06*/ + [844] = {0xE7B12020U, 0x00000007U}, /* RGIDR_MODID[889]:ARVIP07*/ + [845] = {0xE7B12024U, 0x00000000U}, /* RGIDR_MODID[890]:ARVIP08*/ + [846] = {0xE7B12028U, 0x0000000AU}, /* RGIDR_MODID[891]:CKMVIP*/ + [847] = {0xE7B1202CU, 0x0000000FU}, /* RGIDR_MODID[892]:ECMVIP0*/ + [848] = {0xE7B12030U, 0x0000004EU}, /* RGIDR_MODID[893]:IPMMUVIP000*/ + [849] = {0xE7B12038U, 0x0000004EU}, /* RGIDR_MODID[894]:SMPO0*/ + [850] = {0xE7B1203CU, 0x0000004EU}, /* RGIDR_MODID[895]:SMPS0*/ + [851] = {0xE7B12040U, 0x0000000CU}, /* RGIDR_MODID[896]:UMFL0*/ + [852] = {0xE7B12044U, 0x0000004EU}, /* RGIDR_MODID[897]:IPMMUVIP001*/ + [853] = {0xE7B12048U, 0x0000004EU}, /* RGIDR_MODID[898]:IPMMUVIP010*/ + [854] = {0xE7B1204CU, 0x0000004EU}, /* RGIDR_MODID[899]:IPMMUVIP011*/ + [855] = {0xE7B12050U, 0x0000004EU}, /* RGIDR_MODID[900]:UMFL0M_W*/ + [856] = {0xE7B12054U, 0x0000004EU}, /* RGIDR_MODID[901]:IPMMUVIP012*/ + [857] = {0xE7B12058U, 0x0000004EU}, /* RGIDR_MODID[902]:IPMMUVIP013*/ + [858] = {0xE7B1205CU, 0x0000004EU}, /* RGIDR_MODID[903]:IPMMUVIP014*/ + [859] = {0xE7B12060U, 0x0000004EU}, /* RGIDR_MODID[904]:IPMMUVIP015*/ + [860] = {0xE7B12064U, 0x0000004EU}, /* RGIDR_MODID[905]:IPMMUVIP002*/ + [861] = {0xE7B12068U, 0x0000004EU}, /* RGIDR_MODID[906]:IPMMUVIP003*/ + [862] = {0xE7B1206CU, 0x0000004EU}, /* RGIDR_MODID[907]:IPMMUVIP004*/ + [863] = {0xE7B12070U, 0x0000004EU}, /* RGIDR_MODID[908]:IPMMUVIP005*/ + [864] = {0xE7B12074U, 0x0000004EU}, /* RGIDR_MODID[909]:IPMMUVIP006*/ + [865] = {0xE7B12078U, 0x0000004EU}, /* RGIDR_MODID[910]:IPMMUVIP007*/ + [866] = {0xE7B1207CU, 0x0000004EU}, /* RGIDR_MODID[911]:IPMMUVIP008*/ + [867] = {0xE7B12080U, 0x0000004EU}, /* RGIDR_MODID[912]:IPMMUVIP009*/ + [868] = {0xE7B42000U, 0x0000000FU}, /* RGIDR_MODID[913]:ARVIP10*/ + /* After setting */ /* RGIDR_MODID[914]:ARVIP11*/ + /* After setting */ /* RGIDR_MODID[915]:ARVIP12*/ + [869] = {0xE7B4200CU, 0x0000000FU}, /* RGIDR_MODID[916]:ARVIP13*/ + [870] = {0xE7B42010U, 0x0000000EU}, /* RGIDR_MODID[917]:AXIFBABUSVIP1*/ + [871] = {0xE7B42014U, 0x0000000FU}, /* RGIDR_MODID[918]:ARVIIP14*/ + [872] = {0xE7B42018U, 0x0000000FU}, /* RGIDR_MODID[919]:ARVIIP15*/ + [873] = {0xE7B4201CU, 0x0000000FU}, /* RGIDR_MODID[920]:ARVIIP16*/ + [874] = {0xE7B42020U, 0x0000000FU}, /* RGIDR_MODID[921]:ARVIIP17*/ + [875] = {0xE7B42024U, 0x00000000U}, /* RGIDR_MODID[922]:ARVIIP18*/ + [876] = {0xE7B42038U, 0x0000000FU}, /* RGIDR_MODID[923]:ECMVIP1*/ + [877] = {0xE7B4203CU, 0x0000004EU}, /* RGIDR_MODID[924]:IPMMUVIP101*/ + [878] = {0xE7B42040U, 0x0000004EU}, /* RGIDR_MODID[925]:IPMMUVIP100*/ + [879] = {0xE7B42044U, 0x0000004EU}, /* RGIDR_MODID[926]:IPMMUVIP110*/ + [880] = {0xE7B42048U, 0x0000004EU}, /* RGIDR_MODID[927]:IPMMUVIP111*/ + [881] = {0xE7B4204CU, 0x0000004EU}, /* RGIDR_MODID[928]:IPMMUVIP112*/ + [882] = {0xE7B42050U, 0x0000004EU}, /* RGIDR_MODID[929]:IPMMUVIP113*/ + [883] = {0xE7B42054U, 0x0000004EU}, /* RGIDR_MODID[930]:IPMMUVIP114*/ + [884] = {0xE7B42058U, 0x0000004EU}, /* RGIDR_MODID[931]:IPMMUVIP115*/ + [885] = {0xE7B4205CU, 0x0000004EU}, /* RGIDR_MODID[932]:IPMMUVIP102*/ + [886] = {0xE7B42060U, 0x0000004EU}, /* RGIDR_MODID[933]:IPMMUVIP103*/ + [887] = {0xE7B42064U, 0x0000004EU}, /* RGIDR_MODID[934]:IPMMUVIP104*/ + [888] = {0xE7B42068U, 0x0000004EU}, /* RGIDR_MODID[935]:IPMMUVIP105*/ + [889] = {0xE7B4206CU, 0x0000004EU}, /* RGIDR_MODID[936]:IPMMUVIP106*/ + [890] = {0xE7B42070U, 0x0000004EU}, /* RGIDR_MODID[937]:IPMMUVIP107*/ + [891] = {0xE7B42074U, 0x0000004EU}, /* RGIDR_MODID[938]:IPMMUVIP108*/ + [892] = {0xE7B42078U, 0x0000004EU}, /* RGIDR_MODID[939]:IPMMUVIP109*/ + [893] = {0xE7B42118U, 0x00000004U}, /* RGIDR_MODID[940]:PAP*/ + [894] = {0xEB802000U, 0x0000000FU}, /* RGIDR_MODID[941]:ARDSP0*/ + /* After setting */ /* RGIDR_MODID[942]:ARDSP1*/ + /* After setting */ /* RGIDR_MODID[943]:ARDSP2*/ + [895] = {0xEB80200CU, 0x0000000FU}, /* RGIDR_MODID[944]:ARDSP3*/ + [896] = {0xEB802010U, 0x0000000FU}, /* RGIDR_MODID[945]:ARDSP4*/ + [897] = {0xEB802014U, 0x0000000FU}, /* RGIDR_MODID[946]:ARDSP5*/ + [898] = {0xEB802018U, 0x0000000FU}, /* RGIDR_MODID[947]:ARDSP6*/ + [899] = {0xEB80201CU, 0x0000000FU}, /* RGIDR_MODID[948]:ARDSP7*/ + [900] = {0xEB802020U, 0x0000000FU}, /* RGIDR_MODID[949]:ECMDSP*/ + [901] = {0xEB802024U, 0x0000000CU}, /* RGIDR_MODID[950]:AXIDSP0*/ + [902] = {0xEB802028U, 0x0000000CU}, /* RGIDR_MODID[951]:AXIDSP1*/ + [903] = {0xEB80202CU, 0x0000000CU}, /* RGIDR_MODID[952]:AXIDSP2*/ + [904] = {0xEB802030U, 0x0000000CU}, /* RGIDR_MODID[953]:AXIDSP3*/ + [906] = {0xE67B9660U, 0x0000000FU}, /* RGIDR_MODID[954]:ARCC*/ + [905] = {0xE67B9674U, 0x0000000FU}, /* RGIDR_MODID[955]:ARRTRAM*/ + [907] = {0xE7752024U, 0x00000000U}, /* RGIDR_MODID[956]:RSV0*/ + [908] = {0xFEBD2028U, 0x0000000CU}, /* RGIDR_MODID[957]:DOC*/ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_w_tbl" +const REGION_ID_SETTING_TABLE g_rgid_w_tbl[] = { + [0] = {0xFFC82400U, 0x0000000EU}, /* RGIDW_MODID[0]:ARMGC0*/ + [1] = {0xFFC82404U, 0x0000000EU}, /* RGIDW_MODID[1]:ARMGC1*/ + [2] = {0xFFC82408U, 0x00000000U}, /* RGIDW_MODID[2]:ARMGC2*/ + [3] = {0xFFC8240CU, 0x00000002U}, /* RGIDW_MODID[3]:ARRT00*/ + /* After setting */ /* RGIDW_MODID[4]:ARRT01*/ + /* After setting */ /* RGIDW_MODID[5]:ARRT02*/ + [4] = {0xFFC82418U, 0x00000001U}, /* RGIDW_MODID[6]:ARRT03*/ + [5] = {0xFFC8241CU, 0x00000002U}, /* RGIDW_MODID[7]:ARRT04*/ + [6] = {0xFFC82420U, 0x00000001U}, /* RGIDW_MODID[8]:ARRT05*/ + [7] = {0xFFC82424U, 0x00000002U}, /* RGIDW_MODID[9]:ARRT06*/ + [8] = {0xFFC82428U, 0x00000002U}, /* RGIDW_MODID[10]:ARRT07*/ + [9] = {0xFFC8242CU, 0x00000000U}, /* RGIDW_MODID[11]:ARRT08*/ + [10] = {0xFFC82430U, 0x00000001U}, /* RGIDW_MODID[12]:LIFEC0*/ + [11] = {0xFFC82434U, 0x0000000EU}, /* RGIDW_MODID[13]:SWDT*/ + [12] = {0xFFC82438U, 0x0000006EU}, /* RGIDW_MODID[14]:TMU0*/ + [13] = {0xFFC8243CU, 0x0000000EU}, /* RGIDW_MODID[15]:WDT*/ + [14] = {0xFFC82440U, 0x0000000EU}, /* RGIDW_MODID[16]:WWDT0*/ + [15] = {0xFFC82444U, 0x0000000EU}, /* RGIDW_MODID[17]:WWDT1*/ + [16] = {0xFFC82448U, 0x0000000EU}, /* RGIDW_MODID[18]:WWDT2*/ + [17] = {0xFFC8244CU, 0x0000000EU}, /* RGIDW_MODID[19]:WWDT3*/ + [18] = {0xFFC82450U, 0x0000000EU}, /* RGIDW_MODID[20]:WWDT4*/ + [19] = {0xFFC82454U, 0x0000000EU}, /* RGIDW_MODID[21]:WWDT5*/ + [20] = {0xFFC82458U, 0x0000000EU}, /* RGIDW_MODID[22]:WWDT6*/ + [21] = {0xFFC82468U, 0x0000000AU}, /* RGIDW_MODID[23]:ECMRT3*/ + [22] = {0xE6002400U, 0x00000006U}, /* RGIDW_MODID[24]:ADVFSC*/ + [23] = {0xE6002404U, 0x0000000FU}, /* RGIDW_MODID[25]:APMU0*/ + [24] = {0xE6002408U, 0x00000002U}, /* RGIDW_MODID[26]:APMU1*/ + [25] = {0xE600240CU, 0x00000000U}, /* RGIDW_MODID[27]:APMU10*/ + [26] = {0xE6002410U, 0x00000000U}, /* RGIDW_MODID[28]:APMU11*/ + [27] = {0xE6002414U, 0x00000000U}, /* RGIDW_MODID[29]:APMU12*/ + [28] = {0xE6002418U, 0x00000000U}, /* RGIDW_MODID[30]:APMU13*/ + [29] = {0xE600241CU, 0x00000000U}, /* RGIDW_MODID[31]:APMU14*/ + [30] = {0xE6002420U, 0x00000000U}, /* RGIDW_MODID[32]:APMU15*/ + [31] = {0xE6002424U, 0x00000004U}, /* RGIDW_MODID[33]:APMU2*/ + [32] = {0xE6002428U, 0x00000004U}, /* RGIDW_MODID[34]:APMU3*/ + [33] = {0xE600242CU, 0x00000000U}, /* RGIDW_MODID[35]:APMU4*/ + [34] = {0xE6002430U, 0x00000000U}, /* RGIDW_MODID[36]:APMU5*/ + [35] = {0xE6002434U, 0x00000000U}, /* RGIDW_MODID[37]:APMU6*/ + [36] = {0xE6002438U, 0x00000000U}, /* RGIDW_MODID[38]:APMU7*/ + [37] = {0xE600243CU, 0x00000000U}, /* RGIDW_MODID[39]:APMU8*/ + [38] = {0xE6002440U, 0x00000000U}, /* RGIDW_MODID[40]:APMU9*/ + [39] = {0xE6002444U, 0x00000002U}, /* RGIDW_MODID[41]:ARS00*/ + /* After setting */ /* RGIDW_MODID[42]:ARS01*/ + /* After setting */ /* RGIDW_MODID[43]:ARS02*/ + [40] = {0xE6002450U, 0x00000001U}, /* RGIDW_MODID[44]:ARS03*/ + [41] = {0xE6002454U, 0x00000002U}, /* RGIDW_MODID[45]:ARS04*/ + [42] = {0xE6002458U, 0x00000001U}, /* RGIDW_MODID[46]:ARS05*/ + [43] = {0xE600245CU, 0x00000002U}, /* RGIDW_MODID[47]:ARS06*/ + [44] = {0xE6002460U, 0x00000002U}, /* RGIDW_MODID[48]:ARS07*/ + [45] = {0xE6002464U, 0x00000000U}, /* RGIDW_MODID[49]:ARS08*/ + [46] = {0xE6002468U, 0x0000000EU}, /* RGIDW_MODID[50]:CMT0*/ + [47] = {0xE600246CU, 0x0000000EU}, /* RGIDW_MODID[51]:CMT1*/ + [48] = {0xE6002470U, 0x0000000EU}, /* RGIDW_MODID[52]:CMT2*/ + [49] = {0xE6002474U, 0x0000000EU}, /* RGIDW_MODID[53]:CMT3*/ + [50] = {0xE6002478U, 0x0000000AU}, /* RGIDW_MODID[54]:CKM*/ + [51] = {0xE600247CU, 0x0000000EU}, /* RGIDW_MODID[55]:DBE*/ + [52] = {0xE6002480U, 0x0000000EU}, /* RGIDW_MODID[56]:IRQC*/ + [53] = {0xE6002484U, 0x0000000AU}, /* RGIDW_MODID[57]:ECMPS0*/ + [54] = {0xE6002488U, 0x0000000BU}, /* RGIDW_MODID[58]:OTP0*/ + [55] = {0xE600248CU, 0x0000000FU}, /* RGIDW_MODID[59]:OTP1*/ + [56] = {0xE600249CU, 0x0000000EU}, /* RGIDW_MODID[60]:SCMT*/ + [57] = {0xE60024A8U, 0x0000004AU}, /* RGIDW_MODID[61]:TSC1*/ + [58] = {0xE60024ACU, 0x0000004AU}, /* RGIDW_MODID[62]:TSC2*/ + [59] = {0xE60024B0U, 0x0000004AU}, /* RGIDW_MODID[63]:TSC3*/ + [60] = {0xE60024B4U, 0x0000004AU}, /* RGIDW_MODID[64]:TSC4*/ + [61] = {0xE60024B8U, 0x00000006U}, /* RGIDW_MODID[65]:UCMT*/ + [62] = {0xE6002500U, 0x0000006FU}, /* RGIDW_MODID[66]:CPG0*/ + [63] = {0xE6002504U, 0x0000000AU}, /* RGIDW_MODID[67]:CPG1*/ + [64] = {0xE6002508U, 0x0000004EU}, /* RGIDW_MODID[68]:CPG2*/ + [65] = {0xE600250CU, 0x00000028U}, /* RGIDW_MODID[69]:CPG3*/ + [66] = {0xE6002510U, 0x0000006FU}, /* RGIDW_MODID[70]:PFC00*/ + [67] = {0xE6002514U, 0x0000000AU}, /* RGIDW_MODID[71]:PFC01*/ + [68] = {0xE6002518U, 0x0000004EU}, /* RGIDW_MODID[72]:PFC02*/ + [69] = {0xE600251CU, 0x00000028U}, /* RGIDW_MODID[73]:PFC03*/ + [70] = {0xE6002520U, 0x0000006FU}, /* RGIDW_MODID[74]:PFC10*/ + [71] = {0xE6002524U, 0x0000000AU}, /* RGIDW_MODID[75]:PFC11*/ + [72] = {0xE6002528U, 0x0000004EU}, /* RGIDW_MODID[76]:PFC12*/ + [73] = {0xE600252CU, 0x00000028U}, /* RGIDW_MODID[77]:PFC13*/ + [74] = {0xE6002530U, 0x0000006FU}, /* RGIDW_MODID[78]:PFC20*/ + [75] = {0xE6002534U, 0x0000000AU}, /* RGIDW_MODID[79]:PFC21*/ + [76] = {0xE6002538U, 0x0000004EU}, /* RGIDW_MODID[80]:PFC22*/ + [77] = {0xE600253CU, 0x00000028U}, /* RGIDW_MODID[81]:PFC23*/ + [78] = {0xE6002540U, 0x0000006FU}, /* RGIDW_MODID[82]:PFC30*/ + [79] = {0xE6002544U, 0x0000000AU}, /* RGIDW_MODID[83]:PFC31*/ + [80] = {0xE6002548U, 0x0000004EU}, /* RGIDW_MODID[84]:PFC32*/ + [81] = {0xE600254CU, 0x00000028U}, /* RGIDW_MODID[85]:PFC33*/ + [82] = {0xE6002550U, 0x0000006FU}, /* RGIDW_MODID[86]:PFCS0*/ + [83] = {0xE6002554U, 0x0000000AU}, /* RGIDW_MODID[87]:PFCS1*/ + [84] = {0xE6002558U, 0x0000004EU}, /* RGIDW_MODID[88]:PFCS2*/ + [85] = {0xE600255CU, 0x00000028U}, /* RGIDW_MODID[89]:PFCS3*/ + [86] = {0xE6002560U, 0x0000006FU}, /* RGIDW_MODID[90]:RESET0*/ + [87] = {0xE6002564U, 0x0000000AU}, /* RGIDW_MODID[91]:RESET1*/ + [88] = {0xE6002568U, 0x0000004EU}, /* RGIDW_MODID[92]:RESET2*/ + [89] = {0xE600256CU, 0x00000028U}, /* RGIDW_MODID[93]:RESET3*/ + [90] = {0xE6002570U, 0x0000006FU}, /* RGIDW_MODID[94]:SYS0*/ + [91] = {0xE6002574U, 0x0000000AU}, /* RGIDW_MODID[95]:SYS1*/ + [92] = {0xE6002578U, 0x0000004EU}, /* RGIDW_MODID[96]:SYS2*/ + [93] = {0xE600257CU, 0x00000028U}, /* RGIDW_MODID[97]:SYS3*/ + [94] = {0xE7762400U, 0x0000000EU}, /* RGIDW_MODID[98]:DMAMSI0*/ + [95] = {0xE7762404U, 0x0000000EU}, /* RGIDW_MODID[99]:DMAMSI1*/ + [96] = {0xE7762408U, 0x0000000EU}, /* RGIDW_MODID[100]:DMAMSI2*/ + [97] = {0xE776240CU, 0x0000000EU}, /* RGIDW_MODID[101]:DMAMSI3*/ + [98] = {0xE7762410U, 0x0000000EU}, /* RGIDW_MODID[102]:DMAMSI4*/ + [99] = {0xE7762414U, 0x0000000EU}, /* RGIDW_MODID[103]:DMAMSI5*/ + [100] = {0xE7762418U, 0x0000000AU}, /* RGIDW_MODID[104]:ECMSP3*/ + [101] = {0xE7762424U, 0x00000002U}, /* RGIDW_MODID[105]:ARSP30*/ + /* After setting */ /* RGIDW_MODID[106]:ARSP31*/ + /* After setting */ /* RGIDW_MODID[107]:ARSP32*/ + [102] = {0xE7762430U, 0x00000001U}, /* RGIDW_MODID[108]:ARSP33*/ + [103] = {0xE7762434U, 0x00000002U}, /* RGIDW_MODID[109]:ARSP34*/ + [104] = {0xE7762438U, 0x00000001U}, /* RGIDW_MODID[110]:ARSP35*/ + [105] = {0xE776243CU, 0x00000002U}, /* RGIDW_MODID[111]:ARSP36*/ + [106] = {0xE7762440U, 0x00000002U}, /* RGIDW_MODID[112]:ARSP37*/ + [107] = {0xE7762444U, 0x00000000U}, /* RGIDW_MODID[113]:ARSP38*/ + [108] = {0xE7762448U, 0x0000000EU}, /* RGIDW_MODID[114]:MSI0*/ + [109] = {0xE776244CU, 0x0000000EU}, /* RGIDW_MODID[115]:MSI1*/ + [110] = {0xE7762450U, 0x0000000EU}, /* RGIDW_MODID[116]:MSI2*/ + [111] = {0xE7762454U, 0x0000000EU}, /* RGIDW_MODID[117]:MSI3*/ + [112] = {0xE7762458U, 0x0000000EU}, /* RGIDW_MODID[118]:MSI4*/ + [113] = {0xE776245CU, 0x0000000EU}, /* RGIDW_MODID[119]:MSI5*/ + [114] = {0xE7792400U, 0x00000002U}, /* RGIDW_MODID[120]:ARSP40*/ + /* After setting */ /* RGIDW_MODID[121]:ARSP41*/ + /* After setting */ /* RGIDW_MODID[122]:ARSP42*/ + [115] = {0xE779240CU, 0x00000001U}, /* RGIDW_MODID[123]:ARSP43*/ + [116] = {0xE7792410U, 0x00000002U}, /* RGIDW_MODID[124]:ARSP44*/ + [117] = {0xE7792414U, 0x00000001U}, /* RGIDW_MODID[125]:ARSP45*/ + [118] = {0xE7792418U, 0x00000002U}, /* RGIDW_MODID[126]:ARSP46*/ + [119] = {0xE779241CU, 0x00000002U}, /* RGIDW_MODID[127]:ARSP47*/ + [120] = {0xE7792420U, 0x00000000U}, /* RGIDW_MODID[128]:ARSP48*/ + [121] = {0xE7792424U, 0x0000004FU}, /* RGIDW_MODID[129]:DMAHSCIF0*/ + [122] = {0xE7792428U, 0x0000004FU}, /* RGIDW_MODID[130]:DMAHSCIF1*/ + [123] = {0xE779242CU, 0x0000004FU}, /* RGIDW_MODID[131]:DMAHSCIF2*/ + [124] = {0xE7792430U, 0x0000004FU}, /* RGIDW_MODID[132]:DMAHSCIF3*/ + [125] = {0xE7792434U, 0x0000004FU}, /* RGIDW_MODID[133]:DMASCIF0*/ + [126] = {0xE7792438U, 0x0000004FU}, /* RGIDW_MODID[134]:DMASCIF1*/ + [127] = {0xE779243CU, 0x0000004FU}, /* RGIDW_MODID[135]:DMASCIF3*/ + [128] = {0xE7792440U, 0x0000004FU}, /* RGIDW_MODID[136]:DMASCIF4*/ + [129] = {0xE7792444U, 0x0000000AU}, /* RGIDW_MODID[137]:ECMSP4*/ + [130] = {0xE7792448U, 0x0000004FU}, /* RGIDW_MODID[138]:HSCIF0*/ + [131] = {0xE779244CU, 0x0000004FU}, /* RGIDW_MODID[139]:HSCIF1*/ + [132] = {0xE7792450U, 0x0000004FU}, /* RGIDW_MODID[140]:HSCIF2*/ + [133] = {0xE7792454U, 0x0000004FU}, /* RGIDW_MODID[141]:HSCIF3*/ + [134] = {0xE7792458U, 0x0000004FU}, /* RGIDW_MODID[142]:SCIF0*/ + [135] = {0xE779245CU, 0x0000004FU}, /* RGIDW_MODID[143]:SCIF1*/ + [136] = {0xE7792460U, 0x0000004FU}, /* RGIDW_MODID[144]:SCIF3*/ + [137] = {0xE7792464U, 0x0000004FU}, /* RGIDW_MODID[145]:SCIF4*/ + [138] = {0xE7792468U, 0x0000006EU}, /* RGIDW_MODID[146]:TMU1*/ + [139] = {0xE779246CU, 0x0000006EU}, /* RGIDW_MODID[147]:TMU2*/ + [140] = {0xE7792470U, 0x0000006EU}, /* RGIDW_MODID[148]:TMU3*/ + [141] = {0xE7792474U, 0x0000006EU}, /* RGIDW_MODID[149]:TMU4*/ + [142] = {0xE7792478U, 0x0000004AU}, /* RGIDW_MODID[150]:CANFD*/ + [143] = {0xE779247CU, 0x0000004AU}, /* RGIDW_MODID[151]:DMACANFD*/ + [144] = {0xE7792480U, 0x00000002U}, /* RGIDW_MODID[152]:DMATPU0*/ + [145] = {0xE7792484U, 0x00000002U}, /* RGIDW_MODID[153]:PWM0*/ + [146] = {0xE7792488U, 0x00000002U}, /* RGIDW_MODID[154]:PWM1*/ + [147] = {0xE779248CU, 0x00000002U}, /* RGIDW_MODID[155]:PWM2*/ + [148] = {0xE7792490U, 0x00000002U}, /* RGIDW_MODID[156]:PWM3*/ + [149] = {0xE7792494U, 0x00000002U}, /* RGIDW_MODID[157]:PWM4*/ + [150] = {0xE7792498U, 0x00000002U}, /* RGIDW_MODID[158]:PWM5*/ + [151] = {0xE779249CU, 0x00000002U}, /* RGIDW_MODID[159]:PWM6*/ + [152] = {0xE77924A0U, 0x00000002U}, /* RGIDW_MODID[160]:PWM7*/ + [153] = {0xE77924A4U, 0x00000002U}, /* RGIDW_MODID[161]:PWM8*/ + [154] = {0xE77924A8U, 0x00000002U}, /* RGIDW_MODID[162]:PWM9*/ + [155] = {0xE77924ACU, 0x00000002U}, /* RGIDW_MODID[163]:TPU0*/ + [156] = {0xFE672400U, 0x00000002U}, /* RGIDW_MODID[164]:ARVC10*/ + /* After setting */ /* RGIDW_MODID[165]:ARVC11*/ + /* After setting */ /* RGIDW_MODID[166]:ARVC12*/ + [157] = {0xFE67240CU, 0x00000001U}, /* RGIDW_MODID[167]:ARVC13*/ + [158] = {0xFE672410U, 0x00000002U}, /* RGIDW_MODID[168]:ARVC14*/ + [159] = {0xFE672414U, 0x00000001U}, /* RGIDW_MODID[169]:ARVC15*/ + [160] = {0xFE672418U, 0x00000002U}, /* RGIDW_MODID[170]:ARVC16*/ + [161] = {0xFE67241CU, 0x00000002U}, /* RGIDW_MODID[171]:ARVC17*/ + [162] = {0xFE672420U, 0x00000000U}, /* RGIDW_MODID[172]:ARVC18*/ + [163] = {0xFE672424U, 0x0000000AU}, /* RGIDW_MODID[173]:ECMVC1*/ + [164] = {0xFE672428U, 0x00000028U}, /* RGIDW_MODID[174]:FCPCS*/ + [165] = {0xFE67242CU, 0x00000028U}, /* RGIDW_MODID[175]:VCP4LC*/ + [166] = {0xFE672430U, 0x00000028U}, /* RGIDW_MODID[176]:VCP4LV*/ + [167] = {0xFEBD2400U, 0x00000002U}, /* RGIDW_MODID[177]:ARVI40*/ + /* After setting */ /* RGIDW_MODID[178]:ARVI41*/ + /* After setting */ /* RGIDW_MODID[179]:ARVI42*/ + [168] = {0xFEBD240CU, 0x00000001U}, /* RGIDW_MODID[180]:ARVI43*/ + [169] = {0xFEBD2410U, 0x00000002U}, /* RGIDW_MODID[181]:ARVI44*/ + [170] = {0xFEBD2414U, 0x00000001U}, /* RGIDW_MODID[182]:ARVI45*/ + [171] = {0xFEBD2418U, 0x00000002U}, /* RGIDW_MODID[183]:ARVI46*/ + [172] = {0xFEBD241CU, 0x00000002U}, /* RGIDW_MODID[184]:ARVI47*/ + [173] = {0xFEBD2420U, 0x00000000U}, /* RGIDW_MODID[185]:ARVI48*/ + [174] = {0xFEBD2424U, 0x0000000FU}, /* RGIDW_MODID[186]:DIS0*/ + [175] = {0xFEBD242CU, 0x0000000FU}, /* RGIDW_MODID[187]:DSC*/ + [176] = {0xFEBD2430U, 0x0000000EU}, /* RGIDW_MODID[188]:ECMVIO2*/ + [177] = {0xFEBD2434U, 0x0000000FU}, /* RGIDW_MODID[189]:FCPVD0*/ + [178] = {0xFEBD2438U, 0x0000000FU}, /* RGIDW_MODID[190]:FCPVD1*/ + [179] = {0xFEBD243CU, 0x0000004EU}, /* RGIDW_MODID[191]:VSPD0*/ + [180] = {0xFEBD2440U, 0x0000004EU}, /* RGIDW_MODID[192]:VSPD1*/ + [181] = {0xE6582400U, 0x0000000AU}, /* RGIDW_MODID[193]:CKMHSC*/ + [182] = {0xE6582404U, 0x0000000CU}, /* RGIDW_MODID[194]:AXIPCI001*/ + [183] = {0xE6582408U, 0x0000000CU}, /* RGIDW_MODID[195]:AXIPCI002*/ + [184] = {0xE658240CU, 0x0000000CU}, /* RGIDW_MODID[196]:AXIPCI003*/ + [185] = {0xE6582414U, 0x0000000CU}, /* RGIDW_MODID[197]:AXIPCI005*/ + [186] = {0xE6582418U, 0x0000000CU}, /* RGIDW_MODID[198]:AXIPCI006*/ + [187] = {0xE658241CU, 0x0000000CU}, /* RGIDW_MODID[199]:AXIPCI007*/ + [188] = {0xE6582420U, 0x0000000CU}, /* RGIDW_MODID[200]:AXIPCI008*/ + [189] = {0xE6582424U, 0x0000000CU}, /* RGIDW_MODID[201]:AXIPCI009*/ + [190] = {0xE6582428U, 0x0000000CU}, /* RGIDW_MODID[202]:AXIPCI010*/ + [191] = {0xE658242CU, 0x0000000CU}, /* RGIDW_MODID[203]:AXIPCI011*/ + [192] = {0xE6582430U, 0x0000000CU}, /* RGIDW_MODID[204]:AXIPCI012*/ + [193] = {0xE6582434U, 0x0000000CU}, /* RGIDW_MODID[205]:AXIPCI013*/ + [194] = {0xE6582438U, 0x0000000CU}, /* RGIDW_MODID[206]:AXIPCI014*/ + [195] = {0xE658243CU, 0x0000000CU}, /* RGIDW_MODID[207]:AXIPCI015*/ + [196] = {0xE6582440U, 0x0000000CU}, /* RGIDW_MODID[208]:AXIPCI100*/ + [197] = {0xE6582444U, 0x0000000CU}, /* RGIDW_MODID[209]:AXIPCI101*/ + [198] = {0xE6582448U, 0x0000000CU}, /* RGIDW_MODID[210]:AXIPCI102*/ + [199] = {0xE658244CU, 0x0000000CU}, /* RGIDW_MODID[211]:AXIPCI103*/ + [200] = {0xE6582450U, 0x0000000CU}, /* RGIDW_MODID[212]:AXIPCI104*/ + [201] = {0xE6582454U, 0x0000000CU}, /* RGIDW_MODID[213]:AXIPCI105*/ + [202] = {0xE6582458U, 0x0000000CU}, /* RGIDW_MODID[214]:AXIPCI106*/ + [203] = {0xE658245CU, 0x0000000CU}, /* RGIDW_MODID[215]:AXIPCI107*/ + [204] = {0xE6582460U, 0x0000000CU}, /* RGIDW_MODID[216]:AXIPCI108*/ + [205] = {0xE6582464U, 0x0000000CU}, /* RGIDW_MODID[217]:AXIPCI109*/ + [206] = {0xE6582468U, 0x0000000CU}, /* RGIDW_MODID[218]:AXIPCI110*/ + [207] = {0xE658246CU, 0x0000000CU}, /* RGIDW_MODID[219]:AXIPCI111*/ + [208] = {0xE6582470U, 0x0000000CU}, /* RGIDW_MODID[220]:AXIPCI112*/ + [209] = {0xE6582474U, 0x0000000CU}, /* RGIDW_MODID[221]:AXIPCI113*/ + [210] = {0xE6582478U, 0x0000000CU}, /* RGIDW_MODID[222]:AXIPCI114*/ + [211] = {0xE658247CU, 0x0000000CU}, /* RGIDW_MODID[223]:AXIPCI115*/ + [212] = {0xE6582484U, 0x0000000EU}, /* RGIDW_MODID[224]:GPTP*/ + [213] = {0xE6582488U, 0x0000004EU}, /* RGIDW_MODID[225]:IPMMUHC00*/ + [214] = {0xE65824F0U, 0x0000000EU}, /* RGIDW_MODID[226]:TSN0*/ + [215] = {0xE65824F4U, 0x0000000CU}, /* RGIDW_MODID[227]:AXIPCI000*/ + [216] = {0xE65824F8U, 0x0000000CU}, /* RGIDW_MODID[228]:AXIPCI004*/ + [217] = {0xE65824FCU, 0x0000004EU}, /* RGIDW_MODID[229]:IPMMUHC01*/ + [218] = {0xE6582500U, 0x0000004EU}, /* RGIDW_MODID[230]:AVB0*/ + [219] = {0xE6582504U, 0x0000004EU}, /* RGIDW_MODID[231]:AVB1*/ + [220] = {0xE6582508U, 0x0000004EU}, /* RGIDW_MODID[232]:AVB2*/ + [221] = {0xE658250CU, 0x0000004EU}, /* RGIDW_MODID[233]:IPMMUHC10*/ + [222] = {0xE6582510U, 0x0000004EU}, /* RGIDW_MODID[234]:IPMMUHC11*/ + [223] = {0xE6582514U, 0x0000004EU}, /* RGIDW_MODID[235]:IPMMUHC12*/ + [224] = {0xE6582518U, 0x0000004EU}, /* RGIDW_MODID[236]:IPMMUHC13*/ + [225] = {0xE658251CU, 0x0000000CU}, /* RGIDW_MODID[237]:PPHY0*/ + [226] = {0xE6582520U, 0x0000000CU}, /* RGIDW_MODID[238]:PPHY1*/ + [227] = {0xE6582524U, 0x0000004EU}, /* RGIDW_MODID[239]:IPMMUHC14*/ + [228] = {0xE6582528U, 0x0000004EU}, /* RGIDW_MODID[240]:IPMMUHC15*/ + [229] = {0xE658252CU, 0x0000000EU}, /* RGIDW_MODID[241]:FBAHSC*/ + [230] = {0xE6582530U, 0x0000004EU}, /* RGIDW_MODID[242]:IPMMUHC02*/ + [231] = {0xE6582538U, 0x0000000AU}, /* RGIDW_MODID[243]:ECMHSC*/ + [232] = {0xE658253CU, 0x00000002U}, /* RGIDW_MODID[244]:ARHC0*/ + /* After setting */ /* RGIDW_MODID[245]:ARHC1*/ + /* After setting */ /* RGIDW_MODID[246]:ARHC2*/ + [233] = {0xE6582548U, 0x00000001U}, /* RGIDW_MODID[247]:ARHC3*/ + [234] = {0xE658254CU, 0x00000002U}, /* RGIDW_MODID[248]:ARHC4*/ + [235] = {0xE6582550U, 0x00000001U}, /* RGIDW_MODID[249]:ARHC5*/ + [236] = {0xE6582554U, 0x00000002U}, /* RGIDW_MODID[250]:ARHC6*/ + [237] = {0xE6582558U, 0x00000002U}, /* RGIDW_MODID[251]:ARHC7*/ + [238] = {0xE658255CU, 0x00000000U}, /* RGIDW_MODID[252]:ARHC8*/ + [239] = {0xE6582560U, 0x0000004EU}, /* RGIDW_MODID[253]:IPMMUHC03*/ + [240] = {0xE6582564U, 0x0000004EU}, /* RGIDW_MODID[254]:IPMMUHC04*/ + [241] = {0xE6582568U, 0x0000004EU}, /* RGIDW_MODID[255]:IPMMUHC05*/ + [242] = {0xE658256CU, 0x0000004EU}, /* RGIDW_MODID[256]:IPMMUHC06*/ + [243] = {0xE6582570U, 0x0000004EU}, /* RGIDW_MODID[257]:IPMMUHC07*/ + [244] = {0xE6582574U, 0x0000004EU}, /* RGIDW_MODID[258]:IPMMUHC08*/ + [245] = {0xE6582578U, 0x0000004EU}, /* RGIDW_MODID[259]:IPMMUHC09*/ + [246] = {0xFF882400U, 0x00000002U}, /* RGIDW_MODID[260]:ARIMP00*/ + /* After setting */ /* RGIDW_MODID[261]:ARIMP01*/ + /* After setting */ /* RGIDW_MODID[262]:ARIMP02*/ + [247] = {0xFF88240CU, 0x00000001U}, /* RGIDW_MODID[263]:ARIMP03*/ + [248] = {0xFF882410U, 0x00000002U}, /* RGIDW_MODID[264]:ARIMP04*/ + [249] = {0xFF882414U, 0x0000004EU}, /* RGIDW_MODID[265]:AXIFBABUSIR0*/ + [250] = {0xFF882418U, 0x0000004EU}, /* RGIDW_MODID[266]:AXIFBABUSIR1*/ + [251] = {0xFF88241CU, 0x0000004EU}, /* RGIDW_MODID[267]:AXIFBABUSIR2*/ + [252] = {0xFF882420U, 0x0000004EU}, /* RGIDW_MODID[268]:AXIFBABUSIR3*/ + [253] = {0xFF882424U, 0x0000004EU}, /* RGIDW_MODID[269]:AXIFBABUSIR4*/ + [254] = {0xFF882428U, 0x0000004EU}, /* RGIDW_MODID[270]:AXIIMP0*/ + [255] = {0xFF88242CU, 0x0000004EU}, /* RGIDW_MODID[271]:CKMCNR*/ + [256] = {0xFF882430U, 0x0000004EU}, /* RGIDW_MODID[272]:CKMDSP*/ + [257] = {0xFF882434U, 0x00000001U}, /* RGIDW_MODID[273]:ARIMP05*/ + [258] = {0xFF882438U, 0x00000002U}, /* RGIDW_MODID[274]:ARIMP06*/ + [259] = {0xFF88243CU, 0x00000002U}, /* RGIDW_MODID[275]:ARIMP07*/ + [260] = {0xFF882440U, 0x00000000U}, /* RGIDW_MODID[276]:ARIMP08*/ + [261] = {0xFF882444U, 0x0000004EU}, /* RGIDW_MODID[277]:CKMIR*/ + [262] = {0xFF882448U, 0x0000000AU}, /* RGIDW_MODID[278]:ECMIR*/ + [263] = {0xFF88244CU, 0x0000000FU}, /* RGIDW_MODID[279]:DSPPS*/ + [264] = {0xFF882450U, 0x0000004EU}, /* RGIDW_MODID[280]:IPMMUIR1*/ + [265] = {0xFF882454U, 0x0000004EU}, /* RGIDW_MODID[281]:IPMMUIR0*/ + [266] = {0xFF882458U, 0x0000004EU}, /* RGIDW_MODID[282]:IPMMUIR10*/ + [267] = {0xFF88245CU, 0x0000004EU}, /* RGIDW_MODID[283]:IPMMUIR11*/ + [268] = {0xFF882460U, 0x0000004EU}, /* RGIDW_MODID[284]:IPMMUIR12*/ + [269] = {0xFF882464U, 0x0000004EU}, /* RGIDW_MODID[285]:IPMMUIR13*/ + [270] = {0xFF882468U, 0x0000004EU}, /* RGIDW_MODID[286]:IPMMUIR14*/ + [271] = {0xFF88246CU, 0x0000004EU}, /* RGIDW_MODID[287]:IPMMUIR15*/ + [272] = {0xFF882470U, 0x0000004EU}, /* RGIDW_MODID[288]:IPMMUIR2*/ + [273] = {0xFF882474U, 0x0000004EU}, /* RGIDW_MODID[289]:IPMMUIR3*/ + [274] = {0xFF882478U, 0x0000004EU}, /* RGIDW_MODID[290]:IPMMUIR4*/ + [275] = {0xFF88247CU, 0x0000004EU}, /* RGIDW_MODID[291]:IPMMUIR5*/ + [276] = {0xFF882480U, 0x0000004EU}, /* RGIDW_MODID[292]:IPMMUIR6*/ + [277] = {0xFF882484U, 0x0000004EU}, /* RGIDW_MODID[293]:IPMMUIR7*/ + [278] = {0xFF882488U, 0x0000004EU}, /* RGIDW_MODID[294]:IPMMUIR8*/ + [279] = {0xFF88248CU, 0x0000004EU}, /* RGIDW_MODID[295]:IPMMUIR9*/ + [280] = {0xFD812400U, 0x00000002U}, /* RGIDW_MODID[296]:ARPV0*/ + /* After setting */ /* RGIDW_MODID[297]:ARPV1*/ + [281] = {0xFD812408U, 0x0000002CU}, /* RGIDW_MODID[298]:AXIRGXS*/ + /* After setting */ /* RGIDW_MODID[299]:ARPV2*/ + [282] = {0xFD812410U, 0x00000001U}, /* RGIDW_MODID[300]:ARPV3*/ + [283] = {0xFD812414U, 0x00000002U}, /* RGIDW_MODID[301]:ARPV4*/ + [284] = {0xFD812418U, 0x00000001U}, /* RGIDW_MODID[302]:ARPV5*/ + [285] = {0xFD81241CU, 0x00000002U}, /* RGIDW_MODID[303]:ARPV6*/ + [286] = {0xFD812420U, 0x00000002U}, /* RGIDW_MODID[304]:ARPV7*/ + [287] = {0xFD812424U, 0x00000000U}, /* RGIDW_MODID[305]:ARPV8*/ + [288] = {0xFD812428U, 0x0000000AU}, /* RGIDW_MODID[306]:CKM3DG*/ + [289] = {0xFD81242CU, 0x0000000AU}, /* RGIDW_MODID[307]:ECM3DG*/ + [290] = {0xFD812430U, 0x0000000EU}, /* RGIDW_MODID[308]:FBAPVC*/ + [291] = {0xFD812434U, 0x0000000EU}, /* RGIDW_MODID[309]:FBAPVD0*/ + [292] = {0xFD812438U, 0x0000000EU}, /* RGIDW_MODID[310]:FBAPVD1*/ + [293] = {0xFD81243CU, 0x0000000EU}, /* RGIDW_MODID[311]:FBAPVD2*/ + [294] = {0xFD812440U, 0x0000000EU}, /* RGIDW_MODID[312]:FBAPVE*/ + [295] = {0xFD812444U, 0x0000004EU}, /* RGIDW_MODID[313]:IPMMUPV000*/ + [296] = {0xFD812448U, 0x0000004EU}, /* RGIDW_MODID[314]:IPMMUPV001*/ + [297] = {0xFD81244CU, 0x0000004EU}, /* RGIDW_MODID[315]:IPMMUPV010*/ + [298] = {0xFD812450U, 0x0000004EU}, /* RGIDW_MODID[316]:IPMMUPV011*/ + [299] = {0xFD812454U, 0x0000004EU}, /* RGIDW_MODID[317]:IPMMUPV012*/ + [300] = {0xFD812458U, 0x0000004EU}, /* RGIDW_MODID[318]:IPMMUPV013*/ + [301] = {0xFD81245CU, 0x0000004EU}, /* RGIDW_MODID[319]:IPMMUPV014*/ + [302] = {0xFD812460U, 0x0000004EU}, /* RGIDW_MODID[320]:IPMMUPV015*/ + [303] = {0xFD812464U, 0x0000004EU}, /* RGIDW_MODID[321]:IPMMUPV002*/ + [304] = {0xFD812468U, 0x0000004EU}, /* RGIDW_MODID[322]:IPMMUPV003*/ + [305] = {0xFD81246CU, 0x0000004EU}, /* RGIDW_MODID[323]:IPMMUPV004*/ + [306] = {0xFD812470U, 0x0000004EU}, /* RGIDW_MODID[324]:IPMMUPV005*/ + [307] = {0xFD812474U, 0x0000004EU}, /* RGIDW_MODID[325]:IPMMUPV006*/ + [308] = {0xFD812478U, 0x0000004EU}, /* RGIDW_MODID[326]:IPMMUPV007*/ + [309] = {0xFD81247CU, 0x0000004EU}, /* RGIDW_MODID[327]:IPMMUPV008*/ + [310] = {0xFD812480U, 0x0000004EU}, /* RGIDW_MODID[328]:IPMMUPV009*/ + [311] = {0xE6622400U, 0x00000002U}, /* RGIDW_MODID[329]:ARRC0*/ + /* After setting */ /* RGIDW_MODID[330]:ARRC1*/ + /* After setting */ /* RGIDW_MODID[331]:ARRC2*/ + [312] = {0xE662240CU, 0x00000001U}, /* RGIDW_MODID[332]:ARRC3*/ + [313] = {0xE6622410U, 0x00000002U}, /* RGIDW_MODID[333]:ARRC4*/ + [314] = {0xE6622414U, 0x00000001U}, /* RGIDW_MODID[334]:ARRC5*/ + [315] = {0xE6622418U, 0x00000002U}, /* RGIDW_MODID[335]:ARRC6*/ + [316] = {0xE662241CU, 0x00000002U}, /* RGIDW_MODID[336]:ARRC7*/ + [317] = {0xE6622420U, 0x00000000U}, /* RGIDW_MODID[337]:ARRC8*/ + [318] = {0xE6622424U, 0x00000009U}, /* RGIDW_MODID[338]:CR0*/ + [319] = {0xE6622428U, 0x0000004FU}, /* RGIDW_MODID[339]:ICUMX*/ + [320] = {0xE662242CU, 0x0000000AU}, /* RGIDW_MODID[340]:ECMRC*/ + [321] = {0xFFC32400U, 0x0000004EU}, /* RGIDW_MODID[341]:DMAWCRC0*/ + [322] = {0xFFC32404U, 0x0000004EU}, /* RGIDW_MODID[342]:DMAWCRC1*/ + [323] = {0xFFC32408U, 0x0000004EU}, /* RGIDW_MODID[343]:DMAWCRC2*/ + [324] = {0xFFC3240CU, 0x0000004EU}, /* RGIDW_MODID[344]:DMAWCRC3*/ + [325] = {0xFFC42400U, 0x0000000FU}, /* RGIDW_MODID[345]:ARMREG00*/ + [326] = {0xFFC42404U, 0x0000000CU}, /* RGIDW_MODID[346]:ARMREG01*/ + [327] = {0xFFC42408U, 0x00000000U}, /* RGIDW_MODID[347]:ARMREG10*/ + [328] = {0xFFC4240CU, 0x00000000U}, /* RGIDW_MODID[348]:ARMREG11*/ + [329] = {0xFFC42410U, 0x0000000AU}, /* RGIDW_MODID[349]:ARMREG12*/ + [330] = {0xFFC42414U, 0x0000000FU}, /* RGIDW_MODID[350]:ARMREG13*/ + [331] = {0xFFC42418U, 0x0000000AU}, /* RGIDW_MODID[351]:ARMREG14*/ + [332] = {0xFFC4241CU, 0x00000003U}, /* RGIDW_MODID[352]:AXICR52SS0*/ + [333] = {0xFFC42420U, 0x0000000EU}, /* RGIDW_MODID[353]:AXICSD0*/ + [334] = {0xFFC42424U, 0x0000000EU}, /* RGIDW_MODID[354]:AXIINTAP0*/ + [335] = {0xFFC42428U, 0x00000000U}, /* RGIDW_MODID[355]:AXIINTAP1*/ + [336] = {0xFFC42430U, 0x0000000FU}, /* RGIDW_MODID[356]:AXISYSRAM0*/ + [337] = {0xFFC42434U, 0x0000004FU}, /* RGIDW_MODID[357]:AXISYSRAM1*/ + [338] = {0xFFC42438U, 0x00000000U}, /* RGIDW_MODID[358]:ARGREG15*/ + [339] = {0xFFC4243CU, 0x00000000U}, /* RGIDW_MODID[359]:ARMREG2*/ + [340] = {0xFFC42440U, 0x00000000U}, /* RGIDW_MODID[360]:ARMREG3*/ + [341] = {0xFFC42444U, 0x00000000U}, /* RGIDW_MODID[361]:ARMREG4*/ + [342] = {0xFFC42448U, 0x0000000FU}, /* RGIDW_MODID[362]:ARMREG5*/ + [343] = {0xFFC4244CU, 0x0000000AU}, /* RGIDW_MODID[363]:ARMREG6*/ + [344] = {0xFFC42450U, 0x00000000U}, /* RGIDW_MODID[364]:ARMREG7*/ + [345] = {0xFFC42454U, 0x0000000CU}, /* RGIDW_MODID[365]:ARMREG8*/ + [346] = {0xFFC42458U, 0x0000000CU}, /* RGIDW_MODID[366]:ARMREG9*/ + [347] = {0xFFC4245CU, 0x00000002U}, /* RGIDW_MODID[367]:ARRD0*/ + /* After setting */ /* RGIDW_MODID[368]:ARRD1*/ + /* After setting */ /* RGIDW_MODID[369]:ARRD2*/ + [348] = {0xFFC42468U, 0x00000001U}, /* RGIDW_MODID[370]:ARRD3*/ + [349] = {0xFFC4246CU, 0x00000002U}, /* RGIDW_MODID[371]:ARRD4*/ + [350] = {0xFFC42470U, 0x00000001U}, /* RGIDW_MODID[372]:ARRD5*/ + [351] = {0xFFC42474U, 0x00000002U}, /* RGIDW_MODID[373]:ARRD6*/ + [352] = {0xFFC42478U, 0x00000002U}, /* RGIDW_MODID[374]:ARRD7*/ + [353] = {0xFFC4247CU, 0x00000000U}, /* RGIDW_MODID[375]:ARRD8*/ + [354] = {0xFFC42480U, 0x00000002U}, /* RGIDW_MODID[376]:ARRT0*/ + /* After setting */ /* RGIDW_MODID[377]:ARRT1*/ + /* After setting */ /* RGIDW_MODID[378]:ARRT2*/ + [355] = {0xFFC4248CU, 0x00000001U}, /* RGIDW_MODID[379]:ARRT3*/ + [356] = {0xFFC42490U, 0x00000002U}, /* RGIDW_MODID[380]:ARRT4*/ + [357] = {0xFFC42494U, 0x00000001U}, /* RGIDW_MODID[381]:ARRT5*/ + [358] = {0xFFC42498U, 0x00000002U}, /* RGIDW_MODID[382]:ARRT6*/ + [359] = {0xFFC4249CU, 0x00000002U}, /* RGIDW_MODID[383]:ARRT7*/ + [360] = {0xFFC424A0U, 0x00000000U}, /* RGIDW_MODID[384]:ARRT8*/ + [361] = {0xFFC424A4U, 0x0000000AU}, /* RGIDW_MODID[385]:CKMRT*/ + [362] = {0xFFC424A8U, 0x0000004EU}, /* RGIDW_MODID[386]:CRC0*/ + [363] = {0xFFC424ACU, 0x0000004EU}, /* RGIDW_MODID[387]:CRC1*/ + [364] = {0xFFC424B0U, 0x0000004EU}, /* RGIDW_MODID[388]:CRC2*/ + [365] = {0xFFC424B4U, 0x0000004EU}, /* RGIDW_MODID[389]:CRC3*/ + [366] = {0xFFC424B8U, 0x0000000EU}, /* RGIDW_MODID[390]:CSD*/ + [367] = {0xFFC424BCU, 0x0000000EU}, /* RGIDW_MODID[391]:ECM*/ + [368] = {0xFFC424C0U, 0x0000000AU}, /* RGIDW_MODID[392]:ECMRT*/ + [369] = {0xFFC424C4U, 0x0000000EU}, /* RGIDW_MODID[393]:FBACR52*/ + [370] = {0xFFC424C8U, 0x0000000EU}, /* RGIDW_MODID[394]:FBART*/ + [371] = {0xFFC424CCU, 0x0000000EU}, /* RGIDW_MODID[395]:INTTP*/ + [372] = {0xFFC424D0U, 0x0000004EU}, /* RGIDW_MODID[396]:IPMMURT000*/ + [373] = {0xFFC424D4U, 0x0000004EU}, /* RGIDW_MODID[397]:IPMMURT100*/ + [374] = {0xFFC424D8U, 0x0000004EU}, /* RGIDW_MODID[398]:KCRC4*/ + [375] = {0xFFC424DCU, 0x0000004EU}, /* RGIDW_MODID[399]:KCRC5*/ + [376] = {0xFFC424E0U, 0x0000004EU}, /* RGIDW_MODID[400]:KCRC6*/ + [377] = {0xFFC424E4U, 0x0000004EU}, /* RGIDW_MODID[401]:KCRC7*/ + [378] = {0xFFC424E8U, 0x0000004FU}, /* RGIDW_MODID[402]:MFI00*/ + [379] = {0xFFC424ECU, 0x0000004EU}, /* RGIDW_MODID[403]:MFI01*/ + [380] = {0xFFC424F0U, 0x0000004EU}, /* RGIDW_MODID[404]:MFI10*/ + [381] = {0xFFC424F4U, 0x0000004EU}, /* RGIDW_MODID[405]:MFI02*/ + [382] = {0xFFC424F8U, 0x0000004EU}, /* RGIDW_MODID[406]:MFI03*/ + [383] = {0xFFC424FCU, 0x0000004EU}, /* RGIDW_MODID[407]:MFI04*/ + [384] = {0xFFC42500U, 0x00000000U}, /* RGIDW_MODID[408]:MFI05*/ + [385] = {0xFFC42504U, 0x00000000U}, /* RGIDW_MODID[409]:MFI06*/ + [386] = {0xFFC42508U, 0x00000000U}, /* RGIDW_MODID[410]:MFI07*/ + [387] = {0xFFC4250CU, 0x00000000U}, /* RGIDW_MODID[411]:MFI08*/ + [388] = {0xFFC42510U, 0x0000004EU}, /* RGIDW_MODID[412]:MFI09*/ + [389] = {0xFFC42514U, 0x0000004FU}, /* RGIDW_MODID[413]:MFI15*/ + [390] = {0xFFC42518U, 0x0000000AU}, /* RGIDW_MODID[414]:CKMCR52*/ + [391] = {0xFFC4251CU, 0x0000004BU}, /* RGIDW_MODID[415]:RTDM0P*/ + [392] = {0xFFC42520U, 0x0000000AU}, /* RGIDW_MODID[416]:ECMRD*/ + [393] = {0xFFC42524U, 0x0000004BU}, /* RGIDW_MODID[417]:RTDM1P*/ + [394] = {0xFFC4252CU, 0x0000004BU}, /* RGIDW_MODID[418]:RTDM2P*/ + [395] = {0xFFC42530U, 0x0000000BU}, /* RGIDW_MODID[419]:SYSRAM10*/ + [396] = {0xFFC42534U, 0x0000004BU}, /* RGIDW_MODID[420]:RTDM3P*/ + [397] = {0xFFC42538U, 0x00000001U}, /* RGIDW_MODID[421]:SYSRAM00*/ + [398] = {0xFFC4253CU, 0x0000004EU}, /* RGIDW_MODID[422]:TSIPL0*/ + [399] = {0xFFC42540U, 0x0000004EU}, /* RGIDW_MODID[423]:TSIPL1*/ + [400] = {0xFFC42544U, 0x0000004EU}, /* RGIDW_MODID[424]:TSIPL2*/ + [401] = {0xFFC42548U, 0x0000004EU}, /* RGIDW_MODID[425]:TSIPL3*/ + [402] = {0xFFC4254CU, 0x0000004EU}, /* RGIDW_MODID[426]:TSIPL4*/ + [403] = {0xFFC42550U, 0x0000004EU}, /* RGIDW_MODID[427]:TSIPL5*/ + [404] = {0xFFC42554U, 0x0000004EU}, /* RGIDW_MODID[428]:TSIPL6*/ + [405] = {0xFFC42558U, 0x0000004EU}, /* RGIDW_MODID[429]:TSIPL7*/ + [406] = {0xFFC4255CU, 0x0000004EU}, /* RGIDW_MODID[430]:WCRC0*/ + [407] = {0xFFC42560U, 0x0000004EU}, /* RGIDW_MODID[431]:WCRC1*/ + [408] = {0xFFC42564U, 0x0000004EU}, /* RGIDW_MODID[432]:WCRC2*/ + [409] = {0xFFC42568U, 0x0000004EU}, /* RGIDW_MODID[433]:WCRC3*/ + [410] = {0xFFC42580U, 0x0000004EU}, /* RGIDW_MODID[434]:MFI11*/ + [411] = {0xFFC42584U, 0x00000000U}, /* RGIDW_MODID[435]:MFI12*/ + [412] = {0xFFC42588U, 0x00000000U}, /* RGIDW_MODID[436]:MFI13*/ + [413] = {0xFFC4258CU, 0x00000000U}, /* RGIDW_MODID[437]:MFI14*/ + [414] = {0xFFC42590U, 0x0000004EU}, /* RGIDW_MODID[438]:IPMMURT001*/ + [415] = {0xFFC42594U, 0x0000004EU}, /* RGIDW_MODID[439]:IPMMURT010*/ + [416] = {0xFFC42598U, 0x0000004EU}, /* RGIDW_MODID[440]:IPMMURT011*/ + [417] = {0xFFC4259CU, 0x0000004EU}, /* RGIDW_MODID[441]:IPMMURT012*/ + [418] = {0xFFC425A0U, 0x0000004EU}, /* RGIDW_MODID[442]:IPMMURT013*/ + [419] = {0xFFC425A4U, 0x0000004EU}, /* RGIDW_MODID[443]:IPMMURT014*/ + [420] = {0xFFC425A8U, 0x0000004EU}, /* RGIDW_MODID[444]:IPMMURT015*/ + [421] = {0xFFC425ACU, 0x0000004EU}, /* RGIDW_MODID[445]:IPMMURT002*/ + [422] = {0xFFC425B0U, 0x0000004EU}, /* RGIDW_MODID[446]:IPMMURT003*/ + [423] = {0xFFC425B4U, 0x0000004EU}, /* RGIDW_MODID[447]:IPMMURT004*/ + [424] = {0xFFC425B8U, 0x0000004EU}, /* RGIDW_MODID[448]:IPMMURT005*/ + [425] = {0xFFC425BCU, 0x0000004EU}, /* RGIDW_MODID[449]:IPMMURT006*/ + [426] = {0xFFC425C0U, 0x0000004EU}, /* RGIDW_MODID[450]:IPMMURT007*/ + [427] = {0xFFC425C4U, 0x0000004EU}, /* RGIDW_MODID[451]:IPMMURT008*/ + [428] = {0xFFC425C8U, 0x0000004EU}, /* RGIDW_MODID[452]:IPMMURT009*/ + [429] = {0xFFC425CCU, 0x0000004EU}, /* RGIDW_MODID[453]:IPKMURT101*/ + [430] = {0xFFC425D0U, 0x0000004EU}, /* RGIDW_MODID[454]:IPMMURT110*/ + [431] = {0xFFC425D4U, 0x0000004EU}, /* RGIDW_MODID[455]:IPMMURT111*/ + [432] = {0xFFC425D8U, 0x0000004EU}, /* RGIDW_MODID[456]:IPMMURT112*/ + [433] = {0xFFC425DCU, 0x0000004EU}, /* RGIDW_MODID[457]:IPMMURT113*/ + [434] = {0xFFC425E0U, 0x0000004EU}, /* RGIDW_MODID[458]:IPMMURT114*/ + [435] = {0xFFC425E4U, 0x0000004EU}, /* RGIDW_MODID[459]:IPMMURT115*/ + [436] = {0xFFC425E8U, 0x0000004EU}, /* RGIDW_MODID[460]:IPMMURT102*/ + [437] = {0xFFC425ECU, 0x0000004EU}, /* RGIDW_MODID[461]:IPMMURT103*/ + [438] = {0xFFC425F0U, 0x0000004EU}, /* RGIDW_MODID[462]:IPMMURT104*/ + [439] = {0xFFC425F4U, 0x0000004EU}, /* RGIDW_MODID[463]:IPMMURT105*/ + [440] = {0xFFC425F8U, 0x0000004EU}, /* RGIDW_MODID[464]:IPMMURT106*/ + [441] = {0xFFC425FCU, 0x0000004EU}, /* RGIDW_MODID[465]:IPMMURT107*/ + [442] = {0xFFC42600U, 0x0000004BU}, /* RGIDW_MODID[466]:RTDM000*/ + [443] = {0xFFC42604U, 0x0000004BU}, /* RGIDW_MODID[467]:RTDM001*/ + [444] = {0xFFC42608U, 0x0000004BU}, /* RGIDW_MODID[468]:RTDM010*/ + [445] = {0xFFC4260CU, 0x0000004BU}, /* RGIDW_MODID[469]:RTDM011*/ + [446] = {0xFFC42610U, 0x0000004BU}, /* RGIDW_MODID[470]:RTDM012*/ + [447] = {0xFFC42614U, 0x0000004BU}, /* RGIDW_MODID[471]:RTDM013*/ + [448] = {0xFFC42618U, 0x0000004BU}, /* RGIDW_MODID[472]:RTDM014*/ + [449] = {0xFFC4261CU, 0x0000004BU}, /* RGIDW_MODID[473]:RTDM015*/ + [450] = {0xFFC42620U, 0x0000004BU}, /* RGIDW_MODID[474]:RTDM002*/ + [451] = {0xFFC42624U, 0x0000004BU}, /* RGIDW_MODID[475]:RTDM003*/ + [452] = {0xFFC42628U, 0x0000004BU}, /* RGIDW_MODID[476]:RTDM004*/ + [453] = {0xFFC4262CU, 0x0000004BU}, /* RGIDW_MODID[477]:RTDM005*/ + [454] = {0xFFC42630U, 0x0000004BU}, /* RGIDW_MODID[478]:RTDM006*/ + [455] = {0xFFC42634U, 0x0000004BU}, /* RGIDW_MODID[479]:RTDM007*/ + [456] = {0xFFC42638U, 0x0000004BU}, /* RGIDW_MODID[480]:RTDM008*/ + [457] = {0xFFC4263CU, 0x0000004BU}, /* RGIDW_MODID[481]:RTDM009*/ + [458] = {0xFFC42640U, 0x0000004BU}, /* RGIDW_MODID[482]:RTDM100*/ + [459] = {0xFFC42644U, 0x0000004BU}, /* RGIDW_MODID[483]:RTDM101*/ + [460] = {0xFFC42648U, 0x0000004BU}, /* RGIDW_MODID[484]:RTDM110*/ + [461] = {0xFFC4264CU, 0x0000004BU}, /* RGIDW_MODID[485]:RTDM111*/ + [462] = {0xFFC42650U, 0x0000004BU}, /* RGIDW_MODID[486]:RTDM112*/ + [463] = {0xFFC42654U, 0x0000004BU}, /* RGIDW_MODID[487]:RTDM113*/ + [464] = {0xFFC42658U, 0x0000004BU}, /* RGIDW_MODID[488]:RTDM114*/ + [465] = {0xFFC4265CU, 0x0000004BU}, /* RGIDW_MODID[489]:RTDM115*/ + [466] = {0xFFC42660U, 0x0000004BU}, /* RGIDW_MODID[490]:RTDM102*/ + [467] = {0xFFC42664U, 0x0000004BU}, /* RGIDW_MODID[491]:RTDM103*/ + [468] = {0xFFC42668U, 0x0000004BU}, /* RGIDW_MODID[492]:RTDM104*/ + [469] = {0xFFC4266CU, 0x0000004BU}, /* RGIDW_MODID[493]:RTDM105*/ + [470] = {0xFFC42670U, 0x0000004BU}, /* RGIDW_MODID[494]:RTDM106*/ + [471] = {0xFFC42674U, 0x0000004BU}, /* RGIDW_MODID[495]:RTDM107*/ + [472] = {0xFFC42678U, 0x0000004BU}, /* RGIDW_MODID[496]:RTDM108*/ + [473] = {0xFFC4267CU, 0x0000004BU}, /* RGIDW_MODID[497]:RTDM109*/ + [474] = {0xFFC42680U, 0x0000004BU}, /* RGIDW_MODID[498]:RTDM200*/ + [475] = {0xFFC42684U, 0x0000004BU}, /* RGIDW_MODID[499]:RTDM201*/ + [476] = {0xFFC42688U, 0x0000004BU}, /* RGIDW_MODID[500]:RTDM210*/ + [477] = {0xFFC4268CU, 0x0000004BU}, /* RGIDW_MODID[501]:RTDM211*/ + [478] = {0xFFC42690U, 0x0000004BU}, /* RGIDW_MODID[502]:RTDM212*/ + [479] = {0xFFC42694U, 0x0000004BU}, /* RGIDW_MODID[503]:RTDM213*/ + [480] = {0xFFC42698U, 0x0000004BU}, /* RGIDW_MODID[504]:RTDM214*/ + [481] = {0xFFC4269CU, 0x0000004BU}, /* RGIDW_MODID[505]:RTDM215*/ + [482] = {0xFFC426A0U, 0x0000004BU}, /* RGIDW_MODID[506]:RTDM202*/ + [483] = {0xFFC426A4U, 0x0000004BU}, /* RGIDW_MODID[507]:RTDM203*/ + [484] = {0xFFC426A8U, 0x0000004BU}, /* RGIDW_MODID[508]:RTDM204*/ + [485] = {0xFFC426ACU, 0x0000004BU}, /* RGIDW_MODID[509]:RTDM205*/ + [486] = {0xFFC426B0U, 0x0000004BU}, /* RGIDW_MODID[510]:RTDM206*/ + [487] = {0xFFC426B4U, 0x0000004BU}, /* RGIDW_MODID[511]:RTDM207*/ + [488] = {0xFFC426B8U, 0x0000004BU}, /* RGIDW_MODID[512]:RTDM208*/ + [489] = {0xFFC426BCU, 0x0000004BU}, /* RGIDW_MODID[513]:RTDM209*/ + [490] = {0xFFC426C0U, 0x0000004BU}, /* RGIDW_MODID[514]:RTDM300*/ + [491] = {0xFFC426C4U, 0x0000004BU}, /* RGIDW_MODID[515]:RTDM301*/ + [492] = {0xFFC426C8U, 0x0000004BU}, /* RGIDW_MODID[516]:RTDM310*/ + [493] = {0xFFC426CCU, 0x0000004BU}, /* RGIDW_MODID[517]:RTDM311*/ + [494] = {0xFFC426D0U, 0x0000004BU}, /* RGIDW_MODID[518]:RTDM312*/ + [495] = {0xFFC426D4U, 0x0000004BU}, /* RGIDW_MODID[519]:RTDM313*/ + [496] = {0xFFC426D8U, 0x0000004BU}, /* RGIDW_MODID[520]:RTDM314*/ + [497] = {0xFFC426DCU, 0x0000004BU}, /* RGIDW_MODID[521]:RTDM315*/ + [498] = {0xFFC426E0U, 0x0000004BU}, /* RGIDW_MODID[522]:RTDM302*/ + [499] = {0xFFC426E4U, 0x0000004BU}, /* RGIDW_MODID[523]:RTDM303*/ + [500] = {0xFFC426E8U, 0x0000004BU}, /* RGIDW_MODID[524]:RTDM304*/ + [501] = {0xFFC426ECU, 0x0000004BU}, /* RGIDW_MODID[525]:RTDM305*/ + [502] = {0xFFC426F0U, 0x0000004BU}, /* RGIDW_MODID[526]:RTDM306*/ + [503] = {0xFFC426F4U, 0x0000004BU}, /* RGIDW_MODID[527]:RTDM307*/ + [504] = {0xFFC426F8U, 0x0000004BU}, /* RGIDW_MODID[528]:RTDM308*/ + [505] = {0xFFC426FCU, 0x0000004BU}, /* RGIDW_MODID[529]:RTDM309*/ + [506] = {0xFFC42700U, 0x0000004EU}, /* RGIDW_MODID[530]:IPMMURT108*/ + [507] = {0xFFC42704U, 0x0000004EU}, /* RGIDW_MODID[531]:IPMMURT109*/ + [508] = {0xFFC42708U, 0x00000001U}, /* RGIDW_MODID[532]:SYSRAM01*/ + [509] = {0xFFC4270CU, 0x0000000BU}, /* RGIDW_MODID[533]:SYSRAM02*/ + [510] = {0xFFC42710U, 0x00000001U}, /* RGIDW_MODID[534]:SYSRAM03*/ + [511] = {0xFFC42714U, 0x00000001U}, /* RGIDW_MODID[535]:SYSRAM04*/ + [512] = {0xFFC42718U, 0x00000001U}, /* RGIDW_MODID[536]:SYSRAM05*/ + [513] = {0xFFC4271CU, 0x00000001U}, /* RGIDW_MODID[537]:SYSRAM06*/ + [514] = {0xFFC42720U, 0x00000000U}, /* RGIDW_MODID[538]:SYSRAM07*/ + [515] = {0xFFC42724U, 0x0000000BU}, /* RGIDW_MODID[539]:SYSRAM11*/ + [516] = {0xFFC42728U, 0x0000000AU}, /* RGIDW_MODID[540]:SYSRAM12*/ + [517] = {0xFFC4272CU, 0x0000000BU}, /* RGIDW_MODID[541]:SYSRAM13*/ + [518] = {0xFFC42730U, 0x0000000BU}, /* RGIDW_MODID[542]:SYSRAM14*/ + [519] = {0xFFC42734U, 0x0000000BU}, /* RGIDW_MODID[543]:SYSRAM15*/ + [520] = {0xFFC42738U, 0x0000000BU}, /* RGIDW_MODID[544]:SYSRAM16*/ + [521] = {0xFFC4273CU, 0x00000000U}, /* RGIDW_MODID[545]:SYSRAM17*/ + [522] = {0xFFC42760U, 0x00000002U}, /* RGIDW_MODID[546]:BKBUF*/ + [523] = {0xFFC42764U, 0x00000003U}, /* RGIDW_MODID[547]:AXICR52SS1*/ + [524] = {0xFFC42768U, 0x00000003U}, /* RGIDW_MODID[548]:AXICR52SS2*/ + [525] = {0xFF862400U, 0x00000002U}, /* RGIDW_MODID[549]:ARSC0*/ + /* After setting */ /* RGIDW_MODID[550]:ARSC1*/ + /* After setting */ /* RGIDW_MODID[551]:ARSC2*/ + [526] = {0xFF86240CU, 0x00000001U}, /* RGIDW_MODID[552]:ARSC3*/ + [527] = {0xFF862410U, 0x00000002U}, /* RGIDW_MODID[553]:ARSC4*/ + [528] = {0xFF862414U, 0x00000001U}, /* RGIDW_MODID[554]:ARSC5*/ + [529] = {0xFF862418U, 0x00000002U}, /* RGIDW_MODID[555]:ARSC6*/ + [530] = {0xFF86241CU, 0x00000002U}, /* RGIDW_MODID[556]:ARSC7*/ + [531] = {0xFF862420U, 0x00000000U}, /* RGIDW_MODID[557]:ARSC8*/ + [532] = {0xFF862424U, 0x00000002U}, /* RGIDW_MODID[558]:ARSTM0*/ + /* After setting */ /* RGIDW_MODID[559]:ARSTM1*/ + [533] = {0xFF86242CU, 0x0000000EU}, /* RGIDW_MODID[560]:CSD1S*/ + [534] = {0xFF862430U, 0x0000000EU}, /* RGIDW_MODID[561]:AXIFBABUSTOP0*/ + [535] = {0xFF862434U, 0x0000000EU}, /* RGIDW_MODID[562]:AXIFBABUSTOP1*/ + /* After setting */ /* RGIDW_MODID[563]:ARSTM2*/ + [536] = {0xFF86243CU, 0x00000001U}, /* RGIDW_MODID[564]:ARSTM3*/ + [537] = {0xFF862440U, 0x00000002U}, /* RGIDW_MODID[565]:ARSTM4*/ + [538] = {0xFF862444U, 0x00000001U}, /* RGIDW_MODID[566]:ARSTM5*/ + [539] = {0xFF862448U, 0x00000002U}, /* RGIDW_MODID[567]:ARSTM6*/ + [540] = {0xFF86244CU, 0x00000002U}, /* RGIDW_MODID[568]:ARSTM7*/ + [541] = {0xFF862450U, 0x00000000U}, /* RGIDW_MODID[569]:ARSTM8*/ + [542] = {0xFF862454U, 0x0000000AU}, /* RGIDW_MODID[570]:ECMTOP*/ + [543] = {0xFF862458U, 0x0000000EU}, /* RGIDW_MODID[571]:FBA*/ + [544] = {0xFF86245CU, 0x0000000EU}, /* RGIDW_MODID[572]:FBC*/ + [545] = {0xFF862460U, 0x0000000CU}, /* RGIDW_MODID[573]:AXICCI00*/ + [546] = {0xFF862464U, 0x0000000EU}, /* RGIDW_MODID[574]:AXICCI01*/ + [547] = {0xFF862468U, 0x0000000CU}, /* RGIDW_MODID[575]:AXICCI10*/ + [548] = {0xFF86246CU, 0x0000000CU}, /* RGIDW_MODID[576]:AXICCI11*/ + [549] = {0xFF862470U, 0x0000000CU}, /* RGIDW_MODID[577]:AXICCI12*/ + [550] = {0xFF862474U, 0x0000000CU}, /* RGIDW_MODID[578]:AXICCI13*/ + [551] = {0xFF862478U, 0x0000000CU}, /* RGIDW_MODID[579]:AXICCI14*/ + [552] = {0xFF86247CU, 0x0000000CU}, /* RGIDW_MODID[580]:AXICCI15*/ + [553] = {0xFF862480U, 0x0000000EU}, /* RGIDW_MODID[581]:AXICCI2*/ + [554] = {0xFF862484U, 0x0000000CU}, /* RGIDW_MODID[582]:AXICCI3*/ + [555] = {0xFF862488U, 0x0000000CU}, /* RGIDW_MODID[583]:AXICCI4*/ + [556] = {0xFF86248CU, 0x0000000CU}, /* RGIDW_MODID[584]:AXICCI5*/ + [557] = {0xFF862490U, 0x0000000CU}, /* RGIDW_MODID[585]:AXICCI6*/ + [558] = {0xFF862494U, 0x0000000CU}, /* RGIDW_MODID[586]:AXICCI7*/ + [559] = {0xFF862498U, 0x0000000CU}, /* RGIDW_MODID[587]:AXICCI8*/ + [560] = {0xFF86249CU, 0x00000009U}, /* RGIDW_MODID[588]:AXICCI9*/ + [561] = {0xFF8624A0U, 0x0000000AU}, /* RGIDW_MODID[589]:ECMSTM*/ + [562] = {0xE7782400U, 0x0000002CU}, /* RGIDW_MODID[590]:DMASSI00*/ + [563] = {0xE7782404U, 0x0000002CU}, /* RGIDW_MODID[591]:DMASSI01*/ + [564] = {0xE7782408U, 0x0000002CU}, /* RGIDW_MODID[592]:DMASSI02*/ + [565] = {0xE778240CU, 0x0000002CU}, /* RGIDW_MODID[593]:DMASSI03*/ + [566] = {0xE7782410U, 0x0000002CU}, /* RGIDW_MODID[594]:DMASSI04*/ + [567] = {0xE7782414U, 0x0000004EU}, /* RGIDW_MODID[595]:DMAI2C0*/ + [568] = {0xE7782418U, 0x0000004EU}, /* RGIDW_MODID[596]:DMAI2C1*/ + [569] = {0xE778241CU, 0x0000004EU}, /* RGIDW_MODID[597]:DMAI2C2*/ + [570] = {0xE7782420U, 0x0000004EU}, /* RGIDW_MODID[598]:DMAI2C3*/ + [571] = {0xE7782424U, 0x0000004EU}, /* RGIDW_MODID[599]:DMAI2C4*/ + [572] = {0xE7782428U, 0x0000004EU}, /* RGIDW_MODID[600]:DMAI2C5*/ + [573] = {0xE778242CU, 0x0000002CU}, /* RGIDW_MODID[601]:DMASSI05*/ + [574] = {0xE7782430U, 0x0000002CU}, /* RGIDW_MODID[602]:DMASSI06*/ + [575] = {0xE7782434U, 0x0000002CU}, /* RGIDW_MODID[603]:DMASSI07*/ + [576] = {0xE67C2400U, 0x00000002U}, /* RGIDW_MODID[604]:ARMM*/ + /* After setting */ /* RGIDW_MODID[605]:AXIARNMM*/ + [577] = {0xE67C2408U, 0x00000002U}, /* RGIDW_MODID[606]:ARSM0*/ + /* After setting */ /* RGIDW_MODID[607]:ARSM1*/ + /* After setting */ /* RGIDW_MODID[608]:ARSM2*/ + [578] = {0xE67C2414U, 0x0000000FU}, /* RGIDW_MODID[609]:AXIQOS0*/ + [579] = {0xE67C2418U, 0x0000000FU}, /* RGIDW_MODID[610]:AXIQOS1*/ + [580] = {0xE67C241CU, 0x0000000FU}, /* RGIDW_MODID[611]:AXIQOS2*/ + [581] = {0xE67C2420U, 0x0000000FU}, /* RGIDW_MODID[612]:AXIQOS3*/ + [582] = {0xE67C2424U, 0x0000000FU}, /* RGIDW_MODID[613]:AXIQOS4*/ + [583] = {0xE67C2428U, 0x0000000FU}, /* RGIDW_MODID[614]:AXIQOS5*/ + [584] = {0xE67C242CU, 0x0000000FU}, /* RGIDW_MODID[615]:AXIQOS6*/ + [585] = {0xE67C2430U, 0x0000000FU}, /* RGIDW_MODID[616]:AXIQOS7*/ + [586] = {0xE67C2434U, 0x00000001U}, /* RGIDW_MODID[617]:ARSM3*/ + [587] = {0xE67C2438U, 0x00000002U}, /* RGIDW_MODID[618]:ARSM4*/ + [588] = {0xE67C243CU, 0x00000001U}, /* RGIDW_MODID[619]:ARSM5*/ + [589] = {0xE67C2440U, 0x00000002U}, /* RGIDW_MODID[620]:ARSM6*/ + [590] = {0xE67C2444U, 0x00000002U}, /* RGIDW_MODID[621]:ARSM7*/ + [591] = {0xE67C2448U, 0x00000000U}, /* RGIDW_MODID[622]:ARSM8*/ + [592] = {0xE67C244CU, 0x0000000BU}, /* RGIDW_MODID[623]:AXMM0*/ + [593] = {0xE67C2450U, 0x0000000BU}, /* RGIDW_MODID[624]:AXMM1*/ + [594] = {0xE67C2454U, 0x00000000U}, /* RGIDW_MODID[625]:AXMMPMON*/ + [595] = {0xE67C2458U, 0x0000000AU}, /* RGIDW_MODID[626]:CKMMM*/ + [596] = {0xE67C245CU, 0x0000000AU}, /* RGIDW_MODID[627]:ECMMM*/ + [597] = {0xE67C2460U, 0x0000000EU}, /* RGIDW_MODID[628]:FBADBSC0*/ + [598] = {0xE67C2464U, 0x0000000EU}, /* RGIDW_MODID[629]:FBADBSC1*/ + [599] = {0xE67C2468U, 0x0000000EU}, /* RGIDW_MODID[630]:FBAMM*/ + [600] = {0xE67C246CU, 0x0000004EU}, /* RGIDW_MODID[631]:IPMMUMM00*/ + [601] = {0xE67C2470U, 0x0000000FU}, /* RGIDW_MODID[632]:DBS0A0*/ + [602] = {0xE67C2474U, 0x0000000AU}, /* RGIDW_MODID[633]:DBS0A1*/ + [603] = {0xE67C2478U, 0x0000000FU}, /* RGIDW_MODID[634]:DBS1A0*/ + [604] = {0xE67C247CU, 0x0000000AU}, /* RGIDW_MODID[635]:DBS1A1*/ + [605] = {0xE67C2480U, 0x0000000FU}, /* RGIDW_MODID[636]:AXCIDBS*/ + [606] = {0xE67C2484U, 0x00000009U}, /* RGIDW_MODID[637]:FCPRC*/ + [607] = {0xE67C2488U, 0x0000000FU}, /* RGIDW_MODID[638]:DBS0D0*/ + [608] = {0xE67C248CU, 0x0000000AU}, /* RGIDW_MODID[639]:DBS0D1*/ + [609] = {0xE67C2490U, 0x0000000FU}, /* RGIDW_MODID[640]:DBS1D0*/ + [610] = {0xE67C2494U, 0x0000000AU}, /* RGIDW_MODID[641]:DBS1D1*/ + [611] = {0xE67C2498U, 0x0000000EU}, /* RGIDW_MODID[642]:FBADDR*/ + [612] = {0xE67C249CU, 0x0000004EU}, /* RGIDW_MODID[643]:IPMMUMM01*/ + [613] = {0xE67C24A0U, 0x0000004EU}, /* RGIDW_MODID[644]:IPMMUMM10*/ + [614] = {0xE67C24A4U, 0x0000004EU}, /* RGIDW_MODID[645]:IPMMUMM11*/ + [615] = {0xE67C24A8U, 0x0000004EU}, /* RGIDW_MODID[646]:IPMMUMM12*/ + [616] = {0xE67C24ACU, 0x0000004EU}, /* RGIDW_MODID[647]:IPMMUMM13*/ + [617] = {0xE67C24B0U, 0x0000004EU}, /* RGIDW_MODID[648]:IPMMUMM14*/ + [618] = {0xE67C24B4U, 0x0000004EU}, /* RGIDW_MODID[649]:IPMMUMM15*/ + [619] = {0xE67C24B8U, 0x0000004EU}, /* RGIDW_MODID[650]:IPMMUMM02*/ + [620] = {0xE67C24BCU, 0x0000004EU}, /* RGIDW_MODID[651]:IPMMUMM03*/ + [621] = {0xE67C24C0U, 0x0000004EU}, /* RGIDW_MODID[652]:IPMMUMM04*/ + [622] = {0xE67C24C4U, 0x0000004EU}, /* RGIDW_MODID[653]:IPMMUMM05*/ + [623] = {0xE67C24C8U, 0x0000004EU}, /* RGIDW_MODID[654]:IPMMUMM06*/ + [624] = {0xE67C24CCU, 0x0000004EU}, /* RGIDW_MODID[655]:IPMMUMM07*/ + [625] = {0xE67C24D0U, 0x0000004EU}, /* RGIDW_MODID[656]:IPMMUMM08*/ + [626] = {0xE67C24D4U, 0x0000004EU}, /* RGIDW_MODID[657]:IPMMUMM09*/ + [627] = {0xFF802400U, 0x00000002U}, /* RGIDW_MODID[658]:ARSN0*/ + /* After setting */ /* RGIDW_MODID[659]:ARSN1*/ + /* After setting */ /* RGIDW_MODID[660]:ARSN2*/ + [628] = {0xFF80240CU, 0x00000001U}, /* RGIDW_MODID[661]:ARSN3*/ + [629] = {0xFF802410U, 0x00000002U}, /* RGIDW_MODID[662]:ARSN4*/ + [630] = {0xFF802414U, 0x00000001U}, /* RGIDW_MODID[663]:ARSN5*/ + [631] = {0xFF802418U, 0x00000002U}, /* RGIDW_MODID[664]:ARSN6*/ + [632] = {0xFF80241CU, 0x00000002U}, /* RGIDW_MODID[665]:ARSN7*/ + [633] = {0xFF802420U, 0x00000000U}, /* RGIDW_MODID[666]:ARSN8*/ + [634] = {0xFF802424U, 0x0000000AU}, /* RGIDW_MODID[667]:ECMTOP3*/ + [635] = {0xE7752400U, 0x00000002U}, /* RGIDW_MODID[668]:ARSD00*/ + /* After setting */ /* RGIDW_MODID[669]:ARSD01*/ + /* After setting */ /* RGIDW_MODID[670]:ARSD02*/ + [636] = {0xE775240CU, 0x00000001U}, /* RGIDW_MODID[671]:ARSD03*/ + [637] = {0xE7752410U, 0x00000002U}, /* RGIDW_MODID[672]:ARSD04*/ + [638] = {0xE7752414U, 0x00000001U}, /* RGIDW_MODID[673]:ARSD05*/ + [639] = {0xE7752418U, 0x00000002U}, /* RGIDW_MODID[674]:ARSD06*/ + [640] = {0xE775241CU, 0x0000004AU}, /* RGIDW_MODID[675]:AXIFRAY*/ + [641] = {0xE7752420U, 0x0000000FU}, /* RGIDW_MODID[676]:AXIIPC*/ + [642] = {0xE7752428U, 0x0000004FU}, /* RGIDW_MODID[677]:AXIRPC*/ + [643] = {0xE775242CU, 0x0000000FU}, /* RGIDW_MODID[678]:AXISDHI0*/ + [644] = {0xE7752430U, 0x00000002U}, /* RGIDW_MODID[679]:ARSD07*/ + [645] = {0xE7752434U, 0x00000000U}, /* RGIDW_MODID[680]:ARSD08*/ + [646] = {0xE7752438U, 0x00000002U}, /* RGIDW_MODID[681]:ARSP00*/ + /* After setting */ /* RGIDW_MODID[682]:ARSP01*/ + /* After setting */ /* RGIDW_MODID[683]:ARSP02*/ + [647] = {0xE7752444U, 0x00000001U}, /* RGIDW_MODID[684]:ARSP03*/ + [648] = {0xE7752448U, 0x00000002U}, /* RGIDW_MODID[685]:ARSP04*/ + [649] = {0xE775244CU, 0x00000001U}, /* RGIDW_MODID[686]:ARSP05*/ + [650] = {0xE7752450U, 0x00000002U}, /* RGIDW_MODID[687]:ARSP06*/ + [651] = {0xE7752454U, 0x00000002U}, /* RGIDW_MODID[688]:ARSP07*/ + [652] = {0xE7752458U, 0x00000000U}, /* RGIDW_MODID[689]:ARSP08*/ + [653] = {0xE775245CU, 0x0000004EU}, /* RGIDW_MODID[690]:IPMMUDS001*/ + [654] = {0xE7752460U, 0x0000000AU}, /* RGIDW_MODID[691]:CKMPER0*/ + [655] = {0xE7752464U, 0x0000000AU}, /* RGIDW_MODID[692]:ECMPER0*/ + [656] = {0xE7752468U, 0x0000000EU}, /* RGIDW_MODID[693]:FBAPER0*/ + [657] = {0xE775246CU, 0x0000004EU}, /* RGIDW_MODID[694]:FSO0*/ + [658] = {0xE7752470U, 0x0000004EU}, /* RGIDW_MODID[695]:FSO1*/ + [659] = {0xE7752474U, 0x0000004EU}, /* RGIDW_MODID[696]:FSO10*/ + [660] = {0xE7752478U, 0x0000004EU}, /* RGIDW_MODID[697]:FSO2*/ + [661] = {0xE775247CU, 0x0000004EU}, /* RGIDW_MODID[698]:FSO3*/ + [662] = {0xE7752480U, 0x0000004EU}, /* RGIDW_MODID[699]:FSO4*/ + [663] = {0xE7752484U, 0x0000004EU}, /* RGIDW_MODID[700]:FSO5*/ + [664] = {0xE7752488U, 0x0000004EU}, /* RGIDW_MODID[701]:FSO6*/ + [665] = {0xE775248CU, 0x0000004EU}, /* RGIDW_MODID[702]:FSO7*/ + [666] = {0xE7752490U, 0x0000004EU}, /* RGIDW_MODID[703]:FSO8*/ + [667] = {0xE7752494U, 0x0000004EU}, /* RGIDW_MODID[704]:FSO9*/ + [668] = {0xE7752498U, 0x0000002CU}, /* RGIDW_MODID[705]:ADG*/ + [669] = {0xE775249CU, 0x0000000AU}, /* RGIDW_MODID[706]:ECMSD0*/ + [670] = {0xE77524A0U, 0x0000004EU}, /* RGIDW_MODID[707]:IPMMUDS010*/ + [671] = {0xE77524A4U, 0x0000004EU}, /* RGIDW_MODID[708]:IPMMUDS011*/ + [672] = {0xE77524A8U, 0x0000004EU}, /* RGIDW_MODID[709]:I2C0*/ + [673] = {0xE77524ACU, 0x0000004EU}, /* RGIDW_MODID[710]:I2C1*/ + [674] = {0xE77524B0U, 0x0000004EU}, /* RGIDW_MODID[711]:I2C2*/ + [675] = {0xE77524B4U, 0x0000004EU}, /* RGIDW_MODID[712]:I2C3*/ + [676] = {0xE77524B8U, 0x0000004EU}, /* RGIDW_MODID[713]:I2C4*/ + [677] = {0xE77524BCU, 0x0000004EU}, /* RGIDW_MODID[714]:I2C5*/ + [678] = {0xE77524C0U, 0x0000004EU}, /* RGIDW_MODID[715]:IPMMUDS012*/ + [679] = {0xE77524C4U, 0x0000000FU}, /* RGIDW_MODID[716]:IPC*/ + [680] = {0xE77524C8U, 0x0000004EU}, /* RGIDW_MODID[717]:IPMMUDS000*/ + [681] = {0xE77524CCU, 0x0000004EU}, /* RGIDW_MODID[718]:IPMMUDS013*/ + [682] = {0xE77524D0U, 0x0000004EU}, /* RGIDW_MODID[719]:IPMMUDS014*/ + [683] = {0xE77524D4U, 0x0000004EU}, /* RGIDW_MODID[720]:IPMMUDS015*/ + [684] = {0xE77524D8U, 0x0000004EU}, /* RGIDW_MODID[721]:IPMMUDS002*/ + [685] = {0xE77524DCU, 0x0000004EU}, /* RGIDW_MODID[722]:IPMMUDS003*/ + [686] = {0xE77524E0U, 0x0000004EU}, /* RGIDW_MODID[723]:IPMMUDS004*/ + [687] = {0xE77524E4U, 0x0000004EU}, /* RGIDW_MODID[724]:IPMMUDS005*/ + [688] = {0xE77524E8U, 0x0000002CU}, /* RGIDW_MODID[725]:SSI*/ + [689] = {0xE77524ECU, 0x0000004EU}, /* RGIDW_MODID[726]:IPMMUDS006*/ + [690] = {0xE77524F0U, 0x0000004EU}, /* RGIDW_MODID[727]:IPMMUDS007*/ + [691] = {0xE77524F4U, 0x0000000CU}, /* RGIDW_MODID[728]:SYDM1P*/ + [692] = {0xE77524F8U, 0x0000004EU}, /* RGIDW_MODID[729]:IPMMUDS008*/ + [693] = {0xE77524FCU, 0x0000000CU}, /* RGIDW_MODID[730]:SYDM2P*/ + [694] = {0xE7752500U, 0x0000004EU}, /* RGIDW_MODID[731]:IPMMUDS009*/ + [695] = {0xE7752640U, 0x0000000CU}, /* RGIDW_MODID[732]:SYDM100*/ + [696] = {0xE7752644U, 0x0000000CU}, /* RGIDW_MODID[733]:SYDM101*/ + [697] = {0xE7752648U, 0x0000000CU}, /* RGIDW_MODID[734]:SYDM110*/ + [698] = {0xE775264CU, 0x0000000CU}, /* RGIDW_MODID[735]:SYDM111*/ + [699] = {0xE7752650U, 0x0000000CU}, /* RGIDW_MODID[736]:SYDM112*/ + [700] = {0xE7752654U, 0x0000000CU}, /* RGIDW_MODID[737]:SYDM113*/ + [701] = {0xE7752658U, 0x0000000CU}, /* RGIDW_MODID[738]:SYDM114*/ + [702] = {0xE775265CU, 0x0000000CU}, /* RGIDW_MODID[739]:SYDM115*/ + [703] = {0xE7752660U, 0x0000000CU}, /* RGIDW_MODID[740]:SYDM102*/ + [704] = {0xE7752664U, 0x0000000CU}, /* RGIDW_MODID[741]:SYDM103*/ + [705] = {0xE7752668U, 0x0000000CU}, /* RGIDW_MODID[742]:SYDM104*/ + [706] = {0xE775266CU, 0x0000000CU}, /* RGIDW_MODID[743]:SYDM105*/ + [707] = {0xE7752670U, 0x0000000CU}, /* RGIDW_MODID[744]:SYDM106*/ + [708] = {0xE7752674U, 0x0000000CU}, /* RGIDW_MODID[745]:SYDM107*/ + [709] = {0xE7752678U, 0x0000000CU}, /* RGIDW_MODID[746]:SYDM108*/ + [710] = {0xE775267CU, 0x0000000CU}, /* RGIDW_MODID[747]:SYDM109*/ + [711] = {0xE7752680U, 0x0000000CU}, /* RGIDW_MODID[748]:SYDM200*/ + [712] = {0xE7752684U, 0x0000000CU}, /* RGIDW_MODID[749]:SYDM201*/ + [713] = {0xE7752688U, 0x0000000CU}, /* RGIDW_MODID[750]:SYDM210*/ + [714] = {0xE775268CU, 0x0000000CU}, /* RGIDW_MODID[751]:SYDM211*/ + [715] = {0xE7752690U, 0x0000000CU}, /* RGIDW_MODID[752]:SYDM212*/ + [716] = {0xE7752694U, 0x0000000CU}, /* RGIDW_MODID[753]:SYDM213*/ + [717] = {0xE7752698U, 0x0000000CU}, /* RGIDW_MODID[754]:SYDM214*/ + [718] = {0xE775269CU, 0x0000000CU}, /* RGIDW_MODID[755]:SYDM215*/ + [719] = {0xE77526A0U, 0x0000000CU}, /* RGIDW_MODID[756]:SYDM202*/ + [720] = {0xE77526A4U, 0x0000000CU}, /* RGIDW_MODID[757]:SYDM203*/ + [721] = {0xE77526A8U, 0x0000000CU}, /* RGIDW_MODID[758]:SYDM204*/ + [722] = {0xE77526ACU, 0x0000000CU}, /* RGIDW_MODID[759]:SYDM205*/ + [723] = {0xE77526B0U, 0x0000000CU}, /* RGIDW_MODID[760]:SYDM206*/ + [724] = {0xE77526B4U, 0x0000000CU}, /* RGIDW_MODID[761]:SYDM207*/ + [725] = {0xE77526B8U, 0x0000000CU}, /* RGIDW_MODID[762]:SYDM208*/ + [726] = {0xE77526BCU, 0x0000000CU}, /* RGIDW_MODID[763]:SYDM209*/ + [727] = {0xFE682400U, 0x00000002U}, /* RGIDW_MODID[764]:ARVC0*/ + /* After setting */ /* RGIDW_MODID[765]:ARVC1*/ + /* After setting */ /* RGIDW_MODID[766]:ARVC2*/ + [728] = {0xFE68240CU, 0x00000001U}, /* RGIDW_MODID[767]:ARVC3*/ + [729] = {0xFE682410U, 0x0000000EU}, /* RGIDW_MODID[768]:AXIFBABUSVC*/ + [730] = {0xFE682414U, 0x00000002U}, /* RGIDW_MODID[769]:ARVC4*/ + [731] = {0xFE682418U, 0x00000001U}, /* RGIDW_MODID[770]:ARVC5*/ + [732] = {0xFE68241CU, 0x00000002U}, /* RGIDW_MODID[771]:ARVC6*/ + [733] = {0xFE682420U, 0x00000002U}, /* RGIDW_MODID[772]:ARVC7*/ + [734] = {0xFE682424U, 0x00000000U}, /* RGIDW_MODID[773]:ARVC8*/ + [735] = {0xFE682428U, 0x0000000AU}, /* RGIDW_MODID[774]:CKMVC*/ + [736] = {0xFE68242CU, 0x0000000AU}, /* RGIDW_MODID[775]:ECMVC0*/ + [737] = {0xFE682430U, 0x0000004EU}, /* RGIDW_MODID[776]:IMR2*/ + [738] = {0xFE682434U, 0x0000004EU}, /* RGIDW_MODID[777]:IMR0*/ + [739] = {0xFE682438U, 0x0000004EU}, /* RGIDW_MODID[778]:IMR1*/ + [740] = {0xFE68243CU, 0x0000004EU}, /* RGIDW_MODID[779]:IPMMUVC01*/ + [741] = {0xFE682440U, 0x0000004EU}, /* RGIDW_MODID[780]:IPMMUVC10*/ + [742] = {0xFE682444U, 0x0000000CU}, /* RGIDW_MODID[781]:IMS0*/ + [743] = {0xFE682448U, 0x0000000CU}, /* RGIDW_MODID[782]:IMS1*/ + [744] = {0xFE68244CU, 0x0000004EU}, /* RGIDW_MODID[783]:IPMMUVC00*/ + [745] = {0xFE682450U, 0x0000004EU}, /* RGIDW_MODID[784]:IPMMUVC11*/ + [746] = {0xFE682454U, 0x0000004EU}, /* RGIDW_MODID[785]:IPMMUVC12*/ + [747] = {0xFE682458U, 0x0000004EU}, /* RGIDW_MODID[786]:IPMMUVC13*/ + [748] = {0xFE68245CU, 0x0000004EU}, /* RGIDW_MODID[787]:IPMMUVC14*/ + [749] = {0xFE682460U, 0x0000004EU}, /* RGIDW_MODID[788]:IPMMUVC15*/ + [750] = {0xFE682464U, 0x0000004EU}, /* RGIDW_MODID[789]:IPMMUVC02*/ + [751] = {0xFE682468U, 0x0000004EU}, /* RGIDW_MODID[790]:IPMMUVC03*/ + [752] = {0xFE68246CU, 0x0000004EU}, /* RGIDW_MODID[791]:IPMMUVC04*/ + [753] = {0xFE682470U, 0x0000004EU}, /* RGIDW_MODID[792]:IPMMUVC05*/ + [754] = {0xFE682474U, 0x0000004EU}, /* RGIDW_MODID[793]:IPMMUVC06*/ + [755] = {0xFE682478U, 0x0000004EU}, /* RGIDW_MODID[794]:IPMMUVC07*/ + [756] = {0xFE68247CU, 0x0000004EU}, /* RGIDW_MODID[795]:IPMMUVC08*/ + [757] = {0xFE682480U, 0x0000004EU}, /* RGIDW_MODID[796]:IPMMUVC09*/ + [758] = {0xFE682484U, 0x00000028U}, /* RGIDW_MODID[797]:IV1ES*/ + [759] = {0xFEBE2400U, 0x0000004EU}, /* RGIDW_MODID[798]:CSITOP0*/ + [760] = {0xFEBE2404U, 0x00000002U}, /* RGIDW_MODID[799]:ARVI10*/ + /* After setting */ /* RGIDW_MODID[800]:ARVI11*/ + /* After setting */ /* RGIDW_MODID[801]:ARVI12*/ + [761] = {0xFEBE2410U, 0x00000001U}, /* RGIDW_MODID[802]:ARVI13*/ + [762] = {0xFEBE2414U, 0x00000002U}, /* RGIDW_MODID[803]:ARVI14*/ + [763] = {0xFEBE2418U, 0x00000001U}, /* RGIDW_MODID[804]:ARVI15*/ + [764] = {0xFEBE241CU, 0x00000002U}, /* RGIDW_MODID[805]:ARVI16*/ + [765] = {0xFEBE2420U, 0x00000002U}, /* RGIDW_MODID[806]:ARVI17*/ + [766] = {0xFEBE2424U, 0x00000000U}, /* RGIDW_MODID[807]:ARVI18*/ + [767] = {0xFEBE2428U, 0x0000000AU}, /* RGIDW_MODID[808]:CKMVIO*/ + [768] = {0xFEBE242CU, 0x0000004EU}, /* RGIDW_MODID[809]:CSITOP1*/ + [769] = {0xFEBE2434U, 0x0000004EU}, /* RGIDW_MODID[810]:DSITLINK0*/ + [770] = {0xFEBE2438U, 0x0000004EU}, /* RGIDW_MODID[811]:DSITLINK1*/ + [771] = {0xFEBE243CU, 0x0000000AU}, /* RGIDW_MODID[812]:ECMVIO1*/ + [772] = {0xFEBE2444U, 0x0000004EU}, /* RGIDW_MODID[813]:IPMMUVI001*/ + [773] = {0xFEBE2448U, 0x0000000CU}, /* RGIDW_MODID[814]:FCPVX0*/ + [774] = {0xFEBE244CU, 0x0000000CU}, /* RGIDW_MODID[815]:FCPVX1*/ + [775] = {0xFEBE2458U, 0x0000004EU}, /* RGIDW_MODID[816]:IPMMUVI000*/ + [776] = {0xFEBE245CU, 0x0000004EU}, /* RGIDW_MODID[817]:IPMMUVI100*/ + [777] = {0xFEBE2460U, 0x0000004EU}, /* RGIDW_MODID[818]:IPMMUVI010*/ + [778] = {0xFEBE2464U, 0x0000004EU}, /* RGIDW_MODID[819]:IPMMUVI011*/ + [779] = {0xFEBE2468U, 0x0000004EU}, /* RGIDW_MODID[820]:VSPX0*/ + [780] = {0xFEBE246CU, 0x0000004EU}, /* RGIDW_MODID[821]:VSPX1*/ + [781] = {0xFEBE2478U, 0x0000004EU}, /* RGIDW_MODID[822]:IPMMUVI012*/ + [782] = {0xFEBE247CU, 0x0000004EU}, /* RGIDW_MODID[823]:IPMMUVI013*/ + [783] = {0xFEBE2480U, 0x0000004EU}, /* RGIDW_MODID[824]:IPMMUVI014*/ + [784] = {0xFEBE2484U, 0x0000004EU}, /* RGIDW_MODID[825]:IPMMUVI015*/ + [785] = {0xFEBE2488U, 0x0000004EU}, /* RGIDW_MODID[826]:IPMMUVI002*/ + [786] = {0xFEBE248CU, 0x0000004EU}, /* RGIDW_MODID[827]:IPMMUVI003*/ + [787] = {0xFEBE2490U, 0x0000004EU}, /* RGIDW_MODID[828]:IPMMUVI004*/ + [788] = {0xFEBE2494U, 0x0000004EU}, /* RGIDW_MODID[829]:IPMMUVI005*/ + [789] = {0xFEBE2498U, 0x0000004EU}, /* RGIDW_MODID[830]:IPMMUVI006*/ + [790] = {0xFEBE249CU, 0x0000004EU}, /* RGIDW_MODID[831]:IPMMUVI007*/ + [791] = {0xFEBE24A0U, 0x0000004EU}, /* RGIDW_MODID[832]:IPMMUVI008*/ + [792] = {0xFEBE24A4U, 0x0000004EU}, /* RGIDW_MODID[833]:IPMMUVI009*/ + [793] = {0xFEBE24A8U, 0x0000004EU}, /* RGIDW_MODID[834]:IPMMUVI101*/ + [794] = {0xFEBE24ACU, 0x0000004EU}, /* RGIDW_MODID[835]:IPMMUVI110*/ + [795] = {0xFEBE24B0U, 0x0000004EU}, /* RGIDW_MODID[836]:IPMMUVI111*/ + [796] = {0xFEBE24B4U, 0x0000004EU}, /* RGIDW_MODID[837]:IPMMUVI112*/ + [797] = {0xFEBE24B8U, 0x0000004EU}, /* RGIDW_MODID[838]:IPMMUVI113*/ + [798] = {0xFEBE24BCU, 0x0000004EU}, /* RGIDW_MODID[839]:IPMMUVI114*/ + [799] = {0xFEBE24C0U, 0x0000004EU}, /* RGIDW_MODID[840]:IPMMUVI115*/ + [800] = {0xFEBE24C4U, 0x0000004EU}, /* RGIDW_MODID[841]:IPMMUVI102*/ + [801] = {0xFEBE24C8U, 0x0000004EU}, /* RGIDW_MODID[842]:IPMMUVI103*/ + [802] = {0xFEBE24CCU, 0x0000004EU}, /* RGIDW_MODID[843]:IPMMUVI104*/ + [803] = {0xFEBE24D0U, 0x0000004EU}, /* RGIDW_MODID[844]:IPMMUVI105*/ + [804] = {0xFEBE24D4U, 0x0000004EU}, /* RGIDW_MODID[845]:IPMMUVI106*/ + [805] = {0xFEBE24D8U, 0x0000004EU}, /* RGIDW_MODID[846]:IPMMUVI107*/ + [806] = {0xFEBE24DCU, 0x0000004EU}, /* RGIDW_MODID[847]:IPMMUVI108*/ + [807] = {0xFEBE24E0U, 0x0000004EU}, /* RGIDW_MODID[848]:IPMMUVI109*/ + [808] = {0xFEBE2504U, 0x0000000EU}, /* RGIDW_MODID[849]:AXIFBABUSVIO*/ + [809] = {0xFEBF2400U, 0x00000002U}, /* RGIDW_MODID[850]:ARVI0*/ + /* After setting */ /* RGIDW_MODID[851]:ARVI1*/ + /* After setting */ /* RGIDW_MODID[852]:ARVI2*/ + [810] = {0xFEBF240CU, 0x00000001U}, /* RGIDW_MODID[853]:ARVI3*/ + [811] = {0xFEBF2410U, 0x00000002U}, /* RGIDW_MODID[854]:ARVI4*/ + [812] = {0xFEBF2414U, 0x00000001U}, /* RGIDW_MODID[855]:ARVI5*/ + [813] = {0xFEBF2418U, 0x00000002U}, /* RGIDW_MODID[856]:ARVI6*/ + [814] = {0xFEBF241CU, 0x00000002U}, /* RGIDW_MODID[857]:ARVI7*/ + [815] = {0xFEBF2420U, 0x00000000U}, /* RGIDW_MODID[858]:ARVI8*/ + [816] = {0xFEBF2424U, 0x0000000AU}, /* RGIDW_MODID[859]:ECMVIO0*/ + [817] = {0xFEBF2428U, 0x0000004EU}, /* RGIDW_MODID[860]:ISP0*/ + [818] = {0xFEBF242CU, 0x0000004EU}, /* RGIDW_MODID[861]:ISP0CORE*/ + [819] = {0xFEBF2430U, 0x0000004EU}, /* RGIDW_MODID[862]:ISP1*/ + [820] = {0xFEBF2434U, 0x0000004EU}, /* RGIDW_MODID[863]:ISP1CORE*/ + [821] = {0xFEBF2454U, 0x0000004EU}, /* RGIDW_MODID[864]:VIN00*/ + [822] = {0xFEBF2458U, 0x0000004EU}, /* RGIDW_MODID[865]:VIN01*/ + [823] = {0xFEBF245CU, 0x0000004EU}, /* RGIDW_MODID[866]:VIN02*/ + [824] = {0xFEBF2460U, 0x0000004EU}, /* RGIDW_MODID[867]:VIN03*/ + [825] = {0xFEBF2464U, 0x0000004EU}, /* RGIDW_MODID[868]:VIN04*/ + [826] = {0xFEBF2468U, 0x0000004EU}, /* RGIDW_MODID[869]:VIN05*/ + [827] = {0xFEBF246CU, 0x0000004EU}, /* RGIDW_MODID[870]:VIN06*/ + [828] = {0xFEBF2470U, 0x0000004EU}, /* RGIDW_MODID[871]:VIN07*/ + [829] = {0xFEBF2474U, 0x0000004EU}, /* RGIDW_MODID[872]:VIN10*/ + [830] = {0xFEBF2478U, 0x0000004EU}, /* RGIDW_MODID[873]:VIN11*/ + [831] = {0xFEBF247CU, 0x0000004EU}, /* RGIDW_MODID[874]:VIN12*/ + [832] = {0xFEBF2480U, 0x0000004EU}, /* RGIDW_MODID[875]:VIN13*/ + [833] = {0xFEBF2484U, 0x0000004EU}, /* RGIDW_MODID[876]:VIN14*/ + [834] = {0xFEBF2488U, 0x0000004EU}, /* RGIDW_MODID[877]:VIN15*/ + [835] = {0xFEBF248CU, 0x0000004EU}, /* RGIDW_MODID[878]:VIN16*/ + [836] = {0xFEBF2490U, 0x0000004EU}, /* RGIDW_MODID[879]:VIN17*/ + [837] = {0xE7B12400U, 0x00000002U}, /* RGIDW_MODID[880]:ARVIP00*/ + /* After setting */ /* RGIDW_MODID[881]:ARVIP01*/ + /* After setting */ /* RGIDW_MODID[882]:ARVIP02*/ + [838] = {0xE7B1240CU, 0x00000001U}, /* RGIDW_MODID[883]:ARVIP03*/ + [839] = {0xE7B12410U, 0x0000000EU}, /* RGIDW_MODID[884]:AXIFBABUSVIP0*/ + [840] = {0xE7B12414U, 0x00000002U}, /* RGIDW_MODID[885]:ARVIP04*/ + [841] = {0xE7B12418U, 0x00000001U}, /* RGIDW_MODID[886]:ARVIP05*/ + [842] = {0xE7B1241CU, 0x00000002U}, /* RGIDW_MODID[887]:ARVIP06*/ + [843] = {0xE7B12420U, 0x00000002U}, /* RGIDW_MODID[888]:ARVIP07*/ + [844] = {0xE7B12424U, 0x00000000U}, /* RGIDW_MODID[889]:ARVIP08*/ + [845] = {0xE7B12428U, 0x0000000AU}, /* RGIDW_MODID[890]:CKMVIP*/ + [846] = {0xE7B1242CU, 0x0000000AU}, /* RGIDW_MODID[891]:ECMVIP0*/ + [847] = {0xE7B12430U, 0x0000004EU}, /* RGIDW_MODID[892]:IPMMUVIP000*/ + [848] = {0xE7B12438U, 0x0000004EU}, /* RGIDW_MODID[893]:SMPO0*/ + [849] = {0xE7B1243CU, 0x0000004EU}, /* RGIDW_MODID[894]:SMPS0*/ + [850] = {0xE7B12440U, 0x0000000CU}, /* RGIDW_MODID[895]:UMFL0*/ + [851] = {0xE7B12444U, 0x0000004EU}, /* RGIDW_MODID[896]:IPMMUVIP001*/ + [852] = {0xE7B12448U, 0x0000004EU}, /* RGIDW_MODID[897]:IPMMUVIP010*/ + [853] = {0xE7B1244CU, 0x0000004EU}, /* RGIDW_MODID[898]:IPMMUVIP011*/ + [854] = {0xE7B12450U, 0x0000004EU}, /* RGIDW_MODID[899]:UMFL0M_W*/ + [855] = {0xE7B12454U, 0x0000004EU}, /* RGIDW_MODID[900]:IPMMUVIP012*/ + [856] = {0xE7B12458U, 0x0000004EU}, /* RGIDW_MODID[901]:IPMMUVIP013*/ + [857] = {0xE7B1245CU, 0x0000004EU}, /* RGIDW_MODID[902]:IPMMUVIP014*/ + [858] = {0xE7B12460U, 0x0000004EU}, /* RGIDW_MODID[903]:IPMMUVIP015*/ + [859] = {0xE7B12464U, 0x0000004EU}, /* RGIDW_MODID[904]:IPMMUVIP002*/ + [860] = {0xE7B12468U, 0x0000004EU}, /* RGIDW_MODID[905]:IPMMUVIP003*/ + [861] = {0xE7B1246CU, 0x0000004EU}, /* RGIDW_MODID[906]:IPMMUVIP004*/ + [862] = {0xE7B12470U, 0x0000004EU}, /* RGIDW_MODID[907]:IPMMUVIP005*/ + [863] = {0xE7B12474U, 0x0000004EU}, /* RGIDW_MODID[908]:IPMMUVIP006*/ + [864] = {0xE7B12478U, 0x0000004EU}, /* RGIDW_MODID[909]:IPMMUVIP007*/ + [865] = {0xE7B1247CU, 0x0000004EU}, /* RGIDW_MODID[910]:IPMMUVIP008*/ + [866] = {0xE7B12480U, 0x0000004EU}, /* RGIDW_MODID[911]:IPMMUVIP009*/ + [867] = {0xE7B42400U, 0x00000002U}, /* RGIDW_MODID[912]:ARVIP10*/ + /* After setting */ /* RGIDW_MODID[913]:ARVIP11*/ + /* After setting */ /* RGIDW_MODID[914]:ARVIP12*/ + [868] = {0xE7B4240CU, 0x00000001U}, /* RGIDW_MODID[915]:ARVIP13*/ + [869] = {0xE7B42410U, 0x0000000EU}, /* RGIDW_MODID[916]:AXIFBABUSVIP1*/ + [870] = {0xE7B42414U, 0x00000002U}, /* RGIDW_MODID[917]:ARVIIP14*/ + [871] = {0xE7B42418U, 0x00000001U}, /* RGIDW_MODID[918]:ARVIIP15*/ + [872] = {0xE7B4241CU, 0x00000002U}, /* RGIDW_MODID[919]:ARVIIP16*/ + [873] = {0xE7B42420U, 0x00000002U}, /* RGIDW_MODID[920]:ARVIIP17*/ + [874] = {0xE7B42424U, 0x00000000U}, /* RGIDW_MODID[921]:ARVIIP18*/ + [875] = {0xE7B42438U, 0x0000000AU}, /* RGIDW_MODID[922]:ECMVIP1*/ + [876] = {0xE7B4243CU, 0x0000004EU}, /* RGIDW_MODID[923]:IPMMUVIP101*/ + [877] = {0xE7B42440U, 0x0000004EU}, /* RGIDW_MODID[924]:IPMMUVIP100*/ + [878] = {0xE7B42444U, 0x0000004EU}, /* RGIDW_MODID[925]:IPMMUVIP110*/ + [879] = {0xE7B42448U, 0x0000004EU}, /* RGIDW_MODID[926]:IPMMUVIP111*/ + [880] = {0xE7B4244CU, 0x0000004EU}, /* RGIDW_MODID[927]:IPMMUVIP112*/ + [881] = {0xE7B42450U, 0x0000004EU}, /* RGIDW_MODID[928]:IPMMUVIP113*/ + [882] = {0xE7B42454U, 0x0000004EU}, /* RGIDW_MODID[929]:IPMMUVIP114*/ + [883] = {0xE7B42458U, 0x0000004EU}, /* RGIDW_MODID[930]:IPMMUVIP115*/ + [884] = {0xE7B4245CU, 0x0000004EU}, /* RGIDW_MODID[931]:IPMMUVIP102*/ + [885] = {0xE7B42460U, 0x0000004EU}, /* RGIDW_MODID[932]:IPMMUVIP103*/ + [886] = {0xE7B42464U, 0x0000004EU}, /* RGIDW_MODID[933]:IPMMUVIP104*/ + [887] = {0xE7B42468U, 0x0000004EU}, /* RGIDW_MODID[934]:IPMMUVIP105*/ + [888] = {0xE7B4246CU, 0x0000004EU}, /* RGIDW_MODID[935]:IPMMUVIP106*/ + [889] = {0xE7B42470U, 0x0000004EU}, /* RGIDW_MODID[936]:IPMMUVIP107*/ + [890] = {0xE7B42474U, 0x0000004EU}, /* RGIDW_MODID[937]:IPMMUVIP108*/ + [891] = {0xE7B42478U, 0x0000004EU}, /* RGIDW_MODID[938]:IPMMUVIP109*/ + [892] = {0xE7B42518U, 0x00000004U}, /* RGIDW_MODID[939]:PAP*/ + [893] = {0xEB802400U, 0x00000002U}, /* RGIDW_MODID[940]:ARDSP0*/ + /* After setting */ /* RGIDW_MODID[941]:ARDSP1*/ + /* After setting */ /* RGIDW_MODID[942]:ARDSP2*/ + [894] = {0xEB80240CU, 0x00000001U}, /* RGIDW_MODID[943]:ARDSP3*/ + [895] = {0xEB802410U, 0x00000002U}, /* RGIDW_MODID[944]:ARDSP4*/ + [896] = {0xEB802414U, 0x00000001U}, /* RGIDW_MODID[945]:ARDSP5*/ + [897] = {0xEB802418U, 0x00000002U}, /* RGIDW_MODID[946]:ARDSP6*/ + [898] = {0xEB80241CU, 0x00000002U}, /* RGIDW_MODID[947]:ARDSP7*/ + [899] = {0xEB802420U, 0x0000000AU}, /* RGIDW_MODID[948]:ECMDSP*/ + [900] = {0xEB802424U, 0x0000000CU}, /* RGIDW_MODID[949]:AXIDSP0*/ + [901] = {0xEB802428U, 0x0000000CU}, /* RGIDW_MODID[950]:AXIDSP1*/ + [902] = {0xEB80242CU, 0x0000000CU}, /* RGIDW_MODID[951]:AXIDSP2*/ + [903] = {0xEB802430U, 0x0000000CU}, /* RGIDW_MODID[952]:AXIDSP3*/ + [905] = {0xE67B969CU, 0x00000000U}, /* RGIDW_MODID[953]:ARCC*/ + [904] = {0xE67B96B0U, 0x00000000U}, /* RGIDW_MODID[954]:ARRTRAM*/ + [906] = {0xE7752424U, 0x00000000U}, /* RGIDW_MODID[955]:RSV0*/ + [907] = {0xFEBD2428U, 0x0000000CU}, /* RGIDW_MODID[956]:DOC*/ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_sec_tbl" +const REGION_ID_SETTING_TABLE g_rgid_sec_tbl[] = { + [0] = {0xFFC83400U, 0x00000000U}, /* SEC_MODID[0]:ARMGC0*/ + [1] = {0xFFC83404U, 0x00000002U}, /* SEC_MODID[1]:ARMGC1*/ + [2] = {0xFFC83408U, 0x00000002U}, /* SEC_MODID[2]:ARMGC2*/ + [3] = {0xFFC8340CU, 0x00000002U}, /* SEC_MODID[3]:ARRT00*/ + [4] = {0xFFC83410U, 0x00000002U}, /* SEC_MODID[4]:ARRT01*/ + [5] = {0xFFC83414U, 0x00000002U}, /* SEC_MODID[5]:ARRT02*/ + [6] = {0xFFC83418U, 0x00000002U}, /* SEC_MODID[6]:ARRT03*/ + [7] = {0xFFC8341CU, 0x00000002U}, /* SEC_MODID[7]:ARRT04*/ + [8] = {0xFFC83420U, 0x00000002U}, /* SEC_MODID[8]:ARRT05*/ + [9] = {0xFFC83424U, 0x00000002U}, /* SEC_MODID[9]:ARRT06*/ + [10] = {0xFFC83428U, 0x00000002U}, /* SEC_MODID[10]:ARRT07*/ + [11] = {0xFFC8342CU, 0x00000002U}, /* SEC_MODID[11]:ARRT08*/ + [12] = {0xFFC83430U, 0x00000000U}, /* SEC_MODID[12]:LIFEC0*/ + [13] = {0xFFC83434U, 0x00000002U}, /* SEC_MODID[13]:SWDT*/ + [14] = {0xFFC83438U, 0x00000002U}, /* SEC_MODID[14]:TMU0*/ + [15] = {0xFFC8343CU, 0x00000002U}, /* SEC_MODID[15]:WDT*/ + [16] = {0xFFC83440U, 0x00000002U}, /* SEC_MODID[16]:WWDT0*/ + [17] = {0xFFC83444U, 0x00000002U}, /* SEC_MODID[17]:WWDT1*/ + [18] = {0xFFC83448U, 0x00000002U}, /* SEC_MODID[18]:WWDT2*/ + [19] = {0xFFC8344CU, 0x00000002U}, /* SEC_MODID[19]:WWDT3*/ + [20] = {0xFFC83450U, 0x00000002U}, /* SEC_MODID[20]:WWDT4*/ + [21] = {0xFFC83454U, 0x00000002U}, /* SEC_MODID[21]:WWDT5*/ + [22] = {0xFFC83458U, 0x00000002U}, /* SEC_MODID[22]:WWDT6*/ + [23] = {0xFFC83468U, 0x00000002U}, /* SEC_MODID[23]:ECMRT3*/ + [24] = {0xE6003400U, 0x00000002U}, /* SEC_MODID[24]:ADVFSC*/ + [25] = {0xE6003404U, 0x00000002U}, /* SEC_MODID[25]:APMU0*/ + [26] = {0xE6003408U, 0x00000002U}, /* SEC_MODID[26]:APMU1*/ + [27] = {0xE600340CU, 0x00000002U}, /* SEC_MODID[27]:APMU10*/ + [28] = {0xE6003410U, 0x00000002U}, /* SEC_MODID[28]:APMU11*/ + [29] = {0xE6003414U, 0x00000002U}, /* SEC_MODID[29]:APMU12*/ + [30] = {0xE6003418U, 0x00000002U}, /* SEC_MODID[30]:APMU13*/ + [31] = {0xE600341CU, 0x00000002U}, /* SEC_MODID[31]:APMU14*/ + [32] = {0xE6003420U, 0x00000002U}, /* SEC_MODID[32]:APMU15*/ + [33] = {0xE6003424U, 0x00000002U}, /* SEC_MODID[33]:APMU2*/ + [34] = {0xE6003428U, 0x00000002U}, /* SEC_MODID[34]:APMU3*/ + [35] = {0xE600342CU, 0x00000002U}, /* SEC_MODID[35]:APMU4*/ + [36] = {0xE6003430U, 0x00000002U}, /* SEC_MODID[36]:APMU5*/ + [37] = {0xE6003434U, 0x00000002U}, /* SEC_MODID[37]:APMU6*/ + [38] = {0xE6003438U, 0x00000002U}, /* SEC_MODID[38]:APMU7*/ + [39] = {0xE600343CU, 0x00000002U}, /* SEC_MODID[39]:APMU8*/ + [40] = {0xE6003440U, 0x00000002U}, /* SEC_MODID[40]:APMU9*/ + [41] = {0xE6003444U, 0x00000002U}, /* SEC_MODID[41]:ARS00*/ + [42] = {0xE6003448U, 0x00000002U}, /* SEC_MODID[42]:ARS01*/ + [43] = {0xE600344CU, 0x00000002U}, /* SEC_MODID[43]:ARS02*/ + [44] = {0xE6003450U, 0x00000002U}, /* SEC_MODID[44]:ARS03*/ + [45] = {0xE6003454U, 0x00000002U}, /* SEC_MODID[45]:ARS04*/ + [46] = {0xE6003458U, 0x00000002U}, /* SEC_MODID[46]:ARS05*/ + [47] = {0xE600345CU, 0x00000002U}, /* SEC_MODID[47]:ARS06*/ + [48] = {0xE6003460U, 0x00000002U}, /* SEC_MODID[48]:ARS07*/ + [49] = {0xE6003464U, 0x00000002U}, /* SEC_MODID[49]:ARS08*/ + [50] = {0xE6003468U, 0x00000002U}, /* SEC_MODID[50]:CMT0*/ + [51] = {0xE600346CU, 0x00000002U}, /* SEC_MODID[51]:CMT1*/ + [52] = {0xE6003470U, 0x00000002U}, /* SEC_MODID[52]:CMT2*/ + [53] = {0xE6003474U, 0x00000002U}, /* SEC_MODID[53]:CMT3*/ + [54] = {0xE6003478U, 0x00000002U}, /* SEC_MODID[54]:CKM*/ + [55] = {0xE600347CU, 0x00000002U}, /* SEC_MODID[55]:DBE*/ + [56] = {0xE6003480U, 0x00000002U}, /* SEC_MODID[56]:IRQC*/ + [57] = {0xE6003484U, 0x00000002U}, /* SEC_MODID[57]:ECMPS0*/ + [58] = {0xE6003488U, 0x00000002U}, /* SEC_MODID[58]:OTP0*/ + [59] = {0xE600348CU, 0x00000002U}, /* SEC_MODID[59]:OTP1*/ + [60] = {0xE600349CU, 0x00000002U}, /* SEC_MODID[60]:SCMT*/ + [61] = {0xE60034A8U, 0x00000002U}, /* SEC_MODID[61]:TSC1*/ + [62] = {0xE60034ACU, 0x00000002U}, /* SEC_MODID[62]:TSC2*/ + [63] = {0xE60034B0U, 0x00000002U}, /* SEC_MODID[63]:TSC3*/ + [64] = {0xE60034B4U, 0x00000002U}, /* SEC_MODID[64]:TSC4*/ + [65] = {0xE60034B8U, 0x00000002U}, /* SEC_MODID[65]:UCMT*/ + [66] = {0xE6003500U, 0x00000002U}, /* SEC_MODID[66]:CPG0*/ + [67] = {0xE6003504U, 0x00000002U}, /* SEC_MODID[67]:CPG1*/ + [68] = {0xE6003508U, 0x00000002U}, /* SEC_MODID[68]:CPG2*/ + [69] = {0xE600350CU, 0x00000002U}, /* SEC_MODID[69]:CPG3*/ + [70] = {0xE6003510U, 0x00000002U}, /* SEC_MODID[70]:PFC00*/ + [71] = {0xE6003514U, 0x00000002U}, /* SEC_MODID[71]:PFC01*/ + [72] = {0xE6003518U, 0x00000002U}, /* SEC_MODID[72]:PFC02*/ + [73] = {0xE600351CU, 0x00000002U}, /* SEC_MODID[73]:PFC03*/ + [74] = {0xE6003520U, 0x00000002U}, /* SEC_MODID[74]:PFC10*/ + [75] = {0xE6003524U, 0x00000002U}, /* SEC_MODID[75]:PFC11*/ + [76] = {0xE6003528U, 0x00000002U}, /* SEC_MODID[76]:PFC12*/ + [77] = {0xE600352CU, 0x00000002U}, /* SEC_MODID[77]:PFC13*/ + [78] = {0xE6003530U, 0x00000002U}, /* SEC_MODID[78]:PFC20*/ + [79] = {0xE6003534U, 0x00000002U}, /* SEC_MODID[79]:PFC21*/ + [80] = {0xE6003538U, 0x00000002U}, /* SEC_MODID[80]:PFC22*/ + [81] = {0xE600353CU, 0x00000002U}, /* SEC_MODID[81]:PFC23*/ + [82] = {0xE6003540U, 0x00000002U}, /* SEC_MODID[82]:PFC30*/ + [83] = {0xE6003544U, 0x00000002U}, /* SEC_MODID[83]:PFC31*/ + [84] = {0xE6003548U, 0x00000002U}, /* SEC_MODID[84]:PFC32*/ + [85] = {0xE600354CU, 0x00000002U}, /* SEC_MODID[85]:PFC33*/ + [86] = {0xE6003550U, 0x00000002U}, /* SEC_MODID[86]:PFCS0*/ + [87] = {0xE6003554U, 0x00000002U}, /* SEC_MODID[87]:PFCS1*/ + [88] = {0xE6003558U, 0x00000002U}, /* SEC_MODID[88]:PFCS2*/ + [89] = {0xE600355CU, 0x00000002U}, /* SEC_MODID[89]:PFCS3*/ + [90] = {0xE6003560U, 0x00000002U}, /* SEC_MODID[90]:RESET0*/ + [91] = {0xE6003564U, 0x00000002U}, /* SEC_MODID[91]:RESET1*/ + [92] = {0xE6003568U, 0x00000002U}, /* SEC_MODID[92]:RESET2*/ + [93] = {0xE600356CU, 0x00000002U}, /* SEC_MODID[93]:RESET3*/ + [94] = {0xE6003570U, 0x00000002U}, /* SEC_MODID[94]:SYS0*/ + [95] = {0xE6003574U, 0x00000002U}, /* SEC_MODID[95]:SYS1*/ + [96] = {0xE6003578U, 0x00000002U}, /* SEC_MODID[96]:SYS2*/ + [97] = {0xE600357CU, 0x00000002U}, /* SEC_MODID[97]:SYS3*/ + [98] = {0xE7763400U, 0x00000002U}, /* SEC_MODID[98]:DMAMSI0*/ + [99] = {0xE7763404U, 0x00000002U}, /* SEC_MODID[99]:DMAMSI1*/ + [100] = {0xE7763408U, 0x00000002U}, /* SEC_MODID[100]:DMAMSI2*/ + [101] = {0xE776340CU, 0x00000002U}, /* SEC_MODID[101]:DMAMSI3*/ + [102] = {0xE7763410U, 0x00000002U}, /* SEC_MODID[102]:DMAMSI4*/ + [103] = {0xE7763414U, 0x00000002U}, /* SEC_MODID[103]:DMAMSI5*/ + [104] = {0xE7763418U, 0x00000002U}, /* SEC_MODID[104]:ECMSP3*/ + [105] = {0xE7763424U, 0x00000002U}, /* SEC_MODID[105]:ARSP30*/ + [106] = {0xE7763428U, 0x00000002U}, /* SEC_MODID[106]:ARSP31*/ + [107] = {0xE776342CU, 0x00000002U}, /* SEC_MODID[107]:ARSP32*/ + [108] = {0xE7763430U, 0x00000002U}, /* SEC_MODID[108]:ARSP33*/ + [109] = {0xE7763434U, 0x00000002U}, /* SEC_MODID[109]:ARSP34*/ + [110] = {0xE7763438U, 0x00000002U}, /* SEC_MODID[110]:ARSP35*/ + [111] = {0xE776343CU, 0x00000002U}, /* SEC_MODID[111]:ARSP36*/ + [112] = {0xE7763440U, 0x00000002U}, /* SEC_MODID[112]:ARSP37*/ + [113] = {0xE7763444U, 0x00000002U}, /* SEC_MODID[113]:ARSP38*/ + [114] = {0xE7763448U, 0x00000002U}, /* SEC_MODID[114]:MSI0*/ + [115] = {0xE776344CU, 0x00000002U}, /* SEC_MODID[115]:MSI1*/ + [116] = {0xE7763450U, 0x00000002U}, /* SEC_MODID[116]:MSI2*/ + [117] = {0xE7763454U, 0x00000002U}, /* SEC_MODID[117]:MSI3*/ + [118] = {0xE7763458U, 0x00000002U}, /* SEC_MODID[118]:MSI4*/ + [119] = {0xE776345CU, 0x00000002U}, /* SEC_MODID[119]:MSI5*/ + [120] = {0xE7793400U, 0x00000002U}, /* SEC_MODID[120]:ARSP40*/ + [121] = {0xE7793404U, 0x00000002U}, /* SEC_MODID[121]:ARSP41*/ + [122] = {0xE7793408U, 0x00000002U}, /* SEC_MODID[122]:ARSP42*/ + [123] = {0xE779340CU, 0x00000002U}, /* SEC_MODID[123]:ARSP43*/ + [124] = {0xE7793410U, 0x00000002U}, /* SEC_MODID[124]:ARSP44*/ + [125] = {0xE7793414U, 0x00000002U}, /* SEC_MODID[125]:ARSP45*/ + [126] = {0xE7793418U, 0x00000002U}, /* SEC_MODID[126]:ARSP46*/ + [127] = {0xE779341CU, 0x00000002U}, /* SEC_MODID[127]:ARSP47*/ + [128] = {0xE7793420U, 0x00000002U}, /* SEC_MODID[128]:ARSP48*/ + [129] = {0xE7793424U, 0x00000002U}, /* SEC_MODID[129]:DMAHSCIF0*/ + [130] = {0xE7793428U, 0x00000002U}, /* SEC_MODID[130]:DMAHSCIF1*/ + [131] = {0xE779342CU, 0x00000002U}, /* SEC_MODID[131]:DMAHSCIF2*/ + [132] = {0xE7793430U, 0x00000002U}, /* SEC_MODID[132]:DMAHSCIF3*/ + [133] = {0xE7793434U, 0x00000002U}, /* SEC_MODID[133]:DMASCIF0*/ + [134] = {0xE7793438U, 0x00000002U}, /* SEC_MODID[134]:DMASCIF1*/ + [135] = {0xE779343CU, 0x00000002U}, /* SEC_MODID[135]:DMASCIF3*/ + [136] = {0xE7793440U, 0x00000002U}, /* SEC_MODID[136]:DMASCIF4*/ + [137] = {0xE7793444U, 0x00000002U}, /* SEC_MODID[137]:ECMSP4*/ + [138] = {0xE7793448U, 0x00000002U}, /* SEC_MODID[138]:HSCIF0*/ + [139] = {0xE779344CU, 0x00000002U}, /* SEC_MODID[139]:HSCIF1*/ + [140] = {0xE7793450U, 0x00000002U}, /* SEC_MODID[140]:HSCIF2*/ + [141] = {0xE7793454U, 0x00000002U}, /* SEC_MODID[141]:HSCIF3*/ + [142] = {0xE7793458U, 0x00000002U}, /* SEC_MODID[142]:SCIF0*/ + [143] = {0xE779345CU, 0x00000002U}, /* SEC_MODID[143]:SCIF1*/ + [144] = {0xE7793460U, 0x00000002U}, /* SEC_MODID[144]:SCIF3*/ + [145] = {0xE7793464U, 0x00000002U}, /* SEC_MODID[145]:SCIF4*/ + [146] = {0xE7793468U, 0x00000002U}, /* SEC_MODID[146]:TMU1*/ + [147] = {0xE779346CU, 0x00000002U}, /* SEC_MODID[147]:TMU2*/ + [148] = {0xE7793470U, 0x00000002U}, /* SEC_MODID[148]:TMU3*/ + [149] = {0xE7793474U, 0x00000002U}, /* SEC_MODID[149]:TMU4*/ + [150] = {0xE7793478U, 0x00000002U}, /* SEC_MODID[150]:CANFD*/ + [151] = {0xE779347CU, 0x00000002U}, /* SEC_MODID[151]:DMACANFD*/ + [152] = {0xE7793480U, 0x00000002U}, /* SEC_MODID[152]:DMATPU0*/ + [153] = {0xE7793484U, 0x00000002U}, /* SEC_MODID[153]:PWM0*/ + [154] = {0xE7793488U, 0x00000002U}, /* SEC_MODID[154]:PWM1*/ + [155] = {0xE779348CU, 0x00000002U}, /* SEC_MODID[155]:PWM2*/ + [156] = {0xE7793490U, 0x00000002U}, /* SEC_MODID[156]:PWM3*/ + [157] = {0xE7793494U, 0x00000002U}, /* SEC_MODID[157]:PWM4*/ + [158] = {0xE7793498U, 0x00000002U}, /* SEC_MODID[158]:PWM5*/ + [159] = {0xE779349CU, 0x00000002U}, /* SEC_MODID[159]:PWM6*/ + [160] = {0xE77934A0U, 0x00000002U}, /* SEC_MODID[160]:PWM7*/ + [161] = {0xE77934A4U, 0x00000002U}, /* SEC_MODID[161]:PWM8*/ + [162] = {0xE77934A8U, 0x00000002U}, /* SEC_MODID[162]:PWM9*/ + [163] = {0xE77934ACU, 0x00000002U}, /* SEC_MODID[163]:TPU0*/ + [164] = {0xFE673400U, 0x00000002U}, /* SEC_MODID[164]:ARVC10*/ + [165] = {0xFE673404U, 0x00000002U}, /* SEC_MODID[165]:ARVC11*/ + [166] = {0xFE673408U, 0x00000002U}, /* SEC_MODID[166]:ARVC12*/ + [167] = {0xFE67340CU, 0x00000002U}, /* SEC_MODID[167]:ARVC13*/ + [168] = {0xFE673410U, 0x00000002U}, /* SEC_MODID[168]:ARVC14*/ + [169] = {0xFE673414U, 0x00000002U}, /* SEC_MODID[169]:ARVC15*/ + [170] = {0xFE673418U, 0x00000002U}, /* SEC_MODID[170]:ARVC16*/ + [171] = {0xFE67341CU, 0x00000002U}, /* SEC_MODID[171]:ARVC17*/ + [172] = {0xFE673420U, 0x00000002U}, /* SEC_MODID[172]:ARVC18*/ + [173] = {0xFE673424U, 0x00000002U}, /* SEC_MODID[173]:ECMVC1*/ + [174] = {0xFE673428U, 0x00000002U}, /* SEC_MODID[174]:FCPCS*/ + [175] = {0xFE67342CU, 0x00000002U}, /* SEC_MODID[175]:VCP4LC*/ + [176] = {0xFE673430U, 0x00000002U}, /* SEC_MODID[176]:VCP4LV*/ + [177] = {0xFEBD3400U, 0x00000002U}, /* SEC_MODID[177]:ARVI40*/ + [178] = {0xFEBD3404U, 0x00000002U}, /* SEC_MODID[178]:ARVI41*/ + [179] = {0xFEBD3408U, 0x00000002U}, /* SEC_MODID[179]:ARVI42*/ + [180] = {0xFEBD340CU, 0x00000002U}, /* SEC_MODID[180]:ARVI43*/ + [181] = {0xFEBD3410U, 0x00000002U}, /* SEC_MODID[181]:ARVI44*/ + [182] = {0xFEBD3414U, 0x00000002U}, /* SEC_MODID[182]:ARVI45*/ + [183] = {0xFEBD3418U, 0x00000002U}, /* SEC_MODID[183]:ARVI46*/ + [184] = {0xFEBD341CU, 0x00000002U}, /* SEC_MODID[184]:ARVI47*/ + [185] = {0xFEBD3420U, 0x00000002U}, /* SEC_MODID[185]:ARVI48*/ + [186] = {0xFEBD3424U, 0x00000002U}, /* SEC_MODID[186]:DIS0*/ + [187] = {0xFEBD342CU, 0x00000002U}, /* SEC_MODID[187]:DSC*/ + [188] = {0xFEBD3430U, 0x00000002U}, /* SEC_MODID[188]:ECMVIO2*/ + [189] = {0xFEBD3434U, 0x00000002U}, /* SEC_MODID[189]:FCPVD0*/ + [190] = {0xFEBD3438U, 0x00000002U}, /* SEC_MODID[190]:FCPVD1*/ + [191] = {0xFEBD343CU, 0x00000002U}, /* SEC_MODID[191]:VSPD0*/ + [192] = {0xFEBD3440U, 0x00000002U}, /* SEC_MODID[192]:VSPD1*/ + [193] = {0xE6583400U, 0x00000002U}, /* SEC_MODID[193]:CKMHSC*/ + [194] = {0xE6583404U, 0x00000002U}, /* SEC_MODID[194]:AXIPCI001*/ + [195] = {0xE6583408U, 0x00000002U}, /* SEC_MODID[195]:AXIPCI002*/ + [196] = {0xE658340CU, 0x00000002U}, /* SEC_MODID[196]:AXIPCI003*/ + [197] = {0xE6583414U, 0x00000002U}, /* SEC_MODID[197]:AXIPCI005*/ + [198] = {0xE6583418U, 0x00000002U}, /* SEC_MODID[198]:AXIPCI006*/ + [199] = {0xE658341CU, 0x00000002U}, /* SEC_MODID[199]:AXIPCI007*/ + [200] = {0xE6583420U, 0x00000002U}, /* SEC_MODID[200]:AXIPCI008*/ + [201] = {0xE6583424U, 0x00000002U}, /* SEC_MODID[201]:AXIPCI009*/ + [202] = {0xE6583428U, 0x00000002U}, /* SEC_MODID[202]:AXIPCI010*/ + [203] = {0xE658342CU, 0x00000002U}, /* SEC_MODID[203]:AXIPCI011*/ + [204] = {0xE6583430U, 0x00000002U}, /* SEC_MODID[204]:AXIPCI012*/ + [205] = {0xE6583434U, 0x00000002U}, /* SEC_MODID[205]:AXIPCI013*/ + [206] = {0xE6583438U, 0x00000002U}, /* SEC_MODID[206]:AXIPCI014*/ + [207] = {0xE658343CU, 0x00000002U}, /* SEC_MODID[207]:AXIPCI015*/ + [208] = {0xE6583440U, 0x00000002U}, /* SEC_MODID[208]:AXIPCI100*/ + [209] = {0xE6583444U, 0x00000002U}, /* SEC_MODID[209]:AXIPCI101*/ + [210] = {0xE6583448U, 0x00000002U}, /* SEC_MODID[210]:AXIPCI102*/ + [211] = {0xE658344CU, 0x00000002U}, /* SEC_MODID[211]:AXIPCI103*/ + [212] = {0xE6583450U, 0x00000002U}, /* SEC_MODID[212]:AXIPCI104*/ + [213] = {0xE6583454U, 0x00000002U}, /* SEC_MODID[213]:AXIPCI105*/ + [214] = {0xE6583458U, 0x00000002U}, /* SEC_MODID[214]:AXIPCI106*/ + [215] = {0xE658345CU, 0x00000002U}, /* SEC_MODID[215]:AXIPCI107*/ + [216] = {0xE6583460U, 0x00000002U}, /* SEC_MODID[216]:AXIPCI108*/ + [217] = {0xE6583464U, 0x00000002U}, /* SEC_MODID[217]:AXIPCI109*/ + [218] = {0xE6583468U, 0x00000002U}, /* SEC_MODID[218]:AXIPCI110*/ + [219] = {0xE658346CU, 0x00000002U}, /* SEC_MODID[219]:AXIPCI111*/ + [220] = {0xE6583470U, 0x00000002U}, /* SEC_MODID[220]:AXIPCI112*/ + [221] = {0xE6583474U, 0x00000002U}, /* SEC_MODID[221]:AXIPCI113*/ + [222] = {0xE6583478U, 0x00000002U}, /* SEC_MODID[222]:AXIPCI114*/ + [223] = {0xE658347CU, 0x00000002U}, /* SEC_MODID[223]:AXIPCI115*/ + [224] = {0xE6583484U, 0x00000002U}, /* SEC_MODID[224]:GPTP*/ + [225] = {0xE6583488U, 0x00000002U}, /* SEC_MODID[225]:IPMMUHC00*/ + [226] = {0xE65834F0U, 0x00000002U}, /* SEC_MODID[226]:TSN0*/ + [227] = {0xE65834F4U, 0x00000002U}, /* SEC_MODID[227]:AXIPCI000*/ + [228] = {0xE65834F8U, 0x00000002U}, /* SEC_MODID[228]:AXIPCI004*/ + [229] = {0xE65834FCU, 0x00000002U}, /* SEC_MODID[229]:IPMMUHC01*/ + [230] = {0xE6583500U, 0x00000002U}, /* SEC_MODID[230]:AVB0*/ + [231] = {0xE6583504U, 0x00000002U}, /* SEC_MODID[231]:AVB1*/ + [232] = {0xE6583508U, 0x00000002U}, /* SEC_MODID[232]:AVB2*/ + [233] = {0xE658350CU, 0x00000002U}, /* SEC_MODID[233]:IPMMUHC10*/ + [234] = {0xE6583510U, 0x00000002U}, /* SEC_MODID[234]:IPMMUHC11*/ + [235] = {0xE6583514U, 0x00000002U}, /* SEC_MODID[235]:IPMMUHC12*/ + [236] = {0xE6583518U, 0x00000002U}, /* SEC_MODID[236]:IPMMUHC13*/ + [237] = {0xE658351CU, 0x00000002U}, /* SEC_MODID[237]:PPHY0*/ + [238] = {0xE6583520U, 0x00000002U}, /* SEC_MODID[238]:PPHY1*/ + [239] = {0xE6583524U, 0x00000002U}, /* SEC_MODID[239]:IPMMUHC14*/ + [240] = {0xE6583528U, 0x00000002U}, /* SEC_MODID[240]:IPMMUHC15*/ + [241] = {0xE658352CU, 0x00000002U}, /* SEC_MODID[241]:FBAHSC*/ + [242] = {0xE6583530U, 0x00000002U}, /* SEC_MODID[242]:IPMMUHC02*/ + [243] = {0xE6583538U, 0x00000002U}, /* SEC_MODID[243]:ECMHSC*/ + [244] = {0xE658353CU, 0x00000002U}, /* SEC_MODID[244]:ARHC0*/ + [245] = {0xE6583540U, 0x00000002U}, /* SEC_MODID[245]:ARHC1*/ + [246] = {0xE6583544U, 0x00000002U}, /* SEC_MODID[246]:ARHC2*/ + [247] = {0xE6583548U, 0x00000002U}, /* SEC_MODID[247]:ARHC3*/ + [248] = {0xE658354CU, 0x00000002U}, /* SEC_MODID[248]:ARHC4*/ + [249] = {0xE6583550U, 0x00000002U}, /* SEC_MODID[249]:ARHC5*/ + [250] = {0xE6583554U, 0x00000002U}, /* SEC_MODID[250]:ARHC6*/ + [251] = {0xE6583558U, 0x00000002U}, /* SEC_MODID[251]:ARHC7*/ + [252] = {0xE658355CU, 0x00000002U}, /* SEC_MODID[252]:ARHC8*/ + [253] = {0xE6583560U, 0x00000002U}, /* SEC_MODID[253]:IPMMUHC03*/ + [254] = {0xE6583564U, 0x00000002U}, /* SEC_MODID[254]:IPMMUHC04*/ + [255] = {0xE6583568U, 0x00000002U}, /* SEC_MODID[255]:IPMMUHC05*/ + [256] = {0xE658356CU, 0x00000002U}, /* SEC_MODID[256]:IPMMUHC06*/ + [257] = {0xE6583570U, 0x00000002U}, /* SEC_MODID[257]:IPMMUHC07*/ + [258] = {0xE6583574U, 0x00000002U}, /* SEC_MODID[258]:IPMMUHC08*/ + [259] = {0xE6583578U, 0x00000002U}, /* SEC_MODID[259]:IPMMUHC09*/ + [260] = {0xFF883400U, 0x00000002U}, /* SEC_MODID[260]:ARIMP00*/ + [261] = {0xFF883404U, 0x00000002U}, /* SEC_MODID[261]:ARIMP01*/ + [262] = {0xFF883408U, 0x00000002U}, /* SEC_MODID[262]:ARIMP02*/ + [263] = {0xFF88340CU, 0x00000002U}, /* SEC_MODID[263]:ARIMP03*/ + [264] = {0xFF883410U, 0x00000002U}, /* SEC_MODID[264]:ARIMP04*/ + [265] = {0xFF883414U, 0x00000002U}, /* SEC_MODID[265]:AXIFBABUSIR0*/ + [266] = {0xFF883418U, 0x00000002U}, /* SEC_MODID[266]:AXIFBABUSIR1*/ + [267] = {0xFF88341CU, 0x00000002U}, /* SEC_MODID[267]:AXIFBABUSIR2*/ + [268] = {0xFF883420U, 0x00000002U}, /* SEC_MODID[268]:AXIFBABUSIR3*/ + [269] = {0xFF883424U, 0x00000002U}, /* SEC_MODID[269]:AXIFBABUSIR4*/ + [270] = {0xFF883428U, 0x00000002U}, /* SEC_MODID[270]:AXIIMP0*/ + [271] = {0xFF88342CU, 0x00000002U}, /* SEC_MODID[271]:CKMCNR*/ + [272] = {0xFF883430U, 0x00000002U}, /* SEC_MODID[272]:CKMDSP*/ + [273] = {0xFF883434U, 0x00000002U}, /* SEC_MODID[273]:ARIMP05*/ + [274] = {0xFF883438U, 0x00000002U}, /* SEC_MODID[274]:ARIMP06*/ + [275] = {0xFF88343CU, 0x00000002U}, /* SEC_MODID[275]:ARIMP07*/ + [276] = {0xFF883440U, 0x00000002U}, /* SEC_MODID[276]:ARIMP08*/ + [277] = {0xFF883444U, 0x00000002U}, /* SEC_MODID[277]:CKMIR*/ + [278] = {0xFF883448U, 0x00000002U}, /* SEC_MODID[278]:ECMIR*/ + [279] = {0xFF88344CU, 0x00000002U}, /* SEC_MODID[279]:DSPPS*/ + [280] = {0xFF883450U, 0x00000002U}, /* SEC_MODID[280]:IPMMUIR1*/ + [281] = {0xFF883454U, 0x00000002U}, /* SEC_MODID[281]:IPMMUIR0*/ + [282] = {0xFF883458U, 0x00000002U}, /* SEC_MODID[282]:IPMMUIR10*/ + [283] = {0xFF88345CU, 0x00000002U}, /* SEC_MODID[283]:IPMMUIR11*/ + [284] = {0xFF883460U, 0x00000002U}, /* SEC_MODID[284]:IPMMUIR12*/ + [285] = {0xFF883464U, 0x00000002U}, /* SEC_MODID[285]:IPMMUIR13*/ + [286] = {0xFF883468U, 0x00000002U}, /* SEC_MODID[286]:IPMMUIR14*/ + [287] = {0xFF88346CU, 0x00000002U}, /* SEC_MODID[287]:IPMMUIR15*/ + [288] = {0xFF883470U, 0x00000002U}, /* SEC_MODID[288]:IPMMUIR2*/ + [289] = {0xFF883474U, 0x00000002U}, /* SEC_MODID[289]:IPMMUIR3*/ + [290] = {0xFF883478U, 0x00000002U}, /* SEC_MODID[290]:IPMMUIR4*/ + [291] = {0xFF88347CU, 0x00000002U}, /* SEC_MODID[291]:IPMMUIR5*/ + [292] = {0xFF883480U, 0x00000002U}, /* SEC_MODID[292]:IPMMUIR6*/ + [293] = {0xFF883484U, 0x00000002U}, /* SEC_MODID[293]:IPMMUIR7*/ + [294] = {0xFF883488U, 0x00000002U}, /* SEC_MODID[294]:IPMMUIR8*/ + [295] = {0xFF88348CU, 0x00000002U}, /* SEC_MODID[295]:IPMMUIR9*/ + [296] = {0xFD813400U, 0x00000002U}, /* SEC_MODID[296]:ARPV0*/ + [297] = {0xFD813404U, 0x00000002U}, /* SEC_MODID[297]:ARPV1*/ + [298] = {0xFD813408U, 0x00000002U}, /* SEC_MODID[298]:AXIRGXS*/ + [299] = {0xFD81340CU, 0x00000002U}, /* SEC_MODID[299]:ARPV2*/ + [300] = {0xFD813410U, 0x00000002U}, /* SEC_MODID[300]:ARPV3*/ + [301] = {0xFD813414U, 0x00000002U}, /* SEC_MODID[301]:ARPV4*/ + [302] = {0xFD813418U, 0x00000002U}, /* SEC_MODID[302]:ARPV5*/ + [303] = {0xFD81341CU, 0x00000002U}, /* SEC_MODID[303]:ARPV6*/ + [304] = {0xFD813420U, 0x00000002U}, /* SEC_MODID[304]:ARPV7*/ + [305] = {0xFD813424U, 0x00000002U}, /* SEC_MODID[305]:ARPV8*/ + [306] = {0xFD813428U, 0x00000002U}, /* SEC_MODID[306]:CKM3DG*/ + [307] = {0xFD81342CU, 0x00000002U}, /* SEC_MODID[307]:ECM3DG*/ + [308] = {0xFD813430U, 0x00000002U}, /* SEC_MODID[308]:FBAPVC*/ + [309] = {0xFD813434U, 0x00000002U}, /* SEC_MODID[309]:FBAPVD0*/ + [310] = {0xFD813438U, 0x00000002U}, /* SEC_MODID[310]:FBAPVD1*/ + [311] = {0xFD81343CU, 0x00000002U}, /* SEC_MODID[311]:FBAPVD2*/ + [312] = {0xFD813440U, 0x00000002U}, /* SEC_MODID[312]:FBAPVE*/ + [313] = {0xFD813444U, 0x00000002U}, /* SEC_MODID[313]:IPMMUPV000*/ + [314] = {0xFD813448U, 0x00000002U}, /* SEC_MODID[314]:IPMMUPV001*/ + [315] = {0xFD81344CU, 0x00000002U}, /* SEC_MODID[315]:IPMMUPV010*/ + [316] = {0xFD813450U, 0x00000002U}, /* SEC_MODID[316]:IPMMUPV011*/ + [317] = {0xFD813454U, 0x00000002U}, /* SEC_MODID[317]:IPMMUPV012*/ + [318] = {0xFD813458U, 0x00000002U}, /* SEC_MODID[318]:IPMMUPV013*/ + [319] = {0xFD81345CU, 0x00000002U}, /* SEC_MODID[319]:IPMMUPV014*/ + [320] = {0xFD813460U, 0x00000002U}, /* SEC_MODID[320]:IPMMUPV015*/ + [321] = {0xFD813464U, 0x00000002U}, /* SEC_MODID[321]:IPMMUPV002*/ + [322] = {0xFD813468U, 0x00000002U}, /* SEC_MODID[322]:IPMMUPV003*/ + [323] = {0xFD81346CU, 0x00000002U}, /* SEC_MODID[323]:IPMMUPV004*/ + [324] = {0xFD813470U, 0x00000002U}, /* SEC_MODID[324]:IPMMUPV005*/ + [325] = {0xFD813474U, 0x00000002U}, /* SEC_MODID[325]:IPMMUPV006*/ + [326] = {0xFD813478U, 0x00000002U}, /* SEC_MODID[326]:IPMMUPV007*/ + [327] = {0xFD81347CU, 0x00000002U}, /* SEC_MODID[327]:IPMMUPV008*/ + [328] = {0xFD813480U, 0x00000002U}, /* SEC_MODID[328]:IPMMUPV009*/ + [329] = {0xE6623400U, 0x00000002U}, /* SEC_MODID[329]:ARRC0*/ + [330] = {0xE6623404U, 0x00000002U}, /* SEC_MODID[330]:ARRC1*/ + [331] = {0xE6623408U, 0x00000002U}, /* SEC_MODID[331]:ARRC2*/ + [332] = {0xE662340CU, 0x00000002U}, /* SEC_MODID[332]:ARRC3*/ + [333] = {0xE6623410U, 0x00000002U}, /* SEC_MODID[333]:ARRC4*/ + [334] = {0xE6623414U, 0x00000002U}, /* SEC_MODID[334]:ARRC5*/ + [335] = {0xE6623418U, 0x00000002U}, /* SEC_MODID[335]:ARRC6*/ + [336] = {0xE662341CU, 0x00000002U}, /* SEC_MODID[336]:ARRC7*/ + [337] = {0xE6623420U, 0x00000002U}, /* SEC_MODID[337]:ARRC8*/ + [338] = {0xE6623424U, 0x00000000U}, /* SEC_MODID[338]:CR0*/ + [339] = {0xE6623428U, 0x00000002U}, /* SEC_MODID[339]:ICUMX*/ + [340] = {0xE662342CU, 0x00000002U}, /* SEC_MODID[340]:ECMRC*/ + [341] = {0xFFC33400U, 0x00000002U}, /* SEC_MODID[341]:DMAWCRC0*/ + [342] = {0xFFC33404U, 0x00000002U}, /* SEC_MODID[342]:DMAWCRC1*/ + [343] = {0xFFC33408U, 0x00000002U}, /* SEC_MODID[343]:DMAWCRC2*/ + [344] = {0xFFC3340CU, 0x00000002U}, /* SEC_MODID[344]:DMAWCRC3*/ + [345] = {0xFFC43400U, 0x00000002U}, /* SEC_MODID[345]:ARMREG00*/ + [346] = {0xFFC43404U, 0x00000002U}, /* SEC_MODID[346]:ARMREG01*/ + [347] = {0xFFC43408U, 0x00000002U}, /* SEC_MODID[347]:ARMREG10*/ + [348] = {0xFFC4340CU, 0x00000002U}, /* SEC_MODID[348]:ARMREG11*/ + [349] = {0xFFC43410U, 0x00000002U}, /* SEC_MODID[349]:ARMREG12*/ + [350] = {0xFFC43414U, 0x00000000U}, /* SEC_MODID[350]:ARMREG13*/ + [351] = {0xFFC43418U, 0x00000000U}, /* SEC_MODID[351]:ARMREG14*/ + [352] = {0xFFC4341CU, 0x00000002U}, /* SEC_MODID[352]:AXICR52SS0*/ + [353] = {0xFFC43420U, 0x00000002U}, /* SEC_MODID[353]:AXICSD0*/ + [354] = {0xFFC43424U, 0x00000002U}, /* SEC_MODID[354]:AXIINTAP0*/ + [355] = {0xFFC43428U, 0x00000002U}, /* SEC_MODID[355]:AXIINTAP1*/ + [356] = {0xFFC4342CU, 0x00000002U}, /* SEC_MODID[356]:AXISECROM*/ + [357] = {0xFFC43430U, 0x00000002U}, /* SEC_MODID[357]:AXISYSRAM0*/ + [358] = {0xFFC43434U, 0x00000002U}, /* SEC_MODID[358]:AXISYSRAM1*/ + [359] = {0xFFC43438U, 0x00000002U}, /* SEC_MODID[359]:ARGREG15*/ + [360] = {0xFFC4343CU, 0x00000002U}, /* SEC_MODID[360]:ARMREG2*/ + [361] = {0xFFC43440U, 0x00000002U}, /* SEC_MODID[361]:ARMREG3*/ + [362] = {0xFFC43444U, 0x00000002U}, /* SEC_MODID[362]:ARMREG4*/ + [363] = {0xFFC43448U, 0x00000002U}, /* SEC_MODID[363]:ARMREG5*/ + [364] = {0xFFC4344CU, 0x00000002U}, /* SEC_MODID[364]:ARMREG6*/ + [365] = {0xFFC43450U, 0x00000002U}, /* SEC_MODID[365]:ARMREG7*/ + [366] = {0xFFC43454U, 0x00000000U}, /* SEC_MODID[366]:ARMREG8*/ + [367] = {0xFFC43458U, 0x00000000U}, /* SEC_MODID[367]:ARMREG9*/ + [368] = {0xFFC4345CU, 0x00000002U}, /* SEC_MODID[368]:ARRD0*/ + [369] = {0xFFC43460U, 0x00000002U}, /* SEC_MODID[369]:ARRD1*/ + [370] = {0xFFC43464U, 0x00000002U}, /* SEC_MODID[370]:ARRD2*/ + [371] = {0xFFC43468U, 0x00000002U}, /* SEC_MODID[371]:ARRD3*/ + [372] = {0xFFC4346CU, 0x00000002U}, /* SEC_MODID[372]:ARRD4*/ + [373] = {0xFFC43470U, 0x00000002U}, /* SEC_MODID[373]:ARRD5*/ + [374] = {0xFFC43474U, 0x00000002U}, /* SEC_MODID[374]:ARRD6*/ + [375] = {0xFFC43478U, 0x00000002U}, /* SEC_MODID[375]:ARRD7*/ + [376] = {0xFFC4347CU, 0x00000002U}, /* SEC_MODID[376]:ARRD8*/ + [377] = {0xFFC43480U, 0x00000002U}, /* SEC_MODID[377]:ARRT0*/ + [378] = {0xFFC43484U, 0x00000002U}, /* SEC_MODID[378]:ARRT1*/ + [379] = {0xFFC43488U, 0x00000002U}, /* SEC_MODID[379]:ARRT2*/ + [380] = {0xFFC4348CU, 0x00000002U}, /* SEC_MODID[380]:ARRT3*/ + [381] = {0xFFC43490U, 0x00000002U}, /* SEC_MODID[381]:ARRT4*/ + [382] = {0xFFC43494U, 0x00000002U}, /* SEC_MODID[382]:ARRT5*/ + [383] = {0xFFC43498U, 0x00000002U}, /* SEC_MODID[383]:ARRT6*/ + [384] = {0xFFC4349CU, 0x00000002U}, /* SEC_MODID[384]:ARRT7*/ + [385] = {0xFFC434A0U, 0x00000002U}, /* SEC_MODID[385]:ARRT8*/ + [386] = {0xFFC434A4U, 0x00000002U}, /* SEC_MODID[386]:CKMRT*/ + [387] = {0xFFC434A8U, 0x00000002U}, /* SEC_MODID[387]:CRC0*/ + [388] = {0xFFC434ACU, 0x00000002U}, /* SEC_MODID[388]:CRC1*/ + [389] = {0xFFC434B0U, 0x00000002U}, /* SEC_MODID[389]:CRC2*/ + [390] = {0xFFC434B4U, 0x00000002U}, /* SEC_MODID[390]:CRC3*/ + [391] = {0xFFC434B8U, 0x00000002U}, /* SEC_MODID[391]:CSD*/ + [392] = {0xFFC434BCU, 0x00000002U}, /* SEC_MODID[392]:ECM*/ + [393] = {0xFFC434C0U, 0x00000002U}, /* SEC_MODID[393]:ECMRT*/ + [394] = {0xFFC434C4U, 0x00000002U}, /* SEC_MODID[394]:FBACR52*/ + [395] = {0xFFC434C8U, 0x00000002U}, /* SEC_MODID[395]:FBART*/ + [396] = {0xFFC434CCU, 0x00000002U}, /* SEC_MODID[396]:INTTP*/ + [397] = {0xFFC434D0U, 0x00000002U}, /* SEC_MODID[397]:IPMMURT000*/ + [398] = {0xFFC434D4U, 0x00000002U}, /* SEC_MODID[398]:IPMMURT100*/ + [399] = {0xFFC434D8U, 0x00000002U}, /* SEC_MODID[399]:KCRC4*/ + [400] = {0xFFC434DCU, 0x00000002U}, /* SEC_MODID[400]:KCRC5*/ + [401] = {0xFFC434E0U, 0x00000002U}, /* SEC_MODID[401]:KCRC6*/ + [402] = {0xFFC434E4U, 0x00000002U}, /* SEC_MODID[402]:KCRC7*/ + [403] = {0xFFC434E8U, 0x00000002U}, /* SEC_MODID[403]:MFI00*/ + [404] = {0xFFC434ECU, 0x00000002U}, /* SEC_MODID[404]:MFI01*/ + [405] = {0xFFC434F0U, 0x00000002U}, /* SEC_MODID[405]:MFI10*/ + [406] = {0xFFC434F4U, 0x00000002U}, /* SEC_MODID[406]:MFI02*/ + [407] = {0xFFC434F8U, 0x00000002U}, /* SEC_MODID[407]:MFI03*/ + [408] = {0xFFC434FCU, 0x00000002U}, /* SEC_MODID[408]:MFI04*/ + [409] = {0xFFC43500U, 0x00000002U}, /* SEC_MODID[409]:MFI05*/ + [410] = {0xFFC43504U, 0x00000002U}, /* SEC_MODID[410]:MFI06*/ + [411] = {0xFFC43508U, 0x00000002U}, /* SEC_MODID[411]:MFI07*/ + [412] = {0xFFC4350CU, 0x00000002U}, /* SEC_MODID[412]:MFI08*/ + [413] = {0xFFC43510U, 0x00000002U}, /* SEC_MODID[413]:MFI09*/ + [414] = {0xFFC43514U, 0x00000002U}, /* SEC_MODID[414]:MFI15*/ + [415] = {0xFFC43518U, 0x00000002U}, /* SEC_MODID[415]:CKMCR52*/ + [416] = {0xFFC4351CU, 0x00000002U}, /* SEC_MODID[416]:RTDM0P*/ + [417] = {0xFFC43520U, 0x00000002U}, /* SEC_MODID[417]:ECMRD*/ + [418] = {0xFFC43524U, 0x00000002U}, /* SEC_MODID[418]:RTDM1P*/ + [419] = {0xFFC4352CU, 0x00000002U}, /* SEC_MODID[419]:RTDM2P*/ + [420] = {0xFFC43530U, 0x00000002U}, /* SEC_MODID[420]:SYSRAM10*/ + [421] = {0xFFC43534U, 0x00000002U}, /* SEC_MODID[421]:RTDM3P*/ + [422] = {0xFFC43538U, 0x00000000U}, /* SEC_MODID[422]:SYSRAM00*/ + [423] = {0xFFC4353CU, 0x00000002U}, /* SEC_MODID[423]:TSIPL0*/ + [424] = {0xFFC43540U, 0x00000002U}, /* SEC_MODID[424]:TSIPL1*/ + [425] = {0xFFC43544U, 0x00000002U}, /* SEC_MODID[425]:TSIPL2*/ + [426] = {0xFFC43548U, 0x00000002U}, /* SEC_MODID[426]:TSIPL3*/ + [427] = {0xFFC4354CU, 0x00000002U}, /* SEC_MODID[427]:TSIPL4*/ + [428] = {0xFFC43550U, 0x00000002U}, /* SEC_MODID[428]:TSIPL5*/ + [429] = {0xFFC43554U, 0x00000002U}, /* SEC_MODID[429]:TSIPL6*/ + [430] = {0xFFC43558U, 0x00000002U}, /* SEC_MODID[430]:TSIPL7*/ + [431] = {0xFFC4355CU, 0x00000002U}, /* SEC_MODID[431]:WCRC0*/ + [432] = {0xFFC43560U, 0x00000002U}, /* SEC_MODID[432]:WCRC1*/ + [433] = {0xFFC43564U, 0x00000002U}, /* SEC_MODID[433]:WCRC2*/ + [434] = {0xFFC43568U, 0x00000002U}, /* SEC_MODID[434]:WCRC3*/ + [435] = {0xFFC43580U, 0x00000002U}, /* SEC_MODID[435]:MFI11*/ + [436] = {0xFFC43584U, 0x00000002U}, /* SEC_MODID[436]:MFI12*/ + [437] = {0xFFC43588U, 0x00000002U}, /* SEC_MODID[437]:MFI13*/ + [438] = {0xFFC4358CU, 0x00000002U}, /* SEC_MODID[438]:MFI14*/ + [439] = {0xFFC43590U, 0x00000002U}, /* SEC_MODID[439]:IPMMURT001*/ + [440] = {0xFFC43594U, 0x00000002U}, /* SEC_MODID[440]:IPMMURT010*/ + [441] = {0xFFC43598U, 0x00000002U}, /* SEC_MODID[441]:IPMMURT011*/ + [442] = {0xFFC4359CU, 0x00000002U}, /* SEC_MODID[442]:IPMMURT012*/ + [443] = {0xFFC435A0U, 0x00000002U}, /* SEC_MODID[443]:IPMMURT013*/ + [444] = {0xFFC435A4U, 0x00000002U}, /* SEC_MODID[444]:IPMMURT014*/ + [445] = {0xFFC435A8U, 0x00000002U}, /* SEC_MODID[445]:IPMMURT015*/ + [446] = {0xFFC435ACU, 0x00000002U}, /* SEC_MODID[446]:IPMMURT002*/ + [447] = {0xFFC435B0U, 0x00000002U}, /* SEC_MODID[447]:IPMMURT003*/ + [448] = {0xFFC435B4U, 0x00000002U}, /* SEC_MODID[448]:IPMMURT004*/ + [449] = {0xFFC435B8U, 0x00000002U}, /* SEC_MODID[449]:IPMMURT005*/ + [450] = {0xFFC435BCU, 0x00000002U}, /* SEC_MODID[450]:IPMMURT006*/ + [451] = {0xFFC435C0U, 0x00000002U}, /* SEC_MODID[451]:IPMMURT007*/ + [452] = {0xFFC435C4U, 0x00000002U}, /* SEC_MODID[452]:IPMMURT008*/ + [453] = {0xFFC435C8U, 0x00000002U}, /* SEC_MODID[453]:IPMMURT009*/ + [454] = {0xFFC435CCU, 0x00000002U}, /* SEC_MODID[454]:IPKMURT101*/ + [455] = {0xFFC435D0U, 0x00000002U}, /* SEC_MODID[455]:IPMMURT110*/ + [456] = {0xFFC435D4U, 0x00000002U}, /* SEC_MODID[456]:IPMMURT111*/ + [457] = {0xFFC435D8U, 0x00000002U}, /* SEC_MODID[457]:IPMMURT112*/ + [458] = {0xFFC435DCU, 0x00000002U}, /* SEC_MODID[458]:IPMMURT113*/ + [459] = {0xFFC435E0U, 0x00000002U}, /* SEC_MODID[459]:IPMMURT114*/ + [460] = {0xFFC435E4U, 0x00000002U}, /* SEC_MODID[460]:IPMMURT115*/ + [461] = {0xFFC435E8U, 0x00000002U}, /* SEC_MODID[461]:IPMMURT102*/ + [462] = {0xFFC435ECU, 0x00000002U}, /* SEC_MODID[462]:IPMMURT103*/ + [463] = {0xFFC435F0U, 0x00000002U}, /* SEC_MODID[463]:IPMMURT104*/ + [464] = {0xFFC435F4U, 0x00000002U}, /* SEC_MODID[464]:IPMMURT105*/ + [465] = {0xFFC435F8U, 0x00000002U}, /* SEC_MODID[465]:IPMMURT106*/ + [466] = {0xFFC435FCU, 0x00000002U}, /* SEC_MODID[466]:IPMMURT107*/ + [467] = {0xFFC43600U, 0x00000002U}, /* SEC_MODID[467]:RTDM000*/ + [468] = {0xFFC43604U, 0x00000002U}, /* SEC_MODID[468]:RTDM001*/ + [469] = {0xFFC43608U, 0x00000002U}, /* SEC_MODID[469]:RTDM010*/ + [470] = {0xFFC4360CU, 0x00000002U}, /* SEC_MODID[470]:RTDM011*/ + [471] = {0xFFC43610U, 0x00000002U}, /* SEC_MODID[471]:RTDM012*/ + [472] = {0xFFC43614U, 0x00000002U}, /* SEC_MODID[472]:RTDM013*/ + [473] = {0xFFC43618U, 0x00000002U}, /* SEC_MODID[473]:RTDM014*/ + [474] = {0xFFC4361CU, 0x00000002U}, /* SEC_MODID[474]:RTDM015*/ + [475] = {0xFFC43620U, 0x00000002U}, /* SEC_MODID[475]:RTDM002*/ + [476] = {0xFFC43624U, 0x00000002U}, /* SEC_MODID[476]:RTDM003*/ + [477] = {0xFFC43628U, 0x00000002U}, /* SEC_MODID[477]:RTDM004*/ + [478] = {0xFFC4362CU, 0x00000002U}, /* SEC_MODID[478]:RTDM005*/ + [479] = {0xFFC43630U, 0x00000002U}, /* SEC_MODID[479]:RTDM006*/ + [480] = {0xFFC43634U, 0x00000002U}, /* SEC_MODID[480]:RTDM007*/ + [481] = {0xFFC43638U, 0x00000002U}, /* SEC_MODID[481]:RTDM008*/ + [482] = {0xFFC4363CU, 0x00000002U}, /* SEC_MODID[482]:RTDM009*/ + [483] = {0xFFC43640U, 0x00000002U}, /* SEC_MODID[483]:RTDM100*/ + [484] = {0xFFC43644U, 0x00000002U}, /* SEC_MODID[484]:RTDM101*/ + [485] = {0xFFC43648U, 0x00000002U}, /* SEC_MODID[485]:RTDM110*/ + [486] = {0xFFC4364CU, 0x00000002U}, /* SEC_MODID[486]:RTDM111*/ + [487] = {0xFFC43650U, 0x00000002U}, /* SEC_MODID[487]:RTDM112*/ + [488] = {0xFFC43654U, 0x00000002U}, /* SEC_MODID[488]:RTDM113*/ + [489] = {0xFFC43658U, 0x00000002U}, /* SEC_MODID[489]:RTDM114*/ + [490] = {0xFFC4365CU, 0x00000002U}, /* SEC_MODID[490]:RTDM115*/ + [491] = {0xFFC43660U, 0x00000002U}, /* SEC_MODID[491]:RTDM102*/ + [492] = {0xFFC43664U, 0x00000002U}, /* SEC_MODID[492]:RTDM103*/ + [493] = {0xFFC43668U, 0x00000002U}, /* SEC_MODID[493]:RTDM104*/ + [494] = {0xFFC4366CU, 0x00000002U}, /* SEC_MODID[494]:RTDM105*/ + [495] = {0xFFC43670U, 0x00000002U}, /* SEC_MODID[495]:RTDM106*/ + [496] = {0xFFC43674U, 0x00000002U}, /* SEC_MODID[496]:RTDM107*/ + [497] = {0xFFC43678U, 0x00000002U}, /* SEC_MODID[497]:RTDM108*/ + [498] = {0xFFC4367CU, 0x00000002U}, /* SEC_MODID[498]:RTDM109*/ + [499] = {0xFFC43680U, 0x00000002U}, /* SEC_MODID[499]:RTDM200*/ + [500] = {0xFFC43684U, 0x00000002U}, /* SEC_MODID[500]:RTDM201*/ + [501] = {0xFFC43688U, 0x00000002U}, /* SEC_MODID[501]:RTDM210*/ + [502] = {0xFFC4368CU, 0x00000002U}, /* SEC_MODID[502]:RTDM211*/ + [503] = {0xFFC43690U, 0x00000002U}, /* SEC_MODID[503]:RTDM212*/ + [504] = {0xFFC43694U, 0x00000002U}, /* SEC_MODID[504]:RTDM213*/ + [505] = {0xFFC43698U, 0x00000002U}, /* SEC_MODID[505]:RTDM214*/ + [506] = {0xFFC4369CU, 0x00000002U}, /* SEC_MODID[506]:RTDM215*/ + [507] = {0xFFC436A0U, 0x00000002U}, /* SEC_MODID[507]:RTDM202*/ + [508] = {0xFFC436A4U, 0x00000002U}, /* SEC_MODID[508]:RTDM203*/ + [509] = {0xFFC436A8U, 0x00000002U}, /* SEC_MODID[509]:RTDM204*/ + [510] = {0xFFC436ACU, 0x00000002U}, /* SEC_MODID[510]:RTDM205*/ + [511] = {0xFFC436B0U, 0x00000002U}, /* SEC_MODID[511]:RTDM206*/ + [512] = {0xFFC436B4U, 0x00000002U}, /* SEC_MODID[512]:RTDM207*/ + [513] = {0xFFC436B8U, 0x00000002U}, /* SEC_MODID[513]:RTDM208*/ + [514] = {0xFFC436BCU, 0x00000002U}, /* SEC_MODID[514]:RTDM209*/ + [515] = {0xFFC436C0U, 0x00000002U}, /* SEC_MODID[515]:RTDM300*/ + [516] = {0xFFC436C4U, 0x00000002U}, /* SEC_MODID[516]:RTDM301*/ + [517] = {0xFFC436C8U, 0x00000002U}, /* SEC_MODID[517]:RTDM310*/ + [518] = {0xFFC436CCU, 0x00000002U}, /* SEC_MODID[518]:RTDM311*/ + [519] = {0xFFC436D0U, 0x00000002U}, /* SEC_MODID[519]:RTDM312*/ + [520] = {0xFFC436D4U, 0x00000002U}, /* SEC_MODID[520]:RTDM313*/ + [521] = {0xFFC436D8U, 0x00000002U}, /* SEC_MODID[521]:RTDM314*/ + [522] = {0xFFC436DCU, 0x00000002U}, /* SEC_MODID[522]:RTDM315*/ + [523] = {0xFFC436E0U, 0x00000002U}, /* SEC_MODID[523]:RTDM302*/ + [524] = {0xFFC436E4U, 0x00000002U}, /* SEC_MODID[524]:RTDM303*/ + [525] = {0xFFC436E8U, 0x00000002U}, /* SEC_MODID[525]:RTDM304*/ + [526] = {0xFFC436ECU, 0x00000002U}, /* SEC_MODID[526]:RTDM305*/ + [527] = {0xFFC436F0U, 0x00000002U}, /* SEC_MODID[527]:RTDM306*/ + [528] = {0xFFC436F4U, 0x00000002U}, /* SEC_MODID[528]:RTDM307*/ + [529] = {0xFFC436F8U, 0x00000002U}, /* SEC_MODID[529]:RTDM308*/ + [530] = {0xFFC436FCU, 0x00000002U}, /* SEC_MODID[530]:RTDM309*/ + [531] = {0xFFC43700U, 0x00000002U}, /* SEC_MODID[531]:IPMMURT108*/ + [532] = {0xFFC43704U, 0x00000002U}, /* SEC_MODID[532]:IPMMURT109*/ + [533] = {0xFFC43708U, 0x00000000U}, /* SEC_MODID[533]:SYSRAM01*/ + [534] = {0xFFC4370CU, 0x00000002U}, /* SEC_MODID[534]:SYSRAM02*/ + [535] = {0xFFC43710U, 0x00000000U}, /* SEC_MODID[535]:SYSRAM03*/ + [536] = {0xFFC43714U, 0x00000000U}, /* SEC_MODID[536]:SYSRAM04*/ + [537] = {0xFFC43718U, 0x00000000U}, /* SEC_MODID[537]:SYSRAM05*/ + [538] = {0xFFC4371CU, 0x00000000U}, /* SEC_MODID[538]:SYSRAM06*/ + [539] = {0xFFC43720U, 0x00000002U}, /* SEC_MODID[539]:SYSRAM07*/ + [540] = {0xFFC43724U, 0x00000002U}, /* SEC_MODID[540]:SYSRAM11*/ + [541] = {0xFFC43728U, 0x00000002U}, /* SEC_MODID[541]:SYSRAM12*/ + [542] = {0xFFC4372CU, 0x00000002U}, /* SEC_MODID[542]:SYSRAM13*/ + [543] = {0xFFC43730U, 0x00000002U}, /* SEC_MODID[543]:SYSRAM14*/ + [544] = {0xFFC43734U, 0x00000002U}, /* SEC_MODID[544]:SYSRAM15*/ + [545] = {0xFFC43738U, 0x00000002U}, /* SEC_MODID[545]:SYSRAM16*/ + [546] = {0xFFC4373CU, 0x00000002U}, /* SEC_MODID[546]:SYSRAM17*/ + [547] = {0xFFC43760U, 0x00000002U}, /* SEC_MODID[547]:BKBUF*/ + [548] = {0xFFC43764U, 0x00000002U}, /* SEC_MODID[548]:AXICR52SS1*/ + [549] = {0xFFC43768U, 0x00000002U}, /* SEC_MODID[549]:AXICR52SS2*/ + [550] = {0xFF863400U, 0x00000002U}, /* SEC_MODID[550]:ARSC0*/ + [551] = {0xFF863404U, 0x00000002U}, /* SEC_MODID[551]:ARSC1*/ + [552] = {0xFF863408U, 0x00000002U}, /* SEC_MODID[552]:ARSC2*/ + [553] = {0xFF86340CU, 0x00000002U}, /* SEC_MODID[553]:ARSC3*/ + [554] = {0xFF863410U, 0x00000002U}, /* SEC_MODID[554]:ARSC4*/ + [555] = {0xFF863414U, 0x00000002U}, /* SEC_MODID[555]:ARSC5*/ + [556] = {0xFF863418U, 0x00000002U}, /* SEC_MODID[556]:ARSC6*/ + [557] = {0xFF86341CU, 0x00000002U}, /* SEC_MODID[557]:ARSC7*/ + [558] = {0xFF863420U, 0x00000002U}, /* SEC_MODID[558]:ARSC8*/ + [559] = {0xFF863424U, 0x00000002U}, /* SEC_MODID[559]:ARSTM0*/ + [560] = {0xFF863428U, 0x00000002U}, /* SEC_MODID[560]:ARSTM1*/ + [561] = {0xFF86342CU, 0x00000002U}, /* SEC_MODID[561]:CSD1S*/ + [562] = {0xFF863430U, 0x00000002U}, /* SEC_MODID[562]:AXIFBABUSTOP0*/ + [563] = {0xFF863434U, 0x00000002U}, /* SEC_MODID[563]:AXIFBABUSTOP1*/ + [564] = {0xFF863438U, 0x00000002U}, /* SEC_MODID[564]:ARSTM2*/ + [565] = {0xFF86343CU, 0x00000002U}, /* SEC_MODID[565]:ARSTM3*/ + [566] = {0xFF863440U, 0x00000002U}, /* SEC_MODID[566]:ARSTM4*/ + [567] = {0xFF863444U, 0x00000002U}, /* SEC_MODID[567]:ARSTM5*/ + [568] = {0xFF863448U, 0x00000002U}, /* SEC_MODID[568]:ARSTM6*/ + [569] = {0xFF86344CU, 0x00000002U}, /* SEC_MODID[569]:ARSTM7*/ + [570] = {0xFF863450U, 0x00000002U}, /* SEC_MODID[570]:ARSTM8*/ + [571] = {0xFF863454U, 0x00000002U}, /* SEC_MODID[571]:ECMTOP*/ + [572] = {0xFF863458U, 0x00000002U}, /* SEC_MODID[572]:FBA*/ + [573] = {0xFF86345CU, 0x00000002U}, /* SEC_MODID[573]:FBC*/ + [574] = {0xFF863460U, 0x00000002U}, /* SEC_MODID[574]:AXICCI00*/ + [575] = {0xFF863464U, 0x00000002U}, /* SEC_MODID[575]:AXICCI01*/ + [576] = {0xFF863468U, 0x00000002U}, /* SEC_MODID[576]:AXICCI10*/ + [577] = {0xFF86346CU, 0x00000002U}, /* SEC_MODID[577]:AXICCI11*/ + [578] = {0xFF863470U, 0x00000002U}, /* SEC_MODID[578]:AXICCI12*/ + [579] = {0xFF863474U, 0x00000002U}, /* SEC_MODID[579]:AXICCI13*/ + [580] = {0xFF863478U, 0x00000002U}, /* SEC_MODID[580]:AXICCI14*/ + [581] = {0xFF86347CU, 0x00000002U}, /* SEC_MODID[581]:AXICCI15*/ + [582] = {0xFF863480U, 0x00000002U}, /* SEC_MODID[582]:AXICCI2*/ + [583] = {0xFF863484U, 0x00000002U}, /* SEC_MODID[583]:AXICCI3*/ + [584] = {0xFF863488U, 0x00000002U}, /* SEC_MODID[584]:AXICCI4*/ + [585] = {0xFF86348CU, 0x00000002U}, /* SEC_MODID[585]:AXICCI5*/ + [586] = {0xFF863490U, 0x00000002U}, /* SEC_MODID[586]:AXICCI6*/ + [587] = {0xFF863494U, 0x00000002U}, /* SEC_MODID[587]:AXICCI7*/ + [588] = {0xFF863498U, 0x00000002U}, /* SEC_MODID[588]:AXICCI8*/ + [589] = {0xFF86349CU, 0x00000002U}, /* SEC_MODID[589]:AXICCI9*/ + [590] = {0xFF8634A0U, 0x00000002U}, /* SEC_MODID[590]:ECMSTM*/ + [591] = {0xE7783400U, 0x00000002U}, /* SEC_MODID[591]:DMASSI00*/ + [592] = {0xE7783404U, 0x00000002U}, /* SEC_MODID[592]:DMASSI01*/ + [593] = {0xE7783408U, 0x00000002U}, /* SEC_MODID[593]:DMASSI02*/ + [594] = {0xE778340CU, 0x00000002U}, /* SEC_MODID[594]:DMASSI03*/ + [595] = {0xE7783410U, 0x00000002U}, /* SEC_MODID[595]:DMASSI04*/ + [596] = {0xE7783414U, 0x00000002U}, /* SEC_MODID[596]:DMAI2C0*/ + [597] = {0xE7783418U, 0x00000002U}, /* SEC_MODID[597]:DMAI2C1*/ + [598] = {0xE778341CU, 0x00000002U}, /* SEC_MODID[598]:DMAI2C2*/ + [599] = {0xE7783420U, 0x00000002U}, /* SEC_MODID[599]:DMAI2C3*/ + [600] = {0xE7783424U, 0x00000002U}, /* SEC_MODID[600]:DMAI2C4*/ + [601] = {0xE7783428U, 0x00000002U}, /* SEC_MODID[601]:DMAI2C5*/ + [602] = {0xE778342CU, 0x00000002U}, /* SEC_MODID[602]:DMASSI05*/ + [603] = {0xE7783430U, 0x00000002U}, /* SEC_MODID[603]:DMASSI06*/ + [604] = {0xE7783434U, 0x00000002U}, /* SEC_MODID[604]:DMASSI07*/ + [605] = {0xE67C3400U, 0x00000002U}, /* SEC_MODID[605]:ARMM*/ + [606] = {0xE67C3404U, 0x00000002U}, /* SEC_MODID[606]:AXIARNMM*/ + [607] = {0xE67C3408U, 0x00000002U}, /* SEC_MODID[607]:ARSM0*/ + [608] = {0xE67C340CU, 0x00000002U}, /* SEC_MODID[608]:ARSM1*/ + [609] = {0xE67C3410U, 0x00000002U}, /* SEC_MODID[609]:ARSM2*/ + [610] = {0xE67C3414U, 0x00000002U}, /* SEC_MODID[610]:AXIQOS0*/ + [611] = {0xE67C3418U, 0x00000002U}, /* SEC_MODID[611]:AXIQOS1*/ + [612] = {0xE67C341CU, 0x00000002U}, /* SEC_MODID[612]:AXIQOS2*/ + [613] = {0xE67C3420U, 0x00000002U}, /* SEC_MODID[613]:AXIQOS3*/ + [614] = {0xE67C3424U, 0x00000002U}, /* SEC_MODID[614]:AXIQOS4*/ + [615] = {0xE67C3428U, 0x00000002U}, /* SEC_MODID[615]:AXIQOS5*/ + [616] = {0xE67C342CU, 0x00000002U}, /* SEC_MODID[616]:AXIQOS6*/ + [617] = {0xE67C3430U, 0x00000002U}, /* SEC_MODID[617]:AXIQOS7*/ + [618] = {0xE67C3434U, 0x00000002U}, /* SEC_MODID[618]:ARSM3*/ + [619] = {0xE67C3438U, 0x00000002U}, /* SEC_MODID[619]:ARSM4*/ + [620] = {0xE67C343CU, 0x00000002U}, /* SEC_MODID[620]:ARSM5*/ + [621] = {0xE67C3440U, 0x00000002U}, /* SEC_MODID[621]:ARSM6*/ + [622] = {0xE67C3444U, 0x00000002U}, /* SEC_MODID[622]:ARSM7*/ + [623] = {0xE67C3448U, 0x00000002U}, /* SEC_MODID[623]:ARSM8*/ + [624] = {0xE67C344CU, 0x00000000U}, /* SEC_MODID[624]:AXMM0*/ + [625] = {0xE67C3450U, 0x00000000U}, /* SEC_MODID[625]:AXMM1*/ + [626] = {0xE67C3454U, 0x00000002U}, /* SEC_MODID[626]:AXMMPMON*/ + [627] = {0xE67C3458U, 0x00000002U}, /* SEC_MODID[627]:CKMMM*/ + [628] = {0xE67C345CU, 0x00000002U}, /* SEC_MODID[628]:ECMMM*/ + [629] = {0xE67C3460U, 0x00000002U}, /* SEC_MODID[629]:FBADBSC0*/ + [630] = {0xE67C3464U, 0x00000002U}, /* SEC_MODID[630]:FBADBSC1*/ + [631] = {0xE67C3468U, 0x00000002U}, /* SEC_MODID[631]:FBAMM*/ + [632] = {0xE67C346CU, 0x00000002U}, /* SEC_MODID[632]:IPMMUMM00*/ + [633] = {0xE67C3470U, 0x00000002U}, /* SEC_MODID[633]:DBS0A0*/ + [634] = {0xE67C3474U, 0x00000002U}, /* SEC_MODID[634]:DBS0A1*/ + [635] = {0xE67C3478U, 0x00000002U}, /* SEC_MODID[635]:DBS1A0*/ + [636] = {0xE67C347CU, 0x00000002U}, /* SEC_MODID[636]:DBS1A1*/ + [637] = {0xE67C3480U, 0x00000002U}, /* SEC_MODID[637]:AXCIDBS*/ + [638] = {0xE67C3484U, 0x00000002U}, /* SEC_MODID[638]:FCPRC*/ + [639] = {0xE67C3488U, 0x00000002U}, /* SEC_MODID[639]:DBS0D0*/ + [640] = {0xE67C348CU, 0x00000002U}, /* SEC_MODID[640]:DBS0D1*/ + [641] = {0xE67C3490U, 0x00000002U}, /* SEC_MODID[641]:DBS1D0*/ + [642] = {0xE67C3494U, 0x00000002U}, /* SEC_MODID[642]:DBS1D1*/ + [643] = {0xE67C3498U, 0x00000002U}, /* SEC_MODID[643]:FBADDR*/ + [644] = {0xE67C349CU, 0x00000002U}, /* SEC_MODID[644]:IPMMUMM01*/ + [645] = {0xE67C34A0U, 0x00000002U}, /* SEC_MODID[645]:IPMMUMM10*/ + [646] = {0xE67C34A4U, 0x00000002U}, /* SEC_MODID[646]:IPMMUMM11*/ + [647] = {0xE67C34A8U, 0x00000002U}, /* SEC_MODID[647]:IPMMUMM12*/ + [648] = {0xE67C34ACU, 0x00000002U}, /* SEC_MODID[648]:IPMMUMM13*/ + [649] = {0xE67C34B0U, 0x00000002U}, /* SEC_MODID[649]:IPMMUMM14*/ + [650] = {0xE67C34B4U, 0x00000002U}, /* SEC_MODID[650]:IPMMUMM15*/ + [651] = {0xE67C34B8U, 0x00000002U}, /* SEC_MODID[651]:IPMMUMM02*/ + [652] = {0xE67C34BCU, 0x00000002U}, /* SEC_MODID[652]:IPMMUMM03*/ + [653] = {0xE67C34C0U, 0x00000002U}, /* SEC_MODID[653]:IPMMUMM04*/ + [654] = {0xE67C34C4U, 0x00000002U}, /* SEC_MODID[654]:IPMMUMM05*/ + [655] = {0xE67C34C8U, 0x00000002U}, /* SEC_MODID[655]:IPMMUMM06*/ + [656] = {0xE67C34CCU, 0x00000002U}, /* SEC_MODID[656]:IPMMUMM07*/ + [657] = {0xE67C34D0U, 0x00000002U}, /* SEC_MODID[657]:IPMMUMM08*/ + [658] = {0xE67C34D4U, 0x00000002U}, /* SEC_MODID[658]:IPMMUMM09*/ + [659] = {0xFF803400U, 0x00000002U}, /* SEC_MODID[659]:ARSN0*/ + [660] = {0xFF803404U, 0x00000002U}, /* SEC_MODID[660]:ARSN1*/ + [661] = {0xFF803408U, 0x00000002U}, /* SEC_MODID[661]:ARSN2*/ + [662] = {0xFF80340CU, 0x00000002U}, /* SEC_MODID[662]:ARSN3*/ + [663] = {0xFF803410U, 0x00000002U}, /* SEC_MODID[663]:ARSN4*/ + [664] = {0xFF803414U, 0x00000002U}, /* SEC_MODID[664]:ARSN5*/ + [665] = {0xFF803418U, 0x00000002U}, /* SEC_MODID[665]:ARSN6*/ + [666] = {0xFF80341CU, 0x00000002U}, /* SEC_MODID[666]:ARSN7*/ + [667] = {0xFF803420U, 0x00000002U}, /* SEC_MODID[667]:ARSN8*/ + [668] = {0xFF803424U, 0x00000002U}, /* SEC_MODID[668]:ECMTOP3*/ + [669] = {0xE7753400U, 0x00000002U}, /* SEC_MODID[669]:ARSD00*/ + [670] = {0xE7753404U, 0x00000002U}, /* SEC_MODID[670]:ARSD01*/ + [671] = {0xE7753408U, 0x00000002U}, /* SEC_MODID[671]:ARSD02*/ + [672] = {0xE775340CU, 0x00000002U}, /* SEC_MODID[672]:ARSD03*/ + [673] = {0xE7753410U, 0x00000002U}, /* SEC_MODID[673]:ARSD04*/ + [674] = {0xE7753414U, 0x00000002U}, /* SEC_MODID[674]:ARSD05*/ + [675] = {0xE7753418U, 0x00000002U}, /* SEC_MODID[675]:ARSD06*/ + [676] = {0xE775341CU, 0x00000002U}, /* SEC_MODID[676]:AXIFRAY*/ + [677] = {0xE7753420U, 0x00000002U}, /* SEC_MODID[677]:AXIIPC*/ + [678] = {0xE7753428U, 0x00000002U}, /* SEC_MODID[678]:AXIRPC*/ + [679] = {0xE775342CU, 0x00000002U}, /* SEC_MODID[679]:AXISDHI0*/ + [680] = {0xE7753430U, 0x00000002U}, /* SEC_MODID[680]:ARSD07*/ + [681] = {0xE7753434U, 0x00000002U}, /* SEC_MODID[681]:ARSD08*/ + [682] = {0xE7753438U, 0x00000002U}, /* SEC_MODID[682]:ARSP00*/ + [683] = {0xE775343CU, 0x00000002U}, /* SEC_MODID[683]:ARSP01*/ + [684] = {0xE7753440U, 0x00000002U}, /* SEC_MODID[684]:ARSP02*/ + [685] = {0xE7753444U, 0x00000002U}, /* SEC_MODID[685]:ARSP03*/ + [686] = {0xE7753448U, 0x00000002U}, /* SEC_MODID[686]:ARSP04*/ + [687] = {0xE775344CU, 0x00000002U}, /* SEC_MODID[687]:ARSP05*/ + [688] = {0xE7753450U, 0x00000002U}, /* SEC_MODID[688]:ARSP06*/ + [689] = {0xE7753454U, 0x00000002U}, /* SEC_MODID[689]:ARSP07*/ + [690] = {0xE7753458U, 0x00000002U}, /* SEC_MODID[690]:ARSP08*/ + [691] = {0xE775345CU, 0x00000002U}, /* SEC_MODID[691]:IPMMUDS001*/ + [692] = {0xE7753460U, 0x00000002U}, /* SEC_MODID[692]:CKMPER0*/ + [693] = {0xE7753464U, 0x00000002U}, /* SEC_MODID[693]:ECMPER0*/ + [694] = {0xE7753468U, 0x00000002U}, /* SEC_MODID[694]:FBAPER0*/ + [695] = {0xE775346CU, 0x00000002U}, /* SEC_MODID[695]:FSO0*/ + [696] = {0xE7753470U, 0x00000002U}, /* SEC_MODID[696]:FSO1*/ + [697] = {0xE7753474U, 0x00000002U}, /* SEC_MODID[697]:FSO10*/ + [698] = {0xE7753478U, 0x00000002U}, /* SEC_MODID[698]:FSO2*/ + [699] = {0xE775347CU, 0x00000002U}, /* SEC_MODID[699]:FSO3*/ + [700] = {0xE7753480U, 0x00000002U}, /* SEC_MODID[700]:FSO4*/ + [701] = {0xE7753484U, 0x00000002U}, /* SEC_MODID[701]:FSO5*/ + [702] = {0xE7753488U, 0x00000002U}, /* SEC_MODID[702]:FSO6*/ + [703] = {0xE775348CU, 0x00000002U}, /* SEC_MODID[703]:FSO7*/ + [704] = {0xE7753490U, 0x00000002U}, /* SEC_MODID[704]:FSO8*/ + [705] = {0xE7753494U, 0x00000002U}, /* SEC_MODID[705]:FSO9*/ + [706] = {0xE7753498U, 0x00000002U}, /* SEC_MODID[706]:ADG*/ + [707] = {0xE775349CU, 0x00000002U}, /* SEC_MODID[707]:ECMSD0*/ + [708] = {0xE77534A0U, 0x00000002U}, /* SEC_MODID[708]:IPMMUDS010*/ + [709] = {0xE77534A4U, 0x00000002U}, /* SEC_MODID[709]:IPMMUDS011*/ + [710] = {0xE77534A8U, 0x00000002U}, /* SEC_MODID[710]:I2C0*/ + [711] = {0xE77534ACU, 0x00000002U}, /* SEC_MODID[711]:I2C1*/ + [712] = {0xE77534B0U, 0x00000002U}, /* SEC_MODID[712]:I2C2*/ + [713] = {0xE77534B4U, 0x00000002U}, /* SEC_MODID[713]:I2C3*/ + [714] = {0xE77534B8U, 0x00000002U}, /* SEC_MODID[714]:I2C4*/ + [715] = {0xE77534BCU, 0x00000002U}, /* SEC_MODID[715]:I2C5*/ + [716] = {0xE77534C0U, 0x00000002U}, /* SEC_MODID[716]:IPMMUDS012*/ + [717] = {0xE77534C4U, 0x00000002U}, /* SEC_MODID[717]:IPC*/ + [718] = {0xE77534C8U, 0x00000002U}, /* SEC_MODID[718]:IPMMUDS000*/ + [719] = {0xE77534CCU, 0x00000002U}, /* SEC_MODID[719]:IPMMUDS013*/ + [720] = {0xE77534D0U, 0x00000002U}, /* SEC_MODID[720]:IPMMUDS014*/ + [721] = {0xE77534D4U, 0x00000002U}, /* SEC_MODID[721]:IPMMUDS015*/ + [722] = {0xE77534D8U, 0x00000002U}, /* SEC_MODID[722]:IPMMUDS002*/ + [723] = {0xE77534DCU, 0x00000002U}, /* SEC_MODID[723]:IPMMUDS003*/ + [724] = {0xE77534E0U, 0x00000002U}, /* SEC_MODID[724]:IPMMUDS004*/ + [725] = {0xE77534E4U, 0x00000002U}, /* SEC_MODID[725]:IPMMUDS005*/ + [726] = {0xE77534E8U, 0x00000002U}, /* SEC_MODID[726]:SSI*/ + [727] = {0xE77534ECU, 0x00000002U}, /* SEC_MODID[727]:IPMMUDS006*/ + [728] = {0xE77534F0U, 0x00000002U}, /* SEC_MODID[728]:IPMMUDS007*/ + [729] = {0xE77534F4U, 0x00000002U}, /* SEC_MODID[729]:SYDM1P*/ + [730] = {0xE77534F8U, 0x00000002U}, /* SEC_MODID[730]:IPMMUDS008*/ + [731] = {0xE77534FCU, 0x00000002U}, /* SEC_MODID[731]:SYDM2P*/ + [732] = {0xE7753500U, 0x00000002U}, /* SEC_MODID[732]:IPMMUDS009*/ + [733] = {0xE7753640U, 0x00000002U}, /* SEC_MODID[733]:SYDM100*/ + [734] = {0xE7753644U, 0x00000002U}, /* SEC_MODID[734]:SYDM101*/ + [735] = {0xE7753648U, 0x00000002U}, /* SEC_MODID[735]:SYDM110*/ + [736] = {0xE775364CU, 0x00000002U}, /* SEC_MODID[736]:SYDM111*/ + [737] = {0xE7753650U, 0x00000002U}, /* SEC_MODID[737]:SYDM112*/ + [738] = {0xE7753654U, 0x00000002U}, /* SEC_MODID[738]:SYDM113*/ + [739] = {0xE7753658U, 0x00000002U}, /* SEC_MODID[739]:SYDM114*/ + [740] = {0xE775365CU, 0x00000002U}, /* SEC_MODID[740]:SYDM115*/ + [741] = {0xE7753660U, 0x00000002U}, /* SEC_MODID[741]:SYDM102*/ + [742] = {0xE7753664U, 0x00000002U}, /* SEC_MODID[742]:SYDM103*/ + [743] = {0xE7753668U, 0x00000002U}, /* SEC_MODID[743]:SYDM104*/ + [744] = {0xE775366CU, 0x00000002U}, /* SEC_MODID[744]:SYDM105*/ + [745] = {0xE7753670U, 0x00000002U}, /* SEC_MODID[745]:SYDM106*/ + [746] = {0xE7753674U, 0x00000002U}, /* SEC_MODID[746]:SYDM107*/ + [747] = {0xE7753678U, 0x00000002U}, /* SEC_MODID[747]:SYDM108*/ + [748] = {0xE775367CU, 0x00000002U}, /* SEC_MODID[748]:SYDM109*/ + [749] = {0xE7753680U, 0x00000002U}, /* SEC_MODID[749]:SYDM200*/ + [750] = {0xE7753684U, 0x00000002U}, /* SEC_MODID[750]:SYDM201*/ + [751] = {0xE7753688U, 0x00000002U}, /* SEC_MODID[751]:SYDM210*/ + [752] = {0xE775368CU, 0x00000002U}, /* SEC_MODID[752]:SYDM211*/ + [753] = {0xE7753690U, 0x00000002U}, /* SEC_MODID[753]:SYDM212*/ + [754] = {0xE7753694U, 0x00000002U}, /* SEC_MODID[754]:SYDM213*/ + [755] = {0xE7753698U, 0x00000002U}, /* SEC_MODID[755]:SYDM214*/ + [756] = {0xE775369CU, 0x00000002U}, /* SEC_MODID[756]:SYDM215*/ + [757] = {0xE77536A0U, 0x00000002U}, /* SEC_MODID[757]:SYDM202*/ + [758] = {0xE77536A4U, 0x00000002U}, /* SEC_MODID[758]:SYDM203*/ + [759] = {0xE77536A8U, 0x00000002U}, /* SEC_MODID[759]:SYDM204*/ + [760] = {0xE77536ACU, 0x00000002U}, /* SEC_MODID[760]:SYDM205*/ + [761] = {0xE77536B0U, 0x00000002U}, /* SEC_MODID[761]:SYDM206*/ + [762] = {0xE77536B4U, 0x00000002U}, /* SEC_MODID[762]:SYDM207*/ + [763] = {0xE77536B8U, 0x00000002U}, /* SEC_MODID[763]:SYDM208*/ + [764] = {0xE77536BCU, 0x00000002U}, /* SEC_MODID[764]:SYDM209*/ + [765] = {0xFE683400U, 0x00000002U}, /* SEC_MODID[765]:ARVC0*/ + [766] = {0xFE683404U, 0x00000002U}, /* SEC_MODID[766]:ARVC1*/ + [767] = {0xFE683408U, 0x00000002U}, /* SEC_MODID[767]:ARVC2*/ + [768] = {0xFE68340CU, 0x00000002U}, /* SEC_MODID[768]:ARVC3*/ + [769] = {0xFE683410U, 0x00000002U}, /* SEC_MODID[769]:AXIFBABUSVC*/ + [770] = {0xFE683414U, 0x00000002U}, /* SEC_MODID[770]:ARVC4*/ + [771] = {0xFE683418U, 0x00000002U}, /* SEC_MODID[771]:ARVC5*/ + [772] = {0xFE68341CU, 0x00000002U}, /* SEC_MODID[772]:ARVC6*/ + [773] = {0xFE683420U, 0x00000002U}, /* SEC_MODID[773]:ARVC7*/ + [774] = {0xFE683424U, 0x00000002U}, /* SEC_MODID[774]:ARVC8*/ + [775] = {0xFE683428U, 0x00000002U}, /* SEC_MODID[775]:CKMVC*/ + [776] = {0xFE68342CU, 0x00000002U}, /* SEC_MODID[776]:ECMVC0*/ + [777] = {0xFE683430U, 0x00000002U}, /* SEC_MODID[777]:IMR2*/ + [778] = {0xFE683434U, 0x00000002U}, /* SEC_MODID[778]:IMR0*/ + [779] = {0xFE683438U, 0x00000002U}, /* SEC_MODID[779]:IMR1*/ + [780] = {0xFE68343CU, 0x00000002U}, /* SEC_MODID[780]:IPMMUVC01*/ + [781] = {0xFE683440U, 0x00000002U}, /* SEC_MODID[781]:IPMMUVC10*/ + [782] = {0xFE683444U, 0x00000002U}, /* SEC_MODID[782]:IMS0*/ + [783] = {0xFE683448U, 0x00000002U}, /* SEC_MODID[783]:IMS1*/ + [784] = {0xFE68344CU, 0x00000002U}, /* SEC_MODID[784]:IPMMUVC00*/ + [785] = {0xFE683450U, 0x00000002U}, /* SEC_MODID[785]:IPMMUVC11*/ + [786] = {0xFE683454U, 0x00000002U}, /* SEC_MODID[786]:IPMMUVC12*/ + [787] = {0xFE683458U, 0x00000002U}, /* SEC_MODID[787]:IPMMUVC13*/ + [788] = {0xFE68345CU, 0x00000002U}, /* SEC_MODID[788]:IPMMUVC14*/ + [789] = {0xFE683460U, 0x00000002U}, /* SEC_MODID[789]:IPMMUVC15*/ + [790] = {0xFE683464U, 0x00000002U}, /* SEC_MODID[790]:IPMMUVC02*/ + [791] = {0xFE683468U, 0x00000002U}, /* SEC_MODID[791]:IPMMUVC03*/ + [792] = {0xFE68346CU, 0x00000002U}, /* SEC_MODID[792]:IPMMUVC04*/ + [793] = {0xFE683470U, 0x00000002U}, /* SEC_MODID[793]:IPMMUVC05*/ + [794] = {0xFE683474U, 0x00000002U}, /* SEC_MODID[794]:IPMMUVC06*/ + [795] = {0xFE683478U, 0x00000002U}, /* SEC_MODID[795]:IPMMUVC07*/ + [796] = {0xFE68347CU, 0x00000002U}, /* SEC_MODID[796]:IPMMUVC08*/ + [797] = {0xFE683480U, 0x00000002U}, /* SEC_MODID[797]:IPMMUVC09*/ + [798] = {0xFE683484U, 0x00000002U}, /* SEC_MODID[798]:IV1ES*/ + [799] = {0xFEBE3400U, 0x00000002U}, /* SEC_MODID[799]:CSITOP0*/ + [800] = {0xFEBE3404U, 0x00000002U}, /* SEC_MODID[800]:ARVI10*/ + [801] = {0xFEBE3408U, 0x00000002U}, /* SEC_MODID[801]:ARVI11*/ + [802] = {0xFEBE340CU, 0x00000002U}, /* SEC_MODID[802]:ARVI12*/ + [803] = {0xFEBE3410U, 0x00000002U}, /* SEC_MODID[803]:ARVI13*/ + [804] = {0xFEBE3414U, 0x00000002U}, /* SEC_MODID[804]:ARVI14*/ + [805] = {0xFEBE3418U, 0x00000002U}, /* SEC_MODID[805]:ARVI15*/ + [806] = {0xFEBE341CU, 0x00000002U}, /* SEC_MODID[806]:ARVI16*/ + [807] = {0xFEBE3420U, 0x00000002U}, /* SEC_MODID[807]:ARVI17*/ + [808] = {0xFEBE3424U, 0x00000002U}, /* SEC_MODID[808]:ARVI18*/ + [809] = {0xFEBE3428U, 0x00000002U}, /* SEC_MODID[809]:CKMVIO*/ + [810] = {0xFEBE342CU, 0x00000002U}, /* SEC_MODID[810]:CSITOP1*/ + [811] = {0xFEBE3434U, 0x00000002U}, /* SEC_MODID[811]:DSITLINK0*/ + [812] = {0xFEBE3438U, 0x00000002U}, /* SEC_MODID[812]:DSITLINK1*/ + [813] = {0xFEBE343CU, 0x00000002U}, /* SEC_MODID[813]:ECMVIO1*/ + [814] = {0xFEBE3444U, 0x00000002U}, /* SEC_MODID[814]:IPMMUVI001*/ + [815] = {0xFEBE3448U, 0x00000002U}, /* SEC_MODID[815]:FCPVX0*/ + [816] = {0xFEBE344CU, 0x00000002U}, /* SEC_MODID[816]:FCPVX1*/ + [817] = {0xFEBE3458U, 0x00000002U}, /* SEC_MODID[817]:IPMMUVI000*/ + [818] = {0xFEBE345CU, 0x00000002U}, /* SEC_MODID[818]:IPMMUVI100*/ + [819] = {0xFEBE3460U, 0x00000002U}, /* SEC_MODID[819]:IPMMUVI010*/ + [820] = {0xFEBE3464U, 0x00000002U}, /* SEC_MODID[820]:IPMMUVI011*/ + [821] = {0xFEBE3468U, 0x00000002U}, /* SEC_MODID[821]:VSPX0*/ + [822] = {0xFEBE346CU, 0x00000002U}, /* SEC_MODID[822]:VSPX1*/ + [823] = {0xFEBE3478U, 0x00000002U}, /* SEC_MODID[823]:IPMMUVI012*/ + [824] = {0xFEBE347CU, 0x00000002U}, /* SEC_MODID[824]:IPMMUVI013*/ + [825] = {0xFEBE3480U, 0x00000002U}, /* SEC_MODID[825]:IPMMUVI014*/ + [826] = {0xFEBE3484U, 0x00000002U}, /* SEC_MODID[826]:IPMMUVI015*/ + [827] = {0xFEBE3488U, 0x00000002U}, /* SEC_MODID[827]:IPMMUVI002*/ + [828] = {0xFEBE348CU, 0x00000002U}, /* SEC_MODID[828]:IPMMUVI003*/ + [829] = {0xFEBE3490U, 0x00000002U}, /* SEC_MODID[829]:IPMMUVI004*/ + [830] = {0xFEBE3494U, 0x00000002U}, /* SEC_MODID[830]:IPMMUVI005*/ + [831] = {0xFEBE3498U, 0x00000002U}, /* SEC_MODID[831]:IPMMUVI006*/ + [832] = {0xFEBE349CU, 0x00000002U}, /* SEC_MODID[832]:IPMMUVI007*/ + [833] = {0xFEBE34A0U, 0x00000002U}, /* SEC_MODID[833]:IPMMUVI008*/ + [834] = {0xFEBE34A4U, 0x00000002U}, /* SEC_MODID[834]:IPMMUVI009*/ + [835] = {0xFEBE34A8U, 0x00000002U}, /* SEC_MODID[835]:IPMMUVI101*/ + [836] = {0xFEBE34ACU, 0x00000002U}, /* SEC_MODID[836]:IPMMUVI110*/ + [837] = {0xFEBE34B0U, 0x00000002U}, /* SEC_MODID[837]:IPMMUVI111*/ + [838] = {0xFEBE34B4U, 0x00000002U}, /* SEC_MODID[838]:IPMMUVI112*/ + [839] = {0xFEBE34B8U, 0x00000002U}, /* SEC_MODID[839]:IPMMUVI113*/ + [840] = {0xFEBE34BCU, 0x00000002U}, /* SEC_MODID[840]:IPMMUVI114*/ + [841] = {0xFEBE34C0U, 0x00000002U}, /* SEC_MODID[841]:IPMMUVI115*/ + [842] = {0xFEBE34C4U, 0x00000002U}, /* SEC_MODID[842]:IPMMUVI102*/ + [843] = {0xFEBE34C8U, 0x00000002U}, /* SEC_MODID[843]:IPMMUVI103*/ + [844] = {0xFEBE34CCU, 0x00000002U}, /* SEC_MODID[844]:IPMMUVI104*/ + [845] = {0xFEBE34D0U, 0x00000002U}, /* SEC_MODID[845]:IPMMUVI105*/ + [846] = {0xFEBE34D4U, 0x00000002U}, /* SEC_MODID[846]:IPMMUVI106*/ + [847] = {0xFEBE34D8U, 0x00000002U}, /* SEC_MODID[847]:IPMMUVI107*/ + [848] = {0xFEBE34DCU, 0x00000002U}, /* SEC_MODID[848]:IPMMUVI108*/ + [849] = {0xFEBE34E0U, 0x00000002U}, /* SEC_MODID[849]:IPMMUVI109*/ + [850] = {0xFEBE3504U, 0x00000002U}, /* SEC_MODID[850]:AXIFBABUSVIO*/ + [851] = {0xFEBF3400U, 0x00000002U}, /* SEC_MODID[851]:ARVI0*/ + [852] = {0xFEBF3404U, 0x00000002U}, /* SEC_MODID[852]:ARVI1*/ + [853] = {0xFEBF3408U, 0x00000002U}, /* SEC_MODID[853]:ARVI2*/ + [854] = {0xFEBF340CU, 0x00000002U}, /* SEC_MODID[854]:ARVI3*/ + [855] = {0xFEBF3410U, 0x00000002U}, /* SEC_MODID[855]:ARVI4*/ + [856] = {0xFEBF3414U, 0x00000002U}, /* SEC_MODID[856]:ARVI5*/ + [857] = {0xFEBF3418U, 0x00000002U}, /* SEC_MODID[857]:ARVI6*/ + [858] = {0xFEBF341CU, 0x00000002U}, /* SEC_MODID[858]:ARVI7*/ + [859] = {0xFEBF3420U, 0x00000002U}, /* SEC_MODID[859]:ARVI8*/ + [860] = {0xFEBF3424U, 0x00000002U}, /* SEC_MODID[860]:ECMVIO0*/ + [861] = {0xFEBF3428U, 0x00000002U}, /* SEC_MODID[861]:ISP0*/ + [862] = {0xFEBF342CU, 0x00000002U}, /* SEC_MODID[862]:ISP0CORE*/ + [863] = {0xFEBF3430U, 0x00000002U}, /* SEC_MODID[863]:ISP1*/ + [864] = {0xFEBF3434U, 0x00000002U}, /* SEC_MODID[864]:ISP1CORE*/ + [865] = {0xFEBF3454U, 0x00000002U}, /* SEC_MODID[865]:VIN00*/ + [866] = {0xFEBF3458U, 0x00000002U}, /* SEC_MODID[866]:VIN01*/ + [867] = {0xFEBF345CU, 0x00000002U}, /* SEC_MODID[867]:VIN02*/ + [868] = {0xFEBF3460U, 0x00000002U}, /* SEC_MODID[868]:VIN03*/ + [869] = {0xFEBF3464U, 0x00000002U}, /* SEC_MODID[869]:VIN04*/ + [870] = {0xFEBF3468U, 0x00000002U}, /* SEC_MODID[870]:VIN05*/ + [871] = {0xFEBF346CU, 0x00000002U}, /* SEC_MODID[871]:VIN06*/ + [872] = {0xFEBF3470U, 0x00000002U}, /* SEC_MODID[872]:VIN07*/ + [873] = {0xFEBF3474U, 0x00000002U}, /* SEC_MODID[873]:VIN10*/ + [874] = {0xFEBF3478U, 0x00000002U}, /* SEC_MODID[874]:VIN11*/ + [875] = {0xFEBF347CU, 0x00000002U}, /* SEC_MODID[875]:VIN12*/ + [876] = {0xFEBF3480U, 0x00000002U}, /* SEC_MODID[876]:VIN13*/ + [877] = {0xFEBF3484U, 0x00000002U}, /* SEC_MODID[877]:VIN14*/ + [878] = {0xFEBF3488U, 0x00000002U}, /* SEC_MODID[878]:VIN15*/ + [879] = {0xFEBF348CU, 0x00000002U}, /* SEC_MODID[879]:VIN16*/ + [880] = {0xFEBF3490U, 0x00000002U}, /* SEC_MODID[880]:VIN17*/ + [881] = {0xE7B13400U, 0x00000002U}, /* SEC_MODID[881]:ARVIP00*/ + [882] = {0xE7B13404U, 0x00000002U}, /* SEC_MODID[882]:ARVIP01*/ + [883] = {0xE7B13408U, 0x00000002U}, /* SEC_MODID[883]:ARVIP02*/ + [884] = {0xE7B1340CU, 0x00000002U}, /* SEC_MODID[884]:ARVIP03*/ + [885] = {0xE7B13410U, 0x00000002U}, /* SEC_MODID[885]:AXIFBABUSVIP0*/ + [886] = {0xE7B13414U, 0x00000002U}, /* SEC_MODID[886]:ARVIP04*/ + [887] = {0xE7B13418U, 0x00000002U}, /* SEC_MODID[887]:ARVIP05*/ + [888] = {0xE7B1341CU, 0x00000002U}, /* SEC_MODID[888]:ARVIP06*/ + [889] = {0xE7B13420U, 0x00000002U}, /* SEC_MODID[889]:ARVIP07*/ + [890] = {0xE7B13424U, 0x00000002U}, /* SEC_MODID[890]:ARVIP08*/ + [891] = {0xE7B13428U, 0x00000002U}, /* SEC_MODID[891]:CKMVIP*/ + [892] = {0xE7B1342CU, 0x00000002U}, /* SEC_MODID[892]:ECMVIP0*/ + [893] = {0xE7B13430U, 0x00000002U}, /* SEC_MODID[893]:IPMMUVIP000*/ + [894] = {0xE7B13438U, 0x00000002U}, /* SEC_MODID[894]:SMPO0*/ + [895] = {0xE7B1343CU, 0x00000002U}, /* SEC_MODID[895]:SMPS0*/ + [896] = {0xE7B13440U, 0x00000002U}, /* SEC_MODID[896]:UMFL0*/ + [897] = {0xE7B13444U, 0x00000002U}, /* SEC_MODID[897]:IPMMUVIP001*/ + [898] = {0xE7B13448U, 0x00000002U}, /* SEC_MODID[898]:IPMMUVIP010*/ + [899] = {0xE7B1344CU, 0x00000002U}, /* SEC_MODID[899]:IPMMUVIP011*/ + [900] = {0xE7B13450U, 0x00000002U}, /* SEC_MODID[900]:UMFL0M_W*/ + [901] = {0xE7B13454U, 0x00000002U}, /* SEC_MODID[901]:IPMMUVIP012*/ + [902] = {0xE7B13458U, 0x00000002U}, /* SEC_MODID[902]:IPMMUVIP013*/ + [903] = {0xE7B1345CU, 0x00000002U}, /* SEC_MODID[903]:IPMMUVIP014*/ + [904] = {0xE7B13460U, 0x00000002U}, /* SEC_MODID[904]:IPMMUVIP015*/ + [905] = {0xE7B13464U, 0x00000002U}, /* SEC_MODID[905]:IPMMUVIP002*/ + [906] = {0xE7B13468U, 0x00000002U}, /* SEC_MODID[906]:IPMMUVIP003*/ + [907] = {0xE7B1346CU, 0x00000002U}, /* SEC_MODID[907]:IPMMUVIP004*/ + [908] = {0xE7B13470U, 0x00000002U}, /* SEC_MODID[908]:IPMMUVIP005*/ + [909] = {0xE7B13474U, 0x00000002U}, /* SEC_MODID[909]:IPMMUVIP006*/ + [910] = {0xE7B13478U, 0x00000002U}, /* SEC_MODID[910]:IPMMUVIP007*/ + [911] = {0xE7B1347CU, 0x00000002U}, /* SEC_MODID[911]:IPMMUVIP008*/ + [912] = {0xE7B13480U, 0x00000002U}, /* SEC_MODID[912]:IPMMUVIP009*/ + [913] = {0xE7B43400U, 0x00000002U}, /* SEC_MODID[913]:ARVIP10*/ + [914] = {0xE7B43404U, 0x00000002U}, /* SEC_MODID[914]:ARVIP11*/ + [915] = {0xE7B43408U, 0x00000002U}, /* SEC_MODID[915]:ARVIP12*/ + [916] = {0xE7B4340CU, 0x00000002U}, /* SEC_MODID[916]:ARVIP13*/ + [917] = {0xE7B43410U, 0x00000002U}, /* SEC_MODID[917]:AXIFBABUSVIP1*/ + [918] = {0xE7B43414U, 0x00000002U}, /* SEC_MODID[918]:ARVIIP14*/ + [919] = {0xE7B43418U, 0x00000002U}, /* SEC_MODID[919]:ARVIIP15*/ + [920] = {0xE7B4341CU, 0x00000002U}, /* SEC_MODID[920]:ARVIIP16*/ + [921] = {0xE7B43420U, 0x00000002U}, /* SEC_MODID[921]:ARVIIP17*/ + [922] = {0xE7B43424U, 0x00000002U}, /* SEC_MODID[922]:ARVIIP18*/ + [923] = {0xE7B43438U, 0x00000002U}, /* SEC_MODID[923]:ECMVIP1*/ + [924] = {0xE7B4343CU, 0x00000002U}, /* SEC_MODID[924]:IPMMUVIP101*/ + [925] = {0xE7B43440U, 0x00000002U}, /* SEC_MODID[925]:IPMMUVIP100*/ + [926] = {0xE7B43444U, 0x00000002U}, /* SEC_MODID[926]:IPMMUVIP110*/ + [927] = {0xE7B43448U, 0x00000002U}, /* SEC_MODID[927]:IPMMUVIP111*/ + [928] = {0xE7B4344CU, 0x00000002U}, /* SEC_MODID[928]:IPMMUVIP112*/ + [929] = {0xE7B43450U, 0x00000002U}, /* SEC_MODID[929]:IPMMUVIP113*/ + [930] = {0xE7B43454U, 0x00000002U}, /* SEC_MODID[930]:IPMMUVIP114*/ + [931] = {0xE7B43458U, 0x00000002U}, /* SEC_MODID[931]:IPMMUVIP115*/ + [932] = {0xE7B4345CU, 0x00000002U}, /* SEC_MODID[932]:IPMMUVIP102*/ + [933] = {0xE7B43460U, 0x00000002U}, /* SEC_MODID[933]:IPMMUVIP103*/ + [934] = {0xE7B43464U, 0x00000002U}, /* SEC_MODID[934]:IPMMUVIP104*/ + [935] = {0xE7B43468U, 0x00000002U}, /* SEC_MODID[935]:IPMMUVIP105*/ + [936] = {0xE7B4346CU, 0x00000002U}, /* SEC_MODID[936]:IPMMUVIP106*/ + [937] = {0xE7B43470U, 0x00000002U}, /* SEC_MODID[937]:IPMMUVIP107*/ + [938] = {0xE7B43474U, 0x00000002U}, /* SEC_MODID[938]:IPMMUVIP108*/ + [939] = {0xE7B43478U, 0x00000002U}, /* SEC_MODID[939]:IPMMUVIP109*/ + [940] = {0xE7B43518U, 0x00000002U}, /* SEC_MODID[940]:PAP*/ + [941] = {0xEB803400U, 0x00000002U}, /* SEC_MODID[941]:ARDSP0*/ + [942] = {0xEB803404U, 0x00000002U}, /* SEC_MODID[942]:ARDSP1*/ + [943] = {0xEB803408U, 0x00000002U}, /* SEC_MODID[943]:ARDSP2*/ + [944] = {0xEB80340CU, 0x00000002U}, /* SEC_MODID[944]:ARDSP3*/ + [945] = {0xEB803410U, 0x00000002U}, /* SEC_MODID[945]:ARDSP4*/ + [946] = {0xEB803414U, 0x00000002U}, /* SEC_MODID[946]:ARDSP5*/ + [947] = {0xEB803418U, 0x00000002U}, /* SEC_MODID[947]:ARDSP6*/ + [948] = {0xEB80341CU, 0x00000002U}, /* SEC_MODID[948]:ARDSP7*/ + [949] = {0xEB803420U, 0x00000002U}, /* SEC_MODID[949]:ECMDSP*/ + [950] = {0xEB803424U, 0x00000002U}, /* SEC_MODID[950]:AXIDSP0*/ + [951] = {0xEB803428U, 0x00000002U}, /* SEC_MODID[951]:AXIDSP1*/ + [952] = {0xEB80342CU, 0x00000002U}, /* SEC_MODID[952]:AXIDSP2*/ + [953] = {0xEB803430U, 0x00000002U}, /* SEC_MODID[953]:AXIDSP3*/ + [955] = {0xE67B9624U, 0x00000001U}, /* SEC_MODID[954]:ARCC*/ + [954] = {0xE67B9638U, 0x00000001U}, /* SEC_MODID[955]:ARRTRAM*/ + [956] = {0xE7753424U, 0x00000002U}, /* SEC_MODID[956]:RSV0*/ + [957] = {0xFEBD3428U, 0x00000002U}, /* SEC_MODID[957]:DOC*/ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_axi_tbl" +const REGION_ID_SETTING_TABLE g_rgid_axi_tbl[] = { + [0] = {0xFFC82010U, 0x0000000FU}, /* RGIDR_MODID[4]:ARRT01*/ + [1] = {0xFFC82014U, 0x0000000FU}, /* RGIDR_MODID[5]:ARRT02*/ + [2] = {0xE6002048U, 0x0000000FU}, /* RGIDR_MODID[42]:ARS01*/ + [3] = {0xE600204CU, 0x0000000FU}, /* RGIDR_MODID[43]:ARS02*/ + [4] = {0xE7762028U, 0x0000000FU}, /* RGIDR_MODID[106]:ARSP31*/ + [5] = {0xE776202CU, 0x0000000FU}, /* RGIDR_MODID[107]:ARSP32*/ + [6] = {0xE7792004U, 0x0000000FU}, /* RGIDR_MODID[121]:ARSP41*/ + [7] = {0xE7792008U, 0x0000000FU}, /* RGIDR_MODID[122]:ARSP42*/ + [8] = {0xFE672004U, 0x0000002FU}, /* RGIDR_MODID[165]:ARVC11*/ + [9] = {0xFE672008U, 0x0000002FU}, /* RGIDR_MODID[166]:ARVC12*/ + [10] = {0xFEBD2004U, 0x0000000FU}, /* RGIDR_MODID[178]:ARVI41*/ + [11] = {0xFEBD2008U, 0x0000000FU}, /* RGIDR_MODID[179]:ARVI42*/ + [12] = {0xE6582140U, 0x0000000FU}, /* RGIDR_MODID[245]:ARHC1*/ + [13] = {0xE6582144U, 0x0000000FU}, /* RGIDR_MODID[246]:ARHC2*/ + [14] = {0xFF882004U, 0x0000000FU}, /* RGIDR_MODID[261]:ARIMP01*/ + [15] = {0xFF882008U, 0x0000000FU}, /* RGIDR_MODID[262]:ARIMP02*/ + [16] = {0xFD812004U, 0x0000000FU}, /* RGIDR_MODID[297]:ARPV1*/ + [17] = {0xFD81200CU, 0x0000000FU}, /* RGIDR_MODID[299]:ARPV2*/ + [18] = {0xE6622004U, 0x0000000FU}, /* RGIDR_MODID[330]:ARRC1*/ + [19] = {0xE6622008U, 0x0000000FU}, /* RGIDR_MODID[331]:ARRC2*/ + [20] = {0xFFC42060U, 0x0000000FU}, /* RGIDR_MODID[369]:ARRD1*/ + [21] = {0xFFC42064U, 0x0000000FU}, /* RGIDR_MODID[370]:ARRD2*/ + [22] = {0xFFC42084U, 0x0000000FU}, /* RGIDR_MODID[378]:ARRT1*/ + [23] = {0xFFC42088U, 0x0000000FU}, /* RGIDR_MODID[379]:ARRT2*/ + [26] = {0xFF862004U, 0x0000000FU}, /* RGIDR_MODID[551]:ARSC1*/ + [27] = {0xFF862008U, 0x0000000FU}, /* RGIDR_MODID[552]:ARSC2*/ + [24] = {0xFF862028U, 0x0000000FU}, /* RGIDR_MODID[560]:ARSTM1*/ + [25] = {0xFF862038U, 0x0000000FU}, /* RGIDR_MODID[564]:ARSTM2*/ + [28] = {0xE67C2004U, 0x0000000FU}, /* RGIDR_MODID[606]:AXIARNMM*/ + [29] = {0xE67C200CU, 0x0000000FU}, /* RGIDR_MODID[608]:ARSM1*/ + [30] = {0xE67C2010U, 0x0000000FU}, /* RGIDR_MODID[609]:ARSM2*/ + [31] = {0xFF802004U, 0x0000000FU}, /* RGIDR_MODID[660]:ARSN1*/ + [32] = {0xFF802008U, 0x0000000FU}, /* RGIDR_MODID[661]:ARSN2*/ + [33] = {0xE7752004U, 0x0000000FU}, /* RGIDR_MODID[670]:ARSD01*/ + [34] = {0xE7752008U, 0x0000000FU}, /* RGIDR_MODID[671]:ARSD02*/ + [35] = {0xE775203CU, 0x0000000FU}, /* RGIDR_MODID[683]:ARSP01*/ + [36] = {0xE7752040U, 0x0000000FU}, /* RGIDR_MODID[684]:ARSP02*/ + [37] = {0xFE682004U, 0x0000000FU}, /* RGIDR_MODID[766]:ARVC1*/ + [38] = {0xFE682008U, 0x0000000FU}, /* RGIDR_MODID[767]:ARVC2*/ + [39] = {0xFEBE2008U, 0x0000000FU}, /* RGIDR_MODID[801]:ARVI11*/ + [40] = {0xFEBE200CU, 0x0000000FU}, /* RGIDR_MODID[802]:ARVI12*/ + [41] = {0xFEBF2004U, 0x0000000FU}, /* RGIDR_MODID[852]:ARVI1*/ + [42] = {0xFEBF2008U, 0x0000000FU}, /* RGIDR_MODID[853]:ARVI2*/ + [43] = {0xE7B12004U, 0x0000000FU}, /* RGIDR_MODID[882]:ARVIP01*/ + [44] = {0xE7B12008U, 0x0000000FU}, /* RGIDR_MODID[883]:ARVIP02*/ + [45] = {0xE7B42004U, 0x0000000FU}, /* RGIDR_MODID[914]:ARVIP11*/ + [46] = {0xE7B42008U, 0x0000000FU}, /* RGIDR_MODID[915]:ARVIP12*/ + [47] = {0xEB802004U, 0x0000000FU}, /* RGIDR_MODID[942]:ARDSP1*/ + [48] = {0xEB802008U, 0x0000000FU}, /* RGIDR_MODID[943]:ARDSP2*/ + [49] = {0xFFC82410U, 0x00000000U}, /* RGIDW_MODID[4]:ARRT01*/ + [50] = {0xFFC82414U, 0x00000000U}, /* RGIDW_MODID[5]:ARRT02*/ + [51] = {0xE6002448U, 0x00000000U}, /* RGIDW_MODID[42]:ARS01*/ + [52] = {0xE600244CU, 0x00000000U}, /* RGIDW_MODID[43]:ARS02*/ + [53] = {0xE7762428U, 0x00000000U}, /* RGIDW_MODID[106]:ARSP31*/ + [54] = {0xE776242CU, 0x00000000U}, /* RGIDW_MODID[107]:ARSP32*/ + [55] = {0xE7792404U, 0x00000000U}, /* RGIDW_MODID[121]:ARSP41*/ + [56] = {0xE7792408U, 0x00000000U}, /* RGIDW_MODID[122]:ARSP42*/ + [57] = {0xFE672404U, 0x00000000U}, /* RGIDW_MODID[165]:ARVC11*/ + [58] = {0xFE672408U, 0x00000000U}, /* RGIDW_MODID[166]:ARVC12*/ + [59] = {0xFEBD2404U, 0x00000000U}, /* RGIDW_MODID[178]:ARVI41*/ + [60] = {0xFEBD2408U, 0x00000000U}, /* RGIDW_MODID[179]:ARVI42*/ + [61] = {0xE6582540U, 0x00000000U}, /* RGIDW_MODID[245]:ARHC1*/ + [62] = {0xE6582544U, 0x00000000U}, /* RGIDW_MODID[246]:ARHC2*/ + [63] = {0xFF882404U, 0x00000000U}, /* RGIDW_MODID[261]:ARIMP01*/ + [64] = {0xFF882408U, 0x00000000U}, /* RGIDW_MODID[262]:ARIMP02*/ + [65] = {0xFD812404U, 0x00000000U}, /* RGIDW_MODID[297]:ARPV1*/ + [66] = {0xFD81240CU, 0x00000000U}, /* RGIDW_MODID[299]:ARPV2*/ + [67] = {0xE6622404U, 0x00000000U}, /* RGIDW_MODID[330]:ARRC1*/ + [68] = {0xE6622408U, 0x00000000U}, /* RGIDW_MODID[331]:ARRC2*/ + [69] = {0xFFC42460U, 0x00000000U}, /* RGIDW_MODID[368]:ARRD1*/ + [70] = {0xFFC42464U, 0x00000000U}, /* RGIDW_MODID[369]:ARRD2*/ + [71] = {0xFFC42484U, 0x00000000U}, /* RGIDW_MODID[377]:ARRT1*/ + [72] = {0xFFC42488U, 0x00000000U}, /* RGIDW_MODID[378]:ARRT2*/ + [75] = {0xFF862404U, 0x00000000U}, /* RGIDW_MODID[550]:ARSC1*/ + [76] = {0xFF862408U, 0x00000000U}, /* RGIDW_MODID[551]:ARSC2*/ + [73] = {0xFF862428U, 0x00000000U}, /* RGIDW_MODID[559]:ARSTM1*/ + [74] = {0xFF862438U, 0x00000000U}, /* RGIDW_MODID[563]:ARSTM2*/ + [77] = {0xE67C2404U, 0x00000000U}, /* RGIDW_MODID[605]:AXIARNMM*/ + [78] = {0xE67C240CU, 0x00000000U}, /* RGIDW_MODID[607]:ARSM1*/ + [79] = {0xE67C2410U, 0x00000000U}, /* RGIDW_MODID[608]:ARSM2*/ + [80] = {0xFF802404U, 0x00000000U}, /* RGIDW_MODID[659]:ARSN1*/ + [81] = {0xFF802408U, 0x00000000U}, /* RGIDW_MODID[660]:ARSN2*/ + [82] = {0xE7752404U, 0x00000000U}, /* RGIDW_MODID[669]:ARSD01*/ + [83] = {0xE7752408U, 0x00000000U}, /* RGIDW_MODID[670]:ARSD02*/ + [84] = {0xE775243CU, 0x00000000U}, /* RGIDW_MODID[682]:ARSP01*/ + [85] = {0xE7752440U, 0x00000000U}, /* RGIDW_MODID[683]:ARSP02*/ + [86] = {0xFE682404U, 0x00000000U}, /* RGIDW_MODID[765]:ARVC1*/ + [87] = {0xFE682408U, 0x00000000U}, /* RGIDW_MODID[766]:ARVC2*/ + [88] = {0xFEBE2408U, 0x00000000U}, /* RGIDW_MODID[800]:ARVI11*/ + [89] = {0xFEBE240CU, 0x00000000U}, /* RGIDW_MODID[801]:ARVI12*/ + [90] = {0xFEBF2404U, 0x00000000U}, /* RGIDW_MODID[851]:ARVI1*/ + [91] = {0xFEBF2408U, 0x00000000U}, /* RGIDW_MODID[852]:ARVI2*/ + [92] = {0xE7B12404U, 0x00000000U}, /* RGIDW_MODID[881]:ARVIP01*/ + [93] = {0xE7B12408U, 0x00000000U}, /* RGIDW_MODID[882]:ARVIP02*/ + [94] = {0xE7B42404U, 0x00000000U}, /* RGIDW_MODID[913]:ARVIP11*/ + [95] = {0xE7B42408U, 0x00000000U}, /* RGIDW_MODID[914]:ARVIP12*/ + [96] = {0xEB802404U, 0x00000000U}, /* RGIDW_MODID[941]:ARDSP1*/ + [97] = {0xEB802408U, 0x00000000U}, /* RGIDW_MODID[942]:ARDSP2*/ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_gid_tbl" +const REGION_ID_SETTING_TABLE g_rgid_gid_tbl[] = { + [0] = {0xF12F0000U, 0x000F0024U}, /* CCI MPU GID register 0 */ + /* Physical address:0xF12F0000, Logical address 0x0xFC0F0000 */ + [1] = {0xF12F0004U, 0x000F0024U}, /* CCI MPU GID register 1 */ + /* Physical address:0xF12F0004, Logical address 0x0xFC0F0004 */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +const uint32_t g_rgid_rtdma_setting_value[RTDMA_MODULE_MAX][RTDMA_CH_MAX][2U] = { + {/* Module0 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + }, + {/* Module1 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + }, + {/* Module2 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + }, + {/* Module3 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + } +}; + +const uint32_t g_rgid_sysdma_setting_value[SYSDMA_MODULE_MAX][SYSDMA_CH_MAX][2U] = { + {/* Module0 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {SYSDMA_EN, RGID_2}, /* CH0 */ + [1] = {SYSDMA_EN, RGID_2}, /* CH1 */ + [2] = {SYSDMA_EN, RGID_2}, /* CH2 */ + [3] = {SYSDMA_EN, RGID_2}, /* CH3 */ + [4] = {SYSDMA_EN, RGID_2}, /* CH4 */ + [5] = {SYSDMA_EN, RGID_2}, /* CH5 */ + [6] = {SYSDMA_EN, RGID_2}, /* CH6 */ + [7] = {SYSDMA_EN, RGID_2}, /* CH7 */ + [8] = {SYSDMA_EN, RGID_2}, /* CH8 */ + [9] = {SYSDMA_EN, RGID_2}, /* CH9 */ + [10] = {SYSDMA_EN, RGID_2}, /* CH10 */ + [11] = {SYSDMA_EN, RGID_2}, /* CH11 */ + [12] = {SYSDMA_EN, RGID_2}, /* CH12 */ + [13] = {SYSDMA_EN, RGID_2}, /* CH13 */ + [14] = {SYSDMA_EN, RGID_2}, /* CH14 */ + [15] = {SYSDMA_EN, RGID_2} /* CH15 */ + }, + {/* Module1 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {SYSDMA_EN, RGID_2}, /* CH0 */ + [1] = {SYSDMA_EN, RGID_2}, /* CH1 */ + [2] = {SYSDMA_EN, RGID_2}, /* CH2 */ + [3] = {SYSDMA_EN, RGID_2}, /* CH3 */ + [4] = {SYSDMA_EN, RGID_2}, /* CH4 */ + [5] = {SYSDMA_EN, RGID_2}, /* CH5 */ + [6] = {SYSDMA_EN, RGID_2}, /* CH6 */ + [7] = {SYSDMA_EN, RGID_2}, /* CH7 */ + [8] = {SYSDMA_EN, RGID_2}, /* CH8 */ + [9] = {SYSDMA_EN, RGID_2}, /* CH9 */ + [10] = {SYSDMA_EN, RGID_2}, /* CH10 */ + [11] = {SYSDMA_EN, RGID_2}, /* CH11 */ + [12] = {SYSDMA_EN, RGID_2}, /* CH12 */ + [13] = {SYSDMA_EN, RGID_2}, /* CH13 */ + [14] = {SYSDMA_EN, RGID_2}, /* CH14 */ + [15] = {SYSDMA_EN, RGID_2} /* CH15 */ + }, +}; + +/* When V4H, this table is used as RT-VRAM0. */ +/* RAM protection setting for SECDIV[n]D_0 / SECCTRR[m]D_0 / SECCTRW[m]D_0 */ +const RTRAM_PROTECTION_STRUCTUR g_rtsram_protection_table[RAM_PROTECTION_MAX] = { + /* address READ Write */ + [RTSRAM_ICUMX_IPL_AREA] = {NOT_USED_VALUE, {0x0000FFFCU, 0x0000FFFEU}}, /* not used for address value */ + /* Area0 phys:0xE0000000-0xE003FFFF R:RGID0/1 W:RGID0 */ + [RTSRAM_ICUMX_FW_AREA] = {RTSRAM_AREA1_TOP, {0x0004FFFEU, 0x0004FFFEU}}, /* Area1 phys:0xE0040000-0xE00FFFFF R:RGID0 W:RGID0 */ + [2] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [3] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +/* this table is finaly setting for RT-VRAM protection */ +/* RAM protection setting for SECDIV[n]D_1 / SECCTRR[m]D_1 / SECCTRW[m]D_1 */ +const RTRAM_PROTECTION_STRUCTUR g_rtvram1_protection_table_1[RAM_PROTECTION_MAX] = { + /* address READ Write */ + [RTVRAM_BLANK_AREA] = {NOT_USED_VALUE, {0x0000FFB6U, 0x0000FFB2U}}, /* not used for address value */ + /* Area0 phys:0xE2000000-0xE200FFFF R:RGID0/3/6 W:RGID0/2/3/6 */ + [RTVRAM_EXTEND_CACHE_AREA] = {RTVRAM_AREA1_TOP, {0x0000BFFFU, 0x0000BFFFU}}, /* Area1 phys:0xE2010000-0xE20FFFFF R:RGID14 W:RGID14 */ + [RTVRAM_RTOS_AREA] = {RTVRAM_AREA2_TOP, {0x0000FFF4U, 0x0000FFF0U}}, /* Area2 phys:0xE2100000-0xE3BFFFFF R:RGID0/1/3 W:RGID0/1/2/3 */ + [3] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +/* RAM protection setting for SPTDIVCR[n] / SPTRGNCR[n] / SPTSECCR[n] */ +const SYSTEM_RAM_PROTECTION_STRUCTUR g_system_ram_protection_table[RAM_PROTECTION_MAX] = { + /* access Secure */ + /* address R | W R|W */ + [SYSTEM_RAM_CX_2ND_IPL] = {NOT_USED_VALUE, {0xFFD8FFD8U, 0x00000000U}}, /* not used for address value */ + /* Area0 phys:0xE6300000-0xE635DFFF R:RGID0/1/2/5 W:RGID0/1/2/5 */ + [SYSTEM_RAM_SHARED_MEM] = {SYSTEM_RAM_AREA1_TOP, {0xFFD8FFD8U, 0x00000000U}}, /* Area1 phys:0xE635E000-0xE635FFFF R:RGID0/1/2/5 W:RGID0/1/2/5 */ + [2] = {SYSTEM_RAM_AREA2_TOP, {0xFFDAFFDAU, 0x00000000U}}, /* Area2 phys:0xE6360000-0xE63FFFFF R:RGID0/2/5 W:RGID0/2/5 */ + [3] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +/* RAM protection setting for DPTDIVCR[n] / DPTRGNCR[n] / DPTSECCR[n] */ +const DRAM_PROTECTION_STRUCTUR g_dram_protection_table[DRAM_PROTECTION_MAX] = { + /* access secure */ + /* address R | W R|W */ + [RTVRAM_EXTEND_AREA] = {NOT_USED_VALUE, {0xBFFFBFFFU, 0x00000000U}}, /* not used for address value */ + /* Area0 phys:0x04_00000000-0x04_01BFFFFF R:RGID14 W:RGID14 */ + [CR_FW_SHARED_AREA] = {DRAM_ADDR_AREA1, {0xFFBCFFBCU, 0x00000000U}}, /* Area1 phys:0x04_01C00000-0x04_01CFFFFF R:RGID0/1/6 W:RGID0/1/6 */ + [SDRAM_BLANK_AREA] = {DRAM_ADDR_AREA2, {0xFF90FF90U, 0x00000000U}}, /* Area2:OPTEE_DISABLE phys:0x04_01D00000-0x04_063FFFFF + * Area2:OPTEE_ENABLE phys:0x04_01D00000-0x04_040FFFFF + * R:RGID0/1/2/3/5/6 W:RGID0/1/2/3/5/6 */ +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) + [SDRAM_PROTECT_AREA] = {DRAM_ADDR_AREA3, {0xFFFAFFF8U, 0x00000000U}}, /* Area3 phys:0x04_06400000-0x04_0643FFFF R:RGID0/2 W:RGID0/1/2 */ + [SDRAM_PUBLIC_AREA] = {DRAM_ADDR_AREA4, {0xFF90FF90U, 0x00000000U}}, /* Area4 phys:0x04_06440000-0x04_07FBFFFF R:RGID0/1/2/3/5/6 W:RGID0/1/2/3/5/6 */ + [ICCOM_USED_AREA] = {DRAM_ADDR_AREA5, {0xFFB9FFB9U, 0x00000000U}}, /* Area5 phys:0x04_07FC0000-0x04_07FFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [LINUX_USED_AREA] = {DRAM_ADDR_AREA6, {0xFFB0FFB0U, 0x00000000U}}, /* Area6 phys:0x04_08000000-0x04_1DBFFFFF R:RGID0/1/2/3/6 W:RGID0/1/2/3/6 */ + [CAAREA2_USED_AREA] = {DRAM_ADDR_AREA7, {0xFFB9FFB9U, 0x00000000U}}, /* Area7 phys:0x04_1DC00000-0x04_1FFFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [CR52_USED_AREA] = {DRAM_ADDR_AREA8, {0xFFBDFFBDU, 0x00000000U}}, /* Area8 phys:0x04_20000000-0x04_3FFFFFFF R:RGID1/6 W:RGID1/6 */ + [CAAREA3_USED_AREA] = {DRAM_ADDR_AREA9, {0xFFDDFFDDU, 0x00000000U}}, /* Area9 phys:0x04_40000000-0x04_5FFFFFFF R:RGID1/5 W:RGID1/5 */ + [CAAREA2_USED_AREA2] = {DRAM_ADDR_AREA10,{0xFFB9FFB9U, 0x00000000U}}, /* Area10 phys:0x04_60000000-0x04_7FFFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [CAAREA1_USED_AREA] = {DRAM_ADDR_AREA11,{0xBF90BF90U, 0x00000000U}}, /* Area11 phys:0x04_80000000-0x04_FFFFFFFF R:RGID0/1/2/3/5/6/14 W:RGID0/1/2/3/5/6/14 */ + [RESERVERD_AREA] = {DRAM_ADDR_AREA12,{0xFFFFFFFFU, 0x00000000U}}, /* Area12 phys:0x05_00000000-0x05_FFFFFFFF */ + [CAAREA1_USED_AREA2] = {DRAM_ADDR_AREA13,{0xFFF9FFF9U, 0x00000000U}}, /* Area13 phys:0x06_00000000-0x06_FFFFFFFF R:RGID1/2 W:RGID1/2 */ + [14] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [16] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +#else + [SDRAM_PROTECT_AREA] = {DRAM_ADDR_AREA3, {0xFFFAFFFAU, 0x00000000U}}, /* Area3 phys:0x04_04100000-0x04_063FFFFF R:RGID0/2 W:RGID0/2 */ + [SDRAM_PROTECT_AREA2]= {DRAM_ADDR_AREA4, {0xFFFAFFF8U, 0x00000000U}}, /* Area4 phys:0x04_06400000-0x04_0643FFFF R:RGID0/2 W:RGID0/1/2 */ + [SDRAM_BLANK_AREA2] = {DRAM_ADDR_AREA5, {0xFF90FF90U, 0x00000000U}}, /* Area5 phys:0x04_06440000-0x04_07DFFFFF R:RGID0/1/2/3/5/6 W:RGID0/1/2/3/5/6 */ + [OPTEE_SHARED_AREA] = {DRAM_ADDR_AREA6, {0xFFFBFFFBU, 0x00000000U}}, /* Area6 phys:0x04_07E00000-0x04_07EFFFFF R:RGID2 W:RGID2 */ + [SDRAM_BLANK_AREA3] = {DRAM_ADDR_AREA7, {0xFF90FF90U, 0x00000000U}}, /* Area7 phys:0x04_07F00000-0x04_07FBFFFF R:RGID0/1/2/3/5/6 W:RGID0/1/2/3/5/6 */ + [ICCOM_USED_AREA] = {DRAM_ADDR_AREA8, {0xFFB9FFB9U, 0x00000000U}}, /* Area8 phys:0x04_07FC0000-0x04_07FFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [LINUX_USED_AREA] = {DRAM_ADDR_AREA9, {0xFFB0FFB0U, 0x00000000U}}, /* Area9 phys:0x04_08000000-0x04_1DBFFFFF R:RGID0/1/2/3/6 W:RGID0/1/2/3/6 */ + [CAAREA2_USED_AREA] = {DRAM_ADDR_AREA10,{0xFFB9FFB9U, 0x00000000U}}, /* Area10 phys:0x04_1DC00000-0x04_1FFFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [CR52_USED_AREA] = {DRAM_ADDR_AREA11,{0xFFBDFFBDU, 0x00000000U}}, /* Area11 phys:0x04_20000000-0x04_3FFFFFFF R:RGID1/6 W:RGID1/6 */ + [CAAREA3_USED_AREA] = {DRAM_ADDR_AREA12,{0xFFDDFFDDU, 0x00000000U}}, /* Area12 phys:0x04_40000000-0x04_5FFFFFFF R:RGID1/5 W:RGID1/5 */ + [CAAREA2_USED_AREA2] = {DRAM_ADDR_AREA13,{0xFFB9FFB9U, 0x00000000U}}, /* Area13 phys:0x04_60000000-0x04_7FFFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [CAAREA1_USED_AREA] = {DRAM_ADDR_AREA14,{0xBF90BF90U, 0x00000000U}}, /* Area14 phys:0x04_80000000-0x04_FFFFFFFF R:RGID0/1/2/3/5/6/14 W:RGID0/1/2/3/5/6/14 */ + [RESERVERD_AREA] = {DRAM_ADDR_AREA15,{0xFFFFFFFFU, 0x00000000U}}, /* Area15 phys:0x05_00000000-0x05_FFFFFFFF */ + [CAAREA1_USED_AREA2] = {DRAM_ADDR_AREA16,{0xFFF9FFF9U, 0x00000000U}}, /* Area16 phys:0x06_00000000-0x06_FFFFFFFF R:RGID1/2 W:RGID1/2 */ +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ + [17] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [18] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [19] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [20] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [21] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [22] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [23] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [24] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [25] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [26] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [27] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [28] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [29] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [30] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [31] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [32] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [33] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [34] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [35] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [36] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [37] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [38] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [39] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [40] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [41] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [42] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [43] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [44] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [45] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [46] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [47] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [48] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [49] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [50] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [51] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [52] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [53] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [54] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [55] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [56] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [57] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [58] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [59] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [60] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [61] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [62] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [63] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +const CONFIGURATION_SETTING_TABLE g_fdt_tbl[FDT_REG_MAX] = { + [0] = {0xFD480700U, 0x00000002U}, /*FDT_AXRT2APRT0*/ + [1] = {0xFDA00700U, 0x00000002U}, /*FDT_AXSC2APS0*/ + [2] = {0xFCB60700U, 0x00000004U}, /*FDT_AXSP02APSP3*/ + [3] = {0xFCB60704U, 0x00000004U}, /*FDT_AXSD02APSP3*/ + [4] = {0xFCB90700U, 0x00000004U}, /*FDT_AXSD02APSP4*/ + [5] = {0xFCB90704U, 0x00000004U}, /*FDT_AXSP02APSP4*/ + [6] = {0xFC070700U, 0x00000005U}, /*FDT_AXVC2APVC1*/ + [7] = {0xFC9D0700U, 0x00000006U}, /*FDT_AXVI12APVI4*/ + [8] = {0xFCF80700U, 0x00000008U}, /*FDT_PCI00*/ + [9] = {0xFCF80710U, 0x00000005U}, /*FDT_AVB0*/ + [10] = {0xFCF80714U, 0x00000005U}, /*FDT_AVB1*/ + [11] = {0xFCF80718U, 0x00000005U}, /*FDT_AVB2*/ + [12] = {0xFCF80720U, 0x00000008U}, /*FDT_PCI01*/ + [13] = {0xFCF80724U, 0x00000008U}, /*FDT_PCI10*/ + [14] = {0xFCF80728U, 0x00000008U}, /*FDT_AXSTM2AXHC0*/ + [15] = {0xFCF8072CU, 0x00000008U}, /*FDT_AXSTM2AXHC1*/ + [16] = {0xFCF80734U, 0x00000008U}, /*FDT_PCI11*/ + [17] = {0xFCF80740U, 0x00000005U}, /*FDT_TSN0*/ + [18] = {0xFF880704U, 0x0000000BU}, /*FDT_FBABUSIR0*/ + [19] = {0xFF880708U, 0x0000000BU}, /*FDT_FBABUSIR1*/ + [20] = {0xFF88070CU, 0x0000000BU}, /*FDT_FBABUSIR2*/ + [21] = {0xFF880710U, 0x0000000BU}, /*FDT_FBABUSIR3*/ + [22] = {0xFF880714U, 0x0000000BU}, /*FDT_FBABUSIR4*/ + [23] = {0xFF88071CU, 0x0000000BU}, /*FDT_IMP0*/ + [24] = {0xFF880720U, 0x0000000BU}, /*FDT_IMP1*/ + [25] = {0xFF880728U, 0x0000000BU}, /*FDT_DSPD*/ + [26] = {0xFF88072CU, 0x0000000BU}, /*FDT_DSPP*/ + [27] = {0xFC610714U, 0x00000008U}, /*FDT_RGX0*/ + [28] = {0xFDC20204U, 0x00000008U}, /*FDT_AXRT2AXRC*/ + [29] = {0xFDC2020CU, 0x00000008U}, /*FDT_DCLS_ICUMX*/ + [30] = {0xFDC20210U, 0x00000008U}, /*FDT_ICUMX*/ + [31] = {0xFDC20704U, 0x00000008U}, /*FDT_CR0*/ + [32] = {0xFD430700U, 0x00000008U}, /*FDT_PERI_RTDM0*/ + [33] = {0xFD430704U, 0x00000008U}, /*FDT_PERI_RTDM1*/ + [34] = {0xFD430708U, 0x00000008U}, /*FDT_PERI_RTDM2*/ + [35] = {0xFD43070CU, 0x00000008U}, /*FDT_PERI_RTDM3*/ + [36] = {0xFD440700U, 0x00000008U}, /*FDT_AXRC2AXRT*/ + [37] = {0xFD440708U, 0x00000008U}, /*FDT_BUS_RTDM0M*/ + [38] = {0xFD44070CU, 0x00000008U}, /*FDT_BUS_RTDM1M*/ + [39] = {0xFD440710U, 0x00000008U}, /*FDT_BUS_RTDM2M*/ + [40] = {0xFD440714U, 0x00000008U}, /*FDT_BUS_RTDM3M*/ + [41] = {0xFD440718U, 0x00000008U}, /*FDT_CR52SS0*/ + [42] = {0xFD44071CU, 0x00000008U}, /*FDT_CSD*/ + [43] = {0xFD440724U, 0x00000008U}, /*FDT_INTAP0*/ + [44] = {0xFD440728U, 0x00000008U}, /*FDT_MEM_RTDM0*/ + [45] = {0xFD44072CU, 0x00000008U}, /*FDT_MEM_RTDM1*/ + [46] = {0xFD440730U, 0x00000008U}, /*FDT_MEM_RTDM2*/ + [47] = {0xFD440734U, 0x00000008U}, /*FDT_MEM_RTDM3*/ + [48] = {0xFD44075CU, 0x00000008U}, /*FDT_CR52SS1*/ + [49] = {0xFD440760U, 0x00000008U}, /*FDT_CR52SS2*/ + [50] = {0xFF860704U, 0x00000008U}, /*FDT_AXRT2AXSC*/ + [51] = {0xFF860708U, 0x00000008U}, /*FDT_AXSM2AXSC*/ + [52] = {0xFF86070CU, 0x00000008U}, /*FDT_AXSN2AXSC*/ + [53] = {0xFF860714U, 0x00000008U}, /*FDT_CCI*/ + [54] = {0xFF860718U, 0x00000008U}, /*FDT_FBABUSTOP0*/ + [55] = {0xFF86071CU, 0x00000008U}, /*FDT_FBABUSTOP1*/ + [56] = {0xFCB80704U, 0x00000006U}, /*FDT_PERI_SYDM1*/ + [57] = {0xFCB80708U, 0x00000006U}, /*FDT_PERI_SYDM2*/ + [58] = {0xFDDC0700U, 0x00000008U}, /*FDT_AXMM2AXSN*/ + [59] = {0xFF800700U, 0x00000008U}, /*FDT_AXIMP02AXSN*/ + [60] = {0xFF800704U, 0x00000008U}, /*FDT_AXSC2AXSN*/ + [61] = {0xFF800708U, 0x00000008U}, /*FDT_AXSP02AXSN*/ + [62] = {0xFF80070CU, 0x00000008U}, /*FDT_AXHC2AXSN*/ + [63] = {0xFCB50708U, 0x00000006U}, /*FDT_BUS_SYDM1*/ + [64] = {0xFCB5070CU, 0x00000006U}, /*FDT_BUS_SYDM2*/ + [65] = {0xFCB50710U, 0x00000004U}, /*FDT_FRAY*/ + [66] = {0xFCB50714U, 0x00000006U}, /*FDT_IPC*/ + [67] = {0xFCB50718U, 0x00000006U}, /*FDT_MEM_SYDM1*/ + [68] = {0xFCB5071CU, 0x00000006U}, /*FDT_MEM_SYDM2*/ + [69] = {0xFCB50720U, 0x00000006U}, /*FDT_SDHI0*/ + [70] = {0xFF810700U, 0x00000008U}, /*FDT_AXMM2AXSTM*/ + [71] = {0xFF810704U, 0x00000008U}, /*FDT_CSDE0*/ + [72] = {0xFF810708U, 0x00000008U}, /*FDT_CSDE1*/ + [73] = {0xFC080704U, 0x00000006U}, /*FDT_FBABUSVC*/ + [74] = {0xFC080708U, 0x0000000AU}, /*FDT_FCPCS*/ + [75] = {0xFC08070CU, 0x0000000AU}, /*FDT_IMR20*/ + [76] = {0xFC080710U, 0x0000000AU}, /*FDT_IMR00*/ + [77] = {0xFC080714U, 0x0000000AU}, /*FDT_IMR01*/ + [78] = {0xFC080718U, 0x0000000AU}, /*FDT_IMR21*/ + [79] = {0xFC080724U, 0x0000000AU}, /*FDT_IMR10*/ + [80] = {0xFC080728U, 0x0000000AU}, /*FDT_IMR11*/ + [81] = {0xFC080740U, 0x0000000AU}, /*FDT_IMS0*/ + [82] = {0xFC080744U, 0x0000000AU}, /*FDT_IMS1*/ + [83] = {0xFC080748U, 0x0000000AU}, /*FDT_IV1ES*/ + [84] = {0xFC9E0700U, 0x00000005U}, /*FDT_DSITXLINK0*/ + [85] = {0xFC9E0704U, 0x00000005U}, /*FDT_DSITXLINK1*/ + [86] = {0xFC9E0708U, 0x00000008U}, /*FDT_FBABUSVIO*/ + [87] = {0xFC9E0714U, 0x00000008U}, /*FDT_FCPVD0*/ + [88] = {0xFC9E0718U, 0x00000008U}, /*FDT_FCPVD1*/ + [89] = {0xFC9E071CU, 0x00000008U}, /*FDT_FCPVX0*/ + [90] = {0xFC9E0720U, 0x00000008U}, /*FDT_FCPVX1*/ + [91] = {0xFC9F0210U, 0x00000008U}, /*FDT_AXVI12AXVI*/ + [92] = {0xFC9F0700U, 0x0000000EU}, /*FDT_ISP02*/ + [93] = {0xFC9F0704U, 0x0000000EU}, /*FDT_ISP03*/ + [94] = {0xFC9F0708U, 0x0000000EU}, /*FDT_ISP04*/ + [95] = {0xFC9F0710U, 0x0000000EU}, /*FDT_VIN0*/ + [96] = {0xFC9F0714U, 0x0000000EU}, /*FDT_VIN1*/ + [97] = {0xFC9F0720U, 0x0000000EU}, /*FDT_ISP00*/ + [98] = {0xFC9F0724U, 0x0000000EU}, /*FDT_ISP01*/ + [99] = {0xFC9F0728U, 0x0000000EU}, /*FDT_ISP10*/ + [100] = {0xFC9F072CU, 0x0000000EU}, /*FDT_ISP11*/ + [101] = {0xFC9F0744U, 0x0000000EU}, /*FDT_ISP12*/ + [102] = {0xFC9F074CU, 0x0000000EU}, /*FDT_ISP13*/ + [103] = {0xFC9F0750U, 0x0000000EU}, /*FDT_ISP14*/ + [104] = {0xFC310704U, 0x00000006U}, /*FDT_FBABUSVIP0*/ + [105] = {0xFC310710U, 0x0000000BU}, /*FDT_SMPO0*/ + [106] = {0xFC310718U, 0x0000000BU}, /*FDT_SMPS0*/ + [107] = {0xFC31071CU, 0x0000000BU}, /*FDT_UMFL0*/ + [108] = {0xFC340700U, 0x0000000BU}, /*FDT_AXVIP02AXVIP1*/ + [109] = {0xFC340718U, 0x0000000BU}, /*FDT_PAP*/ + [110] = {0xFC340728U, 0x00000006U}, /*FDT_FBABUSVIP1*/ + [111] = {0xFC400200U, 0x0000000BU}, /*FDT_AXIMP02AXDSP*/ + [112] = {0xFC400204U, 0x0000000BU}, /*FDT_DSP00*/ + [113] = {0xFC400208U, 0x0000000BU}, /*FDT_DSP01*/ + [114] = {0xFC40020CU, 0x0000000BU}, /*FDT_DSP10*/ + [115] = {0xFC400210U, 0x0000000BU}, /*FDT_DSP11*/ + [116] = {0xFC400214U, 0x0000000BU}, /*FDT_DSP20*/ + [117] = {0xFC400218U, 0x0000000BU}, /*FDT_DSP21*/ + [118] = {0xFC40021CU, 0x0000000BU}, /*FDT_DSP30*/ + [119] = {0xFC400220U, 0x0000000BU}, /*FDT_DSP31*/ +}; + +const CONFIGURATION_SETTING_TABLE g_inten_tbl[INTEN_REG_MAX] = { + [0] = {0xFF8403C0U, 0x00033E4CU}, /* FIXINTENTOP00 */ + [1] = {0xFDA723C0U, 0x00000003U}, /* FIXINTENTOP10 */ + [2] = {0xFF8483C0U, 0x00000007U}, /* FIXINTENTOP20 */ + [3] = {0xFF8443C0U, 0x000000FFU}, /* FIXINTENTOP30 */ + [4] = {0xFDDFC3C0U, 0x000000FAU}, /* FIXINTENMM0 */ + [5] = {0xFD8003C0U, 0x0DFFEFFFU}, /* FIXINTENRT00 */ + [6] = {0xFD8003C4U, 0x00042000U}, /* FIXINTENRT01 */ + [7] = {0xFD8043C0U, 0x000000FFU}, /* FIXINTENRT10 */ + [8] = {0xFD8083C0U, 0x000000FFU}, /* FIXINTENRT20 */ + [9] = {0xFD80C3C0U, 0x00000003U}, /* FIXINTENRT30 */ + [10] = {0xFCB303C0U, 0x001FDFC0U}, /* FIXINTENPER000 */ + [11] = {0xFCB343C0U, 0x0000000FU}, /* FIXINTENPER010 */ + [12] = {0xFCB383C0U, 0x0000000FU}, /* FIXINTENPER020 */ + [13] = {0xFCB3C3C0U, 0x0000000FU}, /* FIXINTENPER030 */ + [14] = {0xFCE903C0U, 0x638353FBU}, /* FIXINTENHSC0 */ + [15] = {0xFCE903C4U, 0x00000000U}, /* FIXINTENHSC1 */ + [16] = {0xFC8F83C0U, 0xB0006660U}, /* FIXINTENVIO00 */ + [17] = {0xFC8F83C4U, 0x00018001U}, /* FIXINTENVIO01 */ + [18] = {0xFC8F03C0U, 0xF980000FU}, /* FIXINTENVIO10 */ + [19] = {0xFC8F03C4U, 0x00000039U}, /* FIXINTENVIO11 */ + [20] = {0xFC8FC3C0U, 0x00000003U}, /* FIXINTENVIO20 */ + [21] = {0xFC0103C0U, 0x7AF6ABABU}, /* FIXINTENVC00 */ + [22] = {0xFC0183C0U, 0x00000003U}, /* FIXINTENVC10 */ + [23] = {0xFF8E03C0U, 0x03C3E00FU}, /* FIXINTENIR0 */ + [24] = {0xFC2F03C0U, 0x0000026FU}, /* FIXINTENVIP00 */ + [25] = {0xFC2F83C0U, 0x000010E1U}, /* FIXINTENVIP10 */ + [26] = {0xFC6403C0U, 0x00000005U}, /* FIXINTEN3DG0 */ + [27] = {0xFC4803C0U, 0x0003FFFFU}, /* FIXINTENDSP0 */ + [28] = {0xFF840440U, 0xC5400001U}, /* EDCINTENTOP00 */ + [29] = {0xFF840444U, 0x81FFFF0FU}, /* EDCINTENTOP01 */ + [30] = {0xFF840448U, 0x0000000FU}, /* EDCINTENTOP02 */ + [31] = {0xFDA72440U, 0xF7DFFFFBU}, /* EDCINTENTOP10 */ + [32] = {0xFDA72444U, 0x003FBFFFU}, /* EDCINTENTOP11 */ + [33] = {0xFF848440U, 0x00000003U}, /* EDCINTENTOP20 */ + [34] = {0xFF844440U, 0x0000003FU}, /* EDCINTENTOP30 */ + [35] = {0xFDDFC440U, 0xFFFFFFFFU}, /* EDCINTENMM0 */ + [36] = {0xFDDFC444U, 0xFFFFFFFFU}, /* EDCINTENMM1 */ + [37] = {0xFDDFC448U, 0xFFFFFFFFU}, /* EDCINTENMM2 */ + [38] = {0xFDDFC44CU, 0xFFFFFFFFU}, /* EDCINTENMM3 */ + [39] = {0xFDDFC450U, 0x03FFFFFFU}, /* EDCINTENMM4 */ + [40] = {0xFD800440U, 0x3F7F87FFU}, /* EDCINTENRT00 */ + [41] = {0xFD800444U, 0x001DF804U}, /* EDCINTENRT01 */ + [42] = {0xFD800448U, 0xFFFFFFAFU}, /* EDCINTENRT02 */ + [43] = {0xFD80044CU, 0xFEF3FFFFU}, /* EDCINTENRT03 */ + [44] = {0xFD800450U, 0x6DFDDFF7U}, /* EDCINTENRT04 */ + [45] = {0xFD800454U, 0xFFC001FFU}, /* EDCINTENRT05 */ + [46] = {0xFD808440U, 0x00007FFFU}, /* EDCINTENRT20 */ + [47] = {0xFD80C440U, 0x7FFC7FFFU}, /* EDCINTENRT30 */ + [48] = {0xFD80C444U, 0x00000000U}, /* EDCINTENRT31 */ + [49] = {0xFCB30440U, 0x80800000U}, /* EDCINTENPER000 */ + [50] = {0xFCB30444U, 0x0000000EU}, /* EDCINTENPER001 */ + [51] = {0xFCB30448U, 0xFFF81E80U}, /* EDCINTENPER002 */ + [52] = {0xFCB3044CU, 0xFFFF03FFU}, /* EDCINTENPER003 */ + [53] = {0xFCB30450U, 0x87F7BFFEU}, /* EDCINTENPER004 */ + [54] = {0xFCB30454U, 0xEC01003FU}, /* EDCINTENPER005 */ + [55] = {0xFCB30458U, 0x2007FFFFU}, /* EDCINTENPER006 */ + [56] = {0xFCB3045CU, 0x00000180U}, /* EDCINTENPER007 */ + [57] = {0xFCB34440U, 0xFFF7E7EAU}, /* EDCINTENPER010 */ + [58] = {0xFCB34444U, 0x0000000FU}, /* EDCINTENPER011 */ + [59] = {0xFCB38440U, 0xFFFFFFFFU}, /* EDCINTENPER020 */ + [60] = {0xFCB3C440U, 0xFFFFFFFFU}, /* EDCINTENPER030 */ + [61] = {0xFCB3C444U, 0xFFFFFFFFU}, /* EDCINTENPER031 */ + [62] = {0xFCB3C448U, 0x0000FFFFU}, /* EDCINTENPER032 */ + [63] = {0xFCE90440U, 0xFF9FFFFFU}, /* EDCINTENHSC0 */ + [64] = {0xFCE90444U, 0x19067733U}, /* EDCINTENHSC1 */ + [65] = {0xFCE90448U, 0xC190607CU}, /* EDCINTENHSC2 */ + [66] = {0xFCE9044CU, 0xA6F8C631U}, /* EDCINTENHSC3 */ + [67] = {0xFCE90450U, 0x11D31923U}, /* EDCINTENHSC4 */ + [68] = {0xFCE90454U, 0x00000001U}, /* EDCINTENHSC5 */ + [69] = {0xFC8F8440U, 0x00FEFFFFU}, /* EDCINTENVIO00 */ + [70] = {0xFC8F8444U, 0x0FFFFFFFU}, /* EDCINTENVIO01 */ + [71] = {0xFC8F8448U, 0x00000000U}, /* EDCINTENVIO02 */ + [72] = {0xFC8F844CU, 0xCCCCC000U}, /* EDCINTENVIO03 */ + [73] = {0xFC8F8450U, 0x070F0CF0U}, /* EDCINTENVIO04 */ + [74] = {0xFC8F8454U, 0xC0000000U}, /* EDCINTENVIO05 */ + [75] = {0xFC8F8458U, 0x007F2080U}, /* EDCINTENVIO06 */ + [76] = {0xFC8F0440U, 0xCF010300U}, /* EDCINTENVIO10 */ + [77] = {0xFC8F0444U, 0xFFFF0000U}, /* EDCINTENVIO11 */ + [78] = {0xFC8F0448U, 0xFFFF0000U}, /* EDCINTENVIO12 */ + [79] = {0xFC8F044CU, 0xE67CFFCCU}, /* EDCINTENVIO13 */ + [80] = {0xFC8F0450U, 0xC927CF3FU}, /* EDCINTENVIO14 */ + [81] = {0xFC8F0454U, 0x1DE3797FU}, /* EDCINTENVIO15 */ + [82] = {0xFC8F0458U, 0x1F800000U}, /* EDCINTENVIO16 */ + [83] = {0xFC8FC440U, 0x000FFFFFU}, /* EDCINTENVIO20 */ + [84] = {0xFC010440U, 0x0011EC01U}, /* EDCINTENVC00 */ + [85] = {0xFC010444U, 0xF3EFCE30U}, /* EDCINTENVC01 */ + [86] = {0xFC010448U, 0xFFFFFE5BU}, /* EDCINTENVC02 */ + [87] = {0xFC01044CU, 0xFFFFFFFFU}, /* EDCINTENVC03 */ + [88] = {0xFC010450U, 0x0000003FU}, /* EDCINTENVC04 */ + [89] = {0xFC018440U, 0x00000FFFU}, /* EDCINTENVC10 */ + [90] = {0xFF8E0440U, 0x00073FFFU}, /* EDCINTENIR0 */ + [91] = {0xFF8E0444U, 0xF983FFD8U}, /* EDCINTENIR1 */ + [92] = {0xFF8E0448U, 0xFFF3FFFFU}, /* EDCINTENIR2 */ + [93] = {0xFF8E044CU, 0x0F8000FFU}, /* EDCINTENIR3 */ + [94] = {0xFC2F0440U, 0x00000177U}, /* EDCINTENVIP00 */ + [95] = {0xFC2F0444U, 0xF3BE0000U}, /* EDCINTENVIP01 */ + [96] = {0xFC2F0448U, 0x001F7BF8U}, /* EDCINTENVIP02 */ + [97] = {0xFC2F044CU, 0x00000000U}, /* EDCINTENVIP03 */ + [98] = {0xFC2F0450U, 0x18000000U}, /* EDCINTENVIP04 */ + [99] = {0xFC2F0454U, 0x0000FBFBU}, /* EDCINTENVIP05 */ + [100] = {0xFC2F8440U, 0xFFE18430U}, /* EDCINTENVIP10 */ + [101] = {0xFC2F8444U, 0xF87C3FF0U}, /* EDCINTENVIP11 */ + [102] = {0xFC2F8448U, 0x00000007U}, /* EDCINTENVIP12 */ + [103] = {0xFC640440U, 0xFBFC07FFU}, /* EDCINTEN3DG0 */ + [104] = {0xFC640444U, 0x0081FC47U}, /* EDCINTEN3DG1 */ + [105] = {0xFC480440U, 0x03FFFFFFU}, /* EDCINTENDSP0 */ + [106] = {0xFF840680U, 0x000F3F82U}, /* ICISTPINTENTOP00 */ + [107] = {0xFDA72680U, 0x00000003U}, /* ICISTPINTENTOP10 */ + [108] = {0xFF848680U, 0x00000007U}, /* ICISTPINTENTOP20 */ + [109] = {0xFF844680U, 0x000000FFU}, /* ICISTPINTENTOP30 */ + [110] = {0xFDDFC680U, 0x000FFFFFU}, /* ICISTPINTENMM0 */ + [111] = {0xFD800680U, 0x0E007FFFU}, /* ICISTPINTENRT00 */ + [112] = {0xFD804680U, 0x000001FFU}, /* ICISTPINTENRT10 */ + [113] = {0xFD808680U, 0x00000007U}, /* ICISTPINTENRT20 */ + [114] = {0xFD80C680U, 0x00000003U}, /* ICISTPINTENRT30 */ + [115] = {0xFCB30680U, 0x00023FF0U}, /* ICISTPINTENPER000 */ + [116] = {0xFCB34680U, 0x0000000FU}, /* ICISTPINTENPER010 */ + [117] = {0xFCB38680U, 0x00000003U}, /* ICISTPINTENPER020 */ + [118] = {0xFCB3C680U, 0x00000003U}, /* ICISTPINTENPER030 */ + [119] = {0xFCE90680U, 0x000001E7U}, /* ICISTPINTENHSC0 */ + [120] = {0xFC8F8680U, 0x00000013U}, /* ICISTPINTENVIO00 */ + [121] = {0xFC8F0680U, 0x0000003FU}, /* ICISTPINTENVIO10 */ + [122] = {0xFC8FC680U, 0x00000003U}, /* ICISTPINTENVIO20 */ + [123] = {0xFC010680U, 0x0000003FU}, /* ICISTPINTENVC00 */ + [124] = {0xFC018680U, 0x00000003U}, /* ICISTPINTENVC10 */ + [125] = {0xFF8E0680U, 0x0000FFC3U}, /* ICISTPINTENIR0 */ + [126] = {0xFC2F0680U, 0x0000001FU}, /* ICISTPINTENVIP00 */ + [127] = {0xFC2F8680U, 0x0000003FU}, /* ICISTPINTENVIP10 */ + [128] = {0xFC640680U, 0x0000000FU}, /* ICISTPINTEN3DG0 */ + [129] = {0xFC480680U, 0x000000FFU}, /* ICISTPINTENDSP0 */ + [130] = {0xFF840580U, 0x0000003CU}, /* DCLSINTENTOP00 */ + [131] = {0xFDA72580U, 0x00000003U}, /* DCLSINTENTOP10 */ + [132] = {0xFF848580U, 0x00000003U}, /* DCLSINTENTOP20 */ + [133] = {0xFF844580U, 0x00000003U}, /* DCLSINTENTOP30 */ + [134] = {0xFDDFC580U, 0x3FFFFFF7U}, /* DCLSINTENMM0 */ + [135] = {0xFDDFC584U, 0x00000080U}, /* DCLSINTENMM1 */ + [136] = {0xFD800580U, 0x01FFFFFFU}, /* DCLSINTENRT00 */ + [137] = {0xFD800584U, 0x0000003EU}, /* DCLSINTENRT01 */ + [138] = {0xFD808580U, 0x0000003FU}, /* DCLSINTENRT20 */ + [139] = {0xFD80C580U, 0x00000003U}, /* DCLSINTENRT30 */ + [140] = {0xFCB30580U, 0x039FFFC0U}, /* DCLSINTENPER000 */ + [141] = {0xFCB34580U, 0x0000000AU}, /* DCLSINTENPER010 */ + [142] = {0xFCB38580U, 0x0000000FU}, /* DCLSINTENPER020 */ + [143] = {0xFCB3C580U, 0x000000FFU}, /* DCLSINTENPER030 */ + [144] = {0xFCE90580U, 0x1FFFC23FU}, /* DCLSINTENHSC0 */ + [145] = {0xFC8F8580U, 0x7207FF0CU}, /* DCLSINTENVIO00 */ + [146] = {0xFC8F0580U, 0x0DFBC03FU}, /* DCLSINTENVIO10 */ + [147] = {0xFC8FC580U, 0x00000003U}, /* DCLSINTENVIO20 */ + [148] = {0xFC010580U, 0x03FAF7E7U}, /* DCLSINTENVC00 */ + [149] = {0xFC018580U, 0x00000003U}, /* DCLSINTENVC10 */ + [150] = {0xFF8E0580U, 0x0FFF9F60U}, /* DCLSINTENIR0 */ + [151] = {0xFC2F0580U, 0xE00003E7U}, /* DCLSINTENVIP00 */ + [152] = {0xFC2F0584U, 0x0000003FU}, /* DCLSINTENVIP01 */ + [153] = {0xFC2F8580U, 0x00000C3FU}, /* DCLSINTENVIP10 */ + [154] = {0xFC480580U, 0x00000003U}, /* DCLSINTENDSP0 */ + [155] = {0xFF840480U, 0xF99F00F0U}, /* LSCHKINTENTOP00 */ + [156] = {0xFF840484U, 0x0003E67FU}, /* LSCHKINTENTOP01 */ + [157] = {0xFDA72480U, 0x00000003U}, /* LSCHKINTENTOP10 */ + [158] = {0xFF848480U, 0x0000001FU}, /* LSCHKINTENTOP20 */ + [159] = {0xFF844480U, 0x000FFFFFU}, /* LSCHKINTENTOP30 */ + [160] = {0xFDDFC480U, 0xFFFFFFFFU}, /* LSCHKINTENMM0 */ + [161] = {0xFDDFC484U, 0x000003FFU}, /* LSCHKINTENMM1 */ + [162] = {0xFD800480U, 0x7FFFFF7FU}, /* LSCHKINTENRT00 */ + [163] = {0xFD800484U, 0x001FFFFFU}, /* LSCHKINTENRT01 */ + [164] = {0xFD800488U, 0x04C4C000U}, /* LSCHKINTENRT02 */ + [165] = {0xFD804480U, 0x003FC7F8U}, /* LSCHKINTENRT10 */ + [166] = {0xFD808480U, 0x000003FFU}, /* LSCHKINTENRT20 */ + [167] = {0xFD80C480U, 0x00000003U}, /* LSCHKINTENRT30 */ + [168] = {0xFCB30480U, 0xDFFFDF00U}, /* LSCHKINTENPER000 */ + [169] = {0xFCB30484U, 0x00000CFFU}, /* LSCHKINTENPER001 */ + [170] = {0xFCB34480U, 0x000000FFU}, /* LSCHKINTENPER010 */ + [171] = {0xFCB38480U, 0x0000000FU}, /* LSCHKINTENPER020 */ + [172] = {0xFCB3C480U, 0x0000000FU}, /* LSCHKINTENPER030 */ + [173] = {0xFCE90480U, 0x1F863FFFU}, /* LSCHKINTENHSC0 */ + [174] = {0xFCE90484U, 0x00000C3CU}, /* LSCHKINTENHSC1 */ + [175] = {0xFC8F8480U, 0xF99F333FU}, /* LSCHKINTENVIO00 */ + [176] = {0xFC8F8484U, 0x000E0403U}, /* LSCHKINTENVIO01 */ + [177] = {0xFC8F0480U, 0xE0040003U}, /* LSCHKINTENVIO10 */ + [178] = {0xFC8F0484U, 0x0031F3FCU}, /* LSCHKINTENVIO11 */ + [179] = {0xFC8FC480U, 0x00000003U}, /* LSCHKINTENVIO20 */ + [180] = {0xFC010480U, 0x7EF0ABABU}, /* LSCHKINTENVC00 */ + [181] = {0xFC010484U, 0x00000FDFU}, /* LSCHKINTENVC01 */ + [182] = {0xFC018480U, 0x00000003U}, /* LSCHKINTENVC10 */ + [183] = {0xFF8E0480U, 0x403FF00FU}, /* LSCHKINTENIR0 */ + [184] = {0xFF8E0484U, 0x003F3FFFU}, /* LSCHKINTENIR1 */ + [185] = {0xFC2F0480U, 0x000176DFU}, /* LSCHKINTENVIP00 */ + [186] = {0xFC2F0484U, 0x00060000U}, /* LSCHKINTENVIP01 */ + [187] = {0xFC2F8480U, 0x001C3F87U}, /* LSCHKINTENVIP10 */ + [188] = {0xFC640480U, 0x0000063FU}, /* LSCHKINTEN3DG0 */ + [189] = {0xFC480480U, 0x3FFFFFFFU}, /* LSCHKINTENDSP0 */ + [190] = {0xFF840700U, 0x0000001EU}, /* OTHINTENTOP00 */ + [191] = {0xFDDFC700U, 0x008FCFFDU}, /* OTHINTENMM0 */ + [192] = {0xFD800700U, 0x00FFFFF0U}, /* OTHINTENRT00 */ + [193] = {0xFCB30700U, 0x0000003CU}, /* OTHINTENPER000 */ + [194] = {0xFCE90700U, 0x0000003CU}, /* OTHINTENHSC0 */ + [195] = {0xFC8F8700U, 0x00000000U}, /* OTHINTENVIO00 */ + [196] = {0xFC8F0700U, 0x0000007CU}, /* OTHINTENVIO10 */ + [197] = {0xFC010700U, 0x000000F0U}, /* OTHINTENVC00 */ + [198] = {0xFC018700U, 0x00000000U}, /* OTHINTENVC10 */ + [199] = {0xFF8E0700U, 0x000000F0U}, /* OTHINTENIR0 */ + [200] = {0xFC2F0700U, 0x00000FC0U}, /* OTHINTENVIP00 */ + [201] = {0xFC2F8700U, 0x00000000U}, /* OTHINTENVIP10 */ + [202] = {0xFC640700U, 0x00000024U}, /* OTHINTEN3DG0 */ + [203] = {0xFF840400U, 0xC5000071U}, /* ROUINTENTOP00 */ + [204] = {0xFF840404U, 0xC8FFE7CFU}, /* ROUINTENTOP01 */ + [205] = {0xFF840408U, 0x8000F3E7U}, /* ROUINTENTOP02 */ + [206] = {0xFDA72400U, 0xFBFFFFFEU}, /* ROUINTENTOP10 */ + [207] = {0xFDA72404U, 0x003FFFFFU}, /* ROUINTENTOP11 */ + [208] = {0xFF848400U, 0x00000007U}, /* ROUINTENTOP20 */ + [209] = {0xFF844400U, 0x003FFFFFU}, /* ROUINTENTOP30 */ + [210] = {0xFDDFC400U, 0xFFFFFFFFU}, /* ROUINTENMM0 */ + [211] = {0xFDDFC404U, 0xFFFFFFFFU}, /* ROUINTENMM1 */ + [212] = {0xFDDFC408U, 0xFFFFFFFFU}, /* ROUINTENMM2 */ + [213] = {0xFDDFC40CU, 0x01FFFFFFU}, /* ROUINTENMM3 */ + [214] = {0xFD800400U, 0x007F3FEFU}, /* ROUINTENRT00 */ + [215] = {0xFD800404U, 0x40000040U}, /* ROUINTENRT01 */ + [216] = {0xFD800408U, 0x7BFFFBFFU}, /* ROUINTENRT02 */ + [217] = {0xFD80040CU, 0xFFFFFFFFU}, /* ROUINTENRT03 */ + [218] = {0xFD800410U, 0x6C007F87U}, /* ROUINTENRT04 */ + [219] = {0xFD800414U, 0xFFFFFFFFU}, /* ROUINTENRT05 */ + [220] = {0xFD800418U, 0x05FFFFFFU}, /* ROUINTENRT06 */ + [221] = {0xFD804400U, 0x001FFFFFU}, /* ROUINTENRT10 */ + [222] = {0xFD808400U, 0x000003FFU}, /* ROUINTENRT20 */ + [223] = {0xFD80C400U, 0x7FFE3FFFU}, /* ROUINTENRT30 */ + [224] = {0xFD80C404U, 0x00000000U}, /* ROUINTENRT31 */ + [225] = {0xFCB30400U, 0x00800000U}, /* ROUINTENPER000 */ + [226] = {0xFCB30404U, 0x00000000U}, /* ROUINTENPER001 */ + [227] = {0xFCB30408U, 0xFFF81C80U}, /* ROUINTENPER002 */ + [228] = {0xFCB3040CU, 0xC7F1FFFFU}, /* ROUINTENPER003 */ + [229] = {0xFCB30410U, 0x020FFFFFU}, /* ROUINTENPER004 */ + [230] = {0xFCB30414U, 0xFFBDE010U}, /* ROUINTENPER005 */ + [231] = {0xFCB30418U, 0x01003FFFU}, /* ROUINTENPER006 */ + [232] = {0xFCB3041CU, 0x0000005EU}, /* ROUINTENPER007 */ + [233] = {0xFCB34400U, 0xFFF7FF7EU}, /* ROUINTENPER010 */ + [234] = {0xFCB34404U, 0x0000003FU}, /* ROUINTENPER011 */ + [235] = {0xFCB38400U, 0x0FFFFFFFU}, /* ROUINTENPER020 */ + [236] = {0xFCB3C400U, 0xFFFFFFFFU}, /* ROUINTENPER030 */ + [237] = {0xFCB3C404U, 0xFFFFFFFFU}, /* ROUINTENPER031 */ + [238] = {0xFCB3C408U, 0x000000FFU}, /* ROUINTENPER032 */ + [239] = {0xFCE90400U, 0xFFE1D3FFU}, /* ROUINTENHSC0 */ + [240] = {0xFCE90404U, 0x00106001U}, /* ROUINTENHSC1 */ + [241] = {0xFCE90408U, 0xFFFB9906U}, /* ROUINTENHSC2 */ + [242] = {0xFCE9040CU, 0x7C1F07F9U}, /* ROUINTENHSC3 */ + [243] = {0xFCE90410U, 0x00000CFFU}, /* ROUINTENHSC4 */ + [244] = {0xFC8F8400U, 0xDFFFE1FFU}, /* ROUINTENVIO00 */ + [245] = {0xFC8F8404U, 0x00001003U}, /* ROUINTENVIO01 */ + [246] = {0xFC8F8408U, 0xF8000000U}, /* ROUINTENVIO02 */ + [247] = {0xFC8F840CU, 0x1E18007FU}, /* ROUINTENVIO03 */ + [248] = {0xFC8F8410U, 0xE0786200U}, /* ROUINTENVIO04 */ + [249] = {0xFC8F8414U, 0x0000000FU}, /* ROUINTENVIO05 */ + [250] = {0xFC8F8418U, 0xFFFE0002U}, /* ROUINTENVIO06 */ + [251] = {0xFC8F0400U, 0x200007CFU}, /* ROUINTENVIO10 */ + [252] = {0xFC8F0404U, 0xCF3FE1CEU}, /* ROUINTENVIO11 */ + [253] = {0xFC8F0408U, 0x000079E7U}, /* ROUINTENVIO12 */ + [254] = {0xFC8F040CU, 0x00000000U}, /* ROUINTENVIO13 */ + [255] = {0xFC8F0410U, 0x3C000000U}, /* ROUINTENVIO14 */ + [256] = {0xFC8F0414U, 0x0F038000U}, /* ROUINTENVIO15 */ + [257] = {0xFC8F0418U, 0x0000001CU}, /* ROUINTENVIO16 */ + [258] = {0xFC8FC400U, 0x0003FFFFU}, /* ROUINTENVIO20 */ + [259] = {0xFC010400U, 0x40000000U}, /* ROUINTENVC00 */ + [260] = {0xFC010404U, 0x38001860U}, /* ROUINTENVC01 */ + [261] = {0xFC010408U, 0xF9C003BFU}, /* ROUINTENVC02 */ + [262] = {0xFC01040CU, 0xFFFFF3FFU}, /* ROUINTENVC03 */ + [263] = {0xFC010410U, 0x000001FFU}, /* ROUINTENVC04 */ + [264] = {0xFC018400U, 0x000003FFU}, /* ROUINTENVC10 */ + [265] = {0xFF8E0400U, 0x803F1FC1U}, /* ROUINTENIR0 */ + [266] = {0xFF8E0404U, 0x087E821FU}, /* ROUINTENIR1 */ + [267] = {0xFF8E0408U, 0xFFFF0FC2U}, /* ROUINTENIR2 */ + [268] = {0xFF8E040CU, 0x000001FFU}, /* ROUINTENIR3 */ + [269] = {0xFC2F0400U, 0xF00101E1U}, /* ROUINTENVIP00 */ + [270] = {0xFC2F0404U, 0xBC07C007U}, /* ROUINTENVIP01 */ + [271] = {0xFC2F0408U, 0x00EE97E1U}, /* ROUINTENVIP02 */ + [272] = {0xFC2F040CU, 0x00000000U}, /* ROUINTENVIP03 */ + [273] = {0xFC2F0410U, 0x00000000U}, /* ROUINTENVIP04 */ + [274] = {0xFC2F0414U, 0x01F80000U}, /* ROUINTENVIP05 */ + [275] = {0xFC2F8400U, 0x07FFFFFFU}, /* ROUINTENVIP10 */ + [276] = {0xFC2F8404U, 0x3FFFF03FU}, /* ROUINTENVIP11 */ + [277] = {0xFC640400U, 0x03FC03FFU}, /* ROUINTEN3DG0 */ + [278] = {0xFC640404U, 0x000007FFU}, /* ROUINTEN3DG1 */ + [279] = {0xFC480400U, 0xFFFFFFFFU}, /* ROUINTENDSP0 */ + [280] = {0xFF840500U, 0xC0FEEFFFU}, /* RSCHKINTENTOP00 */ + [281] = {0xFF840504U, 0x603F99FFU}, /* RSCHKINTENTOP01 */ + [282] = {0xFF840508U, 0x0001C000U}, /* RSCHKINTENTOP02 */ + [283] = {0xFDA72500U, 0x00000001U}, /* RSCHKINTENTOP10 */ + [284] = {0xFF848500U, 0x0000001FU}, /* RSCHKINTENTOP20 */ + [285] = {0xFF844500U, 0x00003FFFU}, /* RSCHKINTENTOP30 */ + [286] = {0xFDDFC500U, 0xFFFFFFFFU}, /* RSCHKINTENMM0 */ + [287] = {0xFDDFC504U, 0x00000007U}, /* RSCHKINTENMM1 */ + [288] = {0xFD800500U, 0xFFFFFFFFU}, /* RSCHKINTENRT00 */ + [289] = {0xFD800504U, 0xFFFF8001U}, /* RSCHKINTENRT01 */ + [290] = {0xFD800508U, 0x0000FFE3U}, /* RSCHKINTENRT02 */ + [291] = {0xFD804500U, 0x000007FFU}, /* RSCHKINTENRT10 */ + [292] = {0xFD808500U, 0x000000FFU}, /* RSCHKINTENRT20 */ + [293] = {0xFD80C500U, 0x00000001U}, /* RSCHKINTENRT30 */ + [294] = {0xFCB30500U, 0xFFF10F07U}, /* RSCHKINTENPER000 */ + [295] = {0xFCB30504U, 0x000FBCFFU}, /* RSCHKINTENPER001 */ + [296] = {0xFCB34500U, 0x000000FAU}, /* RSCHKINTENPER010 */ + [297] = {0xFCB38500U, 0x00000003U}, /* RSCHKINTENPER020 */ + [298] = {0xFCB3C500U, 0x0000003FU}, /* RSCHKINTENPER030 */ + [299] = {0xFCE90500U, 0xF3F3FFFFU}, /* RSCHKINTENHSC0 */ + [300] = {0xFCE90504U, 0x001FFFFFU}, /* RSCHKINTENHSC1 */ + [301] = {0xFC8F8500U, 0xFFFFC003U}, /* RSCHKINTENVIO00 */ + [302] = {0xFC8F8504U, 0x3801C03FU}, /* RSCHKINTENVIO01 */ + [303] = {0xFC8F0500U, 0xFF7F3FFFU}, /* RSCHKINTENVIO10 */ + [304] = {0xFC8F0504U, 0x041A001EU}, /* RSCHKINTENVIO11 */ + [305] = {0xFC8FC500U, 0x00000007U}, /* RSCHKINTENVIO20 */ + [306] = {0xFC010500U, 0xFEBB6667U}, /* RSCHKINTENVC00 */ + [307] = {0xFC010504U, 0x000007FFU}, /* RSCHKINTENVC01 */ + [308] = {0xFC018500U, 0x00000007U}, /* RSCHKINTENVC10 */ + [309] = {0xFF8E0500U, 0x3FFFFE00U}, /* RSCHKINTENIR0 */ + [310] = {0xFF8E0504U, 0x0000FFFFU}, /* RSCHKINTENIR1 */ + [311] = {0xFC2F0500U, 0x0000FFFFU}, /* RSCHKINTENVIP00 */ + [312] = {0xFC2F0504U, 0x000FF800U}, /* RSCHKINTENVIP01 */ + [313] = {0xFC2F8500U, 0x000FFFFFU}, /* RSCHKINTENVIP10 */ + [314] = {0xFC640500U, 0x000001C7U}, /* RSCHKINTEN3DG0 */ + [315] = {0xFC480500U, 0x0001FFFFU}, /* RSCHKINTENDSP0 */ + [316] = {0xFF840540U, 0x00000003U}, /* TIDINTENTOP00 */ + [317] = {0xFF848540U, 0x00000007U}, /* TIDINTENTOP20 */ + [318] = {0xFDDFC540U, 0x00003FFFU}, /* TIDINTENMM0 */ + [319] = {0xFD800540U, 0x00FFFFFFU}, /* TIDINTENRT00 */ + [320] = {0xFD800544U, 0x00000420U}, /* TIDINTENRT01 */ + [321] = {0xFD804540U, 0x000000FFU}, /* TIDINTENRT10 */ + [322] = {0xFD808540U, 0x0000003FU}, /* TIDINTENRT20 */ + [323] = {0xFCB30540U, 0x0003FFF0U}, /* TIDINTENPER000 */ + [324] = {0xFCB34540U, 0x0000000FU}, /* TIDINTENPER010 */ + [325] = {0xFCE90540U, 0x0638367FU}, /* TIDINTENHSC0 */ + [326] = {0xFC8F8540U, 0xFFF0CFC3U}, /* TIDINTENVIO00 */ + [327] = {0xFC8F8544U, 0x00000003U}, /* TIDINTENVIO01 */ + [328] = {0xFC8F0540U, 0xBC000000U}, /* TIDINTENVIO10 */ + [329] = {0xFC8F0544U, 0x0000003FU}, /* TIDINTENVIO11 */ + [330] = {0xFC010540U, 0x3B77EFD0U}, /* TIDINTENVC00 */ + [331] = {0xFF8E0540U, 0x00FC1F60U}, /* TIDINTENIR0 */ + [332] = {0xFC2F0540U, 0x0000036DU}, /* TIDINTENVIP00 */ + [333] = {0xFC2F8540U, 0x00000610U}, /* TIDINTENVIP10 */ + [334] = {0xFC640540U, 0x00000011U}, /* TIDINTEN3DG0 */ + [335] = {0xFC480540U, 0x00000000U}, /* TIDINTENDSP0 */ + [336] = {0xFF840640U, 0x00000002U}, /* SAFERRINTENTOP00 */ + [337] = {0xFDA72640U, 0x00000001U}, /* SAFERRINTENTOP10 */ + [338] = {0xFF848640U, 0x00000000U}, /* SAFERRINTENTOP20 */ + [339] = {0xFF844640U, 0x00000001U}, /* SAFERRINTENTOP30 */ + [340] = {0xFDDFC640U, 0x00000007U}, /* SAFERRINTENMM0 */ + [341] = {0xFD800640U, 0x00000005U}, /* SAFERRINTENRT00 */ + [342] = {0xFD804640U, 0x00000001U}, /* SAFERRINTENRT10 */ + [343] = {0xFD808640U, 0x00000001U}, /* SAFERRINTENRT20 */ + [344] = {0xFD80C640U, 0x00000001U}, /* SAFERRINTENRT30 */ + [345] = {0xFCB30640U, 0x00000004U}, /* SAFERRINTENPER000 */ + [346] = {0xFCB34640U, 0x00000001U}, /* SAFERRINTENPER010 */ + [347] = {0xFCB38640U, 0x00000001U}, /* SAFERRINTENPER020 */ + [348] = {0xFCB3C640U, 0x00000001U}, /* SAFERRINTENPER030 */ + [349] = {0xFCE90640U, 0x00000001U}, /* SAFERRINTENHSC0 */ + [350] = {0xFC8F8640U, 0x00000001U}, /* SAFERRINTENVIO00 */ + [351] = {0xFC8F0640U, 0x00000002U}, /* SAFERRINTENVIO10 */ + [352] = {0xFC8FC640U, 0x00000001U}, /* SAFERRINTENVIO20 */ + [353] = {0xFC010640U, 0x00000001U}, /* SAFERRINTENVC00 */ + [354] = {0xFC018640U, 0x00000001U}, /* SAFERRINTENVC10 */ + [355] = {0xFF8E0640U, 0x00000001U}, /* SAFERRINTENIR0 */ + [356] = {0xFC2F0640U, 0x00000001U}, /* SAFERRINTENVIP00 */ + [357] = {0xFC2F8640U, 0x00000001U}, /* SAFERRINTENVIP10 */ + [358] = {0xFC640640U, 0x00000001U}, /* SAFERRINTEN3DG0 */ + [359] = {0xFC480640U, 0x00000001U}, /* SAFERRINTENDSP0 */ + [360] = {0xFF8404C0U, 0x0000007FU}, /* WCRCINTENTOP00 */ + [361] = {0xFDDFC4C0U, 0x07FFFFFFU}, /* WCRCINTENMM0 */ + [362] = {0xFD8004C0U, 0x207FFFFBU}, /* WCRCINTENRT00 */ + [363] = {0xFD8004C4U, 0x00000014U}, /* WCRCINTENRT01 */ + [364] = {0xFD8044C0U, 0x0000078FU}, /* WCRCINTENRT10 */ + [365] = {0xFD8084C0U, 0x00000007U}, /* WCRCINTENRT20 */ + [366] = {0xFCB304C0U, 0x000037FFU}, /* WCRCINTENPER000 */ + [367] = {0xFCB344C0U, 0x00000003U}, /* WCRCINTENPER010 */ + [368] = {0xFCE904C0U, 0x0000E1FFU}, /* WCRCINTENHSC0 */ + [369] = {0xFC8F84C0U, 0x0000FFC3U}, /* WCRCERRINTENVIO00 */ + [370] = {0xFC8F04C0U, 0x001FC40FU}, /* WCRCERRINTENVIO10 */ + [371] = {0xFC0104C0U, 0x00357D7DU}, /* WCRCERRINTENVC00 */ + [372] = {0xFF8E04C0U, 0x3FFF03F0U}, /* WCRCERRINTENIR0 */ + [373] = {0xFC2F04C0U, 0x070030F5U}, /* WCRCERRINTENVIP00 */ + [374] = {0xFC2F84C0U, 0x000000F0U}, /* WCRCERRINTENVIP10 */ + [375] = {0xFC6404C0U, 0x00000063U}, /* WCRCERRINTEN3DG0 */ + [376] = {0xFC4804C0U, 0x00007FFFU}, /* WCRCINTENDSP0 */ + [377] = {0xFF840600U, 0x00000002U}, /* SECERRINTENTOP00 */ + [378] = {0xFDA72600U, 0x00000001U}, /* SECERRINTENTOP10 */ + [379] = {0xFF848600U, 0x00000000U}, /* SECERRINTENTOP20 */ + [380] = {0xFF844600U, 0x00000001U}, /* SECERRINTENTOP30 */ + [381] = {0xFDDFC600U, 0x00000007U}, /* SECERRINTENMM0 */ + [382] = {0xFD800600U, 0x00000005U}, /* SECERRINTENRT00 */ + [383] = {0xFD804600U, 0x00000001U}, /* SECERRINTENRT10 */ + [384] = {0xFD808600U, 0x00000001U}, /* SECERRINTENRT20 */ + [385] = {0xFD80C600U, 0x00000001U}, /* SECERRINTENRT30 */ + [386] = {0xFCB30600U, 0x00000004U}, /* SECERRINTENPER000 */ + [387] = {0xFCB34600U, 0x00000001U}, /* SECERRINTENPER010 */ + [388] = {0xFCB38600U, 0x00000001U}, /* SECERRINTENPER020 */ + [389] = {0xFCB3C600U, 0x00000001U}, /* SECERRINTENPER030 */ + [390] = {0xFCE90600U, 0x00000001U}, /* SECERRINTENHSC0 */ + [391] = {0xFC8F8600U, 0x00000001U}, /* SECERRINTENVIO00 */ + [392] = {0xFC8F0600U, 0x00000002U}, /* SECERRINTENVIO10 */ + [393] = {0xFC8FC600U, 0x00000001U}, /* SECERRINTENVIO20 */ + [394] = {0xFC010600U, 0x00000001U}, /* SECERRINTENVC00 */ + [395] = {0xFC018600U, 0x00000001U}, /* SECERRINTENVC10 */ + [396] = {0xFF8E0600U, 0x00000001U}, /* SECERRINTENIR0 */ + [397] = {0xFC2F0600U, 0x00000001U}, /* SECERRINTENVIP00 */ + [398] = {0xFC2F8600U, 0x00000001U}, /* SECERRINTENVIP10 */ + [399] = {0xFC640600U, 0x00000001U}, /* SECERRINTEN3DG0 */ + [400] = {0xFC480600U, 0x00000001U}, /* SECERRINTENDSP0 */ +}; + +#pragma ghs section rodata=".imp_rgid_m_tbl" +const REGION_ID_SETTING_TABLE g_imp_rgid_m_tbl[IMP_MASTER_MAX] = { + [0] = {0xFFA8E270U, 0x00010202U}, /* SPMI BMATTR00 */ + [1] = {0xFFA8E274U, 0x00010202U}, /* SPMI BMATTR01 */ + [2] = {0xFFA8E278U, 0x00010202U}, /* SPMI BMATTR02 */ + [3] = {0xFFA8E27CU, 0x00010202U}, /* SPMI BMATTR03 */ + [4] = {0xFFA8E280U, 0x00010202U}, /* SPMI BMATTR04 */ + [5] = {0xFFA8E284U, 0x00010202U}, /* SPMI BMATTR05 */ + [6] = {0xFFA8E288U, 0x00010202U}, /* SPMI BMATTR06 */ + [7] = {0xFFA8E28CU, 0x00010202U}, /* SPMI BMATTR07 */ + [8] = {0xFFA8E290U, 0x00010202U}, /* SPMI BMATTR08 */ + [9] = {0xFFA8E294U, 0x00010202U}, /* SPMI BMATTR09 */ + [10] = {0xFFA8E298U, 0x00010202U}, /* SPMI BMATTR10 */ + [11] = {0xFFA8E29CU, 0x00010202U}, /* SPMI BMATTRSP0 */ + [12] = {0xFFAB2270U, 0x00010202U}, /* SPMC BMATTR00 */ + [13] = {0xFFAB2274U, 0x00010202U}, /* SPMC BMATTR01 */ + [14] = {0xFFAB2278U, 0x00010202U}, /* SPMC BMATTR02 */ + [15] = {0xFFAB227CU, 0x00010202U}, /* SPMC BMATTR03 */ + [16] = {0xFFAB2280U, 0x00010202U}, /* SPMC BMATTR04 */ + [17] = {0xFFAB2284U, 0x00010202U}, /* SPMC BMATTR05 */ + [18] = {0xFFAB2288U, 0x00010202U}, /* SPMC BMATTR06 */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".imp_rgid_s_tbl" +const REGION_ID_SETTING_TABLE g_imp_rgid_s_tbl[IMP_SLAVE_MAX] = { + [0] = {0xFF902100U, 0x004E004FU}, /* IMPSLV RCR0 */ + [1] = {0xFF902108U, 0x004E004FU}, /* IMPSLV RCR2 */ + [2] = {0xFFAB2100U, 0x004E004FU}, /* SPMC RCR0 */ + [3] = {0xFFAB2110U, 0x004E004FU}, /* SPMC RC00 */ + [4] = {0xFFAB2114U, 0x004E004FU}, /* SPMC RC01 */ + [5] = {0xFFAB2118U, 0x004E004FU}, /* SPMC RC02 */ + [6] = {0xFFAB2204U, 0x004E004FU}, /* SPMC RCB0 */ + [7] = {0xFFAB2208U, 0x004E004FU}, /* SPMC RCB1 */ + [8] = {0xFFAB2104U, 0x004E004FU}, /* SPMC RCR1 */ + [9] = {0xFFA8E100U, 0x004E004FU}, /* SPMI RCR0 */ + [10] = {0xFFA8E110U, 0x004E004FU}, /* SPMI RC00 */ + [11] = {0xFFA8E114U, 0x004E004FU}, /* SPMI RC01 */ + [12] = {0xFFA8E118U, 0x004E004FU}, /* SPMI RC02 */ + [13] = {0xFFA8E11CU, 0x004E004FU}, /* SPMI RC03 */ + [14] = {0xFFA8E120U, 0x004E004FU}, /* SPMI RC04 */ + [15] = {0xFFA8E124U, 0x004E004FU}, /* SPMI RC05 */ + [16] = {0xFFA8E128U, 0x004E004FU}, /* SPMI RC06 */ + [17] = {0xFFA8E12CU, 0x004E004FU}, /* SPMI RC07 */ + [18] = {0xFFA8E130U, 0x004E004FU}, /* SPMI RC08 */ + [19] = {0xFFA8E134U, 0x004E004FU}, /* SPMI RC09 */ + [20] = {0xFFA8E138U, 0x004E004FU}, /* SPMI RC10 */ + [21] = {0xFFA8E13CU, 0x004E004FU}, /* SPMI RC11 */ + [22] = {0xFFA8E140U, 0x004E004FU}, /* SPMI RC12 */ + [23] = {0xFFA8E144U, 0x004E004FU}, /* SPMI RC13 */ + [24] = {0xFFA8E204U, 0x004E004FU}, /* SPMI RCB0 */ + [25] = {0xFFA8E208U, 0x004E004FU}, /* SPMI RCB1 */ + [26] = {0xFFA8E20CU, 0x004E004FU}, /* SPMI RCB2 */ + [27] = {0xFFA8E210U, 0x004E004FU}, /* SPMI RCB3 */ + [28] = {0xFFA8E214U, 0x004E004FU}, /* SPMI RCB4 */ + [29] = {0xFFA8E218U, 0x004E004FU}, /* SPMI RCB5 */ + [30] = {0xFFA8E21CU, 0x004E004FU}, /* SPMI RCB6 */ + [31] = {0xFFA8E220U, 0x004E004FU}, /* SPMI RCB7 */ + [32] = {0xFFA8E104U, 0x004E004FU}, /* SPMI RCR1 */ + [33] = {0xFF902110U, 0x004E004FU}, /* IMPSLV RC00 */ + [34] = {0xFF902104U, 0x004E004FU}, /* IMPSLV RCR1 */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".ipmmu_rgid_tbl" +const REGION_ID_SETTING_TABLE g_ipmmu_rgid_tbl[IPMMU_RGID_MAX] = { + [0] = {0xEEE80570U, 0x00000002U}, /* IMRGID_IPMMU_VI0 */ + [1] = {0xEEEC0570U, 0x00000002U}, /* IMRGID_IPMMU_VI1 */ + [2] = {0xEEDC0570U, 0x00000002U}, /* IMRGID_IPMMU_VC0 */ + [3] = {0xEED80570U, 0x00000002U}, /* IMRGID_IPMMU_IR */ + [4] = {0xEE480570U, 0x00000001U}, /* IMRGID_IPMMU_RT0 */ + [5] = {0xEE4C0570U, 0x00000001U}, /* IMRGID_IPMMU_RT1 */ + [6] = {0xEED00570U, 0x00000001U}, /* IMRGID_IPMMU_DS0 */ + [7] = {0xEED40570U, 0x00000001U}, /* IMRGID_IPMMU_HSC */ + [8] = {0xEEF00570U, 0x00000002U}, /* IMRGID_IPMMU_VIP0 */ + [9] = {0xEEF40570U, 0x00000002U}, /* IMRGID_IPMMU_VIP1 */ + [10] = {0xEEE00570U, 0x00000002U}, /* IMRGID_IPMMU_3DG */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".ipmmu_rgid_sec_tbl" +const REGION_ID_SETTING_TABLE g_ipmmu_rgid_sec_tbl[IPMMU_RGID_MAX] = { + [0] = {0xEEE80578U, 0x00000001U}, /* IMSECGRP_IPMMU_VI0 */ + [1] = {0xEEEC0578U, 0x00000001U}, /* IMSECGRP_IPMMU_VI1 */ + [2] = {0xEEDC0578U, 0x00000001U}, /* IMSECGRP_IPMMU_VC0 */ + [3] = {0xEED80578U, 0x00000001U}, /* IMSECGRP_IPMMU_IR */ + [4] = {0xEE480578U, 0x00000001U}, /* IMSECGRP_IPMMU_RT0 */ + [5] = {0xEE4C0578U, 0x00000001U}, /* IMSECGRP_IPMMU_RT1 */ + [6] = {0xEED00578U, 0x00000001U}, /* IMSECGRP_IPMMU_DS0 */ + [7] = {0xEED40578U, 0x00000001U}, /* IMSECGRP_IPMMU_HSC */ + [8] = {0xEEF00578U, 0x00000001U}, /* IMSECGRP_IPMMU_VIP0 */ + [9] = {0xEEF40578U, 0x00000001U}, /* IMSECGRP_IPMMU_VIP1 */ + [10] = {0xEEE00578U, 0x00000001U}, /* IMSECGRP_IPMMU_3DG */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".ipmmu_rgid_en_tbl" +const REGION_ID_SETTING_TABLE g_ipmmu_rgid_en_tbl[IPMMU_RGID_MAX] = { + [0] = {0xEEE80574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VI0 */ + [1] = {0xEEEC0574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VI1 */ + [2] = {0xEEDC0574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VC0 */ + [3] = {0xEED80574U, 0x00000002U}, /* IMRGIDEN_IPMMU_IR */ + [4] = {0xEE480574U, 0x00000002U}, /* IMRGIDEN_IPMMU_RT0 */ + [5] = {0xEE4C0574U, 0x00000002U}, /* IMRGIDEN_IPMMU_RT1 */ + [6] = {0xEED00574U, 0x00000002U}, /* IMRGIDEN_IPMMU_DS0 */ + [7] = {0xEED40574U, 0x00000002U}, /* IMRGIDEN_IPMMU_HSC */ + [8] = {0xEEF00574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VIP0 */ + [9] = {0xEEF40574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VIP1 */ + [10] = {0xEEE00574U, 0x00000002U}, /* IMRGIDEN_IPMMU_3DG */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_v4m.c new file mode 100644 index 00000000..565d3e74 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cnf_tbl/cnf_tbl_v4m.c @@ -0,0 +1,3583 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Configuration table + ******************************************************************************/ +/****************************************************************************** + * @file cnf_tbl_v4m.c + * - Version : 0.14 + * @brief Configuration table for V4M. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 21.08.2023 0.01 First Release + * : 19.09.2023 0.02 Update setting table according to + * HWUM Rev.0.50. + * : 10.10.2023 0.03 Removed unimplemented registers. + * : 13.11.2023 0.04 Added setting table for CCI MPU GID register. + * : 11.01.2024 0.05 Updated writing privilege to System RAM. + * Fixed setting value of read/write permissions + * for RT-VRAM1 area2. + * Update Region ID settings. + * The divided areas of SDRAM have been changed. + * : 17.07.2024 0.06 Removed FDT_PAP in g_fdt_tbl. + * : 11.10.2024 0.07 Updated Region ID and RAM protection setting + * for QNX. + * : 12.11.2024 0.08 Updated AXI timeout setting value. + * : 05.12.2024 0.09 Update RAM protection settings for ICCOM + * memory area (SDRAM Area5). + * Update Region ID settings for VSPD and VSPX. + * Update Region ID settings for IPMMU. + * : 16.12.2024 0.10 Updated Region ID setting. + * Updated Region ID setting and RAM protection + * setting for booting CR52 3 cores. + * Updated AXI timeout setting value. + * Update Region ID settings for ISP ch1. + * Update Region ID settings for PCI1. + * Added IPMMU Region ID table. + * : 17.03.2025 0.11 Updated AXI timeout setting value. + * : 26.05.2025 0.12 Updated RAM protection settings for + * protection area. + * : 28.07.2025 0.13 Updated Region ID setting and + * AXI timeout setting value. + * : 03.09.2025 0.14 Added Region ID size table and + * updated Region ID setting table. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#define RTDMA_EN (0x00000002U) +#define SYSDMA_EN (0x00003FF4U) + +#pragma ghs section rodata=".qosbw_tbl" +/* not used for V4M */ +const QOS_SETTING_TABLE g_qosbw_tbl[] = {0}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".qoswt_tbl" +/* not used for V4M */ +const QOS_SETTING_TABLE g_qoswt_tbl[] = {0}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_size_tbl" +const REGION_ID_SIZE_TABLE g_rgid_size_tbl[] = { + [0] = {RGID_M_MAX}, /* RGIDM_SIZE */ + [1] = {RGID_R_MAX}, /* RGIDR_SIZE */ + [2] = {RGID_W_MAX}, /* RGIDW_SIZE */ + [3] = {RGID_SEC_MAX}, /* SEC_SIZE */ + [4] = {RGID_AXI_MAX}, /* AXI_SIZE */ + [5] = {RGID_GID_MAX}, /* GID_SIZE */ + [6] = {IPMMU_RGID_MAX}, /* IPMMU_SIZE */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_m_tbl" +const REGION_ID_SETTING_TABLE g_rgid_m_tbl[] = { + [0] = {0xE6581000U, 0x00000002U}, /* RGIDM_MODID[0]:PCI0 */ + [1] = {0xE6581020U, 0x00000002U}, /* RGIDM_MODID[1]:PCI1 */ + [2] = {0xE6581010U, 0x00000002U}, /* RGIDM_MODID[3]:AVB0 */ + [3] = {0xE6581014U, 0x00000001U}, /* RGIDM_MODID[4]:AVB1 */ + [4] = {0xE6581018U, 0x00000001U}, /* RGIDM_MODID[5]:AVB2 */ + [5] = {0xE662100CU, 0x00000000U}, /* RGIDM_MODID[6]:DCLS_ICUMX */ + [6] = {0xE6621010U, 0x00000000U}, /* RGIDM_MODID[7]:ICUMX */ + [7] = {0xE6621014U, 0x00000000U}, /* RGIDM_MODID[8]:SDMAC_ICUMX */ + [8] = {0xFFC41018U, 0x00000001U}, /* RGIDM_MODID[9]:CR52SS0 */ + [9] = {0xFFC4105CU, 0x00000001U}, /* RGIDM_MODID[10]:CR52SS1 */ + [10] = {0xFFC41060U, 0x00000006U}, /* RGIDM_MODID[11]:CR52SS2 */ + [11] = {0xFFC4101CU, 0x00000003U}, /* RGIDM_MODID[12]:CSD */ + [12] = {0xFFC41024U, 0x00000002U}, /* RGIDM_MODID[13]:INTAP0 */ + [13] = {0xFF861018U, 0x00000002U}, /* RGIDM_MODID[14]:FBABUSTOP0 */ + [14] = {0xE7751020U, 0x00000002U}, /* RGIDM_MODID[15]:SDHI0 */ + [15] = {0xE7751010U, 0x00000001U}, /* RGIDM_MODID[16]:FRAY */ + [16] = {0xFF811000U, 0x00000002U}, /* RGIDM_MODID[17]:AXMM2AXSTM */ + [17] = {0xFF811004U, 0x00000003U}, /* RGIDM_MODID[18]:CSDE0 */ + [18] = {0xFF811008U, 0x00000003U}, /* RGIDM_MODID[19]:CSDE1 */ + [19] = {0xFFC41020U, 0x00000003U}, /* RGIDM_MODID[20]:CSDE2 */ + [20] = {0xFF881004U, 0x00000002U}, /* RGIDM_MODID[21]:FBABUSIR0 */ + [21] = {0xFF881008U, 0x00000002U}, /* RGIDM_MODID[22]:FBABUSIR1 */ + [22] = {0xFF88100CU, 0x00000002U}, /* RGIDM_MODID[23]:FBABUSIR2 */ + [23] = {0xFF881010U, 0x00000002U}, /* RGIDM_MODID[24]:FBABUSIR3 */ + [24] = {0xFD811014U, 0x00000002U}, /* RGIDM_MODID[25]:RGX0 */ + [25] = {0xFE681004U, 0x00000002U}, /* RGIDM_MODID[26]:FBABUSVC */ + [26] = {0xFE681010U, 0x00000002U}, /* RGIDM_MODID[27]:IMR00 */ + [27] = {0xFE681014U, 0x00000002U}, /* RGIDM_MODID[28]:IMR01 */ + [28] = {0xFE681024U, 0x00000002U}, /* RGIDM_MODID[29]:IMR10 */ + [29] = {0xFE681028U, 0x00000002U}, /* RGIDM_MODID[30]:IMR11 */ + [30] = {0xFE681040U, 0x00000002U}, /* RGIDM_MODID[31]:IMS0 */ + [31] = {0xFE681044U, 0x00000002U}, /* RGIDM_MODID[32]:IMS1 */ + [32] = {0xFE681048U, 0x00000005U}, /* RGIDM_MODID[33]:IV1ES */ + [33] = {0xFEBE1000U, 0x00000002U}, /* RGIDM_MODID[34]:DSITLINK0 */ + [34] = {0xFEBE1008U, 0x00000002U}, /* RGIDM_MODID[36]:FBABUSVIO */ + [35] = {0xFEBE1014U, 0x00000002U}, /* RGIDM_MODID[37]:FCPVD0 */ + [36] = {0xFEBE101CU, 0x00000002U}, /* RGIDM_MODID[38]:FCPVX0 */ + [37] = {0xFEBF1020U, 0x00000002U}, /* RGIDM_MODID[39]:ISP00 */ + [38] = {0xFEBF1024U, 0x00000002U}, /* RGIDM_MODID[40]:ISP01 */ + [39] = {0xFEBF1000U, 0x00000002U}, /* RGIDM_MODID[41]:ISP02 */ + [40] = {0xFEBF1004U, 0x00000002U}, /* RGIDM_MODID[42]:ISP03 */ + [41] = {0xFEBF1008U, 0x00000002U}, /* RGIDM_MODID[43]:ISP04 */ + [42] = {0xFEBF1010U, 0x00000002U}, /* RGIDM_MODID[44]:VIN0 */ + [43] = {0xFEBF1014U, 0x00000002U}, /* RGIDM_MODID[45]:VIN1 */ + [44] = {0xE7B11004U, 0x00000002U}, /* RGIDM_MODID[46]:FBABUSVIP0 */ + [45] = {0xE7B11010U, 0x00000002U}, /* RGIDM_MODID[47]:SMPO */ + [46] = {0xE7B11018U, 0x00000002U}, /* RGIDM_MODID[48]:SMPS */ + [47] = {0xE7B1101CU, 0x00000002U}, /* RGIDM_MODID[49]:UMFL */ + [48] = {0xFF881018U, 0x00000002U}, /* RGIDM_MODID[50]:DSP00 */ + [49] = {0xFF881024U, 0x00000002U}, /* RGIDM_MODID[51]:DSP01 */ + [50] = {0xFF881038U, 0x00000002U}, /* RGIDM_MODID[52]:DSP10 */ + [51] = {0xFF881044U, 0x00000002U}, /* RGIDM_MODID[53]:DSP11 */ + [52] = {0xFF881048U, 0x00000002U}, /* RGIDM_MODID[54]:DSP20 */ + [53] = {0xFF88104CU, 0x00000002U}, /* RGIDM_MODID[55]:DSP21 */ + [54] = {0xFF881050U, 0x00000002U}, /* RGIDM_MODID[56]:DSP30 */ + [55] = {0xFF881054U, 0x00000002U}, /* RGIDM_MODID[57]:DSP31 */ + [56] = {0xFF881058U, 0x00000002U}, /* RGIDM_MODID[58]:IMP0R100 */ + [57] = {0xFF88105CU, 0x00000002U}, /* RGIDM_MODID[59]:IMP0R101 */ + [58] = {0xFF881060U, 0x00000002U}, /* RGIDM_MODID[60]:IMP0R102 */ + [59] = {0xFF881064U, 0x00000002U}, /* RGIDM_MODID[61]:IMP0R103 */ + [60] = {0xFF881068U, 0x00000002U}, /* RGIDM_MODID[62]:IMP0R104 */ + [61] = {0xFF88106CU, 0x00000002U}, /* RGIDM_MODID[63]:IMP0R105 */ + [62] = {0xFF881070U, 0x00000002U}, /* RGIDM_MODID[64]:IMP0R106 */ + [63] = {0xFF881074U, 0x00000002U}, /* RGIDM_MODID[65]:IMP0R107 */ + [64] = {0xFF881078U, 0x00000002U}, /* RGIDM_MODID[66]:IMP0R108 */ + [65] = {0xFF88107CU, 0x00000002U}, /* RGIDM_MODID[67]:IMP0R109 */ + [66] = {0xFF881080U, 0x00000002U}, /* RGIDM_MODID[68]:IMP0R200 */ + [67] = {0xFF881084U, 0x00000002U}, /* RGIDM_MODID[69]:IMP0R201 */ + [68] = {0xFF881088U, 0x00000002U}, /* RGIDM_MODID[70]:IMP0R202 */ + [69] = {0xFF88108CU, 0x00000002U}, /* RGIDM_MODID[71]:IMP0W100 */ + [70] = {0xFF881090U, 0x00000002U}, /* RGIDM_MODID[72]:IMP0W101 */ + [71] = {0xFF881094U, 0x00000002U}, /* RGIDM_MODID[73]:IMP0W102 */ + [72] = {0xFF881098U, 0x00000002U}, /* RGIDM_MODID[74]:IMP0W103 */ + [73] = {0xFF88109CU, 0x00000002U}, /* RGIDM_MODID[75]:IMP0W104 */ + [74] = {0xFF8810A0U, 0x00000002U}, /* RGIDM_MODID[76]:IMP0W105 */ + [75] = {0xFF8810A4U, 0x00000002U}, /* RGIDM_MODID[77]:IMP0W106 */ + [76] = {0xFF8810A8U, 0x00000002U}, /* RGIDM_MODID[78]:IMP0W107 */ + [77] = {0xFF8810ACU, 0x00000002U}, /* RGIDM_MODID[79]:IMP0W108 */ + [78] = {0xFF8810B0U, 0x00000002U}, /* RGIDM_MODID[80]:IMP0W109 */ + [79] = {0xFF8810B4U, 0x00000002U}, /* RGIDM_MODID[81]:IMP0W200 */ + [80] = {0xFF8810B8U, 0x00000002U}, /* RGIDM_MODID[82]:IMP0W201 */ + [81] = {0xFF8810BCU, 0x00000002U}, /* RGIDM_MODID[83]:IMP0W202 */ + [82] = {0xE67BF500U, 0x0000000EU}, /* RGIDM_MODID[84]:VRAM_R */ + [83] = {0xE67BF504U, 0x0000000EU}, /* RGIDM_MODID[85]:VRAM_W */ + [84] = {0xE7B11008U, 0x00000002U}, /* RGIDM_MODID[86]:PAP */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_r_tbl" +const REGION_ID_SETTING_TABLE g_rgid_r_tbl[] = { + [0] = {0xFFC82000U, 0x0000000FU}, /* RGIDR_MODID[0]:ARMGC0*/ + [1] = {0xFFC82004U, 0x0000000FU}, /* RGIDR_MODID[1]:ARMGC1*/ + [2] = {0xFFC82008U, 0x00000000U}, /* RGIDR_MODID[2]:ARMGC2*/ + [3] = {0xFFC8200CU, 0x0000000FU}, /* RGIDR_MODID[3]:ARRT00*/ + /* After setting */ /* RGIDR_MODID[4]:ARRT01*/ + /* After setting */ /* RGIDR_MODID[5]:ARRT02*/ + [4] = {0xFFC82018U, 0x0000000FU}, /* RGIDR_MODID[6]:ARRT03*/ + [5] = {0xFFC8201CU, 0x0000000FU}, /* RGIDR_MODID[7]:ARRT04*/ + [6] = {0xFFC82020U, 0x0000000FU}, /* RGIDR_MODID[8]:ARRT05*/ + [7] = {0xFFC82024U, 0x0000000FU}, /* RGIDR_MODID[9]:ARRT06*/ + [8] = {0xFFC82028U, 0x0000000FU}, /* RGIDR_MODID[10]:ARRT07*/ + [9] = {0xFFC8202CU, 0x00000000U}, /* RGIDR_MODID[11]:ARRT08*/ + [10] = {0xFFC82030U, 0x00000001U}, /* RGIDR_MODID[12]:LIFEC0*/ + [11] = {0xFFC82034U, 0x0000000EU}, /* RGIDR_MODID[13]:SWDT*/ + [12] = {0xFFC82038U, 0x0000006EU}, /* RGIDR_MODID[14]:TMU0*/ + [13] = {0xFFC8203CU, 0x0000000EU}, /* RGIDR_MODID[15]:WDT*/ + [14] = {0xFFC82040U, 0x0000000EU}, /* RGIDR_MODID[16]:WWDT0*/ + [15] = {0xFFC82044U, 0x0000000EU}, /* RGIDR_MODID[17]:WWDT1*/ + [16] = {0xFFC82048U, 0x0000000EU}, /* RGIDR_MODID[18]:WWDT2*/ + [17] = {0xFFC8204CU, 0x0000000EU}, /* RGIDR_MODID[19]:WWDT3*/ + [18] = {0xFFC82050U, 0x0000000EU}, /* RGIDR_MODID[20]:WWDT4*/ + [19] = {0xFFC82054U, 0x0000000EU}, /* RGIDR_MODID[21]:WWDT5*/ + [20] = {0xFFC82058U, 0x0000000EU}, /* RGIDR_MODID[22]:WWDT6*/ + [21] = {0xFFC82068U, 0x0000000FU}, /* RGIDR_MODID[23]:ECMRT3*/ + [22] = {0xE6002004U, 0x0000000FU}, /* RGIDR_MODID[24]:APMU0*/ + [23] = {0xE6002008U, 0x00000002U}, /* RGIDR_MODID[25]:APMU1*/ + [24] = {0xE600200CU, 0x00000000U}, /* RGIDR_MODID[26]:APMU10*/ + [25] = {0xE6002010U, 0x00000000U}, /* RGIDR_MODID[27]:APMU11*/ + [26] = {0xE6002014U, 0x00000000U}, /* RGIDR_MODID[28]:APMU12*/ + [27] = {0xE6002018U, 0x00000000U}, /* RGIDR_MODID[29]:APMU13*/ + [28] = {0xE600201CU, 0x00000000U}, /* RGIDR_MODID[30]:APMU14*/ + [29] = {0xE6002020U, 0x00000000U}, /* RGIDR_MODID[31]:APMU15*/ + [30] = {0xE6002024U, 0x00000004U}, /* RGIDR_MODID[32]:APMU2*/ + [31] = {0xE6002028U, 0x00000004U}, /* RGIDR_MODID[33]:APMU3*/ + [32] = {0xE600202CU, 0x00000000U}, /* RGIDR_MODID[34]:APMU4*/ + [33] = {0xE6002030U, 0x00000000U}, /* RGIDR_MODID[35]:APMU5*/ + [34] = {0xE6002034U, 0x00000000U}, /* RGIDR_MODID[36]:APMU6*/ + [35] = {0xE6002038U, 0x00000000U}, /* RGIDR_MODID[37]:APMU7*/ + [36] = {0xE600203CU, 0x00000000U}, /* RGIDR_MODID[38]:APMU8*/ + [37] = {0xE6002040U, 0x00000000U}, /* RGIDR_MODID[39]:APMU9*/ + [38] = {0xE6002044U, 0x0000000FU}, /* RGIDR_MODID[40]:ARS00*/ + /* After setting */ /* RGIDR_MODID[41]:ARS01*/ + /* After setting */ /* RGIDR_MODID[42]:ARS02*/ + [39] = {0xE6002050U, 0x0000000FU}, /* RGIDR_MODID[43]:ARS03*/ + [40] = {0xE6002054U, 0x0000000FU}, /* RGIDR_MODID[44]:ARS04*/ + [41] = {0xE6002058U, 0x0000000FU}, /* RGIDR_MODID[45]:ARS05*/ + [42] = {0xE600205CU, 0x0000000FU}, /* RGIDR_MODID[46]:ARS06*/ + [43] = {0xE6002060U, 0x0000000FU}, /* RGIDR_MODID[47]:ARS07*/ + [44] = {0xE6002064U, 0x00000000U}, /* RGIDR_MODID[48]:ARS08*/ + [45] = {0xE6002068U, 0x0000000EU}, /* RGIDR_MODID[49]:CMT0*/ + [46] = {0xE600206CU, 0x0000000EU}, /* RGIDR_MODID[50]:CMT1*/ + [47] = {0xE6002070U, 0x0000000EU}, /* RGIDR_MODID[51]:CMT2*/ + [48] = {0xE6002074U, 0x0000000EU}, /* RGIDR_MODID[52]:CMT3*/ + [49] = {0xE6002078U, 0x0000000AU}, /* RGIDR_MODID[53]:CKM*/ + [50] = {0xE600207CU, 0x0000000EU}, /* RGIDR_MODID[54]:DBE*/ + [51] = {0xE6002080U, 0x0000000EU}, /* RGIDR_MODID[55]:IRQC*/ + [52] = {0xE6002084U, 0x0000000FU}, /* RGIDR_MODID[56]:ECMPS0*/ + [53] = {0xE6002088U, 0x0000000BU}, /* RGIDR_MODID[57]:OTP0*/ + [54] = {0xE600208CU, 0x0000000FU}, /* RGIDR_MODID[58]:OTP1*/ + [55] = {0xE600209CU, 0x0000000EU}, /* RGIDR_MODID[59]:SCMT*/ + [56] = {0xE60020A8U, 0x0000004EU}, /* RGIDR_MODID[60]:TSC1*/ + [57] = {0xE60020ACU, 0x0000004EU}, /* RGIDR_MODID[61]:TSC2*/ + [58] = {0xE60020B8U, 0x00000006U}, /* RGIDR_MODID[62]:UCMT*/ + [59] = {0xE6002100U, 0x0000006FU}, /* RGIDR_MODID[63]:CPG0*/ + [60] = {0xE6002104U, 0x0000000AU}, /* RGIDR_MODID[64]:CPG1*/ + [61] = {0xE6002108U, 0x0000004EU}, /* RGIDR_MODID[65]:CPG2*/ + [62] = {0xE600210CU, 0x00000028U}, /* RGIDR_MODID[66]:CPG3*/ + [63] = {0xE6002110U, 0x0000006FU}, /* RGIDR_MODID[67]:PFC00*/ + [64] = {0xE6002114U, 0x0000000AU}, /* RGIDR_MODID[68]:PFC01*/ + [65] = {0xE6002118U, 0x0000004EU}, /* RGIDR_MODID[69]:PFC02*/ + [66] = {0xE600211CU, 0x00000028U}, /* RGIDR_MODID[70]:PFC03*/ + [67] = {0xE6002120U, 0x0000006FU}, /* RGIDR_MODID[71]:PFC10*/ + [68] = {0xE6002124U, 0x0000000AU}, /* RGIDR_MODID[72]:PFC11*/ + [69] = {0xE6002128U, 0x0000004EU}, /* RGIDR_MODID[73]:PFC12*/ + [70] = {0xE600212CU, 0x00000028U}, /* RGIDR_MODID[74]:PFC13*/ + [71] = {0xE6002130U, 0x0000006FU}, /* RGIDR_MODID[75]:PFC20*/ + [72] = {0xE6002134U, 0x0000000AU}, /* RGIDR_MODID[76]:PFC21*/ + [73] = {0xE6002138U, 0x0000004EU}, /* RGIDR_MODID[77]:PFC22*/ + [74] = {0xE600213CU, 0x00000028U}, /* RGIDR_MODID[78]:PFC23*/ + [75] = {0xE6002150U, 0x0000006FU}, /* RGIDR_MODID[79]:PFCS0*/ + [76] = {0xE6002154U, 0x0000000AU}, /* RGIDR_MODID[80]:PFCS1*/ + [77] = {0xE6002158U, 0x0000004EU}, /* RGIDR_MODID[81]:PFCS2*/ + [78] = {0xE600215CU, 0x00000028U}, /* RGIDR_MODID[82]:PFCS3*/ + [79] = {0xE6002160U, 0x0000006FU}, /* RGIDR_MODID[83]:RESET0*/ + [80] = {0xE6002164U, 0x0000000AU}, /* RGIDR_MODID[84]:RESET1*/ + [81] = {0xE6002168U, 0x0000004EU}, /* RGIDR_MODID[85]:RESET2*/ + [82] = {0xE600216CU, 0x00000028U}, /* RGIDR_MODID[86]:RESET3*/ + [83] = {0xE6002170U, 0x0000006FU}, /* RGIDR_MODID[87]:SYS0*/ + [84] = {0xE6002174U, 0x0000000AU}, /* RGIDR_MODID[88]:SYS1*/ + [85] = {0xE6002178U, 0x0000004EU}, /* RGIDR_MODID[89]:SYS2*/ + [86] = {0xE600217CU, 0x00000028U}, /* RGIDR_MODID[90]:SYS3*/ + [87] = {0xE7762000U, 0x0000000EU}, /* RGIDR_MODID[91]:DMAMSI0*/ + [88] = {0xE7762004U, 0x0000000EU}, /* RGIDR_MODID[92]:DMAMSI1*/ + [89] = {0xE7762008U, 0x0000000EU}, /* RGIDR_MODID[93]:DMAMSI2*/ + [90] = {0xE776200CU, 0x0000000EU}, /* RGIDR_MODID[94]:DMAMSI3*/ + [91] = {0xE7762010U, 0x0000000EU}, /* RGIDR_MODID[95]:DMAMSI4*/ + [92] = {0xE7762014U, 0x0000000EU}, /* RGIDR_MODID[96]:DMAMSI5*/ + [93] = {0xE7762018U, 0x0000000FU}, /* RGIDR_MODID[97]:ECMSP3*/ + [94] = {0xE7762024U, 0x0000000FU}, /* RGIDR_MODID[98]:ARSP30*/ + /* After setting */ /* RGIDR_MODID[99]:ARSP31*/ + /* After setting */ /* RGIDR_MODID[100]:ARSP32*/ + [95] = {0xE7762030U, 0x0000000FU}, /* RGIDR_MODID[101]:ARSP33*/ + [96] = {0xE7762034U, 0x0000000FU}, /* RGIDR_MODID[102]:ARSP34*/ + [97] = {0xE7762038U, 0x0000000FU}, /* RGIDR_MODID[103]:ARSP35*/ + [98] = {0xE776203CU, 0x0000000FU}, /* RGIDR_MODID[104]:ARSP36*/ + [99] = {0xE7762040U, 0x0000000FU}, /* RGIDR_MODID[105]:ARSP37*/ + [100] = {0xE7762044U, 0x00000000U}, /* RGIDR_MODID[106]:ARSP38*/ + [101] = {0xE7762048U, 0x0000000EU}, /* RGIDR_MODID[107]:MSI0*/ + [102] = {0xE776204CU, 0x0000000EU}, /* RGIDR_MODID[108]:MSI1*/ + [103] = {0xE7762050U, 0x0000000EU}, /* RGIDR_MODID[109]:MSI2*/ + [104] = {0xE7762054U, 0x0000000EU}, /* RGIDR_MODID[110]:MSI3*/ + [105] = {0xE7762058U, 0x0000000EU}, /* RGIDR_MODID[111]:MSI4*/ + [106] = {0xE776205CU, 0x0000000EU}, /* RGIDR_MODID[112]:MSI5*/ + [107] = {0xE7792000U, 0x0000000FU}, /* RGIDR_MODID[113]:ARSP40*/ + /* After setting */ /* RGIDR_MODID[114]:ARSP41*/ + /* After setting */ /* RGIDR_MODID[115]:ARSP42*/ + [108] = {0xE779200CU, 0x0000000FU}, /* RGIDR_MODID[116]:ARSP43*/ + [109] = {0xE7792010U, 0x0000000FU}, /* RGIDR_MODID[117]:ARSP44*/ + [110] = {0xE7792014U, 0x0000000FU}, /* RGIDR_MODID[118]:ARSP45*/ + [111] = {0xE7792018U, 0x0000000FU}, /* RGIDR_MODID[119]:ARSP46*/ + [112] = {0xE779201CU, 0x0000000FU}, /* RGIDR_MODID[120]:ARSP47*/ + [113] = {0xE7792020U, 0x00000000U}, /* RGIDR_MODID[121]:ARSP48*/ + [114] = {0xE7792024U, 0x0000004FU}, /* RGIDR_MODID[122]:DMAHSCIF0*/ + [115] = {0xE7792028U, 0x0000004FU}, /* RGIDR_MODID[123]:DMAHSCIF1*/ + [116] = {0xE779202CU, 0x0000004FU}, /* RGIDR_MODID[124]:DMAHSCIF2*/ + [117] = {0xE7792030U, 0x0000004FU}, /* RGIDR_MODID[125]:DMAHSCIF3*/ + [118] = {0xE7792034U, 0x0000004FU}, /* RGIDR_MODID[126]:DMASCIF0*/ + [119] = {0xE7792038U, 0x0000004FU}, /* RGIDR_MODID[127]:DMASCIF1*/ + [120] = {0xE779203CU, 0x0000004FU}, /* RGIDR_MODID[128]:DMASCIF3*/ + [121] = {0xE7792040U, 0x0000004FU}, /* RGIDR_MODID[129]:DMASCIF4*/ + [122] = {0xE7792044U, 0x0000000FU}, /* RGIDR_MODID[130]:ECMSP4*/ + [123] = {0xE7792048U, 0x0000004FU}, /* RGIDR_MODID[131]:HSCIF0*/ + [124] = {0xE779204CU, 0x0000004FU}, /* RGIDR_MODID[132]:HSCIF1*/ + [125] = {0xE7792050U, 0x0000004FU}, /* RGIDR_MODID[133]:HSCIF2*/ + [126] = {0xE7792054U, 0x0000004FU}, /* RGIDR_MODID[134]:HSCIF3*/ + [127] = {0xE7792058U, 0x0000004FU}, /* RGIDR_MODID[135]:SCIF0*/ + [128] = {0xE779205CU, 0x0000004FU}, /* RGIDR_MODID[136]:SCIF1*/ + [129] = {0xE7792060U, 0x0000004FU}, /* RGIDR_MODID[137]:SCIF3*/ + [130] = {0xE7792064U, 0x0000004FU}, /* RGIDR_MODID[138]:SCIF4*/ + [131] = {0xE7792068U, 0x0000006EU}, /* RGIDR_MODID[139]:TMU1*/ + [132] = {0xE779206CU, 0x0000006EU}, /* RGIDR_MODID[140]:TMU2*/ + [133] = {0xE7792070U, 0x0000006EU}, /* RGIDR_MODID[141]:TMU3*/ + [134] = {0xE7792074U, 0x0000006EU}, /* RGIDR_MODID[142]:TMU4*/ + [135] = {0xE7792078U, 0x0000004AU}, /* RGIDR_MODID[143]:CANFD*/ + [136] = {0xE779207CU, 0x0000004AU}, /* RGIDR_MODID[144]:DMACANFD*/ + [137] = {0xE7792080U, 0x00000002U}, /* RGIDR_MODID[145]:DMATPU0*/ + [138] = {0xE7792084U, 0x00000002U}, /* RGIDR_MODID[146]:PWM0*/ + [139] = {0xE7792088U, 0x00000002U}, /* RGIDR_MODID[147]:PWM1*/ + [140] = {0xE779208CU, 0x00000002U}, /* RGIDR_MODID[148]:PWM2*/ + [141] = {0xE7792090U, 0x00000002U}, /* RGIDR_MODID[149]:PWM3*/ + [142] = {0xE7792094U, 0x00000002U}, /* RGIDR_MODID[150]:PWM4*/ + [143] = {0xE77920ACU, 0x00000002U}, /* RGIDR_MODID[151]:TPU0*/ + [144] = {0xFEBD2000U, 0x0000000FU}, /* RGIDR_MODID[152]:ARVI40*/ + /* After setting */ /* RGIDR_MODID[153]:ARVI41*/ + /* After setting */ /* RGIDR_MODID[154]:ARVI42*/ + [145] = {0xFEBD200CU, 0x0000000FU}, /* RGIDR_MODID[155]:ARVI43*/ + [146] = {0xFEBD2010U, 0x0000000FU}, /* RGIDR_MODID[156]:ARVI44*/ + [147] = {0xFEBD2014U, 0x0000000FU}, /* RGIDR_MODID[157]:ARVI45*/ + [148] = {0xFEBD2018U, 0x0000000FU}, /* RGIDR_MODID[158]:ARVI46*/ + [149] = {0xFEBD201CU, 0x0000000FU}, /* RGIDR_MODID[159]:ARVI47*/ + [150] = {0xFEBD2020U, 0x00000000U}, /* RGIDR_MODID[160]:ARVI48*/ + [151] = {0xFEBD2024U, 0x0000000FU}, /* RGIDR_MODID[161]:DIS0*/ + [152] = {0xFEBD2030U, 0x0000000FU}, /* RGIDR_MODID[162]:ECMVIO2*/ + [153] = {0xFEBD2034U, 0x0000000FU}, /* RGIDR_MODID[163]:FCPVD0*/ + [154] = {0xFEBD203CU, 0x0000004EU}, /* RGIDR_MODID[164]:VSPD0*/ + [155] = {0xE6582000U, 0x0000000AU}, /* RGIDR_MODID[165]:CKMHSC*/ + [156] = {0xE6582004U, 0x0000000CU}, /* RGIDR_MODID[166]:AXIPCI001*/ + [157] = {0xE6582008U, 0x0000000CU}, /* RGIDR_MODID[167]:AXIPCI002*/ + [158] = {0xE658200CU, 0x0000000CU}, /* RGIDR_MODID[168]:AXIPCI003*/ + [159] = {0xE6582014U, 0x0000000CU}, /* RGIDR_MODID[169]:AXIPCI005*/ + [160] = {0xE6582018U, 0x0000000CU}, /* RGIDR_MODID[170]:AXIPCI006*/ + [161] = {0xE658201CU, 0x0000000CU}, /* RGIDR_MODID[171]:AXIPCI007*/ + [162] = {0xE6582020U, 0x0000000CU}, /* RGIDR_MODID[172]:AXIPCI008*/ + [163] = {0xE6582024U, 0x0000000CU}, /* RGIDR_MODID[173]:AXIPCI009*/ + [164] = {0xE6582028U, 0x0000000CU}, /* RGIDR_MODID[174]:AXIPCI010*/ + [165] = {0xE658202CU, 0x0000000CU}, /* RGIDR_MODID[175]:AXIPCI011*/ + [166] = {0xE6582030U, 0x0000000CU}, /* RGIDR_MODID[176]:AXIPCI012*/ + [167] = {0xE6582034U, 0x0000000CU}, /* RGIDR_MODID[177]:AXIPCI013*/ + [168] = {0xE6582038U, 0x0000000CU}, /* RGIDR_MODID[178]:AXIPCI014*/ + [169] = {0xE658203CU, 0x0000000CU}, /* RGIDR_MODID[179]:AXIPCI015*/ + [170] = {0xE6582084U, 0x0000000EU}, /* RGIDR_MODID[180]:GPTP*/ + [171] = {0xE6582088U, 0x0000004EU}, /* RGIDR_MODID[181]:IPMMUHC00*/ + [172] = {0xE65820F4U, 0x0000000CU}, /* RGIDR_MODID[182]:AXIPCI000*/ + [173] = {0xE65820F8U, 0x0000000CU}, /* RGIDR_MODID[183]:AXIPCI004*/ + [174] = {0xE65820FCU, 0x0000004EU}, /* RGIDR_MODID[184]:IPMMUHC01*/ + [175] = {0xE6582100U, 0x0000004EU}, /* RGIDR_MODID[185]:AVB0*/ + [176] = {0xE6582104U, 0x0000004EU}, /* RGIDR_MODID[186]:AVB1*/ + [177] = {0xE6582108U, 0x0000004EU}, /* RGIDR_MODID[187]:AVB2*/ + [178] = {0xE658210CU, 0x0000004EU}, /* RGIDR_MODID[188]:IPMMUHC10*/ + [179] = {0xE6582110U, 0x0000004EU}, /* RGIDR_MODID[189]:IPMMUHC11*/ + [180] = {0xE6582114U, 0x0000004EU}, /* RGIDR_MODID[190]:IPMMUHC12*/ + [181] = {0xE6582118U, 0x0000004EU}, /* RGIDR_MODID[191]:IPMMUHC13*/ + [182] = {0xE658211CU, 0x0000000CU}, /* RGIDR_MODID[192]:PPHY0*/ + [183] = {0xE6582124U, 0x0000004EU}, /* RGIDR_MODID[193]:IPMMUHC14*/ + [184] = {0xE6582128U, 0x0000004EU}, /* RGIDR_MODID[194]:IPMMUHC15*/ + [185] = {0xE658212CU, 0x0000000EU}, /* RGIDR_MODID[195]:FBAHSC*/ + [186] = {0xE6582130U, 0x0000004EU}, /* RGIDR_MODID[196]:IPMMUHC02*/ + [187] = {0xE6582138U, 0x0000000FU}, /* RGIDR_MODID[197]:ECMHSC*/ + [188] = {0xE658213CU, 0x0000000FU}, /* RGIDR_MODID[198]:ARHC0*/ + /* After setting */ /* RGIDR_MODID[199]:ARHC1*/ + /* After setting */ /* RGIDR_MODID[200]:ARHC2*/ + [189] = {0xE6582148U, 0x0000000FU}, /* RGIDR_MODID[201]:ARHC3*/ + [190] = {0xE658214CU, 0x0000000FU}, /* RGIDR_MODID[202]:ARHC4*/ + [191] = {0xE6582150U, 0x0000000FU}, /* RGIDR_MODID[203]:ARHC5*/ + [192] = {0xE6582154U, 0x0000000FU}, /* RGIDR_MODID[204]:ARHC6*/ + [193] = {0xE6582158U, 0x0000000FU}, /* RGIDR_MODID[205]:ARHC7*/ + [194] = {0xE658215CU, 0x00000000U}, /* RGIDR_MODID[206]:ARHC8*/ + [195] = {0xE6582160U, 0x0000004EU}, /* RGIDR_MODID[207]:IPMMUHC03*/ + [196] = {0xE6582164U, 0x0000004EU}, /* RGIDR_MODID[208]:IPMMUHC04*/ + [197] = {0xE6582168U, 0x0000004EU}, /* RGIDR_MODID[209]:IPMMUHC05*/ + [198] = {0xE658216CU, 0x0000004EU}, /* RGIDR_MODID[210]:IPMMUHC06*/ + [199] = {0xE6582170U, 0x0000004EU}, /* RGIDR_MODID[211]:IPMMUHC07*/ + [200] = {0xE6582174U, 0x0000004EU}, /* RGIDR_MODID[212]:IPMMUHC08*/ + [201] = {0xE6582178U, 0x0000004EU}, /* RGIDR_MODID[213]:IPMMUHC09*/ + [202] = {0xFF882000U, 0x0000000FU}, /* RGIDR_MODID[214]:ARIMP00*/ + /* After setting */ /* RGIDR_MODID[215]:ARIMP01*/ + /* After setting */ /* RGIDR_MODID[216]:ARIMP02*/ + [203] = {0xFF88200CU, 0x0000000FU}, /* RGIDR_MODID[217]:ARIMP03*/ + [204] = {0xFF882010U, 0x0000000FU}, /* RGIDR_MODID[218]:ARIMP04*/ + [205] = {0xFF882014U, 0x0000004EU}, /* RGIDR_MODID[219]:AXIFBABUSIR0*/ + [206] = {0xFF882018U, 0x0000004EU}, /* RGIDR_MODID[220]:AXIFBABUSIR1*/ + [207] = {0xFF88201CU, 0x0000004EU}, /* RGIDR_MODID[221]:AXIFBABUSIR2*/ + [208] = {0xFF882020U, 0x0000004EU}, /* RGIDR_MODID[222]:AXIFBABUSIR3*/ + [209] = {0xFF882028U, 0x0000004EU}, /* RGIDR_MODID[223]:AXIIMP0*/ + [210] = {0xFF882034U, 0x0000000FU}, /* RGIDR_MODID[224]:ARIMP05*/ + [211] = {0xFF882038U, 0x0000000FU}, /* RGIDR_MODID[225]:ARIMP06*/ + [212] = {0xFF88203CU, 0x0000000FU}, /* RGIDR_MODID[226]:ARIMP07*/ + [213] = {0xFF882040U, 0x00000000U}, /* RGIDR_MODID[227]:ARIMP08*/ + [214] = {0xFF882048U, 0x0000000FU}, /* RGIDR_MODID[228]:ECMIR*/ + [215] = {0xFF88204CU, 0x0000000FU}, /* RGIDR_MODID[229]:DSPPS*/ + [216] = {0xFF882050U, 0x0000004EU}, /* RGIDR_MODID[230]:IPMMUIR1*/ + [217] = {0xFF882054U, 0x0000004EU}, /* RGIDR_MODID[231]:IPMMUIR0*/ + [218] = {0xFF882058U, 0x0000004EU}, /* RGIDR_MODID[232]:IPMMUIR10*/ + [219] = {0xFF88205CU, 0x0000004EU}, /* RGIDR_MODID[233]:IPMMUIR11*/ + [220] = {0xFF882060U, 0x0000004EU}, /* RGIDR_MODID[234]:IPMMUIR12*/ + [221] = {0xFF882064U, 0x0000004EU}, /* RGIDR_MODID[235]:IPMMUIR13*/ + [222] = {0xFF882068U, 0x0000004EU}, /* RGIDR_MODID[236]:IPMMUIR14*/ + [223] = {0xFF88206CU, 0x0000004EU}, /* RGIDR_MODID[237]:IPMMUIR15*/ + [224] = {0xFF882070U, 0x0000004EU}, /* RGIDR_MODID[238]:IPMMUIR2*/ + [225] = {0xFF882074U, 0x0000004EU}, /* RGIDR_MODID[239]:IPMMUIR3*/ + [226] = {0xFF882078U, 0x0000004EU}, /* RGIDR_MODID[240]:IPMMUIR4*/ + [227] = {0xFF88207CU, 0x0000004EU}, /* RGIDR_MODID[241]:IPMMUIR5*/ + [228] = {0xFF882080U, 0x0000004EU}, /* RGIDR_MODID[242]:IPMMUIR6*/ + [229] = {0xFF882084U, 0x0000004EU}, /* RGIDR_MODID[243]:IPMMUIR7*/ + [230] = {0xFF882088U, 0x0000004EU}, /* RGIDR_MODID[244]:IPMMUIR8*/ + [231] = {0xFF88208CU, 0x0000004EU}, /* RGIDR_MODID[245]:IPMMUIR9*/ + [232] = {0xFD812000U, 0x0000000FU}, /* RGIDR_MODID[246]:ARPV0*/ + /* After setting */ /* RGIDR_MODID[247]:ARPV1*/ + [233] = {0xFD812008U, 0x0000002CU}, /* RGIDR_MODID[248]:AXIRGXS*/ + /* After setting */ /* RGIDR_MODID[249]:ARPV2*/ + [234] = {0xFD812010U, 0x0000000FU}, /* RGIDR_MODID[250]:ARPV3*/ + [235] = {0xFD812014U, 0x0000000FU}, /* RGIDR_MODID[251]:ARPV4*/ + [236] = {0xFD812018U, 0x0000000FU}, /* RGIDR_MODID[252]:ARPV5*/ + [237] = {0xFD81201CU, 0x0000000FU}, /* RGIDR_MODID[253]:ARPV6*/ + [238] = {0xFD812020U, 0x0000000FU}, /* RGIDR_MODID[254]:ARPV7*/ + [239] = {0xFD812024U, 0x00000000U}, /* RGIDR_MODID[255]:ARPV8*/ + [240] = {0xFD81202CU, 0x0000000FU}, /* RGIDR_MODID[256]:ECM3DG*/ + [241] = {0xFD812030U, 0x0000000EU}, /* RGIDR_MODID[257]:FBAPVC*/ + [242] = {0xFD812034U, 0x0000000EU}, /* RGIDR_MODID[258]:FBAPVD0*/ + [243] = {0xFD812038U, 0x0000000EU}, /* RGIDR_MODID[259]:FBAPVD1*/ + [244] = {0xFD81203CU, 0x0000000EU}, /* RGIDR_MODID[260]:FBAPVD2*/ + [245] = {0xFD812040U, 0x0000000EU}, /* RGIDR_MODID[261]:FBAPVE*/ + [246] = {0xFD812044U, 0x0000004EU}, /* RGIDR_MODID[262]:IPMMUPV000*/ + [247] = {0xFD812048U, 0x0000004EU}, /* RGIDR_MODID[263]:IPMMUPV001*/ + [248] = {0xFD81204CU, 0x0000004EU}, /* RGIDR_MODID[264]:IPMMUPV010*/ + [249] = {0xFD812050U, 0x0000004EU}, /* RGIDR_MODID[265]:IPMMUPV011*/ + [250] = {0xFD812054U, 0x0000004EU}, /* RGIDR_MODID[266]:IPMMUPV012*/ + [251] = {0xFD812058U, 0x0000004EU}, /* RGIDR_MODID[267]:IPMMUPV013*/ + [252] = {0xFD81205CU, 0x0000004EU}, /* RGIDR_MODID[268]:IPMMUPV014*/ + [253] = {0xFD812060U, 0x0000004EU}, /* RGIDR_MODID[269]:IPMMUPV015*/ + [254] = {0xFD812064U, 0x0000004EU}, /* RGIDR_MODID[270]:IPMMUPV002*/ + [255] = {0xFD812068U, 0x0000004EU}, /* RGIDR_MODID[271]:IPMMUPV003*/ + [256] = {0xFD81206CU, 0x0000004EU}, /* RGIDR_MODID[272]:IPMMUPV004*/ + [257] = {0xFD812070U, 0x0000004EU}, /* RGIDR_MODID[273]:IPMMUPV005*/ + [258] = {0xFD812074U, 0x0000004EU}, /* RGIDR_MODID[274]:IPMMUPV006*/ + [259] = {0xFD812078U, 0x0000004EU}, /* RGIDR_MODID[275]:IPMMUPV007*/ + [260] = {0xFD81207CU, 0x0000004EU}, /* RGIDR_MODID[276]:IPMMUPV008*/ + [261] = {0xFD812080U, 0x0000004EU}, /* RGIDR_MODID[277]:IPMMUPV009*/ + [262] = {0xE6622000U, 0x0000000FU}, /* RGIDR_MODID[278]:ARRC0*/ + /* After setting */ /* RGIDR_MODID[279]:ARRC1*/ + /* After setting */ /* RGIDR_MODID[280]:ARRC2*/ + [263] = {0xE662200CU, 0x0000000FU}, /* RGIDR_MODID[281]:ARRC3*/ + [264] = {0xE6622010U, 0x0000000FU}, /* RGIDR_MODID[282]:ARRC4*/ + [265] = {0xE6622014U, 0x0000000FU}, /* RGIDR_MODID[283]:ARRC5*/ + [266] = {0xE6622018U, 0x0000000FU}, /* RGIDR_MODID[284]:ARRC6*/ + [267] = {0xE662201CU, 0x0000000FU}, /* RGIDR_MODID[285]:ARRC7*/ + [268] = {0xE6622020U, 0x00000000U}, /* RGIDR_MODID[286]:ARRC8*/ + [269] = {0xE6622028U, 0x0000004FU}, /* RGIDR_MODID[287]:ICUMX*/ + [270] = {0xE662202CU, 0x0000000FU}, /* RGIDR_MODID[288]:ECMRC*/ + [271] = {0xFFC32000U, 0x0000004EU}, /* RGIDR_MODID[289]:DMAWCRC0*/ + [272] = {0xFFC32004U, 0x0000004EU}, /* RGIDR_MODID[290]:DMAWCRC1*/ + [273] = {0xFFC32008U, 0x0000004EU}, /* RGIDR_MODID[291]:DMAWCRC2*/ + [274] = {0xFFC3200CU, 0x0000004EU}, /* RGIDR_MODID[292]:DMAWCRC3*/ + [275] = {0xFFC42000U, 0x0000000FU}, /* RGIDR_MODID[293]:ARMREG00*/ + [276] = {0xFFC42004U, 0x0000000DU}, /* RGIDR_MODID[294]:ARMREG01*/ + [277] = {0xFFC42008U, 0x00000000U}, /* RGIDR_MODID[295]:ARMREG10*/ + [278] = {0xFFC4200CU, 0x00000000U}, /* RGIDR_MODID[296]:ARMREG11*/ + [279] = {0xFFC42010U, 0x0000000BU}, /* RGIDR_MODID[297]:ARMREG12*/ + [280] = {0xFFC42014U, 0x0000000FU}, /* RGIDR_MODID[298]:ARMREG13*/ + [281] = {0xFFC42018U, 0x0000000BU}, /* RGIDR_MODID[299]:ARMREG14*/ + [282] = {0xFFC4201CU, 0x00000002U}, /* RGIDR_MODID[300]:AXICR52SS0*/ + [283] = {0xFFC42020U, 0x0000000EU}, /* RGIDR_MODID[301]:AXICSD0*/ + [284] = {0xFFC42024U, 0x0000000EU}, /* RGIDR_MODID[302]:AXIINTAP0*/ + [285] = {0xFFC4202CU, 0x00000009U}, /* RGIDR_MODID[303]:AXISECROM*/ + [286] = {0xFFC42030U, 0x0000000FU}, /* RGIDR_MODID[304]:AXISYSRAM0*/ + [287] = {0xFFC42034U, 0x0000004FU}, /* RGIDR_MODID[305]:AXISYSRAM1*/ + [288] = {0xFFC42038U, 0x00000000U}, /* RGIDR_MODID[306]:ARGREG15*/ + [289] = {0xFFC4203CU, 0x00000000U}, /* RGIDR_MODID[307]:ARMREG2*/ + [290] = {0xFFC42040U, 0x00000000U}, /* RGIDR_MODID[308]:ARMREG3*/ + [291] = {0xFFC42044U, 0x00000000U}, /* RGIDR_MODID[309]:ARMREG4*/ + [292] = {0xFFC42048U, 0x0000000FU}, /* RGIDR_MODID[310]:ARMREG5*/ + [293] = {0xFFC4204CU, 0x0000000FU}, /* RGIDR_MODID[311]:ARMREG6*/ + [294] = {0xFFC42050U, 0x00000000U}, /* RGIDR_MODID[312]:ARMREG7*/ + [295] = {0xFFC42054U, 0x0000000DU}, /* RGIDR_MODID[313]:ARMREG8*/ + [296] = {0xFFC42058U, 0x0000000DU}, /* RGIDR_MODID[314]:ARMREG9*/ + [297] = {0xFFC4205CU, 0x0000000FU}, /* RGIDR_MODID[315]:ARRD0*/ + /* After setting */ /* RGIDR_MODID[316]:ARRD1*/ + /* After setting */ /* RGIDR_MODID[317]:ARRD2*/ + [298] = {0xFFC42068U, 0x0000000FU}, /* RGIDR_MODID[318]:ARRD3*/ + [299] = {0xFFC4206CU, 0x0000000FU}, /* RGIDR_MODID[319]:ARRD4*/ + [300] = {0xFFC42070U, 0x0000000FU}, /* RGIDR_MODID[320]:ARRD5*/ + [301] = {0xFFC42074U, 0x0000000FU}, /* RGIDR_MODID[321]:ARRD6*/ + [302] = {0xFFC42078U, 0x0000000FU}, /* RGIDR_MODID[322]:ARRD7*/ + [303] = {0xFFC4207CU, 0x00000000U}, /* RGIDR_MODID[323]:ARRD8*/ + [304] = {0xFFC42080U, 0x0000000FU}, /* RGIDR_MODID[324]:ARRT0*/ + /* After setting */ /* RGIDR_MODID[325]:ARRT1*/ + /* After setting */ /* RGIDR_MODID[326]:ARRT2*/ + [305] = {0xFFC4208CU, 0x0000000FU}, /* RGIDR_MODID[327]:ARRT3*/ + [306] = {0xFFC42090U, 0x0000000FU}, /* RGIDR_MODID[328]:ARRT4*/ + [307] = {0xFFC42094U, 0x0000000FU}, /* RGIDR_MODID[329]:ARRT5*/ + [308] = {0xFFC42098U, 0x0000000FU}, /* RGIDR_MODID[330]:ARRT6*/ + [309] = {0xFFC4209CU, 0x0000000FU}, /* RGIDR_MODID[331]:ARRT7*/ + [310] = {0xFFC420A0U, 0x00000000U}, /* RGIDR_MODID[332]:ARRT8*/ + [311] = {0xFFC420A4U, 0x0000000AU}, /* RGIDR_MODID[333]:CKMRT*/ + [312] = {0xFFC420A8U, 0x0000004EU}, /* RGIDR_MODID[334]:CRC0*/ + [313] = {0xFFC420ACU, 0x0000004EU}, /* RGIDR_MODID[335]:CRC1*/ + [314] = {0xFFC420B0U, 0x0000004EU}, /* RGIDR_MODID[336]:CRC2*/ + [315] = {0xFFC420B4U, 0x0000004EU}, /* RGIDR_MODID[337]:CRC3*/ + [316] = {0xFFC420B8U, 0x0000000EU}, /* RGIDR_MODID[338]:CSD*/ + [317] = {0xFFC420BCU, 0x0000000FU}, /* RGIDR_MODID[339]:ECM*/ + [318] = {0xFFC420C0U, 0x0000000FU}, /* RGIDR_MODID[340]:ECMRT*/ + [319] = {0xFFC420C4U, 0x0000000EU}, /* RGIDR_MODID[341]:FBACR52*/ + [320] = {0xFFC420C8U, 0x0000000EU}, /* RGIDR_MODID[342]:FBART*/ + [321] = {0xFFC420CCU, 0x0000000EU}, /* RGIDR_MODID[343]:INTTP*/ + [322] = {0xFFC420D0U, 0x0000004EU}, /* RGIDR_MODID[344]:IPMMURT000*/ + [323] = {0xFFC420D4U, 0x0000004EU}, /* RGIDR_MODID[345]:IPMMURT100*/ + [324] = {0xFFC420D8U, 0x0000004EU}, /* RGIDR_MODID[346]:KCRC4*/ + [325] = {0xFFC420DCU, 0x0000004EU}, /* RGIDR_MODID[347]:KCRC5*/ + [326] = {0xFFC420E0U, 0x0000004EU}, /* RGIDR_MODID[348]:KCRC6*/ + [327] = {0xFFC420E4U, 0x0000004EU}, /* RGIDR_MODID[349]:KCRC7*/ + [328] = {0xFFC420E8U, 0x0000004FU}, /* RGIDR_MODID[350]:MFI00*/ + [329] = {0xFFC420ECU, 0x0000004EU}, /* RGIDR_MODID[351]:MFI01*/ + [330] = {0xFFC420F0U, 0x0000004EU}, /* RGIDR_MODID[352]:MFI10*/ + [331] = {0xFFC420F4U, 0x0000004EU}, /* RGIDR_MODID[353]:MFI02*/ + [332] = {0xFFC420F8U, 0x0000004EU}, /* RGIDR_MODID[354]:MFI03*/ + [333] = {0xFFC420FCU, 0x0000004EU}, /* RGIDR_MODID[355]:MFI04*/ + [334] = {0xFFC42100U, 0x00000000U}, /* RGIDR_MODID[356]:MFI05*/ + [335] = {0xFFC42104U, 0x00000000U}, /* RGIDR_MODID[357]:MFI06*/ + [336] = {0xFFC42108U, 0x00000000U}, /* RGIDR_MODID[358]:MFI07*/ + [337] = {0xFFC4210CU, 0x00000000U}, /* RGIDR_MODID[359]:MFI08*/ + [338] = {0xFFC42110U, 0x0000004EU}, /* RGIDR_MODID[360]:MFI09*/ + [339] = {0xFFC42114U, 0x0000004FU}, /* RGIDR_MODID[361]:MFI15*/ + [340] = {0xFFC42118U, 0x0000000AU}, /* RGIDR_MODID[362]:CKMCR52*/ + [341] = {0xFFC4211CU, 0x0000004BU}, /* RGIDR_MODID[363]:RTDM0P*/ + [342] = {0xFFC42120U, 0x0000000FU}, /* RGIDR_MODID[364]:ECMRD*/ + [343] = {0xFFC42124U, 0x0000004BU}, /* RGIDR_MODID[365]:RTDM1P*/ + [344] = {0xFFC42130U, 0x0000000BU}, /* RGIDR_MODID[366]:SYSRAM10*/ + [345] = {0xFFC42138U, 0x00000003U}, /* RGIDR_MODID[367]:SYSRAM00*/ + [346] = {0xFFC4213CU, 0x0000004EU}, /* RGIDR_MODID[368]:TSIPL0*/ + [347] = {0xFFC42140U, 0x0000004EU}, /* RGIDR_MODID[369]:TSIPL1*/ + [348] = {0xFFC42144U, 0x0000004EU}, /* RGIDR_MODID[370]:TSIPL2*/ + [349] = {0xFFC42148U, 0x0000004EU}, /* RGIDR_MODID[371]:TSIPL3*/ + [350] = {0xFFC4214CU, 0x0000004EU}, /* RGIDR_MODID[372]:TSIPL4*/ + [351] = {0xFFC42150U, 0x0000004EU}, /* RGIDR_MODID[373]:TSIPL5*/ + [352] = {0xFFC42154U, 0x0000004EU}, /* RGIDR_MODID[374]:TSIPL6*/ + [353] = {0xFFC42158U, 0x0000004EU}, /* RGIDR_MODID[375]:TSIPL7*/ + [354] = {0xFFC4215CU, 0x0000004EU}, /* RGIDR_MODID[376]:WCRC0*/ + [355] = {0xFFC42160U, 0x0000004EU}, /* RGIDR_MODID[377]:WCRC1*/ + [356] = {0xFFC42164U, 0x0000004EU}, /* RGIDR_MODID[378]:WCRC2*/ + [357] = {0xFFC42168U, 0x0000004EU}, /* RGIDR_MODID[379]:WCRC3*/ + [358] = {0xFFC42180U, 0x0000004EU}, /* RGIDR_MODID[380]:MFI11*/ + [359] = {0xFFC42184U, 0x00000000U}, /* RGIDR_MODID[381]:MFI12*/ + [360] = {0xFFC42188U, 0x00000000U}, /* RGIDR_MODID[382]:MFI13*/ + [361] = {0xFFC4218CU, 0x00000000U}, /* RGIDR_MODID[383]:MFI14*/ + [362] = {0xFFC42190U, 0x0000004EU}, /* RGIDR_MODID[384]:IPMMURT001*/ + [363] = {0xFFC42194U, 0x0000004EU}, /* RGIDR_MODID[385]:IPMMURT010*/ + [364] = {0xFFC42198U, 0x0000004EU}, /* RGIDR_MODID[386]:IPMMURT011*/ + [365] = {0xFFC4219CU, 0x0000004EU}, /* RGIDR_MODID[387]:IPMMURT012*/ + [366] = {0xFFC421A0U, 0x0000004EU}, /* RGIDR_MODID[388]:IPMMURT013*/ + [367] = {0xFFC421A4U, 0x0000004EU}, /* RGIDR_MODID[389]:IPMMURT014*/ + [368] = {0xFFC421A8U, 0x0000004EU}, /* RGIDR_MODID[390]:IPMMURT015*/ + [369] = {0xFFC421ACU, 0x0000004EU}, /* RGIDR_MODID[391]:IPMMURT002*/ + [370] = {0xFFC421B0U, 0x0000004EU}, /* RGIDR_MODID[392]:IPMMURT003*/ + [371] = {0xFFC421B4U, 0x0000004EU}, /* RGIDR_MODID[393]:IPMMURT004*/ + [372] = {0xFFC421B8U, 0x0000004EU}, /* RGIDR_MODID[394]:IPMMURT005*/ + [373] = {0xFFC421BCU, 0x0000004EU}, /* RGIDR_MODID[395]:IPMMURT006*/ + [374] = {0xFFC421C0U, 0x0000004EU}, /* RGIDR_MODID[396]:IPMMURT007*/ + [375] = {0xFFC421C4U, 0x0000004EU}, /* RGIDR_MODID[397]:IPMMURT008*/ + [376] = {0xFFC421C8U, 0x0000004EU}, /* RGIDR_MODID[398]:IPMMURT009*/ + [377] = {0xFFC421CCU, 0x0000004EU}, /* RGIDR_MODID[399]:IPKMURT101*/ + [378] = {0xFFC421D0U, 0x0000004EU}, /* RGIDR_MODID[400]:IPMMURT110*/ + [379] = {0xFFC421D4U, 0x0000004EU}, /* RGIDR_MODID[401]:IPMMURT111*/ + [380] = {0xFFC421D8U, 0x0000004EU}, /* RGIDR_MODID[402]:IPMMURT112*/ + [381] = {0xFFC421DCU, 0x0000004EU}, /* RGIDR_MODID[403]:IPMMURT113*/ + [382] = {0xFFC421E0U, 0x0000004EU}, /* RGIDR_MODID[404]:IPMMURT114*/ + [383] = {0xFFC421E4U, 0x0000004EU}, /* RGIDR_MODID[405]:IPMMURT115*/ + [384] = {0xFFC421E8U, 0x0000004EU}, /* RGIDR_MODID[406]:IPMMURT102*/ + [385] = {0xFFC421ECU, 0x0000004EU}, /* RGIDR_MODID[407]:IPMMURT103*/ + [386] = {0xFFC421F0U, 0x0000004EU}, /* RGIDR_MODID[408]:IPMMURT104*/ + [387] = {0xFFC421F4U, 0x0000004EU}, /* RGIDR_MODID[409]:IPMMURT105*/ + [388] = {0xFFC421F8U, 0x0000004EU}, /* RGIDR_MODID[410]:IPMMURT106*/ + [389] = {0xFFC421FCU, 0x0000004EU}, /* RGIDR_MODID[411]:IPMMURT107*/ + [390] = {0xFFC42200U, 0x0000004BU}, /* RGIDR_MODID[412]:RTDM000*/ + [391] = {0xFFC42204U, 0x0000004BU}, /* RGIDR_MODID[413]:RTDM001*/ + [392] = {0xFFC42208U, 0x0000004BU}, /* RGIDR_MODID[414]:RTDM010*/ + [393] = {0xFFC4220CU, 0x0000004BU}, /* RGIDR_MODID[415]:RTDM011*/ + [394] = {0xFFC42210U, 0x0000004BU}, /* RGIDR_MODID[416]:RTDM012*/ + [395] = {0xFFC42214U, 0x0000004BU}, /* RGIDR_MODID[417]:RTDM013*/ + [396] = {0xFFC42218U, 0x0000004BU}, /* RGIDR_MODID[418]:RTDM014*/ + [397] = {0xFFC4221CU, 0x0000004BU}, /* RGIDR_MODID[419]:RTDM015*/ + [398] = {0xFFC42220U, 0x0000004BU}, /* RGIDR_MODID[420]:RTDM002*/ + [399] = {0xFFC42224U, 0x0000004BU}, /* RGIDR_MODID[421]:RTDM003*/ + [400] = {0xFFC42228U, 0x0000004BU}, /* RGIDR_MODID[422]:RTDM004*/ + [401] = {0xFFC4222CU, 0x0000004BU}, /* RGIDR_MODID[423]:RTDM005*/ + [402] = {0xFFC42230U, 0x0000004BU}, /* RGIDR_MODID[424]:RTDM006*/ + [403] = {0xFFC42234U, 0x0000004BU}, /* RGIDR_MODID[425]:RTDM007*/ + [404] = {0xFFC42238U, 0x0000004BU}, /* RGIDR_MODID[426]:RTDM008*/ + [405] = {0xFFC4223CU, 0x0000004BU}, /* RGIDR_MODID[427]:RTDM009*/ + [406] = {0xFFC42240U, 0x0000004BU}, /* RGIDR_MODID[428]:RTDM100*/ + [407] = {0xFFC42244U, 0x0000004BU}, /* RGIDR_MODID[429]:RTDM101*/ + [408] = {0xFFC42248U, 0x0000004BU}, /* RGIDR_MODID[430]:RTDM110*/ + [409] = {0xFFC4224CU, 0x0000004BU}, /* RGIDR_MODID[431]:RTDM111*/ + [410] = {0xFFC42250U, 0x0000004BU}, /* RGIDR_MODID[432]:RTDM112*/ + [411] = {0xFFC42254U, 0x0000004BU}, /* RGIDR_MODID[433]:RTDM113*/ + [412] = {0xFFC42258U, 0x0000004BU}, /* RGIDR_MODID[434]:RTDM114*/ + [413] = {0xFFC4225CU, 0x0000004BU}, /* RGIDR_MODID[435]:RTDM115*/ + [414] = {0xFFC42260U, 0x0000004BU}, /* RGIDR_MODID[436]:RTDM102*/ + [415] = {0xFFC42264U, 0x0000004BU}, /* RGIDR_MODID[437]:RTDM103*/ + [416] = {0xFFC42268U, 0x0000004BU}, /* RGIDR_MODID[438]:RTDM104*/ + [417] = {0xFFC4226CU, 0x0000004BU}, /* RGIDR_MODID[439]:RTDM105*/ + [418] = {0xFFC42270U, 0x0000004BU}, /* RGIDR_MODID[440]:RTDM106*/ + [419] = {0xFFC42274U, 0x0000004BU}, /* RGIDR_MODID[441]:RTDM107*/ + [420] = {0xFFC42278U, 0x0000004BU}, /* RGIDR_MODID[442]:RTDM108*/ + [421] = {0xFFC4227CU, 0x0000004BU}, /* RGIDR_MODID[443]:RTDM109*/ + [422] = {0xFFC42300U, 0x0000004EU}, /* RGIDR_MODID[444]:IPMMURT108*/ + [423] = {0xFFC42304U, 0x0000004EU}, /* RGIDR_MODID[445]:IPMMURT109*/ + [424] = {0xFFC42308U, 0x00000001U}, /* RGIDR_MODID[446]:SYSRAM01*/ + [425] = {0xFFC4230CU, 0x0000000BU}, /* RGIDR_MODID[447]:SYSRAM02*/ + [426] = {0xFFC42310U, 0x00000001U}, /* RGIDR_MODID[448]:SYSRAM03*/ + [427] = {0xFFC42314U, 0x00000001U}, /* RGIDR_MODID[449]:SYSRAM04*/ + [428] = {0xFFC42318U, 0x00000001U}, /* RGIDR_MODID[450]:SYSRAM05*/ + [429] = {0xFFC4231CU, 0x00000001U}, /* RGIDR_MODID[451]:SYSRAM06*/ + [430] = {0xFFC42320U, 0x00000000U}, /* RGIDR_MODID[452]:SYSRAM07*/ + [431] = {0xFFC42324U, 0x0000000BU}, /* RGIDR_MODID[453]:SYSRAM11*/ + [432] = {0xFFC42328U, 0x0000000BU}, /* RGIDR_MODID[454]:SYSRAM12*/ + [433] = {0xFFC4232CU, 0x0000000BU}, /* RGIDR_MODID[455]:SYSRAM13*/ + [434] = {0xFFC42330U, 0x0000000BU}, /* RGIDR_MODID[456]:SYSRAM14*/ + [435] = {0xFFC42334U, 0x0000000BU}, /* RGIDR_MODID[457]:SYSRAM15*/ + [436] = {0xFFC42338U, 0x0000000BU}, /* RGIDR_MODID[458]:SYSRAM16*/ + [437] = {0xFFC4233CU, 0x00000000U}, /* RGIDR_MODID[459]:SYSRAM17*/ + [438] = {0xFFC42360U, 0x00000002U}, /* RGIDR_MODID[460]:BKBUF*/ + [439] = {0xFFC42364U, 0x00000002U}, /* RGIDR_MODID[461]:AXICR52SS1*/ + [440] = {0xFFC42368U, 0x00000002U}, /* RGIDR_MODID[462]:AXICR52SS2*/ + [441] = {0xFF862000U, 0x0000000FU}, /* RGIDR_MODID[463]:ARSC0*/ + /* After setting */ /* RGIDR_MODID[464]:ARSC1*/ + /* After setting */ /* RGIDR_MODID[465]:ARSC2*/ + [442] = {0xFF86200CU, 0x0000000FU}, /* RGIDR_MODID[466]:ARSC3*/ + [443] = {0xFF862010U, 0x0000000FU}, /* RGIDR_MODID[467]:ARSC4*/ + [444] = {0xFF862014U, 0x0000000FU}, /* RGIDR_MODID[468]:ARSC5*/ + [445] = {0xFF862018U, 0x0000000FU}, /* RGIDR_MODID[469]:ARSC6*/ + [446] = {0xFF86201CU, 0x0000000FU}, /* RGIDR_MODID[470]:ARSC7*/ + [447] = {0xFF862020U, 0x00000000U}, /* RGIDR_MODID[471]:ARSC8*/ + [448] = {0xFF862024U, 0x0000000FU}, /* RGIDR_MODID[472]:ARSTM0*/ + /* After setting */ /* RGIDR_MODID[473]:ARSTM1*/ + [449] = {0xFF86202CU, 0x0000000EU}, /* RGIDR_MODID[474]:CSD1S*/ + [450] = {0xFF862030U, 0x0000000EU}, /* RGIDR_MODID[475]:AXIFBABUSTOP0*/ + /* After setting */ /* RGIDR_MODID[476]:ARSTM2*/ + [451] = {0xFF86203CU, 0x0000000FU}, /* RGIDR_MODID[477]:ARSTM3*/ + [452] = {0xFF862040U, 0x0000000FU}, /* RGIDR_MODID[478]:ARSTM4*/ + [453] = {0xFF862044U, 0x0000000FU}, /* RGIDR_MODID[479]:ARSTM5*/ + [454] = {0xFF862048U, 0x0000000FU}, /* RGIDR_MODID[480]:ARSTM6*/ + [455] = {0xFF86204CU, 0x0000000FU}, /* RGIDR_MODID[481]:ARSTM7*/ + [456] = {0xFF862050U, 0x00000000U}, /* RGIDR_MODID[482]:ARSTM8*/ + [457] = {0xFF862054U, 0x0000000FU}, /* RGIDR_MODID[483]:ECMTOP*/ + [458] = {0xFF862058U, 0x0000000EU}, /* RGIDR_MODID[484]:FBA*/ + [459] = {0xFF86205CU, 0x0000000EU}, /* RGIDR_MODID[485]:FBC*/ + [460] = {0xFF862034U, 0x0000000CU}, /* RGIDR_MODID[486]:AXICCI00*/ + [461] = {0xFF862060U, 0x0000000CU}, /* RGIDR_MODID[487]:AXICCI01*/ + [462] = {0xFF862064U, 0x0000000CU}, /* RGIDR_MODID[488]:AXICCI10*/ + [463] = {0xFF862068U, 0x0000000CU}, /* RGIDR_MODID[489]:AXICCI11*/ + [464] = {0xFF86206CU, 0x0000000CU}, /* RGIDR_MODID[490]:AXICCI12*/ + [465] = {0xFF862070U, 0x0000000CU}, /* RGIDR_MODID[491]:AXICCI13*/ + [466] = {0xFF862074U, 0x0000000CU}, /* RGIDR_MODID[492]:AXICCI14*/ + [467] = {0xFF862078U, 0x0000000CU}, /* RGIDR_MODID[493]:AXICCI15*/ + [468] = {0xFF86207CU, 0x0000000CU}, /* RGIDR_MODID[494]:AXICCI2*/ + [469] = {0xFF862080U, 0x0000000CU}, /* RGIDR_MODID[495]:AXICCI3*/ + [470] = {0xFF862084U, 0x0000000CU}, /* RGIDR_MODID[496]:AXICCI4*/ + [471] = {0xFF862088U, 0x0000000CU}, /* RGIDR_MODID[497]:AXICCI5*/ + [472] = {0xFF86208CU, 0x0000000CU}, /* RGIDR_MODID[498]:AXICCI6*/ + [473] = {0xFF862090U, 0x0000000CU}, /* RGIDR_MODID[499]:AXICCI7*/ + [474] = {0xFF862094U, 0x0000000CU}, /* RGIDR_MODID[500]:AXICCI8*/ + [475] = {0xFF862098U, 0x0000000FU}, /* RGIDR_MODID[501]:AXICCI9*/ + [476] = {0xFF8620A0U, 0x0000000FU}, /* RGIDR_MODID[502]:ECMSTM*/ + [477] = {0xE7782000U, 0x0000002CU}, /* RGIDR_MODID[503]:DMASSI00*/ + [478] = {0xE7782004U, 0x0000002CU}, /* RGIDR_MODID[504]:DMASSI01*/ + [479] = {0xE7782008U, 0x0000002CU}, /* RGIDR_MODID[505]:DMASSI02*/ + [480] = {0xE778200CU, 0x0000002CU}, /* RGIDR_MODID[506]:DMASSI03*/ + [481] = {0xE7782010U, 0x0000002CU}, /* RGIDR_MODID[507]:DMASSI04*/ + [482] = {0xE7782014U, 0x0000004EU}, /* RGIDR_MODID[508]:DMAI2C0*/ + [483] = {0xE7782018U, 0x0000004EU}, /* RGIDR_MODID[509]:DMAI2C1*/ + [484] = {0xE778201CU, 0x0000004EU}, /* RGIDR_MODID[510]:DMAI2C2*/ + [485] = {0xE7782020U, 0x0000004EU}, /* RGIDR_MODID[511]:DMAI2C3*/ + [486] = {0xE778202CU, 0x0000002CU}, /* RGIDR_MODID[512]:DMASSI05*/ + [487] = {0xE7782030U, 0x0000002CU}, /* RGIDR_MODID[513]:DMASSI06*/ + [488] = {0xE7782034U, 0x0000002CU}, /* RGIDR_MODID[514]:DMASSI07*/ + [489] = {0xE67C2000U, 0x00000007U}, /* RGIDR_MODID[515]:ARMM*/ + /* After setting */ /* RGIDR_MODID[516]:AXIARNMM*/ + [490] = {0xE67C2008U, 0x0000000FU}, /* RGIDR_MODID[517]:ARSM0*/ + /* After setting */ /* RGIDR_MODID[518]:ARSM1*/ + /* After setting */ /* RGIDR_MODID[519]:ARSM2*/ + [491] = {0xE67C2014U, 0x0000000FU}, /* RGIDR_MODID[520]:AXIQOS0*/ + [492] = {0xE67C2018U, 0x0000000FU}, /* RGIDR_MODID[521]:AXIQOS1*/ + [493] = {0xE67C201CU, 0x0000000FU}, /* RGIDR_MODID[522]:AXIQOS2*/ + [494] = {0xE67C2020U, 0x0000000FU}, /* RGIDR_MODID[523]:AXIQOS3*/ + [495] = {0xE67C2024U, 0x0000000FU}, /* RGIDR_MODID[524]:AXIQOS4*/ + [496] = {0xE67C2028U, 0x0000000FU}, /* RGIDR_MODID[525]:AXIQOS5*/ + [497] = {0xE67C2034U, 0x0000000FU}, /* RGIDR_MODID[526]:ARSM3*/ + [498] = {0xE67C2038U, 0x0000000FU}, /* RGIDR_MODID[527]:ARSM4*/ + [499] = {0xE67C203CU, 0x0000000FU}, /* RGIDR_MODID[528]:ARSM5*/ + [500] = {0xE67C2040U, 0x0000000FU}, /* RGIDR_MODID[529]:ARSM6*/ + [501] = {0xE67C2044U, 0x0000000FU}, /* RGIDR_MODID[530]:ARSM7*/ + [502] = {0xE67C2048U, 0x00000000U}, /* RGIDR_MODID[531]:ARSM8*/ + [503] = {0xE67C204CU, 0x0000000BU}, /* RGIDR_MODID[532]:AXMM0*/ + [504] = {0xE67C2050U, 0x0000000BU}, /* RGIDR_MODID[533]:AXMM1*/ + [505] = {0xE67C2054U, 0x00000000U}, /* RGIDR_MODID[534]:AXMMPMON*/ + [506] = {0xE67C2058U, 0x0000000AU}, /* RGIDR_MODID[535]:CKMMM*/ + [507] = {0xE67C205CU, 0x0000000FU}, /* RGIDR_MODID[536]:ECMMM*/ + [508] = {0xE67C2060U, 0x0000000EU}, /* RGIDR_MODID[537]:FBADBSC0*/ + [509] = {0xE67C2068U, 0x0000000EU}, /* RGIDR_MODID[538]:FBAMM*/ + [510] = {0xE67C206CU, 0x0000004EU}, /* RGIDR_MODID[539]:IPMMUMM00*/ + [511] = {0xE67C2070U, 0x0000000FU}, /* RGIDR_MODID[540]:DBS0A0*/ + [512] = {0xE67C2074U, 0x0000000AU}, /* RGIDR_MODID[541]:DBS0A1*/ + [513] = {0xE67C2084U, 0x00000009U}, /* RGIDR_MODID[542]:FCPRC*/ + [514] = {0xE67C2088U, 0x0000000FU}, /* RGIDR_MODID[543]:DBS0D0*/ + [515] = {0xE67C208CU, 0x0000000AU}, /* RGIDR_MODID[544]:DBS0D1*/ + [516] = {0xE67C2098U, 0x0000000EU}, /* RGIDR_MODID[545]:FBADDR*/ + [517] = {0xE67C209CU, 0x0000004EU}, /* RGIDR_MODID[546]:IPMMUMM01*/ + [518] = {0xE67C20A0U, 0x0000004EU}, /* RGIDR_MODID[547]:IPMMUMM10*/ + [519] = {0xE67C20A4U, 0x0000004EU}, /* RGIDR_MODID[548]:IPMMUMM11*/ + [520] = {0xE67C20A8U, 0x0000004EU}, /* RGIDR_MODID[549]:IPMMUMM12*/ + [521] = {0xE67C20ACU, 0x0000004EU}, /* RGIDR_MODID[550]:IPMMUMM13*/ + [522] = {0xE67C20B0U, 0x0000004EU}, /* RGIDR_MODID[551]:IPMMUMM14*/ + [523] = {0xE67C20B4U, 0x0000004EU}, /* RGIDR_MODID[552]:IPMMUMM15*/ + [524] = {0xE67C20B8U, 0x0000004EU}, /* RGIDR_MODID[553]:IPMMUMM02*/ + [525] = {0xE67C20BCU, 0x0000004EU}, /* RGIDR_MODID[554]:IPMMUMM03*/ + [526] = {0xE67C20C0U, 0x0000004EU}, /* RGIDR_MODID[555]:IPMMUMM04*/ + [527] = {0xE67C20C4U, 0x0000004EU}, /* RGIDR_MODID[556]:IPMMUMM05*/ + [528] = {0xE67C20C8U, 0x0000004EU}, /* RGIDR_MODID[557]:IPMMUMM06*/ + [529] = {0xE67C20CCU, 0x0000004EU}, /* RGIDR_MODID[558]:IPMMUMM07*/ + [530] = {0xE67C20D0U, 0x0000004EU}, /* RGIDR_MODID[559]:IPMMUMM08*/ + [531] = {0xE67C20D4U, 0x0000004EU}, /* RGIDR_MODID[560]:IPMMUMM09*/ + [532] = {0xFF802000U, 0x0000000FU}, /* RGIDR_MODID[561]:ARSN0*/ + /* After setting */ /* RGIDR_MODID[562]:ARSN1*/ + /* After setting */ /* RGIDR_MODID[563]:ARSN2*/ + [533] = {0xFF80200CU, 0x0000000FU}, /* RGIDR_MODID[564]:ARSN3*/ + [534] = {0xFF802010U, 0x0000000FU}, /* RGIDR_MODID[565]:ARSN4*/ + [535] = {0xFF802014U, 0x0000000FU}, /* RGIDR_MODID[566]:ARSN5*/ + [536] = {0xFF802018U, 0x0000000FU}, /* RGIDR_MODID[567]:ARSN6*/ + [537] = {0xFF80201CU, 0x00000007U}, /* RGIDR_MODID[568]:ARSN7*/ + [538] = {0xFF802020U, 0x00000000U}, /* RGIDR_MODID[569]:ARSN8*/ + [539] = {0xFF802024U, 0x0000000FU}, /* RGIDR_MODID[570]:ECMTOP3*/ + [540] = {0xE7752000U, 0x0000000FU}, /* RGIDR_MODID[571]:ARSD00*/ + /* After setting */ /* RGIDR_MODID[572]:ARSD01*/ + /* After setting */ /* RGIDR_MODID[573]:ARSD02*/ + [541] = {0xE775200CU, 0x0000000FU}, /* RGIDR_MODID[574]:ARSD03*/ + [542] = {0xE7752010U, 0x0000000FU}, /* RGIDR_MODID[575]:ARSD04*/ + [543] = {0xE7752014U, 0x0000000FU}, /* RGIDR_MODID[576]:ARSD05*/ + [544] = {0xE7752018U, 0x0000000FU}, /* RGIDR_MODID[577]:ARSD06*/ + [545] = {0xE775201CU, 0x0000004AU}, /* RGIDR_MODID[578]:AXIFRAY*/ + [546] = {0xE7752028U, 0x0000004FU}, /* RGIDR_MODID[579]:AXIRPC*/ + [547] = {0xE775202CU, 0x0000000FU}, /* RGIDR_MODID[580]:AXISDHI0*/ + [548] = {0xE7752030U, 0x0000000FU}, /* RGIDR_MODID[581]:ARSD07*/ + [549] = {0xE7752034U, 0x00000000U}, /* RGIDR_MODID[582]:ARSD08*/ + [550] = {0xE7752038U, 0x0000000FU}, /* RGIDR_MODID[583]:ARSP00*/ + /* After setting */ /* RGIDR_MODID[584]:ARSP01*/ + /* After setting */ /* RGIDR_MODID[585]:ARSP02*/ + [551] = {0xE7752044U, 0x0000000FU}, /* RGIDR_MODID[586]:ARSP03*/ + [552] = {0xE7752048U, 0x0000000FU}, /* RGIDR_MODID[587]:ARSP04*/ + [553] = {0xE775204CU, 0x0000000FU}, /* RGIDR_MODID[588]:ARSP05*/ + [554] = {0xE7752050U, 0x0000000FU}, /* RGIDR_MODID[589]:ARSP06*/ + [555] = {0xE7752054U, 0x00000007U}, /* RGIDR_MODID[590]:ARSP07*/ + [556] = {0xE7752058U, 0x00000000U}, /* RGIDR_MODID[591]:ARSP08*/ + [557] = {0xE775205CU, 0x0000004EU}, /* RGIDR_MODID[592]:IPMMUDS001*/ + [558] = {0xE7752060U, 0x0000000AU}, /* RGIDR_MODID[593]:CKMPER0*/ + [559] = {0xE7752064U, 0x0000000FU}, /* RGIDR_MODID[594]:ECMPER0*/ + [560] = {0xE7752068U, 0x0000000EU}, /* RGIDR_MODID[595]:FBAPER0*/ + [561] = {0xE775206CU, 0x0000004EU}, /* RGIDR_MODID[596]:FSO0*/ + [562] = {0xE7752070U, 0x0000004EU}, /* RGIDR_MODID[597]:FSO1*/ + [563] = {0xE7752074U, 0x0000004EU}, /* RGIDR_MODID[598]:FSO10*/ + [564] = {0xE7752078U, 0x0000004EU}, /* RGIDR_MODID[599]:FSO2*/ + [565] = {0xE775207CU, 0x0000004EU}, /* RGIDR_MODID[600]:FSO3*/ + [566] = {0xE7752080U, 0x0000004EU}, /* RGIDR_MODID[601]:FSO4*/ + [567] = {0xE7752084U, 0x0000004EU}, /* RGIDR_MODID[602]:FSO5*/ + [568] = {0xE7752088U, 0x0000004EU}, /* RGIDR_MODID[603]:FSO6*/ + [569] = {0xE775208CU, 0x0000004EU}, /* RGIDR_MODID[604]:FSO7*/ + [570] = {0xE7752090U, 0x0000004EU}, /* RGIDR_MODID[605]:FSO8*/ + [571] = {0xE7752094U, 0x0000004EU}, /* RGIDR_MODID[606]:FSO9*/ + [572] = {0xE7752098U, 0x0000002CU}, /* RGIDR_MODID[607]:ADG*/ + [573] = {0xE775209CU, 0x0000000FU}, /* RGIDR_MODID[608]:ECMSD0*/ + [574] = {0xE77520A0U, 0x0000004EU}, /* RGIDR_MODID[609]:IPMMUDS010*/ + [575] = {0xE77520A4U, 0x0000004EU}, /* RGIDR_MODID[610]:IPMMUDS011*/ + [576] = {0xE77520A8U, 0x0000004EU}, /* RGIDR_MODID[611]:I2C0*/ + [577] = {0xE77520ACU, 0x0000004EU}, /* RGIDR_MODID[612]:I2C1*/ + [578] = {0xE77520B0U, 0x0000004EU}, /* RGIDR_MODID[613]:I2C2*/ + [579] = {0xE77520B4U, 0x0000004EU}, /* RGIDR_MODID[614]:I2C3*/ + [580] = {0xE77520C0U, 0x0000004EU}, /* RGIDR_MODID[615]:IPMMUDS012*/ + [581] = {0xE77520C8U, 0x0000004EU}, /* RGIDR_MODID[616]:IPMMUDS000*/ + [582] = {0xE77520CCU, 0x0000004EU}, /* RGIDR_MODID[617]:IPMMUDS013*/ + [583] = {0xE77520D0U, 0x0000004EU}, /* RGIDR_MODID[618]:IPMMUDS014*/ + [584] = {0xE77520D4U, 0x0000004EU}, /* RGIDR_MODID[619]:IPMMUDS015*/ + [585] = {0xE77520D8U, 0x0000004EU}, /* RGIDR_MODID[620]:IPMMUDS002*/ + [586] = {0xE77520DCU, 0x0000004EU}, /* RGIDR_MODID[621]:IPMMUDS003*/ + [587] = {0xE77520E0U, 0x0000004EU}, /* RGIDR_MODID[622]:IPMMUDS004*/ + [588] = {0xE77520E4U, 0x0000004EU}, /* RGIDR_MODID[623]:IPMMUDS005*/ + [589] = {0xE77520E8U, 0x0000002CU}, /* RGIDR_MODID[624]:SSI*/ + [590] = {0xE77520ECU, 0x0000004EU}, /* RGIDR_MODID[625]:IPMMUDS006*/ + [591] = {0xE77520F0U, 0x0000004EU}, /* RGIDR_MODID[626]:IPMMUDS007*/ + [592] = {0xE77520F4U, 0x0000000CU}, /* RGIDR_MODID[627]:SYDM1P*/ + [593] = {0xE77520F8U, 0x0000004EU}, /* RGIDR_MODID[628]:IPMMUDS008*/ + [594] = {0xE77520FCU, 0x0000000CU}, /* RGIDR_MODID[629]:SYDM2P*/ + [595] = {0xE7752100U, 0x0000004EU}, /* RGIDR_MODID[630]:IPMMUDS009*/ + [596] = {0xE7752240U, 0x0000000CU}, /* RGIDR_MODID[631]:SYDM100*/ + [597] = {0xE7752244U, 0x0000000CU}, /* RGIDR_MODID[632]:SYDM101*/ + [598] = {0xE7752248U, 0x0000000CU}, /* RGIDR_MODID[633]:SYDM110*/ + [599] = {0xE775224CU, 0x0000000CU}, /* RGIDR_MODID[634]:SYDM111*/ + [600] = {0xE7752250U, 0x0000000CU}, /* RGIDR_MODID[635]:SYDM112*/ + [601] = {0xE7752254U, 0x0000000CU}, /* RGIDR_MODID[636]:SYDM113*/ + [602] = {0xE7752258U, 0x0000000CU}, /* RGIDR_MODID[637]:SYDM114*/ + [603] = {0xE775225CU, 0x0000000CU}, /* RGIDR_MODID[638]:SYDM115*/ + [604] = {0xE7752260U, 0x0000000CU}, /* RGIDR_MODID[639]:SYDM102*/ + [605] = {0xE7752264U, 0x0000000CU}, /* RGIDR_MODID[640]:SYDM103*/ + [606] = {0xE7752268U, 0x0000000CU}, /* RGIDR_MODID[641]:SYDM104*/ + [607] = {0xE775226CU, 0x0000000CU}, /* RGIDR_MODID[642]:SYDM105*/ + [608] = {0xE7752270U, 0x0000000CU}, /* RGIDR_MODID[643]:SYDM106*/ + [609] = {0xE7752274U, 0x0000000CU}, /* RGIDR_MODID[644]:SYDM107*/ + [610] = {0xE7752278U, 0x0000000CU}, /* RGIDR_MODID[645]:SYDM108*/ + [611] = {0xE775227CU, 0x0000000CU}, /* RGIDR_MODID[646]:SYDM109*/ + [612] = {0xE7752280U, 0x0000000CU}, /* RGIDR_MODID[647]:SYDM200*/ + [613] = {0xE7752284U, 0x0000000CU}, /* RGIDR_MODID[648]:SYDM201*/ + [614] = {0xE7752288U, 0x0000000CU}, /* RGIDR_MODID[649]:SYDM210*/ + [615] = {0xE775228CU, 0x0000000CU}, /* RGIDR_MODID[650]:SYDM211*/ + [616] = {0xE7752290U, 0x0000000CU}, /* RGIDR_MODID[651]:SYDM212*/ + [617] = {0xE7752294U, 0x0000000CU}, /* RGIDR_MODID[652]:SYDM213*/ + [618] = {0xE7752298U, 0x0000000CU}, /* RGIDR_MODID[653]:SYDM214*/ + [619] = {0xE775229CU, 0x0000000CU}, /* RGIDR_MODID[654]:SYDM215*/ + [620] = {0xE77522A0U, 0x0000000CU}, /* RGIDR_MODID[655]:SYDM202*/ + [621] = {0xE77522A4U, 0x0000000CU}, /* RGIDR_MODID[656]:SYDM203*/ + [622] = {0xE77522A8U, 0x0000000CU}, /* RGIDR_MODID[657]:SYDM204*/ + [623] = {0xE77522ACU, 0x0000000CU}, /* RGIDR_MODID[658]:SYDM205*/ + [624] = {0xE77522B0U, 0x0000000CU}, /* RGIDR_MODID[659]:SYDM206*/ + [625] = {0xE77522B4U, 0x0000000CU}, /* RGIDR_MODID[660]:SYDM207*/ + [626] = {0xE77522B8U, 0x0000000CU}, /* RGIDR_MODID[661]:SYDM208*/ + [627] = {0xE77522BCU, 0x0000000CU}, /* RGIDR_MODID[662]:SYDM209*/ + [628] = {0xFE682000U, 0x0000000FU}, /* RGIDR_MODID[663]:ARVC0*/ + /* After setting */ /* RGIDR_MODID[664]:ARVC1*/ + /* After setting */ /* RGIDR_MODID[665]:ARVC2*/ + [629] = {0xFE68200CU, 0x0000000FU}, /* RGIDR_MODID[666]:ARVC3*/ + [630] = {0xFE682010U, 0x0000000EU}, /* RGIDR_MODID[667]:AXIFBABUSVC*/ + [631] = {0xFE682014U, 0x0000000FU}, /* RGIDR_MODID[668]:ARVC4*/ + [632] = {0xFE682018U, 0x0000000FU}, /* RGIDR_MODID[669]:ARVC5*/ + [633] = {0xFE68201CU, 0x0000000FU}, /* RGIDR_MODID[670]:ARVC6*/ + [634] = {0xFE682020U, 0x0000000FU}, /* RGIDR_MODID[671]:ARVC7*/ + [635] = {0xFE682024U, 0x00000000U}, /* RGIDR_MODID[672]:ARVC8*/ + [636] = {0xFE68202CU, 0x0000000FU}, /* RGIDR_MODID[673]:ECMVC0*/ + [637] = {0xFE682034U, 0x0000004EU}, /* RGIDR_MODID[674]:IMR0*/ + [638] = {0xFE682038U, 0x0000004EU}, /* RGIDR_MODID[675]:IMR1*/ + [639] = {0xFE68203CU, 0x0000004EU}, /* RGIDR_MODID[676]:IPMMUVC01*/ + [640] = {0xFE682040U, 0x0000004EU}, /* RGIDR_MODID[677]:IPMMUVC10*/ + [641] = {0xFE682044U, 0x0000000CU}, /* RGIDR_MODID[678]:IMS0*/ + [642] = {0xFE682048U, 0x0000000CU}, /* RGIDR_MODID[679]:IMS1*/ + [643] = {0xFE68204CU, 0x0000004EU}, /* RGIDR_MODID[680]:IPMMUVC00*/ + [644] = {0xFE682050U, 0x0000004EU}, /* RGIDR_MODID[681]:IPMMUVC11*/ + [645] = {0xFE682054U, 0x0000004EU}, /* RGIDR_MODID[682]:IPMMUVC12*/ + [646] = {0xFE682058U, 0x0000004EU}, /* RGIDR_MODID[683]:IPMMUVC13*/ + [647] = {0xFE68205CU, 0x0000004EU}, /* RGIDR_MODID[684]:IPMMUVC14*/ + [648] = {0xFE682060U, 0x0000004EU}, /* RGIDR_MODID[685]:IPMMUVC15*/ + [649] = {0xFE682064U, 0x0000004EU}, /* RGIDR_MODID[686]:IPMMUVC02*/ + [650] = {0xFE682068U, 0x0000004EU}, /* RGIDR_MODID[687]:IPMMUVC03*/ + [651] = {0xFE68206CU, 0x0000004EU}, /* RGIDR_MODID[688]:IPMMUVC04*/ + [652] = {0xFE682070U, 0x0000004EU}, /* RGIDR_MODID[689]:IPMMUVC05*/ + [653] = {0xFE682074U, 0x0000004EU}, /* RGIDR_MODID[690]:IPMMUVC06*/ + [654] = {0xFE682078U, 0x0000004EU}, /* RGIDR_MODID[691]:IPMMUVC07*/ + [655] = {0xFE68207CU, 0x0000004EU}, /* RGIDR_MODID[692]:IPMMUVC08*/ + [656] = {0xFE682080U, 0x0000004EU}, /* RGIDR_MODID[693]:IPMMUVC09*/ + [657] = {0xFE682084U, 0x00000028U}, /* RGIDR_MODID[694]:IV1ES*/ + [658] = {0xFEBE2000U, 0x0000004EU}, /* RGIDR_MODID[695]:CSITOP0*/ + [659] = {0xFEBE2004U, 0x0000000FU}, /* RGIDR_MODID[696]:ARVI10*/ + /* After setting */ /* RGIDR_MODID[697]:ARVI11*/ + /* After setting */ /* RGIDR_MODID[698]:ARVI12*/ + [660] = {0xFEBE2010U, 0x0000000FU}, /* RGIDR_MODID[699]:ARVI13*/ + [661] = {0xFEBE2014U, 0x0000000FU}, /* RGIDR_MODID[700]:ARVI14*/ + [662] = {0xFEBE2018U, 0x0000000FU}, /* RGIDR_MODID[701]:ARVI15*/ + [663] = {0xFEBE201CU, 0x0000000FU}, /* RGIDR_MODID[702]:ARVI16*/ + [664] = {0xFEBE2020U, 0x0000000FU}, /* RGIDR_MODID[703]:ARVI17*/ + [665] = {0xFEBE2024U, 0x00000000U}, /* RGIDR_MODID[704]:ARVI18*/ + [666] = {0xFEBE202CU, 0x0000004EU}, /* RGIDR_MODID[705]:CSITOP1*/ + [667] = {0xFEBE2034U, 0x0000004EU}, /* RGIDR_MODID[706]:DSITLINK0*/ + [668] = {0xFEBE203CU, 0x0000000FU}, /* RGIDR_MODID[707]:ECMVIO1*/ + [669] = {0xFEBE2044U, 0x0000004EU}, /* RGIDR_MODID[708]:IPMMUVI001*/ + [670] = {0xFEBE2048U, 0x0000000CU}, /* RGIDR_MODID[709]:FCPVX0*/ + [671] = {0xFEBE2058U, 0x0000004EU}, /* RGIDR_MODID[710]:IPMMUVI000*/ + [672] = {0xFEBE205CU, 0x0000004EU}, /* RGIDR_MODID[711]:IPMMUVI100*/ + [673] = {0xFEBE2060U, 0x0000004EU}, /* RGIDR_MODID[712]:IPMMUVI010*/ + [674] = {0xFEBE2064U, 0x0000004EU}, /* RGIDR_MODID[713]:IPMMUVI011*/ + [675] = {0xFEBE2068U, 0x0000004EU}, /* RGIDR_MODID[714]:VSPX0*/ + [676] = {0xFEBE2078U, 0x0000004EU}, /* RGIDR_MODID[715]:IPMMUVI012*/ + [677] = {0xFEBE207CU, 0x0000004EU}, /* RGIDR_MODID[716]:IPMMUVI013*/ + [678] = {0xFEBE2080U, 0x0000004EU}, /* RGIDR_MODID[717]:IPMMUVI014*/ + [679] = {0xFEBE2084U, 0x0000004EU}, /* RGIDR_MODID[718]:IPMMUVI015*/ + [680] = {0xFEBE2088U, 0x0000004EU}, /* RGIDR_MODID[719]:IPMMUVI002*/ + [681] = {0xFEBE208CU, 0x0000004EU}, /* RGIDR_MODID[720]:IPMMUVI003*/ + [682] = {0xFEBE2090U, 0x0000004EU}, /* RGIDR_MODID[721]:IPMMUVI004*/ + [683] = {0xFEBE2094U, 0x0000004EU}, /* RGIDR_MODID[722]:IPMMUVI005*/ + [684] = {0xFEBE2098U, 0x0000004EU}, /* RGIDR_MODID[723]:IPMMUVI006*/ + [685] = {0xFEBE209CU, 0x0000004EU}, /* RGIDR_MODID[724]:IPMMUVI007*/ + [686] = {0xFEBE20A0U, 0x0000004EU}, /* RGIDR_MODID[725]:IPMMUVI008*/ + [687] = {0xFEBE20A4U, 0x0000004EU}, /* RGIDR_MODID[726]:IPMMUVI009*/ + [688] = {0xFEBE20A8U, 0x0000004EU}, /* RGIDR_MODID[727]:IPMMUVI101*/ + [689] = {0xFEBE20ACU, 0x0000004EU}, /* RGIDR_MODID[728]:IPMMUVI110*/ + [690] = {0xFEBE20B0U, 0x0000004EU}, /* RGIDR_MODID[729]:IPMMUVI111*/ + [691] = {0xFEBE20B4U, 0x0000004EU}, /* RGIDR_MODID[730]:IPMMUVI112*/ + [692] = {0xFEBE20B8U, 0x0000004EU}, /* RGIDR_MODID[731]:IPMMUVI113*/ + [693] = {0xFEBE20BCU, 0x0000004EU}, /* RGIDR_MODID[732]:IPMMUVI114*/ + [694] = {0xFEBE20C0U, 0x0000004EU}, /* RGIDR_MODID[733]:IPMMUVI115*/ + [695] = {0xFEBE20C4U, 0x0000004EU}, /* RGIDR_MODID[734]:IPMMUVI102*/ + [696] = {0xFEBE20C8U, 0x0000004EU}, /* RGIDR_MODID[735]:IPMMUVI103*/ + [697] = {0xFEBE20CCU, 0x0000004EU}, /* RGIDR_MODID[736]:IPMMUVI104*/ + [698] = {0xFEBE20D0U, 0x0000004EU}, /* RGIDR_MODID[737]:IPMMUVI105*/ + [699] = {0xFEBE20D4U, 0x0000004EU}, /* RGIDR_MODID[738]:IPMMUVI106*/ + [700] = {0xFEBE20D8U, 0x0000004EU}, /* RGIDR_MODID[739]:IPMMUVI107*/ + [701] = {0xFEBE20DCU, 0x0000004EU}, /* RGIDR_MODID[740]:IPMMUVI108*/ + [702] = {0xFEBE20E0U, 0x0000004EU}, /* RGIDR_MODID[741]:IPMMUVI109*/ + [703] = {0xFEBE2104U, 0x0000000EU}, /* RGIDR_MODID[742]:AXIFBABUSVIO*/ + [704] = {0xFEBF2000U, 0x0000000FU}, /* RGIDR_MODID[743]:ARVI0*/ + /* After setting */ /* RGIDR_MODID[744]:ARVI1*/ + /* After setting */ /* RGIDR_MODID[745]:ARVI2*/ + [705] = {0xFEBF200CU, 0x0000000FU}, /* RGIDR_MODID[746]:ARVI3*/ + [706] = {0xFEBF2010U, 0x0000000FU}, /* RGIDR_MODID[747]:ARVI4*/ + [707] = {0xFEBF2014U, 0x0000000FU}, /* RGIDR_MODID[748]:ARVI5*/ + [708] = {0xFEBF2018U, 0x0000000FU}, /* RGIDR_MODID[749]:ARVI6*/ + [709] = {0xFEBF201CU, 0x0000000FU}, /* RGIDR_MODID[750]:ARVI7*/ + [710] = {0xFEBF2020U, 0x00000000U}, /* RGIDR_MODID[751]:ARVI8*/ + [711] = {0xFEBF2024U, 0x0000000FU}, /* RGIDR_MODID[752]:ECMVIO0*/ + [712] = {0xFEBF202CU, 0x0000004EU}, /* RGIDR_MODID[753]:ISP0*/ + [713] = {0xFEBF2028U, 0x0000004EU}, /* RGIDR_MODID[754]:ISP0CORE*/ + [714] = {0xFEBF2054U, 0x0000004EU}, /* RGIDR_MODID[755]:VIN00*/ + [715] = {0xFEBF2058U, 0x0000004EU}, /* RGIDR_MODID[756]:VIN01*/ + [716] = {0xFEBF205CU, 0x0000004EU}, /* RGIDR_MODID[757]:VIN02*/ + [717] = {0xFEBF2060U, 0x0000004EU}, /* RGIDR_MODID[758]:VIN03*/ + [718] = {0xFEBF2064U, 0x0000004EU}, /* RGIDR_MODID[759]:VIN04*/ + [719] = {0xFEBF2068U, 0x0000004EU}, /* RGIDR_MODID[760]:VIN05*/ + [720] = {0xFEBF206CU, 0x0000004EU}, /* RGIDR_MODID[761]:VIN06*/ + [721] = {0xFEBF2070U, 0x0000004EU}, /* RGIDR_MODID[762]:VIN07*/ + [722] = {0xFEBF2074U, 0x0000004EU}, /* RGIDR_MODID[763]:VIN10*/ + [723] = {0xFEBF2078U, 0x0000004EU}, /* RGIDR_MODID[764]:VIN11*/ + [724] = {0xFEBF207CU, 0x0000004EU}, /* RGIDR_MODID[765]:VIN12*/ + [725] = {0xFEBF2080U, 0x0000004EU}, /* RGIDR_MODID[766]:VIN13*/ + [726] = {0xFEBF2084U, 0x0000004EU}, /* RGIDR_MODID[767]:VIN14*/ + [727] = {0xFEBF2088U, 0x0000004EU}, /* RGIDR_MODID[768]:VIN15*/ + [728] = {0xFEBF208CU, 0x0000004EU}, /* RGIDR_MODID[769]:VIN16*/ + [729] = {0xFEBF2090U, 0x0000004EU}, /* RGIDR_MODID[770]:VIN17*/ + [730] = {0xE7B12000U, 0x0000000FU}, /* RGIDR_MODID[771]:ARVIP00*/ + /* After setting */ /* RGIDR_MODID[772]:ARVIP01*/ + /* After setting */ /* RGIDR_MODID[773]:ARVIP02*/ + [731] = {0xE7B1200CU, 0x0000000FU}, /* RGIDR_MODID[774]:ARVIP03*/ + [732] = {0xE7B12010U, 0x0000000EU}, /* RGIDR_MODID[775]:AXIFBABUSVIP0*/ + [733] = {0xE7B12014U, 0x0000000FU}, /* RGIDR_MODID[776]:ARVIP04*/ + [734] = {0xE7B12018U, 0x0000000FU}, /* RGIDR_MODID[777]:ARVIP05*/ + [735] = {0xE7B1201CU, 0x0000000FU}, /* RGIDR_MODID[778]:ARVIP06*/ + [736] = {0xE7B12020U, 0x00000007U}, /* RGIDR_MODID[779]:ARVIP07*/ + [737] = {0xE7B12024U, 0x00000000U}, /* RGIDR_MODID[780]:ARVIP08*/ + [738] = {0xE7B1202CU, 0x0000000FU}, /* RGIDR_MODID[781]:ECMVIP0*/ + [739] = {0xE7B12030U, 0x0000004EU}, /* RGIDR_MODID[782]:IPMMUVIP000*/ + [740] = {0xE7B12038U, 0x0000004EU}, /* RGIDR_MODID[783]:SMPO0*/ + [741] = {0xE7B1203CU, 0x0000004EU}, /* RGIDR_MODID[784]:SMPS0*/ + [742] = {0xE7B12040U, 0x0000004EU}, /* RGIDR_MODID[785]:UMFL0*/ + [743] = {0xE7B12044U, 0x0000004EU}, /* RGIDR_MODID[786]:IPMMUVIP001*/ + [744] = {0xE7B12048U, 0x0000004EU}, /* RGIDR_MODID[787]:IPMMUVIP010*/ + [745] = {0xE7B1204CU, 0x0000004EU}, /* RGIDR_MODID[788]:IPMMUVIP011*/ + [746] = {0xE7B12050U, 0x0000004EU}, /* RGIDR_MODID[789]:UMFL0M_W*/ + [747] = {0xE7B12054U, 0x0000004EU}, /* RGIDR_MODID[790]:IPMMUVIP012*/ + [748] = {0xE7B12058U, 0x0000004EU}, /* RGIDR_MODID[791]:IPMMUVIP013*/ + [749] = {0xE7B1205CU, 0x0000004EU}, /* RGIDR_MODID[792]:IPMMUVIP014*/ + [750] = {0xE7B12060U, 0x0000004EU}, /* RGIDR_MODID[793]:IPMMUVIP015*/ + [751] = {0xE7B12064U, 0x0000004EU}, /* RGIDR_MODID[794]:IPMMUVIP002*/ + [752] = {0xE7B12068U, 0x0000004EU}, /* RGIDR_MODID[795]:IPMMUVIP003*/ + [753] = {0xE7B1206CU, 0x0000004EU}, /* RGIDR_MODID[796]:IPMMUVIP004*/ + [754] = {0xE7B12070U, 0x0000004EU}, /* RGIDR_MODID[797]:IPMMUVIP005*/ + [755] = {0xE7B12074U, 0x0000004EU}, /* RGIDR_MODID[798]:IPMMUVIP006*/ + [756] = {0xE7B12078U, 0x0000004EU}, /* RGIDR_MODID[799]:IPMMUVIP007*/ + [757] = {0xE7B1207CU, 0x0000004EU}, /* RGIDR_MODID[800]:IPMMUVIP008*/ + [758] = {0xE7B12080U, 0x0000004EU}, /* RGIDR_MODID[801]:IPMMUVIP009*/ + [759] = {0xFF8820A0U, 0x0000000FU}, /* RGIDR_MODID[802]:ARDSP0*/ + /* After setting */ /* RGIDR_MODID[803]:ARDSP1*/ + /* After setting */ /* RGIDR_MODID[804]:ARDSP2*/ + [760] = {0xFF8820ACU, 0x0000000FU}, /* RGIDR_MODID[805]:ARDSP3*/ + [761] = {0xFF8820B0U, 0x0000000FU}, /* RGIDR_MODID[806]:ARDSP4*/ + [762] = {0xFF8820B4U, 0x0000000FU}, /* RGIDR_MODID[807]:ARDSP5*/ + [763] = {0xFF8820B8U, 0x0000000FU}, /* RGIDR_MODID[808]:ARDSP6*/ + [764] = {0xFF8820BCU, 0x0000000FU}, /* RGIDR_MODID[809]:ARDSP7*/ + [765] = {0xFF8820C0U, 0x0000000FU}, /* RGIDR_MODID[810]:ECMDSP*/ + [766] = {0xFF882090U, 0x0000000CU}, /* RGIDR_MODID[811]:AXIDSP0*/ + [767] = {0xFF882094U, 0x0000000CU}, /* RGIDR_MODID[812]:AXIDSP1*/ + [768] = {0xFF882098U, 0x0000000CU}, /* RGIDR_MODID[813]:AXIDSP2*/ + [769] = {0xFF88209CU, 0x0000000CU}, /* RGIDR_MODID[814]:AXIDSP3*/ + [770] = {0xFF8820C4U, 0x0000004EU}, /* RGIDR_MODID[815]:IMPM0100*/ + [771] = {0xFF8820C8U, 0x0000004EU}, /* RGIDR_MODID[816]:IMPM0101*/ + [772] = {0xFF8820CCU, 0x0000004EU}, /* RGIDR_MODID[817]:IMPM0102*/ + [773] = {0xFF8820D0U, 0x0000004EU}, /* RGIDR_MODID[818]:IMPM0103*/ + [774] = {0xFF8820D4U, 0x0000004EU}, /* RGIDR_MODID[819]:IMPM0104*/ + [775] = {0xFF8820D8U, 0x0000004EU}, /* RGIDR_MODID[820]:IMPM0105*/ + [776] = {0xFF8820DCU, 0x0000004EU}, /* RGIDR_MODID[821]:IMPM0106*/ + [777] = {0xFF8820E0U, 0x0000004EU}, /* RGIDR_MODID[822]:IMPM0107*/ + [778] = {0xFF8820E4U, 0x0000004EU}, /* RGIDR_MODID[823]:IMPM0200*/ + [779] = {0xFF8820E8U, 0x0000004EU}, /* RGIDR_MODID[824]:IMPM0201*/ + [780] = {0xFF8820ECU, 0x0000004EU}, /* RGIDR_MODID[825]:IMPS0000*/ + [781] = {0xFF8820F0U, 0x0000004EU}, /* RGIDR_MODID[826]:IMPS0001*/ + [782] = {0xFF8820F4U, 0x0000004EU}, /* RGIDR_MODID[827]:IMPS0002*/ + [783] = {0xFF8820F8U, 0x0000004EU}, /* RGIDR_MODID[828]:IMPS0003*/ + [784] = {0xFF8820FCU, 0x0000004EU}, /* RGIDR_MODID[829]:IMPS0100*/ + [785] = {0xFF882100U, 0x0000004EU}, /* RGIDR_MODID[830]:IMPS0101*/ + [786] = {0xFF882104U, 0x0000004EU}, /* RGIDR_MODID[831]:IMPS0102*/ + [787] = {0xFF882108U, 0x0000004EU}, /* RGIDR_MODID[832]:IMPS0103*/ + [788] = {0xFF88210CU, 0x0000004EU}, /* RGIDR_MODID[833]:IMPS0104*/ + [789] = {0xFF882110U, 0x0000004EU}, /* RGIDR_MODID[834]:IMPS0105*/ + [790] = {0xFF882114U, 0x0000004EU}, /* RGIDR_MODID[835]:IMPS0106*/ + [791] = {0xFF882118U, 0x0000004EU}, /* RGIDR_MODID[836]:IMPS0107*/ + [792] = {0xFF88211CU, 0x0000004EU}, /* RGIDR_MODID[837]:IMPS0108*/ + [793] = {0xFF882120U, 0x0000004EU}, /* RGIDR_MODID[838]:IMPS0109*/ + [794] = {0xFF882124U, 0x0000004EU}, /* RGIDR_MODID[839]:IMPS0110*/ + [795] = {0xFF882128U, 0x0000004EU}, /* RGIDR_MODID[840]:IMPS0111*/ + [796] = {0xFF88212CU, 0x0000004EU}, /* RGIDR_MODID[841]:IMPS0200*/ + [797] = {0xFF882130U, 0x0000004EU}, /* RGIDR_MODID[842]:IMPS0201*/ + [798] = {0xFF882134U, 0x0000004EU}, /* RGIDR_MODID[843]:IMPS0202*/ + [800] = {0xE67B9660U, 0x0000000FU}, /* RGIDR_MODID[844]:ARCC*/ + [799] = {0xE67B9674U, 0x0000000FU}, /* RGIDR_MODID[845]:ARRTRAM*/ + [801] = {0xE7752024U, 0x00000000U}, /* RGIDR_MODID[846]:RSV0*/ + [802] = {0xE7B1210CU, 0x00000004U}, /* RGIDR_MODID[847]:PAP*/ + [803] = {0xFEBD2028U, 0x0000000CU}, /* RGIDR_MODID[848]:DOC*/ + [804] = {0xFEBF2030U, 0x0000004EU}, /* RGIDR_MODID[849]:ISP1*/ + [805] = {0xE6002000U, 0x0000004EU}, /* RGIDR_MODID[850]:AVS*/ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_w_tbl" +const REGION_ID_SETTING_TABLE g_rgid_w_tbl[] = { + [0] = {0xFFC82400U, 0x0000000EU}, /* RGIDW_MODID[0]:ARMGC0*/ + [1] = {0xFFC82404U, 0x0000000EU}, /* RGIDW_MODID[1]:ARMGC1*/ + [2] = {0xFFC82408U, 0x00000000U}, /* RGIDW_MODID[2]:ARMGC2*/ + [3] = {0xFFC8240CU, 0x00000002U}, /* RGIDW_MODID[3]:ARRT00*/ + /* After setting */ /* RGIDW_MODID[4]:ARRT01*/ + /* After setting */ /* RGIDW_MODID[5]:ARRT02*/ + [4] = {0xFFC82418U, 0x00000001U}, /* RGIDW_MODID[6]:ARRT03*/ + [5] = {0xFFC8241CU, 0x00000002U}, /* RGIDW_MODID[7]:ARRT04*/ + [6] = {0xFFC82420U, 0x00000001U}, /* RGIDW_MODID[8]:ARRT05*/ + [7] = {0xFFC82424U, 0x00000002U}, /* RGIDW_MODID[9]:ARRT06*/ + [8] = {0xFFC82428U, 0x00000002U}, /* RGIDW_MODID[10]:ARRT07*/ + [9] = {0xFFC8242CU, 0x00000000U}, /* RGIDW_MODID[11]:ARRT08*/ + [10] = {0xFFC82430U, 0x00000001U}, /* RGIDW_MODID[12]:LIFEC0*/ + [11] = {0xFFC82434U, 0x0000000EU}, /* RGIDW_MODID[13]:SWDT*/ + [12] = {0xFFC82438U, 0x0000006EU}, /* RGIDW_MODID[14]:TMU0*/ + [13] = {0xFFC8243CU, 0x0000000EU}, /* RGIDW_MODID[15]:WDT*/ + [14] = {0xFFC82440U, 0x0000000EU}, /* RGIDW_MODID[16]:WWDT0*/ + [15] = {0xFFC82444U, 0x0000000EU}, /* RGIDW_MODID[17]:WWDT1*/ + [16] = {0xFFC82448U, 0x0000000EU}, /* RGIDW_MODID[18]:WWDT2*/ + [17] = {0xFFC8244CU, 0x0000000EU}, /* RGIDW_MODID[19]:WWDT3*/ + [18] = {0xFFC82450U, 0x0000000EU}, /* RGIDW_MODID[20]:WWDT4*/ + [19] = {0xFFC82454U, 0x0000000EU}, /* RGIDW_MODID[21]:WWDT5*/ + [20] = {0xFFC82458U, 0x0000000EU}, /* RGIDW_MODID[22]:WWDT6*/ + [21] = {0xFFC82468U, 0x0000000AU}, /* RGIDW_MODID[23]:ECMRT3*/ + [22] = {0xE6002404U, 0x0000000FU}, /* RGIDW_MODID[24]:APMU0*/ + [23] = {0xE6002408U, 0x00000002U}, /* RGIDW_MODID[25]:APMU1*/ + [24] = {0xE600240CU, 0x00000000U}, /* RGIDW_MODID[26]:APMU10*/ + [25] = {0xE6002410U, 0x00000000U}, /* RGIDW_MODID[27]:APMU11*/ + [26] = {0xE6002414U, 0x00000000U}, /* RGIDW_MODID[28]:APMU12*/ + [27] = {0xE6002418U, 0x00000000U}, /* RGIDW_MODID[29]:APMU13*/ + [28] = {0xE600241CU, 0x00000000U}, /* RGIDW_MODID[30]:APMU14*/ + [29] = {0xE6002420U, 0x00000000U}, /* RGIDW_MODID[31]:APMU15*/ + [30] = {0xE6002424U, 0x00000004U}, /* RGIDW_MODID[32]:APMU2*/ + [31] = {0xE6002428U, 0x00000004U}, /* RGIDW_MODID[33]:APMU3*/ + [32] = {0xE600242CU, 0x00000000U}, /* RGIDW_MODID[34]:APMU4*/ + [33] = {0xE6002430U, 0x00000000U}, /* RGIDW_MODID[35]:APMU5*/ + [34] = {0xE6002434U, 0x00000000U}, /* RGIDW_MODID[36]:APMU6*/ + [35] = {0xE6002438U, 0x00000000U}, /* RGIDW_MODID[37]:APMU7*/ + [36] = {0xE600243CU, 0x00000000U}, /* RGIDW_MODID[38]:APMU8*/ + [37] = {0xE6002440U, 0x00000000U}, /* RGIDW_MODID[39]:APMU9*/ + [38] = {0xE6002444U, 0x00000002U}, /* RGIDW_MODID[40]:ARS00*/ + /* After setting */ /* RGIDW_MODID[41]:ARS01*/ + /* After setting */ /* RGIDW_MODID[42]:ARS02*/ + [39] = {0xE6002450U, 0x00000001U}, /* RGIDW_MODID[43]:ARS03*/ + [40] = {0xE6002454U, 0x00000002U}, /* RGIDW_MODID[44]:ARS04*/ + [41] = {0xE6002458U, 0x00000001U}, /* RGIDW_MODID[45]:ARS05*/ + [42] = {0xE600245CU, 0x00000002U}, /* RGIDW_MODID[46]:ARS06*/ + [43] = {0xE6002460U, 0x00000002U}, /* RGIDW_MODID[47]:ARS07*/ + [44] = {0xE6002464U, 0x00000000U}, /* RGIDW_MODID[48]:ARS08*/ + [45] = {0xE6002468U, 0x0000000EU}, /* RGIDW_MODID[49]:CMT0*/ + [46] = {0xE600246CU, 0x0000000EU}, /* RGIDW_MODID[50]:CMT1*/ + [47] = {0xE6002470U, 0x0000000EU}, /* RGIDW_MODID[51]:CMT2*/ + [48] = {0xE6002474U, 0x0000000EU}, /* RGIDW_MODID[52]:CMT3*/ + [49] = {0xE6002478U, 0x0000000AU}, /* RGIDW_MODID[53]:CKM*/ + [50] = {0xE600247CU, 0x0000000EU}, /* RGIDW_MODID[54]:DBE*/ + [51] = {0xE6002480U, 0x0000000EU}, /* RGIDW_MODID[55]:IRQC*/ + [52] = {0xE6002484U, 0x0000000AU}, /* RGIDW_MODID[56]:ECMPS0*/ + [53] = {0xE6002488U, 0x0000000BU}, /* RGIDW_MODID[57]:OTP0*/ + [54] = {0xE600248CU, 0x0000000FU}, /* RGIDW_MODID[58]:OTP1*/ + [55] = {0xE600249CU, 0x0000000EU}, /* RGIDW_MODID[59]:SCMT*/ + [56] = {0xE60024A8U, 0x0000004AU}, /* RGIDW_MODID[60]:TSC1*/ + [57] = {0xE60024ACU, 0x0000004AU}, /* RGIDW_MODID[61]:TSC2*/ + [58] = {0xE60024B8U, 0x00000006U}, /* RGIDW_MODID[62]:UCMT*/ + [59] = {0xE6002500U, 0x0000006FU}, /* RGIDW_MODID[63]:CPG0*/ + [60] = {0xE6002504U, 0x0000000AU}, /* RGIDW_MODID[64]:CPG1*/ + [61] = {0xE6002508U, 0x0000004EU}, /* RGIDW_MODID[65]:CPG2*/ + [62] = {0xE600250CU, 0x00000028U}, /* RGIDW_MODID[66]:CPG3*/ + [63] = {0xE6002510U, 0x0000006FU}, /* RGIDW_MODID[67]:PFC00*/ + [64] = {0xE6002514U, 0x0000000AU}, /* RGIDW_MODID[68]:PFC01*/ + [65] = {0xE6002518U, 0x0000004EU}, /* RGIDW_MODID[69]:PFC02*/ + [66] = {0xE600251CU, 0x00000028U}, /* RGIDW_MODID[70]:PFC03*/ + [67] = {0xE6002520U, 0x0000006FU}, /* RGIDW_MODID[71]:PFC10*/ + [68] = {0xE6002524U, 0x0000000AU}, /* RGIDW_MODID[72]:PFC11*/ + [69] = {0xE6002528U, 0x0000004EU}, /* RGIDW_MODID[73]:PFC12*/ + [70] = {0xE600252CU, 0x00000028U}, /* RGIDW_MODID[74]:PFC13*/ + [71] = {0xE6002530U, 0x0000006FU}, /* RGIDW_MODID[75]:PFC20*/ + [72] = {0xE6002534U, 0x0000000AU}, /* RGIDW_MODID[76]:PFC21*/ + [73] = {0xE6002538U, 0x0000004EU}, /* RGIDW_MODID[77]:PFC22*/ + [74] = {0xE600253CU, 0x00000028U}, /* RGIDW_MODID[78]:PFC23*/ + [75] = {0xE6002550U, 0x0000006FU}, /* RGIDW_MODID[79]:PFCS0*/ + [76] = {0xE6002554U, 0x0000000AU}, /* RGIDW_MODID[80]:PFCS1*/ + [77] = {0xE6002558U, 0x0000004EU}, /* RGIDW_MODID[81]:PFCS2*/ + [78] = {0xE600255CU, 0x00000028U}, /* RGIDW_MODID[82]:PFCS3*/ + [79] = {0xE6002560U, 0x0000006FU}, /* RGIDW_MODID[83]:RESET0*/ + [80] = {0xE6002564U, 0x0000000AU}, /* RGIDW_MODID[84]:RESET1*/ + [81] = {0xE6002568U, 0x0000004EU}, /* RGIDW_MODID[85]:RESET2*/ + [82] = {0xE600256CU, 0x00000028U}, /* RGIDW_MODID[86]:RESET3*/ + [83] = {0xE6002570U, 0x0000006FU}, /* RGIDW_MODID[87]:SYS0*/ + [84] = {0xE6002574U, 0x0000000AU}, /* RGIDW_MODID[88]:SYS1*/ + [85] = {0xE6002578U, 0x0000004EU}, /* RGIDW_MODID[89]:SYS2*/ + [86] = {0xE600257CU, 0x00000028U}, /* RGIDW_MODID[90]:SYS3*/ + [87] = {0xE7762400U, 0x0000000EU}, /* RGIDW_MODID[91]:DMAMSI0*/ + [88] = {0xE7762404U, 0x0000000EU}, /* RGIDW_MODID[92]:DMAMSI1*/ + [89] = {0xE7762408U, 0x0000000EU}, /* RGIDW_MODID[93]:DMAMSI2*/ + [90] = {0xE776240CU, 0x0000000EU}, /* RGIDW_MODID[94]:DMAMSI3*/ + [91] = {0xE7762410U, 0x0000000EU}, /* RGIDW_MODID[95]:DMAMSI4*/ + [92] = {0xE7762414U, 0x0000000EU}, /* RGIDW_MODID[96]:DMAMSI5*/ + [93] = {0xE7762418U, 0x0000000AU}, /* RGIDW_MODID[97]:ECMSP3*/ + [94] = {0xE7762424U, 0x00000002U}, /* RGIDW_MODID[98]:ARSP30*/ + /* After setting */ /* RGIDW_MODID[99]:ARSP31*/ + /* After setting */ /* RGIDW_MODID[100]:ARSP32*/ + [95] = {0xE7762430U, 0x00000001U}, /* RGIDW_MODID[101]:ARSP33*/ + [96] = {0xE7762434U, 0x00000002U}, /* RGIDW_MODID[102]:ARSP34*/ + [97] = {0xE7762438U, 0x00000001U}, /* RGIDW_MODID[103]:ARSP35*/ + [98] = {0xE776243CU, 0x00000002U}, /* RGIDW_MODID[104]:ARSP36*/ + [99] = {0xE7762440U, 0x00000002U}, /* RGIDW_MODID[105]:ARSP37*/ + [100] = {0xE7762444U, 0x00000000U}, /* RGIDW_MODID[106]:ARSP38*/ + [101] = {0xE7762448U, 0x0000000EU}, /* RGIDW_MODID[107]:MSI0*/ + [102] = {0xE776244CU, 0x0000000EU}, /* RGIDW_MODID[108]:MSI1*/ + [103] = {0xE7762450U, 0x0000000EU}, /* RGIDW_MODID[109]:MSI2*/ + [104] = {0xE7762454U, 0x0000000EU}, /* RGIDW_MODID[110]:MSI3*/ + [105] = {0xE7762458U, 0x0000000EU}, /* RGIDW_MODID[111]:MSI4*/ + [106] = {0xE776245CU, 0x0000000EU}, /* RGIDW_MODID[112]:MSI5*/ + [107] = {0xE7792400U, 0x00000002U}, /* RGIDW_MODID[113]:ARSP40*/ + /* After setting */ /* RGIDW_MODID[114]:ARSP41*/ + /* After setting */ /* RGIDW_MODID[115]:ARSP42*/ + [108] = {0xE779240CU, 0x00000001U}, /* RGIDW_MODID[116]:ARSP43*/ + [109] = {0xE7792410U, 0x00000002U}, /* RGIDW_MODID[117]:ARSP44*/ + [110] = {0xE7792414U, 0x00000001U}, /* RGIDW_MODID[118]:ARSP45*/ + [111] = {0xE7792418U, 0x00000002U}, /* RGIDW_MODID[119]:ARSP46*/ + [112] = {0xE779241CU, 0x00000002U}, /* RGIDW_MODID[120]:ARSP47*/ + [113] = {0xE7792420U, 0x00000000U}, /* RGIDW_MODID[121]:ARSP48*/ + [114] = {0xE7792424U, 0x0000004FU}, /* RGIDW_MODID[122]:DMAHSCIF0*/ + [115] = {0xE7792428U, 0x0000004FU}, /* RGIDW_MODID[123]:DMAHSCIF1*/ + [116] = {0xE779242CU, 0x0000004FU}, /* RGIDW_MODID[124]:DMAHSCIF2*/ + [117] = {0xE7792430U, 0x0000004FU}, /* RGIDW_MODID[125]:DMAHSCIF3*/ + [118] = {0xE7792434U, 0x0000004FU}, /* RGIDW_MODID[126]:DMASCIF0*/ + [119] = {0xE7792438U, 0x0000004FU}, /* RGIDW_MODID[127]:DMASCIF1*/ + [120] = {0xE779243CU, 0x0000004FU}, /* RGIDW_MODID[128]:DMASCIF3*/ + [121] = {0xE7792440U, 0x0000004FU}, /* RGIDW_MODID[129]:DMASCIF4*/ + [122] = {0xE7792444U, 0x0000000AU}, /* RGIDW_MODID[130]:ECMSP4*/ + [123] = {0xE7792448U, 0x0000004FU}, /* RGIDW_MODID[131]:HSCIF0*/ + [124] = {0xE779244CU, 0x0000004FU}, /* RGIDW_MODID[132]:HSCIF1*/ + [125] = {0xE7792450U, 0x0000004FU}, /* RGIDW_MODID[133]:HSCIF2*/ + [126] = {0xE7792454U, 0x0000004FU}, /* RGIDW_MODID[134]:HSCIF3*/ + [127] = {0xE7792458U, 0x0000004FU}, /* RGIDW_MODID[135]:SCIF0*/ + [128] = {0xE779245CU, 0x0000004FU}, /* RGIDW_MODID[136]:SCIF1*/ + [129] = {0xE7792460U, 0x0000004FU}, /* RGIDW_MODID[137]:SCIF3*/ + [130] = {0xE7792464U, 0x0000004FU}, /* RGIDW_MODID[138]:SCIF4*/ + [131] = {0xE7792468U, 0x0000006EU}, /* RGIDW_MODID[139]:TMU1*/ + [132] = {0xE779246CU, 0x0000006EU}, /* RGIDW_MODID[140]:TMU2*/ + [133] = {0xE7792470U, 0x0000006EU}, /* RGIDW_MODID[141]:TMU3*/ + [134] = {0xE7792474U, 0x0000006EU}, /* RGIDW_MODID[142]:TMU4*/ + [135] = {0xE7792478U, 0x0000004AU}, /* RGIDW_MODID[143]:CANFD*/ + [136] = {0xE779247CU, 0x0000004AU}, /* RGIDW_MODID[144]:DMACANFD*/ + [137] = {0xE7792480U, 0x00000002U}, /* RGIDW_MODID[145]:DMATPU0*/ + [138] = {0xE7792484U, 0x00000002U}, /* RGIDW_MODID[146]:PWM0*/ + [139] = {0xE7792488U, 0x00000002U}, /* RGIDW_MODID[147]:PWM1*/ + [140] = {0xE779248CU, 0x00000002U}, /* RGIDW_MODID[148]:PWM2*/ + [141] = {0xE7792490U, 0x00000002U}, /* RGIDW_MODID[149]:PWM3*/ + [142] = {0xE7792494U, 0x00000002U}, /* RGIDW_MODID[150]:PWM4*/ + [143] = {0xE77924ACU, 0x00000002U}, /* RGIDW_MODID[151]:TPU0*/ + [144] = {0xFEBD2400U, 0x00000002U}, /* RGIDW_MODID[152]:ARVI40*/ + /* After setting */ /* RGIDW_MODID[153]:ARVI41*/ + /* After setting */ /* RGIDW_MODID[154]:ARVI42*/ + [145] = {0xFEBD240CU, 0x00000001U}, /* RGIDW_MODID[155]:ARVI43*/ + [146] = {0xFEBD2410U, 0x00000002U}, /* RGIDW_MODID[156]:ARVI44*/ + [147] = {0xFEBD2414U, 0x00000001U}, /* RGIDW_MODID[157]:ARVI45*/ + [148] = {0xFEBD2418U, 0x00000002U}, /* RGIDW_MODID[158]:ARVI46*/ + [149] = {0xFEBD241CU, 0x00000002U}, /* RGIDW_MODID[159]:ARVI47*/ + [150] = {0xFEBD2420U, 0x00000000U}, /* RGIDW_MODID[160]:ARVI48*/ + [151] = {0xFEBD2424U, 0x0000000FU}, /* RGIDW_MODID[161]:DIS0*/ + [152] = {0xFEBD2430U, 0x0000000EU}, /* RGIDW_MODID[162]:ECMVIO2*/ + [153] = {0xFEBD2434U, 0x0000000FU}, /* RGIDW_MODID[163]:FCPVD0*/ + [154] = {0xFEBD243CU, 0x0000004EU}, /* RGIDW_MODID[164]:VSPD0*/ + [155] = {0xE6582400U, 0x0000000AU}, /* RGIDW_MODID[165]:CKMHSC*/ + [156] = {0xE6582404U, 0x0000000CU}, /* RGIDW_MODID[166]:AXIPCI001*/ + [157] = {0xE6582408U, 0x0000000CU}, /* RGIDW_MODID[167]:AXIPCI002*/ + [158] = {0xE658240CU, 0x0000000CU}, /* RGIDW_MODID[168]:AXIPCI003*/ + [159] = {0xE6582414U, 0x0000000CU}, /* RGIDW_MODID[169]:AXIPCI005*/ + [160] = {0xE6582418U, 0x0000000CU}, /* RGIDW_MODID[170]:AXIPCI006*/ + [161] = {0xE658241CU, 0x0000000CU}, /* RGIDW_MODID[171]:AXIPCI007*/ + [162] = {0xE6582420U, 0x0000000CU}, /* RGIDW_MODID[172]:AXIPCI008*/ + [163] = {0xE6582424U, 0x0000000CU}, /* RGIDW_MODID[173]:AXIPCI009*/ + [164] = {0xE6582428U, 0x0000000CU}, /* RGIDW_MODID[174]:AXIPCI010*/ + [165] = {0xE658242CU, 0x0000000CU}, /* RGIDW_MODID[175]:AXIPCI011*/ + [166] = {0xE6582430U, 0x0000000CU}, /* RGIDW_MODID[176]:AXIPCI012*/ + [167] = {0xE6582434U, 0x0000000CU}, /* RGIDW_MODID[177]:AXIPCI013*/ + [168] = {0xE6582438U, 0x0000000CU}, /* RGIDW_MODID[178]:AXIPCI014*/ + [169] = {0xE658243CU, 0x0000000CU}, /* RGIDW_MODID[179]:AXIPCI015*/ + [170] = {0xE6582484U, 0x0000000EU}, /* RGIDW_MODID[180]:GPTP*/ + [171] = {0xE6582488U, 0x0000004EU}, /* RGIDW_MODID[181]:IPMMUHC00*/ + [172] = {0xE65824F4U, 0x0000000CU}, /* RGIDW_MODID[182]:AXIPCI000*/ + [173] = {0xE65824F8U, 0x0000000CU}, /* RGIDW_MODID[183]:AXIPCI004*/ + [174] = {0xE65824FCU, 0x0000004EU}, /* RGIDW_MODID[184]:IPMMUHC01*/ + [175] = {0xE6582500U, 0x0000004EU}, /* RGIDW_MODID[185]:AVB0*/ + [176] = {0xE6582504U, 0x0000004EU}, /* RGIDW_MODID[186]:AVB1*/ + [177] = {0xE6582508U, 0x0000004EU}, /* RGIDW_MODID[187]:AVB2*/ + [178] = {0xE658250CU, 0x0000004EU}, /* RGIDW_MODID[188]:IPMMUHC10*/ + [179] = {0xE6582510U, 0x0000004EU}, /* RGIDW_MODID[189]:IPMMUHC11*/ + [180] = {0xE6582514U, 0x0000004EU}, /* RGIDW_MODID[190]:IPMMUHC12*/ + [181] = {0xE6582518U, 0x0000004EU}, /* RGIDW_MODID[191]:IPMMUHC13*/ + [182] = {0xE658251CU, 0x0000000CU}, /* RGIDW_MODID[192]:PPHY0*/ + [183] = {0xE6582524U, 0x0000004EU}, /* RGIDW_MODID[193]:IPMMUHC14*/ + [184] = {0xE6582528U, 0x0000004EU}, /* RGIDW_MODID[194]:IPMMUHC15*/ + [185] = {0xE658252CU, 0x0000000EU}, /* RGIDW_MODID[195]:FBAHSC*/ + [186] = {0xE6582530U, 0x0000004EU}, /* RGIDW_MODID[196]:IPMMUHC02*/ + [187] = {0xE6582538U, 0x0000000AU}, /* RGIDW_MODID[197]:ECMHSC*/ + [188] = {0xE658253CU, 0x00000002U}, /* RGIDW_MODID[198]:ARHC0*/ + /* After setting */ /* RGIDW_MODID[199]:ARHC1*/ + /* After setting */ /* RGIDW_MODID[200]:ARHC2*/ + [189] = {0xE6582548U, 0x00000001U}, /* RGIDW_MODID[201]:ARHC3*/ + [190] = {0xE658254CU, 0x00000002U}, /* RGIDW_MODID[202]:ARHC4*/ + [191] = {0xE6582550U, 0x00000001U}, /* RGIDW_MODID[203]:ARHC5*/ + [192] = {0xE6582554U, 0x00000002U}, /* RGIDW_MODID[204]:ARHC6*/ + [193] = {0xE6582558U, 0x00000002U}, /* RGIDW_MODID[205]:ARHC7*/ + [194] = {0xE658255CU, 0x00000000U}, /* RGIDW_MODID[206]:ARHC8*/ + [195] = {0xE6582560U, 0x0000004EU}, /* RGIDW_MODID[207]:IPMMUHC03*/ + [196] = {0xE6582564U, 0x0000004EU}, /* RGIDW_MODID[208]:IPMMUHC04*/ + [197] = {0xE6582568U, 0x0000004EU}, /* RGIDW_MODID[209]:IPMMUHC05*/ + [198] = {0xE658256CU, 0x0000004EU}, /* RGIDW_MODID[210]:IPMMUHC06*/ + [199] = {0xE6582570U, 0x0000004EU}, /* RGIDW_MODID[211]:IPMMUHC07*/ + [200] = {0xE6582574U, 0x0000004EU}, /* RGIDW_MODID[212]:IPMMUHC08*/ + [201] = {0xE6582578U, 0x0000004EU}, /* RGIDW_MODID[213]:IPMMUHC09*/ + [202] = {0xFF882400U, 0x00000002U}, /* RGIDW_MODID[214]:ARIMP00*/ + /* After setting */ /* RGIDW_MODID[215]:ARIMP01*/ + /* After setting */ /* RGIDW_MODID[216]:ARIMP02*/ + [203] = {0xFF88240CU, 0x00000001U}, /* RGIDW_MODID[217]:ARIMP03*/ + [204] = {0xFF882410U, 0x00000002U}, /* RGIDW_MODID[218]:ARIMP04*/ + [205] = {0xFF882414U, 0x0000004EU}, /* RGIDW_MODID[219]:AXIFBABUSIR0*/ + [206] = {0xFF882418U, 0x0000004EU}, /* RGIDW_MODID[220]:AXIFBABUSIR1*/ + [207] = {0xFF88241CU, 0x0000004EU}, /* RGIDW_MODID[221]:AXIFBABUSIR2*/ + [208] = {0xFF882420U, 0x0000004EU}, /* RGIDW_MODID[222]:AXIFBABUSIR3*/ + [209] = {0xFF882428U, 0x0000004EU}, /* RGIDW_MODID[223]:AXIIMP0*/ + [210] = {0xFF882434U, 0x00000001U}, /* RGIDW_MODID[224]:ARIMP05*/ + [211] = {0xFF882438U, 0x00000002U}, /* RGIDW_MODID[225]:ARIMP06*/ + [212] = {0xFF88243CU, 0x00000002U}, /* RGIDW_MODID[226]:ARIMP07*/ + [213] = {0xFF882440U, 0x00000000U}, /* RGIDW_MODID[227]:ARIMP08*/ + [214] = {0xFF882448U, 0x0000000AU}, /* RGIDW_MODID[228]:ECMIR*/ + [215] = {0xFF88244CU, 0x0000000FU}, /* RGIDW_MODID[229]:DSPPS*/ + [216] = {0xFF882450U, 0x0000004EU}, /* RGIDW_MODID[230]:IPMMUIR1*/ + [217] = {0xFF882454U, 0x0000004EU}, /* RGIDW_MODID[231]:IPMMUIR0*/ + [218] = {0xFF882458U, 0x0000004EU}, /* RGIDW_MODID[232]:IPMMUIR10*/ + [219] = {0xFF88245CU, 0x0000004EU}, /* RGIDW_MODID[233]:IPMMUIR11*/ + [220] = {0xFF882460U, 0x0000004EU}, /* RGIDW_MODID[234]:IPMMUIR12*/ + [221] = {0xFF882464U, 0x0000004EU}, /* RGIDW_MODID[235]:IPMMUIR13*/ + [222] = {0xFF882468U, 0x0000004EU}, /* RGIDW_MODID[236]:IPMMUIR14*/ + [223] = {0xFF88246CU, 0x0000004EU}, /* RGIDW_MODID[237]:IPMMUIR15*/ + [224] = {0xFF882470U, 0x0000004EU}, /* RGIDW_MODID[238]:IPMMUIR2*/ + [225] = {0xFF882474U, 0x0000004EU}, /* RGIDW_MODID[239]:IPMMUIR3*/ + [226] = {0xFF882478U, 0x0000004EU}, /* RGIDW_MODID[240]:IPMMUIR4*/ + [227] = {0xFF88247CU, 0x0000004EU}, /* RGIDW_MODID[241]:IPMMUIR5*/ + [228] = {0xFF882480U, 0x0000004EU}, /* RGIDW_MODID[242]:IPMMUIR6*/ + [229] = {0xFF882484U, 0x0000004EU}, /* RGIDW_MODID[243]:IPMMUIR7*/ + [230] = {0xFF882488U, 0x0000004EU}, /* RGIDW_MODID[244]:IPMMUIR8*/ + [231] = {0xFF88248CU, 0x0000004EU}, /* RGIDW_MODID[245]:IPMMUIR9*/ + [232] = {0xFD812400U, 0x00000002U}, /* RGIDW_MODID[246]:ARPV0*/ + /* After setting */ /* RGIDW_MODID[247]:ARPV1*/ + [233] = {0xFD812408U, 0x0000002CU}, /* RGIDW_MODID[248]:AXIRGXS*/ + /* After setting */ /* RGIDW_MODID[249]:ARPV2*/ + [234] = {0xFD812410U, 0x00000001U}, /* RGIDW_MODID[250]:ARPV3*/ + [235] = {0xFD812414U, 0x00000002U}, /* RGIDW_MODID[251]:ARPV4*/ + [236] = {0xFD812418U, 0x00000001U}, /* RGIDW_MODID[252]:ARPV5*/ + [237] = {0xFD81241CU, 0x00000002U}, /* RGIDW_MODID[253]:ARPV6*/ + [238] = {0xFD812420U, 0x00000002U}, /* RGIDW_MODID[254]:ARPV7*/ + [239] = {0xFD812424U, 0x00000000U}, /* RGIDW_MODID[255]:ARPV8*/ + [240] = {0xFD81242CU, 0x0000000AU}, /* RGIDW_MODID[256]:ECM3DG*/ + [241] = {0xFD812430U, 0x0000000EU}, /* RGIDW_MODID[257]:FBAPVC*/ + [242] = {0xFD812434U, 0x0000000EU}, /* RGIDW_MODID[258]:FBAPVD0*/ + [243] = {0xFD812438U, 0x0000000EU}, /* RGIDW_MODID[259]:FBAPVD1*/ + [244] = {0xFD81243CU, 0x0000000EU}, /* RGIDW_MODID[260]:FBAPVD2*/ + [245] = {0xFD812440U, 0x0000000EU}, /* RGIDW_MODID[261]:FBAPVE*/ + [246] = {0xFD812444U, 0x0000004EU}, /* RGIDW_MODID[262]:IPMMUPV000*/ + [247] = {0xFD812448U, 0x0000004EU}, /* RGIDW_MODID[263]:IPMMUPV001*/ + [248] = {0xFD81244CU, 0x0000004EU}, /* RGIDW_MODID[264]:IPMMUPV010*/ + [249] = {0xFD812450U, 0x0000004EU}, /* RGIDW_MODID[265]:IPMMUPV011*/ + [250] = {0xFD812454U, 0x0000004EU}, /* RGIDW_MODID[266]:IPMMUPV012*/ + [251] = {0xFD812458U, 0x0000004EU}, /* RGIDW_MODID[267]:IPMMUPV013*/ + [252] = {0xFD81245CU, 0x0000004EU}, /* RGIDW_MODID[268]:IPMMUPV014*/ + [253] = {0xFD812460U, 0x0000004EU}, /* RGIDW_MODID[269]:IPMMUPV015*/ + [254] = {0xFD812464U, 0x0000004EU}, /* RGIDW_MODID[270]:IPMMUPV002*/ + [255] = {0xFD812468U, 0x0000004EU}, /* RGIDW_MODID[271]:IPMMUPV003*/ + [256] = {0xFD81246CU, 0x0000004EU}, /* RGIDW_MODID[272]:IPMMUPV004*/ + [257] = {0xFD812470U, 0x0000004EU}, /* RGIDW_MODID[273]:IPMMUPV005*/ + [258] = {0xFD812474U, 0x0000004EU}, /* RGIDW_MODID[274]:IPMMUPV006*/ + [259] = {0xFD812478U, 0x0000004EU}, /* RGIDW_MODID[275]:IPMMUPV007*/ + [260] = {0xFD81247CU, 0x0000004EU}, /* RGIDW_MODID[276]:IPMMUPV008*/ + [261] = {0xFD812480U, 0x0000004EU}, /* RGIDW_MODID[277]:IPMMUPV009*/ + [262] = {0xE6622400U, 0x00000002U}, /* RGIDW_MODID[278]:ARRC0*/ + /* After setting */ /* RGIDW_MODID[279]:ARRC1*/ + /* After setting */ /* RGIDW_MODID[280]:ARRC2*/ + [263] = {0xE662240CU, 0x00000001U}, /* RGIDW_MODID[281]:ARRC3*/ + [264] = {0xE6622410U, 0x00000002U}, /* RGIDW_MODID[282]:ARRC4*/ + [265] = {0xE6622414U, 0x00000001U}, /* RGIDW_MODID[283]:ARRC5*/ + [266] = {0xE6622418U, 0x00000002U}, /* RGIDW_MODID[284]:ARRC6*/ + [267] = {0xE662241CU, 0x00000002U}, /* RGIDW_MODID[285]:ARRC7*/ + [268] = {0xE6622420U, 0x00000000U}, /* RGIDW_MODID[286]:ARRC8*/ + [269] = {0xE6622428U, 0x0000004FU}, /* RGIDW_MODID[287]:ICUMX*/ + [270] = {0xE662242CU, 0x0000000AU}, /* RGIDW_MODID[288]:ECMRC*/ + [271] = {0xFFC32400U, 0x0000004EU}, /* RGIDW_MODID[289]:DMAWCRC0*/ + [272] = {0xFFC32404U, 0x0000004EU}, /* RGIDW_MODID[290]:DMAWCRC1*/ + [273] = {0xFFC32408U, 0x0000004EU}, /* RGIDW_MODID[291]:DMAWCRC2*/ + [274] = {0xFFC3240CU, 0x0000004EU}, /* RGIDW_MODID[292]:DMAWCRC3*/ + [275] = {0xFFC42400U, 0x0000000FU}, /* RGIDW_MODID[293]:ARMREG00*/ + [276] = {0xFFC42404U, 0x0000000CU}, /* RGIDW_MODID[294]:ARMREG01*/ + [277] = {0xFFC42408U, 0x00000000U}, /* RGIDW_MODID[295]:ARMREG10*/ + [278] = {0xFFC4240CU, 0x00000000U}, /* RGIDW_MODID[296]:ARMREG11*/ + [279] = {0xFFC42410U, 0x0000000AU}, /* RGIDW_MODID[297]:ARMREG12*/ + [280] = {0xFFC42414U, 0x0000000FU}, /* RGIDW_MODID[298]:ARMREG13*/ + [281] = {0xFFC42418U, 0x0000000AU}, /* RGIDW_MODID[299]:ARMREG14*/ + [282] = {0xFFC4241CU, 0x00000003U}, /* RGIDW_MODID[300]:AXICR52SS0*/ + [283] = {0xFFC42420U, 0x0000000EU}, /* RGIDW_MODID[301]:AXICSD0*/ + [284] = {0xFFC42424U, 0x0000000EU}, /* RGIDW_MODID[302]:AXIINTAP0*/ + [285] = {0xFFC42430U, 0x0000000FU}, /* RGIDW_MODID[303]:AXISYSRAM0*/ + [286] = {0xFFC42434U, 0x0000004FU}, /* RGIDW_MODID[304]:AXISYSRAM1*/ + [287] = {0xFFC42438U, 0x00000000U}, /* RGIDW_MODID[305]:ARGREG15*/ + [288] = {0xFFC4243CU, 0x00000000U}, /* RGIDW_MODID[306]:ARMREG2*/ + [289] = {0xFFC42440U, 0x00000000U}, /* RGIDW_MODID[307]:ARMREG3*/ + [290] = {0xFFC42444U, 0x00000000U}, /* RGIDW_MODID[308]:ARMREG4*/ + [291] = {0xFFC42448U, 0x0000000FU}, /* RGIDW_MODID[309]:ARMREG5*/ + [292] = {0xFFC4244CU, 0x0000000AU}, /* RGIDW_MODID[310]:ARMREG6*/ + [293] = {0xFFC42450U, 0x00000000U}, /* RGIDW_MODID[311]:ARMREG7*/ + [294] = {0xFFC42454U, 0x0000000CU}, /* RGIDW_MODID[312]:ARMREG8*/ + [295] = {0xFFC42458U, 0x0000000CU}, /* RGIDW_MODID[313]:ARMREG9*/ + [296] = {0xFFC4245CU, 0x00000002U}, /* RGIDW_MODID[314]:ARRD0*/ + /* After setting */ /* RGIDW_MODID[315]:ARRD1*/ + /* After setting */ /* RGIDW_MODID[316]:ARRD2*/ + [297] = {0xFFC42468U, 0x00000001U}, /* RGIDW_MODID[317]:ARRD3*/ + [298] = {0xFFC4246CU, 0x00000002U}, /* RGIDW_MODID[318]:ARRD4*/ + [299] = {0xFFC42470U, 0x00000001U}, /* RGIDW_MODID[319]:ARRD5*/ + [300] = {0xFFC42474U, 0x00000002U}, /* RGIDW_MODID[320]:ARRD6*/ + [301] = {0xFFC42478U, 0x00000002U}, /* RGIDW_MODID[321]:ARRD7*/ + [302] = {0xFFC4247CU, 0x00000000U}, /* RGIDW_MODID[322]:ARRD8*/ + [303] = {0xFFC42480U, 0x00000002U}, /* RGIDW_MODID[323]:ARRT0*/ + /* After setting */ /* RGIDW_MODID[324]:ARRT1*/ + /* After setting */ /* RGIDW_MODID[325]:ARRT2*/ + [304] = {0xFFC4248CU, 0x00000001U}, /* RGIDW_MODID[326]:ARRT3*/ + [305] = {0xFFC42490U, 0x00000002U}, /* RGIDW_MODID[327]:ARRT4*/ + [306] = {0xFFC42494U, 0x00000001U}, /* RGIDW_MODID[328]:ARRT5*/ + [307] = {0xFFC42498U, 0x00000002U}, /* RGIDW_MODID[329]:ARRT6*/ + [308] = {0xFFC4249CU, 0x00000002U}, /* RGIDW_MODID[330]:ARRT7*/ + [309] = {0xFFC424A0U, 0x00000000U}, /* RGIDW_MODID[331]:ARRT8*/ + [310] = {0xFFC424A4U, 0x0000000AU}, /* RGIDW_MODID[332]:CKMRT*/ + [311] = {0xFFC424A8U, 0x0000004EU}, /* RGIDW_MODID[333]:CRC0*/ + [312] = {0xFFC424ACU, 0x0000004EU}, /* RGIDW_MODID[334]:CRC1*/ + [313] = {0xFFC424B0U, 0x0000004EU}, /* RGIDW_MODID[335]:CRC2*/ + [314] = {0xFFC424B4U, 0x0000004EU}, /* RGIDW_MODID[336]:CRC3*/ + [315] = {0xFFC424B8U, 0x0000000EU}, /* RGIDW_MODID[337]:CSD*/ + [316] = {0xFFC424BCU, 0x0000000EU}, /* RGIDW_MODID[338]:ECM*/ + [317] = {0xFFC424C0U, 0x0000000AU}, /* RGIDW_MODID[339]:ECMRT*/ + [318] = {0xFFC424C4U, 0x0000000EU}, /* RGIDW_MODID[340]:FBACR52*/ + [319] = {0xFFC424C8U, 0x0000000EU}, /* RGIDW_MODID[341]:FBART*/ + [320] = {0xFFC424CCU, 0x0000000EU}, /* RGIDW_MODID[342]:INTTP*/ + [321] = {0xFFC424D0U, 0x0000004EU}, /* RGIDW_MODID[343]:IPMMURT000*/ + [322] = {0xFFC424D4U, 0x0000004EU}, /* RGIDW_MODID[344]:IPMMURT100*/ + [323] = {0xFFC424D8U, 0x0000004EU}, /* RGIDW_MODID[345]:KCRC4*/ + [324] = {0xFFC424DCU, 0x0000004EU}, /* RGIDW_MODID[346]:KCRC5*/ + [325] = {0xFFC424E0U, 0x0000004EU}, /* RGIDW_MODID[347]:KCRC6*/ + [326] = {0xFFC424E4U, 0x0000004EU}, /* RGIDW_MODID[348]:KCRC7*/ + [327] = {0xFFC424E8U, 0x0000004FU}, /* RGIDW_MODID[349]:MFI00*/ + [328] = {0xFFC424ECU, 0x0000004EU}, /* RGIDW_MODID[350]:MFI01*/ + [329] = {0xFFC424F0U, 0x0000004EU}, /* RGIDW_MODID[351]:MFI10*/ + [330] = {0xFFC424F4U, 0x0000004EU}, /* RGIDW_MODID[352]:MFI02*/ + [331] = {0xFFC424F8U, 0x0000004EU}, /* RGIDW_MODID[353]:MFI03*/ + [332] = {0xFFC424FCU, 0x0000004EU}, /* RGIDW_MODID[354]:MFI04*/ + [333] = {0xFFC42500U, 0x00000000U}, /* RGIDW_MODID[355]:MFI05*/ + [334] = {0xFFC42504U, 0x00000000U}, /* RGIDW_MODID[356]:MFI06*/ + [335] = {0xFFC42508U, 0x00000000U}, /* RGIDW_MODID[357]:MFI07*/ + [336] = {0xFFC4250CU, 0x00000000U}, /* RGIDW_MODID[358]:MFI08*/ + [337] = {0xFFC42510U, 0x0000004EU}, /* RGIDW_MODID[359]:MFI09*/ + [338] = {0xFFC42514U, 0x0000004FU}, /* RGIDW_MODID[360]:MFI15*/ + [339] = {0xFFC42518U, 0x0000000AU}, /* RGIDW_MODID[361]:CKMCR52*/ + [340] = {0xFFC4251CU, 0x0000004BU}, /* RGIDW_MODID[362]:RTDM0P*/ + [341] = {0xFFC42520U, 0x0000000AU}, /* RGIDW_MODID[363]:ECMRD*/ + [342] = {0xFFC42524U, 0x0000004BU}, /* RGIDW_MODID[364]:RTDM1P*/ + [343] = {0xFFC42530U, 0x0000000BU}, /* RGIDW_MODID[365]:SYSRAM10*/ + [344] = {0xFFC42538U, 0x00000001U}, /* RGIDW_MODID[366]:SYSRAM00*/ + [345] = {0xFFC4253CU, 0x0000004EU}, /* RGIDW_MODID[367]:TSIPL0*/ + [346] = {0xFFC42540U, 0x0000004EU}, /* RGIDW_MODID[368]:TSIPL1*/ + [347] = {0xFFC42544U, 0x0000004EU}, /* RGIDW_MODID[369]:TSIPL2*/ + [348] = {0xFFC42548U, 0x0000004EU}, /* RGIDW_MODID[370]:TSIPL3*/ + [349] = {0xFFC4254CU, 0x0000004EU}, /* RGIDW_MODID[371]:TSIPL4*/ + [350] = {0xFFC42550U, 0x0000004EU}, /* RGIDW_MODID[372]:TSIPL5*/ + [351] = {0xFFC42554U, 0x0000004EU}, /* RGIDW_MODID[373]:TSIPL6*/ + [352] = {0xFFC42558U, 0x0000004EU}, /* RGIDW_MODID[374]:TSIPL7*/ + [353] = {0xFFC4255CU, 0x0000004EU}, /* RGIDW_MODID[375]:WCRC0*/ + [354] = {0xFFC42560U, 0x0000004EU}, /* RGIDW_MODID[376]:WCRC1*/ + [355] = {0xFFC42564U, 0x0000004EU}, /* RGIDW_MODID[377]:WCRC2*/ + [356] = {0xFFC42568U, 0x0000004EU}, /* RGIDW_MODID[378]:WCRC3*/ + [357] = {0xFFC42580U, 0x0000004EU}, /* RGIDW_MODID[379]:MFI11*/ + [358] = {0xFFC42584U, 0x00000000U}, /* RGIDW_MODID[380]:MFI12*/ + [359] = {0xFFC42588U, 0x00000000U}, /* RGIDW_MODID[381]:MFI13*/ + [360] = {0xFFC4258CU, 0x00000000U}, /* RGIDW_MODID[382]:MFI14*/ + [361] = {0xFFC42590U, 0x0000004EU}, /* RGIDW_MODID[383]:IPMMURT001*/ + [362] = {0xFFC42594U, 0x0000004EU}, /* RGIDW_MODID[384]:IPMMURT010*/ + [363] = {0xFFC42598U, 0x0000004EU}, /* RGIDW_MODID[385]:IPMMURT011*/ + [364] = {0xFFC4259CU, 0x0000004EU}, /* RGIDW_MODID[386]:IPMMURT012*/ + [365] = {0xFFC425A0U, 0x0000004EU}, /* RGIDW_MODID[387]:IPMMURT013*/ + [366] = {0xFFC425A4U, 0x0000004EU}, /* RGIDW_MODID[388]:IPMMURT014*/ + [367] = {0xFFC425A8U, 0x0000004EU}, /* RGIDW_MODID[389]:IPMMURT015*/ + [368] = {0xFFC425ACU, 0x0000004EU}, /* RGIDW_MODID[390]:IPMMURT002*/ + [369] = {0xFFC425B0U, 0x0000004EU}, /* RGIDW_MODID[391]:IPMMURT003*/ + [370] = {0xFFC425B4U, 0x0000004EU}, /* RGIDW_MODID[392]:IPMMURT004*/ + [371] = {0xFFC425B8U, 0x0000004EU}, /* RGIDW_MODID[393]:IPMMURT005*/ + [372] = {0xFFC425BCU, 0x0000004EU}, /* RGIDW_MODID[394]:IPMMURT006*/ + [373] = {0xFFC425C0U, 0x0000004EU}, /* RGIDW_MODID[395]:IPMMURT007*/ + [374] = {0xFFC425C4U, 0x0000004EU}, /* RGIDW_MODID[396]:IPMMURT008*/ + [375] = {0xFFC425C8U, 0x0000004EU}, /* RGIDW_MODID[397]:IPMMURT009*/ + [376] = {0xFFC425CCU, 0x0000004EU}, /* RGIDW_MODID[398]:IPKMURT101*/ + [377] = {0xFFC425D0U, 0x0000004EU}, /* RGIDW_MODID[399]:IPMMURT110*/ + [378] = {0xFFC425D4U, 0x0000004EU}, /* RGIDW_MODID[400]:IPMMURT111*/ + [379] = {0xFFC425D8U, 0x0000004EU}, /* RGIDW_MODID[401]:IPMMURT112*/ + [380] = {0xFFC425DCU, 0x0000004EU}, /* RGIDW_MODID[402]:IPMMURT113*/ + [381] = {0xFFC425E0U, 0x0000004EU}, /* RGIDW_MODID[403]:IPMMURT114*/ + [382] = {0xFFC425E4U, 0x0000004EU}, /* RGIDW_MODID[404]:IPMMURT115*/ + [383] = {0xFFC425E8U, 0x0000004EU}, /* RGIDW_MODID[405]:IPMMURT102*/ + [384] = {0xFFC425ECU, 0x0000004EU}, /* RGIDW_MODID[406]:IPMMURT103*/ + [385] = {0xFFC425F0U, 0x0000004EU}, /* RGIDW_MODID[407]:IPMMURT104*/ + [386] = {0xFFC425F4U, 0x0000004EU}, /* RGIDW_MODID[408]:IPMMURT105*/ + [387] = {0xFFC425F8U, 0x0000004EU}, /* RGIDW_MODID[409]:IPMMURT106*/ + [388] = {0xFFC425FCU, 0x0000004EU}, /* RGIDW_MODID[410]:IPMMURT107*/ + [389] = {0xFFC42600U, 0x0000004BU}, /* RGIDW_MODID[411]:RTDM000*/ + [390] = {0xFFC42604U, 0x0000004BU}, /* RGIDW_MODID[412]:RTDM001*/ + [391] = {0xFFC42608U, 0x0000004BU}, /* RGIDW_MODID[413]:RTDM010*/ + [392] = {0xFFC4260CU, 0x0000004BU}, /* RGIDW_MODID[414]:RTDM011*/ + [393] = {0xFFC42610U, 0x0000004BU}, /* RGIDW_MODID[415]:RTDM012*/ + [394] = {0xFFC42614U, 0x0000004BU}, /* RGIDW_MODID[416]:RTDM013*/ + [395] = {0xFFC42618U, 0x0000004BU}, /* RGIDW_MODID[417]:RTDM014*/ + [396] = {0xFFC4261CU, 0x0000004BU}, /* RGIDW_MODID[418]:RTDM015*/ + [397] = {0xFFC42620U, 0x0000004BU}, /* RGIDW_MODID[419]:RTDM002*/ + [398] = {0xFFC42624U, 0x0000004BU}, /* RGIDW_MODID[420]:RTDM003*/ + [399] = {0xFFC42628U, 0x0000004BU}, /* RGIDW_MODID[421]:RTDM004*/ + [400] = {0xFFC4262CU, 0x0000004BU}, /* RGIDW_MODID[422]:RTDM005*/ + [401] = {0xFFC42630U, 0x0000004BU}, /* RGIDW_MODID[423]:RTDM006*/ + [402] = {0xFFC42634U, 0x0000004BU}, /* RGIDW_MODID[424]:RTDM007*/ + [403] = {0xFFC42638U, 0x0000004BU}, /* RGIDW_MODID[425]:RTDM008*/ + [404] = {0xFFC4263CU, 0x0000004BU}, /* RGIDW_MODID[426]:RTDM009*/ + [405] = {0xFFC42640U, 0x0000004BU}, /* RGIDW_MODID[427]:RTDM100*/ + [406] = {0xFFC42644U, 0x0000004BU}, /* RGIDW_MODID[428]:RTDM101*/ + [407] = {0xFFC42648U, 0x0000004BU}, /* RGIDW_MODID[429]:RTDM110*/ + [408] = {0xFFC4264CU, 0x0000004BU}, /* RGIDW_MODID[430]:RTDM111*/ + [409] = {0xFFC42650U, 0x0000004BU}, /* RGIDW_MODID[431]:RTDM112*/ + [410] = {0xFFC42654U, 0x0000004BU}, /* RGIDW_MODID[432]:RTDM113*/ + [411] = {0xFFC42658U, 0x0000004BU}, /* RGIDW_MODID[433]:RTDM114*/ + [412] = {0xFFC4265CU, 0x0000004BU}, /* RGIDW_MODID[434]:RTDM115*/ + [413] = {0xFFC42660U, 0x0000004BU}, /* RGIDW_MODID[435]:RTDM102*/ + [414] = {0xFFC42664U, 0x0000004BU}, /* RGIDW_MODID[436]:RTDM103*/ + [415] = {0xFFC42668U, 0x0000004BU}, /* RGIDW_MODID[437]:RTDM104*/ + [416] = {0xFFC4266CU, 0x0000004BU}, /* RGIDW_MODID[438]:RTDM105*/ + [417] = {0xFFC42670U, 0x0000004BU}, /* RGIDW_MODID[439]:RTDM106*/ + [418] = {0xFFC42674U, 0x0000004BU}, /* RGIDW_MODID[440]:RTDM107*/ + [419] = {0xFFC42678U, 0x0000004BU}, /* RGIDW_MODID[441]:RTDM108*/ + [420] = {0xFFC4267CU, 0x0000004BU}, /* RGIDW_MODID[442]:RTDM109*/ + [421] = {0xFFC42700U, 0x0000004EU}, /* RGIDW_MODID[443]:IPMMURT108*/ + [422] = {0xFFC42704U, 0x0000004EU}, /* RGIDW_MODID[444]:IPMMURT109*/ + [423] = {0xFFC42708U, 0x00000001U}, /* RGIDW_MODID[445]:SYSRAM01*/ + [424] = {0xFFC4270CU, 0x0000000BU}, /* RGIDW_MODID[446]:SYSRAM02*/ + [425] = {0xFFC42710U, 0x00000001U}, /* RGIDW_MODID[447]:SYSRAM03*/ + [426] = {0xFFC42714U, 0x00000001U}, /* RGIDW_MODID[448]:SYSRAM04*/ + [427] = {0xFFC42718U, 0x00000001U}, /* RGIDW_MODID[449]:SYSRAM05*/ + [428] = {0xFFC4271CU, 0x00000001U}, /* RGIDW_MODID[450]:SYSRAM06*/ + [429] = {0xFFC42720U, 0x00000000U}, /* RGIDW_MODID[451]:SYSRAM07*/ + [430] = {0xFFC42724U, 0x0000000BU}, /* RGIDW_MODID[452]:SYSRAM11*/ + [431] = {0xFFC42728U, 0x0000000AU}, /* RGIDW_MODID[453]:SYSRAM12*/ + [432] = {0xFFC4272CU, 0x0000000BU}, /* RGIDW_MODID[454]:SYSRAM13*/ + [433] = {0xFFC42730U, 0x0000000BU}, /* RGIDW_MODID[455]:SYSRAM14*/ + [434] = {0xFFC42734U, 0x0000000BU}, /* RGIDW_MODID[456]:SYSRAM15*/ + [435] = {0xFFC42738U, 0x0000000BU}, /* RGIDW_MODID[457]:SYSRAM16*/ + [436] = {0xFFC4273CU, 0x00000000U}, /* RGIDW_MODID[458]:SYSRAM17*/ + [437] = {0xFFC42760U, 0x00000002U}, /* RGIDW_MODID[459]:BKBUF*/ + [438] = {0xFFC42764U, 0x00000003U}, /* RGIDW_MODID[460]:AXICR52SS1*/ + [439] = {0xFFC42768U, 0x00000003U}, /* RGIDW_MODID[461]:AXICR52SS2*/ + [440] = {0xFF862400U, 0x00000002U}, /* RGIDW_MODID[462]:ARSC0*/ + /* After setting */ /* RGIDW_MODID[463]:ARSC1*/ + /* After setting */ /* RGIDW_MODID[464]:ARSC2*/ + [441] = {0xFF86240CU, 0x00000001U}, /* RGIDW_MODID[465]:ARSC3*/ + [442] = {0xFF862410U, 0x00000002U}, /* RGIDW_MODID[466]:ARSC4*/ + [443] = {0xFF862414U, 0x00000001U}, /* RGIDW_MODID[467]:ARSC5*/ + [444] = {0xFF862418U, 0x00000002U}, /* RGIDW_MODID[468]:ARSC6*/ + [445] = {0xFF86241CU, 0x00000002U}, /* RGIDW_MODID[469]:ARSC7*/ + [446] = {0xFF862420U, 0x00000000U}, /* RGIDW_MODID[470]:ARSC8*/ + [447] = {0xFF862424U, 0x00000002U}, /* RGIDW_MODID[471]:ARSTM0*/ + /* After setting */ /* RGIDW_MODID[472]:ARSTM1*/ + [448] = {0xFF86242CU, 0x0000000EU}, /* RGIDW_MODID[473]:CSD1S*/ + [449] = {0xFF862430U, 0x0000000EU}, /* RGIDW_MODID[474]:AXIFBABUSTOP0*/ + /* After setting */ /* RGIDW_MODID[475]:ARSTM2*/ + [450] = {0xFF86243CU, 0x00000001U}, /* RGIDW_MODID[476]:ARSTM3*/ + [451] = {0xFF862440U, 0x00000002U}, /* RGIDW_MODID[477]:ARSTM4*/ + [452] = {0xFF862444U, 0x00000001U}, /* RGIDW_MODID[478]:ARSTM5*/ + [453] = {0xFF862448U, 0x00000002U}, /* RGIDW_MODID[479]:ARSTM6*/ + [454] = {0xFF86244CU, 0x00000002U}, /* RGIDW_MODID[480]:ARSTM7*/ + [455] = {0xFF862450U, 0x00000000U}, /* RGIDW_MODID[481]:ARSTM8*/ + [456] = {0xFF862454U, 0x0000000AU}, /* RGIDW_MODID[482]:ECMTOP*/ + [457] = {0xFF862458U, 0x0000000EU}, /* RGIDW_MODID[483]:FBA*/ + [458] = {0xFF86245CU, 0x0000000EU}, /* RGIDW_MODID[484]:FBC*/ + [459] = {0xFF862434U, 0x0000000CU}, /* RGIDW_MODID[485]:AXICCI00*/ + [460] = {0xFF862460U, 0x0000000EU}, /* RGIDW_MODID[486]:AXICCI01*/ + [461] = {0xFF862464U, 0x0000000CU}, /* RGIDW_MODID[487]:AXICCI10*/ + [462] = {0xFF862468U, 0x0000000CU}, /* RGIDW_MODID[488]:AXICCI11*/ + [463] = {0xFF86246CU, 0x0000000CU}, /* RGIDW_MODID[489]:AXICCI12*/ + [464] = {0xFF862470U, 0x0000000CU}, /* RGIDW_MODID[490]:AXICCI13*/ + [465] = {0xFF862474U, 0x0000000CU}, /* RGIDW_MODID[491]:AXICCI14*/ + [466] = {0xFF862478U, 0x0000000CU}, /* RGIDW_MODID[492]:AXICCI15*/ + [467] = {0xFF86247CU, 0x0000000EU}, /* RGIDW_MODID[493]:AXICCI2*/ + [468] = {0xFF862480U, 0x0000000CU}, /* RGIDW_MODID[494]:AXICCI3*/ + [469] = {0xFF862484U, 0x0000000CU}, /* RGIDW_MODID[495]:AXICCI4*/ + [470] = {0xFF862488U, 0x0000000CU}, /* RGIDW_MODID[496]:AXICCI5*/ + [471] = {0xFF86248CU, 0x0000000CU}, /* RGIDW_MODID[497]:AXICCI6*/ + [472] = {0xFF862490U, 0x0000000CU}, /* RGIDW_MODID[498]:AXICCI7*/ + [473] = {0xFF862494U, 0x0000000CU}, /* RGIDW_MODID[499]:AXICCI8*/ + [474] = {0xFF862498U, 0x00000009U}, /* RGIDW_MODID[500]:AXICCI9*/ + [475] = {0xFF8624A0U, 0x0000000AU}, /* RGIDW_MODID[501]:ECMSTM*/ + [476] = {0xE7782400U, 0x0000002CU}, /* RGIDW_MODID[502]:DMASSI00*/ + [477] = {0xE7782404U, 0x0000002CU}, /* RGIDW_MODID[503]:DMASSI01*/ + [478] = {0xE7782408U, 0x0000002CU}, /* RGIDW_MODID[504]:DMASSI02*/ + [479] = {0xE778240CU, 0x0000002CU}, /* RGIDW_MODID[505]:DMASSI03*/ + [480] = {0xE7782410U, 0x0000002CU}, /* RGIDW_MODID[506]:DMASSI04*/ + [481] = {0xE7782414U, 0x0000004EU}, /* RGIDW_MODID[507]:DMAI2C0*/ + [482] = {0xE7782418U, 0x0000004EU}, /* RGIDW_MODID[508]:DMAI2C1*/ + [483] = {0xE778241CU, 0x0000004EU}, /* RGIDW_MODID[509]:DMAI2C2*/ + [484] = {0xE7782420U, 0x0000004EU}, /* RGIDW_MODID[510]:DMAI2C3*/ + [485] = {0xE778242CU, 0x0000002CU}, /* RGIDW_MODID[511]:DMASSI05*/ + [486] = {0xE7782430U, 0x0000002CU}, /* RGIDW_MODID[512]:DMASSI06*/ + [487] = {0xE7782434U, 0x0000002CU}, /* RGIDW_MODID[513]:DMASSI07*/ + [488] = {0xE67C2400U, 0x00000002U}, /* RGIDW_MODID[514]:ARMM*/ + /* After setting */ /* RGIDW_MODID[515]:AXIARNMM*/ + [489] = {0xE67C2408U, 0x00000002U}, /* RGIDW_MODID[516]:ARSM0*/ + /* After setting */ /* RGIDW_MODID[517]:ARSM1*/ + /* After setting */ /* RGIDW_MODID[518]:ARSM2*/ + [490] = {0xE67C2414U, 0x0000000FU}, /* RGIDW_MODID[519]:AXIQOS0*/ + [491] = {0xE67C2418U, 0x0000000FU}, /* RGIDW_MODID[520]:AXIQOS1*/ + [492] = {0xE67C241CU, 0x0000000FU}, /* RGIDW_MODID[521]:AXIQOS2*/ + [493] = {0xE67C2420U, 0x0000000FU}, /* RGIDW_MODID[522]:AXIQOS3*/ + [494] = {0xE67C2424U, 0x0000000FU}, /* RGIDW_MODID[523]:AXIQOS4*/ + [495] = {0xE67C2428U, 0x0000000FU}, /* RGIDW_MODID[524]:AXIQOS5*/ + [496] = {0xE67C2434U, 0x00000001U}, /* RGIDW_MODID[525]:ARSM3*/ + [497] = {0xE67C2438U, 0x00000002U}, /* RGIDW_MODID[526]:ARSM4*/ + [498] = {0xE67C243CU, 0x00000001U}, /* RGIDW_MODID[527]:ARSM5*/ + [499] = {0xE67C2440U, 0x00000002U}, /* RGIDW_MODID[528]:ARSM6*/ + [500] = {0xE67C2444U, 0x00000002U}, /* RGIDW_MODID[529]:ARSM7*/ + [501] = {0xE67C2448U, 0x00000000U}, /* RGIDW_MODID[530]:ARSM8*/ + [502] = {0xE67C244CU, 0x0000000BU}, /* RGIDW_MODID[531]:AXMM0*/ + [503] = {0xE67C2450U, 0x0000000BU}, /* RGIDW_MODID[532]:AXMM1*/ + [504] = {0xE67C2454U, 0x00000000U}, /* RGIDW_MODID[533]:AXMMPMON*/ + [505] = {0xE67C2458U, 0x0000000AU}, /* RGIDW_MODID[534]:CKMMM*/ + [506] = {0xE67C245CU, 0x0000000AU}, /* RGIDW_MODID[535]:ECMMM*/ + [507] = {0xE67C2460U, 0x0000000EU}, /* RGIDW_MODID[536]:FBADBSC0*/ + [508] = {0xE67C2468U, 0x0000000EU}, /* RGIDW_MODID[537]:FBAMM*/ + [509] = {0xE67C246CU, 0x0000004EU}, /* RGIDW_MODID[538]:IPMMUMM00*/ + [510] = {0xE67C2470U, 0x0000000FU}, /* RGIDW_MODID[539]:DBS0A0*/ + [511] = {0xE67C2474U, 0x0000000AU}, /* RGIDW_MODID[540]:DBS0A1*/ + [512] = {0xE67C2484U, 0x00000009U}, /* RGIDW_MODID[541]:FCPRC*/ + [513] = {0xE67C2488U, 0x0000000FU}, /* RGIDW_MODID[542]:DBS0D0*/ + [514] = {0xE67C248CU, 0x0000000AU}, /* RGIDW_MODID[543]:DBS0D1*/ + [515] = {0xE67C2498U, 0x0000000EU}, /* RGIDW_MODID[544]:FBADDR*/ + [516] = {0xE67C249CU, 0x0000004EU}, /* RGIDW_MODID[545]:IPMMUMM01*/ + [517] = {0xE67C24A0U, 0x0000004EU}, /* RGIDW_MODID[546]:IPMMUMM10*/ + [518] = {0xE67C24A4U, 0x0000004EU}, /* RGIDW_MODID[547]:IPMMUMM11*/ + [519] = {0xE67C24A8U, 0x0000004EU}, /* RGIDW_MODID[548]:IPMMUMM12*/ + [520] = {0xE67C24ACU, 0x0000004EU}, /* RGIDW_MODID[549]:IPMMUMM13*/ + [521] = {0xE67C24B0U, 0x0000004EU}, /* RGIDW_MODID[550]:IPMMUMM14*/ + [522] = {0xE67C24B4U, 0x0000004EU}, /* RGIDW_MODID[551]:IPMMUMM15*/ + [523] = {0xE67C24B8U, 0x0000004EU}, /* RGIDW_MODID[552]:IPMMUMM02*/ + [524] = {0xE67C24BCU, 0x0000004EU}, /* RGIDW_MODID[553]:IPMMUMM03*/ + [525] = {0xE67C24C0U, 0x0000004EU}, /* RGIDW_MODID[554]:IPMMUMM04*/ + [526] = {0xE67C24C4U, 0x0000004EU}, /* RGIDW_MODID[555]:IPMMUMM05*/ + [527] = {0xE67C24C8U, 0x0000004EU}, /* RGIDW_MODID[556]:IPMMUMM06*/ + [528] = {0xE67C24CCU, 0x0000004EU}, /* RGIDW_MODID[557]:IPMMUMM07*/ + [529] = {0xE67C24D0U, 0x0000004EU}, /* RGIDW_MODID[558]:IPMMUMM08*/ + [530] = {0xE67C24D4U, 0x0000004EU}, /* RGIDW_MODID[559]:IPMMUMM09*/ + [531] = {0xFF802400U, 0x00000002U}, /* RGIDW_MODID[560]:ARSN0*/ + /* After setting */ /* RGIDW_MODID[561]:ARSN1*/ + /* After setting */ /* RGIDW_MODID[562]:ARSN2*/ + [532] = {0xFF80240CU, 0x00000001U}, /* RGIDW_MODID[563]:ARSN3*/ + [533] = {0xFF802410U, 0x00000002U}, /* RGIDW_MODID[564]:ARSN4*/ + [534] = {0xFF802414U, 0x00000001U}, /* RGIDW_MODID[565]:ARSN5*/ + [535] = {0xFF802418U, 0x00000002U}, /* RGIDW_MODID[566]:ARSN6*/ + [536] = {0xFF80241CU, 0x00000002U}, /* RGIDW_MODID[567]:ARSN7*/ + [537] = {0xFF802420U, 0x00000000U}, /* RGIDW_MODID[568]:ARSN8*/ + [538] = {0xFF802424U, 0x0000000AU}, /* RGIDW_MODID[569]:ECMTOP3*/ + [539] = {0xE7752400U, 0x00000002U}, /* RGIDW_MODID[570]:ARSD00*/ + /* After setting */ /* RGIDW_MODID[571]:ARSD01*/ + /* After setting */ /* RGIDW_MODID[572]:ARSD02*/ + [540] = {0xE775240CU, 0x00000001U}, /* RGIDW_MODID[573]:ARSD03*/ + [541] = {0xE7752410U, 0x00000002U}, /* RGIDW_MODID[574]:ARSD04*/ + [542] = {0xE7752414U, 0x00000001U}, /* RGIDW_MODID[575]:ARSD05*/ + [543] = {0xE7752418U, 0x00000002U}, /* RGIDW_MODID[576]:ARSD06*/ + [544] = {0xE775241CU, 0x0000004AU}, /* RGIDW_MODID[577]:AXIFRAY*/ + [545] = {0xE7752428U, 0x0000004FU}, /* RGIDW_MODID[578]:AXIRPC*/ + [546] = {0xE775242CU, 0x0000000FU}, /* RGIDW_MODID[579]:AXISDHI0*/ + [547] = {0xE7752430U, 0x00000002U}, /* RGIDW_MODID[580]:ARSD07*/ + [548] = {0xE7752434U, 0x00000000U}, /* RGIDW_MODID[581]:ARSD08*/ + [549] = {0xE7752438U, 0x00000002U}, /* RGIDW_MODID[582]:ARSP00*/ + /* After setting */ /* RGIDW_MODID[583]:ARSP01*/ + /* After setting */ /* RGIDW_MODID[584]:ARSP02*/ + [550] = {0xE7752444U, 0x00000001U}, /* RGIDW_MODID[585]:ARSP03*/ + [551] = {0xE7752448U, 0x00000002U}, /* RGIDW_MODID[586]:ARSP04*/ + [552] = {0xE775244CU, 0x00000001U}, /* RGIDW_MODID[587]:ARSP05*/ + [553] = {0xE7752450U, 0x00000002U}, /* RGIDW_MODID[588]:ARSP06*/ + [554] = {0xE7752454U, 0x00000002U}, /* RGIDW_MODID[589]:ARSP07*/ + [555] = {0xE7752458U, 0x00000000U}, /* RGIDW_MODID[590]:ARSP08*/ + [556] = {0xE775245CU, 0x0000004EU}, /* RGIDW_MODID[591]:IPMMUDS001*/ + [557] = {0xE7752460U, 0x0000000AU}, /* RGIDW_MODID[592]:CKMPER0*/ + [558] = {0xE7752464U, 0x0000000AU}, /* RGIDW_MODID[593]:ECMPER0*/ + [559] = {0xE7752468U, 0x0000000EU}, /* RGIDW_MODID[594]:FBAPER0*/ + [560] = {0xE775246CU, 0x0000004EU}, /* RGIDW_MODID[595]:FSO0*/ + [561] = {0xE7752470U, 0x0000004EU}, /* RGIDW_MODID[596]:FSO1*/ + [562] = {0xE7752474U, 0x0000004EU}, /* RGIDW_MODID[597]:FSO10*/ + [563] = {0xE7752478U, 0x0000004EU}, /* RGIDW_MODID[598]:FSO2*/ + [564] = {0xE775247CU, 0x0000004EU}, /* RGIDW_MODID[599]:FSO3*/ + [565] = {0xE7752480U, 0x0000004EU}, /* RGIDW_MODID[600]:FSO4*/ + [566] = {0xE7752484U, 0x0000004EU}, /* RGIDW_MODID[601]:FSO5*/ + [567] = {0xE7752488U, 0x0000004EU}, /* RGIDW_MODID[602]:FSO6*/ + [568] = {0xE775248CU, 0x0000004EU}, /* RGIDW_MODID[603]:FSO7*/ + [569] = {0xE7752490U, 0x0000004EU}, /* RGIDW_MODID[604]:FSO8*/ + [570] = {0xE7752494U, 0x0000004EU}, /* RGIDW_MODID[605]:FSO9*/ + [571] = {0xE7752498U, 0x0000002CU}, /* RGIDW_MODID[606]:ADG*/ + [572] = {0xE775249CU, 0x0000000AU}, /* RGIDW_MODID[607]:ECMSD0*/ + [573] = {0xE77524A0U, 0x0000004EU}, /* RGIDW_MODID[608]:IPMMUDS010*/ + [574] = {0xE77524A4U, 0x0000004EU}, /* RGIDW_MODID[609]:IPMMUDS011*/ + [575] = {0xE77524A8U, 0x0000004EU}, /* RGIDW_MODID[610]:I2C0*/ + [576] = {0xE77524ACU, 0x0000004EU}, /* RGIDW_MODID[611]:I2C1*/ + [577] = {0xE77524B0U, 0x0000004EU}, /* RGIDW_MODID[612]:I2C2*/ + [578] = {0xE77524B4U, 0x0000004EU}, /* RGIDW_MODID[613]:I2C3*/ + [579] = {0xE77524C0U, 0x0000004EU}, /* RGIDW_MODID[614]:IPMMUDS012*/ + [580] = {0xE77524C8U, 0x0000004EU}, /* RGIDW_MODID[615]:IPMMUDS000*/ + [581] = {0xE77524CCU, 0x0000004EU}, /* RGIDW_MODID[616]:IPMMUDS013*/ + [582] = {0xE77524D0U, 0x0000004EU}, /* RGIDW_MODID[617]:IPMMUDS014*/ + [583] = {0xE77524D4U, 0x0000004EU}, /* RGIDW_MODID[618]:IPMMUDS015*/ + [584] = {0xE77524D8U, 0x0000004EU}, /* RGIDW_MODID[619]:IPMMUDS002*/ + [585] = {0xE77524DCU, 0x0000004EU}, /* RGIDW_MODID[620]:IPMMUDS003*/ + [586] = {0xE77524E0U, 0x0000004EU}, /* RGIDW_MODID[621]:IPMMUDS004*/ + [587] = {0xE77524E4U, 0x0000004EU}, /* RGIDW_MODID[622]:IPMMUDS005*/ + [588] = {0xE77524E8U, 0x0000002CU}, /* RGIDW_MODID[623]:SSI*/ + [589] = {0xE77524ECU, 0x0000004EU}, /* RGIDW_MODID[624]:IPMMUDS006*/ + [590] = {0xE77524F0U, 0x0000004EU}, /* RGIDW_MODID[625]:IPMMUDS007*/ + [591] = {0xE77524F4U, 0x0000000CU}, /* RGIDW_MODID[626]:SYDM1P*/ + [592] = {0xE77524F8U, 0x0000004EU}, /* RGIDW_MODID[627]:IPMMUDS008*/ + [593] = {0xE77524FCU, 0x0000000CU}, /* RGIDW_MODID[628]:SYDM2P*/ + [594] = {0xE7752500U, 0x0000004EU}, /* RGIDW_MODID[629]:IPMMUDS009*/ + [595] = {0xE7752640U, 0x0000000CU}, /* RGIDW_MODID[630]:SYDM100*/ + [596] = {0xE7752644U, 0x0000000CU}, /* RGIDW_MODID[631]:SYDM101*/ + [597] = {0xE7752648U, 0x0000000CU}, /* RGIDW_MODID[632]:SYDM110*/ + [598] = {0xE775264CU, 0x0000000CU}, /* RGIDW_MODID[633]:SYDM111*/ + [599] = {0xE7752650U, 0x0000000CU}, /* RGIDW_MODID[634]:SYDM112*/ + [600] = {0xE7752654U, 0x0000000CU}, /* RGIDW_MODID[635]:SYDM113*/ + [601] = {0xE7752658U, 0x0000000CU}, /* RGIDW_MODID[636]:SYDM114*/ + [602] = {0xE775265CU, 0x0000000CU}, /* RGIDW_MODID[637]:SYDM115*/ + [603] = {0xE7752660U, 0x0000000CU}, /* RGIDW_MODID[638]:SYDM102*/ + [604] = {0xE7752664U, 0x0000000CU}, /* RGIDW_MODID[639]:SYDM103*/ + [605] = {0xE7752668U, 0x0000000CU}, /* RGIDW_MODID[640]:SYDM104*/ + [606] = {0xE775266CU, 0x0000000CU}, /* RGIDW_MODID[641]:SYDM105*/ + [607] = {0xE7752670U, 0x0000000CU}, /* RGIDW_MODID[642]:SYDM106*/ + [608] = {0xE7752674U, 0x0000000CU}, /* RGIDW_MODID[643]:SYDM107*/ + [609] = {0xE7752678U, 0x0000000CU}, /* RGIDW_MODID[644]:SYDM108*/ + [610] = {0xE775267CU, 0x0000000CU}, /* RGIDW_MODID[645]:SYDM109*/ + [611] = {0xE7752680U, 0x0000000CU}, /* RGIDW_MODID[646]:SYDM200*/ + [612] = {0xE7752684U, 0x0000000CU}, /* RGIDW_MODID[647]:SYDM201*/ + [613] = {0xE7752688U, 0x0000000CU}, /* RGIDW_MODID[648]:SYDM210*/ + [614] = {0xE775268CU, 0x0000000CU}, /* RGIDW_MODID[649]:SYDM211*/ + [615] = {0xE7752690U, 0x0000000CU}, /* RGIDW_MODID[650]:SYDM212*/ + [616] = {0xE7752694U, 0x0000000CU}, /* RGIDW_MODID[651]:SYDM213*/ + [617] = {0xE7752698U, 0x0000000CU}, /* RGIDW_MODID[652]:SYDM214*/ + [618] = {0xE775269CU, 0x0000000CU}, /* RGIDW_MODID[653]:SYDM215*/ + [619] = {0xE77526A0U, 0x0000000CU}, /* RGIDW_MODID[654]:SYDM202*/ + [620] = {0xE77526A4U, 0x0000000CU}, /* RGIDW_MODID[655]:SYDM203*/ + [621] = {0xE77526A8U, 0x0000000CU}, /* RGIDW_MODID[656]:SYDM204*/ + [622] = {0xE77526ACU, 0x0000000CU}, /* RGIDW_MODID[657]:SYDM205*/ + [623] = {0xE77526B0U, 0x0000000CU}, /* RGIDW_MODID[658]:SYDM206*/ + [624] = {0xE77526B4U, 0x0000000CU}, /* RGIDW_MODID[659]:SYDM207*/ + [625] = {0xE77526B8U, 0x0000000CU}, /* RGIDW_MODID[660]:SYDM208*/ + [626] = {0xE77526BCU, 0x0000000CU}, /* RGIDW_MODID[661]:SYDM209*/ + [627] = {0xFE682400U, 0x00000002U}, /* RGIDW_MODID[662]:ARVC0*/ + /* After setting */ /* RGIDW_MODID[663]:ARVC1*/ + /* After setting */ /* RGIDW_MODID[664]:ARVC2*/ + [628] = {0xFE68240CU, 0x00000001U}, /* RGIDW_MODID[665]:ARVC3*/ + [629] = {0xFE682410U, 0x0000000EU}, /* RGIDW_MODID[666]:AXIFBABUSVC*/ + [630] = {0xFE682414U, 0x00000002U}, /* RGIDW_MODID[667]:ARVC4*/ + [631] = {0xFE682418U, 0x00000001U}, /* RGIDW_MODID[668]:ARVC5*/ + [632] = {0xFE68241CU, 0x00000002U}, /* RGIDW_MODID[669]:ARVC6*/ + [633] = {0xFE682420U, 0x00000002U}, /* RGIDW_MODID[670]:ARVC7*/ + [634] = {0xFE682424U, 0x00000000U}, /* RGIDW_MODID[671]:ARVC8*/ + [635] = {0xFE68242CU, 0x0000000AU}, /* RGIDW_MODID[672]:ECMVC0*/ + [636] = {0xFE682434U, 0x0000004EU}, /* RGIDW_MODID[673]:IMR0*/ + [637] = {0xFE682438U, 0x0000004EU}, /* RGIDW_MODID[674]:IMR1*/ + [638] = {0xFE68243CU, 0x0000004EU}, /* RGIDW_MODID[675]:IPMMUVC01*/ + [639] = {0xFE682440U, 0x0000004EU}, /* RGIDW_MODID[676]:IPMMUVC10*/ + [640] = {0xFE682444U, 0x0000000CU}, /* RGIDW_MODID[677]:IMS0*/ + [641] = {0xFE682448U, 0x0000000CU}, /* RGIDW_MODID[678]:IMS1*/ + [642] = {0xFE68244CU, 0x0000004EU}, /* RGIDW_MODID[679]:IPMMUVC00*/ + [643] = {0xFE682450U, 0x0000004EU}, /* RGIDW_MODID[680]:IPMMUVC11*/ + [644] = {0xFE682454U, 0x0000004EU}, /* RGIDW_MODID[681]:IPMMUVC12*/ + [645] = {0xFE682458U, 0x0000004EU}, /* RGIDW_MODID[682]:IPMMUVC13*/ + [646] = {0xFE68245CU, 0x0000004EU}, /* RGIDW_MODID[683]:IPMMUVC14*/ + [647] = {0xFE682460U, 0x0000004EU}, /* RGIDW_MODID[684]:IPMMUVC15*/ + [648] = {0xFE682464U, 0x0000004EU}, /* RGIDW_MODID[685]:IPMMUVC02*/ + [649] = {0xFE682468U, 0x0000004EU}, /* RGIDW_MODID[686]:IPMMUVC03*/ + [650] = {0xFE68246CU, 0x0000004EU}, /* RGIDW_MODID[687]:IPMMUVC04*/ + [651] = {0xFE682470U, 0x0000004EU}, /* RGIDW_MODID[688]:IPMMUVC05*/ + [652] = {0xFE682474U, 0x0000004EU}, /* RGIDW_MODID[689]:IPMMUVC06*/ + [653] = {0xFE682478U, 0x0000004EU}, /* RGIDW_MODID[690]:IPMMUVC07*/ + [654] = {0xFE68247CU, 0x0000004EU}, /* RGIDW_MODID[691]:IPMMUVC08*/ + [655] = {0xFE682480U, 0x0000004EU}, /* RGIDW_MODID[692]:IPMMUVC09*/ + [656] = {0xFE682484U, 0x00000028U}, /* RGIDW_MODID[693]:IV1ES*/ + [657] = {0xFEBE2400U, 0x0000004EU}, /* RGIDW_MODID[694]:CSITOP0*/ + [658] = {0xFEBE2404U, 0x00000002U}, /* RGIDW_MODID[695]:ARVI10*/ + /* After setting */ /* RGIDW_MODID[696]:ARVI11*/ + /* After setting */ /* RGIDW_MODID[697]:ARVI12*/ + [659] = {0xFEBE2410U, 0x00000001U}, /* RGIDW_MODID[698]:ARVI13*/ + [660] = {0xFEBE2414U, 0x00000002U}, /* RGIDW_MODID[699]:ARVI14*/ + [661] = {0xFEBE2418U, 0x00000001U}, /* RGIDW_MODID[700]:ARVI15*/ + [662] = {0xFEBE241CU, 0x00000002U}, /* RGIDW_MODID[701]:ARVI16*/ + [663] = {0xFEBE2420U, 0x00000002U}, /* RGIDW_MODID[702]:ARVI17*/ + [664] = {0xFEBE2424U, 0x00000000U}, /* RGIDW_MODID[703]:ARVI18*/ + [665] = {0xFEBE242CU, 0x0000004EU}, /* RGIDW_MODID[704]:CSITOP1*/ + [666] = {0xFEBE2434U, 0x0000004EU}, /* RGIDW_MODID[705]:DSITLINK0*/ + [667] = {0xFEBE243CU, 0x0000000AU}, /* RGIDW_MODID[706]:ECMVIO1*/ + [668] = {0xFEBE2444U, 0x0000004EU}, /* RGIDW_MODID[707]:IPMMUVI001*/ + [669] = {0xFEBE2448U, 0x0000000CU}, /* RGIDW_MODID[708]:FCPVX0*/ + [670] = {0xFEBE2458U, 0x0000004EU}, /* RGIDW_MODID[709]:IPMMUVI000*/ + [671] = {0xFEBE245CU, 0x0000004EU}, /* RGIDW_MODID[710]:IPMMUVI100*/ + [672] = {0xFEBE2460U, 0x0000004EU}, /* RGIDW_MODID[711]:IPMMUVI010*/ + [673] = {0xFEBE2464U, 0x0000004EU}, /* RGIDW_MODID[712]:IPMMUVI011*/ + [674] = {0xFEBE2468U, 0x0000004EU}, /* RGIDW_MODID[713]:VSPX0*/ + [675] = {0xFEBE2478U, 0x0000004EU}, /* RGIDW_MODID[714]:IPMMUVI012*/ + [676] = {0xFEBE247CU, 0x0000004EU}, /* RGIDW_MODID[715]:IPMMUVI013*/ + [677] = {0xFEBE2480U, 0x0000004EU}, /* RGIDW_MODID[716]:IPMMUVI014*/ + [678] = {0xFEBE2484U, 0x0000004EU}, /* RGIDW_MODID[717]:IPMMUVI015*/ + [679] = {0xFEBE2488U, 0x0000004EU}, /* RGIDW_MODID[718]:IPMMUVI002*/ + [680] = {0xFEBE248CU, 0x0000004EU}, /* RGIDW_MODID[719]:IPMMUVI003*/ + [681] = {0xFEBE2490U, 0x0000004EU}, /* RGIDW_MODID[720]:IPMMUVI004*/ + [682] = {0xFEBE2494U, 0x0000004EU}, /* RGIDW_MODID[721]:IPMMUVI005*/ + [683] = {0xFEBE2498U, 0x0000004EU}, /* RGIDW_MODID[722]:IPMMUVI006*/ + [684] = {0xFEBE249CU, 0x0000004EU}, /* RGIDW_MODID[723]:IPMMUVI007*/ + [685] = {0xFEBE24A0U, 0x0000004EU}, /* RGIDW_MODID[724]:IPMMUVI008*/ + [686] = {0xFEBE24A4U, 0x0000004EU}, /* RGIDW_MODID[725]:IPMMUVI009*/ + [687] = {0xFEBE24A8U, 0x0000004EU}, /* RGIDW_MODID[726]:IPMMUVI101*/ + [688] = {0xFEBE24ACU, 0x0000004EU}, /* RGIDW_MODID[727]:IPMMUVI110*/ + [689] = {0xFEBE24B0U, 0x0000004EU}, /* RGIDW_MODID[728]:IPMMUVI111*/ + [690] = {0xFEBE24B4U, 0x0000004EU}, /* RGIDW_MODID[729]:IPMMUVI112*/ + [691] = {0xFEBE24B8U, 0x0000004EU}, /* RGIDW_MODID[730]:IPMMUVI113*/ + [692] = {0xFEBE24BCU, 0x0000004EU}, /* RGIDW_MODID[731]:IPMMUVI114*/ + [693] = {0xFEBE24C0U, 0x0000004EU}, /* RGIDW_MODID[732]:IPMMUVI115*/ + [694] = {0xFEBE24C4U, 0x0000004EU}, /* RGIDW_MODID[733]:IPMMUVI102*/ + [695] = {0xFEBE24C8U, 0x0000004EU}, /* RGIDW_MODID[734]:IPMMUVI103*/ + [696] = {0xFEBE24CCU, 0x0000004EU}, /* RGIDW_MODID[735]:IPMMUVI104*/ + [697] = {0xFEBE24D0U, 0x0000004EU}, /* RGIDW_MODID[736]:IPMMUVI105*/ + [698] = {0xFEBE24D4U, 0x0000004EU}, /* RGIDW_MODID[737]:IPMMUVI106*/ + [699] = {0xFEBE24D8U, 0x0000004EU}, /* RGIDW_MODID[738]:IPMMUVI107*/ + [700] = {0xFEBE24DCU, 0x0000004EU}, /* RGIDW_MODID[739]:IPMMUVI108*/ + [701] = {0xFEBE24E0U, 0x0000004EU}, /* RGIDW_MODID[740]:IPMMUVI109*/ + [702] = {0xFEBE2504U, 0x0000000EU}, /* RGIDW_MODID[741]:AXIFBABUSVIO*/ + [703] = {0xFEBF2400U, 0x00000002U}, /* RGIDW_MODID[742]:ARVI0*/ + /* After setting */ /* RGIDW_MODID[743]:ARVI1*/ + /* After setting */ /* RGIDW_MODID[744]:ARVI2*/ + [704] = {0xFEBF240CU, 0x00000001U}, /* RGIDW_MODID[745]:ARVI3*/ + [705] = {0xFEBF2410U, 0x00000002U}, /* RGIDW_MODID[746]:ARVI4*/ + [706] = {0xFEBF2414U, 0x00000001U}, /* RGIDW_MODID[747]:ARVI5*/ + [707] = {0xFEBF2418U, 0x00000002U}, /* RGIDW_MODID[748]:ARVI6*/ + [708] = {0xFEBF241CU, 0x00000002U}, /* RGIDW_MODID[749]:ARVI7*/ + [709] = {0xFEBF2420U, 0x00000000U}, /* RGIDW_MODID[750]:ARVI8*/ + [710] = {0xFEBF2424U, 0x0000000AU}, /* RGIDW_MODID[751]:ECMVIO0*/ + [711] = {0xFEBF242CU, 0x0000004EU}, /* RGIDW_MODID[752]:ISP0*/ + [712] = {0xFEBF2428U, 0x0000004EU}, /* RGIDW_MODID[753]:ISP0CORE*/ + [713] = {0xFEBF2454U, 0x0000004EU}, /* RGIDW_MODID[754]:VIN00*/ + [714] = {0xFEBF2458U, 0x0000004EU}, /* RGIDW_MODID[755]:VIN01*/ + [715] = {0xFEBF245CU, 0x0000004EU}, /* RGIDW_MODID[756]:VIN02*/ + [716] = {0xFEBF2460U, 0x0000004EU}, /* RGIDW_MODID[757]:VIN03*/ + [717] = {0xFEBF2464U, 0x0000004EU}, /* RGIDW_MODID[758]:VIN04*/ + [718] = {0xFEBF2468U, 0x0000004EU}, /* RGIDW_MODID[759]:VIN05*/ + [719] = {0xFEBF246CU, 0x0000004EU}, /* RGIDW_MODID[760]:VIN06*/ + [720] = {0xFEBF2470U, 0x0000004EU}, /* RGIDW_MODID[761]:VIN07*/ + [721] = {0xFEBF2474U, 0x0000004EU}, /* RGIDW_MODID[762]:VIN10*/ + [722] = {0xFEBF2478U, 0x0000004EU}, /* RGIDW_MODID[763]:VIN11*/ + [723] = {0xFEBF247CU, 0x0000004EU}, /* RGIDW_MODID[764]:VIN12*/ + [724] = {0xFEBF2480U, 0x0000004EU}, /* RGIDW_MODID[765]:VIN13*/ + [725] = {0xFEBF2484U, 0x0000004EU}, /* RGIDW_MODID[766]:VIN14*/ + [726] = {0xFEBF2488U, 0x0000004EU}, /* RGIDW_MODID[767]:VIN15*/ + [727] = {0xFEBF248CU, 0x0000004EU}, /* RGIDW_MODID[768]:VIN16*/ + [728] = {0xFEBF2490U, 0x0000004EU}, /* RGIDW_MODID[769]:VIN17*/ + [729] = {0xE7B12400U, 0x00000002U}, /* RGIDW_MODID[770]:ARVIP00*/ + /* After setting */ /* RGIDW_MODID[771]:ARVIP01*/ + /* After setting */ /* RGIDW_MODID[772]:ARVIP02*/ + [730] = {0xE7B1240CU, 0x00000001U}, /* RGIDW_MODID[773]:ARVIP03*/ + [731] = {0xE7B12410U, 0x0000000EU}, /* RGIDW_MODID[774]:AXIFBABUSVIP0*/ + [732] = {0xE7B12414U, 0x00000002U}, /* RGIDW_MODID[775]:ARVIP04*/ + [733] = {0xE7B12418U, 0x00000001U}, /* RGIDW_MODID[776]:ARVIP05*/ + [734] = {0xE7B1241CU, 0x00000002U}, /* RGIDW_MODID[777]:ARVIP06*/ + [735] = {0xE7B12420U, 0x00000002U}, /* RGIDW_MODID[778]:ARVIP07*/ + [736] = {0xE7B12424U, 0x00000000U}, /* RGIDW_MODID[779]:ARVIP08*/ + [737] = {0xE7B1242CU, 0x0000000AU}, /* RGIDW_MODID[780]:ECMVIP0*/ + [738] = {0xE7B12430U, 0x0000004EU}, /* RGIDW_MODID[781]:IPMMUVIP000*/ + [739] = {0xE7B12438U, 0x0000004EU}, /* RGIDW_MODID[782]:SMPO0*/ + [740] = {0xE7B1243CU, 0x0000004EU}, /* RGIDW_MODID[783]:SMPS0*/ + [741] = {0xE7B12440U, 0x0000004EU}, /* RGIDW_MODID[784]:UMFL0*/ + [742] = {0xE7B12444U, 0x0000004EU}, /* RGIDW_MODID[785]:IPMMUVIP001*/ + [743] = {0xE7B12448U, 0x0000004EU}, /* RGIDW_MODID[786]:IPMMUVIP010*/ + [744] = {0xE7B1244CU, 0x0000004EU}, /* RGIDW_MODID[787]:IPMMUVIP011*/ + [745] = {0xE7B12450U, 0x0000004EU}, /* RGIDW_MODID[788]:UMFL0M_W*/ + [746] = {0xE7B12454U, 0x0000004EU}, /* RGIDW_MODID[789]:IPMMUVIP012*/ + [747] = {0xE7B12458U, 0x0000004EU}, /* RGIDW_MODID[790]:IPMMUVIP013*/ + [748] = {0xE7B1245CU, 0x0000004EU}, /* RGIDW_MODID[791]:IPMMUVIP014*/ + [749] = {0xE7B12460U, 0x0000004EU}, /* RGIDW_MODID[792]:IPMMUVIP015*/ + [750] = {0xE7B12464U, 0x0000004EU}, /* RGIDW_MODID[793]:IPMMUVIP002*/ + [751] = {0xE7B12468U, 0x0000004EU}, /* RGIDW_MODID[794]:IPMMUVIP003*/ + [752] = {0xE7B1246CU, 0x0000004EU}, /* RGIDW_MODID[795]:IPMMUVIP004*/ + [753] = {0xE7B12470U, 0x0000004EU}, /* RGIDW_MODID[796]:IPMMUVIP005*/ + [754] = {0xE7B12474U, 0x0000004EU}, /* RGIDW_MODID[797]:IPMMUVIP006*/ + [755] = {0xE7B12478U, 0x0000004EU}, /* RGIDW_MODID[798]:IPMMUVIP007*/ + [756] = {0xE7B1247CU, 0x0000004EU}, /* RGIDW_MODID[799]:IPMMUVIP008*/ + [757] = {0xE7B12480U, 0x0000004EU}, /* RGIDW_MODID[800]:IPMMUVIP009*/ + [758] = {0xFF8824A0U, 0x00000002U}, /* RGIDW_MODID[801]:ARDSP0*/ + /* After setting */ /* RGIDW_MODID[802]:ARDSP1*/ + /* After setting */ /* RGIDW_MODID[803]:ARDSP2*/ + [759] = {0xFF8824ACU, 0x00000001U}, /* RGIDW_MODID[804]:ARDSP3*/ + [760] = {0xFF8824B0U, 0x00000002U}, /* RGIDW_MODID[805]:ARDSP4*/ + [761] = {0xFF8824B4U, 0x00000001U}, /* RGIDW_MODID[806]:ARDSP5*/ + [762] = {0xFF8824B8U, 0x00000002U}, /* RGIDW_MODID[807]:ARDSP6*/ + [763] = {0xFF8824BCU, 0x00000002U}, /* RGIDW_MODID[808]:ARDSP7*/ + [764] = {0xFF8824C0U, 0x0000000AU}, /* RGIDW_MODID[809]:ECMDSP*/ + [765] = {0xFF882490U, 0x0000000CU}, /* RGIDW_MODID[810]:AXIDSP0*/ + [766] = {0xFF882494U, 0x0000000CU}, /* RGIDW_MODID[811]:AXIDSP1*/ + [767] = {0xFF882498U, 0x0000000CU}, /* RGIDW_MODID[812]:AXIDSP2*/ + [768] = {0xFF88249CU, 0x0000000CU}, /* RGIDW_MODID[813]:AXIDSP3*/ + [770] = {0xE67B969CU, 0x00000000U}, /* RGIDW_MODID[814]:ARCC*/ + [769] = {0xE67B96B0U, 0x00000000U}, /* RGIDW_MODID[815]:ARRTRAM*/ + [771] = {0xE7752424U, 0x00000000U}, /* RGIDW_MODID[816]:RSV0*/ + [772] = {0xE7B1250CU, 0x00000004U}, /* RGIDW_MODID[817]:PAP*/ + [773] = {0xFF8824C4U, 0x0000004EU}, /* RGIDW_MODID[818]:IMPM0100*/ + [774] = {0xFF8824C8U, 0x0000004EU}, /* RGIDW_MODID[819]:IMPM0101*/ + [775] = {0xFF8824CCU, 0x0000004EU}, /* RGIDW_MODID[820]:IMPM0102*/ + [776] = {0xFF8824D0U, 0x0000004EU}, /* RGIDW_MODID[821]:IMPM0103*/ + [777] = {0xFF8824D4U, 0x0000004EU}, /* RGIDW_MODID[822]:IMPM0104*/ + [778] = {0xFF8824D8U, 0x0000004EU}, /* RGIDW_MODID[823]:IMPM0105*/ + [779] = {0xFF8824DCU, 0x0000004EU}, /* RGIDW_MODID[824]:IMPM0106*/ + [780] = {0xFF8824E0U, 0x0000004EU}, /* RGIDW_MODID[825]:IMPM0107*/ + [781] = {0xFF8824E4U, 0x0000004EU}, /* RGIDW_MODID[826]:IMPM0200*/ + [782] = {0xFF8824E8U, 0x0000004EU}, /* RGIDW_MODID[827]:IMPM0201*/ + [783] = {0xFF8824ECU, 0x0000004EU}, /* RGIDW_MODID[828]:IMPS0000*/ + [784] = {0xFF8824F0U, 0x0000004EU}, /* RGIDW_MODID[829]:IMPS0001*/ + [785] = {0xFF8824F4U, 0x0000004EU}, /* RGIDW_MODID[830]:IMPS0002*/ + [786] = {0xFF8824F8U, 0x0000004EU}, /* RGIDW_MODID[831]:IMPS0003*/ + [787] = {0xFF8824FCU, 0x0000004EU}, /* RGIDW_MODID[832]:IMPS0100*/ + [788] = {0xFF882500U, 0x0000004EU}, /* RGIDW_MODID[833]:IMPS0101*/ + [789] = {0xFF882504U, 0x0000004EU}, /* RGIDW_MODID[834]:IMPS0102*/ + [790] = {0xFF882508U, 0x0000004EU}, /* RGIDW_MODID[835]:IMPS0103*/ + [791] = {0xFF88250CU, 0x0000004EU}, /* RGIDW_MODID[836]:IMPS0104*/ + [792] = {0xFF882510U, 0x0000004EU}, /* RGIDW_MODID[837]:IMPS0105*/ + [793] = {0xFF882514U, 0x0000004EU}, /* RGIDW_MODID[838]:IMPS0106*/ + [794] = {0xFF882518U, 0x0000004EU}, /* RGIDW_MODID[839]:IMPS0107*/ + [795] = {0xFF88251CU, 0x0000004EU}, /* RGIDW_MODID[840]:IMPS0108*/ + [796] = {0xFF882520U, 0x0000004EU}, /* RGIDW_MODID[841]:IMPS0109*/ + [797] = {0xFF882524U, 0x0000004EU}, /* RGIDW_MODID[842]:IMPS0110*/ + [798] = {0xFF882528U, 0x0000004EU}, /* RGIDW_MODID[843]:IMPS0111*/ + [799] = {0xFF88252CU, 0x0000004EU}, /* RGIDW_MODID[844]:IMPS0200*/ + [800] = {0xFF882530U, 0x0000004EU}, /* RGIDW_MODID[845]:IMPS0201*/ + [801] = {0xFF882534U, 0x0000004EU}, /* RGIDW_MODID[846]:IMPS0202*/ + [802] = {0xFEBD2428U, 0x0000000CU}, /* RGIDW_MODID[847]:DOC*/ + [803] = {0xFEBF2430U, 0x0000004EU}, /* RGIDW_MODID[848]:ISP1*/ + [804] = {0xE6002400U, 0x0000004EU}, /* RGIDW_MODID[849]:AVS*/ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_sec_tbl" +const REGION_ID_SETTING_TABLE g_rgid_sec_tbl[] = { + [0] = {0xFFC83400U, 0x00000000U}, /* SEC_MODID[0]:ARMGC0*/ + [1] = {0xFFC83404U, 0x00000002U}, /* SEC_MODID[1]:ARMGC1*/ + [2] = {0xFFC83408U, 0x00000002U}, /* SEC_MODID[2]:ARMGC2*/ + [3] = {0xFFC8340CU, 0x00000002U}, /* SEC_MODID[3]:ARRT00*/ + [4] = {0xFFC83410U, 0x00000002U}, /* SEC_MODID[4]:ARRT01*/ + [5] = {0xFFC83414U, 0x00000002U}, /* SEC_MODID[5]:ARRT02*/ + [6] = {0xFFC83418U, 0x00000002U}, /* SEC_MODID[6]:ARRT03*/ + [7] = {0xFFC8341CU, 0x00000002U}, /* SEC_MODID[7]:ARRT04*/ + [8] = {0xFFC83420U, 0x00000002U}, /* SEC_MODID[8]:ARRT05*/ + [9] = {0xFFC83424U, 0x00000002U}, /* SEC_MODID[9]:ARRT06*/ + [10] = {0xFFC83428U, 0x00000002U}, /* SEC_MODID[10]:ARRT07*/ + [11] = {0xFFC8342CU, 0x00000002U}, /* SEC_MODID[11]:ARRT08*/ + [12] = {0xFFC83430U, 0x00000000U}, /* SEC_MODID[12]:LIFEC0*/ + [13] = {0xFFC83434U, 0x00000002U}, /* SEC_MODID[13]:SWDT*/ + [14] = {0xFFC83438U, 0x00000002U}, /* SEC_MODID[14]:TMU0*/ + [15] = {0xFFC8343CU, 0x00000002U}, /* SEC_MODID[15]:WDT*/ + [16] = {0xFFC83440U, 0x00000002U}, /* SEC_MODID[16]:WWDT0*/ + [17] = {0xFFC83444U, 0x00000002U}, /* SEC_MODID[17]:WWDT1*/ + [18] = {0xFFC83448U, 0x00000002U}, /* SEC_MODID[18]:WWDT2*/ + [19] = {0xFFC8344CU, 0x00000002U}, /* SEC_MODID[19]:WWDT3*/ + [20] = {0xFFC83450U, 0x00000002U}, /* SEC_MODID[20]:WWDT4*/ + [21] = {0xFFC83454U, 0x00000002U}, /* SEC_MODID[21]:WWDT5*/ + [22] = {0xFFC83458U, 0x00000002U}, /* SEC_MODID[22]:WWDT6*/ + [23] = {0xFFC83468U, 0x00000002U}, /* SEC_MODID[23]:ECMRT3*/ + [24] = {0xE6003404U, 0x00000002U}, /* SEC_MODID[24]:APMU0*/ + [25] = {0xE6003408U, 0x00000002U}, /* SEC_MODID[25]:APMU1*/ + [26] = {0xE600340CU, 0x00000002U}, /* SEC_MODID[26]:APMU10*/ + [27] = {0xE6003410U, 0x00000002U}, /* SEC_MODID[27]:APMU11*/ + [28] = {0xE6003414U, 0x00000002U}, /* SEC_MODID[28]:APMU12*/ + [29] = {0xE6003418U, 0x00000002U}, /* SEC_MODID[29]:APMU13*/ + [30] = {0xE600341CU, 0x00000002U}, /* SEC_MODID[30]:APMU14*/ + [31] = {0xE6003420U, 0x00000002U}, /* SEC_MODID[31]:APMU15*/ + [32] = {0xE6003424U, 0x00000002U}, /* SEC_MODID[32]:APMU2*/ + [33] = {0xE6003428U, 0x00000002U}, /* SEC_MODID[33]:APMU3*/ + [34] = {0xE600342CU, 0x00000002U}, /* SEC_MODID[34]:APMU4*/ + [35] = {0xE6003430U, 0x00000002U}, /* SEC_MODID[35]:APMU5*/ + [36] = {0xE6003434U, 0x00000002U}, /* SEC_MODID[36]:APMU6*/ + [37] = {0xE6003438U, 0x00000002U}, /* SEC_MODID[37]:APMU7*/ + [38] = {0xE600343CU, 0x00000002U}, /* SEC_MODID[38]:APMU8*/ + [39] = {0xE6003440U, 0x00000002U}, /* SEC_MODID[39]:APMU9*/ + [40] = {0xE6003444U, 0x00000002U}, /* SEC_MODID[40]:ARS00*/ + [41] = {0xE6003448U, 0x00000002U}, /* SEC_MODID[41]:ARS01*/ + [42] = {0xE600344CU, 0x00000002U}, /* SEC_MODID[42]:ARS02*/ + [43] = {0xE6003450U, 0x00000002U}, /* SEC_MODID[43]:ARS03*/ + [44] = {0xE6003454U, 0x00000002U}, /* SEC_MODID[44]:ARS04*/ + [45] = {0xE6003458U, 0x00000002U}, /* SEC_MODID[45]:ARS05*/ + [46] = {0xE600345CU, 0x00000002U}, /* SEC_MODID[46]:ARS06*/ + [47] = {0xE6003460U, 0x00000002U}, /* SEC_MODID[47]:ARS07*/ + [48] = {0xE6003464U, 0x00000002U}, /* SEC_MODID[48]:ARS08*/ + [49] = {0xE6003468U, 0x00000002U}, /* SEC_MODID[49]:CMT0*/ + [50] = {0xE600346CU, 0x00000002U}, /* SEC_MODID[50]:CMT1*/ + [51] = {0xE6003470U, 0x00000002U}, /* SEC_MODID[51]:CMT2*/ + [52] = {0xE6003474U, 0x00000002U}, /* SEC_MODID[52]:CMT3*/ + [53] = {0xE6003478U, 0x00000002U}, /* SEC_MODID[53]:CKM*/ + [54] = {0xE600347CU, 0x00000002U}, /* SEC_MODID[54]:DBE*/ + [55] = {0xE6003480U, 0x00000002U}, /* SEC_MODID[55]:IRQC*/ + [56] = {0xE6003484U, 0x00000002U}, /* SEC_MODID[56]:ECMPS0*/ + [57] = {0xE6003488U, 0x00000002U}, /* SEC_MODID[57]:OTP0*/ + [58] = {0xE600348CU, 0x00000002U}, /* SEC_MODID[58]:OTP1*/ + [59] = {0xE600349CU, 0x00000002U}, /* SEC_MODID[59]:SCMT*/ + [60] = {0xE60034A8U, 0x00000002U}, /* SEC_MODID[60]:TSC1*/ + [61] = {0xE60034ACU, 0x00000002U}, /* SEC_MODID[61]:TSC2*/ + [62] = {0xE60034B8U, 0x00000002U}, /* SEC_MODID[62]:UCMT*/ + [63] = {0xE6003500U, 0x00000002U}, /* SEC_MODID[63]:CPG0*/ + [64] = {0xE6003504U, 0x00000002U}, /* SEC_MODID[64]:CPG1*/ + [65] = {0xE6003508U, 0x00000002U}, /* SEC_MODID[65]:CPG2*/ + [66] = {0xE600350CU, 0x00000002U}, /* SEC_MODID[66]:CPG3*/ + [67] = {0xE6003510U, 0x00000002U}, /* SEC_MODID[67]:PFC00*/ + [68] = {0xE6003514U, 0x00000002U}, /* SEC_MODID[68]:PFC01*/ + [69] = {0xE6003518U, 0x00000002U}, /* SEC_MODID[69]:PFC02*/ + [70] = {0xE600351CU, 0x00000002U}, /* SEC_MODID[70]:PFC03*/ + [71] = {0xE6003520U, 0x00000002U}, /* SEC_MODID[71]:PFC10*/ + [72] = {0xE6003524U, 0x00000002U}, /* SEC_MODID[72]:PFC11*/ + [73] = {0xE6003528U, 0x00000002U}, /* SEC_MODID[73]:PFC12*/ + [74] = {0xE600352CU, 0x00000002U}, /* SEC_MODID[74]:PFC13*/ + [75] = {0xE6003530U, 0x00000002U}, /* SEC_MODID[75]:PFC20*/ + [76] = {0xE6003534U, 0x00000002U}, /* SEC_MODID[76]:PFC21*/ + [77] = {0xE6003538U, 0x00000002U}, /* SEC_MODID[77]:PFC22*/ + [78] = {0xE600353CU, 0x00000002U}, /* SEC_MODID[78]:PFC23*/ + [79] = {0xE6003550U, 0x00000002U}, /* SEC_MODID[79]:PFCS0*/ + [80] = {0xE6003554U, 0x00000002U}, /* SEC_MODID[80]:PFCS1*/ + [81] = {0xE6003558U, 0x00000002U}, /* SEC_MODID[81]:PFCS2*/ + [82] = {0xE600355CU, 0x00000002U}, /* SEC_MODID[82]:PFCS3*/ + [83] = {0xE6003560U, 0x00000002U}, /* SEC_MODID[83]:RESET0*/ + [84] = {0xE6003564U, 0x00000002U}, /* SEC_MODID[84]:RESET1*/ + [85] = {0xE6003568U, 0x00000002U}, /* SEC_MODID[85]:RESET2*/ + [86] = {0xE600356CU, 0x00000002U}, /* SEC_MODID[86]:RESET3*/ + [87] = {0xE6003570U, 0x00000002U}, /* SEC_MODID[87]:SYS0*/ + [88] = {0xE6003574U, 0x00000002U}, /* SEC_MODID[88]:SYS1*/ + [89] = {0xE6003578U, 0x00000002U}, /* SEC_MODID[89]:SYS2*/ + [90] = {0xE600357CU, 0x00000002U}, /* SEC_MODID[90]:SYS3*/ + [91] = {0xE7763400U, 0x00000002U}, /* SEC_MODID[91]:DMAMSI0*/ + [92] = {0xE7763404U, 0x00000002U}, /* SEC_MODID[92]:DMAMSI1*/ + [93] = {0xE7763408U, 0x00000002U}, /* SEC_MODID[93]:DMAMSI2*/ + [94] = {0xE776340CU, 0x00000002U}, /* SEC_MODID[94]:DMAMSI3*/ + [95] = {0xE7763410U, 0x00000002U}, /* SEC_MODID[95]:DMAMSI4*/ + [96] = {0xE7763414U, 0x00000002U}, /* SEC_MODID[96]:DMAMSI5*/ + [97] = {0xE7763418U, 0x00000002U}, /* SEC_MODID[97]:ECMSP3*/ + [98] = {0xE7763424U, 0x00000002U}, /* SEC_MODID[98]:ARSP30*/ + [99] = {0xE7763428U, 0x00000002U}, /* SEC_MODID[99]:ARSP31*/ + [100] = {0xE776342CU, 0x00000002U}, /* SEC_MODID[100]:ARSP32*/ + [101] = {0xE7763430U, 0x00000002U}, /* SEC_MODID[101]:ARSP33*/ + [102] = {0xE7763434U, 0x00000002U}, /* SEC_MODID[102]:ARSP34*/ + [103] = {0xE7763438U, 0x00000002U}, /* SEC_MODID[103]:ARSP35*/ + [104] = {0xE776343CU, 0x00000002U}, /* SEC_MODID[104]:ARSP36*/ + [105] = {0xE7763440U, 0x00000002U}, /* SEC_MODID[105]:ARSP37*/ + [106] = {0xE7763444U, 0x00000002U}, /* SEC_MODID[106]:ARSP38*/ + [107] = {0xE7763448U, 0x00000002U}, /* SEC_MODID[107]:MSI0*/ + [108] = {0xE776344CU, 0x00000002U}, /* SEC_MODID[108]:MSI1*/ + [109] = {0xE7763450U, 0x00000002U}, /* SEC_MODID[109]:MSI2*/ + [110] = {0xE7763454U, 0x00000002U}, /* SEC_MODID[110]:MSI3*/ + [111] = {0xE7763458U, 0x00000002U}, /* SEC_MODID[111]:MSI4*/ + [112] = {0xE776345CU, 0x00000002U}, /* SEC_MODID[112]:MSI5*/ + [113] = {0xE7793400U, 0x00000002U}, /* SEC_MODID[113]:ARSP40*/ + [114] = {0xE7793404U, 0x00000002U}, /* SEC_MODID[114]:ARSP41*/ + [115] = {0xE7793408U, 0x00000002U}, /* SEC_MODID[115]:ARSP42*/ + [116] = {0xE779340CU, 0x00000002U}, /* SEC_MODID[116]:ARSP43*/ + [117] = {0xE7793410U, 0x00000002U}, /* SEC_MODID[117]:ARSP44*/ + [118] = {0xE7793414U, 0x00000002U}, /* SEC_MODID[118]:ARSP45*/ + [119] = {0xE7793418U, 0x00000002U}, /* SEC_MODID[119]:ARSP46*/ + [120] = {0xE779341CU, 0x00000002U}, /* SEC_MODID[120]:ARSP47*/ + [121] = {0xE7793420U, 0x00000002U}, /* SEC_MODID[121]:ARSP48*/ + [122] = {0xE7793424U, 0x00000002U}, /* SEC_MODID[122]:DMAHSCIF0*/ + [123] = {0xE7793428U, 0x00000002U}, /* SEC_MODID[123]:DMAHSCIF1*/ + [124] = {0xE779342CU, 0x00000002U}, /* SEC_MODID[124]:DMAHSCIF2*/ + [125] = {0xE7793430U, 0x00000002U}, /* SEC_MODID[125]:DMAHSCIF3*/ + [126] = {0xE7793434U, 0x00000002U}, /* SEC_MODID[126]:DMASCIF0*/ + [127] = {0xE7793438U, 0x00000002U}, /* SEC_MODID[127]:DMASCIF1*/ + [128] = {0xE779343CU, 0x00000002U}, /* SEC_MODID[128]:DMASCIF3*/ + [129] = {0xE7793440U, 0x00000002U}, /* SEC_MODID[129]:DMASCIF4*/ + [130] = {0xE7793444U, 0x00000002U}, /* SEC_MODID[130]:ECMSP4*/ + [131] = {0xE7793448U, 0x00000002U}, /* SEC_MODID[131]:HSCIF0*/ + [132] = {0xE779344CU, 0x00000002U}, /* SEC_MODID[132]:HSCIF1*/ + [133] = {0xE7793450U, 0x00000002U}, /* SEC_MODID[133]:HSCIF2*/ + [134] = {0xE7793454U, 0x00000002U}, /* SEC_MODID[134]:HSCIF3*/ + [135] = {0xE7793458U, 0x00000002U}, /* SEC_MODID[135]:SCIF0*/ + [136] = {0xE779345CU, 0x00000002U}, /* SEC_MODID[136]:SCIF1*/ + [137] = {0xE7793460U, 0x00000002U}, /* SEC_MODID[137]:SCIF3*/ + [138] = {0xE7793464U, 0x00000002U}, /* SEC_MODID[138]:SCIF4*/ + [139] = {0xE7793468U, 0x00000002U}, /* SEC_MODID[139]:TMU1*/ + [140] = {0xE779346CU, 0x00000002U}, /* SEC_MODID[140]:TMU2*/ + [141] = {0xE7793470U, 0x00000002U}, /* SEC_MODID[141]:TMU3*/ + [142] = {0xE7793474U, 0x00000002U}, /* SEC_MODID[142]:TMU4*/ + [143] = {0xE7793478U, 0x00000002U}, /* SEC_MODID[143]:CANFD*/ + [144] = {0xE779347CU, 0x00000002U}, /* SEC_MODID[144]:DMACANFD*/ + [145] = {0xE7793480U, 0x00000002U}, /* SEC_MODID[145]:DMATPU0*/ + [146] = {0xE7793484U, 0x00000002U}, /* SEC_MODID[146]:PWM0*/ + [147] = {0xE7793488U, 0x00000002U}, /* SEC_MODID[147]:PWM1*/ + [148] = {0xE779348CU, 0x00000002U}, /* SEC_MODID[148]:PWM2*/ + [149] = {0xE7793490U, 0x00000002U}, /* SEC_MODID[149]:PWM3*/ + [150] = {0xE7793494U, 0x00000002U}, /* SEC_MODID[150]:PWM4*/ + [151] = {0xE77934ACU, 0x00000002U}, /* SEC_MODID[151]:TPU0*/ + [152] = {0xFEBD3400U, 0x00000002U}, /* SEC_MODID[152]:ARVI40*/ + [153] = {0xFEBD3404U, 0x00000002U}, /* SEC_MODID[153]:ARVI41*/ + [154] = {0xFEBD3408U, 0x00000002U}, /* SEC_MODID[154]:ARVI42*/ + [155] = {0xFEBD340CU, 0x00000002U}, /* SEC_MODID[155]:ARVI43*/ + [156] = {0xFEBD3410U, 0x00000002U}, /* SEC_MODID[156]:ARVI44*/ + [157] = {0xFEBD3414U, 0x00000002U}, /* SEC_MODID[157]:ARVI45*/ + [158] = {0xFEBD3418U, 0x00000002U}, /* SEC_MODID[158]:ARVI46*/ + [159] = {0xFEBD341CU, 0x00000002U}, /* SEC_MODID[159]:ARVI47*/ + [160] = {0xFEBD3420U, 0x00000002U}, /* SEC_MODID[160]:ARVI48*/ + [161] = {0xFEBD3424U, 0x00000002U}, /* SEC_MODID[161]:DIS0*/ + [162] = {0xFEBD3430U, 0x00000002U}, /* SEC_MODID[162]:ECMVIO2*/ + [163] = {0xFEBD3434U, 0x00000002U}, /* SEC_MODID[163]:FCPVD0*/ + [164] = {0xFEBD343CU, 0x00000002U}, /* SEC_MODID[164]:VSPD0*/ + [165] = {0xE6583400U, 0x00000002U}, /* SEC_MODID[165]:CKMHSC*/ + [166] = {0xE6583404U, 0x00000002U}, /* SEC_MODID[166]:AXIPCI001*/ + [167] = {0xE6583408U, 0x00000002U}, /* SEC_MODID[167]:AXIPCI002*/ + [168] = {0xE658340CU, 0x00000002U}, /* SEC_MODID[168]:AXIPCI003*/ + [169] = {0xE6583414U, 0x00000002U}, /* SEC_MODID[169]:AXIPCI005*/ + [170] = {0xE6583418U, 0x00000002U}, /* SEC_MODID[170]:AXIPCI006*/ + [171] = {0xE658341CU, 0x00000002U}, /* SEC_MODID[171]:AXIPCI007*/ + [172] = {0xE6583420U, 0x00000002U}, /* SEC_MODID[172]:AXIPCI008*/ + [173] = {0xE6583424U, 0x00000002U}, /* SEC_MODID[173]:AXIPCI009*/ + [174] = {0xE6583428U, 0x00000002U}, /* SEC_MODID[174]:AXIPCI010*/ + [175] = {0xE658342CU, 0x00000002U}, /* SEC_MODID[175]:AXIPCI011*/ + [176] = {0xE6583430U, 0x00000002U}, /* SEC_MODID[176]:AXIPCI012*/ + [177] = {0xE6583434U, 0x00000002U}, /* SEC_MODID[177]:AXIPCI013*/ + [178] = {0xE6583438U, 0x00000002U}, /* SEC_MODID[178]:AXIPCI014*/ + [179] = {0xE658343CU, 0x00000002U}, /* SEC_MODID[179]:AXIPCI015*/ + [180] = {0xE6583484U, 0x00000002U}, /* SEC_MODID[180]:GPTP*/ + [181] = {0xE6583488U, 0x00000002U}, /* SEC_MODID[181]:IPMMUHC00*/ + [182] = {0xE65834F4U, 0x00000002U}, /* SEC_MODID[182]:AXIPCI000*/ + [183] = {0xE65834F8U, 0x00000002U}, /* SEC_MODID[183]:AXIPCI004*/ + [184] = {0xE65834FCU, 0x00000002U}, /* SEC_MODID[184]:IPMMUHC01*/ + [185] = {0xE6583500U, 0x00000002U}, /* SEC_MODID[185]:AVB0*/ + [186] = {0xE6583504U, 0x00000002U}, /* SEC_MODID[186]:AVB1*/ + [187] = {0xE6583508U, 0x00000002U}, /* SEC_MODID[187]:AVB2*/ + [188] = {0xE658350CU, 0x00000002U}, /* SEC_MODID[188]:IPMMUHC10*/ + [189] = {0xE6583510U, 0x00000002U}, /* SEC_MODID[189]:IPMMUHC11*/ + [190] = {0xE6583514U, 0x00000002U}, /* SEC_MODID[190]:IPMMUHC12*/ + [191] = {0xE6583518U, 0x00000002U}, /* SEC_MODID[191]:IPMMUHC13*/ + [192] = {0xE658351CU, 0x00000002U}, /* SEC_MODID[192]:PPHY0*/ + [193] = {0xE6583524U, 0x00000002U}, /* SEC_MODID[193]:IPMMUHC14*/ + [194] = {0xE6583528U, 0x00000002U}, /* SEC_MODID[194]:IPMMUHC15*/ + [195] = {0xE658352CU, 0x00000002U}, /* SEC_MODID[195]:FBAHSC*/ + [196] = {0xE6583530U, 0x00000002U}, /* SEC_MODID[196]:IPMMUHC02*/ + [197] = {0xE6583538U, 0x00000002U}, /* SEC_MODID[197]:ECMHSC*/ + [198] = {0xE658353CU, 0x00000002U}, /* SEC_MODID[198]:ARHC0*/ + [199] = {0xE6583540U, 0x00000002U}, /* SEC_MODID[199]:ARHC1*/ + [200] = {0xE6583544U, 0x00000002U}, /* SEC_MODID[200]:ARHC2*/ + [201] = {0xE6583548U, 0x00000002U}, /* SEC_MODID[201]:ARHC3*/ + [202] = {0xE658354CU, 0x00000002U}, /* SEC_MODID[202]:ARHC4*/ + [203] = {0xE6583550U, 0x00000002U}, /* SEC_MODID[203]:ARHC5*/ + [204] = {0xE6583554U, 0x00000002U}, /* SEC_MODID[204]:ARHC6*/ + [205] = {0xE6583558U, 0x00000002U}, /* SEC_MODID[205]:ARHC7*/ + [206] = {0xE658355CU, 0x00000002U}, /* SEC_MODID[206]:ARHC8*/ + [207] = {0xE6583560U, 0x00000002U}, /* SEC_MODID[207]:IPMMUHC03*/ + [208] = {0xE6583564U, 0x00000002U}, /* SEC_MODID[208]:IPMMUHC04*/ + [209] = {0xE6583568U, 0x00000002U}, /* SEC_MODID[209]:IPMMUHC05*/ + [210] = {0xE658356CU, 0x00000002U}, /* SEC_MODID[210]:IPMMUHC06*/ + [211] = {0xE6583570U, 0x00000002U}, /* SEC_MODID[211]:IPMMUHC07*/ + [212] = {0xE6583574U, 0x00000002U}, /* SEC_MODID[212]:IPMMUHC08*/ + [213] = {0xE6583578U, 0x00000002U}, /* SEC_MODID[213]:IPMMUHC09*/ + [214] = {0xFF883400U, 0x00000002U}, /* SEC_MODID[214]:ARIMP00*/ + [215] = {0xFF883404U, 0x00000002U}, /* SEC_MODID[215]:ARIMP01*/ + [216] = {0xFF883408U, 0x00000002U}, /* SEC_MODID[216]:ARIMP02*/ + [217] = {0xFF88340CU, 0x00000002U}, /* SEC_MODID[217]:ARIMP03*/ + [218] = {0xFF883410U, 0x00000002U}, /* SEC_MODID[218]:ARIMP04*/ + [219] = {0xFF883414U, 0x00000002U}, /* SEC_MODID[219]:AXIFBABUSIR0*/ + [220] = {0xFF883418U, 0x00000002U}, /* SEC_MODID[220]:AXIFBABUSIR1*/ + [221] = {0xFF88341CU, 0x00000002U}, /* SEC_MODID[221]:AXIFBABUSIR2*/ + [222] = {0xFF883420U, 0x00000002U}, /* SEC_MODID[222]:AXIFBABUSIR3*/ + [223] = {0xFF883428U, 0x00000002U}, /* SEC_MODID[223]:AXIIMP0*/ + [224] = {0xFF883434U, 0x00000002U}, /* SEC_MODID[224]:ARIMP05*/ + [225] = {0xFF883438U, 0x00000002U}, /* SEC_MODID[225]:ARIMP06*/ + [226] = {0xFF88343CU, 0x00000002U}, /* SEC_MODID[226]:ARIMP07*/ + [227] = {0xFF883440U, 0x00000002U}, /* SEC_MODID[227]:ARIMP08*/ + [228] = {0xFF883448U, 0x00000002U}, /* SEC_MODID[228]:ECMIR*/ + [229] = {0xFF88344CU, 0x00000002U}, /* SEC_MODID[229]:DSPPS*/ + [230] = {0xFF883450U, 0x00000002U}, /* SEC_MODID[230]:IPMMUIR1*/ + [231] = {0xFF883454U, 0x00000002U}, /* SEC_MODID[231]:IPMMUIR0*/ + [232] = {0xFF883458U, 0x00000002U}, /* SEC_MODID[232]:IPMMUIR10*/ + [233] = {0xFF88345CU, 0x00000002U}, /* SEC_MODID[233]:IPMMUIR11*/ + [234] = {0xFF883460U, 0x00000002U}, /* SEC_MODID[234]:IPMMUIR12*/ + [235] = {0xFF883464U, 0x00000002U}, /* SEC_MODID[235]:IPMMUIR13*/ + [236] = {0xFF883468U, 0x00000002U}, /* SEC_MODID[236]:IPMMUIR14*/ + [237] = {0xFF88346CU, 0x00000002U}, /* SEC_MODID[237]:IPMMUIR15*/ + [238] = {0xFF883470U, 0x00000002U}, /* SEC_MODID[238]:IPMMUIR2*/ + [239] = {0xFF883474U, 0x00000002U}, /* SEC_MODID[239]:IPMMUIR3*/ + [240] = {0xFF883478U, 0x00000002U}, /* SEC_MODID[240]:IPMMUIR4*/ + [241] = {0xFF88347CU, 0x00000002U}, /* SEC_MODID[241]:IPMMUIR5*/ + [242] = {0xFF883480U, 0x00000002U}, /* SEC_MODID[242]:IPMMUIR6*/ + [243] = {0xFF883484U, 0x00000002U}, /* SEC_MODID[243]:IPMMUIR7*/ + [244] = {0xFF883488U, 0x00000002U}, /* SEC_MODID[244]:IPMMUIR8*/ + [245] = {0xFF88348CU, 0x00000002U}, /* SEC_MODID[245]:IPMMUIR9*/ + [246] = {0xFD813400U, 0x00000002U}, /* SEC_MODID[246]:ARPV0*/ + [247] = {0xFD813404U, 0x00000002U}, /* SEC_MODID[247]:ARPV1*/ + [248] = {0xFD813408U, 0x00000002U}, /* SEC_MODID[248]:AXIRGXS*/ + [249] = {0xFD81340CU, 0x00000002U}, /* SEC_MODID[249]:ARPV2*/ + [250] = {0xFD813410U, 0x00000002U}, /* SEC_MODID[250]:ARPV3*/ + [251] = {0xFD813414U, 0x00000002U}, /* SEC_MODID[251]:ARPV4*/ + [252] = {0xFD813418U, 0x00000002U}, /* SEC_MODID[252]:ARPV5*/ + [253] = {0xFD81341CU, 0x00000002U}, /* SEC_MODID[253]:ARPV6*/ + [254] = {0xFD813420U, 0x00000002U}, /* SEC_MODID[254]:ARPV7*/ + [255] = {0xFD813424U, 0x00000002U}, /* SEC_MODID[255]:ARPV8*/ + [256] = {0xFD81342CU, 0x00000002U}, /* SEC_MODID[256]:ECM3DG*/ + [257] = {0xFD813430U, 0x00000002U}, /* SEC_MODID[257]:FBAPVC*/ + [258] = {0xFD813434U, 0x00000002U}, /* SEC_MODID[258]:FBAPVD0*/ + [259] = {0xFD813438U, 0x00000002U}, /* SEC_MODID[259]:FBAPVD1*/ + [260] = {0xFD81343CU, 0x00000002U}, /* SEC_MODID[260]:FBAPVD2*/ + [261] = {0xFD813440U, 0x00000002U}, /* SEC_MODID[261]:FBAPVE*/ + [262] = {0xFD813444U, 0x00000002U}, /* SEC_MODID[262]:IPMMUPV000*/ + [263] = {0xFD813448U, 0x00000002U}, /* SEC_MODID[263]:IPMMUPV001*/ + [264] = {0xFD81344CU, 0x00000002U}, /* SEC_MODID[264]:IPMMUPV010*/ + [265] = {0xFD813450U, 0x00000002U}, /* SEC_MODID[265]:IPMMUPV011*/ + [266] = {0xFD813454U, 0x00000002U}, /* SEC_MODID[266]:IPMMUPV012*/ + [267] = {0xFD813458U, 0x00000002U}, /* SEC_MODID[267]:IPMMUPV013*/ + [268] = {0xFD81345CU, 0x00000002U}, /* SEC_MODID[268]:IPMMUPV014*/ + [269] = {0xFD813460U, 0x00000002U}, /* SEC_MODID[269]:IPMMUPV015*/ + [270] = {0xFD813464U, 0x00000002U}, /* SEC_MODID[270]:IPMMUPV002*/ + [271] = {0xFD813468U, 0x00000002U}, /* SEC_MODID[271]:IPMMUPV003*/ + [272] = {0xFD81346CU, 0x00000002U}, /* SEC_MODID[272]:IPMMUPV004*/ + [273] = {0xFD813470U, 0x00000002U}, /* SEC_MODID[273]:IPMMUPV005*/ + [274] = {0xFD813474U, 0x00000002U}, /* SEC_MODID[274]:IPMMUPV006*/ + [275] = {0xFD813478U, 0x00000002U}, /* SEC_MODID[275]:IPMMUPV007*/ + [276] = {0xFD81347CU, 0x00000002U}, /* SEC_MODID[276]:IPMMUPV008*/ + [277] = {0xFD813480U, 0x00000002U}, /* SEC_MODID[277]:IPMMUPV009*/ + [278] = {0xE6623400U, 0x00000002U}, /* SEC_MODID[278]:ARRC0*/ + [279] = {0xE6623404U, 0x00000002U}, /* SEC_MODID[279]:ARRC1*/ + [280] = {0xE6623408U, 0x00000002U}, /* SEC_MODID[280]:ARRC2*/ + [281] = {0xE662340CU, 0x00000002U}, /* SEC_MODID[281]:ARRC3*/ + [282] = {0xE6623410U, 0x00000002U}, /* SEC_MODID[282]:ARRC4*/ + [283] = {0xE6623414U, 0x00000002U}, /* SEC_MODID[283]:ARRC5*/ + [284] = {0xE6623418U, 0x00000002U}, /* SEC_MODID[284]:ARRC6*/ + [285] = {0xE662341CU, 0x00000002U}, /* SEC_MODID[285]:ARRC7*/ + [286] = {0xE6623420U, 0x00000002U}, /* SEC_MODID[286]:ARRC8*/ + [287] = {0xE6623428U, 0x00000002U}, /* SEC_MODID[287]:ICUMX*/ + [288] = {0xE662342CU, 0x00000002U}, /* SEC_MODID[288]:ECMRC*/ + [289] = {0xFFC33400U, 0x00000002U}, /* SEC_MODID[289]:DMAWCRC0*/ + [290] = {0xFFC33404U, 0x00000002U}, /* SEC_MODID[290]:DMAWCRC1*/ + [291] = {0xFFC33408U, 0x00000002U}, /* SEC_MODID[291]:DMAWCRC2*/ + [292] = {0xFFC3340CU, 0x00000002U}, /* SEC_MODID[292]:DMAWCRC3*/ + [293] = {0xFFC43400U, 0x00000002U}, /* SEC_MODID[293]:ARMREG00*/ + [294] = {0xFFC43404U, 0x00000002U}, /* SEC_MODID[294]:ARMREG01*/ + [295] = {0xFFC43408U, 0x00000002U}, /* SEC_MODID[295]:ARMREG10*/ + [296] = {0xFFC4340CU, 0x00000002U}, /* SEC_MODID[296]:ARMREG11*/ + [297] = {0xFFC43410U, 0x00000002U}, /* SEC_MODID[297]:ARMREG12*/ + [298] = {0xFFC43414U, 0x00000000U}, /* SEC_MODID[298]:ARMREG13*/ + [299] = {0xFFC43418U, 0x00000000U}, /* SEC_MODID[299]:ARMREG14*/ + [300] = {0xFFC4341CU, 0x00000002U}, /* SEC_MODID[300]:AXICR52SS0*/ + [301] = {0xFFC43420U, 0x00000002U}, /* SEC_MODID[301]:AXICSD0*/ + [302] = {0xFFC43424U, 0x00000002U}, /* SEC_MODID[302]:AXIINTAP0*/ + [303] = {0xFFC4342CU, 0x00000002U}, /* SEC_MODID[303]:AXISECROM*/ + [304] = {0xFFC43430U, 0x00000002U}, /* SEC_MODID[304]:AXISYSRAM0*/ + [305] = {0xFFC43434U, 0x00000002U}, /* SEC_MODID[305]:AXISYSRAM1*/ + [306] = {0xFFC43438U, 0x00000002U}, /* SEC_MODID[306]:ARGREG15*/ + [307] = {0xFFC4343CU, 0x00000002U}, /* SEC_MODID[307]:ARMREG2*/ + [308] = {0xFFC43440U, 0x00000002U}, /* SEC_MODID[308]:ARMREG3*/ + [309] = {0xFFC43444U, 0x00000002U}, /* SEC_MODID[309]:ARMREG4*/ + [310] = {0xFFC43448U, 0x00000002U}, /* SEC_MODID[310]:ARMREG5*/ + [311] = {0xFFC4344CU, 0x00000002U}, /* SEC_MODID[311]:ARMREG6*/ + [312] = {0xFFC43450U, 0x00000002U}, /* SEC_MODID[312]:ARMREG7*/ + [313] = {0xFFC43454U, 0x00000000U}, /* SEC_MODID[313]:ARMREG8*/ + [314] = {0xFFC43458U, 0x00000000U}, /* SEC_MODID[314]:ARMREG9*/ + [315] = {0xFFC4345CU, 0x00000002U}, /* SEC_MODID[315]:ARRD0*/ + [316] = {0xFFC43460U, 0x00000002U}, /* SEC_MODID[316]:ARRD1*/ + [317] = {0xFFC43464U, 0x00000002U}, /* SEC_MODID[317]:ARRD2*/ + [318] = {0xFFC43468U, 0x00000002U}, /* SEC_MODID[318]:ARRD3*/ + [319] = {0xFFC4346CU, 0x00000002U}, /* SEC_MODID[319]:ARRD4*/ + [320] = {0xFFC43470U, 0x00000002U}, /* SEC_MODID[320]:ARRD5*/ + [321] = {0xFFC43474U, 0x00000002U}, /* SEC_MODID[321]:ARRD6*/ + [322] = {0xFFC43478U, 0x00000002U}, /* SEC_MODID[322]:ARRD7*/ + [323] = {0xFFC4347CU, 0x00000002U}, /* SEC_MODID[323]:ARRD8*/ + [324] = {0xFFC43480U, 0x00000002U}, /* SEC_MODID[324]:ARRT0*/ + [325] = {0xFFC43484U, 0x00000002U}, /* SEC_MODID[325]:ARRT1*/ + [326] = {0xFFC43488U, 0x00000002U}, /* SEC_MODID[326]:ARRT2*/ + [327] = {0xFFC4348CU, 0x00000002U}, /* SEC_MODID[327]:ARRT3*/ + [328] = {0xFFC43490U, 0x00000002U}, /* SEC_MODID[328]:ARRT4*/ + [329] = {0xFFC43494U, 0x00000002U}, /* SEC_MODID[329]:ARRT5*/ + [330] = {0xFFC43498U, 0x00000002U}, /* SEC_MODID[330]:ARRT6*/ + [331] = {0xFFC4349CU, 0x00000002U}, /* SEC_MODID[331]:ARRT7*/ + [332] = {0xFFC434A0U, 0x00000002U}, /* SEC_MODID[332]:ARRT8*/ + [333] = {0xFFC434A4U, 0x00000002U}, /* SEC_MODID[333]:CKMRT*/ + [334] = {0xFFC434A8U, 0x00000002U}, /* SEC_MODID[334]:CRC0*/ + [335] = {0xFFC434ACU, 0x00000002U}, /* SEC_MODID[335]:CRC1*/ + [336] = {0xFFC434B0U, 0x00000002U}, /* SEC_MODID[336]:CRC2*/ + [337] = {0xFFC434B4U, 0x00000002U}, /* SEC_MODID[337]:CRC3*/ + [338] = {0xFFC434B8U, 0x00000002U}, /* SEC_MODID[338]:CSD*/ + [339] = {0xFFC434BCU, 0x00000002U}, /* SEC_MODID[339]:ECM*/ + [340] = {0xFFC434C0U, 0x00000002U}, /* SEC_MODID[340]:ECMRT*/ + [341] = {0xFFC434C4U, 0x00000002U}, /* SEC_MODID[341]:FBACR52*/ + [342] = {0xFFC434C8U, 0x00000002U}, /* SEC_MODID[342]:FBART*/ + [343] = {0xFFC434CCU, 0x00000002U}, /* SEC_MODID[343]:INTTP*/ + [344] = {0xFFC434D0U, 0x00000002U}, /* SEC_MODID[344]:IPMMURT000*/ + [345] = {0xFFC434D4U, 0x00000002U}, /* SEC_MODID[345]:IPMMURT100*/ + [346] = {0xFFC434D8U, 0x00000002U}, /* SEC_MODID[346]:KCRC4*/ + [347] = {0xFFC434DCU, 0x00000002U}, /* SEC_MODID[347]:KCRC5*/ + [348] = {0xFFC434E0U, 0x00000002U}, /* SEC_MODID[348]:KCRC6*/ + [349] = {0xFFC434E4U, 0x00000002U}, /* SEC_MODID[349]:KCRC7*/ + [350] = {0xFFC434E8U, 0x00000002U}, /* SEC_MODID[350]:MFI00*/ + [351] = {0xFFC434ECU, 0x00000002U}, /* SEC_MODID[351]:MFI01*/ + [352] = {0xFFC434F0U, 0x00000002U}, /* SEC_MODID[352]:MFI10*/ + [353] = {0xFFC434F4U, 0x00000002U}, /* SEC_MODID[353]:MFI02*/ + [354] = {0xFFC434F8U, 0x00000002U}, /* SEC_MODID[354]:MFI03*/ + [355] = {0xFFC434FCU, 0x00000002U}, /* SEC_MODID[355]:MFI04*/ + [356] = {0xFFC43500U, 0x00000002U}, /* SEC_MODID[356]:MFI05*/ + [357] = {0xFFC43504U, 0x00000002U}, /* SEC_MODID[357]:MFI06*/ + [358] = {0xFFC43508U, 0x00000002U}, /* SEC_MODID[358]:MFI07*/ + [359] = {0xFFC4350CU, 0x00000002U}, /* SEC_MODID[359]:MFI08*/ + [360] = {0xFFC43510U, 0x00000002U}, /* SEC_MODID[360]:MFI09*/ + [361] = {0xFFC43514U, 0x00000002U}, /* SEC_MODID[361]:MFI15*/ + [362] = {0xFFC43518U, 0x00000002U}, /* SEC_MODID[362]:CKMCR52*/ + [363] = {0xFFC4351CU, 0x00000002U}, /* SEC_MODID[363]:RTDM0P*/ + [364] = {0xFFC43520U, 0x00000002U}, /* SEC_MODID[364]:ECMRD*/ + [365] = {0xFFC43524U, 0x00000002U}, /* SEC_MODID[365]:RTDM1P*/ + [366] = {0xFFC43530U, 0x00000002U}, /* SEC_MODID[366]:SYSRAM10*/ + [367] = {0xFFC43538U, 0x00000000U}, /* SEC_MODID[367]:SYSRAM00*/ + [368] = {0xFFC4353CU, 0x00000002U}, /* SEC_MODID[368]:TSIPL0*/ + [369] = {0xFFC43540U, 0x00000002U}, /* SEC_MODID[369]:TSIPL1*/ + [370] = {0xFFC43544U, 0x00000002U}, /* SEC_MODID[370]:TSIPL2*/ + [371] = {0xFFC43548U, 0x00000002U}, /* SEC_MODID[371]:TSIPL3*/ + [372] = {0xFFC4354CU, 0x00000002U}, /* SEC_MODID[372]:TSIPL4*/ + [373] = {0xFFC43550U, 0x00000002U}, /* SEC_MODID[373]:TSIPL5*/ + [374] = {0xFFC43554U, 0x00000002U}, /* SEC_MODID[374]:TSIPL6*/ + [375] = {0xFFC43558U, 0x00000002U}, /* SEC_MODID[375]:TSIPL7*/ + [376] = {0xFFC4355CU, 0x00000002U}, /* SEC_MODID[376]:WCRC0*/ + [377] = {0xFFC43560U, 0x00000002U}, /* SEC_MODID[377]:WCRC1*/ + [378] = {0xFFC43564U, 0x00000002U}, /* SEC_MODID[378]:WCRC2*/ + [379] = {0xFFC43568U, 0x00000002U}, /* SEC_MODID[379]:WCRC3*/ + [380] = {0xFFC43580U, 0x00000002U}, /* SEC_MODID[380]:MFI11*/ + [381] = {0xFFC43584U, 0x00000002U}, /* SEC_MODID[381]:MFI12*/ + [382] = {0xFFC43588U, 0x00000002U}, /* SEC_MODID[382]:MFI13*/ + [383] = {0xFFC4358CU, 0x00000002U}, /* SEC_MODID[383]:MFI14*/ + [384] = {0xFFC43590U, 0x00000002U}, /* SEC_MODID[384]:IPMMURT001*/ + [385] = {0xFFC43594U, 0x00000002U}, /* SEC_MODID[385]:IPMMURT010*/ + [386] = {0xFFC43598U, 0x00000002U}, /* SEC_MODID[386]:IPMMURT011*/ + [387] = {0xFFC4359CU, 0x00000002U}, /* SEC_MODID[387]:IPMMURT012*/ + [388] = {0xFFC435A0U, 0x00000002U}, /* SEC_MODID[388]:IPMMURT013*/ + [389] = {0xFFC435A4U, 0x00000002U}, /* SEC_MODID[389]:IPMMURT014*/ + [390] = {0xFFC435A8U, 0x00000002U}, /* SEC_MODID[390]:IPMMURT015*/ + [391] = {0xFFC435ACU, 0x00000002U}, /* SEC_MODID[391]:IPMMURT002*/ + [392] = {0xFFC435B0U, 0x00000002U}, /* SEC_MODID[392]:IPMMURT003*/ + [393] = {0xFFC435B4U, 0x00000002U}, /* SEC_MODID[393]:IPMMURT004*/ + [394] = {0xFFC435B8U, 0x00000002U}, /* SEC_MODID[394]:IPMMURT005*/ + [395] = {0xFFC435BCU, 0x00000002U}, /* SEC_MODID[395]:IPMMURT006*/ + [396] = {0xFFC435C0U, 0x00000002U}, /* SEC_MODID[396]:IPMMURT007*/ + [397] = {0xFFC435C4U, 0x00000002U}, /* SEC_MODID[397]:IPMMURT008*/ + [398] = {0xFFC435C8U, 0x00000002U}, /* SEC_MODID[398]:IPMMURT009*/ + [399] = {0xFFC435CCU, 0x00000002U}, /* SEC_MODID[399]:IPKMURT101*/ + [400] = {0xFFC435D0U, 0x00000002U}, /* SEC_MODID[400]:IPMMURT110*/ + [401] = {0xFFC435D4U, 0x00000002U}, /* SEC_MODID[401]:IPMMURT111*/ + [402] = {0xFFC435D8U, 0x00000002U}, /* SEC_MODID[402]:IPMMURT112*/ + [403] = {0xFFC435DCU, 0x00000002U}, /* SEC_MODID[403]:IPMMURT113*/ + [404] = {0xFFC435E0U, 0x00000002U}, /* SEC_MODID[404]:IPMMURT114*/ + [405] = {0xFFC435E4U, 0x00000002U}, /* SEC_MODID[405]:IPMMURT115*/ + [406] = {0xFFC435E8U, 0x00000002U}, /* SEC_MODID[406]:IPMMURT102*/ + [407] = {0xFFC435ECU, 0x00000002U}, /* SEC_MODID[407]:IPMMURT103*/ + [408] = {0xFFC435F0U, 0x00000002U}, /* SEC_MODID[408]:IPMMURT104*/ + [409] = {0xFFC435F4U, 0x00000002U}, /* SEC_MODID[409]:IPMMURT105*/ + [410] = {0xFFC435F8U, 0x00000002U}, /* SEC_MODID[410]:IPMMURT106*/ + [411] = {0xFFC435FCU, 0x00000002U}, /* SEC_MODID[411]:IPMMURT107*/ + [412] = {0xFFC43600U, 0x00000002U}, /* SEC_MODID[412]:RTDM000*/ + [413] = {0xFFC43604U, 0x00000002U}, /* SEC_MODID[413]:RTDM001*/ + [414] = {0xFFC43608U, 0x00000002U}, /* SEC_MODID[414]:RTDM010*/ + [415] = {0xFFC4360CU, 0x00000002U}, /* SEC_MODID[415]:RTDM011*/ + [416] = {0xFFC43610U, 0x00000002U}, /* SEC_MODID[416]:RTDM012*/ + [417] = {0xFFC43614U, 0x00000002U}, /* SEC_MODID[417]:RTDM013*/ + [418] = {0xFFC43618U, 0x00000002U}, /* SEC_MODID[418]:RTDM014*/ + [419] = {0xFFC4361CU, 0x00000002U}, /* SEC_MODID[419]:RTDM015*/ + [420] = {0xFFC43620U, 0x00000002U}, /* SEC_MODID[420]:RTDM002*/ + [421] = {0xFFC43624U, 0x00000002U}, /* SEC_MODID[421]:RTDM003*/ + [422] = {0xFFC43628U, 0x00000002U}, /* SEC_MODID[422]:RTDM004*/ + [423] = {0xFFC4362CU, 0x00000002U}, /* SEC_MODID[423]:RTDM005*/ + [424] = {0xFFC43630U, 0x00000002U}, /* SEC_MODID[424]:RTDM006*/ + [425] = {0xFFC43634U, 0x00000002U}, /* SEC_MODID[425]:RTDM007*/ + [426] = {0xFFC43638U, 0x00000002U}, /* SEC_MODID[426]:RTDM008*/ + [427] = {0xFFC4363CU, 0x00000002U}, /* SEC_MODID[427]:RTDM009*/ + [428] = {0xFFC43640U, 0x00000002U}, /* SEC_MODID[428]:RTDM100*/ + [429] = {0xFFC43644U, 0x00000002U}, /* SEC_MODID[429]:RTDM101*/ + [430] = {0xFFC43648U, 0x00000002U}, /* SEC_MODID[430]:RTDM110*/ + [431] = {0xFFC4364CU, 0x00000002U}, /* SEC_MODID[431]:RTDM111*/ + [432] = {0xFFC43650U, 0x00000002U}, /* SEC_MODID[432]:RTDM112*/ + [433] = {0xFFC43654U, 0x00000002U}, /* SEC_MODID[433]:RTDM113*/ + [434] = {0xFFC43658U, 0x00000002U}, /* SEC_MODID[434]:RTDM114*/ + [435] = {0xFFC4365CU, 0x00000002U}, /* SEC_MODID[435]:RTDM115*/ + [436] = {0xFFC43660U, 0x00000002U}, /* SEC_MODID[436]:RTDM102*/ + [437] = {0xFFC43664U, 0x00000002U}, /* SEC_MODID[437]:RTDM103*/ + [438] = {0xFFC43668U, 0x00000002U}, /* SEC_MODID[438]:RTDM104*/ + [439] = {0xFFC4366CU, 0x00000002U}, /* SEC_MODID[439]:RTDM105*/ + [440] = {0xFFC43670U, 0x00000002U}, /* SEC_MODID[440]:RTDM106*/ + [441] = {0xFFC43674U, 0x00000002U}, /* SEC_MODID[441]:RTDM107*/ + [442] = {0xFFC43678U, 0x00000002U}, /* SEC_MODID[442]:RTDM108*/ + [443] = {0xFFC4367CU, 0x00000002U}, /* SEC_MODID[443]:RTDM109*/ + [444] = {0xFFC43700U, 0x00000002U}, /* SEC_MODID[444]:IPMMURT108*/ + [445] = {0xFFC43704U, 0x00000002U}, /* SEC_MODID[445]:IPMMURT109*/ + [446] = {0xFFC43708U, 0x00000000U}, /* SEC_MODID[446]:SYSRAM01*/ + [447] = {0xFFC4370CU, 0x00000002U}, /* SEC_MODID[447]:SYSRAM02*/ + [448] = {0xFFC43710U, 0x00000000U}, /* SEC_MODID[448]:SYSRAM03*/ + [449] = {0xFFC43714U, 0x00000000U}, /* SEC_MODID[449]:SYSRAM04*/ + [450] = {0xFFC43718U, 0x00000000U}, /* SEC_MODID[450]:SYSRAM05*/ + [451] = {0xFFC4371CU, 0x00000000U}, /* SEC_MODID[451]:SYSRAM06*/ + [452] = {0xFFC43720U, 0x00000002U}, /* SEC_MODID[452]:SYSRAM07*/ + [453] = {0xFFC43724U, 0x00000002U}, /* SEC_MODID[453]:SYSRAM11*/ + [454] = {0xFFC43728U, 0x00000002U}, /* SEC_MODID[454]:SYSRAM12*/ + [455] = {0xFFC4372CU, 0x00000002U}, /* SEC_MODID[455]:SYSRAM13*/ + [456] = {0xFFC43730U, 0x00000002U}, /* SEC_MODID[456]:SYSRAM14*/ + [457] = {0xFFC43734U, 0x00000002U}, /* SEC_MODID[457]:SYSRAM15*/ + [458] = {0xFFC43738U, 0x00000002U}, /* SEC_MODID[458]:SYSRAM16*/ + [459] = {0xFFC4373CU, 0x00000002U}, /* SEC_MODID[459]:SYSRAM17*/ + [460] = {0xFFC43760U, 0x00000002U}, /* SEC_MODID[460]:BKBUF*/ + [461] = {0xFFC43764U, 0x00000002U}, /* SEC_MODID[461]:AXICR52SS1*/ + [462] = {0xFFC43768U, 0x00000002U}, /* SEC_MODID[462]:AXICR52SS2*/ + [463] = {0xFF863400U, 0x00000002U}, /* SEC_MODID[463]:ARSC0*/ + [464] = {0xFF863404U, 0x00000002U}, /* SEC_MODID[464]:ARSC1*/ + [465] = {0xFF863408U, 0x00000002U}, /* SEC_MODID[465]:ARSC2*/ + [466] = {0xFF86340CU, 0x00000002U}, /* SEC_MODID[466]:ARSC3*/ + [467] = {0xFF863410U, 0x00000002U}, /* SEC_MODID[467]:ARSC4*/ + [468] = {0xFF863414U, 0x00000002U}, /* SEC_MODID[468]:ARSC5*/ + [469] = {0xFF863418U, 0x00000002U}, /* SEC_MODID[469]:ARSC6*/ + [470] = {0xFF86341CU, 0x00000002U}, /* SEC_MODID[470]:ARSC7*/ + [471] = {0xFF863420U, 0x00000002U}, /* SEC_MODID[471]:ARSC8*/ + [472] = {0xFF863424U, 0x00000002U}, /* SEC_MODID[472]:ARSTM0*/ + [473] = {0xFF863428U, 0x00000002U}, /* SEC_MODID[473]:ARSTM1*/ + [474] = {0xFF86342CU, 0x00000002U}, /* SEC_MODID[474]:CSD1S*/ + [475] = {0xFF863430U, 0x00000002U}, /* SEC_MODID[475]:AXIFBABUSTOP0*/ + [476] = {0xFF863438U, 0x00000002U}, /* SEC_MODID[476]:ARSTM2*/ + [477] = {0xFF86343CU, 0x00000002U}, /* SEC_MODID[477]:ARSTM3*/ + [478] = {0xFF863440U, 0x00000002U}, /* SEC_MODID[478]:ARSTM4*/ + [479] = {0xFF863444U, 0x00000002U}, /* SEC_MODID[479]:ARSTM5*/ + [480] = {0xFF863448U, 0x00000002U}, /* SEC_MODID[480]:ARSTM6*/ + [481] = {0xFF86344CU, 0x00000002U}, /* SEC_MODID[481]:ARSTM7*/ + [482] = {0xFF863450U, 0x00000002U}, /* SEC_MODID[482]:ARSTM8*/ + [483] = {0xFF863454U, 0x00000002U}, /* SEC_MODID[483]:ECMTOP*/ + [484] = {0xFF863458U, 0x00000002U}, /* SEC_MODID[484]:FBA*/ + [485] = {0xFF86345CU, 0x00000002U}, /* SEC_MODID[485]:FBC*/ + [486] = {0xFF863434U, 0x00000002U}, /* SEC_MODID[486]:AXICCI00*/ + [487] = {0xFF863460U, 0x00000002U}, /* SEC_MODID[487]:AXICCI01*/ + [488] = {0xFF863464U, 0x00000002U}, /* SEC_MODID[488]:AXICCI10*/ + [489] = {0xFF863468U, 0x00000002U}, /* SEC_MODID[489]:AXICCI11*/ + [490] = {0xFF86346CU, 0x00000002U}, /* SEC_MODID[490]:AXICCI12*/ + [491] = {0xFF863470U, 0x00000002U}, /* SEC_MODID[491]:AXICCI13*/ + [492] = {0xFF863474U, 0x00000002U}, /* SEC_MODID[492]:AXICCI14*/ + [493] = {0xFF863478U, 0x00000002U}, /* SEC_MODID[493]:AXICCI15*/ + [494] = {0xFF86347CU, 0x00000002U}, /* SEC_MODID[494]:AXICCI2*/ + [495] = {0xFF863480U, 0x00000002U}, /* SEC_MODID[495]:AXICCI3*/ + [496] = {0xFF863484U, 0x00000002U}, /* SEC_MODID[496]:AXICCI4*/ + [497] = {0xFF863488U, 0x00000002U}, /* SEC_MODID[497]:AXICCI5*/ + [498] = {0xFF86348CU, 0x00000002U}, /* SEC_MODID[498]:AXICCI6*/ + [499] = {0xFF863490U, 0x00000002U}, /* SEC_MODID[499]:AXICCI7*/ + [500] = {0xFF863494U, 0x00000002U}, /* SEC_MODID[500]:AXICCI8*/ + [501] = {0xFF863498U, 0x00000002U}, /* SEC_MODID[501]:AXICCI9*/ + [502] = {0xFF8634A0U, 0x00000002U}, /* SEC_MODID[502]:ECMSTM*/ + [503] = {0xE7783400U, 0x00000002U}, /* SEC_MODID[503]:DMASSI00*/ + [504] = {0xE7783404U, 0x00000002U}, /* SEC_MODID[504]:DMASSI01*/ + [505] = {0xE7783408U, 0x00000002U}, /* SEC_MODID[505]:DMASSI02*/ + [506] = {0xE778340CU, 0x00000002U}, /* SEC_MODID[506]:DMASSI03*/ + [507] = {0xE7783410U, 0x00000002U}, /* SEC_MODID[507]:DMASSI04*/ + [508] = {0xE7783414U, 0x00000002U}, /* SEC_MODID[508]:DMAI2C0*/ + [509] = {0xE7783418U, 0x00000002U}, /* SEC_MODID[509]:DMAI2C1*/ + [510] = {0xE778341CU, 0x00000002U}, /* SEC_MODID[510]:DMAI2C2*/ + [511] = {0xE7783420U, 0x00000002U}, /* SEC_MODID[511]:DMAI2C3*/ + [512] = {0xE778342CU, 0x00000002U}, /* SEC_MODID[512]:DMASSI05*/ + [513] = {0xE7783430U, 0x00000002U}, /* SEC_MODID[513]:DMASSI06*/ + [514] = {0xE7783434U, 0x00000002U}, /* SEC_MODID[514]:DMASSI07*/ + [515] = {0xE67C3400U, 0x00000002U}, /* SEC_MODID[515]:ARMM*/ + [516] = {0xE67C3404U, 0x00000002U}, /* SEC_MODID[516]:AXIARNMM*/ + [517] = {0xE67C3408U, 0x00000002U}, /* SEC_MODID[517]:ARSM0*/ + [518] = {0xE67C340CU, 0x00000002U}, /* SEC_MODID[518]:ARSM1*/ + [519] = {0xE67C3410U, 0x00000002U}, /* SEC_MODID[519]:ARSM2*/ + [520] = {0xE67C3414U, 0x00000002U}, /* SEC_MODID[520]:AXIQOS0*/ + [521] = {0xE67C3418U, 0x00000002U}, /* SEC_MODID[521]:AXIQOS1*/ + [522] = {0xE67C341CU, 0x00000002U}, /* SEC_MODID[522]:AXIQOS2*/ + [523] = {0xE67C3420U, 0x00000002U}, /* SEC_MODID[523]:AXIQOS3*/ + [524] = {0xE67C3424U, 0x00000002U}, /* SEC_MODID[524]:AXIQOS4*/ + [525] = {0xE67C3428U, 0x00000002U}, /* SEC_MODID[525]:AXIQOS5*/ + [526] = {0xE67C3434U, 0x00000002U}, /* SEC_MODID[526]:ARSM3*/ + [527] = {0xE67C3438U, 0x00000002U}, /* SEC_MODID[527]:ARSM4*/ + [528] = {0xE67C343CU, 0x00000002U}, /* SEC_MODID[528]:ARSM5*/ + [529] = {0xE67C3440U, 0x00000002U}, /* SEC_MODID[529]:ARSM6*/ + [530] = {0xE67C3444U, 0x00000002U}, /* SEC_MODID[530]:ARSM7*/ + [531] = {0xE67C3448U, 0x00000002U}, /* SEC_MODID[531]:ARSM8*/ + [532] = {0xE67C344CU, 0x00000000U}, /* SEC_MODID[532]:AXMM0*/ + [533] = {0xE67C3450U, 0x00000000U}, /* SEC_MODID[533]:AXMM1*/ + [534] = {0xE67C3454U, 0x00000002U}, /* SEC_MODID[534]:AXMMPMON*/ + [535] = {0xE67C3458U, 0x00000002U}, /* SEC_MODID[535]:CKMMM*/ + [536] = {0xE67C345CU, 0x00000002U}, /* SEC_MODID[536]:ECMMM*/ + [537] = {0xE67C3460U, 0x00000002U}, /* SEC_MODID[537]:FBADBSC0*/ + [538] = {0xE67C3468U, 0x00000002U}, /* SEC_MODID[538]:FBAMM*/ + [539] = {0xE67C346CU, 0x00000002U}, /* SEC_MODID[539]:IPMMUMM00*/ + [540] = {0xE67C3470U, 0x00000002U}, /* SEC_MODID[540]:DBS0A0*/ + [541] = {0xE67C3474U, 0x00000002U}, /* SEC_MODID[541]:DBS0A1*/ + [542] = {0xE67C3484U, 0x00000002U}, /* SEC_MODID[542]:FCPRC*/ + [543] = {0xE67C3488U, 0x00000002U}, /* SEC_MODID[543]:DBS0D0*/ + [544] = {0xE67C348CU, 0x00000002U}, /* SEC_MODID[544]:DBS0D1*/ + [545] = {0xE67C3498U, 0x00000002U}, /* SEC_MODID[545]:FBADDR*/ + [546] = {0xE67C349CU, 0x00000002U}, /* SEC_MODID[546]:IPMMUMM01*/ + [547] = {0xE67C34A0U, 0x00000002U}, /* SEC_MODID[547]:IPMMUMM10*/ + [548] = {0xE67C34A4U, 0x00000002U}, /* SEC_MODID[548]:IPMMUMM11*/ + [549] = {0xE67C34A8U, 0x00000002U}, /* SEC_MODID[549]:IPMMUMM12*/ + [550] = {0xE67C34ACU, 0x00000002U}, /* SEC_MODID[550]:IPMMUMM13*/ + [551] = {0xE67C34B0U, 0x00000002U}, /* SEC_MODID[551]:IPMMUMM14*/ + [552] = {0xE67C34B4U, 0x00000002U}, /* SEC_MODID[552]:IPMMUMM15*/ + [553] = {0xE67C34B8U, 0x00000002U}, /* SEC_MODID[553]:IPMMUMM02*/ + [554] = {0xE67C34BCU, 0x00000002U}, /* SEC_MODID[554]:IPMMUMM03*/ + [555] = {0xE67C34C0U, 0x00000002U}, /* SEC_MODID[555]:IPMMUMM04*/ + [556] = {0xE67C34C4U, 0x00000002U}, /* SEC_MODID[556]:IPMMUMM05*/ + [557] = {0xE67C34C8U, 0x00000002U}, /* SEC_MODID[557]:IPMMUMM06*/ + [558] = {0xE67C34CCU, 0x00000002U}, /* SEC_MODID[558]:IPMMUMM07*/ + [559] = {0xE67C34D0U, 0x00000002U}, /* SEC_MODID[559]:IPMMUMM08*/ + [560] = {0xE67C34D4U, 0x00000002U}, /* SEC_MODID[560]:IPMMUMM09*/ + [561] = {0xFF803400U, 0x00000002U}, /* SEC_MODID[561]:ARSN0*/ + [562] = {0xFF803404U, 0x00000002U}, /* SEC_MODID[562]:ARSN1*/ + [563] = {0xFF803408U, 0x00000002U}, /* SEC_MODID[563]:ARSN2*/ + [564] = {0xFF80340CU, 0x00000002U}, /* SEC_MODID[564]:ARSN3*/ + [565] = {0xFF803410U, 0x00000002U}, /* SEC_MODID[565]:ARSN4*/ + [566] = {0xFF803414U, 0x00000002U}, /* SEC_MODID[566]:ARSN5*/ + [567] = {0xFF803418U, 0x00000002U}, /* SEC_MODID[567]:ARSN6*/ + [568] = {0xFF80341CU, 0x00000002U}, /* SEC_MODID[568]:ARSN7*/ + [569] = {0xFF803420U, 0x00000002U}, /* SEC_MODID[569]:ARSN8*/ + [570] = {0xFF803424U, 0x00000002U}, /* SEC_MODID[570]:ECMTOP3*/ + [571] = {0xE7753400U, 0x00000002U}, /* SEC_MODID[571]:ARSD00*/ + [572] = {0xE7753404U, 0x00000002U}, /* SEC_MODID[572]:ARSD01*/ + [573] = {0xE7753408U, 0x00000002U}, /* SEC_MODID[573]:ARSD02*/ + [574] = {0xE775340CU, 0x00000002U}, /* SEC_MODID[574]:ARSD03*/ + [575] = {0xE7753410U, 0x00000002U}, /* SEC_MODID[575]:ARSD04*/ + [576] = {0xE7753414U, 0x00000002U}, /* SEC_MODID[576]:ARSD05*/ + [577] = {0xE7753418U, 0x00000002U}, /* SEC_MODID[577]:ARSD06*/ + [578] = {0xE775341CU, 0x00000002U}, /* SEC_MODID[578]:AXIFRAY*/ + [579] = {0xE7753428U, 0x00000002U}, /* SEC_MODID[579]:AXIRPC*/ + [580] = {0xE775342CU, 0x00000002U}, /* SEC_MODID[580]:AXISDHI0*/ + [581] = {0xE7753430U, 0x00000002U}, /* SEC_MODID[581]:ARSD07*/ + [582] = {0xE7753434U, 0x00000002U}, /* SEC_MODID[582]:ARSD08*/ + [583] = {0xE7753438U, 0x00000002U}, /* SEC_MODID[583]:ARSP00*/ + [584] = {0xE775343CU, 0x00000002U}, /* SEC_MODID[584]:ARSP01*/ + [585] = {0xE7753440U, 0x00000002U}, /* SEC_MODID[585]:ARSP02*/ + [586] = {0xE7753444U, 0x00000002U}, /* SEC_MODID[586]:ARSP03*/ + [587] = {0xE7753448U, 0x00000002U}, /* SEC_MODID[587]:ARSP04*/ + [588] = {0xE775344CU, 0x00000002U}, /* SEC_MODID[588]:ARSP05*/ + [589] = {0xE7753450U, 0x00000002U}, /* SEC_MODID[589]:ARSP06*/ + [590] = {0xE7753454U, 0x00000002U}, /* SEC_MODID[590]:ARSP07*/ + [591] = {0xE7753458U, 0x00000002U}, /* SEC_MODID[591]:ARSP08*/ + [592] = {0xE775345CU, 0x00000002U}, /* SEC_MODID[592]:IPMMUDS001*/ + [593] = {0xE7753460U, 0x00000002U}, /* SEC_MODID[593]:CKMPER0*/ + [594] = {0xE7753464U, 0x00000002U}, /* SEC_MODID[594]:ECMPER0*/ + [595] = {0xE7753468U, 0x00000002U}, /* SEC_MODID[595]:FBAPER0*/ + [596] = {0xE775346CU, 0x00000002U}, /* SEC_MODID[596]:FSO0*/ + [597] = {0xE7753470U, 0x00000002U}, /* SEC_MODID[597]:FSO1*/ + [598] = {0xE7753474U, 0x00000002U}, /* SEC_MODID[598]:FSO10*/ + [599] = {0xE7753478U, 0x00000002U}, /* SEC_MODID[599]:FSO2*/ + [600] = {0xE775347CU, 0x00000002U}, /* SEC_MODID[600]:FSO3*/ + [601] = {0xE7753480U, 0x00000002U}, /* SEC_MODID[601]:FSO4*/ + [602] = {0xE7753484U, 0x00000002U}, /* SEC_MODID[602]:FSO5*/ + [603] = {0xE7753488U, 0x00000002U}, /* SEC_MODID[603]:FSO6*/ + [604] = {0xE775348CU, 0x00000002U}, /* SEC_MODID[604]:FSO7*/ + [605] = {0xE7753490U, 0x00000002U}, /* SEC_MODID[605]:FSO8*/ + [606] = {0xE7753494U, 0x00000002U}, /* SEC_MODID[606]:FSO9*/ + [607] = {0xE7753498U, 0x00000002U}, /* SEC_MODID[607]:ADG*/ + [608] = {0xE775349CU, 0x00000002U}, /* SEC_MODID[608]:ECMSD0*/ + [609] = {0xE77534A0U, 0x00000002U}, /* SEC_MODID[609]:IPMMUDS010*/ + [610] = {0xE77534A4U, 0x00000002U}, /* SEC_MODID[610]:IPMMUDS011*/ + [611] = {0xE77534A8U, 0x00000002U}, /* SEC_MODID[611]:I2C0*/ + [612] = {0xE77534ACU, 0x00000002U}, /* SEC_MODID[612]:I2C1*/ + [613] = {0xE77534B0U, 0x00000002U}, /* SEC_MODID[613]:I2C2*/ + [614] = {0xE77534B4U, 0x00000002U}, /* SEC_MODID[614]:I2C3*/ + [615] = {0xE77534C0U, 0x00000002U}, /* SEC_MODID[615]:IPMMUDS012*/ + [616] = {0xE77534C8U, 0x00000002U}, /* SEC_MODID[616]:IPMMUDS000*/ + [617] = {0xE77534CCU, 0x00000002U}, /* SEC_MODID[617]:IPMMUDS013*/ + [618] = {0xE77534D0U, 0x00000002U}, /* SEC_MODID[618]:IPMMUDS014*/ + [619] = {0xE77534D4U, 0x00000002U}, /* SEC_MODID[619]:IPMMUDS015*/ + [620] = {0xE77534D8U, 0x00000002U}, /* SEC_MODID[620]:IPMMUDS002*/ + [621] = {0xE77534DCU, 0x00000002U}, /* SEC_MODID[621]:IPMMUDS003*/ + [622] = {0xE77534E0U, 0x00000002U}, /* SEC_MODID[622]:IPMMUDS004*/ + [623] = {0xE77534E4U, 0x00000002U}, /* SEC_MODID[623]:IPMMUDS005*/ + [624] = {0xE77534E8U, 0x00000002U}, /* SEC_MODID[624]:SSI*/ + [625] = {0xE77534ECU, 0x00000002U}, /* SEC_MODID[625]:IPMMUDS006*/ + [626] = {0xE77534F0U, 0x00000002U}, /* SEC_MODID[626]:IPMMUDS007*/ + [627] = {0xE77534F4U, 0x00000002U}, /* SEC_MODID[627]:SYDM1P*/ + [628] = {0xE77534F8U, 0x00000002U}, /* SEC_MODID[628]:IPMMUDS008*/ + [629] = {0xE77534FCU, 0x00000002U}, /* SEC_MODID[629]:SYDM2P*/ + [630] = {0xE7753500U, 0x00000002U}, /* SEC_MODID[630]:IPMMUDS009*/ + [631] = {0xE7753640U, 0x00000002U}, /* SEC_MODID[631]:SYDM100*/ + [632] = {0xE7753644U, 0x00000002U}, /* SEC_MODID[632]:SYDM101*/ + [633] = {0xE7753648U, 0x00000002U}, /* SEC_MODID[633]:SYDM110*/ + [634] = {0xE775364CU, 0x00000002U}, /* SEC_MODID[634]:SYDM111*/ + [635] = {0xE7753650U, 0x00000002U}, /* SEC_MODID[635]:SYDM112*/ + [636] = {0xE7753654U, 0x00000002U}, /* SEC_MODID[636]:SYDM113*/ + [637] = {0xE7753658U, 0x00000002U}, /* SEC_MODID[637]:SYDM114*/ + [638] = {0xE775365CU, 0x00000002U}, /* SEC_MODID[638]:SYDM115*/ + [639] = {0xE7753660U, 0x00000002U}, /* SEC_MODID[639]:SYDM102*/ + [640] = {0xE7753664U, 0x00000002U}, /* SEC_MODID[640]:SYDM103*/ + [641] = {0xE7753668U, 0x00000002U}, /* SEC_MODID[641]:SYDM104*/ + [642] = {0xE775366CU, 0x00000002U}, /* SEC_MODID[642]:SYDM105*/ + [643] = {0xE7753670U, 0x00000002U}, /* SEC_MODID[643]:SYDM106*/ + [644] = {0xE7753674U, 0x00000002U}, /* SEC_MODID[644]:SYDM107*/ + [645] = {0xE7753678U, 0x00000002U}, /* SEC_MODID[645]:SYDM108*/ + [646] = {0xE775367CU, 0x00000002U}, /* SEC_MODID[646]:SYDM109*/ + [647] = {0xE7753680U, 0x00000002U}, /* SEC_MODID[647]:SYDM200*/ + [648] = {0xE7753684U, 0x00000002U}, /* SEC_MODID[648]:SYDM201*/ + [649] = {0xE7753688U, 0x00000002U}, /* SEC_MODID[649]:SYDM210*/ + [650] = {0xE775368CU, 0x00000002U}, /* SEC_MODID[650]:SYDM211*/ + [651] = {0xE7753690U, 0x00000002U}, /* SEC_MODID[651]:SYDM212*/ + [652] = {0xE7753694U, 0x00000002U}, /* SEC_MODID[652]:SYDM213*/ + [653] = {0xE7753698U, 0x00000002U}, /* SEC_MODID[653]:SYDM214*/ + [654] = {0xE775369CU, 0x00000002U}, /* SEC_MODID[654]:SYDM215*/ + [655] = {0xE77536A0U, 0x00000002U}, /* SEC_MODID[655]:SYDM202*/ + [656] = {0xE77536A4U, 0x00000002U}, /* SEC_MODID[656]:SYDM203*/ + [657] = {0xE77536A8U, 0x00000002U}, /* SEC_MODID[657]:SYDM204*/ + [658] = {0xE77536ACU, 0x00000002U}, /* SEC_MODID[658]:SYDM205*/ + [659] = {0xE77536B0U, 0x00000002U}, /* SEC_MODID[659]:SYDM206*/ + [660] = {0xE77536B4U, 0x00000002U}, /* SEC_MODID[660]:SYDM207*/ + [661] = {0xE77536B8U, 0x00000002U}, /* SEC_MODID[661]:SYDM208*/ + [662] = {0xE77536BCU, 0x00000002U}, /* SEC_MODID[662]:SYDM209*/ + [663] = {0xFE683400U, 0x00000002U}, /* SEC_MODID[663]:ARVC0*/ + [664] = {0xFE683404U, 0x00000002U}, /* SEC_MODID[664]:ARVC1*/ + [665] = {0xFE683408U, 0x00000002U}, /* SEC_MODID[665]:ARVC2*/ + [666] = {0xFE68340CU, 0x00000002U}, /* SEC_MODID[666]:ARVC3*/ + [667] = {0xFE683410U, 0x00000002U}, /* SEC_MODID[667]:AXIFBABUSVC*/ + [668] = {0xFE683414U, 0x00000002U}, /* SEC_MODID[668]:ARVC4*/ + [669] = {0xFE683418U, 0x00000002U}, /* SEC_MODID[669]:ARVC5*/ + [670] = {0xFE68341CU, 0x00000002U}, /* SEC_MODID[670]:ARVC6*/ + [671] = {0xFE683420U, 0x00000002U}, /* SEC_MODID[671]:ARVC7*/ + [672] = {0xFE683424U, 0x00000002U}, /* SEC_MODID[672]:ARVC8*/ + [673] = {0xFE68342CU, 0x00000002U}, /* SEC_MODID[673]:ECMVC0*/ + [674] = {0xFE683434U, 0x00000002U}, /* SEC_MODID[674]:IMR0*/ + [675] = {0xFE683438U, 0x00000002U}, /* SEC_MODID[675]:IMR1*/ + [676] = {0xFE68343CU, 0x00000002U}, /* SEC_MODID[676]:IPMMUVC01*/ + [677] = {0xFE683440U, 0x00000002U}, /* SEC_MODID[677]:IPMMUVC10*/ + [678] = {0xFE683444U, 0x00000002U}, /* SEC_MODID[678]:IMS0*/ + [679] = {0xFE683448U, 0x00000002U}, /* SEC_MODID[679]:IMS1*/ + [680] = {0xFE68344CU, 0x00000002U}, /* SEC_MODID[680]:IPMMUVC00*/ + [681] = {0xFE683450U, 0x00000002U}, /* SEC_MODID[681]:IPMMUVC11*/ + [682] = {0xFE683454U, 0x00000002U}, /* SEC_MODID[682]:IPMMUVC12*/ + [683] = {0xFE683458U, 0x00000002U}, /* SEC_MODID[683]:IPMMUVC13*/ + [684] = {0xFE68345CU, 0x00000002U}, /* SEC_MODID[684]:IPMMUVC14*/ + [685] = {0xFE683460U, 0x00000002U}, /* SEC_MODID[685]:IPMMUVC15*/ + [686] = {0xFE683464U, 0x00000002U}, /* SEC_MODID[686]:IPMMUVC02*/ + [687] = {0xFE683468U, 0x00000002U}, /* SEC_MODID[687]:IPMMUVC03*/ + [688] = {0xFE68346CU, 0x00000002U}, /* SEC_MODID[688]:IPMMUVC04*/ + [689] = {0xFE683470U, 0x00000002U}, /* SEC_MODID[689]:IPMMUVC05*/ + [690] = {0xFE683474U, 0x00000002U}, /* SEC_MODID[690]:IPMMUVC06*/ + [691] = {0xFE683478U, 0x00000002U}, /* SEC_MODID[691]:IPMMUVC07*/ + [692] = {0xFE68347CU, 0x00000002U}, /* SEC_MODID[692]:IPMMUVC08*/ + [693] = {0xFE683480U, 0x00000002U}, /* SEC_MODID[693]:IPMMUVC09*/ + [694] = {0xFE683484U, 0x00000002U}, /* SEC_MODID[694]:IV1ES*/ + [695] = {0xFEBE3400U, 0x00000002U}, /* SEC_MODID[695]:CSITOP0*/ + [696] = {0xFEBE3404U, 0x00000002U}, /* SEC_MODID[696]:ARVI10*/ + [697] = {0xFEBE3408U, 0x00000002U}, /* SEC_MODID[697]:ARVI11*/ + [698] = {0xFEBE340CU, 0x00000002U}, /* SEC_MODID[698]:ARVI12*/ + [699] = {0xFEBE3410U, 0x00000002U}, /* SEC_MODID[699]:ARVI13*/ + [700] = {0xFEBE3414U, 0x00000002U}, /* SEC_MODID[700]:ARVI14*/ + [701] = {0xFEBE3418U, 0x00000002U}, /* SEC_MODID[701]:ARVI15*/ + [702] = {0xFEBE341CU, 0x00000002U}, /* SEC_MODID[702]:ARVI16*/ + [703] = {0xFEBE3420U, 0x00000002U}, /* SEC_MODID[703]:ARVI17*/ + [704] = {0xFEBE3424U, 0x00000002U}, /* SEC_MODID[704]:ARVI18*/ + [705] = {0xFEBE342CU, 0x00000002U}, /* SEC_MODID[705]:CSITOP1*/ + [706] = {0xFEBE3434U, 0x00000002U}, /* SEC_MODID[706]:DSITLINK0*/ + [707] = {0xFEBE343CU, 0x00000002U}, /* SEC_MODID[707]:ECMVIO1*/ + [708] = {0xFEBE3444U, 0x00000002U}, /* SEC_MODID[708]:IPMMUVI001*/ + [709] = {0xFEBE3448U, 0x00000002U}, /* SEC_MODID[709]:FCPVX0*/ + [710] = {0xFEBE3458U, 0x00000002U}, /* SEC_MODID[710]:IPMMUVI000*/ + [711] = {0xFEBE345CU, 0x00000002U}, /* SEC_MODID[711]:IPMMUVI100*/ + [712] = {0xFEBE3460U, 0x00000002U}, /* SEC_MODID[712]:IPMMUVI010*/ + [713] = {0xFEBE3464U, 0x00000002U}, /* SEC_MODID[713]:IPMMUVI011*/ + [714] = {0xFEBE3468U, 0x00000002U}, /* SEC_MODID[714]:VSPX0*/ + [715] = {0xFEBE3478U, 0x00000002U}, /* SEC_MODID[715]:IPMMUVI012*/ + [716] = {0xFEBE347CU, 0x00000002U}, /* SEC_MODID[716]:IPMMUVI013*/ + [717] = {0xFEBE3480U, 0x00000002U}, /* SEC_MODID[717]:IPMMUVI014*/ + [718] = {0xFEBE3484U, 0x00000002U}, /* SEC_MODID[718]:IPMMUVI015*/ + [719] = {0xFEBE3488U, 0x00000002U}, /* SEC_MODID[719]:IPMMUVI002*/ + [720] = {0xFEBE348CU, 0x00000002U}, /* SEC_MODID[720]:IPMMUVI003*/ + [721] = {0xFEBE3490U, 0x00000002U}, /* SEC_MODID[721]:IPMMUVI004*/ + [722] = {0xFEBE3494U, 0x00000002U}, /* SEC_MODID[722]:IPMMUVI005*/ + [723] = {0xFEBE3498U, 0x00000002U}, /* SEC_MODID[723]:IPMMUVI006*/ + [724] = {0xFEBE349CU, 0x00000002U}, /* SEC_MODID[724]:IPMMUVI007*/ + [725] = {0xFEBE34A0U, 0x00000002U}, /* SEC_MODID[725]:IPMMUVI008*/ + [726] = {0xFEBE34A4U, 0x00000002U}, /* SEC_MODID[726]:IPMMUVI009*/ + [727] = {0xFEBE34A8U, 0x00000002U}, /* SEC_MODID[727]:IPMMUVI101*/ + [728] = {0xFEBE34ACU, 0x00000002U}, /* SEC_MODID[728]:IPMMUVI110*/ + [729] = {0xFEBE34B0U, 0x00000002U}, /* SEC_MODID[729]:IPMMUVI111*/ + [730] = {0xFEBE34B4U, 0x00000002U}, /* SEC_MODID[730]:IPMMUVI112*/ + [731] = {0xFEBE34B8U, 0x00000002U}, /* SEC_MODID[731]:IPMMUVI113*/ + [732] = {0xFEBE34BCU, 0x00000002U}, /* SEC_MODID[732]:IPMMUVI114*/ + [733] = {0xFEBE34C0U, 0x00000002U}, /* SEC_MODID[733]:IPMMUVI115*/ + [734] = {0xFEBE34C4U, 0x00000002U}, /* SEC_MODID[734]:IPMMUVI102*/ + [735] = {0xFEBE34C8U, 0x00000002U}, /* SEC_MODID[735]:IPMMUVI103*/ + [736] = {0xFEBE34CCU, 0x00000002U}, /* SEC_MODID[736]:IPMMUVI104*/ + [737] = {0xFEBE34D0U, 0x00000002U}, /* SEC_MODID[737]:IPMMUVI105*/ + [738] = {0xFEBE34D4U, 0x00000002U}, /* SEC_MODID[738]:IPMMUVI106*/ + [739] = {0xFEBE34D8U, 0x00000002U}, /* SEC_MODID[739]:IPMMUVI107*/ + [740] = {0xFEBE34DCU, 0x00000002U}, /* SEC_MODID[740]:IPMMUVI108*/ + [741] = {0xFEBE34E0U, 0x00000002U}, /* SEC_MODID[741]:IPMMUVI109*/ + [742] = {0xFEBE3504U, 0x00000002U}, /* SEC_MODID[742]:AXIFBABUSVIO*/ + [743] = {0xFEBF3400U, 0x00000002U}, /* SEC_MODID[743]:ARVI0*/ + [744] = {0xFEBF3404U, 0x00000002U}, /* SEC_MODID[744]:ARVI1*/ + [745] = {0xFEBF3408U, 0x00000002U}, /* SEC_MODID[745]:ARVI2*/ + [746] = {0xFEBF340CU, 0x00000002U}, /* SEC_MODID[746]:ARVI3*/ + [747] = {0xFEBF3410U, 0x00000002U}, /* SEC_MODID[747]:ARVI4*/ + [748] = {0xFEBF3414U, 0x00000002U}, /* SEC_MODID[748]:ARVI5*/ + [749] = {0xFEBF3418U, 0x00000002U}, /* SEC_MODID[749]:ARVI6*/ + [750] = {0xFEBF341CU, 0x00000002U}, /* SEC_MODID[750]:ARVI7*/ + [751] = {0xFEBF3420U, 0x00000002U}, /* SEC_MODID[751]:ARVI8*/ + [752] = {0xFEBF3424U, 0x00000002U}, /* SEC_MODID[752]:ECMVIO0*/ + [753] = {0xFEBF342CU, 0x00000002U}, /* SEC_MODID[753]:ISP0*/ + [754] = {0xFEBF3428U, 0x00000002U}, /* SEC_MODID[754]:ISP0CORE*/ + [755] = {0xFEBF3454U, 0x00000002U}, /* SEC_MODID[755]:VIN00*/ + [756] = {0xFEBF3458U, 0x00000002U}, /* SEC_MODID[756]:VIN01*/ + [757] = {0xFEBF345CU, 0x00000002U}, /* SEC_MODID[757]:VIN02*/ + [758] = {0xFEBF3460U, 0x00000002U}, /* SEC_MODID[758]:VIN03*/ + [759] = {0xFEBF3464U, 0x00000002U}, /* SEC_MODID[759]:VIN04*/ + [760] = {0xFEBF3468U, 0x00000002U}, /* SEC_MODID[760]:VIN05*/ + [761] = {0xFEBF346CU, 0x00000002U}, /* SEC_MODID[761]:VIN06*/ + [762] = {0xFEBF3470U, 0x00000002U}, /* SEC_MODID[762]:VIN07*/ + [763] = {0xFEBF3474U, 0x00000002U}, /* SEC_MODID[763]:VIN10*/ + [764] = {0xFEBF3478U, 0x00000002U}, /* SEC_MODID[764]:VIN11*/ + [765] = {0xFEBF347CU, 0x00000002U}, /* SEC_MODID[765]:VIN12*/ + [766] = {0xFEBF3480U, 0x00000002U}, /* SEC_MODID[766]:VIN13*/ + [767] = {0xFEBF3484U, 0x00000002U}, /* SEC_MODID[767]:VIN14*/ + [768] = {0xFEBF3488U, 0x00000002U}, /* SEC_MODID[768]:VIN15*/ + [769] = {0xFEBF348CU, 0x00000002U}, /* SEC_MODID[769]:VIN16*/ + [770] = {0xFEBF3490U, 0x00000002U}, /* SEC_MODID[770]:VIN17*/ + [771] = {0xE7B13400U, 0x00000002U}, /* SEC_MODID[771]:ARVIP00*/ + [772] = {0xE7B13404U, 0x00000002U}, /* SEC_MODID[772]:ARVIP01*/ + [773] = {0xE7B13408U, 0x00000002U}, /* SEC_MODID[773]:ARVIP02*/ + [774] = {0xE7B1340CU, 0x00000002U}, /* SEC_MODID[774]:ARVIP03*/ + [775] = {0xE7B13410U, 0x00000002U}, /* SEC_MODID[775]:AXIFBABUSVIP0*/ + [776] = {0xE7B13414U, 0x00000002U}, /* SEC_MODID[776]:ARVIP04*/ + [777] = {0xE7B13418U, 0x00000002U}, /* SEC_MODID[777]:ARVIP05*/ + [778] = {0xE7B1341CU, 0x00000002U}, /* SEC_MODID[778]:ARVIP06*/ + [779] = {0xE7B13420U, 0x00000002U}, /* SEC_MODID[779]:ARVIP07*/ + [780] = {0xE7B13424U, 0x00000002U}, /* SEC_MODID[780]:ARVIP08*/ + [781] = {0xE7B1342CU, 0x00000002U}, /* SEC_MODID[781]:ECMVIP0*/ + [782] = {0xE7B13430U, 0x00000002U}, /* SEC_MODID[782]:IPMMUVIP000*/ + [783] = {0xE7B13438U, 0x00000002U}, /* SEC_MODID[783]:SMPO0*/ + [784] = {0xE7B1343CU, 0x00000002U}, /* SEC_MODID[784]:SMPS0*/ + [785] = {0xE7B13440U, 0x00000002U}, /* SEC_MODID[785]:UMFL0*/ + [786] = {0xE7B13444U, 0x00000002U}, /* SEC_MODID[786]:IPMMUVIP001*/ + [787] = {0xE7B13448U, 0x00000002U}, /* SEC_MODID[787]:IPMMUVIP010*/ + [788] = {0xE7B1344CU, 0x00000002U}, /* SEC_MODID[788]:IPMMUVIP011*/ + [789] = {0xE7B13450U, 0x00000002U}, /* SEC_MODID[789]:UMFL0M_W*/ + [790] = {0xE7B13454U, 0x00000002U}, /* SEC_MODID[790]:IPMMUVIP012*/ + [791] = {0xE7B13458U, 0x00000002U}, /* SEC_MODID[791]:IPMMUVIP013*/ + [792] = {0xE7B1345CU, 0x00000002U}, /* SEC_MODID[792]:IPMMUVIP014*/ + [793] = {0xE7B13460U, 0x00000002U}, /* SEC_MODID[793]:IPMMUVIP015*/ + [794] = {0xE7B13464U, 0x00000002U}, /* SEC_MODID[794]:IPMMUVIP002*/ + [795] = {0xE7B13468U, 0x00000002U}, /* SEC_MODID[795]:IPMMUVIP003*/ + [796] = {0xE7B1346CU, 0x00000002U}, /* SEC_MODID[796]:IPMMUVIP004*/ + [797] = {0xE7B13470U, 0x00000002U}, /* SEC_MODID[797]:IPMMUVIP005*/ + [798] = {0xE7B13474U, 0x00000002U}, /* SEC_MODID[798]:IPMMUVIP006*/ + [799] = {0xE7B13478U, 0x00000002U}, /* SEC_MODID[799]:IPMMUVIP007*/ + [800] = {0xE7B1347CU, 0x00000002U}, /* SEC_MODID[800]:IPMMUVIP008*/ + [801] = {0xE7B13480U, 0x00000002U}, /* SEC_MODID[801]:IPMMUVIP009*/ + [802] = {0xFF8834A0U, 0x00000002U}, /* SEC_MODID[802]:ARDSP0*/ + [803] = {0xFF8834A4U, 0x00000002U}, /* SEC_MODID[803]:ARDSP1*/ + [804] = {0xFF8834A8U, 0x00000002U}, /* SEC_MODID[804]:ARDSP2*/ + [805] = {0xFF8834ACU, 0x00000002U}, /* SEC_MODID[805]:ARDSP3*/ + [806] = {0xFF8834B0U, 0x00000002U}, /* SEC_MODID[806]:ARDSP4*/ + [807] = {0xFF8834B4U, 0x00000002U}, /* SEC_MODID[807]:ARDSP5*/ + [808] = {0xFF8834B8U, 0x00000002U}, /* SEC_MODID[808]:ARDSP6*/ + [809] = {0xFF8834BCU, 0x00000002U}, /* SEC_MODID[809]:ARDSP7*/ + [810] = {0xFF8834C0U, 0x00000002U}, /* SEC_MODID[810]:ECMDSP*/ + [811] = {0xFF883490U, 0x00000002U}, /* SEC_MODID[811]:AXIDSP0*/ + [812] = {0xFF883494U, 0x00000002U}, /* SEC_MODID[812]:AXIDSP1*/ + [813] = {0xFF883498U, 0x00000002U}, /* SEC_MODID[813]:AXIDSP2*/ + [814] = {0xFF88349CU, 0x00000002U}, /* SEC_MODID[814]:AXIDSP3*/ + [815] = {0xE7753424U, 0x00000002U}, /* SEC_MODID[815]:RSV0*/ + [816] = {0xE7B1350CU, 0x00000002U}, /* SEC_MODID[816]:PAP*/ + [817] = {0xFEBD3428U, 0x00000002U}, /* SEC_MODID[817]:DOC*/ + [818] = {0xFEBF3430U, 0x00000002U}, /* SEC_MODID[818]:ISP1*/ + [819] = {0xE6003400U, 0x00000002U}, /* SEC_MODID[819]:AVS*/ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_axi_tbl" +const REGION_ID_SETTING_TABLE g_rgid_axi_tbl[] = { + [0] = {0xFFC82010U, 0x0000000FU}, /* RGIDR_MODID[4]:ARRT01*/ + [1] = {0xFFC82014U, 0x0000000FU}, /* RGIDR_MODID[5]:ARRT02*/ + [2] = {0xE6002048U, 0x0000000FU}, /* RGIDR_MODID[41]:ARS01*/ + [3] = {0xE600204CU, 0x0000000FU}, /* RGIDR_MODID[42]:ARS02*/ + [4] = {0xE7762028U, 0x0000000FU}, /* RGIDR_MODID[99]:ARSP31*/ + [5] = {0xE776202CU, 0x0000000FU}, /* RGIDR_MODID[100]:ARSP32*/ + [6] = {0xE7792004U, 0x0000000FU}, /* RGIDR_MODID[114]:ARSP41*/ + [7] = {0xE7792008U, 0x0000000FU}, /* RGIDR_MODID[115]:ARSP42*/ + [8] = {0xFEBD2004U, 0x0000000FU}, /* RGIDR_MODID[153]:ARVI41*/ + [9] = {0xFEBD2008U, 0x0000000FU}, /* RGIDR_MODID[154]:ARVI42*/ + [10] = {0xE6582140U, 0x0000000FU}, /* RGIDR_MODID[199]:ARHC1*/ + [11] = {0xE6582144U, 0x0000000FU}, /* RGIDR_MODID[200]:ARHC2*/ + [12] = {0xFF882004U, 0x0000000FU}, /* RGIDR_MODID[215]:ARIMP01*/ + [13] = {0xFF882008U, 0x0000000FU}, /* RGIDR_MODID[216]:ARIMP02*/ + [14] = {0xFD812004U, 0x0000000FU}, /* RGIDR_MODID[247]:ARPV1*/ + [15] = {0xFD81200CU, 0x0000000FU}, /* RGIDR_MODID[249]:ARPV2*/ + [16] = {0xE6622004U, 0x0000000FU}, /* RGIDR_MODID[279]:ARRC1*/ + [17] = {0xE6622008U, 0x0000000FU}, /* RGIDR_MODID[280]:ARRC2*/ + [18] = {0xFFC42060U, 0x0000000FU}, /* RGIDR_MODID[316]:ARRD1*/ + [19] = {0xFFC42064U, 0x0000000FU}, /* RGIDR_MODID[317]:ARRD2*/ + [20] = {0xFFC42084U, 0x0000000FU}, /* RGIDR_MODID[325]:ARRT1*/ + [21] = {0xFFC42088U, 0x0000000FU}, /* RGIDR_MODID[326]:ARRT2*/ + [24] = {0xFF862004U, 0x0000000FU}, /* RGIDR_MODID[464]:ARSC1*/ + [25] = {0xFF862008U, 0x0000000FU}, /* RGIDR_MODID[465]:ARSC2*/ + [22] = {0xFF862028U, 0x0000000FU}, /* RGIDR_MODID[473]:ARSTM1*/ + [23] = {0xFF862038U, 0x0000000FU}, /* RGIDR_MODID[476]:ARSTM2*/ + [26] = {0xE67C2004U, 0x0000000FU}, /* RGIDR_MODID[516]:AXIARNMM*/ + [27] = {0xE67C200CU, 0x0000000FU}, /* RGIDR_MODID[518]:ARSM1*/ + [28] = {0xE67C2010U, 0x0000000FU}, /* RGIDR_MODID[519]:ARSM2*/ + [29] = {0xFF802004U, 0x0000000FU}, /* RGIDR_MODID[562]:ARSN1*/ + [30] = {0xFF802008U, 0x0000000FU}, /* RGIDR_MODID[563]:ARSN2*/ + [31] = {0xE7752004U, 0x0000000FU}, /* RGIDR_MODID[572]:ARSD01*/ + [32] = {0xE7752008U, 0x0000000FU}, /* RGIDR_MODID[573]:ARSD02*/ + [33] = {0xE775203CU, 0x0000000FU}, /* RGIDR_MODID[584]:ARSP01*/ + [34] = {0xE7752040U, 0x0000000FU}, /* RGIDR_MODID[585]:ARSP02*/ + [35] = {0xFE682004U, 0x0000000FU}, /* RGIDR_MODID[664]:ARVC1*/ + [36] = {0xFE682008U, 0x0000000FU}, /* RGIDR_MODID[665]:ARVC2*/ + [37] = {0xFEBE2008U, 0x0000000FU}, /* RGIDR_MODID[697]:ARVI11*/ + [38] = {0xFEBE200CU, 0x0000000FU}, /* RGIDR_MODID[698]:ARVI12*/ + [39] = {0xFEBF2004U, 0x0000000FU}, /* RGIDR_MODID[744]:ARVI1*/ + [40] = {0xFEBF2008U, 0x0000000FU}, /* RGIDR_MODID[745]:ARVI2*/ + [41] = {0xE7B12004U, 0x0000000FU}, /* RGIDR_MODID[772]:ARVIP01*/ + [42] = {0xE7B12008U, 0x0000000FU}, /* RGIDR_MODID[773]:ARVIP02*/ + [43] = {0xFF8820A4U, 0x0000000FU}, /* RGIDR_MODID[803]:ARDSP1*/ + [44] = {0xFF8820A8U, 0x0000000FU}, /* RGIDR_MODID[804]:ARDSP2*/ + [45] = {0xFFC82410U, 0x00000000U}, /* RGIDW_MODID[4]:ARRT01*/ + [46] = {0xFFC82414U, 0x00000000U}, /* RGIDW_MODID[5]:ARRT02*/ + [47] = {0xE6002448U, 0x00000000U}, /* RGIDW_MODID[41]:ARS01*/ + [48] = {0xE600244CU, 0x00000000U}, /* RGIDW_MODID[42]:ARS02*/ + [49] = {0xE7762428U, 0x00000000U}, /* RGIDW_MODID[99]:ARSP31*/ + [50] = {0xE776242CU, 0x00000000U}, /* RGIDW_MODID[100]:ARSP32*/ + [51] = {0xE7792404U, 0x00000000U}, /* RGIDW_MODID[114]:ARSP41*/ + [52] = {0xE7792408U, 0x00000000U}, /* RGIDW_MODID[115]:ARSP42*/ + [53] = {0xFEBD2404U, 0x00000000U}, /* RGIDW_MODID[153]:ARVI41*/ + [54] = {0xFEBD2408U, 0x00000000U}, /* RGIDW_MODID[154]:ARVI42*/ + [55] = {0xE6582540U, 0x00000000U}, /* RGIDW_MODID[199]:ARHC1*/ + [56] = {0xE6582544U, 0x00000000U}, /* RGIDW_MODID[200]:ARHC2*/ + [57] = {0xFF8824A4U, 0x00000000U}, /* RGIDW_MODID[802]:ARDSP1*/ + [58] = {0xFF8824A8U, 0x00000000U}, /* RGIDW_MODID[803]:ARDSP2*/ + [59] = {0xFF882404U, 0x00000000U}, /* RGIDW_MODID[215]:ARIMP01*/ + [60] = {0xFF882408U, 0x00000000U}, /* RGIDW_MODID[216]:ARIMP02*/ + [61] = {0xFD812404U, 0x00000000U}, /* RGIDW_MODID[247]:ARPV1*/ + [62] = {0xFD81240CU, 0x00000000U}, /* RGIDW_MODID[249]:ARPV2*/ + [63] = {0xE6622404U, 0x00000000U}, /* RGIDW_MODID[279]:ARRC1*/ + [64] = {0xE6622408U, 0x00000000U}, /* RGIDW_MODID[280]:ARRC2*/ + [65] = {0xFFC42460U, 0x00000000U}, /* RGIDW_MODID[315]:ARRD1*/ + [66] = {0xFFC42464U, 0x00000000U}, /* RGIDW_MODID[316]:ARRD2*/ + [67] = {0xFFC42484U, 0x00000000U}, /* RGIDW_MODID[324]:ARRT1*/ + [68] = {0xFFC42488U, 0x00000000U}, /* RGIDW_MODID[325]:ARRT2*/ + [71] = {0xFF862404U, 0x00000000U}, /* RGIDW_MODID[463]:ARSC1*/ + [72] = {0xFF862408U, 0x00000000U}, /* RGIDW_MODID[464]:ARSC2*/ + [69] = {0xFF862428U, 0x00000000U}, /* RGIDW_MODID[472]:ARSTM1*/ + [70] = {0xFF862438U, 0x00000000U}, /* RGIDW_MODID[475]:ARSTM2*/ + [73] = {0xE67C2404U, 0x00000000U}, /* RGIDW_MODID[515]:AXIARNMM*/ + [74] = {0xE67C240CU, 0x00000000U}, /* RGIDW_MODID[517]:ARSM1*/ + [75] = {0xE67C2410U, 0x00000000U}, /* RGIDW_MODID[518]:ARSM2*/ + [76] = {0xFF802404U, 0x00000000U}, /* RGIDW_MODID[561]:ARSN1*/ + [77] = {0xFF802408U, 0x00000000U}, /* RGIDW_MODID[562]:ARSN2*/ + [78] = {0xE7752404U, 0x00000000U}, /* RGIDW_MODID[571]:ARSD01*/ + [79] = {0xE7752408U, 0x00000000U}, /* RGIDW_MODID[572]:ARSD02*/ + [80] = {0xE775243CU, 0x00000000U}, /* RGIDW_MODID[583]:ARSP01*/ + [81] = {0xE7752440U, 0x00000000U}, /* RGIDW_MODID[584]:ARSP02*/ + [82] = {0xFE682404U, 0x00000000U}, /* RGIDW_MODID[663]:ARVC1*/ + [83] = {0xFE682408U, 0x00000000U}, /* RGIDW_MODID[664]:ARVC2*/ + [84] = {0xFEBE2408U, 0x00000000U}, /* RGIDW_MODID[696]:ARVI11*/ + [85] = {0xFEBE240CU, 0x00000000U}, /* RGIDW_MODID[697]:ARVI12*/ + [86] = {0xFEBF2404U, 0x00000000U}, /* RGIDW_MODID[743]:ARVI1*/ + [87] = {0xFEBF2408U, 0x00000000U}, /* RGIDW_MODID[744]:ARVI2*/ + [88] = {0xE7B12404U, 0x00000000U}, /* RGIDW_MODID[771]:ARVIP01*/ + [89] = {0xE7B12408U, 0x00000000U}, /* RGIDW_MODID[772]:ARVIP02*/ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_gid_tbl" +const REGION_ID_SETTING_TABLE g_rgid_gid_tbl[] = { + [0] = {0xF12F0000U, 0x000F0024U}, /* CCI MPU GID register 0 */ + /* Physical address:0xF12F0000, Logical address 0x0xFC0F0000 */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +const uint32_t g_rgid_rtdma_setting_value[RTDMA_MODULE_MAX][RTDMA_CH_MAX][2U] = { + {/* Module0 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + }, + {/* Module1 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + }, +}; + +const uint32_t g_rgid_sysdma_setting_value[SYSDMA_MODULE_MAX][SYSDMA_CH_MAX][2U] = { + {/* Module0 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {SYSDMA_EN, RGID_2}, /* CH0 */ + [1] = {SYSDMA_EN, RGID_2}, /* CH1 */ + [2] = {SYSDMA_EN, RGID_2}, /* CH2 */ + [3] = {SYSDMA_EN, RGID_2}, /* CH3 */ + [4] = {SYSDMA_EN, RGID_2}, /* CH4 */ + [5] = {SYSDMA_EN, RGID_2}, /* CH5 */ + [6] = {SYSDMA_EN, RGID_2}, /* CH6 */ + [7] = {SYSDMA_EN, RGID_2}, /* CH7 */ + [8] = {SYSDMA_EN, RGID_2}, /* CH8 */ + [9] = {SYSDMA_EN, RGID_2}, /* CH9 */ + [10] = {SYSDMA_EN, RGID_2}, /* CH10 */ + [11] = {SYSDMA_EN, RGID_2}, /* CH11 */ + [12] = {SYSDMA_EN, RGID_2}, /* CH12 */ + [13] = {SYSDMA_EN, RGID_2}, /* CH13 */ + [14] = {SYSDMA_EN, RGID_2}, /* CH14 */ + [15] = {SYSDMA_EN, RGID_2} /* CH15 */ + }, + {/* Module1 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {SYSDMA_EN, RGID_2}, /* CH0 */ + [1] = {SYSDMA_EN, RGID_2}, /* CH1 */ + [2] = {SYSDMA_EN, RGID_2}, /* CH2 */ + [3] = {SYSDMA_EN, RGID_2}, /* CH3 */ + [4] = {SYSDMA_EN, RGID_2}, /* CH4 */ + [5] = {SYSDMA_EN, RGID_2}, /* CH5 */ + [6] = {SYSDMA_EN, RGID_2}, /* CH6 */ + [7] = {SYSDMA_EN, RGID_2}, /* CH7 */ + [8] = {SYSDMA_EN, RGID_INVALID}, /* reserved */ + [9] = {SYSDMA_EN, RGID_INVALID}, /* reserved */ + [10] = {SYSDMA_EN, RGID_INVALID}, /* reserved */ + [11] = {SYSDMA_EN, RGID_INVALID}, /* reserved */ + [12] = {SYSDMA_EN, RGID_INVALID}, /* reserved */ + [13] = {SYSDMA_EN, RGID_INVALID}, /* reserved */ + [14] = {SYSDMA_EN, RGID_INVALID}, /* reserved */ + [15] = {SYSDMA_EN, RGID_INVALID} /* reserved */ + }, +}; + +/* When V4H, this table is used as RT-VRAM0. */ +/* RAM protection setting for SECDIV[n]D_0 / SECCTRR[m]D_0 / SECCTRW[m]D_0 */ +const RTRAM_PROTECTION_STRUCTUR g_rtsram_protection_table[RAM_PROTECTION_MAX] = { + /* address READ Write */ + [RTSRAM_ICUMX_IPL_AREA] = {NOT_USED_VALUE, {0x0000FFFCU, 0x0000FFFEU}}, /* not used for address value */ + /* Area0 phys:0xE0000000-0xE003FFFF R:RGID0/1 W:RGID0 */ + [RTSRAM_ICUMX_FW_AREA] = {RTSRAM_AREA1_TOP, {0x0004FFFEU, 0x0004FFFEU}}, /* Area1 phys:0xE0040000-0xE00FFFFF R:RGID0 W:RGID0 */ + [2] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [3] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +/* this table is finaly setting for RT-VRAM protection */ +/* RAM protection setting for SECDIV[n]D_1 / SECCTRR[m]D_1 / SECCTRW[m]D_1 */ +const RTRAM_PROTECTION_STRUCTUR g_rtvram1_protection_table_1[RAM_PROTECTION_MAX] = { + /* address READ Write */ + [RTVRAM_BLANK_AREA] = {NOT_USED_VALUE, {0x0000FFB6U, 0x0000FFB2U}}, /* not used for address value */ + /* Area0 phys:0xE2000000-0xE200FFFF R:RGID0/3/6 W:RGID0/2/3/6 */ + [RTVRAM_EXTEND_CACHE_AREA] = {RTVRAM_AREA1_TOP, {0x0000BFFFU, 0x0000BFFFU}}, /* Area1 phys:0xE2010000-0xE20FFFFF R:RGID14 W:RGID14 */ + [RTVRAM_RTOS_AREA] = {RTVRAM_AREA2_TOP, {0x0000FFF4U, 0x0000FFF0U}}, /* Area2 phys:0xE2100000-0xE3BFFFFF R:RGID0/1/3 W:RGID0/1/2/3 */ + [3] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +/* RAM protection setting for SPTDIVCR[n] / SPTRGNCR[n] / SPTSECCR[n] */ +const SYSTEM_RAM_PROTECTION_STRUCTUR g_system_ram_protection_table[RAM_PROTECTION_MAX] = { + /* access Secure */ + /* address R | W R|W */ + [SYSTEM_RAM_CX_2ND_IPL] = {NOT_USED_VALUE, {0xFFD8FFD8U, 0x00000000U}}, /* not used for address value */ + /* Area0 phys:0xE6300000-0xE635DFFF R:RGID0/1/2/5 W:RGID0/1/2/5 */ + [SYSTEM_RAM_SHARED_MEM] = {SYSTEM_RAM_AREA1_TOP, {0xFFD8FFD8U, 0x00000000U}}, /* Area1 phys:0xE635E000-0xE635FFFF R:RGID0/1/2/5 W:RGID0/1/2/5 */ + [2] = {SYSTEM_RAM_AREA2_TOP, {0xFFDAFFDAU, 0x00000000U}}, /* Area2 phys:0xE6360000-0xE63FFFFF R:RGID0/2/5 W:RGID0/2/5 */ + [3] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +/* RAM protection setting for DPTDIVCR[n] / DPTRGNCR[n] / DPTSECCR[n] */ +const DRAM_PROTECTION_STRUCTUR g_dram_protection_table[DRAM_PROTECTION_MAX] = { + /* access secure */ + /* address R | W R|W */ + [RTVRAM_EXTEND_AREA] = {NOT_USED_VALUE, {0xBFFFBFFFU, 0x00000000U}}, /* not used for address value */ + /* Area0 phys:0x04_00000000-0x04_01BFFFFF R:RGID14 W:RGID14 */ + [CR_FW_SHARED_AREA] = {DRAM_ADDR_AREA1, {0xFFBCFFBCU, 0x00000000U}}, /* Area1 phys:0x04_01C00000-0x04_01CFFFFF R:RGID0/1/6 W:RGID0/1/6 */ + [SDRAM_BLANK_AREA] = {DRAM_ADDR_AREA2, {0xFF90FF90U, 0x00000000U}}, /* Area2:OPTEE_DISABLE phys:0x04_01D00000-0x04_063FFFFF + * Area2:OPTEE_ENABLE phys:0x04_01D00000-0x04_040FFFFF + * R:RGID0/1/2/3/5/6 W:RGID0/1/2/3/5/6 */ +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) + [SDRAM_PROTECT_AREA] = {DRAM_ADDR_AREA3, {0xFFFAFFF8U, 0x00000000U}}, /* Area3 phys:0x04_06400000-0x04_0643FFFF R:RGID0/2 W:RGID0/1/2 */ + [SDRAM_PUBLIC_AREA] = {DRAM_ADDR_AREA4, {0xFF90FF90U, 0x00000000U}}, /* Area4 phys:0x04_06440000-0x04_07FBFFFF R:RGID0/1/2/3/5/6 W:RGID0/1/2/3/5/6 */ + [ICCOM_USED_AREA] = {DRAM_ADDR_AREA5, {0xFFB9FFB9U, 0x00000000U}}, /* Area5 phys:0x04_07FC0000-0x04_07FFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [LINUX_USED_AREA] = {DRAM_ADDR_AREA6, {0xFFB0FFB0U, 0x00000000U}}, /* Area6 phys:0x04_08000000-0x04_1DBFFFFF R:RGID0/1/2/3/6 W:RGID0/1/2/3/6 */ + [CAAREA2_USED_AREA] = {DRAM_ADDR_AREA7, {0xFFB9FFB9U, 0x00000000U}}, /* Area7 phys:0x04_1DC00000-0x04_1FFFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [CR52_USED_AREA] = {DRAM_ADDR_AREA8, {0xFFBDFFBDU, 0x00000000U}}, /* Area8 phys:0x04_20000000-0x04_3FFFFFFF R:RGID1/6 W:RGID1/6 */ + [CAAREA3_USED_AREA] = {DRAM_ADDR_AREA9, {0xFFDDFFDDU, 0x00000000U}}, /* Area9 phys:0x04_40000000-0x04_5FFFFFFF R:RGID1/5 W:RGID1/5 */ + [CAAREA2_USED_AREA2] = {DRAM_ADDR_AREA10,{0xFFB9FFB9U, 0x00000000U}}, /* Area10 phys:0x04_60000000-0x04_7FFFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [CAAREA1_USED_AREA] = {DRAM_ADDR_AREA11,{0xBF90BF90U, 0x00000000U}}, /* Area11 phys:0x04_80000000-0x04_FFFFFFFF R:RGID0/1/2/3/5/6/14 W:RGID0/1/2/3/5/6/14 */ + [CAAREA1_USED_AREA2] = {DRAM_ADDR_AREA12,{0xFFF9FFF9U, 0x00000000U}}, /* Area12 phys:0x05_00000000-0x05_FFFFFFFF R:RGID1/2 W:RGID1/2 */ + [RESERVERD_AREA] = {DRAM_ADDR_AREA13,{0xFFFFFFFFU, 0x00000000U}}, /* Area13 phys:0x06_00000000-0x06_FFFFFFFF */ + [14] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [16] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +#else + [SDRAM_PROTECT_AREA] = {DRAM_ADDR_AREA3, {0xFFFAFFFAU, 0x00000000U}}, /* Area3 phys:0x04_04100000-0x04_063FFFFF R:RGID0/2 W:RGID0/2 */ + [SDRAM_PROTECT_AREA2]= {DRAM_ADDR_AREA4, {0xFFFAFFF8U, 0x00000000U}}, /* Area4 phys:0x04_06400000-0x04_0643FFFF R:RGID0/2 W:RGID0/1/2 */ + [SDRAM_BLANK_AREA2] = {DRAM_ADDR_AREA5, {0xFF90FF90U, 0x00000000U}}, /* Area5 phys:0x04_06440000-0x04_07DFFFFF R:RGID0/1/2/3/5/6 W:RGID0/1/2/3/5/6 */ + [OPTEE_SHARED_AREA] = {DRAM_ADDR_AREA6, {0xFFFBFFFBU, 0x00000000U}}, /* Area6 phys:0x04_07E00000-0x04_07EFFFFF R:RGID2 W:RGID2 */ + [SDRAM_BLANK_AREA3] = {DRAM_ADDR_AREA7, {0xFF90FF90U, 0x00000000U}}, /* Area7 phys:0x04_07F00000-0x04_07FBFFFF R:RGID0/1/2/3/5/6 W:RGID0/1/2/3/5/6 */ + [ICCOM_USED_AREA] = {DRAM_ADDR_AREA8, {0xFFB9FFB9U, 0x00000000U}}, /* Area8 phys:0x04_07FC0000-0x04_07FFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [LINUX_USED_AREA] = {DRAM_ADDR_AREA9, {0xFFB0FFB0U, 0x00000000U}}, /* Area9 phys:0x04_08000000-0x04_1DBFFFFF R:RGID0/1/2/3/6 W:RGID0/1/2/3/6 */ + [CAAREA2_USED_AREA] = {DRAM_ADDR_AREA10,{0xFFB9FFB9U, 0x00000000U}}, /* Area10 phys:0x04_1DC00000-0x04_1FFFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [CR52_USED_AREA] = {DRAM_ADDR_AREA11,{0xFFBDFFBDU, 0x00000000U}}, /* Area11 phys:0x04_20000000-0x04_3FFFFFFF R:RGID1/6 W:RGID1/6 */ + [CAAREA3_USED_AREA] = {DRAM_ADDR_AREA12,{0xFFDDFFDDU, 0x00000000U}}, /* Area12 phys:0x04_40000000-0x04_5FFFFFFF R:RGID1/5 W:RGID1/5 */ + [CAAREA2_USED_AREA2] = {DRAM_ADDR_AREA13,{0xFFB9FFB9U, 0x00000000U}}, /* Area13 phys:0x04_60000000-0x04_7FFFFFFF R:RGID1/2/6 W:RGID1/2/6 */ + [CAAREA1_USED_AREA] = {DRAM_ADDR_AREA14,{0xBF90BF90U, 0x00000000U}}, /* Area14 phys:0x04_80000000-0x04_FFFFFFFF R:RGID0/1/2/3/5/6/14 W:RGID0/1/2/3/5/6/14 */ + [CAAREA1_USED_AREA2] = {DRAM_ADDR_AREA15,{0xFFF9FFF9U, 0x00000000U}}, /* Area15 phys:0x05_00000000-0x05_FFFFFFFF R:RGID1/2 W:RGID1/2 */ + [RESERVERD_AREA] = {DRAM_ADDR_AREA16,{0xFFFFFFFFU, 0x00000000U}}, /* Area16 phys:0x06_00000000-0x06_FFFFFFFF */ +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ + [17] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [18] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [19] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [20] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [21] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [22] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [23] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [24] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [25] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [26] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [27] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [28] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [29] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [30] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [31] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [32] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [33] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [34] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [35] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [36] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [37] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [38] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [39] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [40] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [41] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [42] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [43] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [44] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [45] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [46] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [47] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [48] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [49] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [50] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [51] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [52] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [53] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [54] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [55] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [56] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [57] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [58] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [59] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [60] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [61] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [62] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [63] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +const CONFIGURATION_SETTING_TABLE g_fdt_tbl[FDT_REG_MAX] = { + [0] = {0xFCF80700U, 0x00000008U}, /*FDT_PCI00*/ + [1] = {0xFCF80710U, 0x00000005U}, /*FDT_AVB0*/ + [2] = {0xFCF80714U, 0x00000005U}, /*FDT_AVB1*/ + [3] = {0xFCF80718U, 0x00000005U}, /*FDT_AVB2*/ + [4] = {0xFCF80720U, 0x00000008U}, /*FDT_PCI01*/ + [5] = {0xFF880704U, 0x0000000BU}, /*FDT_FBABUSIR0*/ + [6] = {0xFF880708U, 0x0000000BU}, /*FDT_FBABUSIR1*/ + [7] = {0xFF88070CU, 0x0000000BU}, /*FDT_FBABUSIR2*/ + [8] = {0xFF880710U, 0x0000000BU}, /*FDT_FBABUSIR3*/ + [9] = {0xFF88071CU, 0x0000000BU}, /*FDT_IMP0*/ + [10] = {0xFF880720U, 0x0000000BU}, /*FDT_IMP1*/ + [11] = {0xFF880728U, 0x0000000BU}, /*FDT_DSPD*/ + [12] = {0xFF88072CU, 0x0000000BU}, /*FDT_DSPP*/ + [13] = {0xFC610714U, 0x00000008U}, /*FDT_RGX0*/ + [14] = {0xFDC2070CU, 0x00000008U}, /*FDT_DCLS_ICUMX*/ + [15] = {0xFDC20710U, 0x00000008U}, /*FDT_ICUMX*/ + [16] = {0xFD430700U, 0x00000008U}, /*FDT_PERI_RTDM0*/ + [17] = {0xFD430704U, 0x00000008U}, /*FDT_PERI_RTDM1*/ + [18] = {0xFD440708U, 0x00000008U}, /*FDT_BUS_RTDM0M*/ + [19] = {0xFD44070CU, 0x00000008U}, /*FDT_BUS_RTDM1M*/ + [20] = {0xFD440718U, 0x00000008U}, /*FDT_CR52SS0*/ + [21] = {0xFD44071CU, 0x00000008U}, /*FDT_CSD*/ + [22] = {0xFD440724U, 0x00000008U}, /*FDT_INTAP0*/ + [23] = {0xFD440728U, 0x00000008U}, /*FDT_MEM_RTDM0*/ + [24] = {0xFD44072CU, 0x00000008U}, /*FDT_MEM_RTDM1*/ + [25] = {0xFD44075CU, 0x00000008U}, /*FDT_CR52SS1*/ + [26] = {0xFD440760U, 0x00000008U}, /*FDT_CR52SS2*/ + [27] = {0xFF860710U, 0x00000008U}, /*FDT_CCI*/ + [28] = {0xFF860718U, 0x00000008U}, /*FDT_FBABUSTOP0*/ + [29] = {0xFCB80704U, 0x00000006U}, /*FDT_PERI_SYDM1*/ + [30] = {0xFCB80708U, 0x00000006U}, /*FDT_PERI_SYDM2*/ + [31] = {0xFCB50708U, 0x00000006U}, /*FDT_BUS_SYDM1*/ + [32] = {0xFCB5070CU, 0x00000006U}, /*FDT_BUS_SYDM2*/ + [33] = {0xFCB50710U, 0x00000004U}, /*FDT_FRAY*/ + [34] = {0xFCB50718U, 0x00000006U}, /*FDT_MEM_SYDM1*/ + [35] = {0xFCB5071CU, 0x00000006U}, /*FDT_MEM_SYDM2*/ + [36] = {0xFCB50720U, 0x00000006U}, /*FDT_SDHI0*/ + [37] = {0xFF810700U, 0x00000008U}, /*FDT_AXMM2AXSTM*/ + [38] = {0xFF810704U, 0x00000008U}, /*FDT_CSDE0*/ + [39] = {0xFF810708U, 0x00000008U}, /*FDT_CSDE1*/ + [40] = {0xFC080704U, 0x00000006U}, /*FDT_FBABUSVC*/ + [41] = {0xFC080710U, 0x0000000AU}, /*FDT_IMR00*/ + [42] = {0xFC080714U, 0x0000000AU}, /*FDT_IMR01*/ + [43] = {0xFC080724U, 0x0000000AU}, /*FDT_IMR10*/ + [44] = {0xFC080728U, 0x0000000AU}, /*FDT_IMR11*/ + [45] = {0xFC080740U, 0x0000000AU}, /*FDT_IMS0*/ + [46] = {0xFC080744U, 0x0000000AU}, /*FDT_IMS1*/ + [47] = {0xFC080748U, 0x0000000AU}, /*FDT_IV1ES*/ + [48] = {0xFC9E0700U, 0x00000005U}, /*FDT_DSITXLINK0*/ + [49] = {0xFC9E0708U, 0x00000008U}, /*FDT_FBABUSVIO*/ + [50] = {0xFC9E0714U, 0x00000008U}, /*FDT_FCPVD0*/ + [51] = {0xFC9E071CU, 0x00000008U}, /*FDT_FCPVX0*/ + [52] = {0xFC9F0700U, 0x0000000EU}, /*FDT_ISP02*/ + [53] = {0xFC9F0704U, 0x0000000EU}, /*FDT_ISP03*/ + [54] = {0xFC9F0708U, 0x0000000EU}, /*FDT_ISP04*/ + [55] = {0xFC9F0710U, 0x0000000EU}, /*FDT_VIN0*/ + [56] = {0xFC9F0714U, 0x0000000EU}, /*FDT_VIN1*/ + [57] = {0xFC9F0720U, 0x0000000EU}, /*FDT_ISP00*/ + [58] = {0xFC9F0724U, 0x0000000EU}, /*FDT_ISP01*/ + [59] = {0xFC310704U, 0x00000006U}, /*FDT_FBABUSVIP0*/ + [60] = {0xFC310710U, 0x0000000BU}, /*FDT_SMPO0*/ + [61] = {0xFC310718U, 0x0000000BU}, /*FDT_SMPS0*/ + [62] = {0xFC31071CU, 0x0000000BU}, /*FDT_UMFL0*/ + [63] = {0xFC400204U, 0x0000000BU}, /*FDT_DSP00*/ + [64] = {0xFC400208U, 0x0000000BU}, /*FDT_DSP01*/ + [65] = {0xFC40020CU, 0x0000000BU}, /*FDT_DSP10*/ + [66] = {0xFC400210U, 0x0000000BU}, /*FDT_DSP11*/ + [67] = {0xFC400214U, 0x0000000BU}, /*FDT_DSP20*/ + [68] = {0xFC400218U, 0x0000000BU}, /*FDT_DSP21*/ + [69] = {0xFC40021CU, 0x0000000BU}, /*FDT_DSP30*/ + [70] = {0xFC400220U, 0x0000000BU}, /*FDT_DSP31*/ + [71] = {0xFC310708U, 0x0000000BU}, /*FDT_PAP*/ + [72] = {0xFD440720U, 0x00000008U}, /*FDT_CSDE2*/ +}; + +const CONFIGURATION_SETTING_TABLE g_inten_tbl[INTEN_REG_MAX] = { + [0] = {0xFF8403C0U, 0x00001003U}, /*FIXINTENTOP00*/ + [1] = {0xFDA723C0U, 0x00000000U}, /*FIXINTENTOP10*/ + [2] = {0xFF8483C0U, 0x00000007U}, /*FIXINTENTOP20*/ + [3] = {0xFDDFC3C0U, 0x000000F0U}, /*FIXINTENMM0*/ + [4] = {0xFD8003C0U, 0x099F1CF3U}, /*FIXINTENRT00*/ + [5] = {0xFD8003C4U, 0x00042000U}, /*FIXINTENRT01*/ + [6] = {0xFD8043C0U, 0x00000033U}, /*FIXINTENRT10*/ + [7] = {0xFD8083C0U, 0x000000CCU}, /*FIXINTENRT20*/ + [8] = {0xFD80C3C0U, 0x00000000U}, /*FIXINTENRT30*/ + [9] = {0xFCB303C0U, 0x001DDDC0U}, /*FIXINTENPER000*/ + [10] = {0xFCB343C0U, 0x0000000FU}, /*FIXINTENPER010*/ + [11] = {0xFCB383C0U, 0x00000000U}, /*FIXINTENPER020*/ + [12] = {0xFCB3C3C0U, 0x00000000U}, /*FIXINTENPER030*/ + [13] = {0xFCE903C0U, 0x210243D8U}, /*FIXINTENHSC0*/ + [14] = {0xFCE903C4U, 0x00000000U}, /*FIXINTENHSC1*/ + [15] = {0xFC8F83C0U, 0x30004460U}, /*FIXINTENVIO00*/ + [16] = {0xFC8F83C4U, 0x00000000U}, /*FIXINTENVIO01*/ + [17] = {0xFC8F03C0U, 0x5100000DU}, /*FIXINTENVIO10*/ + [18] = {0xFC8F03C4U, 0x00000029U}, /*FIXINTENVIO11*/ + [19] = {0xFC8FC3C0U, 0x00000000U}, /*FIXINTENVIO20*/ + [20] = {0xFC0103C0U, 0x3266A3A3U}, /*FIXINTENVC00*/ + [21] = {0xFF8E03C0U, 0x03C3C00FU}, /*FIXINTENIR0*/ + [22] = {0xFC2F03C0U, 0x0000037FU}, /*FIXINTENVIP00*/ + [23] = {0xFC6403C0U, 0x00000005U}, /*FIXINTEN3DG0*/ + [24] = {0xFC4803C0U, 0x00003E1FU}, /*FIXINTENDSP0*/ + [25] = {0xFF840440U, 0xC5400003U}, /*EDCINTENTOP00*/ + [26] = {0xFF840444U, 0x81576E0AU}, /*EDCINTENTOP01*/ + [27] = {0xFF840448U, 0x0000000FU}, /*EDCINTENTOP02*/ + [28] = {0xFDA72440U, 0xFCDEFFFDU}, /*EDCINTENTOP10*/ + [29] = {0xFDA72444U, 0x0039BDFFU}, /*EDCINTENTOP11*/ + [30] = {0xFF848440U, 0x00000003U}, /*EDCINTENTOP20*/ + [31] = {0xFF844440U, 0x0000003FU}, /*EDCINTENTOP30*/ + [32] = {0xFDDFC440U, 0xFFFFFFFFU}, /*EDCINTENMM0*/ + [33] = {0xFDDFC444U, 0xFFFFFFFFU}, /*EDCINTENMM1*/ + [34] = {0xFDDFC448U, 0x0FFFFFFFU}, /*EDCINTENMM2*/ + [35] = {0xFDDFC44CU, 0xFFFFFEFFU}, /*EDCINTENMM3*/ + [36] = {0xFDDFC450U, 0x0FFFFFFFU}, /*EDCINTENMM4*/ + [37] = {0xFD800440U, 0x3F77BFFFU}, /*EDCINTENRT00*/ + [38] = {0xFD800444U, 0x001DF804U}, /*EDCINTENRT01*/ + [39] = {0xFD800448U, 0x81FFFFAFU}, /*EDCINTENRT02*/ + [40] = {0xFD80044CU, 0x3EF3FFFFU}, /*EDCINTENRT03*/ + [41] = {0xFD800450U, 0x6DFDDFF7U}, /*EDCINTENRT04*/ + [42] = {0xFD800454U, 0x9FC001FFU}, /*EDCINTENRT05*/ + [43] = {0xFD808440U, 0x00006B73U}, /*EDCINTENRT20*/ + [44] = {0xFD80C440U, 0x7FFC7FFDU}, /*EDCINTENRT30*/ + [45] = {0xFD80C444U, 0x00000000U}, /*EDCINTENRT31*/ + [46] = {0xFCB30440U, 0x80800003U}, /*EDCINTENPER000*/ + [47] = {0xFCB30444U, 0x0000000EU}, /*EDCINTENPER001*/ + [48] = {0xFCB30448U, 0xB7F81E80U}, /*EDCINTENPER002*/ + [49] = {0xFCB3044CU, 0xFF0F03FDU}, /*EDCINTENPER003*/ + [50] = {0xFCB30450U, 0x87E73B7CU}, /*EDCINTENPER004*/ + [51] = {0xFCB30454U, 0xEC010007U}, /*EDCINTENPER005*/ + [52] = {0xFCB30458U, 0x2000FFFFU}, /*EDCINTENPER006*/ + [53] = {0xFCB3045CU, 0x00000180U}, /*EDCINTENPER007*/ + [54] = {0xFCB34440U, 0xFFF1E1E7U}, /*EDCINTENPER010*/ + [55] = {0xFCB34444U, 0x0000000FU}, /*EDCINTENPER011*/ + [56] = {0xFCB38440U, 0xFFFFFFF3U}, /*EDCINTENPER020*/ + [57] = {0xFCB3C440U, 0xFFFFFF0FU}, /*EDCINTENPER030*/ + [58] = {0xFCB3C444U, 0x0FFFFFFFU}, /*EDCINTENPER031*/ + [59] = {0xFCB3C448U, 0x000083FEU}, /*EDCINTENPER032*/ + [60] = {0xFCE90440U, 0xDF7FBFFBU}, /*EDCINTENHSC0*/ + [61] = {0xFCE90444U, 0x10047627U}, /*EDCINTENHSC1*/ + [62] = {0xFCE90448U, 0x81004050U}, /*EDCINTENHSC2*/ + [63] = {0xFCE9044CU, 0xA6F84210U}, /*EDCINTENHSC3*/ + [64] = {0xFCE90450U, 0x00D30901U}, /*EDCINTENHSC4*/ + [65] = {0xFCE90454U, 0x00000001U}, /*EDCINTENHSC5*/ + [66] = {0xFC8F8440U, 0x378F0F0FU}, /*EDCINTENVIO00*/ + [67] = {0xFC8F8444U, 0x0C21F863U}, /*EDCINTENVIO01*/ + [68] = {0xFC8F8448U, 0x00000000U}, /*EDCINTENVIO02*/ + [69] = {0xFC8F844CU, 0xC8C8C000U}, /*EDCINTENVIO03*/ + [70] = {0xFC8F8450U, 0x070C0CC0U}, /*EDCINTENVIO04*/ + [71] = {0xFC8F8454U, 0x00000000U}, /*EDCINTENVIO05*/ + [72] = {0xFC8F8458U, 0x001F2080U}, /*EDCINTENVIO06*/ + [73] = {0xFC8F0440U, 0x45010103U}, /*EDCINTENVIO10*/ + [74] = {0xFC8F0444U, 0xFFFF0000U}, /*EDCINTENVIO11*/ + [75] = {0xFC8F0448U, 0xFFFF0000U}, /*EDCINTENVIO12*/ + [76] = {0xFC8F044CU, 0xE234D7CCU}, /*EDCINTENVIO13*/ + [77] = {0xFC8F0450U, 0xC8234D16U}, /*EDCINTENVIO14*/ + [78] = {0xFC8F0454U, 0x1542511FU}, /*EDCINTENVIO15*/ + [79] = {0xFC8F0458U, 0x1F800000U}, /*EDCINTENVIO16*/ + [80] = {0xFC8FC440U, 0x00A58AC5U}, /*EDCINTENVIO20*/ + [81] = {0xFC010440U, 0x0010CC07U}, /*EDCINTENVC00*/ + [82] = {0xFC010444U, 0xC3CF0E30U}, /*EDCINTENVC01*/ + [83] = {0xFC010448U, 0xFFFFFC53U}, /*EDCINTENVC02*/ + [84] = {0xFC01044CU, 0x9F773DCFU}, /*EDCINTENVC03*/ + [85] = {0xFC010450U, 0x0000003BU}, /*EDCINTENVC04*/ + [86] = {0xFF8E0440U, 0x0004D1FFU}, /*EDCINTENIR0*/ + [87] = {0xFF8E0444U, 0xC983DF98U}, /*EDCINTENIR1*/ + [88] = {0xFF8E0448U, 0x7BD3FFFFU}, /*EDCINTENIR2*/ + [89] = {0xFF8E044CU, 0x0F0000FFU}, /*EDCINTENIR3*/ + [90] = {0xFC2F0440U, 0x0007FF77U}, /*EDCINTENVIP00*/ + [91] = {0xFC2F0444U, 0xF3BA0000U}, /*EDCINTENVIP01*/ + [92] = {0xFC2F0448U, 0x001F7BE8U}, /*EDCINTENVIP02*/ + [93] = {0xFC2F044CU, 0x00000000U}, /*EDCINTENVIP03*/ + [94] = {0xFC2F0450U, 0x18000000U}, /*EDCINTENVIP04*/ + [95] = {0xFC2F0454U, 0x0000FAFAU}, /*EDCINTENVIP05*/ + [96] = {0xFC640440U, 0xF3FC3F7EU}, /*EDCINTEN3DG0*/ + [97] = {0xFC640444U, 0x0081FC47U}, /*EDCINTEN3DG1*/ + [98] = {0xFC480440U, 0x00F0F30FU}, /*EDCINTENDSP0*/ + [99] = {0xFF840680U, 0x000F2D8FU}, /*ICISTPINTENTOP00*/ + [100] = {0xFDA72680U, 0x00000003U}, /*ICISTPINTENTOP10*/ + [101] = {0xFF848680U, 0x00000007U}, /*ICISTPINTENTOP20*/ + [102] = {0xFF844680U, 0x000000D7U}, /*ICISTPINTENTOP30*/ + [103] = {0xFDDFC680U, 0x0007F7FFU}, /*ICISTPINTENMM0*/ + [104] = {0xFD800680U, 0x0A007FFFU}, /*ICISTPINTENRT00*/ + [105] = {0xFD804680U, 0x000001E3U}, /*ICISTPINTENRT10*/ + [106] = {0xFD808680U, 0x00000007U}, /*ICISTPINTENRT20*/ + [107] = {0xFD80C680U, 0x00000003U}, /*ICISTPINTENRT30*/ + [108] = {0xFCB30680U, 0x000235F1U}, /*ICISTPINTENPER000*/ + [109] = {0xFCB34680U, 0x0000000FU}, /*ICISTPINTENPER010*/ + [110] = {0xFCB38680U, 0x00000003U}, /*ICISTPINTENPER020*/ + [111] = {0xFCB3C680U, 0x00000003U}, /*ICISTPINTENPER030*/ + [112] = {0xFCE90680U, 0x000000C7U}, /*ICISTPINTENHSC0*/ + [113] = {0xFC8F8680U, 0x00000013U}, /*ICISTPINTENVIO00*/ + [114] = {0xFC8F0680U, 0x0000003FU}, /*ICISTPINTENVIO10*/ + [115] = {0xFC8FC680U, 0x00000003U}, /*ICISTPINTENVIO20*/ + [116] = {0xFC010680U, 0x0000003FU}, /*ICISTPINTENVC00*/ + [117] = {0xFF8E0680U, 0x0000EF47U}, /*ICISTPINTENIR0*/ + [118] = {0xFC2F0680U, 0x00000037U}, /*ICISTPINTENVIP00*/ + [119] = {0xFC640680U, 0x0000000FU}, /*ICISTPINTEN3DG0*/ + [120] = {0xFC480680U, 0x000000CFU}, /*ICISTPINTENDSP0*/ + [121] = {0xFF840580U, 0x00000029U}, /*DCLSINTENTOP00*/ + [122] = {0xFDA72580U, 0x00000001U}, /*DCLSINTENTOP10*/ + [123] = {0xFF848580U, 0x00000003U}, /*DCLSINTENTOP20*/ + [124] = {0xFF844580U, 0x00000003U}, /*DCLSINTENTOP30*/ + [125] = {0xFDDFC580U, 0x3FFFFFF7U}, /*DCLSINTENMM0*/ + [126] = {0xFDDFC584U, 0x00000080U}, /*DCLSINTENMM1*/ + [127] = {0xFD800580U, 0x0FFFE7FFU}, /*DCLSINTENRT00*/ + [128] = {0xFD800584U, 0x00000036U}, /*DCLSINTENRT01*/ + [129] = {0xFD808580U, 0x00000033U}, /*DCLSINTENRT20*/ + [130] = {0xFD80C580U, 0x00000001U}, /*DCLSINTENRT30*/ + [131] = {0xFCB30580U, 0x039E1F43U}, /*DCLSINTENPER000*/ + [132] = {0xFCB34580U, 0x00000007U}, /*DCLSINTENPER010*/ + [133] = {0xFCB38580U, 0x00000003U}, /*DCLSINTENPER020*/ + [134] = {0xFCB3C580U, 0x0000000FU}, /*DCLSINTENPER030*/ + [135] = {0xFCE90580U, 0x0BFF01FAU}, /*DCLSINTENHSC0*/ + [136] = {0xFC8F8580U, 0x5000FC0FU}, /*DCLSINTENVIO00*/ + [137] = {0xFC8F0580U, 0x0C6A80FFU}, /*DCLSINTENVIO10*/ + [138] = {0xFC8FC580U, 0x00000001U}, /*DCLSINTENVIO20*/ + [139] = {0xFC010580U, 0x03F8E79FU}, /*DCLSINTENVC00*/ + [140] = {0xFF8E0580U, 0x0FFD9E63U}, /*DCLSINTENIR0*/ + [141] = {0xFC2F0580U, 0xE0000EF7U}, /*DCLSINTENVIP00*/ + [142] = {0xFC2F0584U, 0x0000003FU}, /*DCLSINTENVIP01*/ + [143] = {0xFC480580U, 0x00000003U}, /*DCLSINTENDSP0*/ + [144] = {0xFF840480U, 0xF986FFFFU}, /*LSCHKINTENTOP00*/ + [145] = {0xFF840484U, 0x0003E61CU}, /*LSCHKINTENTOP01*/ + [146] = {0xFDA72480U, 0x00000003U}, /*LSCHKINTENTOP10*/ + [147] = {0xFF848480U, 0x0000001FU}, /*LSCHKINTENTOP20*/ + [148] = {0xFF844480U, 0x0006B5ADU}, /*LSCHKINTENTOP30*/ + [149] = {0xFDDFC480U, 0xFF7FFBFFU}, /*LSCHKINTENMM0*/ + [150] = {0xFDDFC484U, 0x0000017FU}, /*LSCHKINTENMM1*/ + [151] = {0xFD800480U, 0x4FFF3F4FU}, /*LSCHKINTENRT00*/ + [152] = {0xFD800484U, 0x003FFE7FU}, /*LSCHKINTENRT01*/ + [153] = {0xFD800488U, 0x04C4C000U}, /*LSCHKINTENRT02*/ + [154] = {0xFD804480U, 0x000FC1F8U}, /*LSCHKINTENRT10*/ + [155] = {0xFD808480U, 0x0000037BU}, /*LSCHKINTENRT20*/ + [156] = {0xFD80C480U, 0x00000003U}, /*LSCHKINTENRT30*/ + [157] = {0xFCB30480U, 0x1FAF1F0FU}, /*LSCHKINTENPER000*/ + [158] = {0xFCB30484U, 0x00000CAFU}, /*LSCHKINTENPER001*/ + [159] = {0xFCB34480U, 0x000000FFU}, /*LSCHKINTENPER010*/ + [160] = {0xFCB38480U, 0x0000000FU}, /*LSCHKINTENPER020*/ + [161] = {0xFCB3C480U, 0x0000000FU}, /*LSCHKINTENPER030*/ + [162] = {0xFCE90480U, 0x1E043FCFU}, /*LSCHKINTENHSC0*/ + [163] = {0xFCE90484U, 0x00000418U}, /*LSCHKINTENHSC1*/ + [164] = {0xFC8F8480U, 0x311E2303U}, /*LSCHKINTENVIO00*/ + [165] = {0xFC8F8484U, 0x000E0400U}, /*LSCHKINTENVIO01*/ + [166] = {0xFC8F0480U, 0xA0040003U}, /*LSCHKINTENVIO10*/ + [167] = {0xFC8F0484U, 0x0031B368U}, /*LSCHKINTENVIO11*/ + [168] = {0xFC8FC480U, 0x00000003U}, /*LSCHKINTENVIO20*/ + [169] = {0xFC010480U, 0x7EF0A3A3U}, /*LSCHKINTENVC00*/ + [170] = {0xFC010484U, 0x00000D96U}, /*LSCHKINTENVC01*/ + [171] = {0xFF8E0480U, 0x4033D0FFU}, /*LSCHKINTENIR0*/ + [172] = {0xFF8E0484U, 0x003F33FCU}, /*LSCHKINTENIR1*/ + [173] = {0xFC2F0480U, 0x00057FFFU}, /*LSCHKINTENVIP00*/ + [174] = {0xFC2F0484U, 0x00000000U}, /*LSCHKINTENVIP01*/ + [175] = {0xFC640480U, 0x0000063FU}, /*LSCHKINTEN3DG0*/ + [176] = {0xFC480480U, 0x03F387E7U}, /*LSCHKINTENDSP0*/ + [177] = {0xFF840700U, 0x0000001EU}, /*OTHINTENTOP00*/ + [178] = {0xFDDFC700U, 0x008FCFFDU}, /*OTHINTENMM0*/ + [179] = {0xFD800700U, 0x00FFFFF0U}, /*OTHINTENRT00*/ + [180] = {0xFCB30700U, 0x0000003CU}, /*OTHINTENPER000*/ + [181] = {0xFCE90700U, 0x0000003CU}, /*OTHINTENHSC0*/ + [182] = {0xFC8F8700U, 0x00000000U}, /*OTHINTENVIO00*/ + [183] = {0xFC8F0700U, 0x0000007CU}, /*OTHINTENVIO10*/ + [184] = {0xFC010700U, 0x000000F0U}, /*OTHINTENVC00*/ + [185] = {0xFF8E0700U, 0x000000F0U}, /*OTHINTENIR0*/ + [186] = {0xFC2F0700U, 0x00000FC0U}, /*OTHINTENVIP00*/ + [187] = {0xFC640700U, 0x00000024U}, /*OTHINTEN3DG0*/ + [188] = {0xFF840400U, 0xC5001FFFU}, /*ROUINTENTOP00*/ + [189] = {0xFF840404U, 0xC8B3458FU}, /*ROUINTENTOP01*/ + [190] = {0xFF840408U, 0x8000F3E7U}, /*ROUINTENTOP02*/ + [191] = {0xFDA72400U, 0xFE7F7FFFU}, /*ROUINTENTOP10*/ + [192] = {0xFDA72404U, 0x0039FDFFU}, /*ROUINTENTOP11*/ + [193] = {0xFF848400U, 0x0000007FU}, /*ROUINTENTOP20*/ + [194] = {0xFF844400U, 0x0035F5D7U}, /*ROUINTENTOP30*/ + [195] = {0xFDDFC400U, 0xFFFFFFADU}, /*ROUINTENMM0*/ + [196] = {0xFDDFC404U, 0xFFFFFFFFU}, /*ROUINTENMM1*/ + [197] = {0xFDDFC408U, 0xFFFFFFFFU}, /*ROUINTENMM2*/ + [198] = {0xFDDFC40CU, 0x01FFFFFFU}, /*ROUINTENMM3*/ + [199] = {0xFD800400U, 0x007F403FU}, /*ROUINTENRT00*/ + [200] = {0xFD800404U, 0x40000040U}, /*ROUINTENRT01*/ + [201] = {0xFD800408U, 0x7BFFFFFFU}, /*ROUINTENRT02*/ + [202] = {0xFD80040CU, 0xFFFFE387U}, /*ROUINTENRT03*/ + [203] = {0xFD800410U, 0x68006F87U}, /*ROUINTENRT04*/ + [204] = {0xFD800414U, 0xFFFFFFFEU}, /*ROUINTENRT05*/ + [205] = {0xFD800418U, 0x077E30FFU}, /*ROUINTENRT06*/ + [206] = {0xFD804400U, 0x001E3C78U}, /*ROUINTENRT10*/ + [207] = {0xFD808400U, 0x0000034DU}, /*ROUINTENRT20*/ + [208] = {0xFD80C400U, 0x7FFE3FFFU}, /*ROUINTENRT30*/ + [209] = {0xFD80C404U, 0x00000000U}, /*ROUINTENRT31*/ + [210] = {0xFCB30400U, 0x00800007U}, /*ROUINTENPER000*/ + [211] = {0xFCB30404U, 0x00000000U}, /*ROUINTENPER001*/ + [212] = {0xFCB30408U, 0xFDB01C80U}, /*ROUINTENPER002*/ + [213] = {0xFCB3040CU, 0xC771EFFFU}, /*ROUINTENPER003*/ + [214] = {0xFCB30410U, 0x020FDEE4U}, /*ROUINTENPER004*/ + [215] = {0xFCB30414U, 0xFFBDE010U}, /*ROUINTENPER005*/ + [216] = {0xFCB30418U, 0x010023FFU}, /*ROUINTENPER006*/ + [217] = {0xFCB3041CU, 0x0000005EU}, /*ROUINTENPER007*/ + [218] = {0xFCB34400U, 0xFFF1EF1EU}, /*ROUINTENPER010*/ + [219] = {0xFCB34404U, 0x0000003FU}, /*ROUINTENPER011*/ + [220] = {0xFCB38400U, 0x0FFFFFFFU}, /*ROUINTENPER020*/ + [221] = {0xFCB3C400U, 0xFFFFFFFFU}, /*ROUINTENPER030*/ + [222] = {0xFCB3C404U, 0xFE0FFFFFU}, /*ROUINTENPER031*/ + [223] = {0xFCB3C408U, 0x000000FFU}, /*ROUINTENPER032*/ + [224] = {0xFCE90400U, 0xEFE1D3F3U}, /*ROUINTENHSC0*/ + [225] = {0xFCE90404U, 0x00004001U}, /*ROUINTENHSC1*/ + [226] = {0xFCE90408U, 0x0FFB1004U}, /*ROUINTENHSC2*/ + [227] = {0xFCE9040CU, 0x4C010049U}, /*ROUINTENHSC3*/ + [228] = {0xFCE90410U, 0x00000807U}, /*ROUINTENHSC4*/ + [229] = {0xFC8F8400U, 0x7FFFFFE1U}, /*ROUINTENVIO00*/ + [230] = {0xFC8F8404U, 0x00001002U}, /*ROUINTENVIO01*/ + [231] = {0xFC8F8408U, 0xF8000000U}, /*ROUINTENVIO02*/ + [232] = {0xFC8F840CU, 0x18000079U}, /*ROUINTENVIO03*/ + [233] = {0xFC8F8410U, 0x20600000U}, /*ROUINTENVIO04*/ + [234] = {0xFC8F8414U, 0x0000000CU}, /*ROUINTENVIO05*/ + [235] = {0xFC8F8418U, 0xFFFE0002U}, /*ROUINTENVIO06*/ + [236] = {0xFC8F0400U, 0x200007CDU}, /*ROUINTENVIO10*/ + [237] = {0xFC8F0404U, 0xCF1DE1C6U}, /*ROUINTENVIO11*/ + [238] = {0xFC8F0408U, 0x000078E3U}, /*ROUINTENVIO12*/ + [239] = {0xFC8F040CU, 0x00000000U}, /*ROUINTENVIO13*/ + [240] = {0xFC8F0410U, 0x3C000000U}, /*ROUINTENVIO14*/ + [241] = {0xFC8F0414U, 0x0F038000U}, /*ROUINTENVIO15*/ + [242] = {0xFC8F0418U, 0x0000001CU}, /*ROUINTENVIO16*/ + [243] = {0xFC8FC400U, 0x002962F1U}, /*ROUINTENVIO20*/ + [244] = {0xFC010400U, 0x40000000U}, /*ROUINTENVC00*/ + [245] = {0xFC010404U, 0x38001860U}, /*ROUINTENVC01*/ + [246] = {0xFC010408U, 0xE1C0033CU}, /*ROUINTENVC02*/ + [247] = {0xFC01040CU, 0xFEFFF3FDU}, /*ROUINTENVC03*/ + [248] = {0xFC010410U, 0x000001F7U}, /*ROUINTENVC04*/ + [249] = {0xFF8E0400U, 0x883FFFFFU}, /*ROUINTENIR0*/ + [250] = {0xFF8E0404U, 0x087E821FU}, /*ROUINTENIR1*/ + [251] = {0xFF8E0408U, 0xFFFF0FC2U}, /*ROUINTENIR2*/ + [252] = {0xFF8E040CU, 0x000001B6U}, /*ROUINTENIR3*/ + [253] = {0xFC2F0400U, 0xF0010B6FU}, /*ROUINTENVIP00*/ + [254] = {0xFC2F0404U, 0x9C07C003U}, /*ROUINTENVIP01*/ + [255] = {0xFC2F0408U, 0x00EE96E1U}, /*ROUINTENVIP02*/ + [256] = {0xFC2F040CU, 0x00000000U}, /*ROUINTENVIP03*/ + [257] = {0xFC2F0410U, 0x00000000U}, /*ROUINTENVIP04*/ + [258] = {0xFC2F0414U, 0x01500000U}, /*ROUINTENVIP05*/ + [259] = {0xFC640400U, 0x03FC03FFU}, /*ROUINTEN3DG0*/ + [260] = {0xFC640404U, 0x000007FFU}, /*ROUINTEN3DG1*/ + [261] = {0xFC480400U, 0xFFFFFFFFU}, /*ROUINTENDSP0*/ + [262] = {0xFF840500U, 0x3F5FF3FFU}, /*RSCHKINTENTOP00*/ + [263] = {0xFF840504U, 0x603FFE73U}, /*RSCHKINTENTOP01*/ + [264] = {0xFF840508U, 0x0001C000U}, /*RSCHKINTENTOP02*/ + [265] = {0xFDA72500U, 0x00000001U}, /*RSCHKINTENTOP10*/ + [266] = {0xFF848500U, 0x0000001FU}, /*RSCHKINTENTOP20*/ + [267] = {0xFF844500U, 0x00001AD9U}, /*RSCHKINTENTOP30*/ + [268] = {0xFDDFC500U, 0xFFFFFFFFU}, /*RSCHKINTENMM0*/ + [269] = {0xFDDFC504U, 0x00000007U}, /*RSCHKINTENMM1*/ + [270] = {0xFD800500U, 0x7FFFF7FFU}, /*RSCHKINTENRT00*/ + [271] = {0xFD800504U, 0xFAB58006U}, /*RSCHKINTENRT01*/ + [272] = {0xFD800508U, 0x000013A1U}, /*RSCHKINTENRT02*/ + [273] = {0xFD804500U, 0x000007F8U}, /*RSCHKINTENRT10*/ + [274] = {0xFD808500U, 0x000000FDU}, /*RSCHKINTENRT20*/ + [275] = {0xFD80C500U, 0x00000001U}, /*RSCHKINTENRT30*/ + [276] = {0xFCB30500U, 0xF7F10F1FU}, /*RSCHKINTENPER000*/ + [277] = {0xFCB30504U, 0x000FBCFDU}, /*RSCHKINTENPER001*/ + [278] = {0xFCB34500U, 0x000000FAU}, /*RSCHKINTENPER010*/ + [279] = {0xFCB38500U, 0x00000003U}, /*RSCHKINTENPER020*/ + [280] = {0xFCB3C500U, 0x0000003FU}, /*RSCHKINTENPER030*/ + [281] = {0xFCE90500U, 0x93FF7F7FU}, /*RSCHKINTENHSC0*/ + [282] = {0xFCE90504U, 0x001FE067U}, /*RSCHKINTENHSC1*/ + [283] = {0xFC8F8500U, 0xFEFFC003U}, /*RSCHKINTENVIO00*/ + [284] = {0xFC8F8504U, 0x0801C03FU}, /*RSCHKINTENVIO01*/ + [285] = {0xFC8F0500U, 0xDF793FFFU}, /*RSCHKINTENVIO10*/ + [286] = {0xFC8F0504U, 0x041A001EU}, /*RSCHKINTENVIO11*/ + [287] = {0xFC8FC500U, 0x00000004U}, /*RSCHKINTENVIO20*/ + [288] = {0xFC010500U, 0xFEBB663FU}, /*RSCHKINTENVC00*/ + [289] = {0xFC010504U, 0x0000077FU}, /*RSCHKINTENVC01*/ + [290] = {0xFF8E0500U, 0x3E7FEE0FU}, /*RSCHKINTENIR0*/ + [291] = {0xFF8E0504U, 0x0000FFFFU}, /*RSCHKINTENIR1*/ + [292] = {0xFC2F0500U, 0x0003FDF8U}, /*RSCHKINTENVIP00*/ + [293] = {0xFC2F0504U, 0x000FF000U}, /*RSCHKINTENVIP01*/ + [294] = {0xFC640500U, 0x000001DFU}, /*RSCHKINTEN3DG0*/ + [295] = {0xFC480500U, 0x0001FFFFU}, /*RSCHKINTENDSP0*/ + [296] = {0xFF840540U, 0x0000000EU}, /*TIDINTENTOP00*/ + [297] = {0xFF848540U, 0x00000007U}, /*TIDINTENTOP20*/ + [298] = {0xFDDFC540U, 0x00003FFFU}, /*TIDINTENMM0*/ + [299] = {0xFD800540U, 0x01E7CCFCU}, /*TIDINTENRT00*/ + [300] = {0xFD800544U, 0x00000420U}, /*TIDINTENRT01*/ + [301] = {0xFD804540U, 0x00000033U}, /*TIDINTENRT10*/ + [302] = {0xFD808540U, 0x00000036U}, /*TIDINTENRT20*/ + [303] = {0xFCB30540U, 0x0003BF70U}, /*TIDINTENPER000*/ + [304] = {0xFCB34540U, 0x0000000FU}, /*TIDINTENPER010*/ + [305] = {0xFCE90540U, 0x0210247BU}, /*TIDINTENHSC0*/ + [306] = {0xFC8F8540U, 0x0CC0C303U}, /*TIDINTENVIO00*/ + [307] = {0xFC8F8544U, 0x00000003U}, /*TIDINTENVIO01*/ + [308] = {0xFC8F0540U, 0xA8000000U}, /*TIDINTENVIO10*/ + [309] = {0xFC8F0544U, 0x0000002AU}, /*TIDINTENVIO11*/ + [310] = {0xFC010540U, 0x3366CD90U}, /*TIDINTENVC00*/ + [311] = {0xFF8E0540U, 0x000C1E60U}, /*TIDINTENIR0*/ + [312] = {0xFC2F0540U, 0x000007EDU}, /*TIDINTENVIP00*/ + [313] = {0xFC640540U, 0x00000011U}, /*TIDINTEN3DG0*/ + [314] = {0xFC480540U, 0x00000000U}, /*TIDINTENDSP0*/ + [315] = {0xFF840640U, 0x00000002U}, /*SAFERRINTENTOP00*/ + [316] = {0xFDA72640U, 0x00000001U}, /*SAFERRINTENTOP10*/ + [317] = {0xFF848640U, 0x00000000U}, /*SAFERRINTENTOP20*/ + [318] = {0xFF844640U, 0x00000001U}, /*SAFERRINTENTOP30*/ + [319] = {0xFDDFC640U, 0x00000007U}, /*SAFERRINTENMM0*/ + [320] = {0xFD800640U, 0x0000001DU}, /*SAFERRINTENRT00*/ + [321] = {0xFD804640U, 0x00000001U}, /*SAFERRINTENRT10*/ + [322] = {0xFD808640U, 0x00000001U}, /*SAFERRINTENRT20*/ + [323] = {0xFD80C640U, 0x00000001U}, /*SAFERRINTENRT30*/ + [324] = {0xFCB30640U, 0x00000004U}, /*SAFERRINTENPER000*/ + [325] = {0xFCB34640U, 0x00000001U}, /*SAFERRINTENPER010*/ + [326] = {0xFCB38640U, 0x00000001U}, /*SAFERRINTENPER020*/ + [327] = {0xFCB3C640U, 0x00000001U}, /*SAFERRINTENPER030*/ + [328] = {0xFCE90640U, 0x00000001U}, /*SAFERRINTENHSC0*/ + [329] = {0xFC8F8640U, 0x00000001U}, /*SAFERRINTENVIO00*/ + [330] = {0xFC8F0640U, 0x00000002U}, /*SAFERRINTENVIO10*/ + [331] = {0xFC8FC640U, 0x00000001U}, /*SAFERRINTENVIO20*/ + [332] = {0xFC010640U, 0x00000001U}, /*SAFERRINTENVC00*/ + [333] = {0xFF8E0640U, 0x00000001U}, /*SAFERRINTENIR0*/ + [334] = {0xFC2F0640U, 0x00000001U}, /*SAFERRINTENVIP00*/ + [335] = {0xFC640640U, 0x00000001U}, /*SAFERRINTEN3DG0*/ + [336] = {0xFC480640U, 0x00000001U}, /*SAFERRINTENDSP0*/ + [337] = {0xFF8404C0U, 0x00000196U}, /*WCRCINTENTOP00*/ + [338] = {0xFDDFC4C0U, 0x07FFBDFFU}, /*WCRCINTENMM0*/ + [339] = {0xFD8004C0U, 0x207F3F3BU}, /*WCRCINTENRT00*/ + [340] = {0xFD8004C4U, 0x00000014U}, /*WCRCINTENRT01*/ + [341] = {0xFD8044C0U, 0x00000783U}, /*WCRCINTENRT10*/ + [342] = {0xFD8084C0U, 0x00000006U}, /*WCRCINTENRT20*/ + [343] = {0xFCB304C0U, 0x000027DFU}, /*WCRCINTENPER000*/ + [344] = {0xFCB344C0U, 0x00000003U}, /*WCRCINTENPER010*/ + [345] = {0xFCE904C0U, 0x000041BBU}, /*WCRCINTENHSC0*/ + [346] = {0xFC8F84C0U, 0x0000C303U}, /*WCRCERRINTENVIO00*/ + [347] = {0xFC8F04C0U, 0x0016840FU}, /*WCRCERRINTENVIO10*/ + [348] = {0xFC0104C0U, 0x00347D59U}, /*WCRCERRINTENVC00*/ + [349] = {0xFF8E04C0U, 0x3FFE03D0U}, /*WCRCERRINTENIR0*/ + [350] = {0xFC2F04C0U, 0x070031FDU}, /*WCRCERRINTENVIP00*/ + [351] = {0xFC6404C0U, 0x00000063U}, /*WCRCERRINTEN3DG0*/ + [352] = {0xFC4804C0U, 0x00006667U}, /*WCRCINTENDSP0*/ + [353] = {0xFF840600U, 0x00000002U}, /*SECERRINTENTOP00*/ + [354] = {0xFDA72600U, 0x00000001U}, /*SECERRINTENTOP10*/ + [355] = {0xFF848600U, 0x00000000U}, /*SECERRINTENTOP20*/ + [356] = {0xFF844600U, 0x00000001U}, /*SECERRINTENTOP30*/ + [357] = {0xFDDFC600U, 0x00000007U}, /*SECERRINTENMM0*/ + [358] = {0xFD800600U, 0x0000001DU}, /*SECERRINTENRT00*/ + [359] = {0xFD804600U, 0x00000001U}, /*SECERRINTENRT10*/ + [360] = {0xFD808600U, 0x00000001U}, /*SECERRINTENRT20*/ + [361] = {0xFD80C600U, 0x00000001U}, /*SECERRINTENRT30*/ + [362] = {0xFCB30600U, 0x00000004U}, /*SECERRINTENPER000*/ + [363] = {0xFCB34600U, 0x00000001U}, /*SECERRINTENPER010*/ + [364] = {0xFCB38600U, 0x00000001U}, /*SECERRINTENPER020*/ + [365] = {0xFCB3C600U, 0x00000001U}, /*SECERRINTENPER030*/ + [366] = {0xFCE90600U, 0x00000001U}, /*SECERRINTENHSC0*/ + [367] = {0xFC8F8600U, 0x00000001U}, /*SECERRINTENVIO00*/ + [368] = {0xFC8F0600U, 0x00000002U}, /*SECERRINTENVIO10*/ + [369] = {0xFC8FC600U, 0x00000001U}, /*SECERRINTENVIO20*/ + [370] = {0xFC010600U, 0x00000001U}, /*SECERRINTENVC00*/ + [371] = {0xFF8E0600U, 0x00000001U}, /*SECERRINTENIR0*/ + [372] = {0xFC2F0600U, 0x00000001U}, /*SECERRINTENVIP00*/ + [373] = {0xFC640600U, 0x00000001U}, /*SECERRINTEN3DG0*/ + [374] = {0xFC480600U, 0x00000001U}, /*SECERRINTENDSP0*/ +}; + +#pragma ghs section rodata=".ipmmu_rgid_tbl" +const REGION_ID_SETTING_TABLE g_ipmmu_rgid_tbl[IPMMU_RGID_MAX] = { + [0] = {0xEEE80570U, 0x00000002U}, /* IMRGID_IPMMU_VI0 */ + [1] = {0xEEEC0570U, 0x00000002U}, /* IMRGID_IPMMU_VI1 */ + [2] = {0xEEDC0570U, 0x00000002U}, /* IMRGID_IPMMU_VC0 */ + [3] = {0xEED80570U, 0x00000002U}, /* IMRGID_IPMMU_IR */ + [4] = {0xEE480570U, 0x00000001U}, /* IMRGID_IPMMU_RT0 */ + [5] = {0xEE4C0570U, 0x00000001U}, /* IMRGID_IPMMU_RT1 */ + [6] = {0xEED00570U, 0x00000001U}, /* IMRGID_IPMMU_DS0 */ + [7] = {0xEED40570U, 0x00000001U}, /* IMRGID_IPMMU_HSC */ + [8] = {0xEEF00570U, 0x00000002U}, /* IMRGID_IPMMU_VIP0 */ + [9] = {0xEEE00570U, 0x00000002U}, /* IMRGID_IPMMU_3DG */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".ipmmu_rgid_sec_tbl" +const REGION_ID_SETTING_TABLE g_ipmmu_rgid_sec_tbl[IPMMU_RGID_MAX] = { + [0] = {0xEEE80578U, 0x00000001U}, /* IMSECGRP_IPMMU_VI0 */ + [1] = {0xEEEC0578U, 0x00000001U}, /* IMSECGRP_IPMMU_VI1 */ + [2] = {0xEEDC0578U, 0x00000001U}, /* IMSECGRP_IPMMU_VC0 */ + [3] = {0xEED80578U, 0x00000001U}, /* IMSECGRP_IPMMU_IR */ + [4] = {0xEE480578U, 0x00000001U}, /* IMSECGRP_IPMMU_RT0 */ + [5] = {0xEE4C0578U, 0x00000001U}, /* IMSECGRP_IPMMU_RT1 */ + [6] = {0xEED00578U, 0x00000001U}, /* IMSECGRP_IPMMU_DS0 */ + [7] = {0xEED40578U, 0x00000001U}, /* IMSECGRP_IPMMU_HSC */ + [8] = {0xEEF00578U, 0x00000001U}, /* IMSECGRP_IPMMU_VIP0 */ + [9] = {0xEEE00578U, 0x00000001U}, /* IMSECGRP_IPMMU_3DG */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".ipmmu_rgid_en_tbl" +const REGION_ID_SETTING_TABLE g_ipmmu_rgid_en_tbl[IPMMU_RGID_MAX] = { + [0] = {0xEEE80574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VI0 */ + [1] = {0xEEEC0574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VI1 */ + [2] = {0xEEDC0574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VC0 */ + [3] = {0xEED80574U, 0x00000002U}, /* IMRGIDEN_IPMMU_IR */ + [4] = {0xEE480574U, 0x00000002U}, /* IMRGIDEN_IPMMU_RT0 */ + [5] = {0xEE4C0574U, 0x00000002U}, /* IMRGIDEN_IPMMU_RT1 */ + [6] = {0xEED00574U, 0x00000002U}, /* IMRGIDEN_IPMMU_DS0 */ + [7] = {0xEED40574U, 0x00000002U}, /* IMRGIDEN_IPMMU_HSC */ + [8] = {0xEEF00574U, 0x00000002U}, /* IMRGIDEN_IPMMU_VIP0 */ + [9] = {0xEEE00574U, 0x00000002U}, /* IMRGIDEN_IPMMU_3DG */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/crc32.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/crc32.c new file mode 100644 index 00000000..0ac33932 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/crc32.c @@ -0,0 +1,273 @@ +/* + * This file is derived from crc32.c from the zlib-1.1.3 distribution + * by Jean-loup Gailly and Mark Adler. + */ + +/* crc32.c -- compute the CRC-32 of a data stream + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +#ifdef USE_HOSTCC +#include +#include +#else +// #include +#include +#endif +// #include +#include +/* from u-boot's compiler_types.h */ +#define __inline__ inline + +/* from u-boot's linux/types.h */ +#ifdef __CHECKER__ +#define __bitwise__ __attribute__((bitwise)) +# define __force __attribute__((force)) +#else +#define __bitwise__ +# define __force +#endif + +/* from u-boot's compiler.h */ +# define cpu_to_le32(x) (x) +# define le32_to_cpu(x) (x) + +#include +/* from u-boot's asm-generic/int-ll64.h */ +typedef unsigned int __u32; + +/* from u-boot's linux/types.h */ +// typedef __u32 __bitwise __be32; +#define __be32 __u32 + +/* from u-boot's linux/byteorder/swab.h */ +#define ___swab32(x) \ + ((__u32)( \ + (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \ + (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ + (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ + (((__u32)(x) & (__u32)0xff000000UL) >> 24) )) + +#ifndef __arch__swab32 +# define __arch__swab32(x) ___swab32(x) +#endif + +static __inline__ __attribute__((const)) __u32 __fswab32(__u32 x) +{ + return __arch__swab32(x); +} + +# define __swab32(x) \ +(__builtin_constant_p((__u32)(x)) ? \ + ___swab32((x)) : \ + __fswab32((x))) + +/* from u-boot's linux/byteorder/little_endian.h */ +#define __cpu_to_be32(x) ((__force __be32)__swab32((x))) + +/* from u-boot's generic.h */ +#undef htonl +#define ___htonl(x) __cpu_to_be32(x) +#define htonl(x) ___htonl(x) + +// #include +#include + +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) +#include +#endif + +#define tole(x) cpu_to_le32(x) + +#ifdef CONFIG_DYNAMIC_CRC_TABLE + +static int crc_table_empty = 1; +static uint32_t crc_table[256]; +static void make_crc_table OF((void)); + +/* + Generate a table for a byte-wise 32-bit CRC calculation on the polynomial: + x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1. + + Polynomials over GF(2) are represented in binary, one bit per coefficient, + with the lowest powers in the most significant bit. Then adding polynomials + is just exclusive-or, and multiplying a polynomial by x is a right shift by + one. If we call the above polynomial p, and represent a byte as the + polynomial q, also with the lowest power in the most significant bit (so the + byte 0xb1 is the polynomial x^7+x^3+x+1), then the CRC is (q*x^32) mod p, + where a mod b means the remainder after dividing a by b. + + This calculation is done using the shift-register method of multiplying and + taking the remainder. The register is initialized to zero, and for each + incoming bit, x^32 is added mod p to the register if the bit is a one (where + x^32 mod p is p+x^32 = x^26+...+1), and the register is multiplied mod p by + x (which is shifting right by one and adding x^32 mod p if the bit shifted + out is a one). We start with the highest power (least significant bit) of + q and repeat for all eight bits of q. + + The table is simply the CRC of all possible eight bit values. This is all + the information needed to generate CRC's on data a byte at a time for all + combinations of CRC register values and incoming bytes. +*/ +static void make_crc_table(void) +{ + uint32_t c; + int n, k; + uLong poly; /* polynomial exclusive-or pattern */ + /* terms of polynomial defining this crc (except x^32): */ + static uint8_t p[] = { + 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; + + /* make exclusive-or pattern from polynomial (0xedb88320L) */ + poly = 0L; + for (n = 0; n < sizeof(p)/sizeof(uint8_t); n++) + poly |= 1L << (31 - p[n]); + + for (n = 0; n < 256; n++) + { + c = (uLong)n; + for (k = 0; k < 8; k++) + c = c & 1 ? poly ^ (c >> 1) : c >> 1; + crc_table[n] = tole(c); + } + crc_table_empty = 0; +} +#elif !defined(CONFIG_ARM64_CRC32) +/* ======================================================================== + * Table of CRC-32's of all single-byte values (made by make_crc_table) + */ + +static const uint32_t crc_table[256] = { +tole(0x00000000L), tole(0x77073096L), tole(0xee0e612cL), tole(0x990951baL), +tole(0x076dc419L), tole(0x706af48fL), tole(0xe963a535L), tole(0x9e6495a3L), +tole(0x0edb8832L), tole(0x79dcb8a4L), tole(0xe0d5e91eL), tole(0x97d2d988L), +tole(0x09b64c2bL), tole(0x7eb17cbdL), tole(0xe7b82d07L), tole(0x90bf1d91L), +tole(0x1db71064L), tole(0x6ab020f2L), tole(0xf3b97148L), tole(0x84be41deL), +tole(0x1adad47dL), tole(0x6ddde4ebL), tole(0xf4d4b551L), tole(0x83d385c7L), +tole(0x136c9856L), tole(0x646ba8c0L), tole(0xfd62f97aL), tole(0x8a65c9ecL), +tole(0x14015c4fL), tole(0x63066cd9L), tole(0xfa0f3d63L), tole(0x8d080df5L), +tole(0x3b6e20c8L), tole(0x4c69105eL), tole(0xd56041e4L), tole(0xa2677172L), +tole(0x3c03e4d1L), tole(0x4b04d447L), tole(0xd20d85fdL), tole(0xa50ab56bL), +tole(0x35b5a8faL), tole(0x42b2986cL), tole(0xdbbbc9d6L), tole(0xacbcf940L), +tole(0x32d86ce3L), tole(0x45df5c75L), tole(0xdcd60dcfL), tole(0xabd13d59L), +tole(0x26d930acL), tole(0x51de003aL), tole(0xc8d75180L), tole(0xbfd06116L), +tole(0x21b4f4b5L), tole(0x56b3c423L), tole(0xcfba9599L), tole(0xb8bda50fL), +tole(0x2802b89eL), tole(0x5f058808L), tole(0xc60cd9b2L), tole(0xb10be924L), +tole(0x2f6f7c87L), tole(0x58684c11L), tole(0xc1611dabL), tole(0xb6662d3dL), +tole(0x76dc4190L), tole(0x01db7106L), tole(0x98d220bcL), tole(0xefd5102aL), +tole(0x71b18589L), tole(0x06b6b51fL), tole(0x9fbfe4a5L), tole(0xe8b8d433L), +tole(0x7807c9a2L), tole(0x0f00f934L), tole(0x9609a88eL), tole(0xe10e9818L), +tole(0x7f6a0dbbL), tole(0x086d3d2dL), tole(0x91646c97L), tole(0xe6635c01L), +tole(0x6b6b51f4L), tole(0x1c6c6162L), tole(0x856530d8L), tole(0xf262004eL), +tole(0x6c0695edL), tole(0x1b01a57bL), tole(0x8208f4c1L), tole(0xf50fc457L), +tole(0x65b0d9c6L), tole(0x12b7e950L), tole(0x8bbeb8eaL), tole(0xfcb9887cL), +tole(0x62dd1ddfL), tole(0x15da2d49L), tole(0x8cd37cf3L), tole(0xfbd44c65L), +tole(0x4db26158L), tole(0x3ab551ceL), tole(0xa3bc0074L), tole(0xd4bb30e2L), +tole(0x4adfa541L), tole(0x3dd895d7L), tole(0xa4d1c46dL), tole(0xd3d6f4fbL), +tole(0x4369e96aL), tole(0x346ed9fcL), tole(0xad678846L), tole(0xda60b8d0L), +tole(0x44042d73L), tole(0x33031de5L), tole(0xaa0a4c5fL), tole(0xdd0d7cc9L), +tole(0x5005713cL), tole(0x270241aaL), tole(0xbe0b1010L), tole(0xc90c2086L), +tole(0x5768b525L), tole(0x206f85b3L), tole(0xb966d409L), tole(0xce61e49fL), +tole(0x5edef90eL), tole(0x29d9c998L), tole(0xb0d09822L), tole(0xc7d7a8b4L), +tole(0x59b33d17L), tole(0x2eb40d81L), tole(0xb7bd5c3bL), tole(0xc0ba6cadL), +tole(0xedb88320L), tole(0x9abfb3b6L), tole(0x03b6e20cL), tole(0x74b1d29aL), +tole(0xead54739L), tole(0x9dd277afL), tole(0x04db2615L), tole(0x73dc1683L), +tole(0xe3630b12L), tole(0x94643b84L), tole(0x0d6d6a3eL), tole(0x7a6a5aa8L), +tole(0xe40ecf0bL), tole(0x9309ff9dL), tole(0x0a00ae27L), tole(0x7d079eb1L), +tole(0xf00f9344L), tole(0x8708a3d2L), tole(0x1e01f268L), tole(0x6906c2feL), +tole(0xf762575dL), tole(0x806567cbL), tole(0x196c3671L), tole(0x6e6b06e7L), +tole(0xfed41b76L), tole(0x89d32be0L), tole(0x10da7a5aL), tole(0x67dd4accL), +tole(0xf9b9df6fL), tole(0x8ebeeff9L), tole(0x17b7be43L), tole(0x60b08ed5L), +tole(0xd6d6a3e8L), tole(0xa1d1937eL), tole(0x38d8c2c4L), tole(0x4fdff252L), +tole(0xd1bb67f1L), tole(0xa6bc5767L), tole(0x3fb506ddL), tole(0x48b2364bL), +tole(0xd80d2bdaL), tole(0xaf0a1b4cL), tole(0x36034af6L), tole(0x41047a60L), +tole(0xdf60efc3L), tole(0xa867df55L), tole(0x316e8eefL), tole(0x4669be79L), +tole(0xcb61b38cL), tole(0xbc66831aL), tole(0x256fd2a0L), tole(0x5268e236L), +tole(0xcc0c7795L), tole(0xbb0b4703L), tole(0x220216b9L), tole(0x5505262fL), +tole(0xc5ba3bbeL), tole(0xb2bd0b28L), tole(0x2bb45a92L), tole(0x5cb36a04L), +tole(0xc2d7ffa7L), tole(0xb5d0cf31L), tole(0x2cd99e8bL), tole(0x5bdeae1dL), +tole(0x9b64c2b0L), tole(0xec63f226L), tole(0x756aa39cL), tole(0x026d930aL), +tole(0x9c0906a9L), tole(0xeb0e363fL), tole(0x72076785L), tole(0x05005713L), +tole(0x95bf4a82L), tole(0xe2b87a14L), tole(0x7bb12baeL), tole(0x0cb61b38L), +tole(0x92d28e9bL), tole(0xe5d5be0dL), tole(0x7cdcefb7L), tole(0x0bdbdf21L), +tole(0x86d3d2d4L), tole(0xf1d4e242L), tole(0x68ddb3f8L), tole(0x1fda836eL), +tole(0x81be16cdL), tole(0xf6b9265bL), tole(0x6fb077e1L), tole(0x18b74777L), +tole(0x88085ae6L), tole(0xff0f6a70L), tole(0x66063bcaL), tole(0x11010b5cL), +tole(0x8f659effL), tole(0xf862ae69L), tole(0x616bffd3L), tole(0x166ccf45L), +tole(0xa00ae278L), tole(0xd70dd2eeL), tole(0x4e048354L), tole(0x3903b3c2L), +tole(0xa7672661L), tole(0xd06016f7L), tole(0x4969474dL), tole(0x3e6e77dbL), +tole(0xaed16a4aL), tole(0xd9d65adcL), tole(0x40df0b66L), tole(0x37d83bf0L), +tole(0xa9bcae53L), tole(0xdebb9ec5L), tole(0x47b2cf7fL), tole(0x30b5ffe9L), +tole(0xbdbdf21cL), tole(0xcabac28aL), tole(0x53b39330L), tole(0x24b4a3a6L), +tole(0xbad03605L), tole(0xcdd70693L), tole(0x54de5729L), tole(0x23d967bfL), +tole(0xb3667a2eL), tole(0xc4614ab8L), tole(0x5d681b02L), tole(0x2a6f2b94L), +tole(0xb40bbe37L), tole(0xc30c8ea1L), tole(0x5a05df1bL), tole(0x2d02ef8dL) +}; +#endif + +/* ========================================================================= */ +// # if __BYTE_ORDER == __LITTLE_ENDIAN +# define DO_CRC(x) crc = tab[(crc ^ (x)) & 255] ^ (crc >> 8) +// # else +// # define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8) +// # endif + +/* ========================================================================= */ + +/* No ones complement version. JFFS2 (and other things ?) + * don't use ones compliment in their CRC calculations. + */ +uint32_t crc32_no_comp(uint32_t crc, const unsigned char *buf, uint len) +{ +#ifdef CONFIG_ARM64_CRC32 + crc = cpu_to_le32(crc); + while (len--) + crc = __builtin_aarch64_crc32b(crc, *buf++); + return le32_to_cpu(crc); +#else + const uint32_t *tab = crc_table; + const uint32_t *b =(const uint32_t *)buf; + size_t rem_len; +#ifdef CONFIG_DYNAMIC_CRC_TABLE + if (crc_table_empty) + make_crc_table(); +#endif + crc = cpu_to_le32(crc); + /* Align it */ + if (((long)b) & 3 && len) { + uint8_t *p = (uint8_t *)b; + do { + DO_CRC(*p++); + } while ((--len) && ((long)p)&3); + b = (uint32_t *)p; + } + + rem_len = len & 3; + len = len >> 2; + for (--b; len; --len) { + /* load data 32 bits wide, xor data 32 bits wide. */ + crc ^= *++b; /* use pre increment for speed */ + DO_CRC(0); + DO_CRC(0); + DO_CRC(0); + DO_CRC(0); + } + len = rem_len; + /* And the last few bytes */ + if (len) { + uint8_t *p = (uint8_t *)(b + 1) - 1; + do { + DO_CRC(*++p); /* use pre increment for speed */ + } while (--len); + } + + return le32_to_cpu(crc); +#endif +} +#undef DO_CRC + +uint32_t crc32(uint32_t crc, const unsigned char *p, uint len) +{ + return crc32_no_comp(crc ^ 0xffffffffL, p, len) ^ 0xffffffffL; +} diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/log.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/log/log.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/log.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/log/log.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/log/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/log/scif.c new file mode 100644 index 00000000..b2f285ef --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/log/scif.c @@ -0,0 +1,625 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : SCIF driver + ******************************************************************************/ +/****************************************************************************** + * @file scif.c + * - Version : 0.08 + * @brief 1. Initial setting of SCIF. + * 2. Initial setting of HSCIF. + * 3. Log output function. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Modify the timing of MODEMR judgement. + * : 15.10.2021 0.03 Modify register access to read modify write. + * : 03.12.2021 0.04 Fix incorrect configuration process. + * : 06.01.2022 0.05 Static analysis support + * : 23.05.2022 0.06 Integration of S4 and V4H + * : 20.12.2022 0.07 Modify writing bit size to SCBRR register. + * : 21.08.2023 0.08 Add support for V4M. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Define */ +#define SCIF_SCSCR_TE_EN (uint16_t)((uint16_t)1U << 5U) +#define SCIF_SCSCR_RE_EN (uint16_t)((uint16_t)1U << 4U) +#define SCIF_SCSCR_CKE_EXT_CLK (uint16_t)((uint16_t)2U << 0U) +#define SCIF_SCSCR_INIT_DATA (uint16_t)(SCIF_SCSCR_TE_EN | SCIF_SCSCR_RE_EN) +#define SCIF_SCSCR_HW_INIT (uint16_t)(0x0000U) + +#define SCIF_SCFCR_TFRST_EN (uint16_t)((uint16_t)1U << 2U) +#define SCIF_SCFCR_RFRS_EN (uint16_t)((uint16_t)1U << 1U) +#define SCIF_SCFCR_RESET_FIFO (uint16_t)(SCIF_SCFCR_TFRST_EN | SCIF_SCFCR_RFRS_EN) + +#define SCIF_SCFSR_TEND (uint16_t)((uint16_t)1U << 6U) +#define SCIF_SCFSR_TDFE (uint16_t)((uint16_t)1U << 5U) +#define TRANS_END_CHECK (uint16_t)(SCIF_SCFSR_TEND | SCIF_SCFSR_TDFE) +#define SCIF_SCFSR_INIT_DATA (uint16_t)(0x0000U) + +#define SCIF_SCLSR_INIT_DATA (uint16_t)(0x0000U) + +#define SCIF_SCSMR_CHR (uint16_t)((uint16_t)1U << 6U) +#define SCIF_SCSMR_PE (uint16_t)((uint16_t)1U << 5U) +#define SCIF_SCSMR_STOP (uint16_t)((uint16_t)1U << 3U) +#define SCIF_SCSMR_CKS (uint16_t)((uint16_t)3U << 0U) +#define SCIF_SCSMR_INIT_DATA ~((uint16_t)(SCIF_SCSMR_CHR | SCIF_SCSMR_PE | SCIF_SCSMR_STOP | SCIF_SCSMR_CKS)) + +/* Pclk(66MHz)/1, 115.2kbps*/ +/* N = 66/(66/2*115200)*10^4-1 =17=> 0x11 */ +#define SCIF_SCBRR_115200BPS (uint8_t)(0x11U) +/* Pclk(266MHz)/1, 921.6kbps*/ +/* N = 266/(8*2*921600)*10^6-1 =17=> 0x11 */ +#define HSCIF_SCBRR_921600BPS (uint8_t)(0x11U) +/* Pclk(266MHz)/1, 1.8432Mbps*/ +/* N = 266/(8*2*1843200)*10^6-1 =8=> 0x08 */ +#define HSCIF_SCBRR_1843200BPS (uint8_t)(0x08U) + +#define HSCIF_HSSRR_SRE (uint16_t)(1U << 15U) +#define HSCIF_HSSRR_SRCYC (uint16_t)(0x1FU << 0U) +#define HSCIF_HSSRR_SRCYC8 (uint16_t)(7U << 0U) /* Sampling rate 8-1 */ +#define HSCIF_HSSRR_VAL (uint16_t)(HSCIF_HSSRR_SRE | HSCIF_HSSRR_SRCYC8) + +#define HSCIF_DL_DIV1 (uint16_t)(1U << 0U) +#define HSCIF_CKS_CKS (uint16_t)(1U << 15U) +#define HSCIF_CKS_XIN (uint16_t)(1U << 14U) +#define HSCIF_CKS_SC_CLK_EXT ~((uint16_t)(HSCIF_CKS_CKS | HSCIF_CKS_XIN)) + +/* module start setting value */ +#if (RCAR_LSI == RCAR_S4) +#define CPG_MSTPCR_HSCIF (((uint32_t)1U) << 14U) +#define CPG_MSTPCR_SCIF (((uint32_t)1U) << 4U) +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define CPG_MSTPCR_HSCIF (((uint32_t)1U) << 14U) +#define CPG_MSTPCR_SCIF (((uint32_t)1U) << 2U) +#endif /* RCAR_LSI == RCAR_S4 */ + +/* Pin function setting value */ +#if (RCAR_LSI == RCAR_S4) +#define GPSR_TX ((uint32_t)1U << 3U) /* HTX0 / TX3 */ +#define GPSR_RX ((uint32_t)1U << 2U) /* HRX0 / RX3 */ +#define IPSR_RX_VAL ((uint32_t)1U << 8U) /* RX3 */ +#define IPSR_TX_VAL ((uint32_t)1U << 12U) /* TX3 */ +#define POC_TX_33V ((uint32_t)1U << 3U) /* HTX0 / TX3 3.3V setting value */ +#define POC_RX_33V ((uint32_t)1U << 2U) /* HRX0 / RX3 3.3V setting value */ +#define IPSR_RX_MASK ((uint32_t)0xFU << 8U) /* IPSR bit[11:8] */ +#define IPSR_TX_MASK ((uint32_t)0xFU << 12U) /* IPSR bit[15:12] */ +#define PFC_GPSR_SCIF_MASK (uint32_t)(0x0000000CU) /* SCIF3/HSCIF0 RX/TX */ +#define PFC_GPSR_SCIF_VAL (uint32_t)(GPSR_TX | GPSR_RX) /* SCIF3/HSCIF0 RX/TX */ +#define PFC_IPSR_SCIF_MASK (uint32_t)(IPSR_RX_MASK | IPSR_TX_MASK) /* Mask value of IPSR (SCIF3/HSCIF0 RX/TX) */ +#define PFC_IPSR_SCIF_VAL (uint32_t)(IPSR_RX_VAL | IPSR_TX_VAL) /* SCIF3 RX/TX */ +#define PFC_IPSR_HSCIF_VAL (uint32_t)(0x00000000U) /* HSCIF0 RX/TX */ +#define PFC_POC_SCIF_MASK (uint32_t)(0x0000000CU) /* SCIF3/HSCIF0 RX/TX */ +#define PFC_POC_SCIF_33V (uint32_t)(POC_TX_33V | POC_RX_33V) /* SCIF3/HSCIF0 RX/TX */ +#define PFC_IPSR_SCIF_EXTCLK_MASK (uint32_t)(0xFU << 0U) /* Mask value of IPSR (External Clock) */ +#define PFC_IPSR_SCIF_EXTCLK_VAL (uint32_t)(0x0U << 0U) /* IPSR (External Clock) */ +#define PFC_GPSR_SCIF_EXTCLK_MASK (uint32_t)(0x00000001U) /* Mask value of IPSR (External Clock) */ +#define PFC_GPSR_SCIF_EXTCLK_VAL (uint32_t)(1U << 0U) /* IPSR (External Clock) */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define GPSR_TX ((uint32_t)1U << 12U) /* HTX0 / TX0 */ +#define GPSR_RX ((uint32_t)1U << 16U) /* HRX0 / RX0 */ +#define IPSR_RX_VAL ((uint32_t)1U << 0U) /* RX0 */ +#define IPSR_TX_VAL ((uint32_t)1U << 16U) /* TX0 */ +#define POC_TX_33V ((uint32_t)1U << 12U) /* HTX0 / TX0 3.3V setting value */ +#define POC_RX_33V ((uint32_t)1U << 16U) /* HRX0 / RX0 3.3V setting value */ +#define POC_TX_18V ((uint32_t)0U << 12U) /* HTX0 / TX0 1.8V setting value */ +#define POC_RX_18V ((uint32_t)0U << 16U) /* HRX0 / RX0 1.8V setting value */ +#define IPSR_RX_MASK ((uint32_t)0xFU << 0U) /* IPSR bit[3:0] */ +#define IPSR_TX_MASK ((uint32_t)0xFU << 16U) /* IPSR bit[19:16] */ +#define PFC_GPSR_SCIF_MASK (uint32_t)(0x00011000U) /* SCIF0/HSCIF0 RX/TX */ +#define PFC_GPSR_SCIF_VAL (uint32_t)(GPSR_TX | GPSR_RX) /* SCIF0/HSCIF0 RX/TX */ +#define PFC_IPSR_SCIF_MASK1 (uint32_t)(IPSR_TX_MASK) /* Mask value of IPSR (SCIF0/HSCIF0 TX) */ +#define PFC_IPSR_SCIF_VAL1 (uint32_t)(IPSR_TX_VAL) /* SCIF0 TX */ +#define PFC_IPSR_SCIF_MASK2 (uint32_t)(IPSR_RX_MASK) /* Mask value of IPSR (SCIF3/HSCIF0 RX) */ +#define PFC_IPSR_SCIF_VAL2 (uint32_t)(IPSR_RX_VAL) /* SCIF0 RX */ +#define PFC_IPSR_HSCIF_VAL1 (uint32_t)(0x00000000U) /* HSCIF0 TX */ +#define PFC_IPSR_HSCIF_VAL2 (uint32_t)(0x00000000U) /* HSCIF0 RX */ +#define PFC_POC_SCIF_MASK (uint32_t)(0x00011000U) /* SCIF0/HSCIF0 RX/TX */ +#define PFC_POC_SCIF_33V (uint32_t)(POC_TX_33V | POC_RX_33V) /* SCIF0/HSCIF0 RX/TX */ +#define PFC_IPSR_SCIF_EXTCLK_MASK (uint32_t)(0xFU << 4U) /* Mask value of IPSR (External Clock) */ +#define PFC_IPSR_SCIF_EXTCLK_VAL (uint32_t)(0x0U << 4U) /* IPSR (External Clock) */ +#define PFC_GPSR_SCIF_EXTCLK_MASK (uint32_t)(0x00020000U) /* Mask value of IPSR (External Clock) */ +#endif /* RCAR_LSI == RCAR_S4 */ + +static void (*rcar_putc)(uint8_t outchar); + +static void scif_module_start(uint32_t modemr); +static void scif_pfc_init(uint32_t modemr); +static void scif_console_init(uint32_t modemr); +static void scif_console_putc(uint8_t outchar); +static void hscif_console_putc(uint8_t outchar); + + +static void scif_module_start(uint32_t modemr) +{ + uint32_t reg; + + if(modemr == MODEMR_SCIF_DLMODE) + { + reg = mem_read32(CPG_MSTPSR7D0); + /* If supply of clock to SCIF0 is stopped */ + if (FALSE != (CPG_MSTPCR_SCIF & reg)) + { + /* Supply of clock to SCIF0 is start */ + reg &= ~(CPG_MSTPCR_SCIF); + cpg_reg_write(CPG_MSTPCR7D0, CPG_MSTPSR7D0, reg); + } + } + else + { + reg = mem_read32(CPG_MSTPSR5D0); + /* If supply of clock to SCIF0 is stopped */ + if (FALSE != (CPG_MSTPCR_HSCIF & reg)) + { + /* Supply of clock to SCIF0 is start */ + reg &= ~(CPG_MSTPCR_HSCIF); + cpg_reg_write(CPG_MSTPCR5D0, CPG_MSTPSR5D0, reg); + } + } +} +/* End of function scif_module_start(void) */ + +static void scif_pfc_init(uint32_t modemr) +{ + uint32_t reg; + +#if (RCAR_LSI == RCAR_S4) + if(modemr == MODEMR_SCIF_DLMODE) + { + /* Set RX / TX of SCIF 0. */ + reg = mem_read32(PFC_IP0SR0_RW); + reg &= (~(PFC_IPSR_SCIF_MASK)); + reg |= PFC_IPSR_SCIF_VAL; + pfc_reg_write(PFC_IP0SR0_RW, reg); + + /* Set Voltage setting of 1.8V. */ + reg = mem_read32(PFC_POC0_RW); + reg &= (~(PFC_POC_SCIF_MASK)); + pfc_reg_write(PFC_POC0_RW, reg); + } + else if(modemr == MODEMR_HSCIF_DLMODE_921600) + { + /* Set HRX / HTX of HSCIF 0. */ + reg = mem_read32(PFC_IP0SR0_RW); + reg &= (~(PFC_IPSR_SCIF_MASK)); + reg |= PFC_IPSR_HSCIF_VAL; + pfc_reg_write(PFC_IP0SR0_RW, reg); + + /* Set Voltage setting of 3.3V. */ + reg = mem_read32(PFC_POC0_RW); + reg &= (~(PFC_POC_SCIF_MASK)); + reg |= PFC_POC_SCIF_33V; + pfc_reg_write(PFC_POC0_RW, reg); + } + else if(modemr == MODEMR_HSCIF_DLMODE_1843200) + { + /* Set HRX / HTX of HSCIF 0. */ + reg = mem_read32(PFC_IP0SR0_RW); + reg &= (~(PFC_IPSR_SCIF_MASK)); + reg |= PFC_IPSR_HSCIF_VAL; + pfc_reg_write(PFC_IP0SR0_RW, reg); + + /* Set Voltage setting of 1.8V. */ + reg = mem_read32(PFC_POC0_RW); + reg &= (~(PFC_POC_SCIF_MASK)); + pfc_reg_write(PFC_POC0_RW, reg); + } + else if(modemr == MODEMR_HSCIF_DLMODE_3000000) + { + /* Set HRX / HTX of HSCIF 0. */ + reg = mem_read32(PFC_IP0SR0_RW); + reg &= (~(PFC_IPSR_SCIF_MASK)); + reg |= PFC_IPSR_HSCIF_VAL; + pfc_reg_write(PFC_IP0SR0_RW, reg); + + /* Set Voltage setting of 1.8V. */ + reg = mem_read32(PFC_POC0_RW); + reg &= (~(PFC_POC_SCIF_MASK)); + pfc_reg_write(PFC_POC0_RW, reg); + + /* Set External Clock. */ + reg = mem_read32(PFC_IP0SR0_RW); + reg &= (~(PFC_IPSR_SCIF_EXTCLK_MASK)); + reg |= PFC_IPSR_SCIF_EXTCLK_VAL; + pfc_reg_write(PFC_IP0SR0_RW, reg); + + reg = mem_read32(PFC_GPSR0_RW); + reg &= (~(PFC_GPSR_SCIF_EXTCLK_MASK)); + reg |= PFC_GPSR_SCIF_EXTCLK_MASK; + pfc_reg_write(PFC_GPSR0_RW, reg); + } + else + { + /* no process */ + } + + reg = mem_read32(PFC_GPSR0_RW); + reg &= (~(PFC_GPSR_SCIF_MASK)); + reg |= PFC_GPSR_SCIF_VAL; + pfc_reg_write(PFC_GPSR0_RW, reg); + +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + if(modemr == MODEMR_SCIF_DLMODE) + { + /* Set TX of SCIF 0. */ + reg = mem_read32(PFC_IP1SR1_RW); + reg &= (~(PFC_IPSR_SCIF_MASK1)); + reg |= PFC_IPSR_SCIF_VAL1; + pfc_reg_write(PFC_IP1SR1_RW, reg); + + /* Set RX of SCIF 0. */ + reg = mem_read32(PFC_IP2SR1_RW); + reg &= (~(PFC_IPSR_SCIF_MASK2)); + reg |= PFC_IPSR_SCIF_VAL2; + pfc_reg_write(PFC_IP2SR1_RW, reg); + + /* Set Voltage setting of 1.8V. */ + reg = mem_read32(PFC_POC1_RW); + reg &= (~(PFC_POC_SCIF_MASK)); + pfc_reg_write(PFC_POC1_RW, reg); + } + else if(modemr == MODEMR_HSCIF_DLMODE_921600) + { + /* Set HTX of HSCIF 0. */ + reg = mem_read32(PFC_IP1SR1_RW); + reg &= (~(PFC_IPSR_SCIF_MASK1)); + reg |= PFC_IPSR_HSCIF_VAL1; + pfc_reg_write(PFC_IP1SR1_RW, reg); + + /* Set HRX of HSCIF 0. */ + reg = mem_read32(PFC_IP2SR1_RW); + reg &= (~(PFC_IPSR_SCIF_MASK2)); + reg |= PFC_IPSR_HSCIF_VAL2; + pfc_reg_write(PFC_IP2SR1_RW, reg); + + /* Set Voltage setting of 3.3V. */ + reg = mem_read32(PFC_POC1_RW); + reg &= (~(PFC_POC_SCIF_MASK)); + reg |= PFC_POC_SCIF_33V; + pfc_reg_write(PFC_POC1_RW, reg); + } + else if(modemr == MODEMR_HSCIF_DLMODE_1843200) + { + /* Set HTX of HSCIF 0. */ + reg = mem_read32(PFC_IP1SR1_RW); + reg &= (~(PFC_IPSR_SCIF_MASK1)); + reg |= PFC_IPSR_HSCIF_VAL1; + pfc_reg_write(PFC_IP1SR1_RW, reg); + + /* Set HRX of HSCIF 0. */ + reg = mem_read32(PFC_IP2SR1_RW); + reg &= (~(PFC_IPSR_SCIF_MASK2)); + reg |= PFC_IPSR_HSCIF_VAL2; + pfc_reg_write(PFC_IP2SR1_RW, reg); + + /* Set Voltage setting of 1.8V. */ + reg = mem_read32(PFC_POC1_RW); + reg &= (~(PFC_POC_SCIF_MASK)); + pfc_reg_write(PFC_POC1_RW, reg); + } + else if(modemr == MODEMR_HSCIF_DLMODE_3000000) + { + /* Set HTX of HSCIF 0. */ + reg = mem_read32(PFC_IP1SR1_RW); + reg &= (~(PFC_IPSR_SCIF_MASK1)); + reg |= PFC_IPSR_HSCIF_VAL1; + pfc_reg_write(PFC_IP1SR1_RW, reg); + + /* Set HRX of HSCIF 0. */ + reg = mem_read32(PFC_IP2SR1_RW); + reg &= (~(PFC_IPSR_SCIF_MASK2)); + reg |= PFC_IPSR_HSCIF_VAL2; + pfc_reg_write(PFC_IP2SR1_RW, reg); + + /* Set Voltage setting of 1.8V. */ + reg = mem_read32(PFC_POC1_RW); + reg &= (~(PFC_POC_SCIF_MASK)); + pfc_reg_write(PFC_POC1_RW, reg); + + /* Set External Clock. */ + reg = mem_read32(PFC_IP2SR1_RW); + reg &= (~(PFC_IPSR_SCIF_EXTCLK_MASK)); + reg |= PFC_IPSR_SCIF_EXTCLK_VAL; + pfc_reg_write(PFC_IP2SR1_RW, reg); + + reg = mem_read32(PFC_GPSR1_RW); + reg &= (~(PFC_GPSR_SCIF_EXTCLK_MASK)); + reg |= PFC_GPSR_SCIF_EXTCLK_MASK; + pfc_reg_write(PFC_GPSR1_RW, reg); + } + else + { + /* no process */ + } + + reg = mem_read32(PFC_GPSR1_RW); + reg &= (~(PFC_GPSR_SCIF_MASK)); + reg |= PFC_GPSR_SCIF_VAL; + pfc_reg_write(PFC_GPSR1_RW, reg); +#endif /* RCAR_LSI == RCAR_S4 */ +} +/* End of function scif_pfc_init(void) */ + +static void scif_console_init(uint32_t modemr) +{ + uint16_t reg; + switch(modemr) + { + case MODEMR_HSCIF_DLMODE_3000000: + { + /* clear SCR.TE & SCR.RE*/ + mem_write16(HSCIF_HSSCR, SCIF_SCSCR_HW_INIT); + /* reset tx-fifo, reset rx-fifo. */ + reg = mem_read16(HSCIF_HSFCR); + reg |= SCIF_SCFCR_RESET_FIFO; + mem_write16(HSCIF_HSFCR, reg); + + /* clear ORER bit */ + mem_write16(HSCIF_HSLSR, SCIF_SCLSR_INIT_DATA); + /* clear all error bit */ + mem_write16(HSCIF_HSFSR, SCIF_SCFSR_INIT_DATA); + + /* external clock, SC_CLK pin used for output pin */ + mem_write16(HSCIF_HSSCR, SCIF_SCSCR_CKE_EXT_CLK); + /* 8bit data, no-parity, 1 stop, Po/1 */ + reg = mem_read16(HSCIF_HSSMR); + reg &= SCIF_SCSMR_INIT_DATA; + mem_write16(HSCIF_HSSMR, reg); + + /* 24MHz / (3000000 * 8) = 1 */ + mem_write16(HSCIF_DL, HSCIF_DL_DIV1); + reg = mem_read16(HSCIF_CKS); + reg &= HSCIF_CKS_SC_CLK_EXT; + mem_write16(HSCIF_CKS, reg); + /* Sampling rate 8 */ + reg = mem_read16(HSCIF_HSSRR); + reg &= ~(HSCIF_HSSRR_SRE | HSCIF_HSSRR_SRCYC); + reg |= HSCIF_HSSRR_VAL; + mem_write16(HSCIF_HSSRR, reg); + + micro_wait(10U); /* 10us */ + + /* reset-off tx-fifo, rx-fifo. */ + reg = mem_read16(HSCIF_HSFCR); + reg &= ~(SCIF_SCFCR_RESET_FIFO); + mem_write16(HSCIF_HSFCR, reg); + /* enable TE, RE; SC_CLK=external */ + reg = mem_read16(HSCIF_HSSCR); + reg |= SCIF_SCSCR_INIT_DATA; + mem_write16(HSCIF_HSSCR, reg); + + /* Set the pointer to a function that outputs one character. */ + rcar_putc = hscif_console_putc; + break; + } + case MODEMR_HSCIF_DLMODE_1843200: + { + /* clear SCR.TE & SCR.RE*/ + mem_write16(HSCIF_HSSCR, SCIF_SCSCR_HW_INIT); + /* reset tx-fifo, reset rx-fifo. */ + reg = mem_read16(HSCIF_HSFCR); + reg |= SCIF_SCFCR_RESET_FIFO; + mem_write16(HSCIF_HSFCR, reg); + + /* clear ORER bit */ + mem_write16(HSCIF_HSLSR, SCIF_SCLSR_INIT_DATA); + /* clear all error bit */ + mem_write16(HSCIF_HSFSR, SCIF_SCFSR_INIT_DATA); + + /* internal clock, SC_CLK pin unused for output pin */ + mem_write16(HSCIF_HSSCR, SCIF_SCSCR_HW_INIT); + /* 8bit data, no-parity, 1 stop, Po/1 */ + reg = mem_read16(HSCIF_HSSMR); + reg &= SCIF_SCSMR_INIT_DATA; + mem_write16(HSCIF_HSSMR, reg); + + /* Sampling rate 8 */ + mem_write16(HSCIF_HSSRR, HSCIF_HSSRR_VAL); + /* Baud rate 1843200bps*/ + mem_write8(HSCIF_HSBRR, HSCIF_SCBRR_1843200BPS); + + micro_wait(10U); /* 10us */ + + /* reset-off tx-fifo, rx-fifo. */ + reg = mem_read16(HSCIF_HSFCR); + reg &= ~(SCIF_SCFCR_RESET_FIFO); + mem_write16(HSCIF_HSFCR, reg); + /* enable TE, RE; SC_CLK=external */ + reg = mem_read16(HSCIF_HSSCR); + reg |= SCIF_SCSCR_INIT_DATA; + mem_write16(HSCIF_HSSCR, reg); + + /* Set the pointer to a function that outputs one character. */ + rcar_putc = hscif_console_putc; + break; + } + case MODEMR_HSCIF_DLMODE_921600: + { + /* clear SCR.TE & SCR.RE*/ + mem_write16(HSCIF_HSSCR, SCIF_SCSCR_HW_INIT); + /* reset tx-fifo, reset rx-fifo. */ + reg = mem_read16(HSCIF_HSFCR); + reg |= SCIF_SCFCR_RESET_FIFO; + mem_write16(HSCIF_HSFCR, reg); + + /* clear ORER bit */ + mem_write16(HSCIF_HSLSR, SCIF_SCLSR_INIT_DATA); + /* clear all error bit */ + mem_write16(HSCIF_HSFSR, SCIF_SCFSR_INIT_DATA); + + /* internal clock, SC_CLK pin unused for output pin */ + mem_write16(HSCIF_HSSCR, SCIF_SCSCR_HW_INIT); + /* 8bit data, no-parity, 1 stop, Po/1 */ + reg = mem_read16(HSCIF_HSSMR); + reg &= SCIF_SCSMR_INIT_DATA; + mem_write16(HSCIF_HSSMR, reg); + + /* Sampling rate 8 */ + mem_write16(HSCIF_HSSRR, HSCIF_HSSRR_VAL); + /* Baud rate 921600bps*/ + mem_write8(HSCIF_HSBRR, HSCIF_SCBRR_921600BPS); + + micro_wait(10U); /* 10us */ + + /* reset-off tx-fifo, rx-fifo. */ + reg = mem_read16(HSCIF_HSFCR); + reg &= ~(SCIF_SCFCR_RESET_FIFO); + mem_write16(HSCIF_HSFCR, reg); + /* enable TE, RE; SC_CLK=external */ + reg = mem_read16(HSCIF_HSSCR); + reg |= SCIF_SCSCR_INIT_DATA; + mem_write16(HSCIF_HSSCR, reg); + + /* Set the pointer to a function that outputs one character. */ + rcar_putc = hscif_console_putc; + break; + } + case MODEMR_SCIF_DLMODE: + default: + { + /* clear SCR.TE & SCR.RE*/ + mem_write16(SCIF_SCSCR, SCIF_SCSCR_HW_INIT); + /* reset tx-fifo, reset rx-fifo. */ + reg = mem_read16(SCIF_SCFCR); + reg |= SCIF_SCFCR_RESET_FIFO; + mem_write16(SCIF_SCFCR, reg); + + /* clear ORER bit */ + mem_write16(SCIF_SCLSR, SCIF_SCLSR_INIT_DATA); + /* clear all error bit */ + mem_write16(SCIF_SCFSR, SCIF_SCFSR_INIT_DATA); + + /* internal clock, SC_CLK pin unused for output pin */ + mem_write16(SCIF_SCSCR, SCIF_SCSCR_HW_INIT); + /* 8bit data, no-parity, 1 stop, Po/1 */ + reg = mem_read16(SCIF_SCSMR); + reg &= SCIF_SCSMR_INIT_DATA; + mem_write16(SCIF_SCSMR, reg); + + /* Baud rate 115200bps*/ + mem_write8(SCIF_SCBRR, SCIF_SCBRR_115200BPS); + + micro_wait(10U); /* 10us */ + + /* reset-off tx-fifo, rx-fifo. */ + reg = mem_read16(SCIF_SCFCR); + reg &= ~(SCIF_SCFCR_RESET_FIFO); + mem_write16(SCIF_SCFCR, reg); + /* enable TE, RE; SC_CLK=no output */ + reg = mem_read16(SCIF_SCSCR); + reg |= SCIF_SCSCR_INIT_DATA; + mem_write16(SCIF_SCSCR, reg); + + /* Set the pointer to a function that outputs one character. */ + rcar_putc = scif_console_putc; + break; + } + } +} +/* End of function scif_console_init(void) */ + +#define _MODE31 (BASE_RTSRAM_ADDR + 0x0002FFF0) +#define _MODE_115200 0x00115200 +void scif_init(void) +{ + uint32_t modemr; + +#ifdef FORCE_115200 /* force to serial speed to 115200 bps */ + /* Gen4_ICUMX_loader(0xEB22FFF0) at RT-VRAM */ + modemr = MODEMR_SCIF_DLMODE; + mem_write32(_MODE31, _MODE_115200); +#else + modemr = ((mem_read32(RST_MODEMR0) & RST_MODEMR0_MD31) >> 31U); + modemr |= ((mem_read32(RST_MODEMR1) & RST_MODEMR1_MD32) << 1U); +#endif + scif_module_start(modemr); + scif_pfc_init(modemr); + scif_console_init(modemr); +} +/* End of function scif_init(void) */ + +void console_putc(uint8_t outchar) +{ + rcar_putc(outchar); +} +/* End of function console_putc(void) */ + + +static void scif_console_putc(uint8_t outchar) +{ + uint16_t reg; + + /* Check that transfer of SCIF0 is completed */ + while (!((TRANS_END_CHECK & mem_read16(SCIF_SCFSR)) == TRANS_END_CHECK)) + { + ; + } + + mem_write8(SCIF_SCFTDR, outchar); /* Transfer one character */ + reg = mem_read16(SCIF_SCFSR); + reg &= (uint16_t)(~(TRANS_END_CHECK)); /* TEND,TDFE clear */ + mem_write16(SCIF_SCFSR, reg); + + /* Check that transfer of SCIF0 is completed */ + while (!((TRANS_END_CHECK & mem_read16(SCIF_SCFSR)) == TRANS_END_CHECK)) + { + ; + } +} +/* End of function scif_console_putc(uint8_t outchar) */ + +static void hscif_console_putc(uint8_t outchar) +{ + uint16_t reg; + + /* Check that transfer of SCIF0 is completed */ + while (!((TRANS_END_CHECK & mem_read16(HSCIF_HSFSR)) == TRANS_END_CHECK)) + { + ; + } + + mem_write8(HSCIF_HSFTDR, outchar); /* Transfer one character */ + reg = mem_read16(HSCIF_HSFSR); + reg &= (uint16_t)(~(TRANS_END_CHECK)); /* TEND,TDFE clear */ + mem_write16(HSCIF_HSFSR, reg); + + /* Check that transfer of SCIF0 is completed */ + while (!((TRANS_END_CHECK & mem_read16(HSCIF_HSFSR)) == TRANS_END_CHECK)) + { + ; + } +} +/* End of function hscif_console_putc(uint8_t outchar) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/scmt_checkpoint.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/scmt_checkpoint.c new file mode 100644 index 00000000..0ecc40c9 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/scmt_checkpoint.c @@ -0,0 +1,127 @@ + +#include +#include /* NULL pointer */ +#include + +#include "scmt.h" +#include "scmt_config.h" +#include "scmt_checkpoint.h" + +#if PRINT_INFO + #include /* Access to mode pin register */ + #include /* Access to mode pin register */ +#endif /* PRINT_INFO */ + + +#define xstr(a) str(a) +#define str(a) #a + +/* Structure to hold the log data. */ +typedef struct { + uint32_t counter; /* Value of SCMT counter */ + char * note; /* String is stored as pointer! Pointer must be valid during runtime! */ + uint32_t data; /* Arbitrary data to add to log */ +} checkpoint_t; +checkpoint_t time_checkpoints[TIME_CHECKPOINTS_MAX]; + +/* If SCMT has a start value other than zero, we'll keep two slots free to inform the user about the offset within the print function */ +#if (SCMT_START_VALUE == 0) +uint32_t time_checkpoints_index = 0; +#else +uint32_t time_checkpoints_index = 2; +#endif + +/* Store a checkpoint: Fetch current counter value and store it together with a pointer to a static string as well as arbitrary data */ +void store_time_checkpoint(char * note, uint32_t data) +{ + if (time_checkpoints_index < TIME_CHECKPOINTS_MAX) { + time_checkpoints[time_checkpoints_index].counter = scmt_module_read(); + time_checkpoints[time_checkpoints_index].note = note; + time_checkpoints[time_checkpoints_index].data = data; + } + time_checkpoints_index++; +} + + +#if (0 == (MEASURE_TIME_NOPRINT)) +/* Print checkpoints */ +void print_time_checkpoints(void) +{ + uint32_t i; + + {PRINTFN(MODULE"=================\r\n");} + +#if PRINT_INFO + /* First, provide some information about the environment */ + {PRINTFN(MODULE"MODEMR[1:0]: 0x%x 0x%x\r\n", mem_read32(RST_MODEMR1), mem_read32(RST_MODEMR0) );} + + {PRINTFN(MODULE"Timer: '" xstr(TIMER_FUNC) "'\r\n");} + {PRINTFN(MODULE"- freq: %.3f kHz\r\n", (TIMER_FREQ)/1000.0f);} + {PRINTFN(MODULE"- resolution: 1 tick = %.4f ms\r\n", 1000.0/(TIMER_FREQ));} +#endif /* PRINT_INFO */ + + /* In case of unsufficient storage for checkpoints, inform about it */ + if (time_checkpoints_index >= TIME_CHECKPOINTS_MAX) { + {PRINTFN(MODULE"Internal number of checkpoints exceeded reserved space: %i of %i\r\n", time_checkpoints_index, TIME_CHECKPOINTS_MAX);} + } + + /* In case of non-zero SCMT start value, inform about it */ + #if (SCMT_START_VALUE != 0) + time_checkpoints[0].counter = 0; + time_checkpoints[0].note = "Reset Release!"; + time_checkpoints[1].counter = SCMT_START_VALUE; + time_checkpoints[1].note = "Timer started here with manual offset relative to reset release!"; + #endif + + /* Print log in CSV style */ + {PRINTFN(MODULE"CSV; timer_ticks; total_time[ms]; delta_time[ms]; data; comment\r\n" );} + for (i=0; i0) { + ms_delta = ms - time_checkpoints[i-1].counter*1000.0/(TIMER_FREQ); + } + + // ==> "E:ICUMX:CP: 364; 2.77; 2.77; 0; init_done" + {PRINTFN(MODULE"CP; %u; %f; %f; %u; %s\r\n", time_checkpoints[i].counter, ms, ms_delta, time_checkpoints[i].data, time_checkpoints[i].note );} +#else + {PRINTFN(MODULE"CP; %u; --; --; %u; %s\r\n", time_checkpoints[i].counter, time_checkpoints[i].data, time_checkpoints[i].note );} +#endif + + } + + /* Timer verification. + Sample calculation: + SCIF is running with 921600 Baud. 8N1 => 0.0108 ms / bit. + Sending 20 characters should take 28 timer ticks of SCMT + As SCIF has a 16-stage FIFO, send at least 16 characters before start of measurements */ +#if 0 != TIMER_TEST_VS_BAUD + { + uint32_t start = 0, stop = 0; + const char teststr[] = "ExecutingTimerTestExecutingTimerTestExecutingTimerTest!\r\n"; /* 57 characters */ + const float charrate = (TIMER_TEST_VS_BAUD)/10.0; /* 8N1: 10 cycles per character */ + const float expected_ms = sizeof(teststr)*1000.0/(charrate); + float measured_ms; + + {PRINTFN(MODULE"=================\r\n");} + {PRINTFN(MODULE"FillingFifoForTimerTestFillingFifoForTimerTest - ");} + start = (TIMER_FUNC)(); + {local_printf(teststr);} + stop = (TIMER_FUNC)(); + measured_ms = (stop-start)*1000.0/(TIMER_FREQ); + + {PRINTFN(MODULE"(Printing the test took %5i ticks / %7.2f ms / expected: %7.2f ms - %s)\r\n", stop-start, measured_ms, expected_ms, ((measured_ms/expected_ms < 1.3) && (measured_ms/expected_ms > 0.9))?"OK":"ERROR");} + } +#endif /* TIMER_TEST_VS_BAUD */ + {PRINTFN(MODULE"=================\r\n");} + +} +#else //(MEASURE_TIME_NOPRINT) == 0 +#warning "MEASURE_TIME_NOPRINT is enabled" +void print_time_checkpoints(void) {} +#endif //(MEASURE_TIME_NOPRINT) == 0 + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/timer/micro_wait.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/timer/micro_wait.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/timer/micro_wait.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/timer/micro_wait.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/timer/scmt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/timer/scmt.c new file mode 100644 index 00000000..d0823b30 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/common/timer/scmt.c @@ -0,0 +1,108 @@ + +#include +#include +#include +#include +#include + +#if SCMT_DEBUG + #include +#endif /* SCMT_DEBUG */ + +#if SCMT_TOGGLE_GPIO + #include +void gpio_set(void) +{ + /* V4H: SCL3_V::Pin AK5::GP8_06 + GPIO Group 8 Base: H’E606 8000 + INOUTSELn +0x184 (set pin to output mode) + OUTDTn +0x188 (set pin output value) + */ + pfc_reg_write(PFC_INOUTSEL8_RW, 1<<6); /* Set GP8_06 to output mode */ + pfc_reg_write(PFC_OUTDT8_RW, 1<<6); /* Set GP8_06 to 'high' */ +} +static int gpio_reset_cnt = 3; +void gpio_clear(void) +{ + if (gpio_reset_cnt>0) { + gpio_reset_cnt--; + } + else + { + pfc_reg_write(PFC_OUTDT8_RW, 0); /* Set GP8_06 to 'low' */ + } + +} +#endif /* SCMT_TOGGLE_GPIO */ + +void scmt_module_start(void) +{ + /* For boot time measurement, signal start of SCMT by GPIO pin toggle */ + #if SCMT_TOGGLE_GPIO + gpio_set(); + #endif /* SCMT_TOGGLE_GPIO */ + + /* If you have issues with the code getting stuck or reading zero from the timer, + you can debug the init seqence with SCMT_DEBUG. + Just make sure that printing debug data is already possible. */ + #if SCMT_DEBUG + PRINTFN("SCMT A\n"); + #endif /* SCMT_DEBUG */ + #if SCMT_INIT + mem_write32(SCMT_CMSCNT,(SCMT_START_VALUE)); /* Set counter value to zero */ + #endif /* SCMT_INIT */ + #if SCMT_DEBUG + PRINTFN("SCMT B: SCMT_CMSCNT (0x%x) = 0x%x\n", SCMT_CMSCNT, mem_read32(SCMT_CMSCNT) ); + #endif /* SCMT_DEBUG */ + #if SCMT_INIT + mem_write32(SCMT_CMSCOR,0xffffffff); /* Set compare value to maximum, we use it as 32-bit counter only */ + #endif /* SCMT_INIT */ + #if SCMT_DEBUG + PRINTFN("SCMT C: SCMT_CMSCOR (0x%x) = 0x%x\n", SCMT_CMSCOR, mem_read32(SCMT_CMSCOR) ); + #endif /* SCMT_DEBUG */ + #if SCMT_INIT + while(mem_read16(SCMT_CMSCSR)&(1<<13)); /* Wait for write clearance */ + #endif /* SCMT_INIT */ + #if SCMT_DEBUG + PRINTFN("SCMT D: SCMT_CMSCSR (0x%x) = 0x%x\n", SCMT_CMSCSR, mem_read16(SCMT_CMSCSR) ); + #endif /* SCMT_DEBUG */ + #if SCMT_INIT + mem_write16(SCMT_CMSSTR,1<<5); /* Start counter */ + #endif /* SCMT_INIT */ + #if SCMT_DEBUG + PRINTFN("SCMT E: SCMT_CMSSTR (0x%x) = 0x%x\n", SCMT_CMSSTR, mem_read16(SCMT_CMSSTR) ); + PRINTFN("SCMT F: SCMT_CMSCNT (0x%x) = 0x%x\n", SCMT_CMSCNT, mem_read32(SCMT_CMSCNT) ); + PRINTFN("SCMT G: SCMT_CMSCNT (0x%x) = 0x%x\n", SCMT_CMSCNT, mem_read32(SCMT_CMSCNT) ); + PRINTFN("SCMT H: SCMT_CMSCNT (0x%x) = 0x%x\n", SCMT_CMSCNT, mem_read32(SCMT_CMSCNT) ); + PRINTFN("SCMT I: SCMT_CMSCNT (0x%x) = 0x%x\n", SCMT_CMSCNT, mem_read32(SCMT_CMSCNT) ); + #endif /* SCMT_DEBUG */ +} + +uint32_t scmt_module_read(void) +{ + uint32_t last = 0, current = 0; + + /* For boot time measurement, signal start of SCMT by GPIO pin toggle, reset after some time */ + #if SCMT_TOGGLE_GPIO + gpio_clear(); + #endif /* SCMT_TOGGLE_GPIO */ + + /* From UM: + When CMSCNT is read during the counter operation, the read value may be wrong because of an asynchronous clock between counter and bus-interface. + For exact value, read this register continuously, until same values are read from this register. */ + current = mem_read32(SCMT_CMSCNT); + do { + last = current; + current = mem_read32(SCMT_CMSCNT); + } while (last != current); + return current; +} + +/* NOT SAFE FOR OVERLFOWS */ +void scmt_wait_ticks(uint32_t ticks) +{ + uint32_t start = scmt_module_read(); + uint32_t stop = start + ticks; + + while (stop > scmt_module_read()) { /* NOP */ }; +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cpu_on/cpu_on.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cpu_on/cpu_on.c new file mode 100644 index 00000000..86be83f1 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/cpu_on/cpu_on.c @@ -0,0 +1,239 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Power management driver + ******************************************************************************/ + /****************************************************************************** + * @file cpu_on.c + * - Version : 0.09 + * @brief Boot process of ARM CPU core. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Modify macro definition name. + * : 08.09.2021 0.03 Removed the reset process of BOOT_CTRL and + * OPBT_CTRL register. + * : 06.01.2022 0.04 Static analysis support + * : 23.05.2022 0.05 Integration of S4 and V4H + * : 21.06.2022 0.06 Remove functions for MCU. + * : 21.08.2023 0.07 Add support for V4M. + * : 17.11.2023 0.08 Move a part of definitions to cpu_on.h. + * : 09.12.2024 0.09 Update OTP_MEM_OTPMONITOR60 register to + * OTP_MEM_OTPMONITOR17 register for V4M. + * And Improve the adj_cr_variant_freq function. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* ARM */ +#define CA_CORE0_WUP_REQ (0x00000001U) +#define CA_CORE0_VLD_RVBARP (0x00000001U) +#define CR_VLD_BARP (0x00000001U << 0U) +#define CR_BAREN_VALID (0x00000001U << 4U) +#define CRRST_BIT (0x00000001U) + +#if (RCAR_LSI == RCAR_V4H) +#define V4H_7_NI_CR (0x53U) /* 1400[MHz] = 50/3[MHz] x (0x53 + 0x1) */ +#define V4H_5_NI_CR (0x41U) /* 1100[MHz] = 50/3[MHz] x (0x41 + 0x1) */ +#define V4H_3_NI_CR (0x35U) /* 900[MHz] = 50/3[MHz] x (0x35 + 0x1) */ +#elif (RCAR_LSI == RCAR_V4M) +#define V4M_7_NI_CR (0x53U) /* 1400[MHz] = 50/3[MHz] x (0x53 + 0x1) */ +#define V4M_5_NI_CR (0x41U) /* 1100[MHz] = 50/3[MHz] x (0x41 + 0x1) */ +#define V4M_3_NI_CR (0x35U) /* 900[MHz] = 50/3[MHz] x (0x35 + 0x1) */ +#define V4M_2_NI_CR (0x35U) /* 900[MHz] = 50/3[MHz] x (0x35 + 0x1) */ +# endif /* RCAR_LSI == RCAR_V4H */ + +#define CPG_PLL6CR0_KICK_BIT (0x80000000U) +#define CPG_PLLECR_PLL6ST_BIT (0x00008000U) + +#define AP_CORE_APSREG_P_CCI500_AUX_ASPRTM (0x00000001U << 1U) + +static void arm_cpu_set_address(uint32_t target, uint32_t boot_addr); + +static void arm_cpu_set_address(uint32_t target, uint32_t boot_addr) +{ + if(RCAR_PWR_TARGET_CR == target) + { + /* CR Boot address set */ + mem_write32(APMU_CRBARP, (uint32_t)(boot_addr | CR_VLD_BARP)); + mem_write32(APMU_CRBARP, (uint32_t)(boot_addr | CR_VLD_BARP | CR_BAREN_VALID)); + } + else if(RCAR_PWR_TARGET_CA == target) + { + /* CA Boot address set */ + mem_write32(APMU_RVBARPLC0, boot_addr | CA_CORE0_VLD_RVBARP); + mem_write32(APMU_RVBARPHC0, 0x00000000U); + } + else + { + /* No Process */ + } +} +/* End of function arm_cpu_set_address(uint32_t target, uint32_t boot_addr) */ + +void arm_cpu_on(uint32_t target, uint32_t boot_addr) +{ + uint32_t res_data; + + if(RCAR_PWR_TARGET_CR == target) + { + /* CR Boot address set. */ + arm_cpu_set_address(target, boot_addr); + + synci(); + + /* CR reset. */ + res_data = mem_read32(APMU_CRRSTCTRL); + res_data &= ~(CRRST_BIT); + mem_write32(APMU_CRRSTCTRL, res_data); + } + else if(RCAR_PWR_TARGET_CA == target) + { + /* CA Boot address set. */ + arm_cpu_set_address(target, boot_addr); + + /* AP-System core initialize */ + res_data = mem_read32(ap_core_get_ap_cluster_n_aux0_addr(0U)); + res_data |= AP_CORE_APSREG_AP_CLUSTER_N_AUX0_INIT; + mem_write32(ap_core_get_ap_cluster_n_aux0_addr(0U), res_data); + + res_data = mem_read32(AP_CORE_APSREG_CCI500_AUX); + res_data |= AP_CORE_APSREG_CCI500_AUX_ACTDIS; + mem_write32(AP_CORE_APSREG_CCI500_AUX, res_data); +#if (RCAR_LSI == RCAR_V4H) + res_data = mem_read32(AP_CORE_APSREG_P_CCI500_AUX); + res_data |= AP_CORE_APSREG_P_CCI500_AUX_ASPRTM; + mem_write32(AP_CORE_APSREG_P_CCI500_AUX, res_data); +#endif /* RCAR_LSI == RCAR_V4H */ + synci(); + + /* CA core0 wake up sequence. */ + res_data = mem_read32(APMU_PWRCTRLC0); + res_data |= CA_CORE0_WUP_REQ; + mem_write32(APMU_PWRCTRLC0, res_data); + /* Wait until CA core0 wake up sequence finished. */ + do + { + res_data = mem_read32(APMU_PWRCTRLC0); + }while(FALSE != (CA_CORE0_WUP_REQ & res_data)); + } + else + { + /* No Process */ + } +} +/* End of function arm_cpu_on(uint32_t target, uint32_t boot_addr) */ + + +void adj_cr_variant_freq(void) +{ + uint32_t product = mem_read32(OTP_MEM_OTPMONITOR17) & OTP_MEM_PRODUCT_MASK; + uint32_t pll6_freq = mem_read32(CPG_PLL6CR0); + +#if (RCAR_LSI == RCAR_V4H) + /* Set the CPU frequency division ratio according to the type of variant. */ + switch (product) + { + case VARIANT_V4H_7: + /* Default value, do nothing */; + break; + case VARIANT_V4H_5: + pll6_freq = (pll6_freq & ~(0xFFU << 20U)); + pll6_freq = (pll6_freq | (V4H_5_NI_CR << 20U)); + break; + case VARIANT_V4H_3: + pll6_freq = (pll6_freq & ~(0xFFU << 20U)); + pll6_freq = (pll6_freq | (V4H_3_NI_CR << 20U)); + break; + default: + ; /* Do nothing */ + break; + } + + if (VARIANT_V4H_5 == product || VARIANT_V4H_3 == product) + { + /* Write Division value to FRQCRC0 register */ + mem_write32(CPG_CPGWPR, ~(pll6_freq)); + mem_write32(CPG_PLL6CR0, pll6_freq); + + pll6_freq = mem_read32(CPG_PLL6CR0) | CPG_PLL6CR0_KICK_BIT; + mem_write32(CPG_CPGWPR, ~(pll6_freq)); + mem_write32(CPG_PLL6CR0, pll6_freq); + + while ((mem_read32(CPG_PLLECR) & CPG_PLLECR_PLL6ST_BIT) != CPG_PLLECR_PLL6ST_BIT) + { + ; + } + } +#elif (RCAR_LSI == RCAR_V4M) + /* Set the CPU frequency division ratio according to the type of variant. */ + switch (product) + { + case VARIANT_V4M_7: + /* Default value, do nothing */; + break; + case VARIANT_V4M_5: + pll6_freq = (pll6_freq & ~(0xFFU << 20U)); + pll6_freq = (pll6_freq | (V4M_5_NI_CR << 20U)); + break; + case VARIANT_V4M_3: + pll6_freq = (pll6_freq & ~(0xFFU << 20U)); + pll6_freq = (pll6_freq | (V4M_3_NI_CR << 20U)); + break; + case VARIANT_V4M_2: + pll6_freq = (pll6_freq & ~(0xFFU << 20U)); + pll6_freq = (pll6_freq | (V4M_2_NI_CR << 20U)); + break; + default: + ; /* Do nothing */ + break; + } + + if (VARIANT_V4M_5 == product || VARIANT_V4M_3 == product || VARIANT_V4M_2 == product) + { + /* Write Division value to FRQCRC0 register */ + mem_write32(CPG_CPGWPR, ~(pll6_freq)); + mem_write32(CPG_PLL6CR0, pll6_freq); + + mem_write32(CPG_CPGWPR, ~(mem_read32(CPG_PLL6CR0) | CPG_PLL6CR0_KICK_BIT)); + mem_write32(CPG_PLL6CR0, (mem_read32(CPG_PLL6CR0) | CPG_PLL6CR0_KICK_BIT)); + + while ((mem_read32(CPG_PLLECR) & CPG_PLLECR_PLL6ST_BIT) != CPG_PLLECR_PLL6ST_BIT) + { + ; + } + } +#endif /* RCAR_LSI == RCAR_V4H */ +} +/* End of function adj_cpu_variant_freq(void) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/dos.mk b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/dos.mk new file mode 100644 index 00000000..7445f1c9 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/dos.mk @@ -0,0 +1,735 @@ +#/******************************************************************************* +# * DISCLAIMER +# * This software is supplied by Renesas Electronics Corporation and is only +# * intended for use with Renesas products. No other uses are authorized. This +# * software is owned by Renesas Electronics Corporation and is protected under +# * all applicable laws, including copyright laws. +# * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +# * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +# * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +# * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +# * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +# * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +# * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +# * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +# * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +# * Renesas reserves the right, without notice, to make changes to this software +# * and to discontinue the availability of this software. By using this software, +# * you agree to the additional terms and conditions found by accessing the +# * following link: +# * http://www.renesas.com/disclaimer +# * Copyright 2022-2025 Renesas Electronics Corporation All rights reserved. +# *******************************************************************************/ +# +# ******************************************************************************* +# * DESCRIPTION : makefile for Loader +# ****************************************************************************** + +define add_define +DEFINES += -D$(1)$(if $(value $(1)),=$(value $(1)),) +endef + +INCLUDE_DIR = -Iinclude \ + -Iip/ddr + +OUTDIR := build + +# LSI setting common define +RCAR_S4 := 0 +RCAR_V4H := 1 +RCAR_V4M := 2 +$(eval $(call add_define,RCAR_S4)) +$(eval $(call add_define,RCAR_V4H)) +$(eval $(call add_define,RCAR_V4M)) +ifneq ("$(FORCE_115200)", "") +$(eval $(call add_define,FORCE_115200)) +endif + +#/* Select LSI("S4" or "V4H" or "V4M" )******************************** +ifeq ("$(LSI)", "") +LSI = S4 +endif + +ifeq (${LSI},S4) + RCAR_LSI:=${RCAR_S4} + DIR_NAME_SA9 = s4 + OBJ_FILE += loader/loader_main_s4.o \ + cnf_tbl/cnf_tbl_s4.o \ + ip/qos/qos.o \ + ip/rtvram/rtvram.o \ + ip/ddr/s4/lpddr4x/ecc_enable_s4.o + INCLUDE_DIR += -Imcu + include ip/ddr/ddr.mk +else ifeq (${LSI},V4H) + RCAR_LSI:=${RCAR_V4H} + DIR_NAME_SA9 = v4h + OBJ_FILE += loader/loader_main_v4h.o \ + ip/fcpr/fcpr.o \ + ip/i2c/i2c5.o \ + ip/i2c/pmic.o \ + ip/i2c/pmic_wdt.o \ + cnf_tbl/cnf_tbl_v4h.o \ + common/crc32.o \ + image_load/android_ab.o \ + ip/ddr/v4h/lpddr5/ecc_enable_v4h.o \ + ip/ddr/v4h/lpddr5/ecm_enable_v4h.o +else ifeq (${LSI},V4M) + RCAR_LSI:=${RCAR_V4M} + DIR_NAME_SA9 = v4m + OBJ_FILE += loader/loader_main_v4m.o \ + ip/fcpr/fcpr.o \ + cnf_tbl/cnf_tbl_v4m.o \ + ip/sysc/sysc.o \ + ip/avs/avs.o \ + ip/i2c/i2c.o \ + ip/ddr/v4m/lpddr5/ecc_enable_v4m.o \ + ip/ddr/v4m/lpddr5/ecm_enable_v4m.o +else + $(error "Error: ${LSI} is not supported.") +endif +$(eval $(call add_define,RCAR_LSI)) + +# timing measurement +ifeq ("$(MEASURE_TIME)", "") + MEASURE_TIME = 0 +else + $(eval $(call add_define,MEASURE_TIME)) + # Set log level to Error, so we dont waste time with unnecessary prints + LOG_LEVEL := 1 + OBJ_FILE += common/scmt_checkpoint.o \ + common/timer/scmt.o +endif +ifeq ("$(MEASURE_TIME_NOPRINT)", "") + MEASURE_TIME_NOPRINT = 0 +else + $(eval $(call add_define,MEASURE_TIME_NOPRINT)) +endif + +################################################### + +#output file name +FILE_NAME = icumx_loader +FILE_NAME_SA0 = bootparam_sa0 +FILE_NAME_SA9 = cert_header_sa9 +FILE_NAME_TFMV_TBL = tfmv_ver_tbl +FILE_NAME_NTFMV_TBL = ntfmv_ver_tbl + +OUTPUT_FILE = $(FILE_NAME).elf +OUTPUT_FILE_SA0 = $(FILE_NAME_SA0).elf +OUTPUT_FILE_SA9 = $(FILE_NAME_SA9).elf +OUTPUT_FILE_TFMV_TBL = $(FILE_NAME_TFMV_TBL).elf +OUTPUT_FILE_NTFMV_TBL = $(FILE_NAME_NTFMV_TBL).elf + +#object file name +OBJ_FILE += cpu_on/cpu_on.o \ + common/log/log.o \ + common/log/scif.o \ + common/timer/micro_wait.o \ + image_load/image_load.o \ + intc/intc.o \ + intc/vecttbl.o \ + intc/vect_set.o \ + ip/ip_control.o \ + ip/cpg/cpg.o \ + ip/emmc/emmc_boot.o \ + ip/wdt/wdt.o \ + loader/loader.o \ + loader/loader_main_common.o \ + protect/ram_protection.o \ + protect/region_id.o \ + protect/stack_protect.o \ + remap/remap.o \ + rom_api/rom_api.o + +OBJ_FILE_SA0 = tools/dummy_create/sa0.o +OBJ_FILE_SA9 = tools/dummy_create/$(DIR_NAME_SA9)/sa9.o +OBJ_FILE_TFMV_TBL = tools/sw_min_ver_tbl/tfmv_ver_tbl.o +OBJ_FILE_NTFMV_TBL = tools/sw_min_ver_tbl/ntfmv_ver_tbl.o + +#linker script name +ifeq (${LSI},V4M) + MEMORY_DEF = loader/icumx_loader_v4m.ld +else + MEMORY_DEF = loader/icumx_loader.ld +endif + +MEMORY_DEF_SA0 = tools/dummy_create/sa0.ld +MEMORY_DEF_SA9 = tools/dummy_create/$(DIR_NAME_SA9)/sa9.ld +MEMORY_DEF_TFMV_TBL = tools/sw_min_ver_tbl/tfmv_ver_tbl.ld +MEMORY_DEF_NTFMV_TBL = tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld + +################################################### + +# Debug build +DEBUG:=0 + +# Process DEBUG flag +$(eval $(call assert_boolean,DEBUG)) +$(eval $(call add_define,DEBUG)) +ifeq (${DEBUG},0) + $(eval $(call add_define,NDEBUG)) +CFLAGS += -Onone +else +ASFLAGS += -G -dwarf2 +CFLAGS += -G -dwarf2 -Odebug +endif + +# booting performance check +ifneq ("$(WDT_RESET)", "") +$(eval $(call add_define,WDT_RESET)) +endif + +# Process STRICT_AB_BOOTING flag +ifneq ("$(STRICT_AB_BOOT)", "") +$(eval $(call add_define,STRICT_AB_BOOTING)) +endif + +# booting performance check +ifneq ("$(BOOT_GPIO)", "") + $(eval $(call add_define,BOOT_GPIO_CHECK)) +endif +OBJ_FILE += ip/gpio/gpio.o + +# MISRA Option +#------ MISRA ------ +ifndef MISRA +MISRA := MANDATORY +endif +ifeq ("$(MISRA)", "DISABLE") + MISRA_OPTION = DISABLE +else ifeq ("$(MISRA)", "FULL") + MISRA_OPTION = FULL +else ifeq ("$(MISRA)", "MANDATORY") + MISRA_OPTION = MANDATORY +else ifeq ("$(MISRA)", "REQUIRED") + MISRA_OPTION = REQUIRED +endif +CFLAGS_MISRA_FULL = \ + --misra_adv=warn \ + --misra_req=warn \ + --misra_mand=warn \ + --no_misra_runtime \ + --misra_2012=all,-R1.1 # MISRA 2012 Rule 1.1 not allowed with non-strict -c99 or later +CFLAGS_MISRA_REQUIRED = \ + --misra_adv=silent \ + --misra_req=warn \ + --misra_mand=warn \ + --no_misra_runtime \ + --misra_2012=all,-R1.1 # MISRA 2012 Rule 1.1 not allowed with non-strict -c99 or later +CFLAGS_MISRA_MANDATORY = \ + --misra_adv=silent \ + --misra_req=silent \ + --misra_mand=warn \ + --no_misra_runtime \ + --misra_2012=all,-R1.1,-R3.1 # MISRA 2012 Rule 1.1 not allowed with non-strict -c99 or later + # MISRA 2012 Rule 3.1 is confirmed with static analysis +ifeq ("$(MISRA_OPTION)", "FULL") +CFLAGS += $(CFLAGS_MISRA_FULL) +else ifeq ("$(MISRA)", "REQUIRED") +CFLAGS += $(CFLAGS_MISRA_REQUIRED) +else ifeq ("$(MISRA)", "MANDATORY") +CFLAGS += $(CFLAGS_MISRA_MANDATORY) +endif + +# Process LOG_LEVEL +ifndef LOG_LEVEL +LOG_LEVEL := 1 +endif +$(eval $(call add_define,LOG_LEVEL)) +ifeq (${LOG_LEVEL},0) + LDFLAGS += -nostdlib +endif + +# Process SET_FCPR_PARAM flag +# 0:Disable, 1:Enable (Support V4H / V4M Linux OS) +ifeq ($(filter ${LSI},V4H V4M),${LSI}) + ifndef SET_FCPR_PARAM + SET_FCPR_PARAM := 0 + $(eval $(call add_define,SET_FCPR_PARAM)) + else + ifeq (${SET_FCPR_PARAM},0) + $(eval $(call add_define,SET_FCPR_PARAM)) + else ifeq (${SET_FCPR_PARAM},1) + $(eval $(call add_define,SET_FCPR_PARAM)) + else + $(error "Error:SET_FCPR_PARAM=${SET_FCPR_PARAM} is not supported.") + endif + endif +else + SET_FCPR_PARAM := 0 + $(eval $(call add_define,SET_FCPR_PARAM)) +endif + +# Process BOOT_MCU flag (S4 only) +# 0:None, 1:G4MH, 2:Reserved, 3:G4MH+ICUMH +ifeq (${LSI},S4) + ifndef BOOT_MCU + BOOT_MCU :=3 + $(eval $(call add_define,BOOT_MCU)) + else + ifeq (${BOOT_MCU},0) + $(eval $(call add_define,BOOT_MCU)) + else ifeq (${BOOT_MCU},1) + $(eval $(call add_define,BOOT_MCU)) + else ifeq (${BOOT_MCU},2) + $(eval $(call add_define,BOOT_MCU)) + else ifeq (${BOOT_MCU},3) + $(eval $(call add_define,BOOT_MCU)) + else + $(error "Error:BOOT_MCU=${BOOT_MCU} is not supported.") + endif + endif +else + BOOT_MCU :=0 + $(eval $(call add_define,BOOT_MCU)) +endif + +ifneq (${BOOT_MCU},0) +OBJ_FILE += mcu/cpu_on_for_mcu.o \ + mcu/sdmac.o \ + mcu/loader_main_mcu.o \ + mcu/image_load_for_mcu.o \ + mcu/codesram_ecc.o +endif + +# Process RTVRAM_EXTEND flag +ifeq (${LSI},S4) + ifndef RTVRAM_EXTEND + RTVRAM_EXTEND := 1 + $(eval $(call add_define,RTVRAM_EXTEND)) + else + ifeq (${RTVRAM_EXTEND},0) + $(eval $(call add_define,RTVRAM_EXTEND)) + else ifeq (${RTVRAM_EXTEND},1) + $(eval $(call add_define,RTVRAM_EXTEND)) + else + $(error "Error:RTVRAM_EXTEND=${RTVRAM_EXTEND} is not supported.") + endif + endif +endif + +# Process QSPI_DDR_MODE flag +# 0:SDR, 1:DDR +ifndef QSPI_DDR_MODE +QSPI_DDR_MODE := 0 +$(eval $(call add_define,QSPI_DDR_MODE)) +else + ifeq (${QSPI_DDR_MODE},0) + $(eval $(call add_define,QSPI_DDR_MODE)) + else ifeq (${QSPI_DDR_MODE},1) + $(eval $(call add_define,QSPI_DDR_MODE)) + else + $(error "Error:QSPI_DDR_MODE=${QSPI_DDR_MODE} is not supported.") + endif +endif + +# RCAR_QSPI_DDR_DUMMY_CYCLE +ifndef RCAR_QSPI_DDR_DUMMY_CYCLE +RCAR_QSPI_DDR_DUMMY_CYCLE := 9 +endif +$(eval $(call add_define,RCAR_QSPI_DDR_DUMMY_CYCLE)) + +# Process RCAR_SA9_TYPE flag +# 0:Flash, 1:eMMC +ifeq (${LSI},S4) + ifndef RCAR_SA9_TYPE + RCAR_SA9_TYPE := 0 + $(eval $(call add_define,RCAR_SA9_TYPE)) + else + ifeq (${RCAR_SA9_TYPE},0) + $(eval $(call add_define,RCAR_SA9_TYPE)) + else ifeq (${RCAR_SA9_TYPE},1) + $(eval $(call add_define,RCAR_SA9_TYPE)) + else + $(error "Error:RCAR_SA9_TYPE=${RCAR_SA9_TYPE} is not supported.") + endif + endif +else ifeq ($(filter ${LSI},V4H V4M),${LSI}) + RCAR_SA9_TYPE := 0 + $(eval $(call add_define,RCAR_SA9_TYPE)) +endif + + +ifeq (${RCAR_SA9_TYPE},1) +OBJ_FILE += image_load/image_load_emmc.o \ + ip/emmc/emmc_cmd.o \ + ip/emmc/emmc_init.o \ + ip/emmc/emmc_interrupt.o \ + ip/emmc/emmc_mount.o \ + ip/emmc/emmc_multiboot.o \ + ip/emmc/emmc_read.o \ + ip/emmc/emmc_utility.o +else ifeq (${RCAR_SA9_TYPE},0) +OBJ_FILE += image_load/image_load_flash.o \ + ip/dma/dma.o \ + ip/rpc/rpc.o \ + ip/rpc/qspi_xdr_mode.o \ + ip/rpc/dma2.o \ + ip/rpc/rpcqspidrv.o \ + ip/rpc/spiflash2drv.o \ + ip/mfis/mfis.o +endif + +# Process CA_LOAD_TYPE flag +# 0:CA Loader 1:BL31 (or Secure Monitor) +ifeq (${LSI},S4) + ifndef CA_LOAD_TYPE + CA_LOAD_TYPE := 0 + $(eval $(call add_define,CA_LOAD_TYPE)) + else + ifeq (${CA_LOAD_TYPE},0) + $(eval $(call add_define,CA_LOAD_TYPE)) + else ifeq (${CA_LOAD_TYPE},1) + $(eval $(call add_define,CA_LOAD_TYPE)) + else + $(error "Error:CA_LOAD_TYPE=${CA_LOAD_TYPE} is not supported.") + endif + endif +else ifeq ($(filter ${LSI},V4H V4M),${LSI}) + CA_LOAD_TYPE := 0 + $(eval $(call add_define,CA_LOAD_TYPE)) +endif + +ifeq (${RCAR_SA9_TYPE},1) + ifeq (${CA_LOAD_TYPE},0) + $(error "Error:RCAR_SA9_TYPE=1 and CA_LOAD_TYPE=0 is not supported.") + endif +endif + +# Process MCU_SECURE_BOOT flag (S4 only) +ifndef MCU_SECURE_BOOT + MCU_SECURE_BOOT := 0 + $(eval $(call add_define,MCU_SECURE_BOOT)) +else + ifeq (${MCU_SECURE_BOOT},0) + $(eval $(call add_define,MCU_SECURE_BOOT)) + else ifeq (${MCU_SECURE_BOOT},1) + ifeq (${BOOT_MCU},0) + $(error "Error:MCU_SECURE_BOOT=${MCU_SECURE_BOOT} and BOOT_MCU=${BOOT_MCU} is not supported.") + else + $(eval $(call add_define,MCU_SECURE_BOOT)) + endif + else + $(error "Error:MCU_SECURE_BOOT=${MCU_SECURE_BOOT} is not supported.") + endif +endif + +# Process SW_VERSION_CHECK flag +# 0:Disable 1:Enable +ifndef SW_VERSION_CHECK +SW_VERSION_CHECK := 0 +$(eval $(call add_define,SW_VERSION_CHECK)) +else + ifeq (${SW_VERSION_CHECK},0) + $(eval $(call add_define,SW_VERSION_CHECK)) + else ifeq (${SW_VERSION_CHECK},1) + $(eval $(call add_define,SW_VERSION_CHECK)) + else + $(error "Error:SW_VERSION_CHECK=${SW_VERSION_CHECK} is not supported.") + endif +endif + +# Process access protection flag +# 0:Disable 1:Enable +ifndef ACC_PROT_ENABLE +ACC_PROT_ENABLE := 0 +$(eval $(call add_define,ACC_PROT_ENABLE)) +else + ifeq (${ACC_PROT_ENABLE},0) + $(eval $(call add_define,ACC_PROT_ENABLE)) + else ifeq (${ACC_PROT_ENABLE},1) + $(eval $(call add_define,ACC_PROT_ENABLE)) + else + $(error "Error:ACC_PROT_ENABLE=${ACC_PROT_ENABLE} is not supported.") + endif +endif + +ifeq (${MCU_SECURE_BOOT},1) +include mcu_secureboot/mcu_secureboot.mk +endif + +# Process ADD_HOTPLUG_MAGIC flag +ifndef ADD_HOTPLUG_MAGIC + ADD_HOTPLUG_MAGIC := 0 + $(eval $(call add_define,ADD_HOTPLUG_MAGIC)) +else + ifeq (${ADD_HOTPLUG_MAGIC},0) + $(eval $(call add_define,ADD_HOTPLUG_MAGIC)) + else ifeq (${ADD_HOTPLUG_MAGIC},1) + $(eval $(call add_define,ADD_HOTPLUG_MAGIC)) + else + $(error "Error:ADD_HOTPLUG_MAGIC=${ADD_HOTPLUG_MAGIC} is not supported.") + endif +endif + +# Process STACK_PROTECT flag +ifndef STACK_PROTECT + STACK_PROTECT := 0 + $(eval $(call add_define,STACK_PROTECT)) +else + ifeq (${STACK_PROTECT},0) + $(eval $(call add_define,STACK_PROTECT)) + else ifeq (${STACK_PROTECT},1) + $(eval $(call add_define,STACK_PROTECT)) + CFLAGS += -stack_protector + else + $(error "Error:STACK_PROTECT=${STACK_PROTECT} is not supported.") + endif +endif + +# Process RTOS_LOAD_NUM flag +# 1:RTOS#0 only 3:RTOS#0,#1,#2 +ifndef RTOS_LOAD_NUM + RTOS_LOAD_NUM := 1 + $(eval $(call add_define,RTOS_LOAD_NUM)) +else + ifeq (${RTOS_LOAD_NUM},1) + $(eval $(call add_define,RTOS_LOAD_NUM)) + else ifeq (${RTOS_LOAD_NUM},3) + $(eval $(call add_define,RTOS_LOAD_NUM)) + else + $(error "Error:RTOS_LOAD_NUM=${RTOS_LOAD_NUM} is not supported.") + endif +endif + +# Process OPTEE_LOAD_ENABLE flag +ifeq ($(filter ${LSI},V4H V4M),${LSI}) + ifndef OPTEE_LOAD_ENABLE + OPTEE_LOAD_ENABLE := 1 + $(eval $(call add_define,OPTEE_LOAD_ENABLE)) + else + ifeq (${OPTEE_LOAD_ENABLE},0) + $(eval $(call add_define,OPTEE_LOAD_ENABLE)) + else ifeq (${OPTEE_LOAD_ENABLE},1) + $(eval $(call add_define,OPTEE_LOAD_ENABLE)) + else + $(error "Error:OPTEE_LOAD_ENABLE=${OPTEE_LOAD_ENABLE} is not supported.") + endif + endif +endif + +# Process BL2_LOAD_ENABLE flag +ifeq (${LSI},V4H) + ifndef BL2_LOAD_ENABLE + BL2_LOAD_ENABLE := 1 + $(eval $(call add_define,BL2_LOAD_ENABLE)) + else + ifeq (${BL2_LOAD_ENABLE},0) + $(eval $(call add_define,BL2_LOAD_ENABLE)) + else ifeq (${BL2_LOAD_ENABLE},1) + $(eval $(call add_define,BL2_LOAD_ENABLE)) + else + $(error "Error:BL2_LOAD_ENABLE=${BL2_LOAD_ENABLE} is not supported.") + endif + endif +endif + +# Process QNX_OS_LOAD_ENABLE flag +ifeq (${LSI},V4H) + ifndef QNX_OS_LOAD_ENABLE + QNX_OS_LOAD_ENABLE := 1 + $(eval $(call add_define,QNX_OS_LOAD_ENABLE)) + else + ifeq (${QNX_OS_LOAD_ENABLE},0) + $(eval $(call add_define,QNX_OS_LOAD_ENABLE)) + else ifeq (${QNX_OS_LOAD_ENABLE},1) + $(eval $(call add_define,QNX_OS_LOAD_ENABLE)) + else + $(error "Error:QNX_OS_LOAD_ENABLE=${QNX_OS_LOAD_ENABLE} is not supported.") + endif + endif +endif + +################################################### +# pass SecureMonitor parametor +################################################### +# Process SET_CA_PARAM flag +ifeq (${LSI},S4) + ifndef SET_CA_PARAM + SET_CA_PARAM := 1 + $(eval $(call add_define,SET_CA_PARAM)) + else + ifeq (${SET_CA_PARAM},0) + $(eval $(call add_define,SET_CA_PARAM)) + else ifeq (${SET_CA_PARAM},1) + $(eval $(call add_define,SET_CA_PARAM)) + else + $(error "Error:SET_CA_PARAM=${SET_CA_PARAM} is not supported.") + endif + endif +endif + +# Process ECM_ENABLE +ifndef ECM_ENABLE + ECM_ENABLE:= 0 + $(eval $(call add_define,ECM_ENABLE)) +else + ifeq (${ECM_ENABLE},0) + $(eval $(call add_define,ECM_ENABLE)) + else ifeq (${ECM_ENABLE},1) + $(eval $(call add_define,ECM_ENABLE)) + else + $(error "Error: ECM_ENABLE=${ECM_ENABLE} is not supported.") + endif +endif + +# Process ECM_ERROR_ENABLE flag +ifndef ECM_ERROR_ENABLE + ECM_ERROR_ENABLE := 1 + $(eval $(call add_define,ECM_ERROR_ENABLE)) +else + ifeq (${ECM_ERROR_ENABLE},0) + $(eval $(call add_define,ECM_ERROR_ENABLE)) + else ifeq (${ECM_ERROR_ENABLE},1) + $(eval $(call add_define,ECM_ERROR_ENABLE)) + else + $(error "Error:ECM_ERROR_ENABLE=${ECM_ERROR_ENABLE} is not supported.") + endif +endif + + +# Process SAN_ENABLE +ifndef SAN_ENABLE + SAN_ENABLE:= 0 + $(eval $(call add_define,SAN_ENABLE)) +else + ifeq (${SAN_ENABLE},0) + $(eval $(call add_define,SAN_ENABLE)) + else ifeq (${SAN_ENABLE},1) + $(eval $(call add_define,SAN_ENABLE)) + OBJ_FILE += \ + ip/san/v4h.o \ + ip/wdt/rwdt.o + else + $(error "Error: SAN_ENABLE=${SAN_ENABLE} is not supported.") + endif +endif + +# Process DBSC HUNGUP WA +ifndef WA_OTLINT5579 + WA_OTLINT5579:= 1 +endif +$(eval $(call add_define,WA_OTLINT5579)) + +################################################### + +OUTDIR_REL := $(OUTDIR)/release +OUTDIR_OBJ := $(OUTDIR)/obj + +OBJ_FILE := $(OBJ_FILE:%.o=$(OUTDIR_OBJ)/%.o) +OBJ_FILE_SA0 := $(OBJ_FILE_SA0:%.o=$(OUTDIR_OBJ)/%.o) +OBJ_FILE_SA9 := $(OBJ_FILE_SA9:%.o=$(OUTDIR_OBJ)/%.o) +OBJ_FILE_TFMV_TBL := $(OBJ_FILE_TFMV_TBL:%.o=$(OUTDIR_OBJ)/%.o) +OBJ_FILE_NTFMV_TBL := $(OBJ_FILE_NTFMV_TBL:%.o=$(OUTDIR_OBJ)/%.o) + +CC = cxrh850 +AS = cxrh850 +LD = cxrh850 +OC = gsrec +OD = gdump + +ASFLAGS += -asm="-preprocess_assembly_files" \ + -asm="-nostartfiles" \ + -D__ASSEMBLY \ + $(INCLUDE_DIR) $(DEFINES) + +CFLAGS += -nostartfiles \ + -c99 \ + $(INCLUDE_DIR) $(DEFINES) \ + --ghstd=last \ + -Wundef \ + --diag_error=193 \ + --prototype_errors +# --ghstd=last : Enable Green Hills Standard Mode +# -Wundef : Output warning if there are any undefined symbols +# --diag_error=193 : Error if zero is applied to undefined symbol +# --prototype_errors : Error if there are no any prototype declaration + +ifeq (${LOG_LEVEL},0) +# There are no any additional options +else +CFLAGS += --diag_suppress=1932 # There is warning that format string parameter in sprintf is not constant +endif + +LDFLAGS += -nostartfiles -Mu + +BUILD_MESSAGE_TIMESTAMP ?= __TIME__", "__DATE__ + +################################################### +.SUFFIXES : .s .c .o + +################################################### +# command + +.PHONY: all +all: $(OUTPUT_FILE) $(OUTPUT_FILE_SA0) $(OUTPUT_FILE_SA9) $(OUTPUT_FILE_TFMV_TBL) $(OUTPUT_FILE_NTFMV_TBL) + +################################################### +# Linker +################################################### +$(OUTPUT_FILE) : $(MEMORY_DEF) $(OBJ_FILE) + @echo const char build_message[] = "Built : "$(BUILD_MESSAGE_TIMESTAMP); > $(OUTDIR_OBJ)/build_message.c + $(V)$(CC) $(CFLAGS) -o $(OUTDIR_OBJ)/build_message.o -c $(OUTDIR_OBJ)/build_message.c + + $(V)$(LD) $(OBJ_FILE) $(OUTDIR_OBJ)/build_message.o \ + -T $(MEMORY_DEF) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE) \ + $(LDFLAGS) \ + -map=$(OUTDIR_REL)/$(FILE_NAME).map + + $(V)$(OC) -S3 -bytes 16 -noS5 $(OUTDIR_REL)/$(OUTPUT_FILE) > $(OUTDIR_REL)/$(FILE_NAME).srec + $(V)$(OD) -full -ysec $(OUTDIR_REL)/$(OUTPUT_FILE) > $(OUTDIR_REL)/$(FILE_NAME).dump + $(V)gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE) -o $(OUTDIR_REL)/$(OUTPUT_FILE:%.elf=%.bin) + +$(OUTPUT_FILE_SA0) : $(MEMORY_DEF_SA0) $(OBJ_FILE_SA0) + $(V)$(LD) $(OBJ_FILE_SA0) \ + -T $(MEMORY_DEF_SA0) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE_SA0) \ + -map=$(OUTDIR_REL)/$(FILE_NAME_SA0).map \ + -nostdlib + + $(V)$(OC) -S3 -bytes 16 -noS5 $(OUTDIR_REL)/$(OUTPUT_FILE_SA0) > $(OUTDIR_REL)/$(FILE_NAME_SA0).srec + $(V)gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE_SA0) -o $(OUTDIR_REL)/$(OUTPUT_FILE_SA0:%.elf=%.bin) + +$(OUTPUT_FILE_SA9) : $(MEMORY_DEF_SA9) $(OBJ_FILE_SA9) + $(V)$(LD) $(OBJ_FILE_SA9) \ + -T $(MEMORY_DEF_SA9) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE_SA9) \ + -map=$(OUTDIR_REL)/$(FILE_NAME_SA9).map \ + -nostdlib + + $(V)$(OC) -S3 -bytes 16 -noS5 $(OUTDIR_REL)/$(OUTPUT_FILE_SA9) > $(OUTDIR_REL)/$(FILE_NAME_SA9).srec + $(V)gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE_SA9) -o $(OUTDIR_REL)/$(OUTPUT_FILE_SA9:%.elf=%.bin) + +$(OUTPUT_FILE_TFMV_TBL) : $(MEMORY_DEF_TFMV_TBL) $(OBJ_FILE_TFMV_TBL) + $(V)$(LD) $(OBJ_FILE_TFMV_TBL) \ + -T $(MEMORY_DEF_TFMV_TBL) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE_TFMV_TBL) \ + -map=$(OUTDIR_REL)/$(FILE_NAME_TFMV_TBL).map \ + -nostdlib + + $(V)gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE_TFMV_TBL) -o $(OUTDIR_REL)/$(OUTPUT_FILE_TFMV_TBL:%.elf=%.bin) + +$(OUTPUT_FILE_NTFMV_TBL) : $(MEMORY_DEF_NTFMV_TBL) $(OBJ_FILE_NTFMV_TBL) + $(V)$(LD) $(OBJ_FILE_NTFMV_TBL) \ + -T $(MEMORY_DEF_NTFMV_TBL) \ + -o $(OUTDIR_REL)/$(OUTPUT_FILE_NTFMV_TBL) \ + -map=$(OUTDIR_REL)/$(FILE_NAME_NTFMV_TBL).map \ + -nostdlib + + $(V)gmemfile $(OUTDIR_REL)/$(OUTPUT_FILE_NTFMV_TBL) -o $(OUTDIR_REL)/$(OUTPUT_FILE_NTFMV_TBL:%.elf=%.bin) + +################################################### +# Compile +################################################### + +$(OUTDIR_OBJ)/%.o:%.c + $(V)$(CC) $(CFLAGS) -o $@ -c $< + +$(OUTDIR_OBJ)/%.o:%.S + $(V)$(AS) $(ASFLAGS) -o $@ -c $< + + +.PHONY: clean +clean: + @rm -rf $(OUTDIR) diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/env.ini b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/env.ini new file mode 100644 index 00000000..2a07bc49 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/env.ini @@ -0,0 +1,9 @@ +_build_param="ECM_ENABLE=1 ECM_ERROR_ENABLE=1 ECC_ENABLE=1 \ +SW_VERSION_CHECK=1 \ +OPTEE_LOAD_ENABLE=1 \ +BL2_LOAD_ENABLE=1 \ +QNX_OS_LOAD_ENABLE=1 \ +STACK_PROTECT=1 \ +FORCE_115200=1 \ +SAN_ENABLE=1 \ +" diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/git.history b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/git.history new file mode 100644 index 00000000..74e90168 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/git.history @@ -0,0 +1,1339 @@ +commit 8e46e7350c40a7d1b5f129a78134e4a842b2a3f1 +Author: Yong-iL Joh +Date: Mon Sep 29 18:06:13 2025 +0900 + + (NGP-8150)(bin) update binaries + + - update smoni.srec with R-Car SDK v3.39.0 (bl31 is enabled) + - update u-boot for booting performance + + Signed-off-by: Yong-iL Joh + +commit 1a3f779aeab54bd87d1ac98edb1d70395a94dc36 +Author: Yong-iL Joh +Date: Fri Sep 26 20:18:52 2025 +0900 + + (NGP-8150) erase QSPI Flash before flashing + + Signed-off-by: Yong-iL Joh + +commit e370981c98f401f89445130b97d5127173e3ec14 +Author: Yong-iL Joh +Date: Thu Sep 18 14:50:10 2025 +0900 + + (NGP-8141) add PMIC_4QNA_wdt() to dummy_rtos + + Signed-off-by: Yong-iL Joh + +commit 9ebacc011fec5b2d39cb0d03eb5b035790d0041a +Author: Yong-iL Joh +Date: Wed Sep 17 11:39:17 2025 +0900 + + (NGP-8141) enable PMIC watchdog + + Signed-off-by: Yong-iL Joh + +commit e8b7b04d6e86cd15ec6942b5eebfdac180d790cd +Author: Yong-iL Joh +Date: Wed Sep 17 09:23:23 2025 +0900 + + (NGP-7991) change a greenhills license host + + Signed-off-by: Yong-iL Joh + +commit a0b3934786060fe639ba26e1cc16529fc1418199 +Author: Yong-iL Joh +Date: Wed Sep 17 09:13:59 2025 +0900 + + (NGP-8127) reenable GPIO pins for measuring booting + + Signed-off-by: Yong-iL Joh + +commit 85914e4cea58f521c1a6b9b05704414d742372c8 +Author: Yong-iL Joh +Date: Wed Sep 10 17:43:45 2025 +0900 + + (NGP-8116) add I2C_TEST=1 to otp_writer + + Signed-off-by: Yong-iL Joh + +commit 24dae6955612df65b0307e0ba67957f775b9b13e +Author: Yong-iL Joh +Date: Wed Sep 10 17:38:58 2025 +0900 + + (NGP-8116) enable PMIC I2C with CRC option + + Signed-off-by: Yong-iL Joh + +commit 82c28e34964d13acc6e0c594eccd9a5810c9e2a5 +Author: Yong-iL Joh +Date: Tue Sep 9 11:42:14 2025 +0900 + + (NGP-7991) add get_hex_input_u32() + + Signed-off-by: Yong-iL Joh + +commit 39ede6901967e286191d58a113728883527362e6 +Author: Yong-iL Joh +Date: Tue Sep 9 10:36:03 2025 +0900 + + (NGP-7991) add panic, ERROR() to flash_writer + + Signed-off-by: Yong-iL Joh + +commit 62d4ce1d2d08b1114b2958431e28f2f14d096406 +Author: Yong-iL Joh +Date: Tue Sep 2 16:40:26 2025 +0900 + + (NGP-7895) enable OTP program + + - add OTP, OTPL, OTPD, OTPM command + - add otp_downloady.py as helper + . to dump OTP memory, run otp_download.py + . to program OTP, modify opt.json and run otp_download.py -i otp + - add otp.json for OTP writer setting + - add bitmap2otp.py, otp.bitmap.json as helper + + Signed-off-by: Yong-iL Joh + +commit 5f45765fee4d3296eb3768797d373b6c3ab9b7df +Author: Yong-iL Joh +Date: Fri Aug 29 20:55:44 2025 +0900 + + (NGP-8057) add mem_dump() + + Signed-off-by: Yong-iL Joh + +commit e26f6988c4d289b8f0e1a7b4c11733420391615d +Author: Yong-iL Joh +Date: Thu Aug 28 18:53:16 2025 +0900 + + (NGP-8057) move MCU's address to 0x40100000 + + - adjust MPU setting + + Signed-off-by: Yong-iL Joh + +commit 55d2d2563397c02da638e0f379123201830897a6 +Author: Yong-iL Joh +Date: Thu Aug 28 18:52:20 2025 +0900 + + (NGP-7991) add scif1_hw_init() + + Signed-off-by: Yong-iL Joh + +commit 6be5b2acfc2c1670b3a080ed679afc73d8c3e7bd +Author: Yong-iL Joh +Date: Fri Aug 29 21:47:57 2025 +0900 + + (NGP-7991) remove ^M + + Signed-off-by: Yong-iL Joh + +commit 350ff96cdab01f6ea6f4df884a9f8245ad75e2e4 +Author: Yong-iL Joh +Date: Tue Aug 26 20:12:18 2025 +0900 + + (NGP-7895) rearrange code + + Signed-off-by: Yong-iL Joh + +commit 16c87b7b451a2821532a2e554b61a2a1cf075080 +Author: Yong-iL Joh +Date: Tue Aug 26 18:45:25 2025 +0900 + + (NGP-7895) add OTP program + + - added compile option 'EFUSE_OTP' + + Signed-off-by: Yong-iL Joh + +commit 77754a2f2e8c76b938e9834d17c40e0b15d51a22 +Author: Yong-iL Joh +Date: Mon Aug 25 17:12:00 2025 +0900 + + (NGP-7991)(bin) update binaries + + Signed-off-by: Yong-iL Joh + +commit 263b845fe033a4b5be981b0a74e0c7e483dd73e8 +Author: Yong-iL Joh +Date: Mon Aug 25 17:04:29 2025 +0900 + + (NGP-8057) add mcu_check + + - it's workaround for MCU boot failure issue + - u-boot will reset if 0x41DF.FFF4 == 0xFFFF.FFFF + + Signed-off-by: Yong-iL Joh + +commit 5acbd770e5c1cf78f68148068ad3dcf46d9e02b6 +Author: Yong-iL Joh +Date: Fri Aug 22 21:44:51 2025 +0900 + + (NGP-8057) add UART1 to Core1 when DEBUG + + Signed-off-by: Yong-iL Joh + +commit 2de6fb575de655afc32fdc8f103ca324288dbd9e +Author: Yong-iL Joh +Date: Fri Aug 22 14:22:41 2025 +0900 + + (NGP-8057) add clk_dump() to Dummy_RTOS + + Signed-off-by: Yong-iL Joh + +commit 55ab4c87eed216a6768e44018a9d611a9f9ae660 +Author: Yong-iL Joh +Date: Mon Aug 18 20:33:19 2025 +0900 + + (NGP-8057) remove RTOS_LOAD_NUM=3 + + - add 2nd_loader for wake up Core0,2 + - 2nd_loader configure MPU before jump (0xE2100000) + - relocate 2nd_loader to 0xE3200000 + + Signed-off-by: Yong-iL Joh + +commit ada466f7eb9f94bb69f17ce9aabbf6a2402a6448 +Author: Yong-iL Joh +Date: Mon Aug 18 18:44:48 2025 +0900 + + (NGP-8057) enable RTOS_LOAD_NUM=3 + + Signed-off-by: Yong-iL Joh + +commit 6fafc8f28dcd2d2003301391033b501613a2dbf6 +Author: Yong-iL Joh +Date: Mon Aug 18 09:30:47 2025 +0900 + + (NGP-7991) fix dummy_RTOS + + - enable printing of Core 0 + - support Multi-Core + - relocate eMMC's address + + Signed-off-by: Yong-iL Joh + +commit 8b3f6e643428d4a5ecef99507ed8dd610c604caa +Author: Yong-iL Joh +Date: Thu Aug 7 15:40:37 2025 +0900 + + (NGP-8046) modify flash_writer for PRK3 only + + - add xcs2 command for QSPI 8M erase + + Signed-off-by: Yong-iL Joh + +commit 8ac19fe8910a34d4e53c26f20098b8b2d27428d2 +Author: Yong-iL Joh +Date: Mon Aug 4 17:14:08 2025 +0900 + + (NGP-7544) add clk_dump() + + Signed-off-by: Yong-iL Joh + +commit 4d0efa629c32ef83d1f8512c8cac8f7bc9e9763a +Author: Yong-iL Joh +Date: Fri Aug 1 23:05:39 2025 +0900 + + (NGP-8028)(bin) update binaries + + Signed-off-by: Yong-iL Joh + +commit bf799a3eca1ad85e42a3c558257ce128e4c62e42 +Author: Yong-iL Joh +Date: Fri Aug 1 22:42:19 2025 +0900 + + (NGP-8028) pass _MODE31 as arg0 to arm-trusted-firmware + + Signed-off-by: Yong-iL Joh + +commit 5695361551b10aaf00956c449556f309f07363b0 +Author: Yong-iL Joh +Date: Fri Aug 1 10:10:38 2025 +0900 + + (ADASPRK3-1713) enable DRAM_SPLIT + + Signed-off-by: Yong-iL Joh + +commit c7dd735b6d0590b6bb1703ddf935ce1bdc7a6928 +Author: Yong-iL Joh +Date: Thu Jul 31 18:32:47 2025 +0900 + + (NGP-8028) move parameter from 0xEB22.xxxx to 0x41DF.xxxx + + Signed-off-by: Yong-iL Joh + +commit fab5ce933cfae4f15187b65bed0fdf245c250ae4 +Author: Yong-iL Joh +Date: Mon Jul 21 21:31:37 2025 +0900 + + (NGP-7881) add STRICT_AB_BOOTING + + - disabled for development + - remove NOTICE("Load finish.\n"); + + Signed-off-by: Yong-iL Joh + +commit e799630563654347322fb9e0c8a3b05219b2144b +Author: Yong-iL Joh +Date: Fri Jul 18 18:23:59 2025 +0900 + + (NGP-7989) move a/b info block from eMMC to QSPI + + - WARNING: before finishing cr52_loader, ca76_loader is running. + do not move export_mmc_drv_obj() to ip_release() of cr52_loader + + Signed-off-by: Yong-iL Joh + +commit a642e0cbdf518d44f5065d5b981412cdb9f974ce +Author: Yong-iL Joh +Date: Thu Jul 17 20:03:20 2025 +0900 + + (NGP-7989) add android_ab.c to icumx_loader + + Signed-off-by: Yong-iL Joh + +commit d2b3a2689de079e7c935da21de02f2e9ec655225 +Author: Yong-iL Joh +Date: Thu Jul 17 18:31:48 2025 +0900 + + (NGP-7992) add save_data_with_buf_qspi_flash() + + - copy codes from flash_writer + + Signed-off-by: Yong-iL Joh + +commit 6df6bd174f7776c7af12f6dc623d047a5b1b85c3 +Author: Yong-iL Joh +Date: Thu Jul 17 17:51:56 2025 +0900 + + (NGP-7881) add reset_code to icumx_loader + + Signed-off-by: Yong-iL Joh + +commit a830dc639c33f8877505d95299b8aceb3d561d34 +Author: Yong-iL Joh +Date: Wed Jul 16 17:30:04 2025 +0900 + + (NGP-7987) support QSPI partitioning + + Signed-off-by: Yong-iL Joh + +commit 267315f90437f4bc08e50bbbf85f11fa181b33d0 +Author: Yong-iL Joh +Date: Wed Jul 16 10:30:41 2025 +0900 + + (NGP-7988) move emmc_initialize() to before-load_image() + + - remove 2nd_cert_header's load + + Signed-off-by: Yong-iL Joh + +commit 6aec83dcdb45877e2d52e6edc3f34a6a46be9028 +Author: Yong-iL Joh +Date: Mon Jul 14 17:02:47 2025 +0900 + + Revert "(NGP-7881) set BUCK1_PHADD to 0x02" + + This reverts commit 1c419f3bdaba3e324daffb890de8130a926d844a. + +commit a7f2c5fbf0753befa19f093ee0f37b32bcaa9f9d +Author: Yong-iL Joh +Date: Thu Jul 10 14:05:36 2025 +0900 + + (NGP-7832) fix for partial update + + - WARNING! the following code should be set 1, later + + V4H_Cx_Loader/loader/loader_main.c:375 + secureboot_image(&li[RTOS_ID], 0); + + Signed-off-by: Yong-iL Joh + +commit ebd306cfcacb709c753f9503f745665268e4249a +Author: Yong-iL Joh +Date: Tue Jul 8 10:11:00 2025 +0900 + + (ADASPRK3-295) fix (wrong) error message + + - following error message is wrong + "E:Attempting slot , tries remaining 98" + + - fixed error message is + "E:Attempting slot 0, tries remaining 6" + + Signed-off-by: Yong-iL Joh + +commit 107b44338011f4785486f9cd776d2e6522114723 +Author: Yong-iL Joh +Date: Mon Jul 7 12:51:46 2025 +0900 + + (NGP-7945) add misc-a.srec + + Signed-off-by: Yong-iL Joh + +commit d939d0eb76b9994ea17d98d49c03ec4015fc34b1 +Author: Yong-iL Joh +Date: Mon Jul 7 12:08:08 2025 +0900 + + (NGP-7945)(bin) add misc-a.srec + + Signed-off-by: Yong-iL Joh + +commit 1c419f3bdaba3e324daffb890de8130a926d844a +Author: Yong-iL Joh +Date: Thu Jul 3 18:11:35 2025 +0900 + + (NGP-7881) set BUCK1_PHADD to 0x02 + + Signed-off-by: Yong-iL Joh + +commit 4853c93b2d7f98efb921eded97856b4724e6173f +Author: Yong-iL Joh +Date: Sun Jun 29 18:22:50 2025 +0900 + + (NGP-7923) update documents (v3.39.0) + + Signed-off-by: Yong-iL Joh + +commit d31a05effb3d81898fc3e21fd9d8026d03a544c5 +Author: Yong-iL Joh +Date: Sun Jun 29 16:11:29 2025 +0900 + + (NGP-7923) upgrade to v3.39.0 + + Signed-off-by: Yong-iL Joh + +commit 11f362b6f28e8cad7e36ff0d135e0155bb158920 +Author: Yong-iL Joh +Date: Wed Jun 25 12:02:52 2025 +0900 + + (NGP-7827) enable A/B selection booting + + Signed-off-by: Yong-iL Joh + +commit 31cde9e69ce12b20945fcbab40442a2614b9364b +Author: Yong-iL Joh +Date: Thu Jun 19 22:36:23 2025 +0900 + + (NGP-7832) do not verify 2nd_cert_header + + Signed-off-by: Yong-iL Joh + +commit 662ec04ea4b4e39fbed24a6bd8e822627cb64bf5 +Author: Yong-iL Joh +Date: Thu Jun 19 21:08:20 2025 +0900 + + (NGP-7832) add 2nd cert_header + + - add ifs-prk3-mobis.bin + + Signed-off-by: Yong-iL Joh + +commit b78cb34b7dc2cf6126427e82e4dc2af757d14fba +Author: Yong-iL Joh +Date: Thu Jun 19 14:32:35 2025 +0900 + + (NGP-7830) mv Flash_writer_DUMMY_CERT_PRK3.mot Flash_writer_PRK3.mot + + Signed-off-by: Yong-iL Joh + +commit 473f3dc5823886fe787ce15e0535195262ffdcb8 +Author: Yong-iL Joh +Date: Mon Jun 16 13:39:41 2025 +0900 + + (NGP-7867) fix issue of BL2 + + - move "load address" to 0x41D00000 + - remove emmc_dev_reset() + - use import_mmc_drv_obj() stead of skip emmc_initialize() + - align .bss.SHARED_TOP + - add MOBIS_PRK3 macro + + Signed-off-by: Yong-iL Joh + +commit d7a52732726769cb5572c358deca2da8624e5d37 +Author: Yong-iL Joh +Date: Wed Jun 11 18:41:18 2025 +0900 + + (NGP-7867) ca76-loader is BL2 + + - issue: secure boot is not working yet. + Dummy RTOS_2m Program + Dummy RTOS_2mWFI + E:R_ICUMIF_ServiceRequest:Error code = (0xfffffffd). + P:secureboot_service + + Signed-off-by: Yong-iL Joh + +commit c69b7db37d414359192d596bfea51d5f38873310 +Author: Yong-iL Joh +Date: Wed Jun 11 17:17:31 2025 +0900 + + (NGP-7867) ca76-loader run! + + Signed-off-by: Yong-iL Joh + +commit 36401d9d11be7e29a177ea33d5c4a275e11ffc9b +Author: Yong-iL Joh +Date: Wed Jun 11 15:02:16 2025 +0900 + + (NGP-7867) prepare space for ca76_loader + + Signed-off-by: Yong-iL Joh + +commit 707aee4d0e9df61ed97b3c22ab7bd14157e67e34 +Author: Yong-iL Joh +Date: Tue Jun 17 20:03:30 2025 +0900 + + (NGP-7867) remove ^M + + Signed-off-by: Yong-iL Joh + +commit e43e7472dac127a7ff50d85b2b65137232f71754 +Author: Yong-iL Joh +Date: Tue Jun 17 19:55:00 2025 +0900 + + Revert "(NGP-7802) add ifs-prk3-mobis.bin" + + This reverts commit 6b7a4d6e877821e3824e60db7e4b0e84046f61dc. + +commit 850ac6c0e94e838347cd466d7eb03a47206ccefd +Author: Yong-iL Joh +Date: Thu May 29 20:22:38 2025 +0900 + + (NGP-7856) change a size of dummy_rtos by SIZE=9 + + Signed-off-by: Yong-iL Joh + +commit cf23c26ebc8acd952fb32ab04ff3ac1eab7d9562 +Author: Yong-iL Joh +Date: Thu May 29 11:55:42 2025 +0900 + + (NGP-7856) apply R-Car_Multi-Core_Timestamping_Code v0.02 + + - remove all message when LOG_LEVEL=1 + + Signed-off-by: Yong-iL Joh + +commit 3660c91a3d7b779334fdbcd0e721d1ce7fafac5c +Author: Chulhyun Jeon +Date: Tue Jun 10 11:39:06 2025 +0900 + + [NGP-7731] Set V4H-SERDES_1V8_EN(GP1_23) to high + - In case of using hw crypto engine in OPTEE, + it has to be set to high before optee start + +commit 509317c02bbdc4add8a03f69b3e64623cad9a87e +Author: Yong-iL Joh +Date: Thu May 22 10:41:38 2025 +0900 + + (NGP-7715) change binaries + + Signed-off-by: Yong-iL Joh + +commit e60f3261ad6f46558828168bd0d0e4e51b551ebe +Author: Yong-iL Joh +Date: Thu May 22 10:02:44 2025 +0900 + + (NGP-7715) remove unused patches + + Signed-off-by: Yong-iL Joh + +commit a56b4d17aa229fe63fd6ee0de8e03e5a7aad647b +Author: Yong-iL Joh +Date: Wed May 21 19:46:58 2025 +0900 + + (NGP-7829) add gpio_N1505() for booting performance + + - add BOOT_TIME_CHECK build flag + + Signed-off-by: Yong-iL Joh + +commit 6b7a4d6e877821e3824e60db7e4b0e84046f61dc +Author: Yong-iL Joh +Date: Wed May 21 16:43:49 2025 +0900 + + (NGP-7802) add ifs-prk3-mobis.bin + + Signed-off-by: Yong-iL Joh + +commit c0103fe0f9712d918bbeeebbe8e26ee385ffe9fd +Author: Yong-iL Joh +Date: Thu May 15 14:32:19 2025 +0900 + + (NGP-7802) minor fix for secure boot. + + - correct wrong message + - correct wrong an entry of key_cert for tee-os + - reenable QSPI's 133MHz Quad read output + + Signed-off-by: Yong-iL Joh + +commit bfa31f409638a24641d36ab71f5cbaca0cf862d0 +Author: Yong-iL Joh +Date: Wed May 14 18:21:42 2025 +0900 + + (NGP-7802) change a build environment + + - flash_writer + - V4H_Cx_loader + + Signed-off-by: Yong-iL Joh + +commit a8c0a8a5d82f07f497ce7d6b399de74b44d434b2 +Author: Yong-iL Joh +Date: Mon May 12 18:38:54 2025 +0900 + + (NGP-7777) enable 0x1xx register + + Signed-off-by: Yong-iL Joh + +commit 13115153a5971536526c90136661394e38264f33 +Author: Yong-iL Joh +Date: Wed May 7 16:13:32 2025 +0900 + + (NGP-7777) implement "Sequence of Activation" + + (7) Initial Checks (refer to Table App.A.1) + + Signed-off-by: Yong-iL Joh + +commit 07eb13760251858beeff2e8d15655471968e6936 +Author: Yong-iL Joh +Date: Wed May 7 13:29:30 2025 +0900 + + (NGP-7777) implement "Sequence of Activation" + + (9) Send the first WDT messages + + Signed-off-by: Yong-iL Joh + +commit df035bccedb5019b62b42cef58769568c615db96 +Author: Yong-iL Joh +Date: Fri May 2 10:51:30 2025 +0900 + + (NGP-7777) implement "Sequence of Activation" + + (7) initial Checks at PMIC side + - PMIC_SM_27A: PRESET -> PRESETOUT Check + - PMIC_SM_27B: SINT Check + . enable i2c5_write() + - PMIC_SM_27C: EXT PINCHECK2 + - PMIC_SM_27D: CVM Test + - check_SoC_Activation() + + Signed-off-by: Yong-iL Joh + +commit d1789400827cbf99aacea7113687946354feaf96 +Author: Yong-iL Joh +Date: Wed Apr 30 09:39:57 2025 +0900 + + (NGP-7777) implement "Sequence of Activation" + + - (5) stop RWDT and System WDT + + Signed-off-by: Yong-iL Joh + +commit b48eda3e5d68e19e274bb7aa4bf78ded5a069906 +Author: Yong-iL Joh +Date: Tue Apr 29 14:58:44 2025 +0900 + + (NGP-7364) enable I2C5 for PMIC control + + - enable i2c5_read() + + Signed-off-by: Yong-iL Joh + +commit 5f1e623422f346262ba6f973480ea2f24eeefa79 +Author: Yong-iL Joh +Date: Tue Apr 22 15:37:28 2025 +0900 + + (NGP-7746) update documents + + Signed-off-by: Yong-iL Joh + +commit 5684c248e32711f244eb10e9c51bad708cd21315 +Author: Yong-iL Joh +Date: Tue Apr 22 15:35:20 2025 +0900 + + (NGP-7725) update Security Service Handler + + - update with rcar-xos_tool_icumxb_qnx_arm_1.0.5 + + Signed-off-by: Yong-iL Joh + +commit 78d9ed8ee542aa04d7e1de0838a5e6acf106dc7b +Author: Yong-iL Joh +Date: Mon Apr 21 14:12:32 2025 +0900 + + (NGP-7746) upgrade to v3.35.0 + + Signed-off-by: Yong-iL Joh + +commit 60918d1404d5e036fd6cccd54b1c923af6656ab0 +Author: Yong-iL Joh +Date: Mon Apr 21 08:25:35 2025 +0900 + + (NGP-7715) remove ^M + + Signed-off-by: Yong-iL Joh + +commit e4909a52097323736d9d28bd9f83876290419ac7 +Author: Yong-iL Joh +Date: Tue Apr 15 11:33:40 2025 +0900 + + (NGP-7717) add BUILD_PARAM to mk.sh + + Signed-off-by: Yong-iL Joh + +commit 62b10ca4693b2f66f4a4bfb3e5066c80ead4b942 +Author: Chulhyun Jeon +Date: Wed Apr 16 15:05:12 2025 +0900 + + [NGP-7731] Increase OPTEE destination size to 1MB + +commit e2dac8bd129eff938c69d290ba69af7078a8db50 +Author: Yong-iL Joh +Date: Fri Apr 11 11:28:32 2025 +0900 + + (NGP-7725) implement Security Service Handler + + - refer 6.2.4.2 of r11uz0237ej0153-cx-2nd-ipl.pdf + - copied from rcar-xos_tool_icumxb_linux_arm_1.0.3 + - set ICUM_SHAREDMEMORY_3_ADDR as 0xEB231000u + - set ICUM_SHAREDMEMORY_3_SIZE as 00xD000u + + Signed-off-by: Yong-iL Joh + +commit d97d583a69a2ebe534e11525c3af7dc840df47b1 +Author: Yong-iL Joh +Date: Thu Apr 10 16:17:46 2025 +0900 + + update binaries for 4th board + + Signed-off-by: Yong-iL Joh + +commit 4ab02720859313193a7f4662be62fadaf313c141 +Author: Yong-iL Joh +Date: Thu Apr 10 15:12:10 2025 +0900 + + add build date and time + + Signed-off-by: Yong-iL Joh + +commit 6d3e59c579c75c1e6a049c9d7c1bf5f1282a09fb +Author: Yong-iL Joh +Date: Thu Apr 10 14:57:57 2025 +0900 + + add -f option + + Signed-off-by: Yong-iL Joh + +commit 97bb4e3e7caf98fa2b27d4d07e1b5a6a93216625 +Author: Yong-iL Joh +Date: Wed Apr 9 18:08:57 2025 +0900 + + (NGP-7695) support 4th board + + Signed-off-by: Yong-iL Joh + +commit 0c316baf1f1ecc464e6a0dded7bb4adaa99ae837 +Author: Yong-iL Joh +Date: Wed Apr 9 15:37:40 2025 +0900 + + (NGP-7704) we could use flash_writer for rev3 and rev4 both + + Signed-off-by: Yong-iL Joh + +commit 49314f17bab5799eff7a024a957e8c735f415145 +Author: Yong-iL Joh +Date: Thu Apr 3 19:40:58 2025 +0900 + + add cr52_slg_v4h.srec for RTOS + + Signed-off-by: Yong-iL Joh + +commit ac5dee2ff581a0054504f17744724992ad0d7937 +Author: Yong-iL Joh +Date: Thu Apr 3 19:33:51 2025 +0900 + + remove log message + + Signed-off-by: Yong-iL Joh + +commit 8f35a1f88e87e75b5487dce75a3f8872340f65c9 +Author: Yong-iL Joh +Date: Wed Apr 2 17:13:20 2025 +0900 + + make EBIG buildable + + Signed-off-by: Yong-iL Joh + +commit 4c8769387567ae465683c9de1acee4ccba287667 +Author: Yong-iL Joh +Date: Wed Apr 2 16:06:47 2025 +0900 + + add EBIG from Encrypted_Boot_Image_Generator_Library_v1.0.0 + + Signed-off-by: Yong-iL Joh + +commit 368f4ceab5b2e2736f1f89a096238bf6c9530d10 +Author: Yong-iL Joh +Date: Tue Apr 1 17:33:27 2025 +0900 + + Revert "(V4X_Cx_Loader) read 16byte after MCU image load" + + This reverts commit 090d3eda27e0dd4f80b0ef271932a2f77279c125. + +commit 8c3be1e65bc061bd7fec50ec97c1c7ef26cd8dd3 +Author: Yong-iL Joh +Date: Thu Mar 20 15:41:26 2025 +0900 + + (NGP-6303) fix of writing bootblock via fastboot + + Signed-off-by: Yong-iL Joh + +commit cb212a4f9920a5bc435d4d6186ade10fedfad95c +Author: Yong-iL Joh +Date: Thu Mar 13 17:22:39 2025 +0900 + + update flash_writer for MX66U1G45G + + Signed-off-by: Yong-iL Joh + +commit 05d5d0492b8abd2cc94a3969b1f1454024a9840b +Author: Yong-iL Joh +Date: Thu Mar 13 17:13:33 2025 +0900 + + (NGP-7598) enable QE bit if it is not set + + - In MX66U1G45G case, + QE bit in status reg should be enable + for booting with 133MHz Quad read output + + Signed-off-by: Yong-iL Joh + +commit 999e38f06d6960121b9962f8908462fa2679bee3 +Author: Yong-iL Joh +Date: Wed Mar 12 14:08:52 2025 +0900 + + (NGP-7598) try to use macronix MX66U1G45G + + - it's booting with 80MHz Single Fast Read mode + + Signed-off-by: Yong-iL Joh + +commit 23dbd6faa499799dbcca20cfede34a003d31663c +Author: Yong-iL Joh +Date: Tue Apr 1 17:07:09 2025 +0900 + + update r_icumfw_V4H.srec for TRNG + + Signed-off-by: Yong-iL Joh + +commit deef08ded818bce91986ff2b29ff2e032cacb903 +Author: Yong-iL Joh +Date: Wed Mar 26 14:34:27 2025 +0900 + + (NGP-6933) apply 01_Release-package_2025-Feb/Gen4_ICUMX_Loader (v3.32.0) + + Signed-off-by: Yong-iL Joh + +commit 4a2966ff217ee76ec8cd9fdac1813630085b0389 +Author: Yong-iL Joh +Date: Wed Mar 26 14:19:59 2025 +0900 + + change file permission + + Signed-off-by: Yong-iL Joh + +commit 63595f67f3b08b43a44ad13dea3ba3431a05932b +Author: Yong-iL Joh +Date: Wed Mar 12 19:39:17 2025 +0900 + + (NGP-7604) update u-boot as eMMC partition changes + + Signed-off-by: Yong-iL Joh + +commit 02df861ee206c44251d8eca57eafb7788dff1310 +Author: Yong-iL Joh +Date: Wed Mar 12 19:38:49 2025 +0900 + + (NGP-7619) add smoni for safety + + Signed-off-by: Yong-iL Joh + +commit c077769964688aac99700d0e2283c24ed4f2fa8d +Author: Yong-iL Joh +Date: Thu Feb 20 16:09:54 2025 +0900 + + (NGP-7292) update binaries + + Signed-off-by: Yong-iL Joh + +commit f23cb26058eaf3ee5b5725f4e5eda7a622d67fb5 +Author: Yong-iL Joh +Date: Wed Feb 19 18:58:38 2025 +0900 + + (flash_write) fix erase function + + - set FLASH_SECTOR_SIZE to 64KB for PRK3 (256KB on EVB) + - add PRK3=1 + + Signed-off-by: Yong-iL Joh + +commit ebfc39e6ab91fde4e49dc45c32f493582eb6d6b8 +Author: Yong-iL Joh +Date: Fri Feb 14 13:12:44 2025 +0900 + + update icumx-ipl.pdf, cx-2nd-ipl.pdf + + Signed-off-by: Yong-iL Joh + +commit 090d3eda27e0dd4f80b0ef271932a2f77279c125 +Author: Yong-iL Joh +Date: Thu Feb 13 16:23:29 2025 +0900 + + (V4X_Cx_Loader) read 16byte after MCU image load + + - to check misalignment, + add -pedantic -fstrict-aliasing -Wcast-align=strict + + Signed-off-by: Yong-iL Joh + +commit f17147c6c67399aba060a62a4746642f88d6bcd3 +Author: Yong-iL Joh +Date: Wed Feb 12 18:54:47 2025 +0900 + + (flash write) workaround for bulk_erase + + Signed-off-by: Yong-iL Joh + +commit dfc58b1d8be9934ebc723c161bf5e3949d1f3269 +Author: Yong-iL Joh +Date: Mon Feb 10 19:13:19 2025 +0900 + + update cpu_on.c loader* + + Signed-off-by: Yong-iL Joh + +commit 97c902f57aedca0d822c859afe66b85de9a43349 +Author: Yong-iL Joh +Date: Mon Feb 10 16:13:17 2025 +0900 + + run CR-52 core 0 only + + Signed-off-by: Yong-iL Joh + +commit ab5febd9b61b8e0edb6e5c19bc849a1d7e579094 +Author: Yong-iL Joh +Date: Fri Feb 7 10:59:17 2025 +0900 + + change rh850 build environment due to wine update + + Signed-off-by: Yong-iL Joh + +commit 1badad83e6b84b557c139a032d46083d840b7ada +Author: Yong-iL Joh +Date: Thu Feb 6 18:09:05 2025 +0900 + + (NGP-7292) upgrade to v3.33.0 for V4H rev 3.0 + + Signed-off-by: Yong-iL Joh + +commit 4612d43e5d305d64cfe564398415eb7ffec51811 +Author: Yong-iL Joh +Date: Thu Feb 6 18:04:09 2025 +0900 + + (NGP-7292) upgrade to v3.24.0 + + Signed-off-by: Yong-iL Joh + +commit 56a51a668fea302522f544ce9792dd1ec6083e00 +Author: Yong-iL Joh +Date: Fri Jan 24 16:33:26 2025 +0900 + + (NGP-7219) update tee-os binary + + Signed-off-by: Yong-iL Joh + +commit 66ddec87a0530cbd0d04ba80c6b03e7748ab9a96 +Author: Yong-iL Joh +Date: Thu Jan 16 09:39:08 2025 +0900 + + (NGP-7119) u-boot binary update + + - MCU image flashing via u-boot's fastboot + + Signed-off-by: Yong-iL Joh + +commit 6eb9ff9c097e67a7fcfbaf238e862776ca6f2ac4 +Author: Yong-iL Joh +Date: Wed Jan 15 08:48:30 2025 +0900 + + (NGP-7361) update bl31,u-boot binary for android A/B update + + Signed-off-by: Yong-iL Joh + +commit 4f911501189dbc98f333e45c5a009f7eeea27032 +Author: Yong-iL Joh +Date: Mon Jan 6 17:56:37 2025 +0900 + + update dummy_rtos binary + + Signed-off-by: Yong-iL Joh + +commit 1302e0f4d473bf529f73f46664aac0c3677418b7 +Author: Yong-iL Joh +Date: Mon Jan 6 17:56:09 2025 +0900 + + add CR-52 Core selection code + + Signed-off-by: Yong-iL Joh + +commit f8f6d502a27723fbed37a606bf9bd73355590c3a +Author: Yong-iL Joh +Date: Mon Dec 30 11:34:25 2024 +0900 + + (NGP-7328) update cr52_loader binary + + Signed-off-by: Yong-iL Joh + +commit 1a94d24344e0c6395e4fcd42d6cd3ca0775d0d20 +Author: Yong-iL Joh +Date: Mon Dec 30 11:32:52 2024 +0900 + + (NGP-7328) set 0xE632.FFFF to 0xEB22.FFF4 when 2nd IPL is finished + + Signed-off-by: Yong-iL Joh + +commit f5b8794694fb9b2a17a440a8e255af2f2074ba4a +Author: Yong-iL Joh +Date: Thu Nov 28 18:55:17 2024 +0900 + + update binaries + + Signed-off-by: Yong-iL Joh + +commit 74cfa552a2038d7613ade23f639b9e50415fc31b +Author: Yong-iL Joh +Date: Thu Nov 28 18:53:43 2024 +0900 + + move the location of RTOS from 0x0 to 0x00500000 + + Signed-off-by: Yong-iL Joh + +commit d2a046cf26f683cb40141736914a35093bfa2263 +Author: Yong-iL Joh +Date: Wed Nov 20 18:18:36 2024 +0900 + + update icumx/cr52_loader + update u-boot (for 1G eth on debug board) + remove App_CAN_V4H_Sample.srec + + Signed-off-by: Yong-iL Joh + +commit 95b814afb4255cbc042c17c6431f1c5b6aba3a0c +Author: Yong-iL Joh +Date: Wed Nov 20 18:17:43 2024 +0900 + + make: more verbose + + Signed-off-by: Yong-iL Joh + +commit 8daba1f8bf1c4d9124852751cf1c2fe2943cfd9d +Author: Yong-iL Joh +Date: Wed Nov 20 18:06:08 2024 +0900 + + reduce RTOS size to 8MB + + - add pathes/0001-add-gpio_N1505.patch + + Signed-off-by: Yong-iL Joh + +commit 96b1038dc3e7dc0f708921861c25a6c83333ce26 +Author: Yong-iL Joh +Date: Tue Nov 19 16:05:28 2024 +0900 + + remove tweak for TEE-OS entry + + Signed-off-by: Yong-iL Joh + +commit 3f9fdc0700c11ad108b7d8ba98a89284a675a867 +Author: Yong-iL Joh +Date: Thu Nov 14 20:10:59 2024 +0900 + + add zephyr.srec + + - zephyr-OS's hello world demo + + Signed-off-by: Yong-iL Joh + +commit 5abbaf54d415daa72e5850f1e35abe4607c4ca70 +Author: Yong-iL Joh +Date: Thu Nov 14 19:57:56 2024 +0900 + + (NGP-7111) set SerialFlash speed to 133MHz + + - see R-Car V4H manual, 31.3.3.1 Flash Clock Parameter + - to check the register value described in 31.4.6.1, + apply patches/check_regs.diff + then the value of registers should be + + " + N:PRR is R-Car V4H Ver2.2 + N:CLKSELR 0x02 CMNCR 0x01555300 DRCR 0x001f0100 + N:DRCMR 0x006b0000 DRENR 0x0002c700 DRDMCR 0x00000007 DRDRENR 0x00000000 + N:PHYCNT 0x08078260 PHYOFFSET1 0x31511144 PHYINT 0x06060002 RPCCKCR 0x00000019 + N:Boot device is Serial Flash(0xc) + ... + " + + Signed-off-by: Yong-iL Joh + +commit 36e124492d16969f142511395b8e8a33e10b0997 +Author: Yong-iL Joh +Date: Mon Oct 14 16:39:54 2024 +0900 + + (NGP-6694) update u-boot-elf-prk3.srec + + - use mbr write instead of dpt write + + Signed-off-by: Yong-iL Joh + +commit 50e7b25d4278142f47d7463077e512e26d3eca7b +Author: Yong-iL Joh +Date: Mon Oct 14 16:35:21 2024 +0900 + + (NGP-6907) add loop_wfi + + Signed-off-by: Yong-iL Joh + +commit 39f3a0d9d7b2c368f9fefb857c4bfe17f0595829 +Author: Yong-iL Joh +Date: Mon Oct 7 11:25:33 2024 +0900 + + (NGP-6907) enable all CR-52 cores + + Signed-off-by: Yong-iL Joh + +commit d0c92556f943fd8437e9489a71809f5b08045b34 +Author: Yong-iL Joh +Date: Mon Oct 7 11:16:37 2024 +0900 + + remove log message when booting + + Signed-off-by: Yong-iL Joh + +commit 7660601eb85bcc77bb6824ebb6af9674a01e5035 +Author: Yong-iL Joh +Date: Mon Oct 7 11:15:05 2024 +0900 + + minor fix + + Signed-off-by: Yong-iL Joh + +commit 1056df0df2791ac5ab39264bfe7a18c39380de53 +Author: Yong-iL Joh +Date: Wed Sep 25 17:33:24 2024 +0900 + + (NGP-6879) enable 2nd board + + - enable HS400 + - enable eth0 device of debug board + + Signed-off-by: Yong-iL Joh + +commit b15bbf55fa2d044f904da5062ed05c11c08aba7b +Author: Yong-iL Joh +Date: Tue Jul 30 11:58:35 2024 +0900 + + set serial baudrate to 115200 bps + + Signed-off-by: Yong-iL Joh + +commit 50a0dbd828a94be930f2b9c41c8aa1c2dc74f762 +Author: Yong-iL Joh +Date: Mon Jul 29 10:57:16 2024 +0900 + + add qnx to qspi_downloader.py + + Signed-off-by: Yong-iL Joh + +commit 22f535a616da97b1327ef3f5720c1e79ba6cd70c +Author: Yong-iL Joh +Date: Thu Jul 25 09:35:23 2024 +0900 + + add ipl,emmc image set + + Signed-off-by: Yong-iL Joh + +commit a19b04a9bb17ad066ec2daddefef091a43feb164 +Author: Yong-iL Joh +Date: Thu Jul 25 08:57:51 2024 +0900 + + more detail about boot device + + Signed-off-by: Yong-iL Joh + +commit c36d4feea5cb25ad9bd8e8843c0a746d8df43afa +Author: Yong-iL Joh +Date: Fri Jul 19 00:07:24 2024 +0900 + + new binaries for PRK3 + + - cr52_loader as 2nd CX IPL + - ICUMX_Flash...mot as flash writer + - App_CAN_V4H_Sample as RTOS image + - u-boot-elf-prk3 for u-boot + - add Flash_Bootloader_PRK3.ttl for windows + + Signed-off-by: Yong-iL Joh + +commit e4aa744dcc6e3f40d21908546537206c110f4391 +Author: Yong-iL Joh +Date: Thu Jul 18 23:58:51 2024 +0900 + + modified downloader for PRK3 + + - because ModeBit is not working properly, + no wait for following messages via serial + + SCIF Download mode (w/o verification) + (C) Renesas Electronics Corp. + + -- Load Program to RT-SRAM --------------- + please send ! + + - the following message should be fixed + ... + N:PRR is R-Car V4H Ver2.2 + N:Boot device is unknown + ... + + Signed-off-by: Yong-iL Joh + +commit ccee7a07e176c58a1699e0fb959bcc78e4f2a6fa +Author: Yong-iL Joh +Date: Thu Jul 18 23:54:50 2024 +0900 + + modified V4H_Cx_Loader (2nd IPL) for PRK3 + + - replace DDR_init with flash_writer's code + - use HS200 instead of HS400 (to be fixed later) + + Signed-off-by: Yong-iL Joh + +commit 1413cd299680ff63e0d752f500f3958c48f4aad2 +Author: Yong-iL Joh +Date: Thu Jul 18 23:51:19 2024 +0900 + + modified flash_writer for PRK3 + + - add new DDR config + - add QSPI Flash (MT25QU01GB) + - fix for failure of QSPI access + + Signed-off-by: Yong-iL Joh + +commit 286f36f206ef65a30606d654e946c36cdeaa2345 +Author: Yong-iL Joh +Date: Thu Jul 18 22:14:13 2024 +0900 + + remove ^M + + Signed-off-by: Yong-iL Joh + +commit aa5c733cc352d1680f0f54f79980ce4170845d42 +Merge: 14bd244e b1a786eb +Author: 조용일( JOH YONG IL ) 차세대플랫폼팀 +Date: Mon Jul 8 14:09:54 2024 +0900 + + Pull request #2: (NGP-6421) enable GHS rh850 compiler + + Merge in ADAS_PRK3/lnx.ipl-v4h from NGP-6421_RH850 to master + + * commit 'b1a786eb64d00763c7a125208275222bd92ace1e': + (NGP-6421) enable GHS rh850 compiler + +commit b1a786eb64d00763c7a125208275222bd92ace1e +Author: Yong-iL Joh +Date: Fri Jul 5 15:07:14 2024 +0900 + + (NGP-6421) enable GHS rh850 compiler + + Signed-off-by: Yong-iL Joh + +commit 14bd244ecd27e4ba088d27e80984a94de08e09dd +Merge: 7ac3d77d 9d988632 +Author: 조용일( JOH YONG IL ) 차세대플랫폼셀 +Date: Thu May 23 11:35:28 2024 +0900 + + Pull request #1: NGP-6086 OPTEE OS + + Merge in ADAS_PRK3/lnx.ipl-v4h from NGP-6086_OPTEE-OS to master + + * commit '9d988632c7c560b1d3ed78005df8879d501fd05a': + (NGP-6086) add OPTEE-OS enabled images + add flash_writer from linux_bsp 3.24.0 + +commit 9d988632c7c560b1d3ed78005df8879d501fd05a +Author: Yong-iL Joh +Date: Thu May 23 10:21:32 2024 +0900 + + (NGP-6086) add OPTEE-OS enabled images + + Signed-off-by: Yong-iL Joh + +commit d7079c5fe3ffcf29cd46ed5c9a99be1abbea4c61 +Author: Yong-iL Joh +Date: Thu May 23 09:08:04 2024 +0900 + + add flash_writer from linux_bsp 3.24.0 + + Signed-off-by: Yong-iL Joh + +commit 7ac3d77dee29a00ad9e98e83ba57eec1411a6919 +Author: Yong-iL Joh +Date: Fri May 17 16:03:29 2024 +0900 + + add TEE-OS entry + + - some tweak for TEE-OS + + Signed-off-by: Yong-iL Joh + +commit 5c60670de9ed625dcf8c17bf6bcb4bcf3260661d +Author: Yong-iL Joh +Date: Fri May 17 16:02:22 2024 +0900 + + add gcc compiler binary + + Signed-off-by: Yong-iL Joh + +commit f5ac64f16dde602d0f38af188df4e5cc570142da +Author: Yong-iL Joh +Date: Tue May 14 13:42:50 2024 +0900 + + import argparse + + Signed-off-by: Yong-iL Joh + +commit 3a3bf5ebb8bff9b4f8bbcb0be19a188f7a4a1350 +Author: Yong-iL Joh +Date: Tue May 14 13:42:15 2024 +0900 + + serial downloader for whitehawk + + Signed-off-by: Yong-iL Joh + +commit 77b05f18770aa4eb329298685687e65ee7b19786 +Author: Yong-iL Joh +Date: Tue May 14 13:41:32 2024 +0900 + + init from v3.24.0 + + Signed-off-by: Yong-iL Joh diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/android_ab.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/android_ab.c new file mode 100644 index 00000000..dffa61fe --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/android_ab.c @@ -0,0 +1,309 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (C) 2017 The Android Open Source Project + */ +#include +#include +#include +#include +#include +#ifndef ENODATA +#define ENODATA 61 +#endif +#include + +#include +#include +#include +#include +#include +#include +typedef unsigned long int ulong; +typedef uint32_t u32; +#define typeof(x) __typeof__(x) +#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +#define QSPI_MISC_START (FLASH_BASE + 0x00740000U) +#define QSPI_AB_OFFSET (2048) +#define QSPI_AB_CONTROL (QSPI_MISC_START + QSPI_AB_OFFSET) +#define QSPI_AB_SIZE (1024U) + +#include +#undef DISK_BUFFER_ADDR +#define DISK_BUFFER_ADDR (BASE_RTSRAM_ADDR + (0x0002E000U)) // 0xEB22E000U +volatile uint8_t *_disk_buffer = 0; +#undef AB_INFO_FLAG_ADDR +#define AB_INFO_FLAG_ADDR (BASE_RTSRAM_ADDR + (0x0002FFFCU)) // 0xEB22FFFCU +#define TMP_BUFFER_ADDR (BASE_RTSRAM_ADDR + (0x0002D000U)) // 0xEB22D000U + +/** + * Compute the CRC-32 of the bootloader control struct. + * + * Only the bytes up to the crc32_le field are considered for the CRC-32 + * calculation. + * + * @param[in] abc bootloader control block + * + * @return crc32 sum + */ +static uint32_t ab_control_compute_crc(struct bootloader_control *abc) +{ + return crc32(0, (void *)abc, offsetof(typeof(*abc), crc32_le)); +} + +/** + * Initialize bootloader_control to the default value. + * + * It allows us to boot all slots in order from the first one. This value + * should be used when the bootloader message is corrupted, but not when + * a valid message indicates that all slots are unbootable. + * + * @param[in] abc bootloader control block + * + * @return 0 on success and a negative on error + */ +static int ab_control_default(struct bootloader_control *abc) +{ + int i; + const struct slot_metadata metadata = { + .priority = 15, + .tries_remaining = 7, + .successful_boot = 0, + .verity_corrupted = 0, + .reserved = 0 + }; + + if (!abc) + return -EFAULT; + + memcpy(abc->slot_suffix, "a\0\0\0", 4); + abc->magic = BOOT_CTRL_MAGIC; + abc->version = BOOT_CTRL_VERSION; + abc->nb_slot = NUM_SLOTS; + memset(abc->reserved0, 0, sizeof(abc->reserved0)); + for (i = 0; i < abc->nb_slot; ++i) + abc->slot_info[i] = metadata; + + memset(abc->reserved1, 0, sizeof(abc->reserved1)); + abc->crc32_le = ab_control_compute_crc(abc); + + return 0; +} + +/** + * Load the boot_control struct from disk into newly allocated memory. + * + * This function allocates and returns an integer number of disk blocks, + * based on the block size of the passed device to help performing a + * read-modify-write operation on the boot_control struct. + * The boot_control struct offset (2 KiB) must be a multiple of the device + * block size, for simplicity. + * + * @param[out] pointer to pointer to bootloader_control data + * @return 0 on success and a negative on error + */ +static int ab_control_create_from_disk(struct bootloader_control **abc) +{ + uint32_t phys_dst = remap_get_phys_addr(DISK_BUFFER_ADDR); // 0xEB22E000U + uint32_t phys_src = QSPI_AB_CONTROL; + uint32_t size = QSPI_AB_SIZE; + + /* Load content */ + dma_trans_start(phys_dst, phys_src, size); + + /* End loading */ + load_end(); + + *abc = (struct bootloader_control *)_disk_buffer; + return 0; +} + +/** + * Store the loaded boot_control block. + * + * Store back to the same location it was read from with + * ab_control_create_from_misc(). + * + * @return 0 on success and a negative on error + */ +static int ab_control_store(struct bootloader_control *abc) +{ + uint32_t phys_dst = QSPI_AB_CONTROL; + uint32_t phys_src = remap_get_phys_addr((uint32_t)abc); + uint32_t size = sizeof(struct bootloader_control); + + init_rpc_qspi_flash(); + qspi_flash_rw_init(); + NOTICE("we're storing bootloader control block.(%d)\n", size); + + phys_dst -= FLASH_BASE; + + /* Sector Erase */ + sector_erase_qspi_flash(phys_dst, phys_dst + 4096 - 1); + + clear_bp_qspi_flash(); + save_data_with_buf_qspi_flash(phys_src, phys_dst, size); + + /* set read mode, it's slower than before */ + init_rpc_qspi_flash_4fastread_ext_mode(); + return 0; +} + +/** + * Compare two slots. + * + * The function determines slot which is should we boot from among the two. + * + * @param[in] a The first bootable slot metadata + * @param[in] b The second bootable slot metadata + * @return Negative if the slot "a" is better, positive of the slot "b" is + * better or 0 if they are equally good. + */ +static int ab_compare_slots(const struct slot_metadata *a, + const struct slot_metadata *b) +{ + /* Higher priority is better */ + if (a->priority != b->priority) + return b->priority - a->priority; + + /* Higher successful_boot value is better, in case of same priority */ + if (a->successful_boot != b->successful_boot) + return b->successful_boot - a->successful_boot; + + /* Higher tries_remaining is better to ensure round-robin */ + if (a->tries_remaining != b->tries_remaining) + return b->tries_remaining - a->tries_remaining; + + return 0; +} + +int ab_select_slot(void) +{ + struct bootloader_control *abc = NULL; + u32 crc32_le; + int slot, i, ret; + bool store_needed = false; + char slot_suffix[4]; + // uint32_t ab_info_addr = remap_get_phys_addr(AB_INFO_FLAG_ADDR); // 0xEB22FFFCU + + _disk_buffer = (uint8_t *)(DISK_BUFFER_ADDR); // 0xEB22E000U + mem_write32(AB_INFO_FLAG_ADDR, AB_INFO_FLAG_INIT); + ret = ab_control_create_from_disk(&abc); + if (ret < 0) { + /* + * This condition represents an actual problem with the code or + * the board setup, like an invalid partition information. + * Signal a repair mode and do not try to boot from either slot. + */ + return ret; + } + + crc32_le = ab_control_compute_crc(abc); + if (abc->crc32_le != crc32_le) { + ERROR("Invalid CRC-32 (expected %.8x, found %.8x)," + "re-initializing A/B metadata.\n", crc32_le, abc->crc32_le); + + ret = ab_control_default(abc); + if (ret < 0) { + // free(abc); + return -ENODATA; + } + store_needed = true; + } + + if (abc->magic != BOOT_CTRL_MAGIC) { + ERROR("Unknown A/B metadata: %.8x\n", abc->magic); + // free(abc); + return -ENODATA; + } + + if (abc->version > BOOT_CTRL_VERSION) { + ERROR("Unsupported A/B metadata version: %.8x\n", abc->version); + // free(abc); + return -ENODATA; + } + + /* + * At this point a valid boot control metadata is stored in abc, + * followed by other reserved data in the same block. We select a with + * the higher priority slot that + * - is not marked as corrupted and + * - either has tries_remaining > 0 or successful_boot is true. + * If the selected slot has a false successful_boot, we also decrement + * the tries_remaining until it eventually becomes unbootable because + * tries_remaining reaches 0. This mechanism produces a bootloader + * induced rollback, typically right after a failed update. + */ + + /* Safety check: limit the number of slots. */ + if (abc->nb_slot > ARRAY_SIZE(abc->slot_info)) { + abc->nb_slot = ARRAY_SIZE(abc->slot_info); + NOTICE("[%s:%d] abc->nb_slot > ARRAY_SIZE(abc->slot_info)\n", __func__, __LINE__); + store_needed = true; + } + + slot = -1; + for (i = 0; i < abc->nb_slot; ++i) { + if (abc->slot_info[i].verity_corrupted || + !abc->slot_info[i].tries_remaining) { + NOTICE("unbootable slot %d tries: %d, corrupt: %d\n", + i, abc->slot_info[i].tries_remaining, + abc->slot_info[i].verity_corrupted); + continue; + } + NOTICE("bootable slot %d pri: %d, tries: %d, " + "corrupt: %d, successful: %d\n", + i, abc->slot_info[i].priority, + abc->slot_info[i].tries_remaining, + abc->slot_info[i].verity_corrupted, + abc->slot_info[i].successful_boot); + + if (slot < 0 || + ab_compare_slots(&abc->slot_info[i], + &abc->slot_info[slot]) < 0) { + slot = i; + } + } + + if (slot >= 0 && !abc->slot_info[slot].successful_boot) { + ERROR("Attempting slot %d, tries remaining %d\n", + slot, abc->slot_info[slot].tries_remaining); + abc->slot_info[slot].tries_remaining--; + store_needed = true; + } + + if (slot >= 0) { + /* + * Legacy user-space requires this field to be set in the BCB. + * Newer releases load this slot suffix from the command line + * or the device tree. + */ + memset(slot_suffix, 0, sizeof(slot_suffix)); + slot_suffix[0] = BOOT_SLOT_NAME(slot); + if (memcmp(abc->slot_suffix, slot_suffix, sizeof(slot_suffix))) { + NOTICE("slot_suffix is differ(%s:%s)\n", + abc->slot_suffix, slot_suffix); + memcpy(abc->slot_suffix, slot_suffix, sizeof(slot_suffix)); + store_needed = true; + } + } + + if (store_needed) { + abc->crc32_le = ab_control_compute_crc(abc); + ab_control_store(abc); + crc32_le = AB_INFO_FLAG_STORE; + } + else + crc32_le = AB_INFO_FLAG_OK; + // free(abc); + + if (slot == 1) + crc32_le |= AB_INFO_SELECT_2nd; + mem_write32(AB_INFO_FLAG_ADDR, crc32_le); + + if (slot < 0) + return -EINVAL; + + return slot; +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load.c new file mode 100644 index 00000000..afe9c629 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load.c @@ -0,0 +1,532 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load function + ******************************************************************************/ +/****************************************************************************** + * @file image_load.c + * - Version : 0.14 + * @brief Loading image driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Modify macro definition name. + * : 30.09.2021 0.03 Support of eMMC boot. + * : 15.10.2021 0.04 Fix a problem with overwriting the load area + * information in RTOS. + * modify Error log of check_load_area. + * Modify the process of outputting load + * information of Optionbyte to function. + * : 03.12.2021 0.05 Modify function "check_load_area" to check the + * boundary value of RT-VRAM(for virtual buffer). + * Fixed judgment of the top/end of the + * forwarding destination. + * : 06.01.2022 0.06 Support for two-stage boot of G4MH. + * : 23.05.2022 0.07 Support for updating the memory map. + * : 21.06.2022 0.08 Modify some function's arguments and add + * macros. + * : 05.08.2022 0.09 Add TFMV/NTFMV minimum version table + * information to load_init function. + * : 22.09.2022 0.10 Fix address range check for V4H. + * : 21.08.2023 0.11 Add support for V4M. + * : 15.01.2024 0.12 Add image_id initialization to load_init + * function. + * : 19.12.2024 0.13 Add RTOS#1, RTOS#2 image. + * : 26.05.2025 0.14 Change key cert address of [CA_OPTIONAL_ID+2]. + *****************************************************************************/ + +/* indelude */ +#include +#include +#include +#include +#include +#include +#include + +#if (RCAR_SA9_TYPE == FLASH_BOOT) +#include +#include +#elif (RCAR_SA9_TYPE == EMMC_BOOT) +#include +#include +#include +#endif + +#define KEY_SIZE_FLG_MSK (0x00000003U) +#define KEY_SIZE_4096 (0x00000002U) +#define KEY_SIZE_3072 (0x00000001U) +#define KEY_SIZE_2048 (0x00000000U) +#define WORD_TO_BYTE (4U) +#define ERROR_PARAM (0U) +#define NOT_OVERLAP_FLAG (0U) +#define OVERLAP_FLAG (1U) +#define RAM_RANGE_OK (0U) +#define RAM_RANGE_NG (1U) +#if (BOOT_MCU != 0U) +#define RAM_MAX (5U) +#else +#define RAM_MAX (4U) +#endif /* (BOOT_MCU != 0U) */ + +/* Load Parameter of Secure data */ +#define SRC_ADDR_OF_SECURE_DATA_FOR_ICUMXB (SRC_TOP + 0x00340000U) +#define DST_ADDR_OF_SECURE_DATA_FOR_ICUMXB (0xEB2E0000U) +#if (BOOT_MCU != 0U) +#define SRC_ADDR_OF_SECURE_DATA_FOR_ICUMH (SRC_TOP + 0x00440000U) +/* The destination address of Flash to RAM in the ICUMH Secure data is the top address of RT-VRAM. */ +#endif + +static void get_info_from_cert(uint32_t cert_addr, uint32_t *size, + uint32_t *dest_addr); +static void check_src_addr_range(uint32_t src, uint32_t len, uint32_t src_end); +static void check_dst_addr_range(uint32_t dst, uint32_t len, uint32_t dst_end); +static void check_overlap_images(uint32_t dst, uint32_t len, uint32_t dst_end); + +uint32_t load_content_cert(int slot) +{ + uint32_t load_num; +#if (RCAR_SA9_TYPE == FLASH_BOOT) + load_num = load_content_cert_for_flash(slot); +#elif (RCAR_SA9_TYPE == EMMC_BOOT) + load_num = load_content_cert_for_emmc(); +#else + /* NoProcess */ +#endif + return load_num; +} +/* End of function load_content_cert(void) */ + +void load_image(LOAD_INFO* li) +{ + /* log output of load image for information */ +#if (RCAR_SA9_TYPE == FLASH_BOOT) + load_image_info_print_for_flash(li); +#elif (RCAR_SA9_TYPE == EMMC_BOOT) + load_image_info_print_for_emmc(li); +#endif + /* Check transfer range of image. */ + check_load_area(li); + + /* Image load start. */ + load_start(li); +} +/* End of function load_image(LOAD_INFO* li) */ + +void load_init(LOAD_INFO* li, int slot) +{ + uint32_t loop; + uint32_t buf; + + const char *image_name[MAX_PLACED] = { + [SECURE_FW_ID] = "Secure FW", + [RTOS_ID] = "RTOS", + [CA_PROGRAM_ID] = "Cx IPL", + [ICUMH_PROGRAM_ID] = "ICUMH", + [G4MH_PROGRAM_ID] = "G4MH(1st)", + [G4MH_PROGRAM_ID + 1] = "G4MH(2nd)", + [CA_OPTIONAL_ID] = "CA Program #1", + [CA_OPTIONAL_ID + 1] = "CA Program #2", + [CA_OPTIONAL_ID + 2] = "CA Program #3", + [CA_OPTIONAL_ID + 3] = "CA Program #4", + [CA_OPTIONAL_ID + 4] = "CA Program #5", + [CA_OPTIONAL_ID + 5] = "CA Program #6", + [CA_OPTIONAL_ID + 6] = "CA Program #7", + [CA_OPTIONAL_ID + 7] = "CA Program #8", + [TFMV_MIN_VER_TBL_ID] = "TFMV minimum version table", + [NTFMV_MIN_VER_TBL_ID] = "NTFMV minimum version table", +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) + [RTOS1_ID] = "RTOS#1", + [RTOS2_ID] = "RTOS#2" +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + }; + + const uint32_t key_cert[MAX_PLACED] = { + [SECURE_FW_ID] = TFMV_KEY_CERT_ADDR, + [RTOS_ID] = TFMV_KEY_CERT_ADDR, + [CA_PROGRAM_ID] = TFMV_KEY_CERT_ADDR, + [ICUMH_PROGRAM_ID] = TFMV_KEY_CERT_ADDR, + [G4MH_PROGRAM_ID] = TFMV_KEY_CERT_ADDR, + [G4MH_PROGRAM_ID + 1] = TFMV_KEY_CERT_ADDR, + [CA_OPTIONAL_ID] = TFMV_KEY_CERT_ADDR, /* bl31 */ +#if (RCAR_LSI == RCAR_S4) + [CA_OPTIONAL_ID + 1] = TFMV_KEY_CERT_ADDR, +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + [CA_OPTIONAL_ID + 1] = NTFMV_KEY_CERT_ADDR, /* u-boot */ +#endif +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) + [CA_OPTIONAL_ID + 2] = NTFMV_KEY_CERT_ADDR, +#else + [CA_OPTIONAL_ID + 2] = TFMV_KEY_CERT_ADDR, /* tee-os */ +#endif +#if (BL2_LOAD_ENABLE == 0) + [CA_OPTIONAL_ID + 3] = NTFMV_KEY_CERT_ADDR, +#else + [CA_OPTIONAL_ID + 3] = TFMV_KEY_CERT_ADDR, /* ca76-loader */ +#endif + [CA_OPTIONAL_ID + 4] = NTFMV_KEY_CERT_ADDR, + [CA_OPTIONAL_ID + 5] = NTFMV_KEY_CERT_ADDR, + [CA_OPTIONAL_ID + 6] = NTFMV_KEY_CERT_ADDR, + [CA_OPTIONAL_ID + 7] = NTFMV_KEY_CERT_ADDR, + [TFMV_MIN_VER_TBL_ID] = TFMV_KEY_CERT_ADDR, + [NTFMV_MIN_VER_TBL_ID] = NTFMV_KEY_CERT_ADDR, +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) + [RTOS1_ID] = TFMV_KEY_CERT_ADDR, + [RTOS2_ID] = TFMV_KEY_CERT_ADDR +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + }; + + /* Set Load info parameter */ + for (loop = 0; loop < MAX_PLACED; loop++) + { + li[loop].name = image_name[loop]; + li[loop].key_cert_addr = key_cert[loop]; + li[loop].cnt_cert_addr = get_logic_cont_cert_addr(loop); + get_info_from_cert(li[loop].cnt_cert_addr, &li[loop].image_size, &li[loop].boot_addr); + buf = get_src_addr_offset_in_cert(loop); + li[loop].src_addr = (SRC_TOP + mem_read32(buf)); +#if (RCAR_SA9_TYPE == FLASH_BOOT) + li[loop].src_addr += (slot * CONTENT_CERT_2nd_OFFSET); +#endif + li[loop].image_id = loop; +#if (RCAR_SA9_TYPE == EMMC_BOOT) + buf = get_part_num_in_cert(loop); + li[loop].part_num = mem_read32(buf); +#endif + } +}/* End of function load_init(LOAD_INFO* li) */ + + +void check_load_area(const LOAD_INFO* li) +{ + uint32_t src; + uint32_t dst; + uint32_t len; + uint32_t src_end; + uint32_t dst_end; + + src = li->src_addr; + dst = li->boot_addr; + len = li->image_size; + + /* Check whether source is overflow. */ + check_overflow(src, len, &src_end, __func__); + + /* Check whether destination is overflow. */ + check_overflow(dst, len, &dst_end, __func__); + + /* Check source address range. */ + check_src_addr_range(src, len, src_end); + + /* Check destination address range. */ + check_dst_addr_range(dst, len, dst_end); + + /* Check whether overlap destination address and images that have been loaded. */ + check_overlap_images(dst, len, dst_end); +} +/* End of function check_load_area(const LOAD_INFO* li) */ + +static void get_info_from_cert(uint32_t cert_addr, uint32_t *size, + uint32_t *dest_addr) +{ + uint32_t val; + uint32_t certInfo1; + uint32_t pSize; + uint32_t pDestL; + + /* Get key length of content certificate. */ + val = mem_read32(cert_addr + CERT_INFO_FLG_OFFSET); + certInfo1 = (val >> KEY_SIZE_BIT_SHIFT) & KEY_SIZE_FLG_MSK; + + /* Get the transfer address and transfer size from + the certificate in accordance with the key length. */ + if (KEY_SIZE_4096 == certInfo1) /* key size = 4096 */ + { + pSize = cert_addr + CERT_INFO_SIZE_OFFSET2; + *size = mem_read32(pSize) * WORD_TO_BYTE; + pDestL = cert_addr + CERT_INFO_DST_OFFSET2; + *dest_addr = mem_read32(pDestL); + } + else if (KEY_SIZE_3072 == certInfo1) /* key size = 3072 */ + { + pSize = cert_addr + CERT_INFO_SIZE_OFFSET1; + *size = mem_read32(pSize) * WORD_TO_BYTE; + pDestL = cert_addr + CERT_INFO_DST_OFFSET1; + *dest_addr = mem_read32(pDestL); + } + else if (KEY_SIZE_2048 == certInfo1) /* key size = 2048 */ + { + pSize = cert_addr + CERT_INFO_SIZE_OFFSET; + *size = mem_read32(pSize) * WORD_TO_BYTE; + pDestL = cert_addr + CERT_INFO_DST_OFFSET; + *dest_addr = mem_read32(pDestL); + } + else + { + *size = ERROR_PARAM; + *dest_addr = ERROR_PARAM; + } +} +/* End of function get_info_from_cert(uint32_t cert_addr, uint32_t *size, uint32_t *dest_addr) */ + +void load_start(const LOAD_INFO* li) +{ +#if (RCAR_SA9_TYPE == FLASH_BOOT) + dma_trans_start(li->boot_addr, li->src_addr, li->image_size); +#elif (RCAR_SA9_TYPE == EMMC_BOOT) + uint32_t rtn_val; + uint32_t sector_count; + uint32_t fraction; + + /* Converted to number of sectors transferred. */ + sector_count = li->image_size >> EMMC_SECTOR_SIZE_SHIFT; + fraction = li->image_size % EMMC_SECTOR_SIZE; + /* Add 1 if there is a fraction */ + if(0U != fraction) + { + sector_count += 1U; + } + + rtn_val = emmc_trans_data(li->part_num, (li->src_addr >> EMMC_SECTOR_SIZE_SHIFT), + li->boot_addr, sector_count); + + if(EMMC_DEV_OK != rtn_val) + { + ERROR("load_start(emmc_trans_data error).\r\n"); + panic; + } +#else + /* NoProcess */ +#endif +}/* End of function load_start(LOAD_INFO* li) */ + +void load_end(void) +{ +#if (RCAR_SA9_TYPE == FLASH_BOOT) + dma_trans_end_check(); +#else + /* NoProcess */ +#endif +}/* End of function load_end(void) */ + +void load_securedata(uint32_t target_id) +{ + LOAD_INFO tmp_li; + + if(target_id == SECURE_FW_ID) /* When secure data transfer for ICUMXB FW. */ + { + tmp_li.image_size = SECUREDATA_SIZE; + tmp_li.src_addr = SRC_ADDR_OF_SECURE_DATA_FOR_ICUMXB; + tmp_li.boot_addr = DST_ADDR_OF_SECURE_DATA_FOR_ICUMXB; +#if (RCAR_SA9_TYPE == EMMC_BOOT) + tmp_li.part_num = EMMC_PARTITION_1; +#endif + } +#if (BOOT_MCU != 0U) + else if(target_id == ICUMH_PROGRAM_ID) /* When secure data transfer for ICUMH FW. */ + { + tmp_li.image_size = SECUREDATA_SIZE; + tmp_li.src_addr = SRC_ADDR_OF_SECURE_DATA_FOR_ICUMH; + tmp_li.boot_addr = RTVRAM_BASE; +#if (RCAR_SA9_TYPE == EMMC_BOOT) + tmp_li.part_num = EMMC_PARTITION_1; +#endif + } +#endif + else + { + ERROR("Failed input parameter.\n"); + panic; + } + + load_start(&tmp_li); +}/* End of function load_securedata(uint32_t target_id) */ + +void check_overflow(uint32_t addr, uint32_t len, uint32_t *end_addr, const char *func_name) +{ + /* Pre confirmation */ + if (addr > (UINT32_MAX - len)) + { + ERROR("1:overflow is occurred in %s.\n", func_name); + ERROR("1:address = 0x%x size = 0x%x\n", addr, len); + panic; + } + else + { + *end_addr = addr + len - 1U; + } + /* Post confirmation */ + if (*end_addr < addr) + { + ERROR("2:overflow is occurred in %s.\n", func_name); + ERROR("2:address = 0x%x size = 0x%x\n", addr, len); + panic; + } +} +/* End of function check_overflow(uint32_t addr, uint32_t len, uint32_t *end_addr, char *func_name) */ + +static void check_src_addr_range(uint32_t src, uint32_t len, uint32_t src_end) +{ + + /* Check image size */ + if (len == 0U) + { + ERROR("image size error\n"); + panic; + } + +#if (RCAR_SA9_TYPE == FLASH_BOOT) + if ((src < SRC_TOP) || (SRC_END < src_end)) +#elif (RCAR_SA9_TYPE == EMMC_BOOT) + if (SRC_END < src_end) +#endif + { + ERROR("check load area (source address)\n"); + ERROR("source address = 0x%x image size = 0x%x\n", src, len); + panic; + } +} +/* End of function check_src_addr_range(uint32_t src, uint32_t len, uint32_t src_end) */ + +static void check_dst_addr_range(uint32_t dst, uint32_t len, uint32_t dst_end) +{ + uint32_t rge_chk_flg; + uint32_t loop; + + /* The memory range of destination. */ + const ADDRESS_RANGE add_list[RAM_MAX] = { + [TARGET_MEM_DRAM] = {DRAM_BASE, DRAM_END}, + [TARGET_MEM_RTSRAM] = {RTSRAM_BASE, RTSRAM_END}, + [TARGET_MEM_RTVRAM] = {RTVRAM_VBUF_TOP, RTVRAM_VBUF_END}, + [TARGET_MEM_SYSRAM] = {SYSRAM_BASE, SYSRAM_END}, +#if (BOOT_MCU != 0U) + [TARGET_MEM_CODESRAM] = {CODESRAM_BASE, CODESRAM_END} +#endif /* (BOOT_MCU != 0U) */ + }; + + /* Check image size */ + if (len == 0U) + { + ERROR("image size error\n"); + panic; + } + + rge_chk_flg = RAM_RANGE_NG; + + for(loop = 0; loop < RAM_MAX; loop++) + { + if (add_list[loop].topadd <= dst) + { + if(dst_end <= add_list[loop].endadd) + { + rge_chk_flg = RAM_RANGE_OK; + break; + } + } + } + + if(rge_chk_flg != RAM_RANGE_OK) + { + ERROR("check load area (destination address)\n"); + ERROR("destination address = 0x%x image size = 0x%x\n", dst, len); + panic; + } +} +/* End of function check_dst_addr_range(uint32_t dst, uint32_t len, uint32_t dst_end) */ + +static void check_overlap_images(uint32_t dst, uint32_t len, uint32_t dst_end) +{ + uint32_t overlap; + uint32_t loop; + + static uint32_t s_num = 1U; + + static ADDRESS_RANGE s_placed_image[MAX_PLACED + 1] = { + [0] = {IPL_TOP, IPL_END}, + [1] = {0U,0U}, + [2] = {0U,0U}, + [3] = {0U,0U}, + [4] = {0U,0U}, + [5] = {0U,0U}, + [6] = {0U,0U}, + [7] = {0U,0U}, + [8] = {0U,0U}, + [9] = {0U,0U}, + [10] = {0U,0U}, + [11] = {0U,0U}, + [12] = {0U,0U}, + [13] = {0U,0U}, + [14] = {0U,0U}, + [15] = {0U,0U}, + [16] = {0U,0U} + }; + + overlap = NOT_OVERLAP_FLAG; + loop = 0U; + do + { + /* check overlap */ + if ((dst >= s_placed_image[loop].topadd) && (dst <= s_placed_image[loop].endadd)) + { + overlap = OVERLAP_FLAG; + } + else if ((dst_end >= s_placed_image[loop].topadd) && (dst_end <= s_placed_image[loop].endadd)) + { + overlap = OVERLAP_FLAG; + } + else if ((dst < s_placed_image[loop].topadd) && (s_placed_image[loop].endadd < dst_end)) + { + overlap = OVERLAP_FLAG; + } + else + { + loop++; + } + } while ((loop < s_num) && (overlap == NOT_OVERLAP_FLAG)); + + /* Check the overlap flag. * + * Parameters are error if overwrite occurred. * + * Otherwise, add parameters of the image to be loaded into Placed_image. */ + if (overlap == NOT_OVERLAP_FLAG) + { + s_placed_image[s_num].topadd = dst; + s_placed_image[s_num].endadd = dst_end; + INFO("[0x%x] topadd = 0x%x endadd = 0x%x\n", s_num, + s_placed_image[s_num].topadd, s_placed_image[s_num].endadd); + s_num++; + } + else + { + ERROR("check load area (overlap)\n"); + ERROR("destination address = 0x%x image size = 0x%x\n", dst, len); + ERROR("overlapped image is [%x]\n", loop); + ERROR("top address = 0x%x end address = 0x%x\n", + s_placed_image[loop].topadd, s_placed_image[loop].endadd); + panic; + } +} +/* End of function check_overlap_images(uint32_t dst, uint32_t len, uint32_t dst_end) */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_emmc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load_emmc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_emmc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load_emmc.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load_flash.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load_flash.c new file mode 100644 index 00000000..2fa46bcd --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/image_load/image_load_flash.c @@ -0,0 +1,180 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load for Flash function + ******************************************************************************/ +/****************************************************************************** + * @file image_load_flash.c + * - Version : 0.04 + * @brief Image load for Flash function. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 30.09.2021 0.01 First Release + * : 23.05.2022 0.02 Support for updating the memory map. + * : 05.08.2022 0.03 Add load_ver_tbl_cert_for_flash function. + * : 20.12.2024 0.04 Add support for booting CR52 3 cores. + *****************************************************************************/ + +/* indelude */ +#include +#include +#include +#include +#include +#include +#include "image_load.h" + +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +static void load_rtos12_cert_for_flash(void); +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +static void load_ver_tbl_cert_for_flash(int slot); + +uint32_t load_content_cert_for_flash(int slot) +{ + uint32_t load_num; + uint32_t phys_dst; + uint32_t phys_src; + uint32_t size; + + /* source address.(0x08240000) */ + phys_src = FLASH_CONTENT_CERT_ADDR + (slot * CONTENT_CERT_2nd_OFFSET); + /* Get physical address of transfer destination. */ + phys_dst = remap_get_phys_addr(SA9_DEST_ADDR); + /* transfer size */ + size = CONTENT_CERT_INFO_SIZE; + /* Load content cert header */ + dma_trans_start(phys_dst, phys_src, size); + + NOTICE( + "======== content cert info ========\n" + "destination address:0x%08x\n" + "physical destination address:0x%08x\n" + "source address:0x%08x\n" + "size:0x%08x\n", SA9_DEST_ADDR, phys_dst, phys_src, size); + + + /* End loading cert header */ + load_end(); + + load_num = mem_read32(SA9_DEST_ADDR); + + + /* Check number of image load. + In case of number of image load is 0, error of transfer parameter. + In case of number of image loads is higher than 8, + the transfer parameter error. */ + if ((load_num == 0U) || (load_num > CA_MAX_IMAGE)) + { + ERROR("Content cert info 'load image num' fault.\n"); + ERROR("load image num = %d\n",load_num); + panic; + } + + /* Increase forwarding address by the size of cert header */ + phys_src += CONTENT_CERT_INFO_SIZE; + phys_dst += CONTENT_CERT_INFO_SIZE; + + /* Transfer size calculation for SA9 * + * TFMV key + NTFMV key + TFMV/NTFMV minimum version table + (content cert * number of loads) */ + size = ((KEY_CERT_SIZE * 2U) + MIN_VER_TBL_SIZE + + ((NUM_OF_ALWAYS_LOAD_CERT + load_num) * CONTENT_CERT_SIZE)); + + /* Load SA9. */ + dma_trans_start(phys_dst, phys_src, size); + + /* End loading content cert */ + load_end(); + + NOTICE("======== content of SA9 ========\n" + "address:0x%08x size:0x%08x\n", phys_dst, size); + + /* Load content cert of Software minimum version table */ + load_ver_tbl_cert_for_flash(slot); + +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) + /* Load content cert of RTOS#1 and RTOS#2 */ + load_rtos12_cert_for_flash(); +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + + return load_num; +} +/* End of function load_content_cert_for_flash(void) */ + +static void load_ver_tbl_cert_for_flash(int slot) +{ +#if (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) + uint32_t phys_dst; + uint32_t phys_src; + uint32_t size; + + /* Source address.(0x0824D000) */ + phys_src = FLASH_VER_TBL_CNT_CERT_ADDR + (slot * CONTENT_CERT_2nd_OFFSET); + /* Get physical address of transfer destination. */ + phys_dst = remap_get_phys_addr(SA9_DEST_ADDR + VER_TBL_CNT_CERT_OFFSET); + /* transfer size */ + size = CONTENT_CERT_SIZE * 2U; + + /* Load content cert of Software minimum version table. */ + dma_trans_start(phys_dst, phys_src, size); + + /* End loading content cert */ + load_end(); + + NOTICE("======== content cert of SW version table ========\n" + "address:0x%08x size:0x%08x\n", phys_dst, size); + +#endif /* (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) */ +} +/* End of function load_ver_tbl_cert_for_flash(void) */ + +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +static void load_rtos12_cert_for_flash(void) +{ + uint32_t phys_dst; + uint32_t phys_src; + uint32_t size; + + /* Source address.(0x0824E000) */ + phys_src = FLASH_RTOS12_CNT_CERT_ADDR; + /* Get physical address of transfer destination. */ + phys_dst = remap_get_phys_addr(SA9_DEST_ADDR + RTOS12_CNT_CERT_OFFSET); + /* transfer size */ + size = CONTENT_CERT_SIZE * 2U; /* RTOS#1 and RTOS#2 */ + + /* Load content cert of Software minimum version table. */ + dma_trans_start(phys_dst, phys_src, size); + + /* End loading content cert */ + load_end(); + + NOTICE("======== content cert of RTOS#1 and RTOS#2 ========\n" + "address:0x%08x size:0x%08x\n", phys_dst, size); + +} +/* End of function load_rtos12_cert_for_flash(void) */ +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/access_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/access_protection.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/access_protection.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/access_protection.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/android_ab.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/android_ab.h new file mode 100644 index 00000000..36b7af83 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/android_ab.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* + * Copyright (C) 2017 The Android Open Source Project + */ + +#ifndef __ANDROID_AB_H +#define __ANDROID_AB_H + +// struct blk_desc; +// struct disk_partition; + +/* Android standard boot slot names are 'a', 'b', 'c', ... */ +#define BOOT_SLOT_NAME(slot_num) ('a' + (slot_num)) + +/* Number of slots */ +#define NUM_SLOTS 2 + +/* CX_EMMC_AB_CONTROL from icumx_IPL */ +#define DISK_BUFFER__IPL (0xEB22E000U) +#define DISK_BUFFER_ADDR (0x41DFE000U) + +/* pass ab info from Cx_IPL to BL2 */ +#define AB_INFO_FLAG__IPL (0xEB22FFFCU) +#define AB_INFO_FLAG_ADDR (0x41DFFFFCU) +#define AB_INFO_FLAG_INIT (0xDEADBEEFU) +#define AB_INFO_SELECT_1st (0x00000000U) +#define AB_INFO_SELECT_2nd (0x10000000U) +#define AB_INFO_FLAG_STORE (0x0BADF00DU) +#define AB_INFO_FLAG_OK (0x00FACADEU) + +/** + * Select the slot where to boot from. + * + * On Android devices with more than one boot slot (multiple copies of the + * kernel and system images) selects which slot should be used to boot from and + * registers the boot attempt. This is used in by the new A/B update model where + * one slot is updated in the background while running from the other slot. If + * the selected slot did not successfully boot in the past, a boot attempt is + * registered before returning from this function so it isn't selected + * indefinitely. + * + * @param[in] dev_desc Place to store the device description pointer + * @param[in] part_info Place to store the partition information + * @return The slot number (>= 0) on success, or a negative on error + */ +int ab_select_slot( + // struct blk_desc *dev_desc, struct disk_partition *part_info + void +); + +#endif /* __ANDROID_AB_H */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/android_bootloader_message.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/android_bootloader_message.h new file mode 100644 index 00000000..286d7ab0 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/android_bootloader_message.h @@ -0,0 +1,256 @@ +/* + * This is from the Android Project, + * Repository: https://android.googlesource.com/platform/bootable/recovery + * File: bootloader_message/include/bootloader_message/bootloader_message.h + * Commit: See U-Boot commit description + * + * Copyright (C) 2008 The Android Open Source Project + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __ANDROID_BOOTLOADER_MESSAGE_H +#define __ANDROID_BOOTLOADER_MESSAGE_H + +#ifndef __UBOOT__ +#include +#include +#include +#else +/* compiler.h defines the types that otherwise are included from stdint.h and + * stddef.h + */ +#include +#endif + +// Spaces used by misc partition are as below: +// 0 - 2K For bootloader_message +// 2K - 16K Used by Vendor's bootloader (the 2K - 4K range may be optionally used +// as bootloader_message_ab struct) +// 16K - 64K Used by uncrypt and recovery to store wipe_package for A/B devices +// Note that these offsets are admitted by bootloader,recovery and uncrypt, so they +// are not configurable without changing all of them. +static const size_t BOOTLOADER_MESSAGE_OFFSET_IN_MISC = 0; +static const size_t WIPE_PACKAGE_OFFSET_IN_MISC = 16 * 1024; + +/* Bootloader Message (2-KiB) + * + * This structure describes the content of a block in flash + * that is used for recovery and the bootloader to talk to + * each other. + * + * The command field is updated by linux when it wants to + * reboot into recovery or to update radio or bootloader firmware. + * It is also updated by the bootloader when firmware update + * is complete (to boot into recovery for any final cleanup) + * + * The status field was used by the bootloader after the completion + * of an "update-radio" or "update-hboot" command, which has been + * deprecated since Froyo. + * + * The recovery field is only written by linux and used + * for the system to send a message to recovery or the + * other way around. + * + * The stage field is written by packages which restart themselves + * multiple times, so that the UI can reflect which invocation of the + * package it is. If the value is of the format "#/#" (eg, "1/3"), + * the UI will add a simple indicator of that status. + * + * We used to have slot_suffix field for A/B boot control metadata in + * this struct, which gets unintentionally cleared by recovery or + * uncrypt. Move it into struct bootloader_message_ab to avoid the + * issue. + */ +struct bootloader_message { + char command[32]; + char status[32]; + char recovery[768]; + + // The 'recovery' field used to be 1024 bytes. It has only ever + // been used to store the recovery command line, so 768 bytes + // should be plenty. We carve off the last 256 bytes to store the + // stage string (for multistage packages) and possible future + // expansion. + char stage[32]; + + // The 'reserved' field used to be 224 bytes when it was initially + // carved off from the 1024-byte recovery field. Bump it up to + // 1184-byte so that the entire bootloader_message struct rounds up + // to 2048-byte. + char reserved[1184]; +}; + +/** + * We must be cautious when changing the bootloader_message struct size, + * because A/B-specific fields may end up with different offsets. + */ +#ifndef __UBOOT__ +#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus) +static_assert(sizeof(struct bootloader_message) == 2048, + "struct bootloader_message size changes, which may break A/B devices"); +#endif +#endif /* __UBOOT__ */ + +/** + * The A/B-specific bootloader message structure (4-KiB). + * + * We separate A/B boot control metadata from the regular bootloader + * message struct and keep it here. Everything that's A/B-specific + * stays after struct bootloader_message, which should be managed by + * the A/B-bootloader or boot control HAL. + * + * The slot_suffix field is used for A/B implementations where the + * bootloader does not set the androidboot.ro.boot.slot_suffix kernel + * commandline parameter. This is used by fs_mgr to mount /system and + * other partitions with the slotselect flag set in fstab. A/B + * implementations are free to use all 32 bytes and may store private + * data past the first NUL-byte in this field. It is encouraged, but + * not mandatory, to use 'struct bootloader_control' described below. + * + * The update_channel field is used to store the Omaha update channel + * if update_engine is compiled with Omaha support. + */ +struct bootloader_message_ab { + struct bootloader_message message; + char slot_suffix[32]; + char update_channel[128]; + + // Round up the entire struct to 4096-byte. + char reserved[1888]; +}; + +/** + * Be cautious about the struct size change, in case we put anything post + * bootloader_message_ab struct (b/29159185). + */ +#ifndef __UBOOT__ +#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus) +static_assert(sizeof(struct bootloader_message_ab) == 4096, + "struct bootloader_message_ab size changes"); +#endif +#endif /* __UBOOT__ */ + +#define BOOT_CTRL_MAGIC 0x42414342 /* Bootloader Control AB */ +#define BOOT_CTRL_VERSION 1 + +struct slot_metadata { + // Slot priority with 15 meaning highest priority, 1 lowest + // priority and 0 the slot is unbootable. + uint8_t priority : 4; + // Number of times left attempting to boot this slot. + uint8_t tries_remaining : 3; + // 1 if this slot has booted successfully, 0 otherwise. + uint8_t successful_boot : 1; + // 1 if this slot is corrupted from a dm-verity corruption, 0 + // otherwise. + uint8_t verity_corrupted : 1; + // Reserved for further use. + uint8_t reserved : 7; +} __attribute__((packed)); + +/* Bootloader Control AB + * + * This struct can be used to manage A/B metadata. It is designed to + * be put in the 'slot_suffix' field of the 'bootloader_message' + * structure described above. It is encouraged to use the + * 'bootloader_control' structure to store the A/B metadata, but not + * mandatory. + */ +struct bootloader_control { + // NUL terminated active slot suffix. + char slot_suffix[4]; + // Bootloader Control AB magic number (see BOOT_CTRL_MAGIC). + uint32_t magic; + // Version of struct being used (see BOOT_CTRL_VERSION). + uint8_t version; + // Number of slots being managed. + uint8_t nb_slot : 3; + // Number of times left attempting to boot recovery. + uint8_t recovery_tries_remaining : 3; + // Ensure 4-bytes alignment for slot_info field. + uint8_t reserved0[2]; + // Per-slot information. Up to 4 slots. + struct slot_metadata slot_info[4]; + // Reserved for further use. + uint8_t reserved1[8]; + // CRC32 of all 28 bytes preceding this field (little endian + // format). + uint32_t crc32_le; +} __attribute__((packed)); + +#ifndef __UBOOT__ +#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus) +static_assert(sizeof(struct bootloader_control) == + sizeof(((struct bootloader_message_ab *)0)->slot_suffix), + "struct bootloader_control has wrong size"); +#endif +#endif /* __UBOOT__ */ + +#ifndef __UBOOT__ +#ifdef __cplusplus + +#include +#include + +// Return the block device name for the bootloader message partition and waits +// for the device for up to 10 seconds. In case of error returns the empty +// string. +std::string get_bootloader_message_blk_device(std::string* err); + +// Read bootloader message into boot. Error message will be set in err. +bool read_bootloader_message(bootloader_message* boot, std::string* err); + +// Read bootloader message from the specified misc device into boot. +bool read_bootloader_message_from(bootloader_message* boot, const std::string& misc_blk_device, + std::string* err); + +// Write bootloader message to BCB. +bool write_bootloader_message(const bootloader_message& boot, std::string* err); + +// Write bootloader message to the specified BCB device. +bool write_bootloader_message_to(const bootloader_message& boot, + const std::string& misc_blk_device, std::string* err); + +// Write bootloader message (boots into recovery with the options) to BCB. Will +// set the command and recovery fields, and reset the rest. +bool write_bootloader_message(const std::vector& options, std::string* err); + +// Write bootloader message (boots into recovery with the options) to the specific BCB device. Will +// set the command and recovery fields, and reset the rest. +bool write_bootloader_message_to(const std::vector& options, + const std::string& misc_blk_device, std::string* err); + +// Update bootloader message (boots into recovery with the options) to BCB. Will +// only update the command and recovery fields. +bool update_bootloader_message(const std::vector& options, std::string* err); + +// Update bootloader message (boots into recovery with the |options|) in |boot|. Will only update +// the command and recovery fields. +bool update_bootloader_message_in_struct(bootloader_message* boot, + const std::vector& options); + +// Clear BCB. +bool clear_bootloader_message(std::string* err); + +// Writes the reboot-bootloader reboot reason to the bootloader_message. +bool write_reboot_bootloader(std::string* err); + +// Read the wipe package from BCB (from offset WIPE_PACKAGE_OFFSET_IN_MISC). +bool read_wipe_package(std::string* package_data, size_t size, std::string* err); + +// Write the wipe package into BCB (to offset WIPE_PACKAGE_OFFSET_IN_MISC). +bool write_wipe_package(const std::string& package_data, std::string* err); + +#else + +#include + +// C Interface. +bool write_bootloader_message(const char* options); +bool write_reboot_bootloader(void); + +#endif // ifdef __cplusplus +#endif /* __UBOOT__ */ + +#endif /* __ANDROID_BOOTLOADER_MESSAGE_H */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ap_system_core_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ap_system_core_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ap_system_core_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ap_system_core_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/avs.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/avs.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/avs.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/avs.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/axmm_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/axmm_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/axmm_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/axmm_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/bit.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/bit.h new file mode 100644 index 00000000..6c1b79fc --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/bit.h @@ -0,0 +1,77 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2015-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Bit definnition header + ******************************************************************************/ +/****************************************************************************** + * @file bit.h + * - Version : 0.03 + * @brief Bit definnition header + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 16.02.2022 0.01 First Release + * : 08.04.2022 0.02 Add include guard. + * : 09.11.2022 0.03 License notation change. + *****************************************************************************/ + +#ifndef BIT_H_ +#define BIT_H_ + +#define BIT0 0x00000001 +#define BIT1 0x00000002 +#define BIT2 0x00000004 +#define BIT3 0x00000008 +#define BIT4 0x00000010 +#define BIT5 0x00000020 +#define BIT6 0x00000040 +#define BIT7 0x00000080 +#define BIT8 0x00000100 +#define BIT9 0x00000200 +#define BIT10 0x00000400 +#define BIT11 0x00000800 +#define BIT12 0x00001000 +#define BIT13 0x00002000 +#define BIT14 0x00004000 +#define BIT15 0x00008000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + +#endif /* BIT_H_ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cnf_tbl.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cnf_tbl.h new file mode 100644 index 00000000..20915c16 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cnf_tbl.h @@ -0,0 +1,171 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Configuration table header + ******************************************************************************/ + +#ifndef CNF_TBL_H_ +#define CNF_TBL_H_ + +#include +#include + +typedef struct{ + uint32_t reg_addr; /* register address(for SIC remap) */ + uint32_t value; /* setting value */ +} CONFIGURATION_SETTING_TABLE; + +typedef struct{ + uint64_t fix; + uint64_t be; +} QOS_SETTING_TABLE; + +typedef struct{ + uint32_t addr; /* address of Region ID registers.(for SIC Remap) */ + uint32_t value; /* setting value of Region ID registers. */ +} REGION_ID_SETTING_TABLE; + +typedef struct{ + uint32_t size; /* setting size of Region ID registers. */ +} REGION_ID_SIZE_TABLE; + +typedef struct { + uint32_t rw_val; + uint32_t sec_val; +}RAM_PROTECTION_VALUE_FORMAT; + +typedef struct { + uint32_t read_val; + uint32_t write_val; +}RTRAM_PROTECTION_VALUE_FORMAT; + +typedef struct { + uint32_t addr; + RTRAM_PROTECTION_VALUE_FORMAT setting_value; +}RTRAM_PROTECTION_STRUCTUR; + +typedef struct { + uint32_t addr; + RAM_PROTECTION_VALUE_FORMAT setting_value; +}SYSTEM_RAM_PROTECTION_STRUCTUR; + +typedef struct { + uint64_t addr; + RAM_PROTECTION_VALUE_FORMAT setting_value; +}DRAM_PROTECTION_STRUCTUR; + +#if (RCAR_LSI == RCAR_S4) +#define QOS_TBL_MAX (48U) /* Max setting number of QoS Bank registers. */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define QOS_TBL_MAX (125U) /* Max setting number of QoS Bank registers. */ +#endif /* RCAR_LSI == RCAR_S4 */ + +#if (RCAR_LSI == RCAR_S4) +#define RGID_M_MAX (44U) /* Max number of Region registers. (Master) */ +#define RGID_R_MAX (606U) /* Max number of Region registers. (Read) */ +#define RGID_W_MAX (606U) /* Max number of Region registers. (Write) */ +#define RGID_SEC_MAX (633U) /* Max number of Region registers. (Secure) */ +#define RGID_AXI_MAX (54U) /* Max number of Region registers. (Read/Write for AXI-bus) */ +#elif (RCAR_LSI == RCAR_V4H) +#define RGID_M_MAX (77U) /* Max number of Region registers. (Master) */ +#define RGID_R_MAX (909U) /* Max number of Region registers. (Read) */ +#define RGID_W_MAX (908U) /* Max number of Region registers. (Write) */ +#define RGID_SEC_MAX (958U) /* Max number of Region registers. (Secure) */ +#define RGID_AXI_MAX (98U) /* Max number of Region registers. (Read/Write for AXI-bus) */ +#define RGID_GID_MAX (2U) /* Max number of Region registers. (CCI MPU GID register) */ +#elif (RCAR_LSI == RCAR_V4M) +#define RGID_M_MAX (85U) /* Max number of Region registers. (Master) */ +#define RGID_R_MAX (806U) /* Max number of Region registers. (Read) */ +#define RGID_W_MAX (805U) /* Max number of Region registers. (Write) */ +#define RGID_SEC_MAX (820U) /* Max number of Region registers. (Secure) */ +#define RGID_AXI_MAX (90U) /* Max number of Region registers. (Read/Write for AXI-bus) */ +#define RGID_GID_MAX (1U) /* Max number of Region registers. (CCI MPU GID register) */ +#endif /* (RCAR_LSI == RCAR_S4) */ + +#if (RCAR_LSI == RCAR_V4H) +#define RGID_SIZE_MAX (9U) /* Max number of Region ID table. */ +#elif (RCAR_LSI == RCAR_V4M) +#define RGID_SIZE_MAX (7U) /* Max number of Region ID table. */ +#endif /* (RCAR_LSI == RCAR_V4H) */ + +#define RAM_PROTECTION_MAX (16U) /* Max number of RAM Protection registers. (RT-SRAM/RT-VRAM/SystemRAM) */ +#define DRAM_PROTECTION_MAX (64U) /* Max number of RAM Protection registers. (SDRAM) */ + +#if (RCAR_LSI == RCAR_S4) +#define FDT_REG_MAX (102U) +#elif (RCAR_LSI == RCAR_V4H) +#define FDT_REG_MAX (120U) +#elif (RCAR_LSI == RCAR_V4M) +#define FDT_REG_MAX (73U) +#endif +#if (RCAR_LSI == RCAR_V4H) +#define INTEN_REG_MAX (401U) +#elif (RCAR_LSI == RCAR_V4M) +#define INTEN_REG_MAX (375U) +#endif /* (RCAR_LSI == RCAR_V4H) */ + +#if (RCAR_LSI == RCAR_V4H) +#define IMP_MASTER_MAX (19U) +#define IMP_SLAVE_MAX (35U) +#endif /* (RCAR_LSI == RCAR_V4H) */ + +#if (RCAR_LSI == RCAR_V4H) +#define IPMMU_RGID_MAX (11U) +#elif (RCAR_LSI == RCAR_V4M) +#define IPMMU_RGID_MAX (10U) +#endif /* (RCAR_LSI == RCAR_V4H) */ + +extern const QOS_SETTING_TABLE g_qosbw_tbl[QOS_TBL_MAX]; +extern const QOS_SETTING_TABLE g_qoswt_tbl[QOS_TBL_MAX]; + +extern const REGION_ID_SIZE_TABLE g_rgid_size_tbl[RGID_SIZE_MAX]; +extern const REGION_ID_SETTING_TABLE g_rgid_m_tbl[RGID_M_MAX]; +extern const REGION_ID_SETTING_TABLE g_rgid_r_tbl[RGID_R_MAX]; +extern const REGION_ID_SETTING_TABLE g_rgid_w_tbl[RGID_W_MAX]; +extern const REGION_ID_SETTING_TABLE g_rgid_sec_tbl[RGID_SEC_MAX]; +extern const REGION_ID_SETTING_TABLE g_rgid_axi_tbl[RGID_AXI_MAX]; +extern const REGION_ID_SETTING_TABLE g_rgid_gid_tbl[RGID_GID_MAX]; +extern const uint32_t g_rgid_rtdma_setting_value[RTDMA_MODULE_MAX][RTDMA_CH_MAX][2U]; +extern const uint32_t g_rgid_sysdma_setting_value[SYSDMA_MODULE_MAX][SYSDMA_CH_MAX][2U]; +extern const RTRAM_PROTECTION_STRUCTUR g_rtsram_protection_table[RAM_PROTECTION_MAX]; +extern const RTRAM_PROTECTION_STRUCTUR g_rtvram1_protection_table_1[RAM_PROTECTION_MAX]; +#if (RCAR_LSI == RCAR_S4) +extern const RTRAM_PROTECTION_STRUCTUR g_rtvram1_protection_table_2[RAM_PROTECTION_MAX]; +#endif +extern const SYSTEM_RAM_PROTECTION_STRUCTUR g_system_ram_protection_table[RAM_PROTECTION_MAX]; +extern const DRAM_PROTECTION_STRUCTUR g_dram_protection_table[DRAM_PROTECTION_MAX]; +extern const CONFIGURATION_SETTING_TABLE g_fdt_tbl[FDT_REG_MAX]; +extern const CONFIGURATION_SETTING_TABLE g_inten_tbl[INTEN_REG_MAX]; +#if (RCAR_LSI == RCAR_V4H) +extern const REGION_ID_SETTING_TABLE g_imp_rgid_m_tbl[IMP_MASTER_MAX]; +extern const REGION_ID_SETTING_TABLE g_imp_rgid_s_tbl[IMP_SLAVE_MAX]; +#endif /* (RCAR_LSI == RCAR_V4H) */ +extern const REGION_ID_SETTING_TABLE g_ipmmu_rgid_tbl[IPMMU_RGID_MAX]; +extern const REGION_ID_SETTING_TABLE g_ipmmu_rgid_sec_tbl[IPMMU_RGID_MAX]; +extern const REGION_ID_SETTING_TABLE g_ipmmu_rgid_en_tbl[IPMMU_RGID_MAX]; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#endif /* CNF_TBL_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpg.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpg_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpg_register.h new file mode 100644 index 00000000..690dea2d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpg_register.h @@ -0,0 +1,129 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : CPG register header + ******************************************************************************/ + +#ifndef CPG_REGISTER_H__ +#define CPG_REGISTER_H__ + +#include + +/* CPG base address */ +/* 0xE6150000 */ +#define CPG_BASE (BASE_CPG_ADDR) + +/* Domain Offset Addresses */ +#define D0 (0x4000U * 0U) +#define D1 (0x4000U * 1U) +#define D2 (0x4000U * 2U) +#define D3 (0x4000U * 3U) + +/* CPG write protect */ +#define CPG_CPGWPR (CPG_BASE + 0x0000U + D0) +/* CPG write protect control */ +#define CPG_CPGWPCR (CPG_BASE + 0x0004U + D0) + +/* Module Stop Control register */ +/* Registers of domain 0 */ +#define CPG_MSTPCR5D0 (CPG_BASE + 0x2D14U + D0) /* HSCIF0, I2C3 */ +#define CPG_MSTPCR6 (CPG_BASE + 0x2D18U) /* R/W 32 Domain0 module stop control register 6 */ +#define CPG_MSTPCR7D0 (CPG_BASE + 0x2D1CU + D0) /* SCIF0 */ +#define CPG_MSTPCR28D0 (CPG_BASE + 0x2D70U + D0) /* FCPR */ + +/* Module Stop Status register */ +/* Registers of domain 0 */ +#define CPG_MSTPSR5D0 (CPG_BASE + 0x2E14U + D0) /* HSCIF0, I2C3 */ +#define CPG_MSTPSR6 (CPG_BASE + 0x2E18U) /* R 32 Module stop status register 6 */ +#define CPG_MSTPSR7D0 (CPG_BASE + 0x2E1CU + D0) /* SCIF0 */ +#define CPG_MSTPSR28D0 (CPG_BASE + 0x2E70U + D0) /* FCPR */ + +/* Module standby , Software reset */ +#define CPG_SRCR6 (CPG_BASE + 0x2C18U) /* R/W 32 Software reset register 6 */ +#define CPG_SRCR11 (CPG_BASE + 0x2C2CU) +#define CPG_SRSTCLR6 (CPG_BASE + 0x2C98U) /* W 32 Software reset clearing register 6 */ +#define CPG_SRSTCLR11 (CPG_BASE + 0x2CACU) +#if (RCAR_LSI == RCAR_V4H) +#define CPG_SRCR28 (CPG_BASE + 0x2C70U) +#define CPG_SRCR29 (CPG_BASE + 0x2C74U) +#endif /* RCAR_LSI == RCAR_V4H */ + +#define CPGSRCR_PDR11 (0x00002000U) /* Bit13 */ +#if (RCAR_LSI == RCAR_V4H) +#define CPGSRCR28_VAL (0xCF600000U) +#define CPGSRCR29_VAL (0x007B3D9EU) +#endif /* RCAR_LSI == RCAR_V4H */ + +#define CPG_D1WACRA00 (CPG_BASE + 0x3900U) +#define CPG_D2WACRA00 (CPG_BASE + 0x3A00U) +#define CPG_D3WACRA00 (CPG_BASE + 0x3B00U) + +#define CPG_D1WACR_MSTPCR0 (CPG_BASE + 0x3100U) +#define CPG_D1WACR_RAHSR0 (CPG_BASE + 0x3180U) +#define CPG_D1WACR_SRCR0 (CPG_BASE + 0x3500U) +#define CPG_D1WACR_SRSTCLR0 (CPG_BASE + 0x3580U) + +#define CPG_D2WACR_MSTPCR0 (CPG_BASE + 0x3200U) +#define CPG_D2WACR_RAHSR0 (CPG_BASE + 0x3280U) +#define CPG_D2WACR_SRCR0 (CPG_BASE + 0x3600U) +#define CPG_D2WACR_SRSTCLR0 (CPG_BASE + 0x3680U) + +#define CPG_D3WACR_MSTPCR0 (CPG_BASE + 0x3300U) +#define CPG_D3WACR_RAHSR0 (CPG_BASE + 0x3380U) +#define CPG_D3WACR_SRCR0 (CPG_BASE + 0x3700U) +#define CPG_D3WACR_SRSTCLR0 (CPG_BASE + 0x3780U) + +/* APMU */ +#define APMU_BASE (BASE_APMU_ADDR) +#if (RCAR_LSI == RCAR_S4) +#define CORTEX_R_CORE (0U) /* Target Cortex R52 cores (0 only) */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define CORTEX_R_CORE (1U) /* Target Cortex R52 cores (0 to 2) */ +#endif /* RCAR_LSI == RCAR_S4 */ +#define APMU_WPR (APMU_BASE + 0x0004U) /* Write protection register */ +#define APMU_D0_ACCENR (APMU_BASE + 0x0010U) /* Domain0 Access enable register */ +#define APMU_D1_ACCENR (APMU_BASE + 0x0014U) /* Domain1 Access enable register */ +#define APMU_D2_ACCENR (APMU_BASE + 0x0018U) /* Domain2 Access enable register */ +#define APMU_D3_ACCENR (APMU_BASE + 0x001CU) /* Domain3 Access enable register */ +#define APMU_CRRSTCTRL (APMU_BASE + (CORTEX_R_CORE * 0x40U) + 0x0304U) /* Cortex-R Reset Control Register */ +#define APMU_CRBAR (APMU_BASE + (CORTEX_R_CORE * 0x40U) + 0x0334U) /* Cortex-R Boot Address Register */ +#define APMU_CRBARP (APMU_BASE + (CORTEX_R_CORE * 0x40U) + 0x033CU) /* Cortex-R Boot Address Register Protected */ +#define APMU_PWRCTRLC0 (APMU_BASE + 0x0800U) /* Power Control Register for Core 0 */ +#define APMU_RVBARPLC0 (APMU_BASE + 0x0838U) /* Reset Vector Base Address Register Protected Low for Core 0 */ +#define APMU_RVBARPHC0 (APMU_BASE + 0x083CU) /* Reset Vector Base Address Register Protected High for Core 0 */ + +/* SD-IF */ +#define CPG_SD0CKCR0 (CPG_BASE + 0x0870U) + +/* RPC */ +#define CPG_RPCCKCR (CPG_BASE + 0x0874U) +/* for CPG register setting */ +#define RPCCKCR_RPCFC_MASK (0x1FU) /* Mask for RPCFC bit of CPG_RPCCKCR */ +#define RPCCKCR_RPCFC_160M (0x11U) /* RPC clock 160MHz */ +#define RPCCKCR_RPCFC_80M (0x13U) /* RPC clock 80MHz */ +#define RPCCKCR_RPCFC_40M (0x17U) /* RPC clock 40MHz */ + +#define CPG_PLL6CR0 (CPG_BASE + 0x084CU) +#define CPG_PLLECR (CPG_BASE + 0x0820U) +#endif /* CPG_REGISTER_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpu.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpu.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu_on.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpu_on.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu_on.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/cpu_on.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/crc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/crc.h new file mode 100644 index 00000000..3a961701 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/crc.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2009 + * Marvell Semiconductor + * Written-by: Prafulla Wadaskar + */ + +#ifndef _UBOOT_CRC_H +#define _UBOOT_CRC_H + +// #include /* 'uint*' definitions */ +typedef unsigned int uint; + +/** + * crc32 - Calculate the CRC32 for a block of data + * + * @crc: Input crc to chain from a previous calculution (use 0 to start a new + * calculation) + * @buf: Bytes to checksum + * @len: Number of bytes to checksum + * @return checksum value + */ +uint32_t crc32(uint32_t crc, const unsigned char *buf, uint len); + +/** + * crc32_no_comp - Calculate the CRC32 for a block of data (no one's compliment) + * + * This version uses a different algorithm which doesn't use one's compliment. + * JFFS2 (and other things?) use this. + * + * @crc: Input crc to chain from a previous calculution (use 0 to start a new + * calculation) + * @buf: Bytes to checksum + * @len: Number of bytes to checksum + * @return checksum value + */ +uint32_t crc32_no_comp(uint32_t crc, const unsigned char *buf, uint len); + +#endif /* _UBOOT_CRC_H */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/dma.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/dma.h new file mode 100644 index 00000000..82f1b2a0 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/dma.h @@ -0,0 +1,57 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : DMA driver header + ******************************************************************************/ + +#ifndef DMA_DRIVER_H__ +#define DMA_DRIVER_H__ + +#include +#include +#include + +/* fraction mask for 64-byte units */ +#define FRACTION_MASK_64_BYTE (0x0000003FU) +#define TRANS_SIZE_64BYTE (0x40U) + +/* Prototype */ +void dma_init(void); +void dma_trans_start(uint32_t dst, uint32_t src, uint32_t len); +void dma_trans_end_check(void); +void dma_release(void); + +/* Inline function */ +/* Check address align when RT-DMAC/SDMAC transfer */ +static inline void dma_address_align_check(uint32_t dst_addr, uint32_t src_addr) +{ + if (((src_addr & FRACTION_MASK_64_BYTE) != 0U) || ((dst_addr & FRACTION_MASK_64_BYTE) != 0U)) + { + /* src_addr or dst_addr are not 64-byte alignment. */ + ERROR("Not 64-byte alignment in DMA transfer\n"); + panic; + } +} + +#endif /* DMA_DRIVER_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/dma_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/dma_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_boot.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_boot.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_boot.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_boot.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_config.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_def.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_hal.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_hal.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_hal.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_hal.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_multiboot.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_multiboot.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_multiboot.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_multiboot.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_registers.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_registers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_registers.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_registers.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_std.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_std.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_std.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/emmc_std.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/fcpr.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/fcpr.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/fcpr_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/fcpr_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/gpio.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/gpio.h new file mode 100644 index 00000000..e444d69d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/gpio.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2025 Hyundai Mobis Co., Ltd. + * + * The right to copy, distribute, modify, or otherwise make use + * of this software may be licensed only pursuant to the terms + * of an applicable Hyundai Mobis license agreement. + */ + +#ifndef GPIO_H +#define GPIO_H + +#ifdef BOOT_GPIO_CHECK +void gpio_N1307(int set); +void gpio_N1305(int set); +#else +static inline void gpio_N1307(int set) { (void)set; } +static inline void gpio_N1305(int set) { (void)set; } +#endif +void gpio_V4H_SERDES_1V8_en(int set); + +#endif /* GPIO_H */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/hscif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/hscif_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/hscif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/hscif_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/i2c.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/i2c.h new file mode 100644 index 00000000..195d6726 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/i2c.h @@ -0,0 +1,77 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : I2C driver header + ******************************************************************************/ + +#ifndef I2C_DRIVER_H__ +#define I2C_DRIVER_H__ + +#define FLG_RW (0x00000001U) + +#define I2C_OK (0x00000000U) +#define I2C_NG (0x00000001U) + +#define SET_SCGD (0x00000018U) +#define SET_CDF (0x00000007U) + +#define FLAG_SDBS (1U << 3) + +#define FLAG_MDBS (0x00000080U) +#define FLAG_FSCL (0x00000040U) +#define FLAG_FSDA (0x00000020U) +#define FLAG_MIE (0x00000008U) +#define FLAG_FSB (0x00000002U) +#define FLAG_ESG (0x00000001U) + +#define FLAG_MNR (0x00000040U) +#define FLAG_MAL (0x00000020U) +#define FLAG_MST (0x00000010U) +#define FLAG_MDE (0x00000008U) +#define FLAG_MDT (0x00000004U) +#define FLAG_MDR (0x00000002U) +#define FLAG_MAT (0x00000001U) +#define __INV(x) ((0x7F) & ~(x)) + +#define FLAG_NONE (0U) + +#define ERR_MAX (1U) + +void i2c3_init(void); +void i2c3_write(uint32_t slaveAdd, uint32_t regAdd, uint32_t setData); +void i2c3_read(uint32_t slaveAdd, uint32_t regAdd, uint32_t *revData); +uint32_t i2c3_err_check(uint32_t first, uint32_t second, uint32_t error); +void i2c3_release(void); + +typedef int (*crc_enabled_t)(void); +uint8_t crc8(uint8_t *data, int len); +void i2c5_init(crc_enabled_t crc_enabled); +void i2c5_write(uint32_t slaveAdd, uint32_t regAdd, uint32_t setData); +void i2c5_read(uint32_t slaveAdd, uint32_t regAdd, uint32_t *revData); +void __i2c5_read(uint32_t slaveAdd, uint32_t regAdd, uint32_t *revData, int crc_en); +uint32_t i2c5_err_check(uint32_t first, uint32_t second, uint32_t error); +void i2c5_release(void); + +#endif /* I2C_DRIVER_H__ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/i2c_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/i2c_register.h new file mode 100644 index 00000000..56134f24 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/i2c_register.h @@ -0,0 +1,99 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : I2C register header + ******************************************************************************/ + +#ifndef I2C_REGISTER_H__ +#define I2C_REGISTER_H__ + +#include + +/* I2C ch6 base address */ +#define I2C3_BASE (BASE_I2C3_ADDR) /* Physical address:0xE66D0000, Logical address:0xFDCD0000 */ + +/* Slave control register */ +#define I2C3_ICSCR (I2C3_BASE + 0x0000U) +/* Master control register */ +#define I2C3_ICMCR (I2C3_BASE + 0x0004U) +/* Slave status register */ +#define I2C3_ICSSR (I2C3_BASE + 0x0008U) +/* Master status register */ +#define I2C3_ICMSR (I2C3_BASE + 0x000CU) +/* Slave interrupt enable register */ +#define I2C3_ICSIER (I2C3_BASE + 0x0010U) +/* Master interrupt enable register */ +#define I2C3_ICMIER (I2C3_BASE + 0x0014U) +/* Clock control register */ +#define I2C3_ICCCR (I2C3_BASE + 0x0018U) +/* Slave address register */ +#define I2C3_ICSAR (I2C3_BASE + 0x001CU) +/* Master address register */ +#define I2C3_ICMAR (I2C3_BASE + 0x0020U) +/* Recieve data register */ +#define I2C3_ICRXD (I2C3_BASE + 0x0024U) +/* Transmit data register */ +#define I2C3_ICTXD (I2C3_BASE + 0x0024U) +/* Clock control register 2 */ +#define I2C3_ICCCR2 (I2C3_BASE + 0x0028U) + + +/* I2C ch? base address */ +#define I2C5_BASE (BASE_I2C5_ADDR) /* Physical address:0xE66E0000, Logical address:0xFDCE0000 */ + +/* Slave control register */ +#define I2C5_ICSCR (I2C5_BASE + 0x0000U) +/* Master control register */ +#define I2C5_ICMCR (I2C5_BASE + 0x0004U) +/* Slave status register */ +#define I2C5_ICSSR (I2C5_BASE + 0x0008U) +/* Master status register */ +#define I2C5_ICMSR (I2C5_BASE + 0x000CU) +/* Slave interrupt enable register */ +#define I2C5_ICSIER (I2C5_BASE + 0x0010U) +/* Master interrupt enable register */ +#define I2C5_ICMIER (I2C5_BASE + 0x0014U) +/* Clock control register */ +#define I2C5_ICCCR (I2C5_BASE + 0x0018U) +/* Slave address register */ +#define I2C5_ICSAR (I2C5_BASE + 0x001CU) +/* Master address register */ +#define I2C5_ICMAR (I2C5_BASE + 0x0020U) +/* Recieve data register */ +#define I2C5_ICRXD (I2C5_BASE + 0x0024U) +/* Transmit data register */ +#define I2C5_ICTXD (I2C5_BASE + 0x0024U) +/* Clock control register 2 */ +#define I2C5_ICCCR2 (I2C5_BASE + 0x0028U) +/* SCL mask Control register */ +#define I2C5_ICMPR (I2C5_BASE + 0x002CU) +/* SCL high Control register */ +#define I2C5_ICHPR (I2C5_BASE + 0x0030U) +/* SCL low Control register */ +#define I2C5_ICLPR (I2C5_BASE + 0x0034U) +/* First bit setup cycle register */ +#define I2C5_ICFBSCR (I2C5_BASE + 0x0038U) + +#endif /* I2C_REGISTER_H__ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load.h new file mode 100644 index 00000000..0621d31d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load.h @@ -0,0 +1,150 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load function header + ******************************************************************************/ + +#ifndef LOAD_IMAGE_H_ +#define LOAD_IMAGE_H_ + +/* define */ +/* For Build Option RTOS_LOAD_NUM */ +#define RTOS_LOAD_NUM_1 (1U) /* RTOS is RTOS#0 only. */ +#define RTOS_LOAD_NUM_3 (3U) /* RTOS are RTOS#0, RTOS#1, and RTOS#2. */ + +/* For Build Option OPTEE_LOAD_ENABLE */ +#define OPTEE_DISABLE (0U) /* Load OP-TEE image disable. */ +#define OPTEE_ENABLE (1U) /* Load OP-TEE image enable. */ + +/* ICUMX Loader */ +#define IPL_TOP (0xEB210000U) +#define IPL_SIZE (128U * 1024U) +#define IPL_END ((IPL_TOP +IPL_SIZE) - 1U) + +#define MCU_OFFSET (0x0200U) /* 512byte */ + +/* Certificate logical address */ +extern char __ghsbegin_sa9_load[]; +#define SA9_DEST_ADDR (uintptr_t)(&__ghsbegin_sa9_load[0]) +#define CONTENT_CERT_OFFSET (0x6000U) + +/* key cert address */ +#define TFMV_KEY_CERT_ADDR (SA9_DEST_ADDR + CONTENT_CERT_INFO_SIZE) /* 0xFDE31000 */ +#define NTFMV_KEY_CERT_ADDR (TFMV_KEY_CERT_ADDR + KEY_CERT_SIZE) /* 0xFDE33000 */ + +/* Size of each content contained in SA9. */ +#define KEY_CERT_SIZE (0x00002000U) /* Key cert size(8KiB) */ +#define CONTENT_CERT_INFO_SIZE (0x00001000U) /* Content cert header size(4KiB) */ +#define CONTENT_CERT_SIZE (0x00000800U) /* content cert src size(2KiB) */ +#define MIN_VER_TBL_SIZE (0x00001000U) /* Software minimum version table */ + +/* Load ID */ +#define SECURE_FW_ID (0U) /* 0:Secure Firmware */ +#define RTOS_ID (1U) /* 1:RTOS#0 */ +#define CA_PROGRAM_ID (2U) /* 2:CX 2nd IPL */ +#define ICUMH_PROGRAM_ID (3U) /* 3:ICUMH program */ +#define G4MH_PROGRAM_ID (4U) /* 4:G4MH program(1st) 5:G4MH program(2nd) */ +#define CA_OPTIONAL_ID (6U) /* 6:CA Program#1, 7:CA Program#2 ... 13:CA Program#8 */ +#define TFMV_MIN_VER_TBL_ID (14U) /* 14:TFMV Software minimum version table */ +#define NTFMV_MIN_VER_TBL_ID (15U) /* 15:NTFMV Software minimum version table */ +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +#define RTOS1_ID (16U) /* 16:RTOS#1 */ +#define RTOS2_ID (17U) /* 17:RTOS#2 */ +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +/* Number of Max loading image */ +#define NUM_OF_ALWAYS_LOAD_CERT (6U) /* Secure FW + RTOS + Cx IPL + ICUMH + (G4MH * 2) */ +#define CA_MAX_IMAGE (8U) /* CA program MAX image num */ + +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_1) +#define MAX_PLACED (16U) /* IPL (or minimum version table) + Secure FW + RTOS * + * + Cx IPL + (CA program * 8) + ICUMH + G4MH */ +#elif (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +#define MAX_PLACED (18U) /* IPL (or minimum version table) + Secure FW + RTOS#0 * + * + Cx IPL + (CA program * 8) + ICUMH + G4MH + RTOS#1 + RTOS#2 */ +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_1 */ + +#define TARGET_MEM_DRAM (0U) +#define TARGET_MEM_RTSRAM (1U) +#define TARGET_MEM_RTVRAM (2U) +#define TARGET_MEM_SYSRAM (3U) +#define TARGET_MEM_CODESRAM (4U) + +/* get info from cert address offset */ +#define CERT_INFO_SIZE_OFFSET (0x00000264U) /* Offset Type1 */ +#define CERT_INFO_DST_OFFSET (0x00000154U) /* Offset Type1 */ +#define CERT_INFO_SIZE_OFFSET1 (0x00000364U) /* Offset Type2 */ +#define CERT_INFO_DST_OFFSET1 (0x000001D4U) /* Offset Type2 */ +#define CERT_INFO_SIZE_OFFSET2 (0x00000464U) /* Offset Type2 */ +#define CERT_INFO_DST_OFFSET2 (0x00000254U) /* Offset Type2 */ + +#define FLASH_BOOT (0U) +#define EMMC_BOOT (1U) + +#define CERT_INFO_FLG_OFFSET (0x0000000CU) +#define KEY_SIZE_BIT_SHIFT (21U) + +/* Parameter info of secure data (for ICUM FW) */ +#define SECUREDATA_SIZE (112U * 1024U) /* 112KB */ + +/* struct */ +/* load address range */ +typedef struct { + uint32_t topadd; + uint32_t endadd; +} ADDRESS_RANGE; + +/* load info */ +typedef struct{ + const char *name; /* store load image name */ + uint32_t image_size; /* store image size */ + uint32_t boot_addr; /* store boot address of image */ + uint32_t key_cert_addr; /* store key cert address */ + uint32_t cnt_cert_addr; /* store content cert address */ + uint32_t src_addr; /* store source address */ + uint32_t part_num; /* store eMMC partition number */ + uint32_t image_id; /* store image ID */ +} LOAD_INFO; + +static inline uint32_t get_src_addr_offset_in_cert(uint32_t id) +{ + return (SA9_DEST_ADDR + ((id * 0x10U) + 0x8U)); +} + +static inline uint32_t get_logic_cont_cert_addr(uint32_t num) +{ + return (SA9_DEST_ADDR + CONTENT_CERT_OFFSET + (num * CONTENT_CERT_SIZE)); +} + +/* Prototype */ +uint32_t load_content_cert(int slot); +void load_image(LOAD_INFO* li); +void load_init(LOAD_INFO* li, int slot); +void check_load_area(const LOAD_INFO* li); +void load_start(const LOAD_INFO* li); +void load_end(void); +void check_overflow(uint32_t addr, uint32_t len, uint32_t *end_addr, const char *func_name); +void load_securedata(uint32_t target_id); + +#endif /* LOAD_IMAGE_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_emmc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load_emmc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_emmc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load_emmc.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load_flash.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load_flash.h new file mode 100644 index 00000000..43569995 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/image_load_flash.h @@ -0,0 +1,69 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load function for eMMC header + ******************************************************************************/ + +#ifndef LOAD_IMAGE_FLASH_H_ +#define LOAD_IMAGE_FLASH_H_ + +#include +#include +#include +#include + +/* define */ +/* Flash address */ +#define FLASH_BASE (0x08000000U) +#define FLASH_SIZE (0x04000000U) +#define FLASH_END ((FLASH_BASE + FLASH_SIZE) - 1U) +#define SRC_TOP (FLASH_BASE) +#define SRC_END (FLASH_END) + +/* Flash address of content certificate */ +#define CONTENT_CERT_SA (9U) /* Content Cert SA9 */ +#define SA_SIZE (0x00040000U) +#define CONTENT_CERT_2nd_OFFSET (0x00280000U) /* 256KB * 10 */ +#define FLASH_CONTENT_CERT_ADDR (uint32_t)(FLASH_BASE + (SA_SIZE * CONTENT_CERT_SA)) /* FLASH Base + SA9 offset */ +#if (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) +#define VER_TBL_CNT_CERT_OFFSET (0x0000D000U) +#define FLASH_VER_TBL_CNT_CERT_ADDR (FLASH_CONTENT_CERT_ADDR + VER_TBL_CNT_CERT_OFFSET) /* SA9 top + offset */ +#endif /* (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) */ +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +#define RTOS12_CNT_CERT_OFFSET (0x0000E000U) +#define FLASH_RTOS12_CNT_CERT_ADDR (FLASH_CONTENT_CERT_ADDR + RTOS12_CNT_CERT_OFFSET) /* SA9 top + offset */ +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +static inline void load_image_info_print_for_flash(const LOAD_INFO* li) +{ + NOTICE("======== %s image load info ========\n" + "load address \t= 0x%08x\n" "image size \t= 0x%08x\n" + "source address \t= 0x%08x\n", + li->name, li->boot_addr, li->image_size, li->src_addr); +} + +/* Prototype */ +uint32_t load_content_cert_for_flash(int slot); +#endif /* LOAD_IMAGE_FLASH_H_ */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/inline_asm.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/inline_asm.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/inline_asm.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/inline_asm.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/intc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/intc.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc_id.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/intc_id.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc_id.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/intc_id.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ip_control.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ip_control.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ip_control.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ip_control.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/loader_main.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/loader_main.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/loader_main_common.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/loader_main_common.h new file mode 100644 index 00000000..bf37c8e3 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/loader_main_common.h @@ -0,0 +1,44 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader main common header + ******************************************************************************/ + +#ifndef LOADER_MAIN_COMMON_H_ +#define LOADER_MAIN_COMMON_H_ + + +/* define */ +#define IPL_VERSION "1.59.0" + +#define ADD_MAGIC_NUMBER (1U) + +/* Global */ +extern const char build_message[]; + +/* prototype */ +void print_boot_msg(void); +void wa_setting_apmu(void); + +#endif /* LOADER_MAIN_COMMON_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/log.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/log.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/log.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/log.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mcu_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/mcu_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mcu_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/mcu_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mem_io.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/mem_io.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mem_io.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/mem_io.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/mfis.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/mfis.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/mfis_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/mfis_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/micro_wait.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/micro_wait.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/micro_wait.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pfc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pfc.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pfc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pfc_register.h new file mode 100644 index 00000000..6904ffef --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pfc_register.h @@ -0,0 +1,154 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : PFC register header + ******************************************************************************/ + + +#ifndef PFC_REGISTER_H__ +#define PFC_REGISTER_H__ + +#include +#include + +/* PFC / GPIO base address */ +/* 0xE6050000 */ +#define PFC_BASE (BASE_PFC_ADDR) + +#define PFC_RW_OFFSET (0x0000U) +#define PFC_SET_OFFSET (0x0200U) +#define PFC_CLR_OFFSET (0x0400U) + +#if (RCAR_LSI == RCAR_S4) +#define PFC_MCU_BASE (BASE_PFCMCU_ADDR) + +#define PFC_PORT_GRP0 (0x00000000U) /* Port Group0/4 */ +#define PFC_PORT_GRP1 (0x00000800U) /* Port Group1/5 */ +#define PFC_PORT_GRP2 (0x00001000U) /* Port Group2/6 */ +#define PFC_PORT_GRP3 (0x00001800U) /* Port Group3/7 */ +#define PFC_SYS_GRP (0x00028000U) /* System Group0/1 */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define PFC_PORT_GRP0 (0x00000000U) /* Port Group0 */ +#define PFC_PORT_GRP1 (0x00000800U) /* Port Group1 */ +#define PFC_PORT_GRP2 (0x00008000U) /* Port Group2 */ +#define PFC_PORT_GRP3 (0x00008800U) /* Port Group3 */ +#define PFC_PORT_GRP4 (0x00010000U) /* Port Group4 */ +#define PFC_PORT_GRP5 (0x00010800U) /* Port Group5 */ +#define PFC_PORT_GRP6 (0x00011000U) /* Port Group6 */ +#define PFC_PORT_GRP7 (0x00011800U) /* Port Group7 */ +#if (RCAR_LSI == RCAR_V4H) +#define PFC_PORT_GRP8 (0x00018000U) /* Port Group8 */ +#endif +#define PFC_SYS_GRP (0x00028000U) /* System Group0 */ +#endif + +/* PFC / GPIO registers */ +/* Read/Write registers */ +#define PFC_PORT_GRP_MASK (0xFFFFF800U) + +/* Port Group0 */ +#define PFC_DM1PR0_RW (PFC_BASE + PFC_PORT_GRP0 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR0_RW (PFC_BASE + PFC_PORT_GRP0 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR0_RW (PFC_BASE + PFC_PORT_GRP0 + PFC_RW_OFFSET + 0x002CU) +#define PFC_GPSR0_RW (PFC_BASE + PFC_PORT_GRP0 + PFC_RW_OFFSET + 0x0040U) +#define PFC_IP0SR0_RW (PFC_BASE + PFC_PORT_GRP0 + PFC_RW_OFFSET + 0x0060U) +#define PFC_POC0_RW (PFC_BASE + PFC_PORT_GRP0 + PFC_RW_OFFSET + 0x00A0U) +/* Port Group1 */ +#define PFC_DM1PR1_RW (PFC_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR1_RW (PFC_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR1_RW (PFC_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x002CU) +#define PFC_GPSR1_RW (PFC_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0040U) +#define PFC_IP1SR1_RW (PFC_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0064U) +#define PFC_IP2SR1_RW (PFC_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0068U) +#define PFC_POC1_RW (PFC_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x00A0U) +/* Port Group2 */ +#define PFC_DM1PR2_RW (PFC_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR2_RW (PFC_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR2_RW (PFC_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x002CU) +/* Port Group3 */ +#define PFC_DM1PR3_RW (PFC_BASE + PFC_PORT_GRP3 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR3_RW (PFC_BASE + PFC_PORT_GRP3 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR3_RW (PFC_BASE + PFC_PORT_GRP3 + PFC_RW_OFFSET + 0x002CU) +#define PFC_POC3_RW (PFC_BASE + PFC_PORT_GRP3 + PFC_RW_OFFSET + 0x00A0U) +#define PFC_PUEN3_RW (PFC_BASE + PFC_PORT_GRP3 + PFC_RW_OFFSET + 0x00C0U) +/* Port Group4 */ +#define PFC_DM1PR4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x002CU) +/* Physical address:0xE6060040, Logical address:0x0xFDA60040 */ +#define PFC_GPSR4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x0040U) +/* Physical address:0xE6060060, Logical address:0x0xFDA60060 */ +#define PFC_IP0SR4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x0060U) +/* Physical address:0xE60600C0, Logical address:0x0xFDA600C0 */ +#define PFC_PUEN4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x00C0U) +/* Physical address:0xE6060100, Logical address:0x0xFDA60100 */ +#define PFC_MODSEL4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x0100U) +#define PFC_IOINTSEL4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x0180U) +#define PFC_INOUTSEL4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x0184U) +#define PFC_OUTDT4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x0188U) +#define PFC_INDT4_R (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x018CU) +#define PFC_POSNEG4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x01A0U) +#define PFC_OUTDTSEL4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x01C0U) +#define PFC_OUTDTH4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x01C4U) +#define PFC_OUTDTL4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x01C8U) +#define PFC_INEN4_RW (PFC_BASE + PFC_PORT_GRP4 + PFC_RW_OFFSET + 0x01D0U) +/* Port Group5 */ +#define PFC_DM1PR5_RW (PFC_BASE + PFC_PORT_GRP5 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR5_RW (PFC_BASE + PFC_PORT_GRP5 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR5_RW (PFC_BASE + PFC_PORT_GRP5 + PFC_RW_OFFSET + 0x002CU) +/* Port Group6 */ +#define PFC_DM1PR6_RW (PFC_BASE + PFC_PORT_GRP6 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR6_RW (PFC_BASE + PFC_PORT_GRP6 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR6_RW (PFC_BASE + PFC_PORT_GRP6 + PFC_RW_OFFSET + 0x002CU) +/* Port Group7 */ +#define PFC_DM1PR7_RW (PFC_BASE + PFC_PORT_GRP7 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR7_RW (PFC_BASE + PFC_PORT_GRP7 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR7_RW (PFC_BASE + PFC_PORT_GRP7 + PFC_RW_OFFSET + 0x002CU) +#if (RCAR_LSI == RCAR_V4H) +/* Port Group8 */ +#define PFC_DM1PR8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PR8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PR8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x002CU) +#define PFC_INOUTSEL8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x0184U) +#define PFC_OUTDT8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x0188U) +#endif +/* System Group */ +#define PFC_DM1PRSYS_RW (PFC_BASE + PFC_SYS_GRP + PFC_RW_OFFSET + 0x0024U) +#define PFC_DM2PRSYS_RW (PFC_BASE + PFC_SYS_GRP + PFC_RW_OFFSET + 0x0028U) +#define PFC_DM3PRSYS_RW (PFC_BASE + PFC_SYS_GRP + PFC_RW_OFFSET + 0x002CU) + +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +/* Physical address:0xE6068040 */ +#define PFC_GPSR8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x0040U) +#define PFC_IP1SR8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x0064U) +#define PFC_PUEN8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x00C0U) +#define PFC_MODSEL8_RW (PFC_BASE + PFC_PORT_GRP8 + PFC_RW_OFFSET + 0x0100U) +#endif + +static inline uint32_t get_pmmr_addr(uint32_t addr) +{ + return (addr & PFC_PORT_GRP_MASK); +} + +#endif /* PFC_REGISTER_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pmic.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pmic.h new file mode 100644 index 00000000..6998ac8f --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pmic.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2025 Hyundai Mobis Co., Ltd. + * + * The right to copy, distribute, modify, or otherwise make use + * of this software may be licensed only pursuant to the terms + * of an applicable Hyundai Mobis license agreement. + */ + + /******************************************************************************* + * DESCRIPTION : PMIC function header + ******************************************************************************/ + +#ifndef PMIC_FUNCTION_H__ +#define PMIC_FUNCTION_H__ + +void PMIC_i2c_init(int *is_crc_enabled); +int PMIC_wdt_init(int *is_crc_enabled); +int PMIC_SM_12_wdt(void); +void PMIC_i2c_release(void); + +int PMIC_4QNA_wdt(void); +int PMIC_16QNA_wdt(void); + +#endif /* PMIC_FUNCTION_H__ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pmic_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pmic_register.h new file mode 100644 index 00000000..c856da4c --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/pmic_register.h @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2025 Hyundai Mobis Co., Ltd. + * + * The right to copy, distribute, modify, or otherwise make use + * of this software may be licensed only pursuant to the terms + * of an applicable Hyundai Mobis license agreement. + */ + + /******************************************************************************* + * DESCRIPTION : PMIC register header + ******************************************************************************/ + +#ifndef PMIC_REGISTER_H__ +#define PMIC_REGISTER_H__ + +#define PMIC_ADDR ((0x54) << 1) /* regulation register */ +#define PMIC_ADDR_P ((0x55) << 1) /* protection register */ +#define PMIC_ADDR_OTP ((0x64) << 1) /* OTP register ? */ + +/* + * SINT Check + */ +#define FUSA_CTRL_2 (0x09) +#define FUSA_CTRL_3 (0x0A) +#define FUSA_SOC_CHK_1 (0x15) + +/* + * EXT PINCHECK2 + */ +#define FUSA_CTRL_4 (0x00B) +#define EXT_PIN_CHK_TIME_4US (0U << 6) +#define EXT_PIN_CHK_TIME_16US (2U << 6) +#define EXT_PIN_CHK_EN (1U << 5) +#define EXT_PIN_CHK_SDI1 (1U << 4) +#define EXT_PIN_CHK_PRESETOUT (1U << 3) +#define EXT_PIN_CHK_SDI2 (1U << 2) +#define EXT_PIN_CHK_SDI3 (1U << 1) +#define EXT_PIN_CHK_SDI4 (1U << 0) + +#define FLT_RECORD_A (0x019) +#define FLT_PRESETOUT (1U << 7) +#define FLT_SINTCHECK (1U << 6) +#define FLT_EXTPINCHECK2 (1U << 5) +#define FLT_GC_SELFT_FAULT (1U << 4) +#define FLT_SDI3 (1U << 3) +#define FLT_SDI2 (1U << 2) +#define FLT_SDI1 (1U << 1) +#define FLT_SDI0 (1U << 0) +/* To read/write an adress after 0x100, + it is necessary to write a value to IO_PAGE and + access the target address after changing the page. + */ +#define FUSA_CTRL_D (0x11D) + +/* + * CVM Test + */ +#define D_LENGTH_FUSA_CTRL_CVM 4 // Based on how many CVM slots is enabled +#define FUSA_CHK_CVM1 (0x0D) +#define CVM_TEST_START (1U << 0) +#define CVM_TEST_DONE (1U << 7) +#define FUSA_STATUS_CVM1 (0x0E) +#define CVM_TEST_FAIL_3 (0x3U << 6) +#define CVM_TEST_FAIL_2 (0x3U << 4) +#define CVM_TEST_FAIL_1 (0x3U << 2) +#define FUSA_STATUS_CVM2 (0x0F) +#define CVM_TEST_FAIL_6 (0x3U << 4) +#define CVM_TEST_FAIL_5 (0x3U << 2) +#define CVM_TEST_FAIL_4 (0x3U << 0) + +#define FUSA_CHK_CVM2H (0x10D) +#define FUSA_CHK_CVM2L (0x10E) +#define FUSA_CHK_CVM3H (0x10F) +#define FUSA_CHK_CVM3L (0x110) +#define FUSA_CHK_CVM4H (0x111) +#define FUSA_CHK_CVM4L (0x112) +#define FUSA_CHK_CVM5H (0x113) +#define FUSA_CHK_CVM5L (0x114) + +#define FUSA_CTRL_CVM1 (0x125) +#define FUSA_CTRL_CVM2 (0x126) +#define FUSA_CTRL_CVM3 (0x127) +#define FUSA_CTRL_CVM4 (0x128) +#define FUSA_CTRL_CVM5 (0x129) +#define FUSA_CTRL_CVM6 (0x12A) + +#define ADCMON_MASK_ExtINPs (0x133) +#define FaultMask_EXT_0_Prot (1U << 0) +#define FaultMask_EXT_1_Prot (1U << 0) + +/* + * PMIC_SM_12_wdt() +* check_SoC_Activation() + */ +#define FUSA_STATUS_1 (0x010) +#define FUSA_STAT_SCS_LOCK (0x7 << 5) +#define FUSA_STAT_SCS_ERROR (0x6 << 5) +#define FUSA_STAT_SCS_RESET (0x5 << 5) +#define FUSA_STAT_SCS_ACTIVE (0x4 << 5) +#define FUSA_STAT_SCS_SOC_ACT (0x3 << 5) +#define FUSA_STAT_SCS_PWR_UP (0x2 << 5) +#define FUSA_STAT_SCS_DIAG (0x1 << 5) +#define FUSA_STAT_SCS_PWR_OFF (0x0 << 5) +#define FUSA_STAT_SCS_MASK (0x7 << 5) +#define FUSA_STAT_SOC_ACTIVATED (0x1 << 4) +#define FUSA_STAT_WDT_MSG_DONE (0x1 << 3) +#define FUSA_STAT_1_IDLE (0x0) +#define FUSA_STAT_1_EXT_CHK1 (0x4) +#define FUSA_STAT_1_SINT_CHK (0x5) +#define FUSA_STAT_1_EXT_CHK2 (0x6) +#define FUSA_STAT_1_START_WDT (0x7) +#define FUSA_STAT_1_MASK (0x7) +#define FUSA_STATUS_4 (0x014) +#define FLT_RECORD_B (0x01A) +#define FLT_WDT (0x1 << 5) +#define WDT_KICK_REG (0x095) +#define WDT_LFSR (0x096) +#define WDT_CFG0 (0x107) +#define WDT_CFG0_QNA (0x1 << 2) +#define WDT_CFG0_16QNA (0x1 << 1) +#define WDT_CFG0_EN (0x1 << 0) +#define WDT_CFG1 (0x108) +#define WDT_CFG1_ULCNT_SHIFT (4) +#define WDT_CFG1_ULCNT_MASK ((0xF) << WDT_CFG1_ULCNT_SHIFT) +#define WDT_CFG1_ULCNT(x) ((x) << WDT_CFG1_ULCNT_SHIFT) +#define WDT_CFG1_LLCNT_SHIFT (0) +#define WDT_CFG1_LLCNT_MASK ((0xF) << WDT_CFG1_LLCNT_SHIFT) +#define WDT_CFG1_LLCNT(x) ((x) << WDT_CFG1_LLCNT_SHIFT) +#define WDT_CFG2 (0x109) +#define WDT_CFG2_ACC_TH_SHIFT (6) +#define WDT_CFG2_ACC_TH_MASK (0x3 << WDT_CFG2_ACC_TH_SHIFT) +#define WDT_CFG2_ACC_TH_1 (0x0 << WDT_CFG2_ACC_TH_SHIFT) +#define WDT_CFG2_ACC_TH_15 (0x1 << WDT_CFG2_ACC_TH_SHIFT) +#define WDT_CFG2_ACC_TH_31 (0x2 << WDT_CFG2_ACC_TH_SHIFT) +#define WDT_CFG2_ACC_TH_63 (0x3 << WDT_CFG2_ACC_TH_SHIFT) +#define WDT_CFG2_ULT_SHIFT (3) +#define WDT_CFG2_ULT_MASK ((0x7) << WDT_CFG2_ULT_SHIFT) +#define WDT_CFG2_ULT_100US ((0x2) << WDT_CFG2_ULT_SHIFT) +#define WDT_CFG2_ULT_10MS ((0x4) << WDT_CFG2_ULT_SHIFT) +#define WDT_CFG2_ULT_100MS ((0x5) << WDT_CFG2_ULT_SHIFT) +#define WDT_CFG2_LLT_SHIFT (0) +#define WDT_CFG2_LLT_MASK ((0x7) << WDT_CFG2_LLT_SHIFT) +#define WDT_CFG2_LLT_100US ((0x2) << WDT_CFG2_LLT_SHIFT) +#define WDT_CFG2_LLT_10MS ((0x4) << WDT_CFG2_LLT_SHIFT) +#define WDT_CFG2_LLT_100MS ((0x5) << WDT_CFG2_LLT_SHIFT) +#define WDT_CFG3 (0x10A) +#define FLT_MASK_B (0x12C) +#define FLT_MASK_WDT (0x1 << 4) + +/* Analog Pins: ADC-related Registers */ +#define EXT_0_ADCMON_DATAMSB_EXT (0x074U) +#define EXT_0_ADCMON_DATALSB_EXT (0x075U) +#define EXT_1_ADCMON_DATAMSB_EXT (0x076U) +#define EXT_1_ADCMON_DATALSB_EXT (0x077U) +#define EXT_0_ADCMON_Gain_IIRCoeff_EXT (0x1ABU) +#define EXT_1_ADCMON_Gain_IIRCoeff_EXT (0x1B0U) + +#endif /* PMIC_REGISTER_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/qos.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/qos.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/qos.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/qos.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ram_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ram_def.h new file mode 100644 index 00000000..5b4dfb27 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ram_def.h @@ -0,0 +1,84 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : R-Car RAM header + ******************************************************************************/ + +#ifndef RAM_DEF_H_ +#define RAM_DEF_H_ + +#include "remap_register.h" + +/* DRAM address */ +#define DRAM_BASE (0x40000000U) +#define DRAM_SIZE (0x80000000U) +#define DRAM_END ((DRAM_BASE + DRAM_SIZE) - 1U) +#define SDRAM_40BIT_ADDR_TOP (0x0400000000ULL) +/* RT-SRAM */ +#define RTSRAM_BASE (0xEB200000U) +#define RTSRAM_SIZE ((1024U - 16U) * 1024U) /* 1MB - 16KB(stack size) */ +#define RTSRAM_END ((RTSRAM_BASE + RTSRAM_SIZE) - 1U) +/* RT-VRAM */ +#define RTVRAM_BASE (0xE2000000U) +#define RTVRAM_SIZE (1024U * 1024U) /* 1MB */ +#define RTVRAM_END ((RTVRAM_BASE + RTVRAM_SIZE) - 1U) +/* RT-VRAM extend mode */ +#define RTVRAM_VBUF_TOP (RTVRAM_BASE + RTVRAM_SIZE) /* 0xE2100000 */ +#define RTVRAM_VBUF_4M (4U) /* 4MB */ +#define RTVRAM_VBUF_8M (8U) /* 8MB */ +#define RTVRAM_VBUF_12M (12U) /* 12MB */ +#define RTVRAM_VBUF_16M (16U) /* 16MB */ +#define RTVRAM_VBUF_20M (20U) /* 20MB */ +#define RTVRAM_VBUF_24M (24U) /* 24MB */ +#define RTVRAM_VBUF_28M (28U) /* 28MB */ +#define RTVRAM_VBUF_SIZE ((RTVRAM_VBUF_28M - 1U) * 1024U * 1024U) /* 3MB to 27MB (The first 1MB is actual RAM.) */ +#define RTVRAM_VBUF_AREA_SIZE (4U * 1024U * 1024U) /* 4MB */ +#define RTVRAM_VBUF_END ((RTVRAM_VBUF_TOP + RTVRAM_VBUF_SIZE) - 1U) + +/* Code SRAM */ +#if (BOOT_MCU != 0U) +#define CODESRAM_BASE (0x10000000U) +#define CODESRAM_SIZE (6U * 1024U * 1024U) /* 6MB */ +#define CODESRAM_END ((CODESRAM_BASE + CODESRAM_SIZE) - 1U) +#endif /* (BOOT_MCU != 0U) */ + +/* System RAM */ +#define SYSRAM_BASE (0xE6300000U) +#if (RCAR_LSI == RCAR_V4H) +#define SYSRAM_SIZE (1024U * 1024U) /* 1MB */ +#else +#define SYSRAM_SIZE (384U * 1024U) /* 384KB */ +#endif +#define SYSRAM_END ((SYSRAM_BASE + SYSRAM_SIZE) - 1U) + +/* Local RAM */ +#define LOCAL_RAM_BASE (0xFEDE0000U) +#define LOCAL_RAM_SIZE (0x00020000U) /* 128KB */ +#define LOCAL_RAM_END ((LOCAL_RAM_BASE + LOCAL_RAM_SIZE) - 1U) + +/* Data-SRAM */ +#define DATA_SRAM_BASE (0xDF200000U) + +#endif /* RAM_DEF_H_ */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ram_protection.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_protection.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/ram_protection.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rcar_def.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/remap.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/remap.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/remap_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/remap_register.h new file mode 100644 index 00000000..f02a88f5 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/remap_register.h @@ -0,0 +1,284 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : remap register header + ******************************************************************************/ + +#ifndef REMAP_REGISTER_H_ +#define REMAP_REGISTER_H_ + +#include + +#define REMAP_BASE (0xFF1FC400U) + +#define ICUMX_PROT0PCMD (0xFFFEE090U) +#define ICUMX_PROT0PS (0xFFFEE094U) +#define PROTCMD_START (0xA5U) +#define PROTS0ERR (0x01U) + +#define ICU_REMAP0 (0xFC000000U) + +/* REMAP setting */ +/* Remap ID(0 -- 15) */ +#define ICU_REMAP_NUM_RTRAM (15U) /* RTRAM */ +#define ICU_REMAP_NUM_CC (14U) /* CC63S,AXMM,QoS for S4 / V4H */ +#define ICU_REMAP_NUM_FCPR (14U) /* FCPR for V4M */ +#define ICU_REMAP_NUM_PFC (13U) /* PFC,GPIO,CPGA,RESET */ +#define ICU_REMAP_NUM_ECM (12U) /* ECM,AP-System Core */ +#define ICU_REMAP_NUM_RPC (11U) /* RPC */ +#define ICU_REMAP_NUM_RTDMAC (10U) /* RT-DMAC0,PFC(MCU) */ +#define ICU_REMAP_NUM_SCIF (9U) /* SCIF */ +#define ICU_REMAP_NUM_MMC (8U) /* MMC */ +#define ICU_REMAP_NUM_HSCIF (7U) /* HSCIF */ +#define ICU_REMAP_NUM_DMAC (6U) /* SYS-DMAC0 */ +#define ICU_REMAP_NUM_RGID (5U) /* Region ID */ +#if (RCAR_LSI == RCAR_S4) +#define ICU_REMAP_NUM_MCU (4U) /* MCU */ +#endif + +/* SICREMAP2M15 */ +#define ICU_REMAP_RTSRAM (0xEB200000U) /* RT-SRAM */ +/* SICREMAP2M14 */ +#define ICU_REMAP_CC (0xE6600000U) /* CC63S,AXMM,QoS,FCPR for S4 / V4H */ +/* SICREMAP2M14 */ +#define ICU_REMAP_FCPR (0xE6600000U) /* FCPR for V4M */ +/* SICREMAP2M13 */ +#define ICU_REMAP_PFC (0xE6000000U) /* PFC,GPIO,CPGA,RESET */ +/* SICREMAP2M12 */ +#define ICU_REMAP_ECM (0xE6200000U) /* ECM,AP-System Core */ +/* SICREMAP2M11 */ +#define ICU_REMAP_RPC (0xEE200000U) /* RPC */ +/* SICREMAP2M10 */ +#define ICU_REMAP_RTDMAC (0xFFC00000U) /* RT-DMAC0,PFC(MCU) */ +/* SICREMAP2M9 */ +#if (RCAR_LSI == RCAR_S4) +#define ICU_REMAP_SCIF (0xE6C00000U) /* SCIF3 */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define ICU_REMAP_SCIF (0xE6E00000U) /* SCIF0 */ +#endif /* RCAR_LSI == RCAR_S4 */ +/* SICREMAP2M8 */ +#define ICU_REMAP_MMC (0xEE000000U) /* MMC */ +/* SICREMAP2M7 */ +#define ICU_REMAP_HSCIF (0xE6400000U) /* HSCIF */ +/* SICREMAP2M6 */ +#define ICU_REMAP_DMAC (0xE7200000U) /* SYS-DMAC0 */ +/* SICREMAP2M5 */ +#define ICU_REMAP_RGID (0xE7600000U) /* Region ID */ +#if (RCAR_LSI == RCAR_S4) +/* SICREMAP2M4 */ +#define ICU_REMAP_MCU (0xD8E00000U) /* MCU */ +#endif + +#define ICU_REMAP15_BASE (ICU_REMAP_RTRAM) /* RTRAM */ +#define ICU_REMAP14_BASE (ICU_REMAP_CC) /* CC63S,AXMM,QoS,FCPR */ +#define ICU_REMAP13_BASE (ICU_REMAP_PFC) /* PFC,GPIO,CPGA,RESET */ +#define ICU_REMAP12_BASE (ICU_REMAP_ECM) /* ECM,AP-System Core */ +#define ICU_REMAP11_BASE (ICU_REMAP_RPC) /* RPC */ +#define ICU_REMAP10_BASE (ICU_REMAP_RTDMAC) /* RT-DMAC0 */ +#define ICU_REMAP9_BASE (ICU_REMAP_SCIF) /* SCIF */ +#define ICU_REMAP8_BASE (ICU_REMAP_MMC) /* MMC */ +#define ICU_REMAP7_BASE (ICU_REMAP_HSCIF) /* HSCIF */ +#define ICU_REMAP6_BASE (ICU_REMAP_DMAC) /* SYS-DMAC0 */ +#define ICU_REMAP5_BASE (ICU_REMAP_RGID) /* Region ID */ +#if (RCAR_LSI == RCAR_S4) +#define ICU_REMAP4_BASE (ICU_REMAP_MCU) /* MCU */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define ICU_REMAP4_BASE (0x00000000U) /* Reserved */ +#endif +#define ICU_REMAP3_BASE (0x00000000U) /* Reserved */ +#define ICU_REMAP2_BASE (0x00000000U) /* Reserved */ +#define ICU_REMAP1_BASE (0x00000000U) /* Reserved */ +#define ICU_REMAP0_BASE (0x00000000U) /* Reserved */ + +/* Base address offset of each register after remap */ +/* REMAP15(0xEB200000U) */ +/* RT-SRAM */ +#define ICU_REMAP_OFFSET_RTSRAM (0x00000000U) + +/* REMAP14(0xE6600000U) */ +#define ICU_REMAP_OFFSET_CC63S (0x00000000U) +#define ICU_REMAP_OFFSET_DBSC (0x00190000U) /* (0xE6790000U) */ +#define ICU_REMAP_OFFSET_AXMM (0x00180000U) /* (0xE6780000U) */ +#if (RCAR_LSI == RCAR_S4) +#define ICU_REMAP_OFFSET_CCI (0x001a0000U) /* (0xE67A0000U) */ +#define ICU_REMAP_OFFSET_QOS (0x001e0000U) /* (0xE67E0000U) */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define ICU_REMAP_OFFSET_FCPR (0x00185700U) /* (0xE6785700U) */ + #if (RCAR_LSI == RCAR_V4M) + #define ICU_REMAP_OFFSET_I2C3 (0x000D0000U) /* (0xE66D0000U) */ + #endif /* (RCAR_LSI == RCAR_V4M) */ + #define ICU_REMAP_OFFSET_I2C5 (0x000E0000U) /* (0xE66E0000U) */ +#endif /* (RCAR_LSI == RCAR_S4) */ + +/* REMAP13(0xE6000000U) */ +/* RWDT */ +#define ICU_REMAP_OFFSET_RWDT (0x00020000U) +/* SWDT */ +#define ICU_REMAP_OFFSET_SWDT (0x00030000U) +/* PFC */ +#define ICU_REMAP_OFFSET_PFC (0x00050000U) +/* EFUSE */ +#define ICU_REMAP_OFFSET_EFUSE (0x00078800U) +/* CPGA */ +#define ICU_REMAP_OFFSET_CPGA (0x00150000U) +/* RESET */ +#define ICU_REMAP_OFFSET_RESET (0x00160000U) +/* APMU */ +#define ICU_REMAP_OFFSET_APMU (0x00170000U) +/* SYSC */ +#define ICU_REMAP_OFFSET_SYSC (0x00180000U) +/* TSC */ +#define ICU_REMAP_OFFSET_TSC (0x00198000U) +/* OTP */ +#define ICU_REMAP_OFFSET_OTP (0x001BF000U) +#if (RCAR_LSI == RCAR_V4M) +#define ICU_REMAP_OFFSET_AVS (0x000A0000U) /* (0xE60A0000U) */ +#endif /* (RCAR_LSI == RCAR_V4M) */ + +/* REMAP12(0xE6200000U) */ +/* ECM */ +#define ICU_REMAP_OFFSET_MFIS (0x00060000U) +#define ICU_REMAP_OFFSET_SDRAM_ECC (0x00050000U) +#define ICU_REMAP_OFFSET_AP_CORE (0x00080000U) + +/* REMAP11(0xEE200000U) */ +/*RPC*/ +#define ICU_REMAP_OFFSET_RPC (0x00000000U) + +/* REMAP10(0xFFC00000U) */ +/* RT-DMA */ +#define ICU_REMAP_OFFSET_RTDMA0 (0x00010000U) +#define ICU_REMAP_OFFSET_RTDMACTL (0x00160000U) +#define ICU_REMAP_OFFSET_PFCMCU (0x00190000U) + +#if (RCAR_LSI == RCAR_S4) +/* REMAP9(0xE6C00000U) */ +/*SCIF*/ +#define ICU_REMAP_OFFSET_SCIF3 (0x00050000U) +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +/* REMAP9(0xE6E00000U) */ +/*SCIF*/ +#define ICU_REMAP_OFFSET_SCIF0 (0x00060000U) +#endif /* RCAR_LSI == RCAR_S4 */ + +/* REMAP8(0xEE000000U) */ +/* SDHI2/MMC0 */ +#define ICU_REMAP_OFFSET_SDHI (0x00140000U) + +/* REMAP7(0xE6400000U) */ +/* HSCIF */ +#define ICU_REMAP_OFFSET_HSCIF0 (0x00140000U) + +/* REMAP6(0xE7200000U) */ +/* SYS-DMAC */ +#define ICU_REMAP_OFFSET_SYSDMAC (0x00100000U) + +/* REMAP5(0xE7600000U) */ +/* Region ID */ +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define ICU_REMAP_OFFSET_ICISTP (0x00100000U) +#endif +#define ICU_REMAP_OFFSET_RGID (0x00150000U) + +#if (RCAR_LSI == RCAR_S4) +/* REMAP4(0xD8E00000U) */ +/* MCU */ +#define ICU_REMAP_OFFSET_MCU (0x00100000U) +#endif + +/* REMAP15(0xEB200000U) */ +#define BASE_RTSRAM_ADDR (icu_remap_calc(ICU_REMAP_NUM_RTRAM) + ICU_REMAP_OFFSET_RTSRAM) +/* REMAP14(0xE6600000U) */ +#define BASE_DBSC_ADDR (icu_remap_calc(ICU_REMAP_NUM_CC) + ICU_REMAP_OFFSET_DBSC) +#define BASE_AXMM_ADDR (icu_remap_calc(ICU_REMAP_NUM_CC) + ICU_REMAP_OFFSET_AXMM) +#if (RCAR_LSI == RCAR_S4) +#define BASE_CCI_ADDR (icu_remap_calc(ICU_REMAP_NUM_CC) + ICU_REMAP_OFFSET_CCI) +#define BASE_QOS_ADDR (icu_remap_calc(ICU_REMAP_NUM_CC) + ICU_REMAP_OFFSET_QOS) +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define BASE_FCPR_ADDR (icu_remap_calc(ICU_REMAP_NUM_CC) + ICU_REMAP_OFFSET_FCPR) + #if (RCAR_LSI == RCAR_V4M) + #define BASE_I2C3_ADDR (icu_remap_calc(ICU_REMAP_NUM_CC) + ICU_REMAP_OFFSET_I2C3) + #endif /* (RCAR_LSI == RCAR_V4M) */ + #define BASE_I2C5_ADDR (icu_remap_calc(ICU_REMAP_NUM_CC) + ICU_REMAP_OFFSET_I2C5) +#endif /* (RCAR_LSI == RCAR_S4) */ +/* REMAP13(0xE6000000U) */ +#define BASE_RWDT_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_RWDT) +#define BASE_SWDT_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_SWDT) +#define BASE_EFUSE_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_EFUSE) +#define BASE_PFC_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_PFC) +#define BASE_CPG_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_CPGA) +#define BASE_RESET_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_RESET) +#define BASE_APMU_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_APMU) +#define BASE_SYSC_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_SYSC) +#define BASE_TSC_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_TSC) +#define BASE_OTP_MEM_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_OTP) +#if (RCAR_LSI == RCAR_V4M) +#define BASE_AVS_ADDR (icu_remap_calc(ICU_REMAP_NUM_PFC) + ICU_REMAP_OFFSET_AVS) +#endif /* (RCAR_LSI == RCAR_V4M) */ +/* REMAP12(0xE6200000U) */ +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define BASE_ECM_ADDR (icu_remap_calc(ICU_REMAP_NUM_ECM) + ICU_REMAP_OFFSET_SDRAM_ECC) +#endif +#define BASE_MFIS_ADDR (icu_remap_calc(ICU_REMAP_NUM_ECM) + ICU_REMAP_OFFSET_MFIS) +#define BASE_ECC_ADDR (icu_remap_calc(ICU_REMAP_NUM_ECM) + ICU_REMAP_OFFSET_SDRAM_ECC) +#define BASE_AP_CORE_ADDR (icu_remap_calc(ICU_REMAP_NUM_ECM) + ICU_REMAP_OFFSET_AP_CORE) +/* REMAP11(0xEE200000U) */ +#define BASE_RPC_ADDR (icu_remap_calc(ICU_REMAP_NUM_RPC) + ICU_REMAP_OFFSET_RPC) +/* REMAP10(0xFFC00000U) */ +#define BASE_RTDMA0_ADDR (icu_remap_calc(ICU_REMAP_NUM_RTDMAC) + ICU_REMAP_OFFSET_RTDMA0) +#define BASE_RTDMACTL_ADDR (icu_remap_calc(ICU_REMAP_NUM_RTDMAC) + ICU_REMAP_OFFSET_RTDMACTL) +#if (RCAR_LSI == RCAR_S4) +#define BASE_PFCMCU_ADDR (icu_remap_calc(ICU_REMAP_NUM_RTDMAC) + ICU_REMAP_OFFSET_PFCMCU) +#endif +#if (RCAR_LSI == RCAR_S4) +/* REMAP9(0xE6C00000U) */ +#define BASE_SCIF_ADDR (icu_remap_calc(ICU_REMAP_NUM_SCIF) + ICU_REMAP_OFFSET_SCIF3) +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +/* REMAP9(0xE6E00000U) */ +#define BASE_SCIF_ADDR (icu_remap_calc(ICU_REMAP_NUM_SCIF) + ICU_REMAP_OFFSET_SCIF0) +#endif /* RCAR_LSI == RCAR_S4 */ +/* REMAP8(0xEE000000U) */ +#define BASE_MMC0_ADDR (icu_remap_calc(ICU_REMAP_NUM_MMC) + ICU_REMAP_OFFSET_SDHI) +/* REMAP7(0xE6400000U) */ +#define BASE_HSCIF_ADDR (icu_remap_calc(ICU_REMAP_NUM_HSCIF) + ICU_REMAP_OFFSET_HSCIF0) +/* REMAP6(0xE7200000U) */ +#define BASE_DMA_ADDR (icu_remap_calc(ICU_REMAP_NUM_DMAC) + ICU_REMAP_OFFSET_SYSDMAC) +/* REMAP5(0xE7600000U) */ +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define BASE_ICISTP_ADDR (icu_remap_calc(ICU_REMAP_NUM_RGID) + ICU_REMAP_OFFSET_ICISTP) +#endif +#define BASE_RGID_ADDR (icu_remap_calc(ICU_REMAP_NUM_RGID) + ICU_REMAP_OFFSET_RGID) +#if (RCAR_LSI == RCAR_S4) +/* REMAP4(0xD8E00000U) */ +#define BASE_MCU_ADDR (icu_remap_calc(ICU_REMAP_NUM_MCU) + ICU_REMAP_OFFSET_MCU) +#endif + +/* Calculate the base address of each register after remapping */ +static inline uint32_t icu_remap_calc(uint32_t num) +{ + return (ICU_REMAP0 + (num * 0x00200000U)); +} +/* End of function icu_remap_calc(uint32_t num) */ + +#endif /* REMAP_REGISTER_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rom_api.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rom_api.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rom_api.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rom_api.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpc.h new file mode 100644 index 00000000..321bc300 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpc.h @@ -0,0 +1,74 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RPC driver header + ******************************************************************************/ + +#ifndef RPC_H__ +#define RPC_H__ + +#include +// #include + +/* If user customizes for another vendor's QSPI Flash, set to 1. */ +#define USER_ADDED_QSPI (1U) /* 0:Disable 1:Enable */ + +/* For return value */ +#define QSPI_CMD_INIT_SUCCESS (0x00000000U) +#define QSPI_CMD_INIT_ERROR (0xFFFFFFFFU) +/* Common command for QSPI Flash */ +#define FLASH_CMD_READ_ID (0x9FU) +/* Device ID mask for QSPI Flash */ +#define DEVICE_ID_MASK (0x00FFFFFFU) + +/* QSPI Flash device ID */ +#define DEVID_MT25QU01GB (0x0021BB20U) /* MT25QU01GB for PRK3 rev3 */ +#if USER_ADDED_QSPI == 1 +#define DEVID_XXXXXXXXX (0x003B25C2U) /* MX66U1G45G for PRK3 rev4 */ +#endif /* USER_ADDED_QSPI == 1 */ + +typedef struct { + uint32_t read_fast; + uint32_t sector_erase_4byte_addr; + uint32_t parameter_4kbyte_erase; + uint32_t pp_4byte_addr; + uint32_t read_any_register; + uint32_t read_stts_register; + uint32_t write_enable; + uint32_t read_32bit_addr; + uint32_t ddr_quad_io_read_32bit_addr; +} st_qspi_cmd_tbl_t; + +extern const st_qspi_cmd_tbl_t* gp_qspi_cmd_tbl; +extern uint8_t prk3_rev; + +void rpc_init(void); +void rpc_release(void); +void rpc_end_state_check(void); +void qspi_flash_rw_init(void); +int check_Erase_Fail(uint32_t status); + +void qspi_ddr_transfer_mode(uint32_t command); +void qspi_sdr_transfer_mode(uint32_t command); +#endif /* RPC_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpc_register.h new file mode 100644 index 00000000..83448495 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpc_register.h @@ -0,0 +1,171 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RPC register header + ******************************************************************************/ + +#ifndef RPC_REGISTER_H_ +#define RPC_REGISTER_H_ + + +#include + +/* RPC base address */ +/* 0xEE200000 */ +#define RPC_BASE (BASE_RPC_ADDR) + +#define RPC_CMNCR (RPC_BASE + 0x0000U) /* Common control register */ +#define RPC_SSLDR (RPC_BASE + 0x0004U) /* R/W */ +#define RPC_DRCR (RPC_BASE + 0x000CU) /* Data read control register */ +#define RPC_DRCMR (RPC_BASE + 0x0010U) /* Data read command setting register */ +#define RPC_DREAR (RPC_BASE + 0x0014U) /* Data read extended address register */ +#define RPC_DRENR (RPC_BASE + 0x001CU) /* Data read enable setting register */ +#define RPC_SMCR (RPC_BASE + 0x0020U) /* Manual mode control register */ +#define RPC_SMCMR (RPC_BASE + 0x0024U) /* Manual mode command setting register */ +#define RPC_SMADR (RPC_BASE + 0x0028U) /* R/W */ +#define RPC_SMOPR (RPC_BASE + 0x002CU) /* R/W */ +#define RPC_SMENR (RPC_BASE + 0x0030U) /* Manual mode enable setting register */ +#define RPC_SMRDR0 (RPC_BASE + 0x0038U) /* Manual mode read data register 0 */ +#define RPC_SMRDR1 (RPC_BASE + 0x003CU) /* R */ +#define RPC_SMWDR0 (RPC_BASE + 0x0040U) /* R/W */ +#define RPC_CMNSR (RPC_BASE + 0x0048U) /* Common status register */ +#define RPC_DRDMCR (RPC_BASE + 0x0058U) /* Data read Dummy Cycle setting register */ +#define RPC_DRDRENR (RPC_BASE + 0x005CU) /* Data read DDR enable register */ +#define RPC_SMDMCR (RPC_BASE + 0x0060U) /* R/W */ +#define RPC_SMDRENR (RPC_BASE + 0x0064U) /* Manual mode DDR enable register */ +#define RPC_PHYCNT (RPC_BASE + 0x007CU) /* PHY control register */ +#define RPC_PHYOFFSET1 (RPC_BASE + 0x0080U) /* PHY Timing Offset Register 1 */ +#define RPC_OFFSET1 RPC_PHYOFFSET1 +#define RPC_PHYINT (RPC_BASE + 0x0088U) /* R/W */ +#define RPC_WRBUF (RPC_BASE + 0x8000U) /* W RPC Write buffer (Access size=4/8/16/32/64Byte) */ +#define RPC_WRBUF_PHYS (0xEE208000) + +/* for RPC register setting */ +#define RPC_PHYCNT_CAL (1U << 31U) +#define RPC_PHYCNT_STRTIM3 (1U << 27U) +#define RPC_PHYCNT_HS (1U << 18U) +#define RPC_PHYCNT_STRTIM2 (1U << 17U) +#define RPC_PHYCNT_STRTIM1 (1U << 16U) +#define RPC_PHYCNT_STRTIM0 (1U << 15U) +#define RPC_PHYCNT_WBUF2 (1U << 4U) +#define RPC_PHYCNT_WBUF (1U << 2U) +#define RPC_PHYCNT_PHYMEM_HYP (3U << 0U) +#define CMNCR_MD_MANUAL (1U << 31U) +#define CMNCR_MOIIO3_HIZ (3U << 22U) +#define CMNCR_MOIIO2_HIZ (3U << 20U) +#define CMNCR_MOIIO1_HIZ (3U << 18U) +#define CMNCR_MOIIO0_HIZ (3U << 16U) +#define CMNCR_IO0FV_HIZ (3U << 8U) +#define CMNCR_BSZ_HYP (1U << 0U) +#define CMNCR_BSZ_MASK (3U << 0U) +#define SSLDR_SLNDL (4U << 8U) +#define DRCR_SSLN (1U << 24U) +#define DRCR_RBURST_32UNITS (0x1FU << 16U) +#define DRCR_RCF (1U << 9U) +#define DRCR_RBE_BURST (1U << 8U) +#define DRCR_SSLE (1U << 0U) +#define DRCMR_S26KS512S (0xA0U << 16U) +#define DRCMR_CMD_MASK (0xFFU << 16U) +#define DRCMR_OCMD_MASK (0xFFU << 0U) +#define DREAR_EAC_26BITS (1U << 0U) +#define DREAR_EAV_MASK (0xFFU << 16U) +#define DREAR_EAC_MASK (7U << 0U) +#define DRENR_CDB_4BITS (2U << 30U) +#define DRENR_OCDB_4BITS (2U << 28U) +#define DRENR_ADB_4BITS (2U << 24U) +#define DRENR_OPDB_4BITS (2U << 20U) +#define DRENR_DRDB_4BITS (2U << 16U) +#define DRENR_DME_EN (1U << 15U) +#define DRENR_CDE_EN (1U << 14U) +#define DRENR_OCDE_EN (1U << 12U) +#define DRENR_ADE_HYPER (4U << 8U) +#define DRENR_ADE_ONE_SERIAL (0xFU << 8U) +#define DRENR_CDB_MASK (3U << 30U) +#define DRENR_OCDB_MASK (3U << 28U) +#define DRENR_ADB_MASK (3U << 24U) +#define DRENR_OPDB_MASK (3U << 20U) +#define DRENR_DRDB_MASK (3U << 16U) +#define DRENR_ADE_MASK (0xFU << 8U) +#define DRENR_OPDE_MASK (0xFU << 4U) +#define SMCR_SSLKP (1U << 8U) +#define SMCR_SPIRE (1U << 2U) +#define SMCR_SPIWE (1U << 1U) +#define SMCR_SPIE (1U << 0U) +#define SMCMR_HYP_READ (0x80U << 16U) +#define SMCMR_HYP_WRITE (0x00U << 16U) +#define SMCMR_CMD_MASK (0xFFU << 16U) +#define SMCMR_OCMD_MASK (0xFFU << 0U) +#define SMOPR_OPD3_MASK (0xFFU << 24U) +#define SMOPR_OPD2_MASK (0xFFU << 16U) +#define SMOPR_OPD1_MASK (0xFFU << 8U) +#define SMOPR_OPD0_MASK (0xFFU << 0U) +#define SMENR_CDB_4BITS (2U << 30U) +#define SMENR_OCDB_4BITS (2U << 28U) +#define SMENR_ADB_4BITS (2U << 24U) +#define SMENR_OPDB_4BITS (2U << 20U) +#define SMENR_SPIDB_4BITS (2U << 16U) +#define SMENR_DME_EN (1U << 15U) +#define SMENR_CDE_EN (1U << 14U) +#define SMENR_OCDE_EN (1U << 12U) +#define SMENR_ADE_HYPER (4U << 8U) +#define SMENR_ADE_SERIAL_31 (0xFU << 8U) +#define SMENR_ADE_SERIAL_23 (7U << 8U) +#define SMENR_SPIDE_HYP_16 (8U << 0U) +#define SMENR_SPIDE_HYP_32 (0xCU << 0U) +#define SMENR_SPIDE_HYP_64 (0xFU << 0U) +#define SMENR_SPIDE_SPI_8 (8U << 0U) +#define SMENR_SPIDE_SPI_16 (0xCU << 0U) +#define SMENR_SPIDE_SPI_32 (0xFU << 0U) +#define SMENR_CDB_MASK (3U << 30U) +#define SMENR_OCDB_MASK (3U << 28U) +#define SMENR_ADB_MASK (3U << 24U) +#define SMENR_OPDB_MASK (3U << 20U) +#define SMENR_SPIDB_MASK (3U << 16U) +#define SMENR_ADE_MASK (0xFU << 8U) +#define SMENR_OPDE_MASK (0xFU << 4U) +#define SMENR_SPIDE_MASK (0xFU << 0U) +#define CMNSR_TEND (0x00000001U) +#define DRDMCR_DMCYC_15 (0xEU << 0U) +#define DRDMCR_DMCYC_8 (7U << 0U) +#define DRDMCR_DMCYC_MASK (0x1FU << 0U) +#define DRDRENR_HYPE_HYPER (5U << 12U) +#define DRDRENR_ADDRE (1U << 8U) +#define DRDRENR_OPDRE (1U << 4U) +#define DRDRENR_DRDRE (1U << 0U) +#define DRDRENR_HYPE_MASK (7U << 12U) +#define SMDMCR_DMCYC_15 (0xEU << 0U) +#define SMDMCR_DMCYC_8 (7U << 0U) +#define SMDMCR_DMCYC_MASK (0x1FU << 0U) +#define SMDRENR_HYPE_HYPER (5U << 12U) +#define SMDRENR_ADDRE (1U << 8U) +#define SMDRENR_OPDRE (1U << 4U) +#define SMDRENR_SPIDRE (1U << 0U) +#define SMDRENR_HYPE_MASK (7U << 12U) +#define PHYOFFSET1_HYPER (0x21511144U) +#define PHYOFFSET1_DMA_QSPI (0x31511144U) +#define PHYOFFSET1_MASK (0xFFFFFFFFU) +#define PHYINT_HYPER (0x07070002U) +#define PHYINT_MASK (0xFFFFFFFFU) + +#endif /* RPC_REGISTER_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpcqspidrv.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpcqspidrv.h new file mode 100644 index 00000000..769fda08 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rpcqspidrv.h @@ -0,0 +1,78 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2015-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RPC driver for QSPI Flash header + ******************************************************************************/ +/****************************************************************************** + * @file rpcqspidrv.h + * - Version : 0.03 + * @brief RPC driver for QSPI Flash header + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 16.02.2022 0.01 First Release + * : 01.04.2022 0.02 Add definitions. + * : 09.11.2022 0.03 License notation change. + *****************************************************************************/ + +#ifndef RPCQSPIDRV_H__ +#define RPCQSPIDRV_H__ + +#include +#include + +#define SPI_IOADDRESS_TOP 0x08000000 /* RPC memory space 0x08000000-0x0BFFFFFF = 64MBytes */ +#define RPC_CLK_40M 0x01 +#define RPC_CLK_80M 0x02 +#define RPC_CLK_160M 0x03 + +#define DEVICE_ID_MASK (0x00FFFFFFU) + +#define RPC_WRITE_BUF_SIZE (0x100U) /* 256byte:RPC Write Buffer size */ +#define FLASH_SECTOR_SIZE (0x00010000U) /* Flash 1sector is 64KiB */ +#define FLASH_SECTOR_MASK ((~(FLASH_SECTOR_SIZE-1)) & 0xFFFFFFFFU) + +#define DRCMR_SMCMR_CMD_SHIFT (16U) + +void init_rpc_qspi_flash_4fastread_ext_mode(void); +void init_rpc_qspi_flash(void); +void sector_erase_4byte_qspi_flash(uint32_t sector_addr); +void write_data_4pp_with_buf_qspi_flash(uint32_t addr, uint32_t source_addr); +void read_any_register_qspi_flash(uint32_t addr, unsigned char *readData); /* Add24bit,Data8bit */ +void write_any_register_qspi_flash(uint32_t addr, unsigned char writeData); /* Add24bit,Data8bit */ +void set_rpc_clock_mode(uint32_t mode); +void wait_rpc_tx_end(void); + +void parameter_sector_erase_4kb_qspi_flash(uint32_t sector_addr); +void reset_rpc(void); +void set_rpc_ssl_delay(void); + +void power_on_rpc(void); +uint32_t read_wip_status_register(uint32_t *status); /* for MT25QU01GB */ +uint32_t read_qspi_flash_id(uint32_t *readData); /* for QSPIx1ch */ +uint32_t read_status_qspi_flash(uint32_t *readData); /* for QSPIx1ch */ +void write_command_qspi_flash(uint32_t command); /* for QSPIx1ch */ + +#endif /* RPCQSPIDRV_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rst_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rst_register.h new file mode 100644 index 00000000..91ba5cf2 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rst_register.h @@ -0,0 +1,57 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RST register header + ******************************************************************************/ + +#ifndef RST_REGISTER_H_ +#define RST_REGISTER_H_ + +#include + +#define RST_BASE (BASE_RESET_ADDR) /* 0xE6160000 */ + +#define RST_MODEMR0 (RST_BASE + 0x0000U) /* Mode pin register0 */ +#define RST_MODEMR1 (RST_BASE + 0x0004U) /* Mode pin register1 */ +#define RST_MODEMR0_MD31 (1U << 31U) +#define RST_MODEMR1_MD32 (1U << 0U) + +#define RST_MODEMR0_BOOT_DEV_MASK (0x0000001EU) +#define RST_MODEMR0_BOOT_DEV_HYPERFLASH160 (0x00000004U) +#define RST_MODEMR0_BOOT_DEV_HYPERFLASH80 (0x00000006U) +#define RST_MODEMR0_BOOT_DEV_SERIAL_FLASH40 (0x00000008U) +#define RST_MODEMR0_BOOT_DEV_SERIAL_FLASH (0x0000000CU) +#define RST_MODEMR0_BOOT_DEV_QSPI_FLASH80 (0x0000000EU) +#define RST_MODEMR0_BOOT_DEV_HYPER_XIP160 (0x00000014U) +#define RST_MODEMR0_BOOT_DEV_HYPER_XIP80 (0x00000016U) +#define RST_MODEMR0_BOOT_DEV_EMMC_50X8 (0x0000001AU) +#define RST_WDTRSTCR (RST_BASE + 0x0010U) + +/* SCIF / HSCIF clock speed */ +#define MODEMR_SCIF_DLMODE (0x00000000U) +#define MODEMR_HSCIF_DLMODE_921600 (0x00000001U) +#define MODEMR_HSCIF_DLMODE_1843200 (0x00000002U) +#define MODEMR_HSCIF_DLMODE_3000000 (0x00000003U) + +#endif /* RST_REGISTER_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtsram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rtsram_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtsram_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rtsram_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rtvram.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rtvram.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rtvram_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/rtvram_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/san.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/san.h new file mode 100644 index 00000000..c9923f8c --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/san.h @@ -0,0 +1,32 @@ +#ifndef SAN_DRIVER_H__ +#define SAN_DRIVER_H__ +#include + + +/* Test function: return true on pass, false on fail */ +typedef bool (*fusa_test_fn)(void); + +/** + * struct fusa_test_case - FuSa test descriptor + * @name: short name for logs + * @run: test function pointer (no args, boolean result) + */ +struct fusa_test_case { + char *name; + fusa_test_fn run; +}; + +/* Public API */ +extern void fusa_run_soc_activation_tests(void); +extern void fusa_init_external_pins(void); + +/* Helpers */ +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) +#endif + +/* Optional readability for debug GPIO level */ +#define GPIO_LOW 0 +#define GPIO_HIGH 1 + +#endif /* SAN_DRIVER_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scif_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scif_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt.h new file mode 100644 index 00000000..1cd5896a --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt.h @@ -0,0 +1,20 @@ +#ifndef SCMT_H_ +#define SCMT_H_ + +/* This code will also work with SUCMT, just be aware of it using RCLK instead of OSCCLK! */ + +/* Start SCMT timer. + Will set GPIO=HIGH if requested by SCMT_TOGGLE_GPIO */ +void scmt_module_start(void); + +/* Fetch SCMT timer value. + Will set GPIO=LOW again after several calls if requested by SCMT_TOGGLE_GPIO */ +uint32_t scmt_module_read(void); + +/* Wait for a specific number of ticks + - ticks: SCMT timer ticks to wait. Use SCMT_MS2TICKS)(ms) if you want to wait in milliseconds + + NOT SAFE FOR OVERLFOWS: Don't use if expected to run for over 9 hours */ +void scmt_wait_ticks(uint32_t ticks); + +#endif diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_checkpoint.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_checkpoint.h new file mode 100644 index 00000000..a346e114 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_checkpoint.h @@ -0,0 +1,26 @@ +#ifndef SCMT_CHECKPOINT_H_ +#define SCMT_CHECKPOINT_H_ + +#include "scmt_config.h" + +#if 1 == (MEASURE_TIME) + +/* Store a checkpoint: + Fetch current counter value and store it together with: + - note: A pointer to a STATIC string. String must still be available when print_time_checkpoints() is called! + - data: Arbitrary data for later analysis (e.g. amount of data transferred) */ +void store_time_checkpoint(char * note, uint32_t data); + +/* Print checkpoints: + Outputs all measurements to serial output. */ +void print_time_checkpoints(void); + +#else +/* If measurement is disabled, still provide empty functions, so user won't need to comment out all function calls. */ + +static inline void store_time_checkpoint(char * note, uint32_t data) { (void)note; (void)data; } +static inline void print_time_checkpoints(void) {} + +#endif /* MEASURE_TIME */ + +#endif diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_config.h new file mode 100644 index 00000000..13c76b36 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_config.h @@ -0,0 +1,80 @@ +#ifndef SCMT_CONFIG_H_ +#define SCMT_CONFIG_H_ + +/* Activate measurement functions. Provide dummy functions otherwise */ +#ifndef MEASURE_TIME +#define MEASURE_TIME (0) +#endif + +/* Replace printing by dummy function. This will keep timer init, but removes impact of printing on system performance */ +#ifndef MEASURE_TIME_NOPRINT +#define MEASURE_TIME_NOPRINT (0) +#endif + +/* Only first IPL should init the timer. + In case of bus access issues, you can check addresses and register values with SCMT_DEBUG. + (Dont forget to add a call to scmt_module_start then and set debug level to NOTICE(2). ) */ +#define SCMT_INIT (1) +#define SCMT_DEBUG (0) + +/* SCMT base address */ +/* V4H:0xE6040000 */ +/* V4H-ICUMX: 0xFC000000 + (13*0x00200000) + 0x00040000 = 0xFDA40000 */ +#define SCMT_BASE (0xFDA40000) + +/* For boot time measurement, you can signal the start of SCMT by GPIO pin toggle */ +/* See code for adaption of toggled pin */ +#define SCMT_TOGGLE_GPIO (1) + +/* SCMT is counting with OSCCLK = 131.57 kHz */ +/* Tick = 7.6 µs*/ +/* Full 32-bit wrap around therefore: 32643 seconds == 9.07 hours */ +/* NOTE: WRAPAROUND HANDLING NOT IMPLEMENTED! */ +#define SCMT_MS2TICKS(ms) ((ms)*131.579) + +/* If the startup time until start of SCMT is known, we can set it as start value of the timer to see absolute time right away */ +//#define SCMT_START_VALUE (0) /* No offset, add offset using your spreadsheet program */ +//#define SCMT_START_VALUE (2750) /* 20.9ms with MODEMR[1:0]: 0x0 0x801105a4 > ICUMX Boot from HyperFlash 160MHz, Unsecure Boot */ +//#define SCMT_START_VALUE (2842) /* 21.6ms with MODEMR[1:0]: 0x0 0x801105a4 > ICUMX Boot from HyperFlash 80MHz, Unsecure Boot */ +//#define SCMT_START_VALUE (2974) /* 22.6ms with MODEMR[1:0]: 0x0 0x801105a8 > ICUMX Boot from SerialFlash 133MHz QuadIO, Unsecure Boot */ +//#define SCMT_START_VALUE (3237) /* 24.6ms with MODEMR[1:0]: 0x0 0x801105a8 > ICUMX Boot from SerialFlash 80MHz QuadIO, Unsecure Boot */ +#define SCMT_START_VALUE (7184) /* 54.6ms with MODEMR[1:0]: 0x0 0x801105a8 > ICUMX Boot from SerialFlash 40MHz, Unsecure Boot */ + +/* Start a little self-test routine to check Timer-Frequency against baudrate */ +/* #define TIMER_TEST_VS_BAUD (921600) */ +#define TIMER_TEST_VS_BAUD (0) + +/* SCMT frequency slightly depends on MD-Pin settings!! See V4H UM Table 8.1.4e Note 5 */ +#define TIMER_FREQ (131578.9) + +/* Module name show in log output */ +#define MODULE "ICUMX:" + +/* Arry size for time checkpoints */ +#define TIME_CHECKPOINTS_MAX (20) + +/* Print additional infos about compiler or MODEMR register */ +#define PRINT_INFO (1) + +/* Calculates milliseconds from timer ticks. May be disabled if compiler is currently not prepared to handle floats */ +#define PRINT_FLOAT (1) + +/* PRINTING + You need to configure a way to hook into the systems print functionality +*/ + +/* Uses the ERROR macro defined by log.h - Works for ICUMX and CR Core */ +#include /* Access to ERROR() print function */ +#define PRINTFN(args...) ERROR(args) + +/* Uses facilities provided by Dummy_CA76 application */ +//#define USE_LOG_PRINTF (1) +//void log_printf(const char *fmt, ...); /* Provided by scmt_checkpoint_log.c */ +//int32_t PutChar(char outChar); /* Provided by devdrv.c */ +//#define PRINTFN(args...) {log_printf(args);} +//#define PUTFN(outChar) PutChar(outChar) + + + + +#endif diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_register.h new file mode 100644 index 00000000..b3105027 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/scmt_register.h @@ -0,0 +1,51 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : SCMT register header + ******************************************************************************/ + + +#ifndef SCMT_REGISTER_H_ +#define SCMT_REGISTER_H_ + +#include "scmt_config.h" + +/* SUCMT base address */ +/* S4-ICUMX: 0xE61D0000 */ +/* S4-G4MH: 0xD61D0000 */ + +/* SCMT base address */ +/* V4H:0xE6040000 */ +/* V4H-ICUMX: 0xFC000000 + (13*0x00200000) + 0x00040000 = 0xFDA40000 */ +/* Defined in scmt_config.h */ +/* #define SCMT_BASE (0xE6040000) */ + +/* ((( ICUMX-SUCMT: 0xFC000000 + (13*0x00200000) + 0x001D0000 = 0xFDBD0000 ))) */ + +#define SCMT_CMSSTR (SCMT_BASE + 0x0000U) /* 16 Compare match timer start register */ +#define SCMT_CMSCSR (SCMT_BASE + 0x0040U) /* 16 Compare match timer control/status register */ +#define SCMT_CMSCNT (SCMT_BASE + 0x0044U) /* 32 Compare match timer counter */ +#define SCMT_CMSCOR (SCMT_BASE + 0x0048U) /* 32 Compare match timer constant register */ + +#endif /* SCMT_REGISTER_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/spiflash2drv.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/spiflash2drv.h new file mode 100644 index 00000000..cbe813ba --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/spiflash2drv.h @@ -0,0 +1,54 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2020-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Flash driver for S25FS512S header + ******************************************************************************/ +/****************************************************************************** + * @file spiflash2drv.h + * - Version : 0.04 + * @brief Flash driver for S25FS512S header + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 16.02.2022 0.01 First Release + * : 01.04.2022 0.02 Add definitions. + * : 08.04.2022 0.03 Add include guard. + * : 09.11.2022 0.04 License notation change. + *****************************************************************************/ + +#ifndef SPIFLASH2DRV_H_ +#define SPIFLASH2DRV_H_ + +void fast_rd_qspi_flash(uint32_t sourceSpiAdd, uint32_t destinationAdd, uint32_t byteCount); +void sector_erase_NNNkb_qspi_flash_s25s512s(uint32_t addr); +void parameter_sector_erase_4kb_qspi_flash_s25s512s(uint32_t addr); +void page_program_with_buf_qspi_flash_s25s512s(uint32_t addr, uint32_t source_addr); +void clear_bp_qspi_flash(void); +void save_data_with_buf_qspi_flash(uint32_t srcAdd, uint32_t svFlashAdd, uint32_t svSize); +void sector_erase_qspi_flash(uint32_t EraseStatAdd, uint32_t EraseEndAdd); +void parameter_sector_erase_qspi_flash(uint32_t EraseStatAdd, uint32_t EraseEndAdd); + +#endif /* SPIFLASH2DRV_H_ */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/sysc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/sysc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/sysc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/sysc.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/types.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/types.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/types.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/vect_set.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/vect_set.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/vect_set.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/vect_set.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/wdt.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/wdt.h new file mode 100644 index 00000000..5c6b9c57 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/wdt.h @@ -0,0 +1,38 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : window watchdog timer function header + ******************************************************************************/ + +#ifndef WDT_H__ +#define WDT_H__ + +void wdt_init(void); +void wdt_restart(void); +void wdt_handler(void); + +void rwdt_init(int start); +void swdt_init(int start); + +#endif /* WDT_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/wdt_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/wdt_register.h new file mode 100644 index 00000000..519b2466 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/include/wdt_register.h @@ -0,0 +1,46 @@ +/******************************************************************************* + * DESCRIPTION : WDT register header + ******************************************************************************/ + +#ifndef WDT_REGISTER_H__ +#define WDT_REGISTER_H__ + +#include + +/* RWDT base address */ +/* 0xE6020000 */ +#define RWDT_BASE (BASE_RWDT_ADDR) + +/* RWDT counter */ +#define RWDT_RWTCNT (RWDT_BASE + 0x0000U) +#define RWTCNT_UPPER (0x5A5A0000) + +/* RWDT control/status A */ +#define RWDT_RWTCSRA (RWDT_BASE + 0x0004U) + +#define RWTCSRA_UPPER (0xA5A5A500) +#define RWTCSRA_TME ((1U) << 7) +#define RWTCSRA_WRFLG ((1U) << 5) +#define RWTCSRA_WOVF ((1U) << 4) +#define RWTCSRA_WOVF_E ((1U) << 3) +#define RWTCSRA_CKS0 ((0x7U)) + +/* RWDT control/status B */ +#define RWDT_RWTCSRB (RWDT_BASE + 0x0008U) + +#define RWTCSRB_CKS1 ((0x3FU)) + +/* SWDT base address */ +/* 0xE6030000 */ +#define SWDT_BASE (BASE_SWDT_ADDR) + +/* SWDT counter */ +#define SWDT_SWTCNT (SWDT_BASE + 0x0000U) + +/* SWDT control/status A */ +#define SWDT_SWTCSRA (SWDT_BASE + 0x0004U) + +/* SWDT control/status B */ +#define SWDT_SWTCSRB (SWDT_BASE + 0x0008U) + +#endif /* WDT_REGISTER_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/intc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/intc/intc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/intc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/intc/intc.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vect_set.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/intc/vect_set.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vect_set.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/intc/vect_set.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vecttbl.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/intc/vecttbl.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vecttbl.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/intc/vecttbl.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/avs/avs.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/avs/avs.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/avs/avs.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/avs/avs.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/cpg/cpg.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/cpg/cpg.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/cpg/cpg.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/cpg/cpg.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/boot_init_dram.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/boot_init_dram.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/ddr.mk b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/ddr.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/ddr.mk rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/ddr.mk diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/dram_sub_func.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/dram_sub_func.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/dram_sub_func.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/dram_sub_func.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/boot_init_dram.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/boot_init_dram_config.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/boot_init_dram_config.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/boot_init_dram_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/boot_init_dram_config.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/ddr_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/ddr_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/ecc_enable_s4.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/ecc_enable_s4.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/ecc_enable_s4.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/ecc_enable_s4.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c new file mode 100644 index 00000000..cd3acb9d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c @@ -0,0 +1,232 @@ +/******************************************************************************* + * Copyright (c) 2022-2025 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECC setting function + ******************************************************************************/ +/****************************************************************************** + * @file ecc_enable_v4h.c + * - Version : 0.07 + * @brief Enable setting process of ECC for DRAM. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 09.08.2022 0.01 First Release + * : 22.03.2023 0.02 Added AXI Timeout setting + * : 04.04.2023 0.03 Removed stdio.h and string.h. + * : 24.08.2023 0.04 Removed enable_ecc function. + * : 13.06.2024 0.05 Fix register setting for EDC_CFG, and revise + * : the ecm_lock()/ecm_unlock() process. + * : 07.04.2025 0.06 Remove unused functions. + * : 10.06.2025 0.07 Added ECMERRTGTR41/ECMERRCTLR41 register + * operations. + *****************************************************************************/ + +#include +#include +#include +#include + +#if (ECM_ENABLE == 1) +#include "ecc_enable_v4h.h" +#include "v4h/lpddr5/boot_init_dram_regdef.h" +#include "ecm_enable_v4h.h" + +#define AXI_SICREMAP_NUM (5U) +#define RGID_BASE1 (0xFE600000U) +#define RGID_BASE2 (0xE7A00000U) +#define RGID_BASE3 (0xEB800000U) +#define RGID_BASE4 (0xFD800000U) +#define RGID_BASE5 (0xFEA00000U) + +#define FDT_COUNTER_MASK (0x0000FFFFU) + +static void axi_timeout_setting(void); + +void edc_axi_enable(void) +{ + uint32_t edc_tmp; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + /* (1) Set the corresponding bits of the ECMERRTGTR and ECMERRCTLR registers + to inform the external device of the error via the ERROROUT# pin. */ + + /* Set bit 11 - bit 2 of ECMERRTGTR7 to all 0 and bit 11 - bit 2 of + ECMERRCTLR7 to 1. (Error of AXI-Bus ECM of each hierarchy) */ + edc_tmp = mem_read32(ECMERRTGTR7); + edc_tmp &= ~(0x3FFU << 2U); + ecm_write(ECMERRTGTR7, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR7); + edc_tmp |= (0x3FFU << 2U); + ecm_write(ECMERRCTLR7, edc_tmp); + + /* Set bit 28 - bit 16 of ECMERRTGTR39 to all 0 and bit 28 - bit 16 of + ECMERRCTLR39 to 1. (Error of AXI-Bus ECM of each hierarchy) */ + edc_tmp = mem_read32(ECMERRTGTR39); + edc_tmp &= ~(0x1FFFU << 16U); + ecm_write(ECMERRTGTR39, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR39); + edc_tmp |= (0x1FFFU << 16U); + ecm_write(ECMERRCTLR39, edc_tmp); + + /* Set bit 26 of ECMERRTGTR1 to 0 and bit 26 of + ECMERRCTLR1 to 1. (CCI bus EDC error) */ + edc_tmp = mem_read32(ECMERRTGTR1); + edc_tmp &= ~(0x1U << 26U); + ecm_write(ECMERRTGTR1, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR1); + edc_tmp |= (0x1U << 26U); + ecm_write(ECMERRCTLR1, edc_tmp); + + /* Set bit 9 of ECMERRTGTR41 to 0 and bit 9 of + ECMERRCTLR41 to 1. (Error of AXI-Bus ECM of VDSP hierarchy) */ + edc_tmp = mem_read32(ECMERRTGTR41); + edc_tmp &= ~(0x1U << 9U); + ecm_write(ECMERRTGTR41, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR41); + edc_tmp |= (0x1U << 9U); + ecm_write(ECMERRCTLR41, edc_tmp); + + axi_timeout_setting(); + + /* Lock the ECM registers */ + ecm_lock(); +} + +void edc_vram_enable(void) +{ + uint32_t edc_tmp; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + /* (1) Set the corresponding bits of the ECMERRTGTR and ECMERRCTLR registers + to inform the external device of the error via the ERROROUT# pin. */ + + /* Set bit 30 of ECMERRTGTR7 to 0 and bit 30 of ECMERRCTLR7 to 1. + (RT-VRAM edc 1-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR7); + edc_tmp &= ~(0x1U << 30U); + ecm_write(ECMERRTGTR7, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR7); + edc_tmp |= (0x1U << 30U); + ecm_write(ECMERRCTLR7, edc_tmp); + + /* Set bit 29 of ECMERRTGTR7 to 0 and bit 29 of ECMERRCTLR7 to 1. + (RT-VRAM edc multi-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR7); + edc_tmp &= ~(0x1U << 29U); + ecm_write(ECMERRTGTR7, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR7); + edc_tmp |= (0x1U << 29U); + ecm_write(ECMERRCTLR7, edc_tmp); + + /* Set bit 19 of ECMERRTGTR17 to 0 and bit 19 of ECMERRCTLR17 to 1. + (RT-VRAM edc 1-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR17); + edc_tmp &= ~(0x1U << 19U); + ecm_write(ECMERRTGTR17, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR17); + edc_tmp |= (0x1U << 19U); + ecm_write(ECMERRCTLR17, edc_tmp); + + /* Set bit 18 of ECMERRTGTR17 to 0 and bit 18 of ECMERRCTLR17 to 1. + (RT-VRAM edc multi-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR17); + edc_tmp &= ~(0x1U << 18U); + ecm_write(ECMERRTGTR17, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR17); + edc_tmp |= (0x1U << 18U); + ecm_write(ECMERRCTLR17, edc_tmp); + + /* Set bit 0 of EDC_CFG to 1. (EDC Error Control) */ + edc_tmp = mem_read32(EDC_CFG); + edc_tmp |= (0x1U << 0U); + mem_write32(EDC_CFG, edc_tmp); + + /* Lock the ECM registers */ + ecm_lock(); +} + +static void axi_timeout_setting(void) +{ + uint32_t reg; + uint32_t loop; + REMAP_TABLE axi_remap_tbl[AXI_SICREMAP_NUM] = { + {RGID_BASE1, 0U}, + {RGID_BASE2, 0U}, + {RGID_BASE3, 0U}, + {RGID_BASE4, 0U}, + {RGID_BASE5, 0U}, + }; + + /* Register of AXI Base */ + for (loop = 0U; loop < AXI_SICREMAP_NUM; loop++) + { + remap_register(axi_remap_tbl[loop].base_addr, &axi_remap_tbl[loop].rmp_addr); + } + + /* Set the COUNTER bits of the FDT_* registers for all safety-related modules to minimum value with 1ms or more. */ + for (loop = 0U; loop < FDT_REG_MAX; loop++) + { + reg = mem_read32(g_fdt_tbl[loop].reg_addr); + reg &= ~(FDT_COUNTER_MASK); + reg |= g_fdt_tbl[loop].value; + mem_write32(g_fdt_tbl[loop].reg_addr, reg); + + INFO("FDT[%d] =\t0x%08x \tsetting value = 0x%08x\n", loop, mem_read32(g_fdt_tbl[loop].reg_addr), g_fdt_tbl[loop].value); + } + + for(loop = 0U; loop < INTEN_REG_MAX; loop++) + { + /* Set access protection setting value of Region ID (AXI bus of Region ID register) */ + mem_write32(g_inten_tbl[loop].reg_addr, g_inten_tbl[loop].value); + + INFO("INTEN[%d] =\t0x%08x \tsetting value = 0x%08x\n", loop, mem_read32(g_inten_tbl[loop].reg_addr), g_inten_tbl[loop].value); + } + + /* Unregister of AXI Base */ + for (loop = 0U; loop < AXI_SICREMAP_NUM; loop++) + { + remap_unregister(axi_remap_tbl[loop].rmp_addr); + } + + wdt_restart(); +} +#endif /* ECM_ENABLE == 1 */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h new file mode 100644 index 00000000..833215ef --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h @@ -0,0 +1,125 @@ +/******************************************************************************* + * Copyright (c) 2022-2025 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECC driver header + ******************************************************************************/ + +#ifndef ECC_PROTECT +#define ECC_PROTECT +#include "remap_register.h" +/* DBSC registers */ +#if defined(__RH850G3K__) +#include "mem_io.h" +#include "log.h" +#define DBSC_D_BASE (BASE_DBSC_ADDR + 0x14000U) /* forV4H DBSC0 clk_dbsc region DBSC1_D_BASE = 0xE67A8000U */ +#define DBSC_A_BASE (BASE_DBSC_ADDR) /* forV4H DBSC0 clk_axim region DBSC1_A_BASE = 0xE6798000U */ +#define ECM_BASE (BASE_ECC_ADDR) +#else +#include +#include +#define DBSC_D_BASE (0xE67A4000U) /* forV4H DBSC0 clk_dbsc region DBSC1_D_BASE = 0xE67A8000U */ +#define DBSC_A_BASE (0xE6790000U) /* forV4H DBSC0 clk_axim region DBSC1_A_BASE = 0xE6798000U */ +#define ECM_BASE (0xE6250000U) +#endif/* defined(__RH850G3K__) */ + +#define RTVRAM_REG_BASE (0xFFEC0000U) + +void edc_axi_enable(void); +void edc_vram_enable(void); + +#define DB0SYSCNT0 (DBSC_D_BASE + 0x0100U) +#define DB0SYSCNT0A (DBSC_A_BASE + 0x0100U) +#define DB1SYSCNT0 (DB0SYSCNT0 + 0x4000U) +#define DB1SYSCNT0A (DB0SYSCNT0A + 0x8000U) + +#define DBSC_DBACEN0 (DBSC_A_BASE + 0x0200U) +#define DBSC_DBACEN1 (DBSC_DBACEN0 + 0x8000U) + +#define ECMWACNTR (ECM_BASE + 0x0A04U) +#define ECMWPCNTR (ECM_BASE + 0x0A00U) +#define ECMERRTGTR0 (ECM_BASE + 0x0200U) +#define ECMERRCTLR0 (ECM_BASE + 0x0000U) +#define ECMERRTGTR1 (ECM_BASE + 0x0200U + 0x4U * 1U) +#define ECMERRCTLR1 (ECM_BASE + 0x0000U + 0x4U * 1U) +#define ECMERRTGTR7 (ECM_BASE + 0x0200U + 0x4U * 7U) +#define ECMERRCTLR7 (ECM_BASE + 0x0000U + 0x4U * 7U) +#define ECMERRTGTR17 (ECM_BASE + 0x0200U + 0x4U * 17U) +#define ECMERRCTLR17 (ECM_BASE + 0x0000U + 0x4U * 17U) +#define ECMERRTGTR39 (ECM_BASE + 0x0200U + 0x4U * 39U) +#define ECMERRCTLR39 (ECM_BASE + 0x0000U + 0x4U * 39U) +#define ECMERRTGTR41 (ECM_BASE + 0x0200U + 0x4U * 41U) +#define ECMERRCTLR41 (ECM_BASE + 0x0000U + 0x4U * 41U) +#define DB0FSCONF00A (DBSC_A_BASE + 0x7640U) +#define DB1FSCONF00A (DB0FSCONF00A + 0x8000U) +#define DB0FSCONF01A (DBSC_A_BASE + 0x7644U) +#define DB1FSCONF01A (DB0FSCONF01A + 0x8000U) +#define DB0FSCONF02A (DBSC_A_BASE + 0x7648U) +#define DB1FSCONF02A (DB0FSCONF02A + 0x8000U) +#define DB0FSCTRL01A (DBSC_A_BASE + 0x7604U) +#define DB1FSCTRL01A (DB0FSCTRL01A + 0x8000U) +#define DB0FSSTAT01A (DBSC_A_BASE + 0x7684U) +#define DB1FSSTAT01A (DB0FSSTAT01A + 0x8000U) +#define DB0FSSTAT00A (DBSC_A_BASE + 0x7680U) +#define DB1FSSTAT00A (DB0FSSTAT00A + 0x8000U) +#define DB0FSINTENB02A (DBSC_A_BASE + 0x7088U) +#define DB1FSINTENB02A (DB0FSINTENB02A + 0x8000U) +#define DB0FSINTENB04A (DBSC_A_BASE + 0x7090U) +#define DB1FSINTENB04A (DB0FSINTENB04A + 0x8000U) + +#define DB0FSDRAMECCAREA0 (DBSC_A_BASE + 0x7450U) +#define DB0FSDRAMECCAREA1 (DBSC_A_BASE + 0x7454U) +#define DB1FSDRAMECCAREA0 (DB0FSDRAMECCAREA0 + 0x8000U) +#define DB1FSDRAMECCAREA1 (DB0FSDRAMECCAREA1 + 0x8000U) + +#define DB0FSCONFAXI0 (DBSC_A_BASE + 0x7400U) +#define DB1FSCONFAXI0 (DB0FSCONFAXI0 + 0x8000U) + +#define EDC_CFG (RTVRAM_REG_BASE + 0x4110U) + +/********************* Set by the user *********************/ +/* The row address of ECC Protection Area Size for memory rank 0/1 of DBSC0/1 */ +#define ECC_PROT_SIZE00 (0x1000U) +#define ECC_PROT_SIZE01 (0x1000U) +#define ECC_PROT_SIZE10 (0x1000U) +#define ECC_PROT_SIZE11 (0x1000U) + +/* Start and End row address of ECC Protection area for rank0 of DBSC0/1 */ +#define START_ECC_INIT_AREA00 (0x00000000U) +#define START_ECC_INIT_AREA10 (0x00000000U) +#define END_ECC_INIT_AREA00 (0x00000FFFU) +#define END_ECC_INIT_AREA10 (0x00000FFFU) + +/* Start and End row address of ECC Protection area for rank1 of DBSC0/1 */ +#define START_ECC_INIT_AREA01 (0x00000000U) +#define START_ECC_INIT_AREA11 (0x00000000U) +#define END_ECC_INIT_AREA01 (0x00000FFFU) +#define END_ECC_INIT_AREA11 (0x00000FFFU) +/*********** Other settings cannot be changed ***************/ + +#endif/* ECC_PROTECT */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/dma/dma.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/dma/dma.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/dma/dma.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/dma/dma.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_boot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_boot.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_cmd.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_cmd.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_init.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_interrupt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_interrupt.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_mount.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_mount.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_multiboot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_multiboot.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_read.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_read.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_utility.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/emmc/emmc_utility.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/fcpr/fcpr.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/fcpr/fcpr.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/gpio/gpio.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/gpio/gpio.c new file mode 100644 index 00000000..85199acc --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/gpio/gpio.c @@ -0,0 +1,103 @@ +/******************************************************************************* + * DESCRIPTION : GPIO Control function + ******************************************************************************/ +/****************************************************************************** + * @file gpio.c + * - Version : 0.01 + * @brief + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 18.11.2024 0.01 First Release +*****************************************************************************/ +#if defined(__CX_IPL__) /* V4H_Cx_Loader */ +#include "mem_io.h" +#include "rcar_def.h" +#include "rcar_register.h" +#include "gic.h" +#include "ip_control.h" +#include "timer.h" + +#define GP0_8_BASE (BASE_PFC0_ADDR + 0x0180U) +#define GP1_24_BASE (PFC_GP1_BASE + 0x0180U) +#else /* Gen4_ICUMX_Loader */ +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_BASE (PFC_BASE + PFC_PORT_GRP0) +#define GP0_8_BASE (PFC_BASE + PFC_PORT_GRP0 + 0x0180) +#define GP1_24_BASE (PFC_BASE + PFC_PORT_GRP1 + 0x0180) +#endif + +#define GP1_23_BASE GP1_24_BASE + +#define GPIO_IOINTSEL 0x00 /* General IO/Interrupt Switching Register */ +#define GPIO_INOUTSEL 0x04 /* General Input/Output Switching Register */ +#define GPIO_OUTDT 0x08 /* General Output Register */ +#define GPIO_INDT 0x0c /* General Input Register */ +#define GPIO_INTDT 0x10 /* Interrupt Display Register */ +#define GPIO_INTCLR 0x14 /* Interrupt Clear Register */ +#define GPIO_INTMSK 0x18 /* Interrupt Mask Register */ +#define GPIO_MSKCLR 0x1c /* Interrupt Mask Clear Register */ +#define GPIO_POSNEG 0x20 /* Positive/Negative Logic Select Register */ +#define GPIO_EDGLEVEL 0x24 /* Edge/level Select Register */ +#define GPIO_FILONOFF 0x28 /* Chattering Prevention On/Off Register */ +#define GPIO_BOTHEDGE 0x4c /* One Edge/Both Edge Select Register */ +#define GPIO_INEN 0x50 /* General Input Enable Register */ + +#define BIT(nr) (1 << (nr)) +void gpio_output_clr_set(uintptr_t regs, int offset, int set) +{ + if (set) + mem_bitclrset32(regs + GPIO_OUTDT, 0x0, BIT(offset)); /* set */ + else + mem_bitclrset32(regs + GPIO_OUTDT, BIT(offset), 0x0); /* clear */ + + mem_bitclrset32(regs + GPIO_POSNEG, BIT(offset), 0x0); + mem_bitclrset32(regs + GPIO_INEN, BIT(offset), 0x0); + mem_bitclrset32(regs + GPIO_IOINTSEL, BIT(offset), 0x0); + mem_bitclrset32(regs + GPIO_INOUTSEL, 0x0, BIT(offset)); /* set output */ +} +/* End of function gpio_output_clr_set(uintptr_t regs, int offset, int set) */ + +#ifdef BOOT_GPIO_CHECK +#warning "BOOT_GPIO_CHECK is enabled" +// void gpio_N1307(int set) { +// if (set == 2) { +// gpio_output_clr_set(GP0_8_BASE, 8, 0); +// gpio_output_clr_set(GP0_8_BASE, 8, 1); +// micro_wait(10U); +// gpio_output_clr_set(GP0_8_BASE, 8, 0); +// } else if (set) +// gpio_output_clr_set(GP0_8_BASE, 8, 1); +// else +// gpio_output_clr_set(GP0_8_BASE, 8, 0); +// } + +void gpio_N1305(int set) { + if (set == 2) { + gpio_output_clr_set(GP1_24_BASE, 24, 0); + micro_wait(10U); + gpio_output_clr_set(GP1_24_BASE, 24, 1); + micro_wait(10U); + // gpio_output_clr_set(GP1_24_BASE, 24, 0); + } else if (set) + gpio_output_clr_set(GP1_24_BASE, 24, 1); + else + gpio_output_clr_set(GP1_24_BASE, 24, 0); +} +#endif + +void gpio_V4H_SERDES_1V8_en(int set) { + if (set) { + gpio_output_clr_set(GP1_23_BASE, 23, 1); + } else { + gpio_output_clr_set(GP1_23_BASE, 23, 0); + } +} diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/i2c/i2c.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/i2c.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/i2c/i2c.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/i2c.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/i2c5.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/i2c5.c new file mode 100644 index 00000000..10abb5b2 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/i2c5.c @@ -0,0 +1,639 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : I2C driver + ******************************************************************************/ +/****************************************************************************** + * @file i2c.c + * - Version : 0.02 + * @brief I2C driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 16.11.2023 0.01 First Release + * : 24.06.2024 0.02 Remove pre-process branch of i2c5_read(). + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Setting value for PFC */ +#define IP1SR8_SDA5_MASK (0x0000F000U) /* bit[15:12] */ +#define IP1SR8_SCL5_MASK (0x00000F00U) /* bit[11:8] */ +#define IP1SR8_SDA5 (0x00000000U) /* bit[15:12] */ +#define IP1SR8_SCL5 (0x00000000U) /* bit[11:8] */ +#define GPSR8_SDA5 (0x00000800U) /* bit11 */ +#define GPSR8_SCL5 (0x00000400U) /* bit10 */ +#define MODSEL8_SDA5 (0x00000800U) /* bit11 */ +#define MODSEL8_SCL5 (0x00000400U) /* bit10 */ +#define PUEN8_SDA5 (0x00000800U) /* bit11 */ +#define PUEN8_SCL5 (0x00000400U) /* bit10 */ + +#define CPG_MSTPCR_I2C5 (((uint32_t)1U) << 23U) + +static void i2c5_init_pin_function(void); +static int i2c5_initialized = 0; +static int crc_enabled = 0; + +void i2c5_init(crc_enabled_t crc_enabled_fn) +{ + uint32_t reg; + + if (i2c5_initialized != 0) + return; + i2c5_initialized = 1; + + /* + * Module Standby setting for I2C5 + */ + reg = mem_read32(CPG_MSTPSR5D0); + /* If supply of clock to I2C5 is stopped */ + if (FALSE != (CPG_MSTPCR_I2C5 & reg)) + { + /* Supply of clock to I2C5 is start */ + reg &= ~(CPG_MSTPCR_I2C5); + cpg_reg_write(CPG_MSTPCR5D0, CPG_MSTPSR5D0, reg); + } + + /* PFC setting for I2C5. */ + i2c5_init_pin_function(); + + /* clock init */ + /* CDFD=1, HLSE=1, SME=1, FMPE=1 */ + mem_write32((uintptr_t)I2C5_ICCCR2, 0x7U | (1 << 7)); + //Clock to filter glitches = 133.3/(1 + 6) = 19Mhz + mem_write32((uintptr_t)I2C5_ICCCR, 0x6); + mem_write32((uintptr_t)I2C5_ICMPR, 21); + mem_write32((uintptr_t)I2C5_ICHPR, 133); + mem_write32((uintptr_t)I2C5_ICLPR, 150); + /* 1st bit setup cycle */ + mem_write32((uintptr_t)I2C5_ICFBSCR, 0x07); + + /* reset slave interface */ + mem_write32((uintptr_t)I2C5_ICSIER, 0U); + mem_write32((uintptr_t)I2C5_ICSCR, FLAG_SDBS); + mem_write32((uintptr_t)I2C5_ICSAR, 0U); + mem_write32((uintptr_t)I2C5_ICSSR, 0U); + + /* reset master interface */ + mem_write32((uintptr_t)I2C5_ICMIER, 0U); + mem_write32((uintptr_t)I2C5_ICMCR, FLAG_MDBS); + mem_write32((uintptr_t)I2C5_ICMAR, 0U); + mem_write32((uintptr_t)I2C5_ICMSR, 0U); + + if (crc_enabled_fn != NULL) { + if (crc_enabled_fn()) + crc_enabled = 1; + } +} +/* End of function i2c5_init(void) */ + +static void i2c5_init_pin_function(void) +{ + uint32_t data; + + /* SDA5(GP8_11), SCL5(GP8_10) -> 0 */ + data = mem_read32((uintptr_t)PFC_IP1SR8_RW); + data &= ~(IP1SR8_SDA5_MASK | IP1SR8_SCL5_MASK); + // data |= (IP1SR8_SDA5 | IP1SR8_SCL5); /* useless */ + pfc_reg_write(PFC_IP1SR8_RW, data); + + /* SDA5, SCL5 -> 1 */ + data = mem_read32((uintptr_t)PFC_GPSR8_RW); + data |= (GPSR8_SDA5 | GPSR8_SCL5); + pfc_reg_write(PFC_GPSR8_RW, data); + + /* Select SDA5 and SCL5 to I2C mode */ + data = mem_read32((uintptr_t)PFC_MODSEL8_RW); + data |= (MODSEL8_SDA5 | MODSEL8_SCL5); + pfc_reg_write(PFC_MODSEL8_RW, data); + + /* SDA5, SCL5 -> 0 */ + data = mem_read32((uintptr_t)PFC_PUEN8_RW); + data &= ~(PUEN8_SDA5 | PUEN8_SCL5); + pfc_reg_write(PFC_PUEN8_RW, data); +} +/* End of function i2c5_init_pin_function(void) */ + +static void i2c5_set_address_reg(uint32_t slaveAdd, uint32_t regAdd) +{ + uint32_t data; + uint32_t err_count = 0U; + uint32_t status; + + while(true) + { + data = mem_read32((uintptr_t)I2C5_ICMCR); + data &= (FLAG_FSCL | FLAG_FSDA); + if(data == FLAG_FSCL) + { + break; + } + } + + /* 107.3.10.1. Master Transmitter + (b) set value for the master control registers, first data byte, and address */ + status = I2C_NG; + while(I2C_NG == status) + { + /* 1. Clear all ICMSR */ + mem_write32((uintptr_t)I2C5_ICMSR, 0U); + /* 3. Set slave address */ + slaveAdd &= ~FLG_RW; /* write mode */ + mem_write32((uintptr_t)I2C5_ICMAR, slaveAdd); + /* 4. Set the Transmit Data register (Set register address) */ + mem_write32((uintptr_t)I2C5_ICTXD, regAdd); + + while(true) + { + data = mem_read32((uintptr_t)I2C5_ICMCR); + data &= (FLAG_FSCL | FLAG_FSDA); + if(data == FLAG_FSCL) + { + break; + } + } + + /* 5. set the Master Control register (ICMCR) = H'89 */ + /* Set MDBS, MIE and ESG */ + mem_write32((uintptr_t)I2C5_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_ESG)); /* start condition */ + + /* (c) waiting for outputting address + 1. wait for master event (ICMSR.MAT and ICMSR.MDE) */ + /* MDE(master data empty) & MAT(master address transmitted) */ + status = i2c5_err_check(FLAG_MDE, FLAG_MAT, (FLAG_MNR|FLAG_MAL)); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("1:I2C data write error\n"); + panic; + } + } + } +} + +// CRC-8: x^8 + x^2 + x^1 + 1 (poly = 0x07) +uint8_t crc8(uint8_t *data, int len) +{ + uint8_t crc = 0x00; + uint8_t poly = 0x07; // x^8 + x^2 + x^1 + 1 + + for (int i = 0; i < len; i++) { + crc ^= data[i]; + for (int j = 0; j < 8; j++) { + if (crc & 0x80) + crc = (crc << 1) ^ poly; + else + crc <<= 1; + } + } + return crc; +} + +static void __i2c5_write(uint32_t slaveAdd, uint32_t regAdd, uint32_t setData) +{ + uint32_t data; + uint32_t err_count = 0U; + uint32_t status; + + /* 107.3.10.1. Master Transmitter */ + i2c5_set_address_reg(slaveAdd, regAdd); + + /* 2. set ICMCR to H'88 */ + mem_write32((uintptr_t)I2C5_ICMCR, (FLAG_MDBS | FLAG_MIE)); + + status = I2C_NG; + while(I2C_NG == status) + { + /* 3. Clear the ICMSR.MAT and ICMSR.MDE bits. */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MAT | FLAG_MDE); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + /* (d). Monitoring transmission of data + 1. wait for master event ICMSR.MDE(master data empty) */ + status = i2c5_err_check(FLAG_MDE, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("2:I2C data write error\n"); + panic; + } + } + } + + /* 2. ICTXD = data */ + mem_write32((uintptr_t)I2C5_ICTXD, setData); + + /* 3. clear the ICMSR.MDE bit + Clear ICMSR.MDE after setting the last byte to be transmitted. + After the last byte data is loaded into the shift register, + ICMSR.MDE is generated. Before clearning ICMSR.MDE, you must + set ICMCR to H'8A (set the force stop control bit). */ + status = I2C_NG; + while(I2C_NG == status) + { + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MDE); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + status = i2c5_err_check(FLAG_MDE, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("3:I2C data write error\n"); + panic; + } + } + } + + if (crc_enabled) { + uint8_t buf[4]; + + buf[0] = slaveAdd & 0xFFU; + buf[1] = regAdd & 0xFFU; + buf[2] = setData & 0xFFU; + buf[3] = crc8(buf, 3); + + /* 2. ICTXD = data, CRC8 value */ + mem_write32((uintptr_t)I2C5_ICTXD, buf[3]); + + /* 3. clear the ICMSR.MDE bit + Clear ICMSR.MDE after setting the last byte to be transmitted. + After the last byte data is loaded into the shift register, + ICMSR.MDE is generated. Before clearning ICMSR.MDE, you must + set ICMCR to H'8A (set the force stop control bit). */ + status = I2C_NG; + while(I2C_NG == status) + { + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MDE); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + status = i2c5_err_check(FLAG_MDE, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("4:I2C data write error\n"); + panic; + } + } + } + } + + /* Before clearning ICMSR.MDE, you must + set ICMCR to H'8A (set the force stop control bit). */ + mem_write32((uintptr_t)I2C5_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_FSB)); + + status = I2C_NG; + while(I2C_NG == status) + { + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MDE); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + /* (e) wait for end of transmission + 1. wait for the master event, ICMSR.MST */ + status = i2c5_err_check(FLAG_MST, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("5:I2C data write error\n"); + panic; + } + } + } + + /* 2. clear the ICMSR.MST bit */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MST); + mem_write32((uintptr_t)I2C5_ICMSR, data); +} +/* End of function i2c5_write(uint32_t slaveAdd, uint32_t regAdd, uint32_t setData) */ + +void __i2c5_read(uint32_t slaveAdd, uint32_t regAdd, uint32_t *revData, int crc_en) +{ + uint32_t data; + uint32_t err_count = 0; + uint32_t status; + + /* 107.3.10.3. Master Transmitter - repeated START - Master receiver */ + i2c5_set_address_reg(slaveAdd, regAdd); + + /* (c) 2. Clear ICMCR.ESG bit */ + data = mem_read32((uintptr_t)I2C5_ICMCR); + data &= __INV(FLAG_ESG); + mem_write32((uintptr_t)I2C5_ICMCR, data); + + status = I2C_NG; + while(I2C_NG == status) + { + /* 3. Clear the ICMSR.MAT and ICMSR.MDE bits. */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MAT | FLAG_MDE); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + /* (d). Monitor transmission of data. + 1. wait for master event, ICMSR.MDE */ + /* MDE(master data empty) */ + status = i2c5_err_check(FLAG_MDE, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("2:I2C data read error\n"); + panic; + } + } + } + + /* 2. set ICMAR to address of slave ... (read mode: 1) */ + /* Set slave address */ + slaveAdd |= FLG_RW; /* read mode */ + mem_write32((uintptr_t)I2C5_ICMAR, slaveAdd); + + status = I2C_NG; + while(I2C_NG == status) + { + /* 3. set ICMCR = H'89 (MDBS = 1, MIE = 1, ESG = 1) */ + mem_write32((uintptr_t)I2C5_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_ESG)); /* start condition */ + + /* 4. clear the MDE bit. */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MDE); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + /* (e) wait for outputting slave-address of master reception + 1. wait for master event (ICMSR.MAT and ICMSR.MDR bits.) */ + status = i2c5_err_check(FLAG_MDR, FLAG_MAT, (FLAG_MNR|FLAG_MAL)); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("3:I2C data read error\n"); + panic; + } + } + } + + status = I2C_NG; + while(I2C_NG == status) + { + /* 2. Clera ICMCR.EST bit (set ICMCR to H'88(MDBS, MIE)) */ + mem_write32((uintptr_t)I2C5_ICMCR, (FLAG_MDBS | FLAG_MIE)); + /* 3. clear the ICMSR.MAT and ICMSR.MDR bits. */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MAT | FLAG_MDR); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + /* (f) Monitor reception of data + 1. Wait for master event (the ICMSR.MDR bit) */ + status = i2c5_err_check(FLAG_MDR, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("4:I2C data read error\n"); + panic; + } + } + } + + if (crc_en) { /* read 1 byte more */ + if(I2C_OK == status) + { + *revData = mem_read32((uintptr_t)I2C5_ICRXD) & 0xFFU; + } + + /* (f) 2. clear the ICMSR.MDR bit after reading data from the receive data register */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MDR); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + /* (f) 1. Wait for master event (the ICMSR.MDR bit) */ + status = i2c5_err_check(FLAG_MDR, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("5:I2C data read error\n"); + panic; + } + } + /* (f) 3. set ICMR.FSB to 1 before the last byte data transfer is started */ + mem_write32((uintptr_t)I2C5_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_FSB)); /* stop condition */ + + if(I2C_OK == status) + { + /* the value must be CRC8(slaveAdd, regAdd, slaveAdd | 0x1, data) */ + *revData |= (mem_read32((uintptr_t)I2C5_ICRXD) & 0xFFU) << 8; + } + } else { + /* (f) 3. set ICMR.FSB to 1 before the last byte data transfer is started */ + mem_write32((uintptr_t)I2C5_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_FSB)); /* stop condition */ + + if(I2C_OK == status) + { + *revData = mem_read32((uintptr_t)I2C5_ICRXD) & 0xFFU; + } + } + + /* (f) 2. clear the ICMSR.MDR bit after reading data from the receive data register */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MDR); + mem_write32((uintptr_t)I2C5_ICMSR, data); + + status = I2C_NG; + while(I2C_NG == status) + { + /* (g) Wait for end of reception + 1. handle the receive interrupt(ICMSR.MDR) in the last byte: + that is, read the data and clear the ICMSR.MDR. */ + status = i2c5_err_check(FLAG_MDR, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("6:I2C data read error\n"); + panic; + } + } + + /* (f) 2. clear the ICMSR.MDR bit after reading data from the receive data register */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MDR); + mem_write32((uintptr_t)I2C5_ICMSR, data); + } + + /* (g) 2. wait for master event, ICMSR.MST */ + while(true) + { + data = mem_read32((uintptr_t)I2C5_ICMSR); + if((data & FLAG_MST) != 0U) + { + break; + } + } + + /* (g) 3. clear the ICMSR.MST(master stop transmitted) bit */ + data = mem_read32((uintptr_t)I2C5_ICMSR); + data &= __INV(FLAG_MST); + mem_write32((uintptr_t)I2C5_ICMSR, data); +} +/* End of function i2c5_read(uint32_t slaveAdd, uint32_t regAdd, uint32_t *revData) */ + +uint32_t i2c5_err_check(uint32_t first, uint32_t second, uint32_t error) +{ + uint32_t data; + uint32_t status = I2C_OK; + + while(true) + { + data = mem_read32((uintptr_t)I2C5_ICMSR); + if((data & first) != 0U) + { + if((second == FLAG_NONE) || ((data & second) != 0U)) + { + status = I2C_OK; + break; + } + } + if((data & error) != 0U) + { + mem_write32((uintptr_t)I2C5_ICMSR, ~error); + status = I2C_NG; + break; + } + } + return status; +} +/* End of function i2c5_err_check(uint32_t first, uint32_t second, uint32_t error) */ + +void i2c5_release(void) +{ + mem_write32((uintptr_t)I2C5_ICCCR2, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICCCR, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICSCR, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICSSR, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICSIER, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICSAR, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICMCR, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICMSR, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICMIER, 0x00000000U); + mem_write32((uintptr_t)I2C5_ICMAR, 0x00000000U); +} +/* End of function i2c5_release(void) */ + +static uint32_t cur_page[4][2] = { + { 0x0, 0x0 }, { 0x0, 0x0 }, { 0x0, 0x0 }, { 0x0, 0x0 } +}; +#define CUR_PAGE_MAX (sizeof(cur_page)/sizeof(cur_page[0])) +#define IO_PAGE 0x00 +static void i2c5_page_change(uint32_t slaveAdd, uint32_t new_page) { + int index = 0; + for (index=0; index < CUR_PAGE_MAX; index++) { + if (cur_page[index][0] == slaveAdd) { + break; + } + } + if (index == CUR_PAGE_MAX) { + WARN("I2C5: slave address is not registered(0x%02X)\n", slaveAdd); + for (index=0; index < CUR_PAGE_MAX; index++) { + if (cur_page[index][0] == 0x0) { + cur_page[index][0] = slaveAdd; + break; + } + } + } + if (index == CUR_PAGE_MAX) { + ERROR("I2C5: page table is full(0x%02X)\n", slaveAdd); + panic; + } + + if (cur_page[index][1] != new_page) { + uint32_t data; + uint8_t buf[8]; + + __i2c5_write(slaveAdd, IO_PAGE, new_page); + __i2c5_read(slaveAdd, IO_PAGE, &data, crc_enabled); + if ((data & 0xFFU) != new_page) { + __i2c5_write(slaveAdd, IO_PAGE, new_page); + __i2c5_read(slaveAdd, IO_PAGE, &data, crc_enabled); + } + if (crc_enabled) { + buf[0] = slaveAdd & 0xFFU; + buf[1] = IO_PAGE; + buf[2] = (slaveAdd & 0xFFU) | FLG_RW; + buf[3] = data & 0xFFU; + + buf[4] = crc8(buf, 4); + buf[5] = (data & 0xFF00U) >> 8; + if (buf[4] != buf[5]) { + ERROR("I2C5: page change CRC error(0x%02X:0x%02X)\n", buf[4], buf[5]); + panic; + } + } + cur_page[index][1] = data & 0xFFU; + if (cur_page[index][1] != new_page) { + ERROR("I2C5: page change error (0x%x:0x%x)\n", cur_page[index][1], new_page); + panic; + } + } +} + +void i2c5_write(uint32_t slaveAdd, uint32_t regAdd, uint32_t revData) { + i2c5_page_change(slaveAdd, (regAdd & 0xFF00) >> 8); + __i2c5_write(slaveAdd, regAdd & 0xFF, revData); +} + +void i2c5_read(uint32_t slaveAdd, uint32_t regAdd, uint32_t *revData) { + i2c5_page_change(slaveAdd, (regAdd & 0xFF00) >> 8); + __i2c5_read(slaveAdd, regAdd & 0xFF, revData, crc_enabled); +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/pmic.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/pmic.c new file mode 100644 index 00000000..6f2624d4 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/pmic.c @@ -0,0 +1,42 @@ +#include +#include +#include +#define THIS_IS_PMIC_WDT +#include +#include +#include +#include +#include + +#define WDT_CFG1_VAL (WDT_CFG1_ULCNT(0x7) | WDT_CFG1_LLCNT(0x5)) +#define WDT_CFG2_VAL (WDT_CFG2_ACC_TH_15 | \ + WDT_CFG2_ULT_100MS | WDT_CFG2_LLT_100US) + +static int crc_enabled = 0; +static int check_crc_enabled(void) { + uint32_t rData; + uint8_t buf[8]; + + __i2c5_read(PMIC_ADDR, 0x22, &rData, 1); + + buf[0] = PMIC_ADDR & 0xFFU; + buf[1] = 0x22; + buf[2] = (PMIC_ADDR & 0xFFU) | FLG_RW; + buf[3] = rData & 0xFFU; + + buf[4] = crc8(buf, 4); + buf[5] = (rData & 0xFF00U) >> 8; + if (buf[4] == buf[5]) /* crc is calculated */ + crc_enabled = 1; + return crc_enabled; +} + +void PMIC_i2c_init(int *is_crc_enabled) { + i2c5_init(check_crc_enabled); + if (is_crc_enabled != NULL) + *is_crc_enabled = crc_enabled; +} + +void PMIC_i2c_release(void) { + i2c5_release(); +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/pmic_wdt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/pmic_wdt.c new file mode 100644 index 00000000..124415ba --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/i2c/pmic_wdt.c @@ -0,0 +1,305 @@ +#include +#include +#include +#define THIS_IS_PMIC_WDT +// #define PMIC_16QNA_WDT +#include +#include +#include +#include +#include + +#define WDT_CFG1_VAL (WDT_CFG1_ULCNT(0x7) | WDT_CFG1_LLCNT(0x5)) +#define WDT_CFG2_VAL (WDT_CFG2_ACC_TH_15 | \ + WDT_CFG2_ULT_100MS | WDT_CFG2_LLT_100US) + +int PMIC_4QNA_wdt(void) { + uint32_t question, answer0, tmp; + + i2c5_read(PMIC_ADDR_P, WDT_LFSR, &question); // Read the question + question &= 0xFFU; + WARN("PMIC: WDT_LFSR 0x%02x\n", question); + + // Grab only the first two bits to figure out what to do + tmp = question >> 6; + answer0 = question & 0x3F; + + if (tmp == 0x1) { + answer0 = (answer0 << 1) | (tmp << 6); + } else if (tmp == 0x2) { + answer0 = (answer0 >> 1) | (tmp << 6); + } else if (tmp == 0x3) { + answer0 = (~answer0) | (tmp << 6); + } /* else if (tmp == 0x0) { + // answer0 = (answer0) | (tmp << 6); + } */ + answer0 &= 0xFFU; + WARN("PMIC: WDT_KICK_REG will write (0x%02x)\n", answer0); + i2c5_write(PMIC_ADDR_P, WDT_KICK_REG, answer0); + + i2c5_read(PMIC_ADDR_P, WDT_KICK_REG, &tmp); +#if LOG_LEVEL >= LOG_WARNING + WARN("PMIC: WDT_KICK_REG 0x%02x\n", tmp); +#endif + if (answer0 != (tmp & 0xFFU)) { + ERROR("PMIC: WDT_KICK_REG write error (0x%02x, 0x%02x != 0x%02x)\n", + question, answer0, tmp & 0xFFU); + return -1; + } + NOTICE("4Q&A: DONE\n"); + return 0; +} + +#ifdef PMIC_16QNA_WDT +int PMIC_16QNA_wdt(void) { + static uint8_t g_ary_wdt_answer[] = { + 0x00, 0x4F, 0x16, 0x59, + 0x8a, 0xc5, 0x9c, 0xd3, + 0x2d, 0x62, 0x3b, 0x74, + 0xa7, 0xe8, 0xb1, 0xfe, + }; + uint32_t err_cnt = 0; + uint32_t question, answer0, tmp; + + i2c5_read(PMIC_ADDR_P, WDT_LFSR, &question); // Read the question + question &= 0xFFU; + WARN("PMIC: WDT_LFSR 0x%02x\n", question); + + // Grab the upper nibble to respond to, logic shift the lower nibble away + tmp = question >> 4; + answer0 = g_ary_wdt_answer[tmp]; + + i2c5_write(PMIC_ADDR_P, WDT_KICK_REG, answer0); + i2c5_read(PMIC_ADDR_P, WDT_CFG3, &question); + err_cnt |= (question & 0xFF) << 24; // Check WDT Error counter + micro_wait(4U); + + // For the second answer, take the first answer and flip the upper nibble + i2c5_write(PMIC_ADDR_P, WDT_KICK_REG, (answer0 ^ 0xF0) & 0xFF); + i2c5_read(PMIC_ADDR_P, WDT_CFG3, &question); + err_cnt |= (question & 0xFF) << 16; // Check WDT Error counter + micro_wait(4U); + + // For the third answer, take the first answer and flip the lower nibble + i2c5_write(PMIC_ADDR_P, WDT_KICK_REG, (answer0 ^ 0x0F) & 0xFF); + i2c5_read(PMIC_ADDR_P, WDT_CFG3, &question); + err_cnt |= (question & 0xFF) << 8; // Check WDT Error counter + micro_wait(4U); + + // For the fourth answer, take the first answer and invert the whole byte + i2c5_write(PMIC_ADDR_P, WDT_KICK_REG, (answer0 ^ 0xFF) & 0xFF); + i2c5_read(PMIC_ADDR_P, WDT_CFG3, &question); + err_cnt |= (question & 0xFF) << 0; // Check WDT Error counter + if (err_cnt) { + NOTICE("16Q&A: Error 0x%x\n", err_cnt); + return -1; + } else { + NOTICE("16Q&A: DONE\n"); + } + i2c5_read(PMIC_ADDR_P, 0x01, &tmp); /* set PAGE to 0x00 */ + + return 0; +} +#endif /* PMIC_16QNA_WDT */ + +int PMIC_SM_12_wdt(void) { + uint32_t tmp; + + i2c5_read(PMIC_ADDR_P, WDT_CFG0, &tmp); + if ((tmp & WDT_CFG0_EN) == 0) { + NOTICE("WDT is disabled\n"); + i2c5_read(PMIC_ADDR_P, 0x01, &tmp); /* set PAGE to 0x00 */ + return -99; + } + +#ifdef PMIC_16QNA_WDT + if (tmp & WDT_CFG0_16QNA) + return PMIC_16QNA_wdt(); +#endif + return PMIC_4QNA_wdt(); +} + +int PMIC_wdt_init(int *is_crc_enabled) +{ + uint32_t tmp, tmp2; + + PMIC_i2c_init(is_crc_enabled); + + i2c5_read(PMIC_ADDR_P, WDT_CFG0, &tmp); + if ((tmp & WDT_CFG0_EN) != 0) { + i2c5_read(PMIC_ADDR_P, FLT_RECORD_B, &tmp2); + if (tmp2 & FLT_WDT) { + ERROR("PMIC: fault detected of WDT\n"); + + WARN("PMIC: disable WDT\n"); + tmp &= ~(WDT_CFG0_EN); + i2c5_write(PMIC_ADDR_P, WDT_CFG0, tmp); + micro_wait(200); + } + } + +#if LOG_LEVEL >= LOG_WARNING + WARN("PMIC: WDT_CFG0: 0x%02x (", tmp); + if (tmp & WDT_CFG0_QNA) { + local_printf("QNA "); + } + if (tmp & WDT_CFG0_16QNA) { + local_printf("16QNA "); + } else { + local_printf("4QNA "); + } + if (tmp & WDT_CFG0_EN) { + local_printf("EN"); + } + local_printf(")\n"); + +#if (SAN_ENABLE != 1) + /* FUSA_FirstMSG_done = 1 */ + i2c5_read(PMIC_ADDR_P, FUSA_STATUS_1, &tmp); + + WARN("PMIC: SAFETY_CRTL_STATE is "); + switch (tmp & FUSA_STAT_SCS_MASK) { + case FUSA_STAT_SCS_LOCK: + local_printf("LOCK\n"); + break; + case FUSA_STAT_SCS_ERROR: + local_printf("ERROR\n"); + break; + case FUSA_STAT_SCS_RESET: + local_printf("RESET\n"); + break; + case FUSA_STAT_SCS_ACTIVE: + local_printf("ACTIVE\n"); + break; + case FUSA_STAT_SCS_SOC_ACT: + local_printf("SOC_ACTIVATION\n"); + break; + case FUSA_STAT_SCS_PWR_UP: + local_printf("PWR_UP SEQ\n"); + break; + case FUSA_STAT_SCS_DIAG: + local_printf("self DIAG\n"); + break; + case FUSA_STAT_SCS_PWR_OFF: + default: + local_printf("PWR_OFF\n"); + break; + } + + if (tmp & FUSA_STAT_SOC_ACTIVATED) { + WARN("PMIC: SoC Activation tests passed\n"); + } else { + WARN("PMIC: SoC Activation tests are being performed or failed\n"); + } + + if (tmp & FUSA_STAT_WDT_MSG_DONE) { + WARN("PMIC: First WDT message is received\n"); + } else { + WARN("PMIC: there is no First WDT message\n"); + } + + WARN("PMIC: SoCActiva_STATE is "); + switch (tmp & FUSA_STAT_1_MASK) { + case FUSA_STAT_1_EXT_CHK1: + local_printf("EXT_PIN CHK1\n"); + break; + case FUSA_STAT_1_SINT_CHK: + local_printf("SINT_CHK\n"); + break; + case FUSA_STAT_1_EXT_CHK2: + local_printf("EXT_PIN CHK2\n"); + break; + case FUSA_STAT_1_START_WDT: + local_printf("START_WDT\n"); + break; + case FUSA_STAT_1_IDLE: + default: + local_printf("IDLE\n"); + break; + } +#endif /* SAN_ENABLE != 1 */ +#endif + + /* FLT_MaskWDT = 0 */ + i2c5_read(PMIC_ADDR_P, FLT_MASK_B, &tmp); + if (tmp & FLT_MASK_WDT) { + WARN("PMIC: WDT fault is masked\n"); + tmp &= ~FLT_MASK_WDT; + i2c5_write(PMIC_ADDR_P, FLT_MASK_B, tmp); +#if LOG_LEVEL >= LOG_WARNING + i2c5_read(PMIC_ADDR_P, FLT_MASK_B, &tmp); + WARN("PMIC: FLT_MASK_B 0x%02x (MASK_WDT %s)\n", tmp, + (tmp & FLT_MASK_WDT) ? "set" : "clear"); +#endif + } else { + WARN("PMIC: WDT fault is not masked\n"); + } + + /* WDT_ULTICK, WDT_LLTICK */ + i2c5_read(PMIC_ADDR_P, WDT_CFG2, &tmp); + if (tmp != WDT_CFG2_VAL) { + tmp = WDT_CFG2_VAL; + i2c5_write(PMIC_ADDR_P, WDT_CFG2, tmp); +#if LOG_LEVEL >= LOG_WARNING + i2c5_read(PMIC_ADDR_P, WDT_CFG2, &tmp); +#endif + } + WARN("PMIC: WDT_CFG2: 0x%02x (ACC_TH %d)\n", tmp, + (tmp & WDT_CFG2_ACC_TH_MASK) == WDT_CFG2_ACC_TH_1 ? 1 : + (tmp & WDT_CFG2_ACC_TH_MASK) == WDT_CFG2_ACC_TH_15 ? 15 : + (tmp & WDT_CFG2_ACC_TH_MASK) == WDT_CFG2_ACC_TH_31 ? 31 : 63); + + /* WDT_ULCNT, WDT_LLCNT */ + i2c5_read(PMIC_ADDR_P, WDT_CFG1, &tmp2); + WARN("PMIC: WDT_CFG1: 0x%02x\n", tmp2); + tmp2 &= 0xFFU; + if (tmp2 != WDT_CFG1_VAL) { + tmp2 = WDT_CFG1_VAL; + i2c5_write(PMIC_ADDR_P, WDT_CFG1, tmp2); +#if LOG_LEVEL >= LOG_WARNING + i2c5_read(PMIC_ADDR_P, WDT_CFG1, &tmp2); + WARN("PMIC: WDT_CFG1: 0x%02x\n", tmp2); +#endif + } + WARN("PMIC: Upper limit counter value: %d x %s\n", + (tmp2 & WDT_CFG1_ULCNT_MASK) >> WDT_CFG1_ULCNT_SHIFT, + ((tmp & WDT_CFG2_ULT_MASK) == WDT_CFG2_ULT_100MS) ? "100ms" : + ((tmp & WDT_CFG2_ULT_MASK) == WDT_CFG2_ULT_100US) ? "100us" : + ((tmp & WDT_CFG2_ULT_MASK) == WDT_CFG2_ULT_10MS) ? "10ms" : "?"); + WARN("PMIC: Lower limit counter value: %d x %s\n", + (tmp2 & WDT_CFG1_LLCNT_MASK) >> WDT_CFG1_LLCNT_SHIFT, + ((tmp & WDT_CFG2_LLT_MASK) == WDT_CFG2_LLT_100MS) ? "100ms" : + ((tmp & WDT_CFG2_LLT_MASK) == WDT_CFG2_LLT_100US) ? "100us" : + ((tmp & WDT_CFG2_LLT_MASK) == WDT_CFG2_LLT_10MS) ? "10ms" : "?"); + + /* FLT_WDT = 0 */ + i2c5_read(PMIC_ADDR_P, FLT_RECORD_B, &tmp); + if (tmp & FLT_WDT) { + ERROR("PMIC: fault detected for WDT operation\n"); + return -1; + } else { + WARN("PMIC: No fault detected for the WDT operation\n"); + } + + /* WDT_WWDT_ACC */ +#if LOG_LEVEL >= LOG_WARNING + i2c5_read(PMIC_ADDR_P, WDT_CFG3, &tmp); + WARN("PMIC: wrong answer count: %d\n", tmp & 0xFFU); +#endif + + /* WDT_WWDT_EN = 1 */ + i2c5_read(PMIC_ADDR_P, WDT_CFG0, &tmp); + if ((tmp & WDT_CFG0_EN) != 0) { + WARN("PMIC: WDT has already enabled\n"); + } else { + tmp &= 0xFFU; + tmp |= WDT_CFG0_EN; + i2c5_write(PMIC_ADDR_P, WDT_CFG0, tmp); + + i2c5_read(PMIC_ADDR_P, WDT_CFG0, &tmp); + if ((tmp & WDT_CFG0_EN) != 0) { + WARN("PMIC: enable WDT\n"); + } + } + return 0; +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ip_control.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ip_control.c new file mode 100644 index 00000000..dd281562 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/ip_control.c @@ -0,0 +1,120 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : IP's control function + ******************************************************************************/ +/****************************************************************************** + * @file ip_control.c + * - Version : 0.08 + * @brief Initial setting controller. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 30.09.2021 0.02 Support of eMMC boot. + * : 15.10.2021 0.03 modify include of flash /eMMC. + * : 03.12.2021 0.04 CA IPL boot support (workaround) + * : 06.01.2022 0.05 Add exception handling for ICUMX_WDTA. + * : 02.02.2022 0.06 Add MFIS Lock/Unlock. + * : 23.05.2022 0.07 Integration of S4 and V4H + * : 23.08.2023 0.08 Add support for V4M. + * : 13.10.2023 0.09 Add calling of sysc_c4_power_on function. + *****************************************************************************/ + +#include +#include +#include +#if (RCAR_SA9_TYPE == FLASH_BOOT) +#include +#include +#include +#elif (RCAR_SA9_TYPE == EMMC_BOOT) +#include +#else +/* no process */ +#endif +#include +#include +#include +#include +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#include +#include +#endif +#if (RCAR_LSI == RCAR_V4M) +#include +#endif + +void ip_init(void) +{ + scif_init(); + set_vect_table(); + wdt_init(); + cpg_init(); +#if (RCAR_SA9_TYPE == FLASH_BOOT) + dma_init(); + rpc_init(); + mfis_init(); + #if (CA_LOAD_TYPE == CA_IPL) + emmc_initialize(); /* workaround */ + #endif /* (CA_LOAD_TYPE == CA_IPL) */ +#elif (RCAR_SA9_TYPE == EMMC_BOOT) /* (RCAR_SA9_TYPE == FLASH_BOOT) */ + emmc_initialize(); +#else /* (RCAR_SA9_TYPE == FLASH_BOOT) */ + /* No process */ +#endif /* (RCAR_SA9_TYPE == FLASH_BOOT) */ + +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + fcpr_init(); +#endif /* ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) */ + +#if (RCAR_LSI == RCAR_V4M) + /* + * For accessing Region ID registers by ICUMX, + * and starting Cortex-A76 by CR52 2nd IPL. + */ + sysc_c4_power_on(); +#endif /* RCAR_LSI == RCAR_V4M */ + // PMIC_wdt_init(NULL); +#if (SAN_ENABLE == 1) + PMIC_i2c_init(NULL); +#endif +} +/* End of function ip_init(void) */ + +void ip_release(void) +{ + PMIC_i2c_release(); +#if (RCAR_SA9_TYPE == FLASH_BOOT) + rpc_release(); + dma_release(); +#elif (RCAR_SA9_TYPE == EMMC_BOOT) + emmc_terminate(); +#else + /* No process */ +#endif + wdt_restart(); +} +/* End of function ip_release(void) */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/mfis/mfis.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/mfis/mfis.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/mfis/mfis.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/mfis/mfis.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/qos/qos.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/qos/qos.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/qos/qos.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/qos/qos.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/dma2.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/dma2.c new file mode 100644 index 00000000..b4a25132 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/dma2.c @@ -0,0 +1,218 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2015-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : DMA driver + ******************************************************************************/ +/****************************************************************************** + * @file dma.c + * - Version : 0.05 + * @brief RT-DMAC driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 15.10.2021 0.01 First Release + * : 10.02.2022 0.02 Add dma_start_xbyte function. + * : 18.03.2022 0.03 Modify to read modify write when write to + * : register. + * : 29.03.2022 0.04 Modify magic number to definition. + * : 09.11.2022 0.05 License notation change. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * from flash_writer's reg_rcar.h + */ +/* RT-DMA Control */ +#define RTDMACTL_BASE (BASE_RTDMACTL_ADDR) +#define RTDMAC_RDMOR (RTDMACTL_BASE + 0x0060U) /* R/W 16 DMA operation register (for channels 0 to 15) */ +/* RT-DMAC0(for RPC) */ +#define RTDMAC_BASE (BASE_RTDMA0_ADDR) +#define RTDMAC_RDMSEC (RTDMAC_BASE + 0x00B0U) /* R/W 32 DMA secure control register (for channels 0 to 15) */ +#define RTDMAC_RDMSAR(x) (RTDMAC_BASE + 0x0000U + (0x80U * (x))) /* R/W 32 DMA source address register_0 */ +#define RTDMAC_RDMDAR(x) (RTDMAC_BASE + 0x0004U + (0x80U * (x))) /* R/W 32 DMA destination address register_0 */ +#define RTDMAC_RDMTCR(x) (RTDMAC_BASE + 0x0008U + (0x80U * (x))) /* R/W 32 DMA transfer count register_0 */ +#define RTDMAC_RDMCHCR(x) (RTDMAC_BASE + 0x000CU + (0x80U * (x))) /* R/W 32 DMA channel control register_0 */ + +#include "dma2.h" + +#define RDMOR_INITIAL (0x0301U) +#define DMACH (0U) +#define RDMTCR_CNT_SHIFT (6U) +#define RDMCHCR_TRN_MODE (0x00105409U) +#define RDMCHCR_TRN_MODE_SRC_FIX (0x00104409U) +#define RDMCHCR_TRN_MODE_1BYTE (0x00005401U) +#define RDMCHCR_TE_BIT (0x00000002U) +#define TE_FLAG (0x00000000U) +#define RDMCHCR_CAE_BIT (0x80000000U) +#define RDMCHCR_CAE_BIT_NOERROR (0x00000000U) +#define RDMCHCR_CAIE_BIT (0x40000000U) +#define RDMCHCR_DPM_BIT (0x30000000U) +#define RDMCHCR_RPT_BIT (0x0F000000U) +#define RDMCHCR_WAIT_BIT (0x00800000U) +#define RDMCHCR_DPB_BIT (0x00400000U) +#define RDMCHCR_DSE_BIT (0x00080000U) +#define RDMCHCR_DSIE_BIT (0x00040000U) +#define RDMCHCR_DM_BIT (0x0000C000U) +#define RDMCHCR_SM_BIT (0x00003000U) +#define RDMCHCR_RS_BIT (0x00000F00U) +#define RDMCHCR_TS_BIT (0x00300018U) +#define RDMCHCR_IE_BIT (0x00000004U) +#define RDMCHCR_TE_BIT (0x00000002U) +#define RDMCHCR_DE_BIT (0x00000001U) +#define RDMCHCR_CONF_MASK (RDMCHCR_TS_BIT | RDMCHCR_DM_BIT | RDMCHCR_SM_BIT \ + | RDMCHCR_RS_BIT | RDMCHCR_DE_BIT) +#define RDMCHCR_DESCRIPTOR_CONF_MASK (RDMCHCR_DPM_BIT | RDMCHCR_RPT_BIT | RDMCHCR_WAIT_BIT | RDMCHCR_DPB_BIT) +#define RDMCHCR_INTERRUPT_MASK (RDMCHCR_CAIE_BIT | RDMCHCR_DSIE_BIT | RDMCHCR_IE_BIT) +#define RDMCHCR_FLAG_MASK (RDMCHCR_CAE_BIT | RDMCHCR_DSE_BIT | RDMCHCR_TE_BIT) +#define RDMCHCR_ALL_BIT_MASK (RDMCHCR_CONF_MASK | RDMCHCR_DESCRIPTOR_CONF_MASK \ + | RDMCHCR_INTERRUPT_MASK | RDMCHCR_FLAG_MASK) +#define CMNSR_TEND (0x00000001U) +#define RDMTCR_UPPER_MASK (0xFF000000U) + +/* fraction mask for 64-byte units */ +#define FRACTION_MASK_64_BYTE (0x0000003FU) +/* fraction mask for 256-byte units */ +#define FRACTION_MASK_256_BYTE (0x000000FFU) + +void dma2_init(void) +{ + uint32_t reg; + + /* DMA transfer disabled */ + reg = mem_read32(RTDMAC_RDMCHCR(DMACH)); + reg &= ~(RDMCHCR_ALL_BIT_MASK); + mem_write32(RTDMAC_RDMCHCR(DMACH), reg); + + /* DMA operation */ + mem_write16(RTDMAC_RDMOR, RDMOR_INITIAL); + /* DMA secure control register */ + reg = mem_read32(RTDMAC_RDMSEC); + reg |= ((uint32_t)1U << DMACH); + mem_write32(RTDMAC_RDMSEC, reg); +} +/* End of function dma_init */ + +void dma2_start(uint32_t dst, uint32_t src, uint32_t len, uint32_t mode) +{ + uint32_t reg; + + if (((dst & FRACTION_MASK_64_BYTE) != 0U) || ((src & FRACTION_MASK_64_BYTE) != 0U)) + { + /* dst or src are not 64-bit alignment. */ + ERROR("not 64-bit alignment in DMA(2) transfer\n"); + while(1) + { + ; /* panic */ + } + } + + /* round up 256 byte alignment */ + len += FRACTION_MASK_256_BYTE; + len &= (~(uint32_t)(FRACTION_MASK_256_BYTE)); + + /* DMA destination address */ + mem_write32(RTDMAC_RDMDAR(DMACH), dst); + /* DMA source address */ + mem_write32(RTDMAC_RDMSAR(DMACH), src); + /* DMA 64bytes-unit transfer count */ + mem_write32(RTDMAC_RDMTCR(DMACH), ((len >> RDMTCR_CNT_SHIFT) & (~RDMTCR_UPPER_MASK))); + /* DMA channel control */ + reg = mem_read32(RTDMAC_RDMCHCR(DMACH)); + if (mode == DMA_MODE_SRC_FIX) + { + reg |= RDMCHCR_TRN_MODE_SRC_FIX; + mem_write32(RTDMAC_RDMCHCR(DMACH), reg); + } + else + { + reg |= RDMCHCR_TRN_MODE; + mem_write32(RTDMAC_RDMCHCR(DMACH), reg); + } +} +/* End of function dma_start */ + +void dma2_start_xbyte(uint32_t dst, uint32_t src, uint32_t len, uint32_t trns_unit) +{ + uint32_t reg; + + /* DMA destination address */ + mem_write32(RTDMAC_RDMDAR(DMACH), dst); + /* DMA source address */ + mem_write32(RTDMAC_RDMSAR(DMACH), src); + /* DMA transfer count */ + mem_write32(RTDMAC_RDMTCR(DMACH), ((len >> trns_unit) & (~RDMTCR_UPPER_MASK))); + /* DMA channel control */ + reg = mem_read32(RTDMAC_RDMCHCR(DMACH)); + if (trns_unit == TRANS_UNIT_1BYTE) + { + /* DMA channel control (transfer unit is 1 byte)*/ + reg |= RDMCHCR_TRN_MODE_1BYTE; + mem_write32(RTDMAC_RDMCHCR(DMACH), reg); + } + if (trns_unit == TRANS_UNIT_64BYTES) + { + /* DMA channel control (transfer unit is 64 bytes) */ + reg |= RDMCHCR_TRN_MODE; + mem_write32(RTDMAC_RDMCHCR(DMACH), reg); + } +} +/* End of function dma_start_byte */ + +void dma2_end(void) +{ + uint32_t reg; + + /* Check end of DMA transfer. */ + do + { + wdt_restart(); + /* Check error of DMA transfer */ + if ((mem_read32(RTDMAC_RDMCHCR(DMACH)) & RDMCHCR_CAE_BIT) != RDMCHCR_CAE_BIT_NOERROR) + { + ERROR("DMA(2) - Channel Address Error\n"); + while(1) + { + ; /* panic */ + } + } + } + while ((mem_read32(RTDMAC_RDMCHCR(DMACH)) & RDMCHCR_TE_BIT) == TE_FLAG); + + /* DMA transfer disabled */ + reg = mem_read32(RTDMAC_RDMCHCR(DMACH)); + reg &= ~(RDMCHCR_ALL_BIT_MASK); + mem_write32(RTDMAC_RDMCHCR(DMACH), reg); + + rpc_end_state_check(); +} +/* End of function dma_end */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/dma2.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/dma2.h new file mode 100644 index 00000000..80dbd19c --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/dma2.h @@ -0,0 +1,56 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2015-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : DMA driver header + ******************************************************************************/ +/****************************************************************************** + * @file dma.h + * - Version : 0.03 + * @brief DMA driver header + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 16.02.2022 0.01 First Release + * : 01.04.2022 0.02 Add definitions. + * : 09.11.2022 0.03 License notation change. + *****************************************************************************/ + +#ifndef DMA2_H_ +#define DMA2_H_ + +#define TRANS_UNIT_1BYTE (0x0) +#define TRANS_UNIT_64BYTES (0x6) + +#define DMA_MODE_SRC_INC (0x0U) +#define DMA_MODE_SRC_FIX (0x1U) +#define TRANS_SIZE_1BYTE (0x1U) +#define TRANS_SIZE_64BYTE (0x40U) + +void dma2_init(void); +void dma2_start(uint32_t dst, uint32_t src, uint32_t len, uint32_t mode); +void dma2_start_xbyte(uint32_t dst, uint32_t src, uint32_t len, uint32_t trns_unit); +void dma2_end(void); + +#endif /* DMA2_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/qspi_xdr_mode.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/qspi_xdr_mode.c new file mode 100644 index 00000000..567ac978 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/qspi_xdr_mode.c @@ -0,0 +1,367 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RPC driver + ******************************************************************************/ +/****************************************************************************** + * @file rpc.c + * - Version : 0.08 + * @brief Initial setting process of RPC. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Add rpc_release function. + * : 27.07.2022 0.03 Add QSPI Flash vendor ID check and QSPI Flash + * : command initialization. + * : 22.08.2022 0.04 Add DDR mode for QSPI Flash. + * : 21.09.2022 0.05 Fix comparison of test data + * : in adjust_strobe_timing function. + * : 12.01.2023 0.06 Add PFC setting to qspi_ddr_transfer_mode() + * : function. + * : 04.04.2023 0.07 Removed stdio.h. + * : 17.06.2024 0.08 Fix PUEN register setting when QSPI DDR mode. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RPC_PHYCNT_DDRCAL ((uint32_t)1U << 19U) +#define RPC_PHYCNT_PHYMEM_SPI_DDR ((uint32_t)1U << 0U) +#define RPC_PHYCNT_PHYMEM_MASK (0x00000003U) +#define RPC_DRCR_RCF ((uint32_t)1U << 9U) +#define RPC_DRCR_SSLN_NEGATE (0x01000000U) +#define RPC_DRCR_RBE_RBURST_MASK (0x001F0000U) +#define RPC_DRCR_RBE_RBURST_1DATA (0x00000000U) /* Smallest data unit (8byte) */ +#define RPC_DRCR_RBE_RBURST_32DATA (0x001F0000U) /* biggest data unit (256byte) */ +#define RPC_DRCR_RBE_ENABLE (0x00000100U) +#define RPC_DRCMR_CMD_SHIFT (16U) +#define RPC_DRCMR_CMD_MASK ((uint32_t)0xFFU << RPC_DRCMR_CMD_SHIFT) +#define RPC_DRCMR_OCMD_MASK ((uint32_t)0xFFU << 0U) +#define RPC_DRCMR_HW_INIT (0x00030000U) +#define RPC_DREAR_EAV_MASK ((uint32_t)0xFFU << 16U) +#define RPC_DREAR_EAC_MASK ((uint32_t)0x7U << 0U) +#define RPC_DREAR_EAC_EXT_ADDR_25BIT ((uint32_t)0x1U << 0U) +#define RPC_DREAR_HW_INIT (0x00000000U) +#define RPC_DRENR_CDB_MASK (0xC0000000U) +#define RPC_DRENR_CDB_1BIT (0x00000000U) +#define RPC_DRENR_ADB_MASK (0x03000000U) +#define RPC_DRENR_ADB_4BIT (0x02000000U) +#define RPC_DRENR_DRDB_MASK (0x00030000U) +#define RPC_DRENR_DRDB_4BIT (0x00020000U) +#define RPC_DRENR_DME_MASK (0x00008000U) +#define RPC_DRENR_DME_ENABLE (0x00008000U) +#define RPC_DRENR_CDE_ENABLE ((uint32_t)0x1U << 14U) +#define RPC_DRENR_ADE_MASK (0x00000F00U) +#define RPC_DRENR_ADE_32BIT_ADDR ((uint32_t)0xFU << 8U) +#define RPC_DRENR_HW_INIT (0x00004700U) +#define RPC_DRENR_TRANS_DISABLE (0x00000000U) +#define RPC_SMCMR_CMD_SHIFT (16U) +#define RPC_SMCMR_CMD_MASK (0x00FF0000U) +#define RPC_SMCMR_OCMD_MASK (0x000000FFU) +#define RPC_SMDRENR_HYPE_MASK (0x00007000U) +#define RPC_SMDRENR_ADDRE (0x00000100U) +#define RPC_SMDRENR_OPDRE (0x00000010U) +#define RPC_SMDRENR_SPIDRE (0x00000001U) +#define RPC_SMENR_CDB_MASK (0xC0000000U) +#define RPC_SMENR_OCDB_MASK (0x30000000U) +#define RPC_SMENR_ADB_MASK (0x03000000U) +#define RPC_SMENR_OPDB_MASK (0x00300000U) +#define RPC_SMENR_SPIDB_MASK (0x00030000U) +#define RPC_SMENR_DME_EN (0x00008000U) +#define RPC_SMENR_CDE_EN (0x00004000U) +#define RPC_SMENR_OCDE_EN (0x00001000U) +#define RPC_SMENR_ADE_MASK (0x00000F00U) +#define RPC_SMENR_OPDE_MASK (0x000000F0U) +#define RPC_SMENR_SPIDE_MASK (0x0000000FU) +#define RPC_SMENR_SPIDE_SPI_32 (0x0000000FU) +#define RPC_SMCR_SSLKP (0x00000100U) +#define RPC_SMCR_SPIRE (0x00000004U) +#define RPC_SMCR_SPIWE (0x00000002U) +#define RPC_SMCR_SPIE (0x00000001U) +#define RPC_CMNCR_MD (0x80000000U) /* bit[31]:Operating Mode Switch -> Manual mode */ +#define RPC_CMNCR_MOIIO_MASK (0x00FF0000U) +#define RPC_CMNCR_MOIIO3_HI_Z (0x00C00000U) +#define RPC_CMNCR_MOIIO2_HI_Z (0x00300000U) +#define RPC_CMNCR_MOIIO1_HI_Z (0x000C0000U) +#define RPC_CMNCR_MOIIO0_HI_Z (0x00030000U) +#define RPC_CMNCR_BSZ_MASK (0x00000003U) +#define RPC_DRDRENR_DRDRE (0x00000001U) +#define RPC_DRDRENR_ADDRE (0x00000100U) +#define RPC_PHYOFFSET1_DDRTMG_MSK (0x30000000U) +#define RPC_PHYOFFSET1_DDRTMG_DDR (0x20000000U) + +#define STRTIM_SMALLEST (0x0000000FU) +#define STRTIM_MASK_3 (0x00000008U) +#define STRTIM_MASK (0x00000007U) +#define STRTIM_MATCH_ERROR (0xFFFFFFFFU) + +/* For PFC register */ +#define PFC_PUEN3_QSPI0_IO3 (0x00010000U) /* bit16 */ +#define PFC_PUEN3_QSPI0_IO2 (0x00020000U) /* bit17 */ + +/* verification data for strobe timing adjustment */ +#define QSPI_TESTDATA (0x5A5AA5A5U) +#define QSPI_TESTDATA_OFFSET (0x00000400U) +#define QSPI_TESTDATA_FLASH_ADDR (FLASH_CONTENT_CERT_ADDR + QSPI_TESTDATA_OFFSET) /* Offset 0x00240400 */ + +static inline void set_strtim(uint32_t strobe_timing); +#if (QSPI_DDR_MODE==1) +static void adjust_strobe_timing(void); +#endif + +#if (QSPI_DDR_MODE==0) +void qspi_sdr_transfer_mode(uint32_t command) +{ + uint32_t reg; + /* check the transfer end flag */ + rpc_end_state_check(); + + /* For the initial setting flow of RPC, see Figure 112.12 in */ + /* "R-Car Series, S4 Series User's Manual" and */ + /* "R-Car Series, V4H Series User's Manual". */ + /* This RPC setting is for S25FS512S device */ + /* A register that does not set a value expects */ + /* the initial value of HW. */ + + /* PHY calibration */ + set_strtim(STRTIM_SMALLEST); + reg = mem_read32(RPC_PHYCNT); + reg |= RPC_PHYCNT_CAL; + mem_write32(RPC_PHYCNT, reg); + /* External Address Space Read Mode */ + reg = mem_read32(RPC_CMNCR); + reg &= ~(RPC_CMNCR_MD); + mem_write32(RPC_CMNCR, reg); + /* Read cache Flash */ + reg = mem_read32(RPC_DRCR); + mem_write32(RPC_DRCR, (reg | RPC_DRCR_RCF)); + /* 32bit address read command*/ + reg = mem_read32(RPC_DRCMR); + reg &= ~(RPC_DRCMR_CMD_MASK | RPC_DRCMR_OCMD_MASK); + reg |= (command << RPC_SMCMR_CMD_SHIFT); + mem_write32(RPC_DRCMR, reg); + /* Extended external address valid range is [25:0]*/ + reg = mem_read32(RPC_DREAR); + reg &= ~(RPC_DREAR_EAV_MASK | RPC_DREAR_EAC_MASK); + reg |= RPC_DREAR_EAC_EXT_ADDR_25BIT; + mem_write32(RPC_DREAR, reg); + /* output command is 32bit width */ + reg = mem_read32(RPC_DRENR); + reg &= ~(RPC_DRENR_CDE_ENABLE | RPC_DRENR_ADE_MASK); + reg |= (RPC_DRENR_CDE_ENABLE | RPC_DRENR_ADE_32BIT_ADDR); + mem_write32(RPC_DRENR, reg); +} +/* End of function rpc_init(void) */ + +#else +void qspi_ddr_transfer_mode(uint32_t command) +{ + uint32_t reg; + + /* check the transfer end flag */ + rpc_end_state_check(); + + cpg_reg_write(CPG_RPCCKCR, CPG_RPCCKCR, RPC_CLK_160MHZ); /* RPCD2 = 80MHz */ + + /* Disable pull-up/down function of QSPI0_IO2/QSPI0_IO3 when QSPI DDR transfer mode. */ + reg = mem_read32(PFC_PUEN3_RW); + reg &= ~(PFC_PUEN3_QSPI0_IO3 | PFC_PUEN3_QSPI0_IO2); + pfc_reg_write(PFC_PUEN3_RW, reg); + + /* For the initial setting flow of RPC, see Figure 112.12 in */ + /* "R-Car Series, S4 Series User's Manual" and */ + /* "R-Car Series, V4H Series User's Manual". */ + /* This RPC setting is for S25FS512S device */ + /* A register that does not set a value expects */ + /* the initial value of HW. */ + + /* PHY calibration */ + set_strtim(STRTIM_SMALLEST); + reg = mem_read32(RPC_PHYCNT); + reg |= RPC_PHYCNT_DDRCAL; + reg |= RPC_PHYCNT_PHYMEM_SPI_DDR; + mem_write32(RPC_PHYCNT, reg); + /* External Address Space Read Mode */ + reg = mem_read32(RPC_CMNCR); + reg &= ~(RPC_CMNCR_MD | RPC_CMNCR_MOIIO_MASK | RPC_CMNCR_BSZ_MASK); + reg |= (RPC_CMNCR_MOIIO0_HI_Z | RPC_CMNCR_MOIIO1_HI_Z | RPC_CMNCR_MOIIO2_HI_Z | RPC_CMNCR_MOIIO3_HI_Z); + mem_write32(RPC_CMNCR, reg); + /* Read cache Flash */ + reg = mem_read32(RPC_DRCR); + reg &= ~(RPC_DRCR_RBE_RBURST_MASK); + reg |= (RPC_DRCR_SSLN_NEGATE | RPC_DRCR_RBE_RBURST_1DATA | RPC_DRCR_RCF | RPC_DRCR_RBE_ENABLE); + mem_write32(RPC_DRCR, (reg | RPC_DRCR_RCF)); + /* 32bit address read command*/ + reg = mem_read32(RPC_DRCMR); + reg &= ~(RPC_DRCMR_CMD_MASK | RPC_DRCMR_OCMD_MASK); + reg |= (command << RPC_SMCMR_CMD_SHIFT); + mem_write32(RPC_DRCMR, reg); + /* Extended external address valid range is [25:0]*/ + reg = mem_read32(RPC_DREAR); + reg &= ~(RPC_DREAR_EAV_MASK | RPC_DREAR_EAC_MASK); + reg |= RPC_DREAR_EAC_EXT_ADDR_25BIT; + mem_write32(RPC_DREAR, reg); + /* output command is 32bit width */ + reg = mem_read32(RPC_DRENR); + reg &= ~(RPC_DRENR_CDB_MASK | RPC_DRENR_ADB_MASK | RPC_DRENR_DRDB_MASK + | RPC_DRENR_DME_MASK | RPC_DRENR_CDE_ENABLE | RPC_DRENR_ADE_MASK); + reg |= (RPC_DRENR_CDB_1BIT | RPC_DRENR_ADB_4BIT | RPC_DRENR_DRDB_4BIT + | RPC_DRENR_DME_ENABLE | RPC_DRENR_CDE_ENABLE | RPC_DRENR_ADE_32BIT_ADDR); + mem_write32(RPC_DRENR, reg); + /* Set Dummy Cycle */ + mem_write32(RPC_DRDMCR, (uint32_t)RCAR_QSPI_DDR_DUMMY_CYCLE - 1U); + /* Specifies DDR transfer of the data read. */ + reg = mem_read32(RPC_DRDRENR); + reg |= RPC_DRDRENR_DRDRE | RPC_DRDRENR_ADDRE; + mem_write32(RPC_DRDRENR, reg); + /* timing adjustment in DDR read operation. */ + reg = mem_read32(RPC_PHYOFFSET1); + reg &= ~(RPC_PHYOFFSET1_DDRTMG_MSK); + reg |= RPC_PHYOFFSET1_DDRTMG_DDR; + mem_write32(RPC_PHYOFFSET1, reg); + + /* Change PHYCNT.DDRCAL */ + reg = mem_read32(RPC_PHYCNT); + reg |= RPC_PHYCNT_PHYMEM_SPI_DDR; + reg &= ~RPC_PHYCNT_CAL; + reg |= RPC_PHYCNT_DDRCAL; + mem_write32(RPC_PHYCNT, reg); + + adjust_strobe_timing(); + + /* Set data burst length to 256 byte */ + reg = mem_read32(RPC_DRCR); + reg |= RPC_DRCR_RBE_RBURST_32DATA; + mem_write32(RPC_DRCR, reg); +} + +static void adjust_strobe_timing(void) +{ + uint32_t reg; + uint32_t flash_data; + uint32_t remap_flash_addr; + uint32_t strobe_timing = STRTIM_SMALLEST; + uint32_t first_match = STRTIM_MATCH_ERROR; + uint32_t match_count = 0U; + uint32_t loop; + + /* Convert verification data to logical addresses. */ + remap_register(QSPI_TESTDATA_FLASH_ADDR, &remap_flash_addr); + + INFO("Adjust strobe timing\n"); + + INFO("QSPI_TESTDATA_FLASH_ADDR = 0x%08x\n",remap_flash_addr); + + for(loop = 0U; loop <= STRTIM_SMALLEST; loop++) + { + /* RPC Transfer Disable */ + mem_write32(RPC_DRENR, RPC_DRENR_TRANS_DISABLE); + + /* Read cache Flash */ + reg = mem_read32(RPC_DRCR); + mem_write32(RPC_DRCR, (reg | RPC_DRCR_RCF)); + + /* set strobe timing */ + set_strtim(strobe_timing); + + /* RPC Transfer Enable */ + reg = mem_read32(RPC_DRENR); + reg &= ~(RPC_DRENR_CDB_MASK | RPC_DRENR_ADB_MASK | RPC_DRENR_DRDB_MASK + | RPC_DRENR_DME_MASK | RPC_DRENR_CDE_ENABLE | RPC_DRENR_ADE_MASK); + reg |= (RPC_DRENR_CDB_1BIT | RPC_DRENR_ADB_4BIT | RPC_DRENR_DRDB_4BIT + | RPC_DRENR_DME_ENABLE | RPC_DRENR_CDE_ENABLE | RPC_DRENR_ADE_32BIT_ADDR); + mem_write32(RPC_DRENR, reg); + + /* Read verification Data on QSPIFlash */ + flash_data = mem_read32(remap_flash_addr); + + /* check the transfer end flag */ + rpc_end_state_check(); + + INFO("strobe timing:0x%x\tflash_data:0x%x\ttest_data:0x%x\n", strobe_timing, flash_data, QSPI_TESTDATA); + + /* Comparison of Verification Data */ + if(flash_data == QSPI_TESTDATA) + { + /* First match of validation data. */ + if(first_match == STRTIM_MATCH_ERROR) + { + first_match = strobe_timing; + } + match_count++; + } + else + { + /* If out of timing to match */ + if(first_match != STRTIM_MATCH_ERROR) + { + /* Terminate the exploration of Strobe timing. */ + break; + } + } + strobe_timing--; + } + + /* Verification Data is not matched */ + if(first_match == STRTIM_MATCH_ERROR) + { + ERROR("Failed Strobe timing adjustment of DDR transfer mode.\n"); + panic; + } + + INFO("first_match:0x%x\tmatch_count:0x%x\n", first_match, match_count); + remap_unregister(remap_flash_addr); + + /* strobe timing value adjustment */ + strobe_timing = first_match - (match_count / 2U); + + /* set strobe timing */ + set_strtim(strobe_timing); + INFO("RPC_PHYCNT\t = 0x%08x\n",mem_read32(RPC_PHYCNT)); +} +#endif + +static inline void set_strtim(uint32_t strobe_timing) +{ + uint32_t reg; + reg = mem_read32(RPC_PHYCNT); + reg &= ~((STRTIM_MASK_3 << 24U) | (STRTIM_MASK << 15U)); + reg |= ((strobe_timing & STRTIM_MASK_3) << 24U); /* bit[27] */ + reg |= ((strobe_timing & STRTIM_MASK) << 15U); /* bit[17:15] */ + mem_write32(RPC_PHYCNT, reg); +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/rpc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/rpc.c new file mode 100644 index 00000000..68310af0 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/rpc.c @@ -0,0 +1,280 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RPC driver + ******************************************************************************/ +/****************************************************************************** + * @file rpc.c + * - Version : 0.08 + * @brief Initial setting process of RPC. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Add rpc_release function. + * : 27.07.2022 0.03 Add QSPI Flash vendor ID check and QSPI Flash + * : command initialization. + * : 22.08.2022 0.04 Add DDR mode for QSPI Flash. + * : 21.09.2022 0.05 Fix comparison of test data + * : in adjust_strobe_timing function. + * : 12.01.2023 0.06 Add PFC setting to qspi_ddr_transfer_mode() + * : function. + * : 04.04.2023 0.07 Removed stdio.h. + * : 17.06.2024 0.08 Fix PUEN register setting when QSPI DDR mode. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RST_MODEMR0_BOOTMODE (0xFU << 1U) +#define BOOTMODE_QSPI_SINGLE_40MHZ (0x4U) +#define BOOTMODE_QSPI_DMA (0x6U) + +typedef struct{ + uint32_t reg_addr; /* registers address. */ + uint32_t value; /* setting value. */ +} st_register_table_t; + +#define RPC_TBL_MAX (13U) + +static st_register_table_t g_rpc_reg_hwinit_val_tbl[RPC_TBL_MAX]; + +/* The number of Flash vendor */ +#if USER_ADDED_QSPI == 0 +#define VENDOR_NUM (1U) +#endif /* USER_ADDED_QSPI == 0 */ +/* Command for S25FS512S */ +#define MT25QU01GB_READ_FAST (0x0CU) /* 4FAST_READ, read_fast */ +#define MT25QU01GB_SEC_ER_4BYTE_ADDR (0xDCU) /* 4SE, sector_erase_4byte_addr */ +#define MT25QU01GB_PARA_4KBYTE_ER (0x21U) /* 4P4E, parameter_4kbyte_erase */ +#define MT25QU01GB_PP_4BYTE_ADDR (0x12U) /* 4PP, pp_4byte_addr */ +#define MT25QU01GB_READ_ANY_REG (0x05U) /* READ STATUS, read_any_register */ +#define MT25QU01GB_READ_STATUS (0x70U) /* READ FLAG STATUS, read_stts_register */ +#define MT25QU01GB_WRITE_ENABLE (0x06U) /* WREN, write_enable */ +#define S25FS512S_READ_32BIT_ADDR (0x13U) /* read 32bit address */ +#define S25FS512S_DDR_QUAD_IO_READ_32BIT_ADDR (0xEEU) /* DDR quad I/O read 32bit address */ + +#if USER_ADDED_QSPI == 1 +/* User can customize for another vendor's QSPI Flash. */ +#define VENDOR_NUM (2U) +/* Command for XXXXXXXXX */ +#define XXXXXXXXX_READ_FAST (0x0CU) /* 4-byte read_fast */ +#define XXXXXXXXX_SEC_ER_4BYTE_ADDR (0xDCU) /* sector_erase_4byte_addr */ +#define XXXXXXXXX_PARA_4KBYTE_ER (0x21U) /* parameter_4kbyte_erase */ +#define XXXXXXXXX_PP_4BYTE_ADDR (0x12U) /* page_program_4byte_addr */ +#define XXXXXXXXX_READ_ANY_REG (0x05U) /* READ STATUS, read_any_register */ +#define XXXXXXXXX_READ_STATUS (0x2BU) /* RDSCUR, read_stts_register */ +#define XXXXXXXXX_WRITE_ENABLE (0x06U) /* WREN, write_enable */ +#define XXXXXXXXX_READ_32BIT_ADDR (0x13U) /* read 32bit address */ +#define XXXXXXXXX_DDR_QUAD_IO_READ_32BIT_ADDR (0xEEU) /* DDR quad I/O read 32bit address */ +#endif /* USER_ADDED_QSPI == 1 */ + +static const st_qspi_cmd_tbl_t qspi_cmd_tbls[VENDOR_NUM] = +{ + /* Command table for MT25QU01GB */ + { + MT25QU01GB_READ_FAST, /* read_fast */ + MT25QU01GB_SEC_ER_4BYTE_ADDR, /* sector_erase_4byte_addr */ + MT25QU01GB_PARA_4KBYTE_ER, /* parameter_4kbyte_erase */ + MT25QU01GB_PP_4BYTE_ADDR, /* pp_4byte_addr */ + MT25QU01GB_READ_ANY_REG, /* read_any_register */ + MT25QU01GB_READ_STATUS, /* read_status */ + MT25QU01GB_WRITE_ENABLE, /* write_enable */ + S25FS512S_READ_32BIT_ADDR, /* read 32bit address */ + S25FS512S_DDR_QUAD_IO_READ_32BIT_ADDR /* DDR quad I/O read 32bit address */ + }, +#if USER_ADDED_QSPI == 1 + /* Command table for XXXXXXXXX */ + /* User can customize for another vendor's QSPI Flash. */ + { + XXXXXXXXX_READ_FAST, /* read_fast */ + XXXXXXXXX_SEC_ER_4BYTE_ADDR, /* sector_erase_4byte_addr */ + XXXXXXXXX_PARA_4KBYTE_ER, /* parameter_4kbyte_erase */ + XXXXXXXXX_PP_4BYTE_ADDR, /* pp_4byte_addr */ + XXXXXXXXX_READ_ANY_REG, /* read_any_register */ + XXXXXXXXX_READ_STATUS, /* read_status */ + XXXXXXXXX_WRITE_ENABLE, /* write_enable */ + XXXXXXXXX_READ_32BIT_ADDR, /* read 32bit address */ + XXXXXXXXX_DDR_QUAD_IO_READ_32BIT_ADDR /* DDR quad I/O read 32bit address */ + } +#endif /* USER_ADDED_QSPI == 1 */ +}; + +static const uint32_t dev_id_index[VENDOR_NUM] = +{ + /* QSPI Flash device ID */ + DEVID_MT25QU01GB, /* MT25QU01GB */ +#if USER_ADDED_QSPI == 1 + /* User can customize for another vendor's QSPI Flash. */ + DEVID_XXXXXXXXX +#endif /* USER_ADDED_QSPI == 1 */ +}; + +const st_qspi_cmd_tbl_t* gp_qspi_cmd_tbl; + +static void rpc_save_hw_init_val(void); +static uint32_t init_qspi_cmd(uint32_t device_id); + +void rpc_init(void) +{ + /* Save HW initial value of RPC registers */ + rpc_save_hw_init_val(); +} + +void qspi_flash_rw_init(void) +{ + uint32_t reg; + uint32_t qspi_flash_id; + uint32_t rtn_val; + static bool qspi_flash_id_checked = false; + + if (qspi_flash_id_checked == true) + { + NOTICE("QSPI Flash ID has been checked.\n"); + return; + } + qspi_flash_id_checked = true; + + /* judge boot device */ + reg = (mem_read32(RST_MODEMR0) & RST_MODEMR0_BOOTMODE) >> 1U; + + if ((reg == BOOTMODE_QSPI_SINGLE_40MHZ) || + (reg == BOOTMODE_QSPI_DMA)) + { + /* check the transfer end flag */ + rpc_end_state_check(); + + /* Initialize command for QSPI Flash. */ + read_qspi_flash_id(&qspi_flash_id); + qspi_flash_id = (qspi_flash_id & DEVICE_ID_MASK); + NOTICE("QSPI Flash ID = 0x%08x\n", qspi_flash_id); + rtn_val = init_qspi_cmd(qspi_flash_id); + if(rtn_val != QSPI_CMD_INIT_SUCCESS) + { + /* unknown QSPI Flash ID */ + ERROR("QSPI Flash command initialization error!!\n"); + panic; + } + +#if (QSPI_DDR_MODE==1) + /* Initialize for QSPI DDR transfer mode */ + qspi_ddr_transfer_mode(gp_qspi_cmd_tbl->ddr_quad_io_read_32bit_addr); +#else + /* Initialize for QSPI SDR transfer mode */ + qspi_sdr_transfer_mode(gp_qspi_cmd_tbl->read_32bit_addr); +#endif + } +} +/* End of function rpc_init(void) */ + +void rpc_release(void) +{ + uint32_t loop; + + /* Set HW initial value to RPC registers */ + for(loop = 0; loop < RPC_TBL_MAX; loop++) + { + mem_write32(g_rpc_reg_hwinit_val_tbl[loop].reg_addr, g_rpc_reg_hwinit_val_tbl[loop].value); + } +} +/* End of function rpc_release(void) */ + +void rpc_end_state_check(void) +{ + /* Wait until RPC data transfer is completed */ + while ((mem_read32(RPC_CMNSR) & CMNSR_TEND) != 1U) + { + ; + } +} +/* End of function rpc_end_state_check(void) */ + + +static void rpc_save_hw_init_val(void) +{ + uint32_t loop; + + g_rpc_reg_hwinit_val_tbl[0].reg_addr = RPC_CMNCR; + g_rpc_reg_hwinit_val_tbl[1].reg_addr = RPC_DRCR; + g_rpc_reg_hwinit_val_tbl[2].reg_addr = RPC_DRCMR; + g_rpc_reg_hwinit_val_tbl[3].reg_addr = RPC_DREAR; + g_rpc_reg_hwinit_val_tbl[4].reg_addr = RPC_DRENR; + g_rpc_reg_hwinit_val_tbl[5].reg_addr = RPC_SMCR; + g_rpc_reg_hwinit_val_tbl[6].reg_addr = RPC_SMCMR; + g_rpc_reg_hwinit_val_tbl[7].reg_addr = RPC_SMENR; + /* RPC_SMRDR0 is Read only */ + /* RPC_CMNSR is Read only */ + g_rpc_reg_hwinit_val_tbl[8].reg_addr = RPC_DRDMCR; + g_rpc_reg_hwinit_val_tbl[9].reg_addr = RPC_DRDRENR; + g_rpc_reg_hwinit_val_tbl[10].reg_addr = RPC_SMDRENR; + g_rpc_reg_hwinit_val_tbl[11].reg_addr = RPC_PHYCNT; + g_rpc_reg_hwinit_val_tbl[12].reg_addr = RPC_PHYOFFSET1; + + /* Save RPC register initial value */ + for(loop = 0; loop < RPC_TBL_MAX; loop++) + { + g_rpc_reg_hwinit_val_tbl[loop].value = mem_read32(g_rpc_reg_hwinit_val_tbl[loop].reg_addr); + } +} + +uint8_t prk3_rev = 3; +static uint32_t init_qspi_cmd(uint32_t device_id) +{ + uint32_t i = 0U; + uint32_t rtn_val = QSPI_CMD_INIT_ERROR; + + gp_qspi_cmd_tbl = NULL; + + for (i = 0U; i < VENDOR_NUM; i++) + { + if (device_id == dev_id_index[i]) + { + gp_qspi_cmd_tbl = &qspi_cmd_tbls[i]; + if (device_id == DEVID_XXXXXXXXX) + prk3_rev = 4; + rtn_val = QSPI_CMD_INIT_SUCCESS; + break; + } + } + return rtn_val; +} + +int check_Erase_Fail(uint32_t status) { + if (prk3_rev <= 3) + return (status & BIT5); + return (status & BIT6); +} +/* End of function init_qspi_cmd(uint32_t device_id) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/rpcqspidrv.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/rpcqspidrv.c new file mode 100644 index 00000000..d4ba398b --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/rpcqspidrv.c @@ -0,0 +1,809 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2015-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RPC driver for QSPI Flash + ******************************************************************************/ +/****************************************************************************** + * @file rpcqspidrv.c + * - Version : 0.07 + * @brief RPC driver for QSPI Flash. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 15.10.2021 0.01 First Release + * : 16.02.2022 0.02 Modify how to write to RPC_WRBUF register. + * : 15.03.2022 0.03 Modify to use inline function in mem_io.h + * : when access to register. + * : 18.03.2022 0.04 Modify to read modify write when write to + * : register. + * : 23.03.2022 0.05 Modify command for QSPI Flash to refer to + * : command table. + * : 01.04.2022 0.06 Modify magic number to definition. + * : 09.11.2022 0.07 License notation change. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "dma2.h" + +static uint32_t read_register_qspi_flash(uint32_t cmd, uint32_t *readData); + +void init_rpc_qspi_flash_4fastread_ext_mode(void) +{ + uint32_t reg; + + reg = mem_read32(RPC_PHYCNT); + reg |= (RPC_PHYCNT_STRTIM3 + | RPC_PHYCNT_STRTIM2 + | RPC_PHYCNT_STRTIM1 + | RPC_PHYCNT_STRTIM0); + reg &= ~(RPC_PHYCNT_HS + | RPC_PHYCNT_WBUF2 + | RPC_PHYCNT_WBUF + | RPC_PHYCNT_PHYMEM_HYP); + mem_write32(RPC_PHYCNT, reg); + reg |= RPC_PHYCNT_CAL; + mem_write32(RPC_PHYCNT, reg); + + reg = mem_read32(RPC_CMNCR); + reg &= ~(CMNCR_MD_MANUAL /* External address space read mode */ + | CMNCR_BSZ_MASK); /* Data Bus Size: Serial flash memory x 1*/ + reg |= (CMNCR_MOIIO3_HIZ + | CMNCR_MOIIO2_HIZ + | CMNCR_MOIIO1_HIZ + | CMNCR_MOIIO0_HIZ + | CMNCR_IO0FV_HIZ); + mem_write32(RPC_CMNCR, reg); + /* bit31 MD = 0 : External address space read mode */ + /* bit1-0 BSZ[1:0] = 00 : QSPI Flash x 1 */ + + reg = mem_read32(RPC_DRCR); + reg &= ~(DRCR_SSLN + | DRCR_RCF + | DRCR_SSLE); + reg |= (DRCR_RBURST_32UNITS + | DRCR_RBE_BURST); + mem_write32(RPC_DRCR, reg); + /* bit20-16 RBURST[4:0] = 11111 : 32 continuous data unit */ + /* bit8 RBE = 1 : Burst read */ + + reg = mem_read32(RPC_DRCMR); + reg &= ~(DRCMR_CMD_MASK + | DRCMR_OCMD_MASK); + reg |= ((gp_qspi_cmd_tbl -> read_fast) << DRCMR_SMCMR_CMD_SHIFT); + mem_write32(RPC_DRCMR, reg); + /* bit23-16 CMD[7:0] = 0x0C : 4FAST_READ 0Ch Command 4-byte address command */ + + reg = mem_read32(RPC_DREAR); + reg &= ~(DREAR_EAV_MASK + | DREAR_EAC_MASK); + reg |= DREAR_EAC_26BITS; + mem_write32(RPC_DREAR, reg); + /* bit23-16 EAV[7:0] = 0 : ADR[32:26] output set0 */ + /* bit2-0 EAC[2:0] = 001 : ADR[25:0 ] Enable */ + + reg = mem_read32(RPC_DRENR); + reg &= ~(DRENR_CDB_MASK + | DRENR_OCDB_MASK + | DRENR_ADB_MASK + | DRENR_OPDB_MASK + | DRENR_DRDB_MASK + | DRENR_OCDE_EN + | DRENR_ADE_MASK + | DRENR_OPDE_MASK); + reg |= (DRENR_DME_EN + | DRENR_CDE_EN + | DRENR_ADE_ONE_SERIAL); + mem_write32(RPC_DRENR, reg); + /* bit31-30 CDB[1:0] = 00 : 1bit width command (QSPI0_MOSI) */ + /* bit25-24 ADB[1:0] = 00 : 1bit width address (QSPI0_MOSI) */ + /* bit17-16 DRDB[1:0] = 00 : 1bit width transfer data (QSPI0_IO0) */ + /* bit15 DME = 1 : dummy cycle enable */ + /* bit14 CDE = 1 : Command enable */ + /* bit11-8 ADE[3:0] = 1111 : ADR[31:0] output (32 Bit Address) */ + + reg = mem_read32(RPC_DRDMCR); + reg &= ~(DRDMCR_DMCYC_MASK); + reg |= DRDMCR_DMCYC_8; + mem_write32(RPC_DRDMCR, reg); + /* bit2-0 DMCYC[2:0] = 111 : 8 cycle dummy wait */ + + reg = mem_read32(RPC_DRDRENR); + reg &= ~(DRDRENR_HYPE_MASK + | DRDRENR_ADDRE + | DRDRENR_OPDRE + | DRDRENR_DRDRE); + mem_write32(RPC_DRDRENR, reg); + /* bit8 ADDRE = 0 : Address SDR transfer */ + /* bit0 DRDRE = 0 : DATA SDR transfer */ +} +/* End of function init_rpc_qspi_flash_4fastread_ext_mode */ + +void init_rpc_qspi_flash(void) +{ + uint32_t reg; + + power_on_rpc(); + + set_rpc_clock_mode(RPC_CLK_80M); + reset_rpc(); + set_rpc_ssl_delay(); + + reg = mem_read32(RPC_OFFSET1); + reg &= ~(PHYOFFSET1_MASK); + reg |= PHYOFFSET1_DMA_QSPI; + mem_write32(RPC_OFFSET1, reg); +} +/* End of function init_rpc_qspi_flash */ + +/* 4SE DCh 4-byte address */ +void sector_erase_4byte_qspi_flash(uint32_t sector_addr) +{ + uint32_t reg; + + reg = mem_read32(RPC_PHYCNT); + reg |= (RPC_PHYCNT_CAL + | RPC_PHYCNT_STRTIM3 + | RPC_PHYCNT_STRTIM2 + | RPC_PHYCNT_STRTIM1 + | RPC_PHYCNT_STRTIM0); + reg &= ~(RPC_PHYCNT_HS + | RPC_PHYCNT_WBUF2 + | RPC_PHYCNT_WBUF + | RPC_PHYCNT_PHYMEM_HYP); + mem_write32(RPC_PHYCNT, reg); + /* bit31 CAL = 1 : PHY calibration */ + /* bit1-0 PHYMEM[1:0] = 00 : QSPI-SDR */ + + reg = mem_read32(RPC_CMNCR); + reg &= ~(CMNCR_BSZ_MASK); + reg |= (CMNCR_MD_MANUAL + | CMNCR_MOIIO3_HIZ + | CMNCR_MOIIO2_HIZ + | CMNCR_MOIIO1_HIZ + | CMNCR_MOIIO0_HIZ + | CMNCR_IO0FV_HIZ); + mem_write32(RPC_CMNCR, reg); + /* bit31 MD = 1 : Manual mode */ + /* bit1-0 BSZ[1:0] = 00 : QSPI Flash x 1 */ + + reg = mem_read32(RPC_SMCMR); + reg &= ~(SMCMR_CMD_MASK + | SMCMR_OCMD_MASK); + reg |= ((gp_qspi_cmd_tbl -> sector_erase_4byte_addr) << DRCMR_SMCMR_CMD_SHIFT); + mem_write32(RPC_SMCMR, reg); + /* bit23-16 CMD[7:0] = 0xDC : Sector Erase 4-byte address command */ + + mem_write32(RPC_SMADR, sector_addr); + + reg = mem_read32(RPC_SMDRENR); + reg &= ~(SMDRENR_HYPE_MASK + | SMDRENR_ADDRE + | SMDRENR_OPDRE + | SMDRENR_SPIDRE); + mem_write32(RPC_SMDRENR, reg); + /* bit8 ADDRE = 0 : Address SDR transfer */ + /* bit0 SPIDRE = 0 : DATA SDR transfer */ + + reg = mem_read32(RPC_SMENR); + reg &= ~(SMENR_CDB_MASK + | SMENR_OCDB_MASK + | SMENR_ADB_MASK + | SMENR_OPDB_MASK + | SMENR_SPIDB_MASK + | SMENR_DME_EN + | SMENR_OCDE_EN + | SMENR_ADE_MASK + | SMENR_OPDE_MASK + | SMENR_SPIDE_MASK); + reg |= (SMENR_CDE_EN + | SMENR_ADE_SERIAL_31); + mem_write32(RPC_SMENR, reg); + /* bit31-30 CDB[1:0] = 00 : 1bit width command (QSPI0_MOSI) */ + /* bit25-24 ADB[1:0] = 00 : 1bit width address (QSPI0_MOSI) */ + /* bit17-16 SPIDB[1:0] = 00 : 1bit width transfer data (QSPI0_MISO) */ + /* bit15 DME = 0 : No dummy cycle */ + /* bit14 CDE = 1 : Command enable */ + /* bit11-8 ADE[3:0] = 1111 : ADR[31:0] output (32 Bit Address) */ + /* bit3-0 SPIDE[3:0] = 0000 : No transfer */ + + reg = mem_read32(RPC_SMCR); + reg &= ~(SMCR_SSLKP + | SMCR_SPIRE + | SMCR_SPIWE); + reg |= SMCR_SPIE; + mem_write32(RPC_SMCR, reg); + /* bit2 SPIRE = 0 : Data read disable */ + /* bit1 SPIWE = 0 : Data write disable */ + /* bit0 SPIE = 1 : SPI transfer start */ + + wait_rpc_tx_end(); +} +/* End of function sector_erase_4byte_qspi_flash */ + +/* 4P4E 21h 4-byte address */ +void parameter_sector_erase_4kb_qspi_flash(uint32_t sector_addr) +{ + uint32_t reg; + + reg = mem_read32(RPC_PHYCNT); + reg |= (RPC_PHYCNT_CAL + | RPC_PHYCNT_STRTIM3 + | RPC_PHYCNT_STRTIM2 + | RPC_PHYCNT_STRTIM1 + | RPC_PHYCNT_STRTIM0); + reg &= ~(RPC_PHYCNT_HS + | RPC_PHYCNT_WBUF2 + | RPC_PHYCNT_WBUF + | RPC_PHYCNT_PHYMEM_HYP); + mem_write32(RPC_PHYCNT, reg); + /* bit31 CAL = 1 : PHY calibration */ + /* bit1-0 PHYMEM[1:0] = 00 : QSPI-SDR */ + + reg = mem_read32(RPC_CMNCR); + reg &= ~(CMNCR_BSZ_MASK); + reg |= (CMNCR_MD_MANUAL + | CMNCR_MOIIO3_HIZ + | CMNCR_MOIIO2_HIZ + | CMNCR_MOIIO1_HIZ + | CMNCR_MOIIO0_HIZ + | CMNCR_IO0FV_HIZ); + mem_write32(RPC_CMNCR, reg); + /* bit31 MD = 1 : Manual mode */ + /* bit1-0 BSZ[1:0] = 00 : QSPI Flash x 1 */ + + reg = mem_read32(RPC_SMCMR); + reg &= ~(SMCMR_CMD_MASK + | SMCMR_OCMD_MASK); + reg |= ((gp_qspi_cmd_tbl -> parameter_4kbyte_erase) << DRCMR_SMCMR_CMD_SHIFT); + mem_write32(RPC_SMCMR, reg); + /* bit23-16 CMD[7:0] = 0x21 : Parameter 4-kB Sector Erasecommand */ + + mem_write32(RPC_SMADR, sector_addr); + + reg = mem_read32(RPC_SMDRENR); + reg &= ~(SMDRENR_HYPE_MASK + | SMDRENR_ADDRE + | SMDRENR_OPDRE + | SMDRENR_SPIDRE); + mem_write32(RPC_SMDRENR, reg); + /* bit8 ADDRE = 0 : Address SDR transfer */ + /* bit0 SPIDRE = 0 : DATA SDR transfer */ + + reg = mem_read32(RPC_SMENR); + reg &= ~(SMENR_CDB_MASK + | SMENR_OCDB_MASK + | SMENR_ADB_MASK + | SMENR_OPDB_MASK + | SMENR_SPIDB_MASK + | SMENR_DME_EN + | SMENR_OCDE_EN + | SMENR_ADE_MASK + | SMENR_OPDE_MASK + | SMENR_SPIDE_MASK); + reg |= (SMENR_CDE_EN + | SMENR_ADE_SERIAL_31); + mem_write32(RPC_SMENR, reg); + /* bit31-30 CDB[1:0] = 00 : 1bit width command (QSPI0_MOSI) */ + /* bit25-24 ADB[1:0] = 00 : 1bit width address (QSPI0_MOSI) */ + /* bit17-16 SPIDB[1:0] = 00 : 1bit width transfer data (QSPI0_MISO) */ + /* bit15 DME = 0 : No dummy cycle */ + /* bit14 CDE = 1 : Command enable */ + /* bit11-8 ADE[3:0] = 1111 : ADR[31:0] output (32 Bit Address) */ + /* bit3-0 SPIDE[3:0] = 0000 : No transfer */ + + reg = mem_read32(RPC_SMCR); + reg &= ~(SMCR_SSLKP + | SMCR_SPIRE + | SMCR_SPIWE); + reg |= SMCR_SPIE; + mem_write32(RPC_SMCR, reg); + /* bit2 SPIRE = 0 : Data read disable */ + /* bit1 SPIWE = 0 : Data write disable */ + /* bit0 SPIE = 1 : SPI transfer start */ + + wait_rpc_tx_end(); +} +/* End of function parameter_sector_erase_4kb_qspi_flash */ + +/* Page Program (4PP:12h) 4-byte address */ +void write_data_4pp_with_buf_qspi_flash(uint32_t addr, uint32_t source_addr) +{ + uintptr_t i=0; + uint32_t reg; + + reg = mem_read32(RPC_DRCR); + reg |= (DRCR_SSLN + | DRCR_RBURST_32UNITS + | DRCR_RCF + | DRCR_RBE_BURST + | DRCR_SSLE); + mem_write32(RPC_DRCR, reg); + /* bit9 RCF = 1 : Read Cache Clear */ + + reg = mem_read32(RPC_PHYCNT); + reg |= (RPC_PHYCNT_CAL + | RPC_PHYCNT_STRTIM3 + | RPC_PHYCNT_STRTIM2 + | RPC_PHYCNT_STRTIM1 + | RPC_PHYCNT_STRTIM0 + | RPC_PHYCNT_WBUF2 + | RPC_PHYCNT_WBUF); + reg &= ~(RPC_PHYCNT_HS + | RPC_PHYCNT_PHYMEM_HYP); + mem_write32(RPC_PHYCNT, reg); + /* bit31 CAL = 1 : PHY calibration */ + /* bit2 WBUF = 1 : Write Buffer Enable */ + /* bit1-0 PHYMEM[1:0] = 00 : QSPI-SDR */ + + for(i = 0; i < RPC_WRITE_BUF_SIZE; i = i + TRANS_SIZE_64BYTE) + { + dma2_start_xbyte(RPC_WRBUF_PHYS+i, source_addr+i, TRANS_SIZE_64BYTE, TRANS_UNIT_64BYTES); + dma2_end(); + // dma_trans_start(RPC_WRBUF_PHYS+i, source_addr+i, TRANS_SIZE_64BYTE); + // dma_trans_end_check(); + } + + reg = mem_read32(RPC_CMNCR); + reg &= ~(CMNCR_BSZ_MASK); + reg |= (CMNCR_MD_MANUAL + | CMNCR_MOIIO3_HIZ + | CMNCR_MOIIO2_HIZ + | CMNCR_MOIIO1_HIZ + | CMNCR_MOIIO0_HIZ + | CMNCR_IO0FV_HIZ); + mem_write32(RPC_CMNCR, reg); + /* bit31 MD = 1 : Manual mode */ + /* bit1-0 BSZ[1:0] = 00 : QSPI Flash x 1 */ + + reg = mem_read32(RPC_SMCMR); + reg &= ~(SMCMR_CMD_MASK + | SMCMR_OCMD_MASK); + reg |= ((gp_qspi_cmd_tbl -> pp_4byte_addr) << DRCMR_SMCMR_CMD_SHIFT); + mem_write32(RPC_SMCMR, reg); + /* bit23-16 CMD[7:0] = 0x12 : Page Program 4-byte address */ + + mem_write32(RPC_SMADR, addr); + + reg = mem_read32(RPC_SMDRENR); + reg &= ~(SMDRENR_HYPE_MASK + | SMDRENR_ADDRE + | SMDRENR_OPDRE + | SMDRENR_SPIDRE); + mem_write32(RPC_SMDRENR, reg); + /* bit8 ADDRE = 0 : Address SDR transfer */ + /* bit0 SPIDRE = 0 : DATA SDR transfer */ + + reg = mem_read32(RPC_SMENR); + reg &= ~(SMENR_CDB_MASK + | SMENR_OCDB_MASK + | SMENR_ADB_MASK + | SMENR_OPDB_MASK + | SMENR_SPIDB_MASK + | SMENR_DME_EN + | SMENR_OCDE_EN + | SMENR_ADE_MASK + | SMENR_OPDE_MASK + | SMENR_SPIDE_MASK); + reg |= (SMENR_CDE_EN + | SMENR_ADE_SERIAL_31 + | SMENR_SPIDE_SPI_32); + mem_write32(RPC_SMENR, reg); + /* bit31-30 CDB[1:0] = 00 : 1bit width command (QSPI0_MOSI) */ + /* bit25-24 ADB[1:0] = 00 : 1bit width address (QSPI0_MOSI) */ + /* bit17-16 SPIDB[1:0] = 00 : 1bit width transfer data (QSPI0_MISO) */ + /* bit15 DME = 0 : No dummy cycle */ + /* bit14 CDE = 1 : Command enable */ + /* bit11-8 ADE[3:0] = 1111 : ADR[31:0] is output */ + /* bit3-0 SPIDE[3:0] = 1111 : 32bit transfer */ + + reg = mem_read32(RPC_SMCR); + reg &= ~(SMCR_SSLKP + | SMCR_SPIRE); + reg |= (SMCR_SPIWE + | SMCR_SPIE); + mem_write32(RPC_SMCR, reg); + /* bit2 SPIRE = 0 : Data read disable */ + /* bit1 SPIWE = 1 : Data write enable */ + /* bit0 SPIE = 1 : SPI transfer start */ + + wait_rpc_tx_end(); + + reg = mem_read32(RPC_PHYCNT); + reg |= (RPC_PHYCNT_STRTIM3 + | RPC_PHYCNT_STRTIM2 + | RPC_PHYCNT_STRTIM1 + | RPC_PHYCNT_STRTIM0 + | RPC_PHYCNT_WBUF2); + reg &= ~(RPC_PHYCNT_HS + | RPC_PHYCNT_WBUF + | RPC_PHYCNT_PHYMEM_HYP); + mem_write32(RPC_PHYCNT, reg); + /* bit31 CAL = 0 : No PHY calibration */ + /* bit2 WBUF = 0 : Write Buffer Disable */ + /* bit1-0 PHYMEM[1:0] = 00 : QSPI-SDR */ + + reg = mem_read32(RPC_DRCR); + reg |= (DRCR_SSLN + | DRCR_RBURST_32UNITS + | DRCR_RCF + | DRCR_RBE_BURST + | DRCR_SSLE); + mem_write32(RPC_DRCR, reg); + /* bit9 RCF = 1 : Read Cache Clear */ +} +/* End of function write_data_4pp_with_buf_qspi_flash */ + +/* OnBoard QspiFlash(MT25QU01GB) */ +uint32_t read_wip_status_register(uint32_t *readData) /* for QSPIx1ch */ +{ + return read_register_qspi_flash(gp_qspi_cmd_tbl -> read_any_register, readData); +} + +#define RDCR_cmd 0x15 +uint32_t read_configuration_register(uint32_t *readData) /* for QSPIx1ch */ +{ + return read_register_qspi_flash(RDCR_cmd, readData); +} + +#define WRSR_cmd 0x01 +void write_status_register(uint16_t stat_conf) +{ + uint32_t reg; + + reg = mem_read32(RPC_PHYCNT); + reg |= (RPC_PHYCNT_CAL + | RPC_PHYCNT_STRTIM3 + | RPC_PHYCNT_STRTIM2 + | RPC_PHYCNT_STRTIM1 + | RPC_PHYCNT_STRTIM0); + reg &= ~(RPC_PHYCNT_HS + | RPC_PHYCNT_WBUF2 + | RPC_PHYCNT_WBUF + | RPC_PHYCNT_PHYMEM_HYP); + mem_write32(RPC_PHYCNT, reg); + /* bit31 CAL = 1 : PHY calibration */ + /* bit1-0 PHYMEM[1:0] = 00 : QSPI-SDR */ + + reg = mem_read32(RPC_CMNCR); + reg &= ~(CMNCR_BSZ_MASK); + reg |= (CMNCR_MD_MANUAL + | CMNCR_MOIIO3_HIZ + | CMNCR_MOIIO2_HIZ + | CMNCR_MOIIO1_HIZ + | CMNCR_MOIIO0_HIZ + | CMNCR_IO0FV_HIZ); + mem_write32(RPC_CMNCR, reg); + /* bit31 MD = 1 : Manual mode */ + /* bit1-0 BSZ[1:0] = 00 : QSPI Flash x 1 */ + + reg = mem_read32(RPC_SMCMR); + reg &= ~(SMCMR_CMD_MASK + | SMCMR_OCMD_MASK); + reg |= ((WRSR_cmd) << DRCMR_SMCMR_CMD_SHIFT); + mem_write32(RPC_SMCMR, reg); + /* bit23-16 CMD[7:0] = 0x01 : write status/configuration register command */ + + reg = mem_read32(RPC_SMENR); + reg &= ~(SMENR_CDB_MASK + | SMENR_OCDB_MASK + | SMENR_ADB_MASK + | SMENR_OPDB_MASK + | SMENR_SPIDB_MASK + | SMENR_DME_EN + | SMENR_OCDE_EN + | SMENR_ADE_MASK + | SMENR_OPDE_MASK + | SMENR_SPIDE_MASK); + reg |= (SMENR_CDE_EN + | SMENR_SPIDE_SPI_16); + mem_write32(RPC_SMENR, reg); + /* bit31-30 CDB[1:0] = 00 : 1bit width command (QSPI0_MOSI) */ + /* bit25-24 ADB[1:0] = 00 : 1bit width address (QSPI0_MOSI) */ + /* bit17-16 SPIDB[1:0] = 00 : 1bit width transfer data (QSPI0_MISO) */ + /* bit15 DME = 0 : No dummy cycle */ + /* bit14 CDE = 1 : Command enable */ + /* bit11-8 ADE[3:0] = 0000 : Address output disable */ + /* bit3-0 SPIDE[3:0] = 1100 : 16bit transfer */ + + mem_write16(RPC_SMWDR0, stat_conf); + + reg = mem_read32(RPC_SMCR); + reg &= ~(SMCR_SSLKP + | SMCR_SPIRE); + reg |= (SMCR_SPIWE + | SMCR_SPIE); + mem_write32(RPC_SMCR, reg); + /* bit2 SPIRE = 0 : Data read disable */ + /* bit1 SPIWE = 1 : Data write enable */ + /* bit0 SPIE = 1 : SPI transfer start */ + + wait_rpc_tx_end(); +} + +void set_rpc_clock_mode(uint32_t mode) +{ + uint32_t dataL=0; + uint32_t reg; + + if(mode == RPC_CLK_160M){ + dataL = RPCCKCR_RPCFC_160M; /* RPC clock 160MHz */ + }else if(mode == RPC_CLK_80M){ + dataL = RPCCKCR_RPCFC_80M; /* RPC clock 80MHz */ + }else{ + dataL = RPCCKCR_RPCFC_40M; /* RPC clock 40MHz */ + } + + reg = mem_read32(CPG_RPCCKCR); + reg &= ~(RPCCKCR_RPCFC_MASK); + dataL |= reg; + mem_write32(CPG_CPGWPR, ~dataL); + mem_write32(CPG_RPCCKCR, dataL); + + (void)mem_read32(CPG_RPCCKCR); /* dummy read */ +} +/* End of function set_rpc_clock_mode */ + +void wait_rpc_tx_end(void) +{ + uint32_t dataL=0; + + while(1) + { + wdt_restart(); + dataL = mem_read32(RPC_CMNSR); + if(dataL & BIT0) break; + /* Wait for TEND = 1 */ + } +} +/* End of function wait_rpc_tx_end */ + +void reset_rpc(void) +{ + mem_write32(CPG_CPGWPR, ~BIT29); + mem_write32(CPG_SRCR6, BIT29); + /* wait: tRLRH Reset# low pulse width 10us */ + micro_wait(20); /* wait 20us */ + + mem_write32(CPG_CPGWPR, ~BIT29); + mem_write32(CPG_SRSTCLR6, BIT29); + /* wait: tREADY1(35us) - tRHSL(10us) = 25us */ + micro_wait(40); /* wait 40us */ +} +/* End of function reset_rpc */ + +void set_rpc_ssl_delay(void) +{ + uint32_t reg; + + reg = mem_read32(RPC_SSLDR); + reg |= SSLDR_SLNDL; + mem_write32(RPC_SSLDR, reg); + /* bit10-8 SLNDL[2:0] = 100 : 5.5 cycles of QSPIn_SPCLK */ +} +/* End of function set_rpc_ssl_delay */ + +void power_on_rpc(void) +{ + uint32_t dataL=0; + dataL = mem_read32(CPG_MSTPSR6); + if(dataL & BIT29){ /* case RPC(QSPI) Standby */ + dataL &= ~BIT29; + mem_write32(CPG_CPGWPR, ~dataL); + mem_write32(CPG_MSTPCR6, dataL); + while( BIT29 & mem_read32(CPG_MSTPSR6) ); /* wait bit=0 */ + } +} +/* End of function power_on_rpc */ + +uint32_t read_qspi_flash_id(uint32_t *readData) /* for QSPIx1ch */ +{ + return read_register_qspi_flash(FLASH_CMD_READ_ID, readData); +} + +uint32_t read_status_qspi_flash(uint32_t *readData) { + return read_register_qspi_flash(gp_qspi_cmd_tbl -> read_stts_register, readData); +} + +static uint32_t read_register_qspi_flash(uint32_t cmd, uint32_t *readData) /* for QSPIx1ch */ +{ + uint32_t reg; + + reg = mem_read32(RPC_PHYCNT); + reg |= (RPC_PHYCNT_STRTIM3 + | RPC_PHYCNT_STRTIM2 + | RPC_PHYCNT_STRTIM1 + | RPC_PHYCNT_STRTIM0); + reg &= ~(RPC_PHYCNT_HS + | RPC_PHYCNT_WBUF2 + | RPC_PHYCNT_WBUF + | RPC_PHYCNT_PHYMEM_HYP); + mem_write32(RPC_PHYCNT, reg); + reg |= RPC_PHYCNT_CAL; + mem_write32(RPC_PHYCNT, reg); + /* bit31 CAL = 1 : PHY calibration */ + /* bit1-0 PHYMEM[1:0] = 00 : QSPI-SDR */ + + reg = mem_read32(RPC_CMNCR); + reg &= ~(CMNCR_BSZ_MASK); + reg |= (CMNCR_MD_MANUAL + | CMNCR_MOIIO3_HIZ + | CMNCR_MOIIO2_HIZ + | CMNCR_MOIIO1_HIZ + | CMNCR_MOIIO0_HIZ + | CMNCR_IO0FV_HIZ); + mem_write32(RPC_CMNCR, reg); + /* bit31 MD = 1 : Manual mode */ + /* bit1-0 BSZ[1:0] = 00 : QSPI Flash x 1 */ + + reg = mem_read32(RPC_SMCMR); + reg &= ~(SMCMR_CMD_MASK + | SMCMR_OCMD_MASK); + reg |= ((cmd) << DRCMR_SMCMR_CMD_SHIFT); + mem_write32(RPC_SMCMR, reg); + /* bit23-16 CMD[7:0] = 0x05 : Status Read command (for Palladium QSPI model) */ + + reg = mem_read32(RPC_SMDRENR); + reg &= ~(SMDRENR_HYPE_MASK + | SMDRENR_ADDRE + | SMDRENR_OPDRE + | SMDRENR_SPIDRE); + mem_write32(RPC_SMDRENR, reg); + /* bit8 ADDRE = 0 : Address SDR transfer */ + /* bit0 SPIDRE = 0 : DATA SDR transfer */ + + reg = mem_read32(RPC_SMENR); + reg &= ~(SMENR_CDB_MASK + | SMENR_OCDB_MASK + | SMENR_ADB_MASK + | SMENR_OPDB_MASK + | SMENR_SPIDB_MASK + | SMENR_DME_EN + | SMENR_OCDE_EN + | SMENR_ADE_MASK + | SMENR_OPDE_MASK + | SMENR_SPIDE_MASK); + reg |= (SMENR_CDE_EN + | SMENR_SPIDE_SPI_32); + mem_write32(RPC_SMENR, reg); + /* bit31-30 CDB[1:0] = 00 : 1bit width command (QSPI0_MOSI) */ + /* bit25-24 ADB[1:0] = 00 : 1bit width address (QSPI0_MOSI) */ + /* bit17-16 SPIDB[1:0] = 00 : 1bit width transfer data (QSPI0_MISO) */ + /* bit15 DME = 0 : No dummy cycle */ + /* bit14 CDE = 1 : Command enable */ + /* bit11-8 ADE[3:0] = 0000 : Address output disable */ + /* bit3-0 SPIDE[3:0] = 1111 : 32bit transfer */ + + reg = mem_read32(RPC_SMCR); + reg &= ~(SMCR_SSLKP + | SMCR_SPIWE); + reg |= (SMCR_SPIRE + | SMCR_SPIE); + mem_write32(RPC_SMCR, reg); + /* bit2 SPIRE = 1 : Data read enable */ + /* bit1 SPIWE = 0 : Data write disable */ + /* bit0 SPIE = 1 : SPI transfer start */ + + wait_rpc_tx_end(); + + readData[0] = mem_read32(RPC_SMRDR0); /* read data[31:0] */ + + return(readData[0]); +} +/* End of function read_register_qspi_flash */ + +void write_command_qspi_flash(uint32_t command) /* for QSPIx1ch */ +{ + uint32_t reg; + + reg = mem_read32(RPC_PHYCNT); + reg |= (RPC_PHYCNT_CAL + | RPC_PHYCNT_STRTIM3 + | RPC_PHYCNT_STRTIM2 + | RPC_PHYCNT_STRTIM1 + | RPC_PHYCNT_STRTIM0); + reg &= ~(RPC_PHYCNT_HS + | RPC_PHYCNT_WBUF2 + | RPC_PHYCNT_WBUF + | RPC_PHYCNT_PHYMEM_HYP); + mem_write32(RPC_PHYCNT, reg); + /* bit31 CAL = 1 : PHY calibration */ + /* bit1-0 PHYMEM[1:0] = 00 : QSPI-SDR */ + + reg = mem_read32(RPC_CMNCR); + reg &= ~(CMNCR_BSZ_MASK); + reg |= (CMNCR_MD_MANUAL + | CMNCR_MOIIO3_HIZ + | CMNCR_MOIIO2_HIZ + | CMNCR_MOIIO1_HIZ + | CMNCR_MOIIO0_HIZ + | CMNCR_IO0FV_HIZ); + mem_write32(RPC_CMNCR, reg); + /* bit31 MD = 1 : Manual mode */ + /* bit1-0 BSZ[1:0] = 00 : QSPI Flash x 1 */ + + reg = mem_read32(RPC_SMCMR); + reg &= ~(SMCMR_CMD_MASK + | SMCMR_OCMD_MASK); + reg |= (command & (SMCMR_CMD_MASK | SMCMR_OCMD_MASK)); + mem_write32(RPC_SMCMR, reg); + /* bit23-16 CMD[7:0] : command */ + + reg = mem_read32(RPC_SMDRENR); + reg &= ~(SMDRENR_HYPE_MASK + | SMDRENR_ADDRE + | SMDRENR_OPDRE + | SMDRENR_SPIDRE); + mem_write32(RPC_SMDRENR, reg); + /* bit8 ADDRE = 0 : Address SDR transfer */ + /* bit0 SPIDRE = 0 : DATA SDR transfer */ + + reg = mem_read32(RPC_SMENR); + reg &= ~(SMENR_CDB_MASK + | SMENR_OCDB_MASK + | SMENR_ADB_MASK + | SMENR_OPDB_MASK + | SMENR_SPIDB_MASK + | SMENR_DME_EN + | SMENR_OCDE_EN + | SMENR_ADE_MASK + | SMENR_ADE_MASK + | SMENR_OPDE_MASK + | SMENR_SPIDE_MASK); + reg |= SMENR_CDE_EN; + mem_write32(RPC_SMENR, reg); + /* bit31-30 CDB[1:0] = 00 : 1bit width command (QSPI0_MOSI) */ + /* bit25-24 ADB[1:0] = 00 : 1bit width address (QSPI0_MOSI) */ + /* bit17-16 SPIDB[1:0] = 00 : 1bit width transfer data (QSPI0_MISO) */ + /* bit15 DME = 0 : No dummy cycle */ + /* bit14 CDE = 1 : Command enable */ + /* bit11-8 ADE[3:0] = 0000 : Address output disable */ + /* bit3-0 SPIDE[3:0] = 0000 : No transfer */ + + reg = mem_read32(RPC_SMCR); + reg &= ~(SMCR_SSLKP + | SMCR_SPIRE + | SMCR_SPIWE); + reg |= SMCR_SPIE; + mem_write32(RPC_SMCR, reg); + /* bit2 SPIRE = 0 : Data read disable */ + /* bit1 SPIWE = 0 : Data write disable */ + /* bit0 SPIE = 1 : SPI transfer start */ + + wait_rpc_tx_end(); + +} +/* End of function write_command_qspi_flash */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/spiflash2drv.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/spiflash2drv.c new file mode 100644 index 00000000..31359fce --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rpc/spiflash2drv.c @@ -0,0 +1,213 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2020-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : QSPI Flash driver for S25FS512S + ******************************************************************************/ +/****************************************************************************** + * @file spiflash2drv.c + * - Version : 0.04 + * @brief QSPI Flash driver for S25FS512S. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 15.10.2021 0.01 First Release + * : 23.03.2022 0.02 Modify command for QSPI Flash to refer to + * : command table. + * : 01.04.2022 0.03 Modify magic number to definition. + * : 09.11.2022 0.04 License notation change. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#include "dma2.h" + +#define QSPI_PARAM_SEC_SIZE (0x1000U) +#define QSPI_PARAM_SEC_MASK (0xFFFFF000U) + +void fast_rd_qspi_flash(uint32_t sourceSpiAdd, uint32_t destinationAdd, uint32_t byteCount) +{ + uint32_t sourceAdd; + + init_rpc_qspi_flash_4fastread_ext_mode(); + + sourceAdd = SPI_IOADDRESS_TOP + sourceSpiAdd; + + // dma_trans_start(destinationAdd, sourceAdd, byteCount); + // dma_trans_end_check(); + // dma2_init(); + dma2_start(destinationAdd, sourceAdd, byteCount, DMA_MODE_SRC_INC); + dma2_end(); +} +/* End of function fast_rd_qspi_flash */ + +/* Qspi:Sector Erase */ +/* 4SE DCh */ +void sector_erase_NNNkb_qspi_flash_s25s512s(uint32_t addr) +{ + uint32_t status; + + /* WRITE ENABLE */ + write_command_qspi_flash((gp_qspi_cmd_tbl -> write_enable) << DRCMR_SMCMR_CMD_SHIFT); + + sector_erase_4byte_qspi_flash(addr); + + while(1) + { + read_status_qspi_flash(&status); + if( check_Erase_Fail(status) ) + { + // put_str("Erase Error", CRLF_OFF); + ERROR("Erase Error!!\n"); + break; + } + read_wip_status_register(&status); + if( !(status & BIT0) ) + { + break; + } + } +} +/* End of function sector_erase_NNNkb_qspi_flash_s25s512s */ + +/* Qspi:Parameter 4-kB Sector Erase */ +/* 4P4E 21h */ +void parameter_sector_erase_4kb_qspi_flash_s25s512s(uint32_t addr) +{ + uint32_t status; + + /* WRITE ENABLE */ + write_command_qspi_flash((gp_qspi_cmd_tbl -> write_enable) << DRCMR_SMCMR_CMD_SHIFT); + + parameter_sector_erase_4kb_qspi_flash(addr); + + while(1) + { + read_status_qspi_flash(&status); + if( check_Erase_Fail(status) ) + { + ERROR("Erase Error!!\n"); + break; + } + read_wip_status_register(&status); + if( !(status & BIT0) ) + { + break; + } + } +} +/* End of function parameter_sector_erase_4kb_qspi_flash_s25s512s */ + +/* Qspi:Page Program (4PP:12h) */ +void page_program_with_buf_qspi_flash_s25s512s(uint32_t addr, uint32_t source_addr) +{ + uint32_t status; + + /* WRITE ENABLE */ + write_command_qspi_flash((gp_qspi_cmd_tbl -> write_enable) << DRCMR_SMCMR_CMD_SHIFT); + + write_data_4pp_with_buf_qspi_flash(addr,source_addr); /* 4PP */ + + /* Add */ + while(1) + { + read_wip_status_register(&status); + if( !(status & BIT0) ) + { + break; + } + } + +} +/* End of function page_program_with_buf_qspi_flash_s25s512s */ + +/* Qspi:Clear Block Protection of SR1V */ +void clear_bp_qspi_flash(void) +{ + uint32_t statusReg; + while(1) + { + read_wip_status_register(&statusReg); + if( !(statusReg & BIT0) ) + { + break; + } + } +} +/* End of function clear_bp_qspi_flash */ + +void save_data_with_buf_qspi_flash(uint32_t srcAdd,uint32_t svFlashAdd,uint32_t svSize) +{ + uint32_t flashAdd; + uint32_t writeDataAdd; + + /* WRITE ENABLE */ + write_command_qspi_flash((gp_qspi_cmd_tbl -> write_enable) << DRCMR_SMCMR_CMD_SHIFT); + + writeDataAdd = srcAdd; + + for(flashAdd=svFlashAdd; flashAdd<(svFlashAdd+svSize); flashAdd += RPC_WRITE_BUF_SIZE) + { /* 256byte:RPC Write Buffer size */ + page_program_with_buf_qspi_flash_s25s512s(flashAdd, writeDataAdd); + writeDataAdd = writeDataAdd + RPC_WRITE_BUF_SIZE; + } +} +/* End of function save_data_with_buf_qspi_flash */ + +void sector_erase_qspi_flash(uint32_t EraseStatAdd,uint32_t EraseEndAdd) +{ + uint32_t sectorAd; + uint32_t SectorStatTopAdd; + uint32_t SectorEndTopAdd; + + SectorStatTopAdd = EraseStatAdd & FLASH_SECTOR_MASK; + SectorEndTopAdd = EraseEndAdd & FLASH_SECTOR_MASK; + + for(sectorAd = SectorStatTopAdd; sectorAd <= SectorEndTopAdd; sectorAd += FLASH_SECTOR_SIZE) + { + sector_erase_NNNkb_qspi_flash_s25s512s(sectorAd); + } +} +/* End of function sector_erase_qspi_flash_s25s512s */ + +void parameter_sector_erase_qspi_flash(uint32_t EraseStatAdd,uint32_t EraseEndAdd) +{ + uint32_t sectorAd; + uint32_t SectorStatTopAdd; + uint32_t SectorEndTopAdd; + + SectorStatTopAdd = EraseStatAdd & QSPI_PARAM_SEC_MASK; + SectorEndTopAdd = EraseEndAdd & QSPI_PARAM_SEC_MASK; + + for(sectorAd = SectorStatTopAdd; sectorAd <= SectorEndTopAdd; sectorAd += QSPI_PARAM_SEC_SIZE) + { + parameter_sector_erase_4kb_qspi_flash_s25s512s(sectorAd); + } +} +/* End of function parameter_sector_erase_qspi_flash */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rtvram/rtvram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/rtvram/rtvram.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/san/v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/san/v4h.c new file mode 100644 index 00000000..a7347269 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/san/v4h.c @@ -0,0 +1,1101 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : I2C driver + ******************************************************************************/ +/****************************************************************************** + * @file i2c.c + * - Version : 0.02 + * @brief I2C driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 16.11.2023 0.01 First Release + * : 24.06.2024 0.02 Remove pre-process branch of i2c5_read(). + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../ip/ddr/v4h/lpddr5/ecm_enable_v4h.h" +#include +#include +#include + +/* Debug build toggle */ +#define SAN_DEBUG + +/* + * ================================================================================ + * Thermal Sensor/Chip Internal Voltage Monitor/Core Voltage Monitor (THS/CIVM/CVM) + * ================================================================================ + */ +/* TSC : Thermal Sensor Controller */ +#define TSC_BLOCK_SIZE (0x8000U) +#define TSC_BASE_ADDR(n) (BASE_TSC_ADDR + ((n) * TSC_BLOCK_SIZE)) +/* 13.2.22 CVM Control Register[n](CVM_CTRL[n]) */ +#define CVM_CTRL_OFFSET (0x0104U) +/* 13.2.28 CVM Temp Offset Manual Setting Register[n](CVM_TOFF_MANUAL_SET[n]) */ +#define CVM_TOFF_MANUAL_SET_OFFSET (0x011CU) +/* 13.2.25 CVM Detection Voltage Manual Setting Register[n](CVM_DETECT_MANUAL_SET[n]) */ +#define CVM_DETECT_MANUAL_SET_OFFSET (0x0110U) +/* 13.2.30 CVM Voltage Monitor Output Readback Register(CVM_VMOUT_BK) */ +#define CVM_VMOUT_BK_OFFSET (0x0124U) +/* These bits can monitor the switch signal of analog voltage. */ +#define VMOUT_BK_MASK (3U << 0) + +/* + * ========================== + * Error Control Module (ECM) + * ========================== + */ +#define ECMERRCTLR_OFFSET (0x0000U) +#define ECMERRSTSR_OFFSET (0x0100U) +#define ECMERRTGTR_OFFSET (0x0200U) +#define SAFCLERRENR_OFFSET (0x0940U) +#define SAFSTERRENR_OFFSET (0x0944U) +#define SAFCTLR_OFFSET (0x0948U) +#define ECMERROROUTCTLR_OFFSET (0x0A2CU) +#define NR_ECMERR_REGS (43) /* 43 registers */ +#define ECM_ECMERRCTLR_ADDR(n) (BASE_ECM_ADDR + ECMERRCTLR_OFFSET + ((n) * 0x4U)) /* n = register */ +#define ECM_ECMERRSTSR_ADDR(n) (BASE_ECM_ADDR + ECMERRSTSR_OFFSET + ((n) * 0x4U)) +#define ECM_ECMERRTGTR_ADDR(n) (BASE_ECM_ADDR + ECMERRTGTR_OFFSET + ((n) * 0x4U)) +#define ECM_SAFCLERRENR_ADDR (BASE_ECM_ADDR + SAFCLERRENR_OFFSET) +#define ECM_SAFSTERRENR_ADDR (BASE_ECM_ADDR + SAFSTERRENR_OFFSET) +#define ECM_SAFCTLR_ADDR (BASE_ECM_ADDR + SAFCTLR_OFFSET) + +/* + * ======================== + * System Controller (SYSC) + * ======================== + */ +/* 11.2.1 SYSC Status Register (SYSCSR) */ +#define SYSCSR_OFFSET (0x0000U) +#define SYSCSR_BUSY_MASK (0x3) +#define SYSCSR_BUSY (0x0) +#define SYSCSR_IDLE (0x3) +/* 11.2.13 Power Domain Status Register n (PDRSRn) (n=00-63) */ +#define PDRSR_OFFSET (0x1000U) +#define SYSC_PDRSR_ADDR(n) (BASE_SYSC_ADDR + PDRSR_OFFSET + ((n) * 64)) +#define PDRSR_ON_STATE_BIT (1U << 12) +#define PDRSR_ON_BIT (1U << 4) +#define PDRSR_OFF_BIT (1U << 0) +#define PDRSR_OFF_STATE_BIT (1U << 8) +/* 11.2.14 Power Domain power-ON Control Register n (PDRONCRn) (n=00-63) */ +#define PDRONCR_OFFSET (0x1004U) +#define SYSC_PDRONCR_ADDR(n) (BASE_SYSC_ADDR + PDRONCR_OFFSET + ((n) * 64)) +#define PDRONCR_PWRON_BIT (1U << 0) +/* 11.2.15 Power Domain power-OFF Control Register n (PDROFFCRn) (n=00-63) */ +#define PDROFFCR_OFFSET (0x1008U) +#define SYSC_PDROFFCR_ADDR(n) (BASE_SYSC_ADDR + PDROFFCR_OFFSET + ((n) * 64)) +#define PDROFFCR_PWROFF_BIT (1U << 0) /* Power-OFF request. */ + + +#define ECMERRxxxR00_IDX 0 + +enum tsc_id { + TSC_ID_1 = 0, + TSC_ID_2, + TSC_ID_3, + TSC_ID_4, + TSC_ID_MAX, +}; + +struct tsc_entry { + const char *name; + enum tsc_id id; +}; + +static const struct tsc_entry tsc_entries[] = { + [0] = { .name = "CR52", .id = TSC_ID_1 }, + [1] = { .name = "CNN" , .id = TSC_ID_2 }, + [2] = { .name = "CA76", .id = TSC_ID_3 }, + [3] = { .name = "DDR1", .id = TSC_ID_4 }, +}; + +enum vmout_bk_type { + VMOUT_BK_TYPE_UNDERVOLTAGE = 0x0U, + VMOUT_BK_TYPE_NORMAL = 0x1U, + VMOUT_BK_TYPE_ILLEGAL = 0x2U, + VMOUT_BK_TYPE_OVERVOLTAGE = 0x3U, + VMOUT_BK_TYPE_MAX, +}; + +struct cvm_output_check_data { + enum vmout_bk_type vmout_bk; + uint32_t detect_manual_set; +}; + +struct vmout_bk_type_str { + const char *name; +}; + +struct vmout_bk_type_str vmout_bk_type_name[] = { + [VMOUT_BK_TYPE_UNDERVOLTAGE] = { .name = "UNDER V", }, + [VMOUT_BK_TYPE_NORMAL] = { .name = "NORMAL", }, + [VMOUT_BK_TYPE_ILLEGAL] = { .name = "ILLEGAL", }, + [VMOUT_BK_TYPE_OVERVOLTAGE] = { .name = "OVER V", }, +}; + +enum slot_id { + CVM_SLOT1 = 0, + CVM_SLOT2, + CVM_SLOT3, + CVM_SLOT4, + CVM_SLOT_MAX, +}; + +struct cvm_output_check_data cvm_output_check_table[] = { + [CVM_SLOT1] = { + VMOUT_BK_TYPE_OVERVOLTAGE, + 0x10011001U, + }, + [CVM_SLOT2] = { + VMOUT_BK_TYPE_UNDERVOLTAGE, + 0x130F130FU, + }, + [CVM_SLOT3] = { + VMOUT_BK_TYPE_ILLEGAL, + 0x1001130FU, + }, + [CVM_SLOT4] = { + VMOUT_BK_TYPE_NORMAL, + 0x130F1001U, + }, +}; + +/* Debug GPIO (scope marker; SAN_DEBUG only) */ +#if defined(SAN_DEBUG) +#define SAN_DBG(...) ERROR(__VA_ARGS__) +static void set_debug_gpio_n1205(int set) +{ + /* V4H: SCL3_V::Pin AK5::GP8_06 + GPIO Group 8 Base: H’E606 8000 + INOUTSELn +0x184 (set pin to output mode) + OUTDTn +0x188 (set pin output value) + */ + micro_wait(1); + if (set) { + pfc_reg_write(PFC_INOUTSEL8_RW, 1<<6); /* Set GP8_06 to output mode */ + pfc_reg_write(PFC_OUTDT8_RW, 1<<6); /* Set GP8_06 to 'high' */ + } else { + pfc_reg_write(PFC_OUTDT8_RW, 0); /* Set GP8_06 to 'low' */ + } +} +#else +#define SAN_DBG(...) VERBOSE(__VA_ARGS__) +static inline void set_debug_gpio_n1205(int set) {} +#endif + +enum pdr_id { + PDR00 = 0, /* A1E0D0C0 */ + PDR01, /* A1E0D0C1 */ + PDR02, /* A1E0D1C0 */ + PDR03, /* A1E0D1C1 */ + PDR04, /* UNKNOWN? */ + PDR05, /* UNKNOWN? */ + PDR06, /* UNKNOWN? */ + PDR07, /* UNKNOWN? */ + PDR08, /* UNKNOWN? */ + PDR09, /* UNKNOWN? */ + PDR10, /* UNKNOWN? */ + PDR11, /* UNKNOWN? */ + PDR12, /* UNKNOWN? */ + PDR13, /* UNKNOWN? */ + PDR14, /* UNKNOWN? */ + PDR15, /* UNKNOWN? */ + PDR16 = 16, /* A2E0D0 */ + PDR17 = 17, /* A2E0D1 */ + PDR18, /* UNKNOWN? */ + PDR19, /* UNKNOWN? */ + PDR20 = 20, /* A3E0 */ + PDR21, /* UNKNOWN? */ + PDR22, /* UNKNOWN? */ + PDR23, /* UNKNOWN? */ + PDR24 = 24, /* A33DGA */ + PDR25 = 25, /* A23DGB */ + PDR26, /* UNKNOWN? */ + PDR27, /* UNKNOWN? */ + PDR28, /* UNKNOWN? */ + PDR29, /* UNKNOWN? */ + PDR30, /* UNKNOWN? */ + PDR31, /* UNKNOWN? */ + PDR32, /* UNKNOWN? */ + PDR33 = 33, /* A1DSP0 */ + PDR34 = 34, /* A2IMP01 */ + PDR35 = 35, /* A2PSC */ + PDR36 = 36, /* A2CV0 */ + PDR37 = 37, /* A2CV1 */ + PDR38, /* UNKNOWN? */ + PDR39, /* UNKNOWN? */ + PDR40, /* UNKNOWN? */ + PDR41, /* A1CNN0 */ + PDR42 = 42, /* A2CN0 */ + PDR43 = 43, /* A3IR */ + PDR44, /* UNKNOWN? */ + PDR45 = 45, /* A1DSP1 */ + PDR46 = 46, /* A2IMP23 */ + PDR47 = 47, /* A2DMA */ + PDR48 = 48, /* A2CV2 */ + PDR49 = 49, /* A2CV3 */ + PDR50, /* UNKNOWN? */ + PDR51, /* UNKNOWN? */ + PDR52, /* UNKNOWN? */ + PDR53 = 53, /* A1DSP2 */ + PDR54 = 54, /* A1DSP3 */ + PDR55, /* UNKNOWN? */ + PDR56 = 56, /* A3VIP0 */ + PDR57, /* UNKNOWN? */ + PDR58 = 58, /* A3VIP2 */ + PDR59, /* UNKNOWN? */ + PDR60 = 60, /* A3ISP0 */ + PDR61 = 61, /* A3ISP1 */ + PDR62 = 62, /* A3DUL */ + PDR63, /* UNKNOWN? */ + PDR_ID_MAX, +}; + +enum pdr_group { + PDR_GROUP_NONE = 0, + PDR_GROUP_A1, + PDR_GROUP_A2, + PDR_GROUP_A3, + PDR_GROUP_MAX, +}; + +struct pdr_info { + enum pdr_id pdr; + enum pdr_group grp; + const char *name; +}; + +static struct pdr_info pdr_info_table[] = { + [ 0] = { PDR00, PDR_GROUP_A1, "A1E0D0C0", }, /* "AP-system core1" */ + [ 1] = { PDR01, PDR_GROUP_A1, "A1E0D0C1", }, /* "AP-system core2" */ + [ 2] = { PDR02, PDR_GROUP_A1, "A1E0D1C0", }, /* "AP-system core3" */ + [ 3] = { PDR03, PDR_GROUP_A1, "A1E0D1C1", }, /* "AP-system core4" */ + [ 4] = { PDR04, PDR_GROUP_NONE, "UNKNOWN", }, /*"UNKNOWN" */ + [ 5] = { PDR05, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [ 6] = { PDR06, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [ 7] = { PDR07, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [ 8] = { PDR08, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [ 9] = { PDR09, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [10] = { PDR10, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [11] = { PDR11, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [12] = { PDR12, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [13] = { PDR13, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [14] = { PDR14, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [15] = { PDR15, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [16] = { PDR16, PDR_GROUP_A2, "A2E0D0", }, /* "AP-system cluster 0" */ + [17] = { PDR17, PDR_GROUP_A2, "A2E0D1", }, /* "AP-system cluster 1" */ + [18] = { PDR18, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [19] = { PDR19, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [20] = { PDR20, PDR_GROUP_A3, "A3E0", }, /* "AP-system DCLS 0" */ + [21] = { PDR21, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [22] = { PDR22, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [23] = { PDR23, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [24] = { PDR24, PDR_GROUP_A3, "A33DGA", }, /* "3D Graphics Engine(AXM)" */ + [25] = { PDR25, PDR_GROUP_A2, "A23DGB", }, /* "3D Graphics Engine(AXM)" */ + [26] = { PDR26, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [27] = { PDR27, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [28] = { PDR28, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [29] = { PDR29, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [30] = { PDR30, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [31] = { PDR31, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [32] = { PDR32, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [33] = { PDR33, PDR_GROUP_A1, "A1DSP0", }, /* "DSP core0" */ + [34] = { PDR34, PDR_GROUP_A2, "A2IMP01", }, /* "IMP core 0/1" */ + [35] = { PDR35, PDR_GROUP_A2, "A2PSC", }, /* "IMPPSC and IMPDMAC" */ + [36] = { PDR36, PDR_GROUP_A2, "A2CV0", }, /* "CVe cluster 0" */ + [37] = { PDR37, PDR_GROUP_A2, "A2CV1", }, /* "CVe cluster 1" */ + [38] = { PDR38, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [39] = { PDR39, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [40] = { PDR40, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [41] = { PDR41, PDR_GROUP_A1, "A1CNN0", }, /* "UNKNOWN" */ + [42] = { PDR42, PDR_GROUP_A2, "A2CN0", }, /* "High Speed Domain incl. CNN, CNNRAM0(SPMC) and Slim-IMP Dmac0/1" */ + [43] = { PDR43, PDR_GROUP_A3, "A3IR", }, /* "Image Recognitionincl. IMPRAM0" */ + [44] = { PDR44, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [45] = { PDR45, PDR_GROUP_A1, "A1DSP1", }, /* "DSP core1" */ + [46] = { PDR46, PDR_GROUP_A2, "A2IMP23", }, /* "IMP core 2/3" */ + [47] = { PDR47, PDR_GROUP_A2, "A2DMA", }, /* "IMPDMAC1" */ + [48] = { PDR48, PDR_GROUP_A2, "A2CV2", }, /* "CVe cluster 2" */ + [49] = { PDR49, PDR_GROUP_A2, "A2CV3", }, /* "CVe cluster 3" */ + [50] = { PDR50, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [51] = { PDR51, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [52] = { PDR52, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [53] = { PDR53, PDR_GROUP_A1, "A1DSP2", }, /* "DSP core2" */ + [54] = { PDR54, PDR_GROUP_A1, "A1DSP3", }, /* "DSP core3" */ + [55] = { PDR55, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [56] = { PDR56, PDR_GROUP_A3, "A3VIP0", }, /* "UMF" */ + [57] = { PDR57, PDR_GROUP_A3, "A3VIP1", }, /* "UNKNOWN" */ + [58] = { PDR58, PDR_GROUP_A3, "A3VIP2", }, /* "SMD-PS0, SMD-POST0" */ + [59] = { PDR59, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ + [60] = { PDR60, PDR_GROUP_A3, "A3ISP0", }, /* "ISP0 core" */ + [61] = { PDR61, PDR_GROUP_A3, "A3ISP1", }, /* "ISP1 core" */ + [62] = { PDR62, PDR_GROUP_A3, "A3DUL", }, /* "PAP-Subsystem" */ + [63] = { PDR63, PDR_GROUP_NONE, "UNKNOWN", }, /* "UNKNOWN" */ +}; + +#define GET_PDR_NAME(pdr) (pdr_info_table[(pdr)].name) + +static uint32_t power_status(enum pdr_id pdr) +{ + uint32_t val; + + val = mem_read32(SYSC_PDRSR_ADDR(pdr)); + VERBOSE("Power Status: PDR%d, Domain=%s: PDRSR=0x%08x\n", + pdr, GET_PDR_NAME(pdr), val); + + return val; +} + +static void power_on(enum pdr_id pdr) +{ + uint32_t val; + int timeout; + + /* Power-ON request */ + mem_write32(SYSC_PDRONCR_ADDR(pdr), PDRONCR_PWRON_BIT); + + timeout = 1000U; + do { + val = mem_read32(SYSC_PDRSR_ADDR(pdr)); + /* Check if the SYSC is processing Power-ON sequence. */ + if (val & PDRSR_ON_BIT) + break; + } while (--timeout); + + if (!timeout) + ERROR("Power-On failed: PDR%d, Domain=%s: PDRSR=0x%08x, timeout=%d\n", + pdr, GET_PDR_NAME(pdr), val, timeout); + + VERBOSE("Power On: PDR%d, Power Domain: %s: PDRSR=0x%08x, timeout=%d\n", + pdr, GET_PDR_NAME(pdr), val, timeout); +} + +static void power_off(enum pdr_id pdr) +{ + uint32_t val; + int timeout; + + /* Power-OFF request */ + mem_write32(SYSC_PDROFFCR_ADDR(pdr), PDROFFCR_PWROFF_BIT); + + timeout = 1000U; + do { + val = mem_read32(SYSC_PDRSR_ADDR(pdr)); + /* Check if the SYSC is processing Power-ON or Power-OFF sequence. */ + if (val & PDRSR_OFF_BIT) + break; + } while (--timeout); + + if (!timeout) + ERROR("Power-Off failed: PDR%d, Domain=%s: PDRSR=0x%08x, timeout=%d\n", + pdr, GET_PDR_NAME(pdr), val, timeout); + + VERBOSE("Power Off: PDR%d, Power Domain: %s: PDRSR=0x%08x, timeout=%d\n", + pdr, GET_PDR_NAME(pdr), val, timeout); +} + +static void ecm_set_error_control(uint32_t idx, uint32_t shift) +{ + uint32_t val; + + val = mem_read32(ECM_ECMERRCTLR_ADDR(idx)); + val |= (1U << shift); + ecm_unlock(); + mem_write32(ECM_ECMERRCTLR_ADDR(idx), val); + ecm_lock(); +} + +static void ecm_clear_error_control(uint32_t idx, uint32_t shift) +{ + uint32_t val; + + val = mem_read32(ECM_ECMERRCTLR_ADDR(idx)); + val &= ~(1U << shift); + ecm_unlock(); + mem_write32(ECM_ECMERRCTLR_ADDR(idx), val); + ecm_lock(); +} + +static void ecm_set_error_target(uint32_t idx, uint32_t shift) +{ + uint32_t val; + + val = mem_read32(ECM_ECMERRTGTR_ADDR(idx)); + val |= (1U << shift); + ecm_unlock(); + mem_write32(ECM_ECMERRTGTR_ADDR(idx), val); + ecm_lock(); +} + +static void ecm_clear_error_target(uint32_t idx, uint32_t shift) +{ + uint32_t val; + + val = mem_read32(ECM_ECMERRTGTR_ADDR(idx)); + val &= ~(1U << shift); + ecm_unlock(); + mem_write32(ECM_ECMERRTGTR_ADDR(idx), val); + ecm_lock(); +} + +static void ecm_disable_error_status(uint32_t idx, uint32_t shift) +{ + uint32_t val; + + val = (1U << shift); + ecm_unlock(); + mem_write32(ECM_ECMERRSTSR_ADDR(idx), val); + ecm_lock(); +} + +/* Initialize ECM settings for ERROROUT# control */ +static void init_ecm_erroroutn_pin(void) +{ + /* Unlock ECMERROROUTCTLR to allow ERROROUT# control */ + ecm_unlock(); + mem_write32(BASE_ECM_ADDR + ECMERROROUTCTLR_OFFSET, 0xACCE0001U); + ecm_lock(); +} + +/* Deassert ERROROUT# */ +static int deassert_erroroutn_pin(void) +{ + uint32_t val; + /* Step #2 Processing */ + /* De-assert the ERROROUT# pin and clean up the pseudo error insertion function: */ + + /* Set bit 0 of the CLR field in the SAFCLERRENR(*2) register to 1; */ + val = mem_read32(ECM_SAFCLERRENR_ADDR); + val |= (1U << 0); + ecm_unlock(); + mem_write32(ECM_SAFCLERRENR_ADDR, val); + ecm_lock(); + + /* Set the ECMERRTGTR0(*2) and ECMERRCTLR0(*2) registers back to initial value; */ + ecm_clear_error_target(ECMERRxxxR00_IDX, 0); + + ecm_clear_error_control(ECMERRxxxR00_IDX, 0); + + /* Set the DBGEN bit in the SAFCTLR(*2) register to 0. */ + val = mem_read32(ECM_SAFCTLR_ADDR); + val &= ~(1U << 31); + ecm_unlock(); + mem_write32(ECM_SAFCTLR_ADDR, val); + ecm_lock(); + + /* Set bit 0 of ECMERRSTSR0(*2) to 1. */ + ecm_disable_error_status(ECMERRxxxR00_IDX, 0); + + return 0; +} + +/* Assert ERROROUT# */ +static int assert_erroroutn_pin(void) +{ + uint32_t val; + + /* Step #1 Processing */ + /* Generate a pseudo error to assert the ERROROUT# pin: */ + + /* Set the DBGEN bit in the SAFCTLR(*2) register to 1; */ + /* Set the REGSEL bits in the SAFCTLR(*2) register to B’000000; */ + val = mem_read32(ECM_SAFCTLR_ADDR); + val |= (1U << 31); + val &= ~0x3F; + ecm_unlock(); + mem_write32(ECM_SAFCTLR_ADDR, val); + ecm_lock(); + + /* Set bit 0 of ECMERRTGTR0(*2) to 0 and bit 0 of ECMERRCTLR0(*2) to 1; */ + ecm_set_error_target(ECMERRxxxR00_IDX, 0); + + ecm_set_error_control(ECMERRxxxR00_IDX, 0); + + /* Set bit 0 of the SET field in the SAFSTERRENR(*2) register to 1. */ + val = mem_read32(ECM_SAFSTERRENR_ADDR); + val |= (1U << 0); + ecm_unlock(); + mem_write32(ECM_SAFSTERRENR_ADDR, val); + ecm_lock(); + + return 0; +} + +/* Deassert CVM_OUT# */ +static void deassert_cvm_outn_pin(void) +{ + uint32_t base; + + base = TSC_BASE_ADDR(TSC_ID_1); + mem_write32(base + CVM_CTRL_OFFSET, 0x00000101U); + mem_write32(base + CVM_DETECT_MANUAL_SET_OFFSET, 0x130F1001U); + mem_write32(base + CVM_TOFF_MANUAL_SET_OFFSET, 0x00001000U); + + /* Wait 30[us] or more */ + micro_wait(30U); +} + +/* Assert CVM_OUT# */ +static void assert_cvm_outn_pin(void) +{ + uint32_t base; + + base = TSC_BASE_ADDR(TSC_ID_1); + mem_write32(base + CVM_CTRL_OFFSET, 0x00000101U); + mem_write32(base + CVM_DETECT_MANUAL_SET_OFFSET, 0x1001130FU); + mem_write32(base + CVM_TOFF_MANUAL_SET_OFFSET, 0x00001000U); + + /* Wait 30[us] or more */ + micro_wait(30U); +} + +/* Prepare external pins once */ +void fusa_init_external_pins(void) +{ + init_ecm_erroroutn_pin(); + deassert_cvm_outn_pin(); +} + +/* ===================================================== */ +/* TODO: Add function for SM27b, SM27c, SM27d tests here */ +/* ===================================================== */ + +#define D_SINT_CODE (0x2A) +/* + * PMIC: SM27b: Serial Interface (SINT) Check + * This is executed after the PRESET# Check. + * This checks the serial communication interface between the SoC & PMIC. + * This also checks the correct functioning of the I2C/SPI Interface Selection Multiplexer. + * + * Fault Reaction: + * If SINT fails due to wrong register value WRITE, RAA271005 goes to RESET state immediately. + * If SINT fails due to no WRITE, RAA271005 goes to RESET state after FUSA_TIMER_2[2:0]: SINT_TOUT timer expires. + */ +static bool fusa_sm_serial_interface_check(void) +{ + bool is_safe = true; + uint32_t sint_chk_start, sint_chk_copy, sint_chk_rw; + + /* SoC Writes to PMIC FUSA_CTRL_2 Register */ + sint_chk_start = D_SINT_CODE; + i2c5_write(PMIC_ADDR_P, FUSA_CTRL_2, sint_chk_start); + + /* 2 clock cycles of 32MHz clock = 64ns */ + micro_wait(1U); + + /* SoC Reads back PMIC FUSA_SOC_CHK_1 Register */ + i2c5_read(PMIC_ADDR_P, FUSA_SOC_CHK_1, &sint_chk_copy); + sint_chk_copy &= 0xff; + + /* SoC Writes data to PMIC FUSA_CTRL_3 Register */ + i2c5_write(PMIC_ADDR_P, FUSA_CTRL_3, sint_chk_copy); + + /* PMIC compares data in FUSA_CTRL_2 and FUSA_CTRL_3 Registers */ + i2c5_read(PMIC_ADDR_P, FUSA_CTRL_2, &sint_chk_start); + sint_chk_start &= 0xff; + i2c5_read(PMIC_ADDR_P, FUSA_CTRL_3, &sint_chk_rw); + sint_chk_rw &= 0xff; + if ( sint_chk_start != sint_chk_rw ) { + is_safe = false; + ERROR("FuSa failed: SINT Check(SM27b): INT_CHK_COPY=0x%02x, SINT_CHK_RW=0x%02x\n", + sint_chk_copy, sint_chk_rw); + } + + return is_safe; +} + + +/* Common poll limit for SM27c phases */ +#define EXTPIN_POLL_MAX 10 + +/* SDI1(ERROROUT#) control sets */ +#define SDI1_CTRL_HIGH \ + (EXT_PIN_CHK_TIME_4US | EXT_PIN_CHK_EN | EXT_PIN_CHK_PRESETOUT | \ + EXT_PIN_CHK_SDI1 | EXT_PIN_CHK_SDI2 | EXT_PIN_CHK_SDI3 | \ + EXT_PIN_CHK_SDI4) + +#define SDI1_CTRL_LOW \ + (EXT_PIN_CHK_TIME_4US | EXT_PIN_CHK_EN | EXT_PIN_CHK_PRESETOUT | \ + EXT_PIN_CHK_SDI2 | EXT_PIN_CHK_SDI3 | EXT_PIN_CHK_SDI4) + +/* SDI2(CVM_OUT#) control sets */ +#define SDI2_CTRL_HIGH \ + (EXT_PIN_CHK_TIME_16US | EXT_PIN_CHK_EN | EXT_PIN_CHK_PRESETOUT | \ + EXT_PIN_CHK_SDI1 | EXT_PIN_CHK_SDI2 | EXT_PIN_CHK_SDI3 | \ + EXT_PIN_CHK_SDI4) + +#define SDI2_CTRL_LOW \ + (EXT_PIN_CHK_TIME_16US | EXT_PIN_CHK_EN | EXT_PIN_CHK_PRESETOUT | \ + EXT_PIN_CHK_SDI1 | EXT_PIN_CHK_SDI3 | EXT_PIN_CHK_SDI4) + +static int extpin_check_phase(uint32_t ctrl) +{ + uint32_t val; + int timeout = EXTPIN_POLL_MAX; + + /* Program phase */ + i2c5_write(PMIC_ADDR_P, FUSA_CTRL_4, ctrl); +#if 0 + unsigned int wait_us = 0; + /* Optional settle wait */ + if (wait_us) + micro_wait(wait_us); +#endif + /* Poll FLT_RECORD_A until pass or timeout */ + do { + i2c5_read(PMIC_ADDR_P, FLT_RECORD_A, &val); + val &= 0xff; + + /* FLT_EXTPINCHECK2[5] == 0 -> pass */ + if ((val & FLT_EXTPINCHECK2) == 0) + return 0; + } while (--timeout); + + ERROR("FuSa failed: SM27c: FLT_RECORD_A=0x%02x, timeout=%d\n", + val, timeout); + return -1; +} + +/* SDI1(ERROROUT#): High -> Low (PRESETOUT included) + * Return: 0 on success; -1 on timeout failure. + */ +static int external_pin_check2_sdi1(void) +{ + int ret; + + /* Phase-H: PRESETOUT + SDI1 + SDI2 + SDI3 + SDI4 = High */ + ret = extpin_check_phase(SDI1_CTRL_HIGH); + if (ret) + return ret; + + /* Phase-L: toggle ERROROUT# Low, others high */ + assert_erroroutn_pin(); + + ret = extpin_check_phase(SDI1_CTRL_LOW); + if (ret) + return ret; + + deassert_erroroutn_pin(); + + return ret; +} + +/* SDI2(CVM_OUT#): High -> Low (PRESETOUT included) + * Return: 0 on success; -1 on timeout failure. + */ +static int external_pin_check2_sdi2(void) +{ + int ret; + + /* Phase-H: PRESETOUT + SDI1 + SDI2 + SDI3 + SDI4 = High */ + ret = extpin_check_phase(SDI2_CTRL_HIGH); + if (ret) + return ret; + + /* Phase-L: toggle CVM_OUT# Low, others high */ + assert_cvm_outn_pin(); + + ret = extpin_check_phase(SDI2_CTRL_LOW); + if (ret) + return ret; + + deassert_cvm_outn_pin(); + + return ret; +} + +/* + * PMIC: SM27c: External Pin Check2 + * This checks for the SDI1(ERROROUT#), SDI2 (VMONOUT0#/CVM_OUT#) + * signals’ stuckat condition, and also checks for connectivity of the signals between SoC & PMIC. + * + * Fault Reaction: + * RAA271005 goes to ERROR state when PRESETOUT pin fails External Pin Check test. + * RAA271005 goes to RESET state after SoC Activation Timeout expires, when other SDI pins fail. + */ +static bool fusa_sm_external_pin_check2(void) +{ + int ret; + bool ok = true; + + /* Check for the SDI1(ERROROUT#) */ + ret = external_pin_check2_sdi1(); + if (ret) + ok = false; + + /* Check for the SDI2 (VMONOUT0#/CVM_OUT#) */ + ret = external_pin_check2_sdi2(); + if (ret) + ok = false; + + return ok; +} + +static void pmic_cvm_output_test_start(uint32_t tsc_id, uint32_t slot) +{ + uint32_t delay_time[4] = { + 260,260,220,1270, + }; + + i2c5_write(PMIC_ADDR_P, FUSA_CHK_CVM1, CVM_TEST_START); + + micro_wait(delay_time[slot]); +} + +static uint32_t pmic_cvm_output_slot_status_check(uint32_t tsc_id) +{ + uint32_t val, ret = 0; + int timeout; + + /* CVM_TEST_DONE; */ + timeout = 10; + do { + i2c5_read(PMIC_ADDR_P, FUSA_CHK_CVM1, &val); + val &= 0xff; + + if (val & CVM_TEST_DONE) + break; + } while (--timeout); + + if (!timeout) + ERROR("FuSa failed: TSC%d(%04s): NOT done: " + "FUSA_CHK_CVM1=0x%02x, timeout=%d\n", + tsc_id+1, tsc_entries[tsc_id].name, val, timeout); + + i2c5_read(PMIC_ADDR_P, FUSA_STATUS_CVM1, &val); + val &= 0xff; + + if (val & CVM_TEST_FAIL_1) { + ERROR("FuSa failed: TSC%d(%04s): Slot1: " + "FUSA_STATUS_CVM1=0x%02x\n", + tsc_id+1, tsc_entries[tsc_id].name, val); + ret = 1; + } else if (val & CVM_TEST_FAIL_2) { + ERROR("FuSa failed: TSC%d(%04s): Slot2: " + "FUSA_STATUS_CVM1=0x%02x\n", + tsc_id+1, tsc_entries[tsc_id].name, val); + ret = 2; + } else if (val & CVM_TEST_FAIL_3) { + ERROR("FuSa failed: TSC%d(%04s): Slot3: " + "FUSA_STATUS_CVM1=0x%02x\n", + tsc_id+1, tsc_entries[tsc_id].name, val); + ret = 3; + } + + i2c5_read(PMIC_ADDR_P, FUSA_STATUS_CVM2, &val); + val &= 0xff; + + if (val & CVM_TEST_FAIL_4) { + ERROR("FuSa failed: TSC%d(%04s): Slot4: " + "FUSA_STATUS_CVM2=0x%02x\n", + tsc_id+1, tsc_entries[tsc_id].name, val); + ret = 4; + } + + return ret; +} + +#if defined(SAN_DEBUG) +#define CVM_OUTPUT_VOLT_0P0V (0) +#define CVM_OUTPUT_VOLT_0P8V (3200) +#define CVM_OUTPUT_VOLT_1P24V (4960) +#define CVM_OUTPUT_VOLT_1P8V (7200) + +static uint32_t pmic_dump_cvm_output_analog_voltage_adc1(uint32_t slot) +{ + uint32_t val, vthsense0; + int16_t adc_val = 0; + + /* PGA[6:4] = 0x5(0.8), IIR[2:0] = 0x3(1/16) */ + /* Input Voltage Rage = -0.3V to +1.158V */ + val = (0x5 << 4 | 0x3); + i2c5_write(PMIC_ADDR_P, EXT_0_ADCMON_Gain_IIRCoeff_EXT, val); + + i2c5_read(PMIC_ADDR_P, EXT_0_ADCMON_DATAMSB_EXT, &val); + val &= 0xff; + adc_val = (int16_t)(val << 8); + + i2c5_read(PMIC_ADDR_P, EXT_0_ADCMON_DATALSB_EXT, &val); + val &= 0xff; + adc_val |= (int16_t)val; + + if (adc_val < 256) { /* -0.02V ~ +0.02V */ + vthsense0 = CVM_OUTPUT_VOLT_0P0V; + } else { /* -0.788V ~ +0.812V */ + vthsense0 = CVM_OUTPUT_VOLT_0P8V; + } + + /* + * VTHSENSE0: + * vthsense0 == 0(0V), vthsense0 == 3200(0.8V) + */ + ERROR("SLOT%u: %4d mV - %u, VTHSENSE0(ADC1)=0x%04x(%hd)\n", + slot+1, (int32_t)adc_val * 1000 / 4000, vthsense0, adc_val&0xffff, adc_val&0xffff); + + return vthsense0; +} + +static uint32_t pmic_dump_cvm_output_analog_voltage_adc2(uint32_t slot) +{ + uint32_t val, vthref0; + int16_t adc_val = 0; + + /* PGA[6:4] = 0x1(0.5), IIR[2:0] = 0x3(1/16) */ + /* Input Voltage Rage = -0.3V to +1.851V */ + val = (0x1 << 4 | 0x3); + i2c5_write(PMIC_ADDR_P, EXT_1_ADCMON_Gain_IIRCoeff_EXT, val); + + i2c5_read(PMIC_ADDR_P, EXT_1_ADCMON_DATAMSB_EXT, &val); + val &= 0xff; + adc_val = (int16_t)(val << 8); + + i2c5_read(PMIC_ADDR_P, EXT_1_ADCMON_DATALSB_EXT, &val); + val &= 0xff; + adc_val |= (int16_t)val; + + if (adc_val < 256) { /* -0.02V ~ +0.02V */ + vthref0 = CVM_OUTPUT_VOLT_0P0V; + } else if ( (adc_val >= 3152) && (adc_val <= 3248)) { /* -0.788V ~ +0.812V */ + vthref0 = CVM_OUTPUT_VOLT_0P8V; + } else { /* 1.221V ~ 1.259V : 4884 ~ 5036*/ + vthref0 = CVM_OUTPUT_VOLT_1P24V; + } + + /* + * VTHREF0: + * vthref0 == 0(0V), vthref0 == 3200(0.8V), vthref0 == 4960(1.24V) + */ + ERROR("SLOT%u: %4d mV - %u, VTHREF0(ADC2)=0x%04x(%hd)\n", + slot+1, (int32_t) adc_val * 1000 / 4000, vthref0, adc_val&0xffff, adc_val&0xffff); + + return vthref0; +} + +static void pmic_dump_cvm_output_analog_voltages(uint32_t slot) +{ + /* TODO: Add PMIC analog voltage read logic */ + pmic_dump_cvm_output_analog_voltage_adc1(slot); + pmic_dump_cvm_output_analog_voltage_adc2(slot); +} +#endif + +static int cvm_output_check(void) +{ + uint32_t base; + uint32_t cvm_ctrl, cvm_vmout_bk, cvm_detect_manual_set, cvm_toff_manual_set; + uint32_t val; + int ret = 0; + enum tsc_id id; + enum slot_id slot; + + /* Note1. The processing must produce waiting period more than following. */ + /* 7000us + "monitoring time of external device" */ + /* Note2. The processing must produce waiting period more than following. */ + /* 40us + "monitoring time of external device" */ + + for (id = TSC_ID_1; id < TSC_ID_2; id++) { + /* For TSC1, set CVM_CTRL=H'0000 010F. */ + /* - If you do not use an analog output, set bit 8 to 0 */ + base = TSC_BASE_ADDR(TSC_ID_1); + cvm_ctrl = 0x0000010FU; + mem_write32(base + CVM_CTRL_OFFSET, cvm_ctrl); + + for (slot = CVM_SLOT1; slot < CVM_SLOT_MAX; slot++) { + struct cvm_output_check_data *st = &cvm_output_check_table[slot]; + /* For TSCn, set CVM_DETECT_MANUAL_SET=H'1001 1001 and CVM_TOFF_MANUAL_SET=H'0000 1000 */ + /* - TSCn is TSC1, TSC2, TSC3 and TSC4. Execute from TSC1. */ + base = TSC_BASE_ADDR(id); + cvm_detect_manual_set = st->detect_manual_set; + cvm_toff_manual_set = 0x00001000U; + mem_write32(base + CVM_DETECT_MANUAL_SET_OFFSET, cvm_detect_manual_set); + mem_write32(base + CVM_TOFF_MANUAL_SET_OFFSET, cvm_toff_manual_set); + + /* Wait 30[us] or more */ + micro_wait(30U); + + /* For TSC1, compare CVM_VMOUT_BK == cvm_output_check_table[id].vmout_bk? */ + /* - Yes: Keep going, No: Error (-EINVAL) */ + base = TSC_BASE_ADDR(TSC_ID_1); + cvm_vmout_bk = mem_read32(base + CVM_VMOUT_BK_OFFSET); + if (cvm_vmout_bk != st->vmout_bk) { + ERROR("FuSa failed: TSC%d(%04s): %s: " + "cvm_vmout_bk=0x%08x from Slot=%d, CVM_VMOUT_BK = 0x%08x\n", + id+1, tsc_entries[id].name, + vmout_bk_type_name[st->vmout_bk].name, + cvm_vmout_bk, slot, + st->vmout_bk); + ret = -EINVAL; + } +/* --------------------------------------------------------------------- */ +/* | CVM_DETECT_MANUAL_SET | VMOUT_BK | VTHSENSE0 | VTHREF0 | CVM_OUT# | */ +/* --------------------------------------------------------------------- */ +/* | 0x10011001 | OVER V | 0.8V | 0V | 0V | */ +/* | 0x130F130F | UNDER V | 0V | 0.8V | 0V | */ +/* | 0x1001130F | ILLEGAL | 0V | 1.24V | 0V | */ +/* | 0x130F1001 | NORMAL | 0.8V | 0.8V | 1.8V | */ +/* --------------------------------------------------------------------- */ + + /* Analog voltage of VTHREF0 and VTHSENSE0 *1 */ + /* - Omit this if you don't use analog outputs. */ + /* - Yes: Keep going: VTHREF0=?V,VTHSENSE0=?V, No: Error (-EINVAL) */ + + /* Note1. The processing must produce waiting period more than following. */ + /* 7000us + "monitoring time of external device" */ + micro_wait(7000U); + + /* Start (CVM Output Check) */ + pmic_cvm_output_test_start(id, slot); + +#if defined(SAN_DEBUG) + /* DEBUG: PMIC analog voltage read logic (VTHSENSE0, VTHREF0) */ + pmic_dump_cvm_output_analog_voltages(slot); +#endif +#if 0 + /* Digital voltage of CVM_OUT# *2 */ + /* - Yes: Keep going: CVM_OUT#=?V, No: Error (-EINVAL) */ + + /* Note2. The processing must produce waiting period more than following. */ + /* 40us + "monitoring time of external device" */ + micro_wait(40U); + + /* CVM_OUT#: Add PMIC digital voltage read logic */ + val = pmic_cvm_output_digital_pin_check(slot); + if (val) { + ERROR("FuSa failed: TSC%d(%04s): %s: SLOT%d: SDI2(CVM_OUT#): val=%u\n", + id+1, tsc_entries[id].name, + vmout_bk_type_name[st->vmout_bk].name, slot+1, val); + ret = -EINVAL; + } + + VERBOSE("TSC%d(%04s): %s: Done: Check Analog/Digital voltage via PMIC\n", + id+1, tsc_entries[id].name, + vmout_bk_type_name[st->vmout_bk].name); +#endif + } /* CVM_VMOUT_BK */ + + val = pmic_cvm_output_slot_status_check(id); + if (val) { + ERROR("FuSa failed: TSC%d(%04s): ret=0x%02x\n", + id+1, tsc_entries[id].name, val); + ret = -EINVAL; + } + + /* For TSCn, set CVM_DETECT_MANUAL_SET=H'0000 0000 and CVM_TOFF_MANUAL_SET=H'0000 0000. */ + base = TSC_BASE_ADDR(id); + cvm_detect_manual_set = 0x00000000U; + cvm_toff_manual_set = 0x00000000U; + mem_write32(base + CVM_DETECT_MANUAL_SET_OFFSET, cvm_detect_manual_set); + mem_write32(base + CVM_TOFF_MANUAL_SET_OFFSET, cvm_toff_manual_set); + + } /* TSC_ID */ + + /* For TSC1, set CVM_CTRL=H'0000 0000 */ + base = TSC_BASE_ADDR(TSC_ID_1); + cvm_ctrl = 0x00000000U; + mem_write32(base + CVM_CTRL_OFFSET, cvm_ctrl); + + /* End (CVM Output Check) */ + return ret; +} + +/* + * PMIC: SM27d: CVM TEST (VTHREF0, VTHSENSE0) + * The CVM test checks the SoC Core Voltage Monitor (CVM) functionality. It also checks the CVM error + * signal pins VTHREF0 and VTHSENSE0, for stuckat condition and correct interfacing between SoC & PMIC. + */ +static bool fusa_sm_cvm_test(void) +{ + bool ok = true; + int ret = 0; + + /* Power On A3E0 domain */ + power_on(PDR20); + + ret = cvm_output_check(); + if (ret) + ok = false; + + /* Power-Off A3E0 domain */ + power_off(PDR20); + + return ok; +} + +/* Minimal skeleton test (no HW touch) */ +static bool fusa_sm_skeleton_test(void) +{ + return true; +} + +/* Activation-phase tests; append new entries here */ +static const struct fusa_test_case fusa_activation_tests[] = { + { "SM27b: Serial Interface (SINT) Check", fusa_sm_serial_interface_check }, + { "SM27c: External Pin Check2", fusa_sm_external_pin_check2 }, + { "SM27d: CVM TEST (VTHREF0, VTHSENSE0)", fusa_sm_cvm_test }, + /* TODO: Add SM27b, SM27c, SM27d tests here */ +}; + +/* Run all activation tests; print per-case + summary */ +void fusa_run_soc_activation_tests(void) +{ + size_t i; + bool ok; + + for (i = 0; i < ARRAY_SIZE(fusa_activation_tests); i++) { + const struct fusa_test_case *tc = &fusa_activation_tests[i]; + + if (!tc->run) { + SAN_DBG("[%d] %s - NONE\n", i, tc->name); + continue; + } + + set_debug_gpio_n1205(GPIO_HIGH); + ok = tc->run(); + set_debug_gpio_n1205(GPIO_LOW); + + if (!ok) { + ERROR("[%d] %s - FAIL\n", i, tc->name); + } else { + SAN_DBG("[%d] %s - PASS\n", i, tc->name); + } + + VERBOSE("FuSa activation done\n"); + } +} diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/sysc/sysc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/sysc/sysc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/sysc/sysc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/sysc/sysc.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/wdt/rwdt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/wdt/rwdt.c new file mode 100644 index 00000000..aa638de2 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/wdt/rwdt.c @@ -0,0 +1,101 @@ +/******************************************************************************* + * DESCRIPTION : RCLK watchdog timer driver + ******************************************************************************/ +/****************************************************************************** + * @file rwdt.c + * - Version : 0.014 + * @brief RCLK Watchdog Timer driver + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 29.04.2025 0.01 First Release + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +/* Initialization RCLK Watchdog Timer, see 154.1.3 Operation of h/w manual */ +void rwdt_init(int start) +{ + uint8_t wdta_val; + + wdta_val = mem_read8(RWDT_RWTCSRA); + if (((wdta_val & RWTCSRA_TME) != 0) && start) { + wdta_val &= ~(RWTCSRA_TME); + mem_write32(RWDT_RWTCSRA, RWTCSRA_UPPER | wdta_val); + + mem_write32(RWDT_RWTCNT, RWTCNT_UPPER | 0x0U); + + wdta_val = mem_read8(RWDT_RWTCSRA); + wdta_val &= ~(RWTCSRA_WOVF); + mem_write32(RWDT_RWTCSRA, RWTCSRA_UPPER | wdta_val); + + /* skip set CKS0, CKS1 */ + } + + do { + wdta_val = mem_read8(RWDT_RWTCSRA); + } while ((wdta_val & RWTCSRA_WRFLG) != 0); + + /* start the counting by setting the TME bit in RWTCSRA to 1 */ + /* + if (start) { + wdta_val |= RWTCSRA_TME; + mem_write32(RWDT_RWTCSRA, RWTCSRA_UPPER | wdta_val); + } + */ +} + +/* +void rwdt_update(void) +{ + mem_write32(RWDT_RWTCNT, RWTCNT_UPPER | 0U); +} + +// RWTCNT overflow +void rwdt_handler(void) +{ + uint8_t wdta_val; + + wdta_val = mem_read8(RWDT_RWTCSRA); + if ((wdta_val & RWTCSRA_WOVF) != 0) { + // it's overflowed. + } + + // RWTCNT, RWTCSRA, RWTCSRB are initialized. + // should we run rwdt_init() again? +} +*/ + +/* Initialization System Watchdog Timer */ +void swdt_init(int start) +{ + uint8_t wdta_val; + + wdta_val = mem_read8(SWDT_SWTCSRA); + if (((wdta_val & RWTCSRA_TME) != 0) && start) { + wdta_val &= ~(RWTCSRA_TME); + mem_write32(SWDT_SWTCSRA, RWTCSRA_UPPER | wdta_val); + + mem_write32(SWDT_SWTCNT, RWTCNT_UPPER | 0x0U); + + wdta_val = mem_read8(SWDT_SWTCSRA); + wdta_val &= ~(RWTCSRA_WOVF); + mem_write32(SWDT_SWTCSRA, RWTCSRA_UPPER | wdta_val); + + /* skip set CKS0, CKS1 */ + } + + do { + wdta_val = mem_read8(SWDT_SWTCSRA); + } while ((wdta_val & RWTCSRA_WRFLG) != 0); + + /* start the counting by setting the TME bit in SWTCSRA to 1 */ + /* do nothing */ +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/wdt/wdt.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/wdt/wdt.c new file mode 100644 index 00000000..12e169eb --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/ip/wdt/wdt.c @@ -0,0 +1,148 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : window watchdog timer driver + ******************************************************************************/ +/****************************************************************************** + * @file wdt.c + * - Version : 0.04 + * @brief Window Watchdog Timer driver + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 06.01.2022 0.02 Add exception handling for ICUMX_WDTA. + * : 20.01.2022 0.03 Add ICUMX name unification. + * : 11.01.2023 0.04 Modify activation code writing to + * : ICUMX_WDTA0EVAC register. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include + + +#define ICUMX_WDTA0_BASE (0xFFFEE080U) /* Watchdog Timer base */ +#define ICUMX_WDTA0WDTE (ICUMX_WDTA0_BASE) +#define ICUMX_WDTA0EVAC (ICUMX_WDTA0_BASE+0x0004U) +#define ICUMX_WDTA0REF (ICUMX_WDTA0_BASE+0x0008U) +#define ICUMX_WDTA0MD (ICUMX_WDTA0_BASE+0x000CU) + + +#define WDTA0MD_WDTA0WIE (1U<<3) /* Enables the 75% interrupt request INTWDTA0 */ +#define WDTA0MD_WDTA0ERM (1U<<2) /* 0:NMI request mode 1:Reset mode */ +#define WDTA0MD_WDTA0WS10 (3U) /* 11B: window-open period is 100% */ + +/* overflow time setting */ +#define WDT_11MS (0x0U) +#define WDT_23MS (0x1U) +#define WDT_46MS (0x2U) +#define WDT_93MS (0x3U) +#define WDT_187MS (0x4U) +#define WDT_374MS (0x5U) +#define WDT_749MS (0x6U) +#define WDT_1498MS (0x7U) + +/* Activation code */ +#define WDT_ACT_CODE (0xACU) + +/* ICUMX Configuration Register */ +#define ICUMX_CFG4 (0xFFFEE270U) +/* Bit definition for Configuration Register */ +#define ICUMX_CFG4_ICUMOPWDVAC (0x00000020U) + +/* Initialization Window Watchdog Timer */ +void wdt_init(void) +{ + uint8_t wdta_val; + + /* This API is executed before copying a part of Loader to Local RAM. */ + /* Therefore, this API can not use the Memory mapped I/O API. */ + /* When reading or writing memory, execute the same processing as */ + /* Memory mapped I/O API in this function. */ + wdta_val = WDTA0MD_WDTA0ERM; /* NMI request mode */ + wdta_val |= WDTA0MD_WDTA0WIE; /* Enables the 75% interrupt request INTWDTA0 */ + wdta_val |= WDTA0MD_WDTA0WS10; + wdta_val |= (WDT_1498MS << 4U); /* overflow interval time */ + mem_write8(ICUMX_WDTA0MD, wdta_val); + + /* set watchdog timer handler */ + intc_set_interrupt(WDT0_INT, 7U, (INT_HANDLER)wdt_handler); + + /* watchdog timer restart */ + wdt_restart(); +} +/* End of function wdt_init(uint32_t overflow_time) */ + +void wdt_restart(void) +{ + uint8_t reg8; + uint32_t reg32; + + reg32 = mem_read32(ICUMX_CFG4); + + if((reg32 & ICUMX_CFG4_ICUMOPWDVAC) != 0U) + { + reg8 = mem_read8(ICUMX_WDTA0REF); + reg8 = WDT_ACT_CODE - reg8; + /* Watchdog Timer restart. */ + /* Subtract ICUMX_WDTA0REF from activation code when VAC(Variable Activation Code) is enabled. */ + mem_write8(ICUMX_WDTA0EVAC, reg8); + } + else + { + /* Watchdog Timer restart. */ + mem_write8(ICUMX_WDTA0EVAC, WDT_ACT_CODE); + } +} +/* End of function wdt_restart(void) */ + +#include +#include +#define RST_SRESCR0 (RST_BASE + 0x18) +#define RST_SPRES 0x5AA58000UL + +/* Interrupt handling function */ +void wdt_handler(void) +{ + intc_disable_interrupt(WDT0_INT); + ERROR("\n"); + ERROR("ICUMX: System WDT overflow\n"); +#ifdef WDT_RESET + micro_wait(11*1000U); /* wait 11 miliseconds */ + /* try to reset */ + mem_write32(RST_SRESCR0, RST_SPRES); +#else +#warning "WDT_RESET is not defined. System will not reset." + /* If WDT_RESET is not defined, the system will not reset. */ + /* This is useful for debugging purposes, but in production, */ + /* it is recommended to define WDT_RESET to ensure the system resets on WDT overflow. */ +#endif + panic; +} +/* End of function wdt_handler(void) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/icumx_loader.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/icumx_loader.ld new file mode 100644 index 00000000..0fa44f2c --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/icumx_loader.ld @@ -0,0 +1,234 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader linker directive + ******************************************************************************/ + +DEFAULTS { +//Memory + remap_addr = 0xFDE00000 //remap15 address(target address = 0xEB200000) + remap_size = 1M //RT-SRAM size + + rt_sram_addr = 0xEB200000 //RT-SRAM address + local_ram_addr = 0xfede0000 //LRAM address + local_ram_size = 128K //LRAM size + +// Size +//No override area + stack_size = 16K //ICUMX Loader stack size + sa9_size = 64K //content cert size(cert info 1K + content cert(14) * 2K) + bss_size = 16K +// Configuration Table + qosbw_table_size = 4K + qoswt_table_size = 4K + rgid_table_size = 1K + rgid_m_table_size = 1K + rgid_r_table_size = 8K + rgid_w_table_size = 8K + rgid_sec_table_size = 8K + rgid_axi_table_size = 1K + rgid_gid_table_size = 1K + ipmmu_rgid_tbl_size = 1K + ipmmu_rgid_sec_tbl_size = 1K + ipmmu_rgid_en_tbl_size = 1K + imp_rgid_m_tbl_size = 1K + imp_rgid_s_tbl_size = 2K //include .data section + configuration_size = qosbw_table_size + qoswt_table_size + rgid_table_size + rgid_m_table_size + rgid_r_table_size + rgid_w_table_size + rgid_sec_table_size + rgid_axi_table_size + rgid_gid_table_size + ipmmu_rgid_tbl_size + ipmmu_rgid_sec_tbl_size + ipmmu_rgid_en_tbl_size+ imp_rgid_m_tbl_size + imp_rgid_s_tbl_size + +// ICUMX Loader + ipl_top_addr = 0xEB210000 + ipl_size = 128K //ICUMX Loader size + vector_table_size = 2K //vector table size + ipl_rom_size = ipl_size - (vector_table_size + configuration_size + bss_size) + +// Address +// ICUMX Loader + vector_table_address_offset = ipl_top_addr - rt_sram_addr + code_fetch_remap_vector_table = 0x1200000 + vector_table_address_offset // 0xEB200000 - 0xEA000000 + ipl start address offset + code_fetch_remap_ipl = code_fetch_remap_vector_table + (vector_table_size + configuration_size) + +// No override area + stack_addr_offset = remap_size - stack_size + sa9_addr_offset = 0x30000 + bss_addr_offset = sa9_addr_offset - bss_size + +// Configuration Table + configuration_table_address_offset = vector_table_address_offset + vector_table_size + configuration_table_address = code_fetch_remap_vector_table + vector_table_size + qosbw_table_address = configuration_table_address + qoswt_table_address = qosbw_table_address + qosbw_table_size + rgid_size_table_address = qoswt_table_address + qoswt_table_size + rgid_m_table_address = rgid_size_table_address + rgid_table_size + rgid_r_table_address = rgid_m_table_address + rgid_m_table_size + rgid_w_table_address = rgid_r_table_address + rgid_r_table_size + rgid_sec_table_address = rgid_w_table_address + rgid_w_table_size + rgid_axi_table_address = rgid_sec_table_address + rgid_sec_table_size + rgid_gid_table_address = rgid_axi_table_address + rgid_axi_table_size + ipmmu_rgid_table_address = rgid_gid_table_address + rgid_gid_table_size + ipmmu_rgid_sec_table_address = ipmmu_rgid_table_address + ipmmu_rgid_tbl_size + ipmmu_rgid_en_table_address = ipmmu_rgid_sec_table_address + ipmmu_rgid_sec_tbl_size + imp_rgid_m_table_address = ipmmu_rgid_en_table_address + ipmmu_rgid_en_tbl_size + imp_rgid_s_table_address = imp_rgid_m_table_address + imp_rgid_m_tbl_size + +// Offset + qosbw_table_address_offset = vector_table_address_offset + vector_table_size + qoswt_table_address_offset = qosbw_table_address_offset + qosbw_table_size + rgid_size_table_offset = qoswt_table_address_offset + qoswt_table_size + rgid_m_table_address_offset = rgid_size_table_offset + rgid_table_size + rgid_r_table_address_offset = rgid_m_table_address_offset + rgid_m_table_size + rgid_w_table_address_offset = rgid_r_table_address_offset + rgid_r_table_size + rgid_sec_table_address_offset = rgid_w_table_address_offset + rgid_w_table_size + rgid_axi_table_address_offset = rgid_sec_table_address_offset + rgid_sec_table_size + rgid_gid_table_address_offset = rgid_axi_table_address_offset + rgid_axi_table_size + ipmmu_rgid_table_address_offset = rgid_gid_table_address_offset + rgid_gid_table_size + ipmmu_rgid_sec_table_address_offset = ipmmu_rgid_table_address_offset + ipmmu_rgid_tbl_size + ipmmu_rgid_en_table_address_offset = ipmmu_rgid_sec_table_address_offset + ipmmu_rgid_sec_tbl_size + imp_rgid_m_table_address_offset = ipmmu_rgid_en_table_address_offset + ipmmu_rgid_en_tbl_size + imp_rgid_s_table_address_offset = imp_rgid_m_table_address_offset + imp_rgid_m_tbl_size + ipl_rom_address_offset = configuration_table_address_offset + configuration_size +} +MEMORY +{ + vector_table : ORIGIN = code_fetch_remap_vector_table , LENGTH = vector_table_size // ICUMX Loader (CFREMAP) + qosbw_table : ORIGIN = remap_addr + qosbw_table_address_offset , LENGTH = qosbw_table_size // configuration table (QOSBW) + qoswt_table : ORIGIN = remap_addr + qoswt_table_address_offset , LENGTH = qoswt_table_size // configuration table (QOSWT) + rgid_size_table : ORIGIN = remap_addr + rgid_size_table_offset , LENGTH = rgid_table_size // configuration table (Region ID(Table size)) + rgid_m_table : ORIGIN = remap_addr + rgid_m_table_address_offset , LENGTH = rgid_m_table_size // configuration table (Region ID(Master)) + rgid_r_table : ORIGIN = remap_addr + rgid_r_table_address_offset , LENGTH = rgid_r_table_size // configuration table (Region ID(Read)) + rgid_w_table : ORIGIN = remap_addr + rgid_w_table_address_offset , LENGTH = rgid_w_table_size // configuration table (Region ID(Write)) + rgid_sec_table : ORIGIN = remap_addr + rgid_sec_table_address_offset, LENGTH = rgid_sec_table_size // configuration table (Region ID(Secure)) + rgid_axi_table : ORIGIN = remap_addr + rgid_axi_table_address_offset, LENGTH = rgid_axi_table_size // configuration table (R/W for AXI) + rgid_gid_table : ORIGIN = remap_addr + rgid_gid_table_address_offset, LENGTH = rgid_gid_table_size // configuration table (R/W for GID) + ipmmu_rgid_table : ORIGIN = remap_addr + ipmmu_rgid_table_address_offset, LENGTH = ipmmu_rgid_tbl_size // configuration table (Region ID(IPMMU)) + ipmmu_rgid_sec_table : ORIGIN = remap_addr + ipmmu_rgid_sec_table_address_offset, LENGTH = ipmmu_rgid_sec_tbl_size // configuration table (Region ID(IPMMU Secure)) + ipmmu_rgid_en_table : ORIGIN = remap_addr + ipmmu_rgid_en_table_address_offset, LENGTH = ipmmu_rgid_en_tbl_size // configuration table (Region ID(IPMMU Enable)) + imp_rgid_m_table : ORIGIN = remap_addr + imp_rgid_m_table_address_offset, LENGTH = imp_rgid_m_tbl_size // configuration table (Region ID(IMP Master)) + imp_rgid_s_table : ORIGIN = remap_addr + imp_rgid_s_table_address_offset, LENGTH = imp_rgid_s_tbl_size // configuration table (Region ID(IMP Slave)) + ipl_rom : ORIGIN = code_fetch_remap_ipl , LENGTH = ipl_rom_size + +// Physical address + phys_vector_table : ORIGIN = rt_sram_addr + vector_table_address_offset, LENGTH = vector_table_size //ICUMX Loader(RT-SRAM) + phys_qosbw_table : ORIGIN = rt_sram_addr + qosbw_table_address_offset, LENGTH = qosbw_table_size //configuration table (QOSBW) + phys_qoswt_table : ORIGIN = rt_sram_addr + qoswt_table_address_offset, LENGTH = qoswt_table_size //configuration table (QOSWT) + phys_rgid_size_table: ORIGIN = rt_sram_addr + rgid_size_table_offset, LENGTH = rgid_table_size // configuration table (Region ID(Table size)) + phys_rgid_m_table : ORIGIN = rt_sram_addr + rgid_m_table_address_offset, LENGTH = rgid_m_table_size // configuration table (Region ID(Master)) + phys_rgid_r_table : ORIGIN = rt_sram_addr + rgid_r_table_address_offset, LENGTH = rgid_r_table_size // configuration table (Region ID(Read)) + phys_rgid_w_table : ORIGIN = rt_sram_addr + rgid_w_table_address_offset, LENGTH = rgid_w_table_size // configuration table (Region ID(Write)) + phys_rgid_sec_table : ORIGIN = rt_sram_addr + rgid_sec_table_address_offset, LENGTH = rgid_sec_table_size // configuration table (Region ID(Secure)) + phys_rgid_axi_table : ORIGIN = rt_sram_addr + rgid_axi_table_address_offset, LENGTH = rgid_axi_table_size // configuration table (Region ID(R/W for AXI)) + phys_rgid_gid_table : ORIGIN = rt_sram_addr + rgid_gid_table_address_offset, LENGTH = rgid_gid_table_size // configuration table (Region ID(R/W for GID)) + phys_ipmmu_rgid_table : ORIGIN = rt_sram_addr + ipmmu_rgid_table_address_offset, LENGTH = ipmmu_rgid_tbl_size // configuration table (Region ID(IPMMU)) + phys_ipmmu_rgid_sec_table : ORIGIN = rt_sram_addr + ipmmu_rgid_sec_table_address_offset, LENGTH = ipmmu_rgid_sec_tbl_size // configuration table (Region ID(IPMMU Secure)) + phys_ipmmu_rgid_en_table : ORIGIN = rt_sram_addr + ipmmu_rgid_en_table_address_offset, LENGTH = ipmmu_rgid_en_tbl_size // configuration table (Region ID(IPMMU Enable)) + phys_imp_rgid_m_table : ORIGIN = rt_sram_addr + imp_rgid_m_table_address_offset, LENGTH = imp_rgid_m_tbl_size // configuration table (Region ID(IMP Master)) + phys_imp_rgid_s_table : ORIGIN = rt_sram_addr + imp_rgid_s_table_address_offset, LENGTH = imp_rgid_s_tbl_size // configuration table (Region ID(IMP Slave)) + phys_ipl_rom : ORIGIN = rt_sram_addr + ipl_rom_address_offset, LENGTH = ipl_rom_size //ICUMX Loader(RT-SRAM) + +// No override area + sa9_load : ORIGIN = remap_addr + sa9_addr_offset, LENGTH = sa9_size // Content cert + stack : ORIGIN = remap_addr + stack_addr_offset, LENGTH = stack_size // ICUMX Loader stack + bss : ORIGIN = remap_addr + bss_addr_offset, LENGTH = bss_size // ICUMX Loader bss area + local_ram : ORIGIN = local_ram_addr, LENGTH = local_ram_size - stack_size // Local RAM +} + +// +// Program layout for starting in ROM, copying data to RAM, +// and continuing to execute out of ROM. +// +SECTIONS +{ +// +// ROM SECTIONS(Remap) +// +// Place .text into fast_memory. Fail if it does not fit. + .reset ALIGN(4) : > vector_table + .EIINTTBL_ICU ALIGN(512) : > . + .qosbw_tbl ALIGN(4) : > qosbw_table + .qoswt_tbl ALIGN(4) : > qoswt_table + .rgid_size_tbl ALIGN(4) : > rgid_size_table // Logical address:0xFDE12800 + .rgid_m_tbl ALIGN(4) : > rgid_m_table // Logical address:0xFDE12C00 + .rgid_r_tbl ALIGN(4) : > rgid_r_table // Logical address:0xFDE13000 + .rgid_w_tbl ALIGN(4) : > rgid_w_table // Logical address:0xFDE15000 + .rgid_sec_tbl ALIGN(4) : > rgid_sec_table // Logical address:0xFDE17000 + .rgid_axi_tbl ALIGN(4) : > rgid_axi_table // Logical address:0xFDE19000 + .rgid_gid_tbl ALIGN(4) : > rgid_gid_table // Logical address:0xFDE19400 + .ipmmu_rgid_tbl ALIGN(4) : > ipmmu_rgid_table // Logical address:0xFDE19800 + .ipmmu_rgid_sec_tbl ALIGN(4) : > ipmmu_rgid_sec_table // Logical address:0xFDE19C00 + .ipmmu_rgid_en_tbl ALIGN(4) : > ipmmu_rgid_en_table // Logical address:0xFDE1A000 + .imp_rgid_m_tbl ALIGN(4) : > imp_rgid_m_table // Logical address:0xFDE1A400 + .imp_rgid_s_tbl ALIGN(4) : > imp_rgid_s_table // Logical address:0xFDE1A800 + .data ALIGN(4) : > . + .text ALIGN(4) : > ipl_rom + .RE_CR.text ALIGN(4) : > . + .rosdata ALIGN(4) : > . + .rodata ALIGN(4) : > . + .secinfo ALIGN(4) : > . + + .rom_end ALIGN(4) : > . + .canary ALIGN(4) : > bss + .bss ALIGN(4) : > . + +// ROM mirror SECTIONS(RT-SRAM) + _start = ipl_top_addr; + .ROM_NOCOPY.reset ROM_NOCOPY(.reset) ALIGN(4) : > phys_vector_table + .ROM_NOCOPY.EIINTTBL_ICU ROM_NOCOPY(.EIINTTBL_ICU) ALIGN(4) : > . + .ROM_NOCOPY.qosbw_tbl ROM_NOCOPY(.qosbw_tbl) ALIGN(4) : > phys_qosbw_table + .ROM_NOCOPY.qoswt_tbl ROM_NOCOPY(.qoswt_tbl) ALIGN(4) : > phys_qoswt_table + .ROM_NOCOPY.rgid_size_tbl ROM_NOCOPY(.rgid_size_tbl) ALIGN(4) : > phys_rgid_size_table // Physical address:0xEB212800 + .ROM_NOCOPY.rgid_m_tbl ROM_NOCOPY(.rgid_m_tbl) ALIGN(4) : > phys_rgid_m_table // Physical address:0xEB212C00 + .ROM_NOCOPY.rgid_r_tbl ROM_NOCOPY(.rgid_r_tbl) ALIGN(4) : > phys_rgid_r_table // Physical address:0xEB213000 + .ROM_NOCOPY.rgid_w_tbl ROM_NOCOPY(.rgid_w_tbl) ALIGN(4) : > phys_rgid_w_table // Physical address:0xEB215000 + .ROM_NOCOPY.rgid_sec_tbl ROM_NOCOPY(.rgid_sec_tbl) ALIGN(4) : > phys_rgid_sec_table // Physical address:0xEB217000 + .ROM_NOCOPY.rgid_axi_tbl ROM_NOCOPY(.rgid_axi_tbl) ALIGN(4) : > phys_rgid_axi_table // Physical address:0xEB219000 + .ROM_NOCOPY.rgid_gid_tbl ROM_NOCOPY(.rgid_gid_tbl) ALIGN(4) : > phys_rgid_gid_table // Physical address:0xEB219400 + .ROM_NOCOPY.ipmmu_rgid_tbl ROM_NOCOPY(.ipmmu_rgid_tbl) ALIGN(4) : > phys_ipmmu_rgid_table // Physical address:0xEB219800 + .ROM_NOCOPY.ipmmu_rgid_sec_tbl ROM_NOCOPY(.ipmmu_rgid_sec_tbl) ALIGN(4) : > phys_ipmmu_rgid_sec_table // Physical address:0xEB219C00 + .ROM_NOCOPY.ipmmu_rgid_en_tbl ROM_NOCOPY(.ipmmu_rgid_en_tbl) ALIGN(4) : > phys_ipmmu_rgid_en_table // Physical address:0xEB21A000 + .ROM_NOCOPY.imp_rgid_m_tbl ROM_NOCOPY(.imp_rgid_m_tbl) ALIGN(4) : > phys_imp_rgid_m_table // Physical address:0xEB21A400 + .ROM_NOCOPY.imp_rgid_s_tbl ROM_NOCOPY(.imp_rgid_s_tbl) ALIGN(4) : > phys_imp_rgid_s_table // Physical address:0xEB21A800 + .ROM_NOCOPY.data ROM_NOCOPY(.data) ALIGN(4) : > . + .ROM_NOCOPY.text ROM_NOCOPY(.text) ALIGN(4) : > phys_ipl_rom + .ROM_NOCOPY.RE_CR.text ROM_NOCOPY(.RE_CR.text) ALIGN(4) : > . + .ROM_NOCOPY.rosdata ROM_NOCOPY(.rosdata) ALIGN(4) : > . + .ROM_NOCOPY.rodata ROM_NOCOPY(.rodata) ALIGN(4) : > . + .ROM_NOCOPY.secinfo ROM_NOCOPY(.secinfo) ALIGN(4) : > . + .cr_hot_plug_magic ALIGN(16): > . // This section must be placed at the last of binary. + + + +// +// RAM SECTIONS +// + .top_stack : > stack + .RT.stack ALIGN(4) PAD(stack_size) ABS : > . + .end_stack : > . + + .top.local.ram : > local_ram + .sdata ALIGN(4) : > . + .tdata ALIGN(4) : > . + .sdabase ALIGN(4) : > . + .end.local.ram : > . + + .sa9_load ALIGN(4) PAD(sa9_size) : > sa9_load +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/icumx_loader_v4m.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/icumx_loader_v4m.ld new file mode 100644 index 00000000..6bb62935 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/icumx_loader_v4m.ld @@ -0,0 +1,222 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader linker directive + ******************************************************************************/ + +DEFAULTS { +//Memory + remap_addr = 0xFDE00000 //remap15 address(target address = 0xEB200000) + remap_size = 1M //RT-SRAM size + + rt_sram_addr = 0xEB200000 //RT-SRAM address + local_ram_addr = 0xfede0000 //LRAM address + local_ram_size = 128K //LRAM size + +// Size +//No override area + stack_size = 16K //ICUMX Loader stack size + bootrom_work_size = 2K + sa9_size = 64K //content cert size(cert info 1K + content cert(14) * 2K) + bss_size = 16K +// Configuration Table + qosbw_table_size = 4K + qoswt_table_size = 4K + rgid_table_size = 1K + rgid_m_table_size = 1K + rgid_r_table_size = 8K + rgid_w_table_size = 8K + rgid_sec_table_size = 8K + rgid_axi_table_size = 1K + rgid_gid_table_size = 1K + ipmmu_rgid_tbl_size = 1K + ipmmu_rgid_sec_tbl_size = 1K + ipmmu_rgid_en_tbl_size = 1K //include .data section + configuration_size = qosbw_table_size + qoswt_table_size + rgid_table_size + rgid_m_table_size + rgid_r_table_size + rgid_w_table_size + rgid_sec_table_size + rgid_axi_table_size + rgid_gid_table_size + ipmmu_rgid_tbl_size + ipmmu_rgid_sec_tbl_size + ipmmu_rgid_en_tbl_size + +// ICUMX Loader + ipl_top_addr = 0xEB210000 + ipl_size = 128K //ICUMX Loader size + vector_table_size = 2K //vector table size + ipl_rom_size = ipl_size - (vector_table_size + configuration_size + bss_size) + +// Address +// ICUMX Loader + vector_table_address_offset = ipl_top_addr - rt_sram_addr + code_fetch_remap_vector_table = 0x1200000 + vector_table_address_offset // 0xEB200000 - 0xEA000000 + ipl start address offset + code_fetch_remap_ipl = code_fetch_remap_vector_table + (vector_table_size + configuration_size) + +// No override area + stack_addr_offset = 110K // stack top address : 0xFEDFB800 (This is in Local RAM) + sa9_addr_offset = 0x30000 + bss_addr_offset = sa9_addr_offset - bss_size + +// Configuration Table + configuration_table_address_offset = vector_table_address_offset + vector_table_size + configuration_table_address = code_fetch_remap_vector_table + vector_table_size + qosbw_table_address = configuration_table_address + qoswt_table_address = qosbw_table_address + qosbw_table_size + rgid_size_table_address = qoswt_table_address + qoswt_table_size + rgid_m_table_address = rgid_size_table_address + rgid_table_size + rgid_r_table_address = rgid_m_table_address + rgid_m_table_size + rgid_w_table_address = rgid_r_table_address + rgid_r_table_size + rgid_sec_table_address = rgid_w_table_address + rgid_w_table_size + rgid_axi_table_address = rgid_sec_table_address + rgid_sec_table_size + rgid_gid_table_address = rgid_axi_table_address + rgid_axi_table_size + ipmmu_rgid_table_address = rgid_gid_table_address + rgid_gid_table_size + ipmmu_rgid_sec_table_address = ipmmu_rgid_table_address + ipmmu_rgid_tbl_size + ipmmu_rgid_en_table_address = ipmmu_rgid_sec_table_address + ipmmu_rgid_sec_tbl_size + +// Offset + qosbw_table_address_offset = vector_table_address_offset + vector_table_size + qoswt_table_address_offset = qosbw_table_address_offset + qosbw_table_size + rgid_size_table_offset = qoswt_table_address_offset + qoswt_table_size + rgid_m_table_address_offset = rgid_size_table_offset + rgid_table_size + rgid_r_table_address_offset = rgid_m_table_address_offset + rgid_m_table_size + rgid_w_table_address_offset = rgid_r_table_address_offset + rgid_r_table_size + rgid_sec_table_address_offset = rgid_w_table_address_offset + rgid_w_table_size + rgid_axi_table_address_offset = rgid_sec_table_address_offset + rgid_sec_table_size + rgid_gid_table_address_offset = rgid_axi_table_address_offset + rgid_axi_table_size + ipmmu_rgid_table_address_offset = rgid_gid_table_address_offset + rgid_gid_table_size + ipmmu_rgid_sec_table_address_offset = ipmmu_rgid_table_address_offset + ipmmu_rgid_tbl_size + ipmmu_rgid_en_table_address_offset = ipmmu_rgid_sec_table_address_offset + ipmmu_rgid_sec_tbl_size + ipl_rom_address_offset = configuration_table_address_offset + configuration_size +} +MEMORY +{ + vector_table : ORIGIN = code_fetch_remap_vector_table , LENGTH = vector_table_size // ICUMX Loader (CFREMAP) + qosbw_table : ORIGIN = remap_addr + qosbw_table_address_offset , LENGTH = qosbw_table_size // configuration table (QOSBW) + qoswt_table : ORIGIN = remap_addr + qoswt_table_address_offset , LENGTH = qoswt_table_size // configuration table (QOSWT) + rgid_size_table : ORIGIN = remap_addr + rgid_size_table_offset , LENGTH = rgid_table_size // configuration table (Region ID(Table size)) + rgid_m_table : ORIGIN = remap_addr + rgid_m_table_address_offset , LENGTH = rgid_m_table_size // configuration table (Region ID(Master)) + rgid_r_table : ORIGIN = remap_addr + rgid_r_table_address_offset , LENGTH = rgid_r_table_size // configuration table (Region ID(Read)) + rgid_w_table : ORIGIN = remap_addr + rgid_w_table_address_offset , LENGTH = rgid_w_table_size // configuration table (Region ID(Write)) + rgid_sec_table : ORIGIN = remap_addr + rgid_sec_table_address_offset, LENGTH = rgid_sec_table_size // configuration table (Region ID(Secure)) + rgid_axi_table : ORIGIN = remap_addr + rgid_axi_table_address_offset, LENGTH = rgid_axi_table_size // configuration table (R/W for AXI) + rgid_gid_table : ORIGIN = remap_addr + rgid_gid_table_address_offset, LENGTH = rgid_gid_table_size // configuration table (R/W for GID) + ipmmu_rgid_table : ORIGIN = remap_addr + ipmmu_rgid_table_address_offset, LENGTH = ipmmu_rgid_tbl_size // configuration table (Region ID(IPMMU)) + ipmmu_rgid_sec_table : ORIGIN = remap_addr + ipmmu_rgid_sec_table_address_offset, LENGTH = ipmmu_rgid_sec_tbl_size // configuration table (Region ID(IPMMU Secure)) + ipmmu_rgid_en_table : ORIGIN = remap_addr + ipmmu_rgid_en_table_address_offset, LENGTH = ipmmu_rgid_en_tbl_size // configuration table (Region ID(IPMMU Enable)) + ipl_rom : ORIGIN = code_fetch_remap_ipl , LENGTH = ipl_rom_size + +// Physical address + phys_vector_table : ORIGIN = rt_sram_addr + vector_table_address_offset, LENGTH = vector_table_size //ICUMX Loader(RT-SRAM) + phys_qosbw_table : ORIGIN = rt_sram_addr + qosbw_table_address_offset, LENGTH = qosbw_table_size //configuration table (QOSBW) + phys_qoswt_table : ORIGIN = rt_sram_addr + qoswt_table_address_offset, LENGTH = qoswt_table_size //configuration table (QOSWT) + phys_rgid_size_table: ORIGIN = rt_sram_addr + rgid_size_table_offset, LENGTH = rgid_table_size // configuration table (Region ID(Table size)) + phys_rgid_m_table : ORIGIN = rt_sram_addr + rgid_m_table_address_offset, LENGTH = rgid_m_table_size // configuration table (Region ID(Master)) + phys_rgid_r_table : ORIGIN = rt_sram_addr + rgid_r_table_address_offset, LENGTH = rgid_r_table_size // configuration table (Region ID(Read)) + phys_rgid_w_table : ORIGIN = rt_sram_addr + rgid_w_table_address_offset, LENGTH = rgid_w_table_size // configuration table (Region ID(Write)) + phys_rgid_sec_table : ORIGIN = rt_sram_addr + rgid_sec_table_address_offset, LENGTH = rgid_sec_table_size // configuration table (Region ID(Secure)) + phys_rgid_axi_table : ORIGIN = rt_sram_addr + rgid_axi_table_address_offset, LENGTH = rgid_axi_table_size // configuration table (Region ID(R/W for AXI)) + phys_rgid_gid_table : ORIGIN = rt_sram_addr + rgid_gid_table_address_offset, LENGTH = rgid_gid_table_size // configuration table (Region ID(R/W for GID)) + phys_ipmmu_rgid_table : ORIGIN = rt_sram_addr + ipmmu_rgid_table_address_offset, LENGTH = ipmmu_rgid_tbl_size // configuration table (Region ID(IPMMU)) + phys_ipmmu_rgid_sec_table : ORIGIN = rt_sram_addr + ipmmu_rgid_sec_table_address_offset, LENGTH = ipmmu_rgid_sec_tbl_size // configuration table (Region ID(IPMMU Secure)) + phys_ipmmu_rgid_en_table : ORIGIN = rt_sram_addr + ipmmu_rgid_en_table_address_offset, LENGTH = ipmmu_rgid_en_tbl_size // configuration table (Region ID(IPMMU Enable)) + phys_ipl_rom : ORIGIN = rt_sram_addr + ipl_rom_address_offset, LENGTH = ipl_rom_size //ICUMX Loader(RT-SRAM) + +// No override area + sa9_load : ORIGIN = remap_addr + sa9_addr_offset, LENGTH = sa9_size // Content cert + stack : ORIGIN = local_ram_addr + stack_addr_offset, LENGTH = stack_size // ICUMX Loader stack (This is in Local RAM) + bss : ORIGIN = remap_addr + bss_addr_offset, LENGTH = bss_size // ICUMX Loader bss area + local_ram : ORIGIN = local_ram_addr, LENGTH = local_ram_size - stack_size - bootrom_work_size // Local RAM + bootrom_work : ORIGIN = local_ram_addr + stack_addr_offset + stack_size, LENGTH = bootrom_work_size // BootROM work area +} + +// +// Program layout for starting in ROM, copying data to RAM, +// and continuing to execute out of ROM. +// +SECTIONS +{ +// +// ROM SECTIONS(Remap) +// +// Place .text into fast_memory. Fail if it does not fit. + .reset ALIGN(4) : > vector_table + .EIINTTBL_ICU ALIGN(512) : > . + .qosbw_tbl ALIGN(4) : > qosbw_table + .qoswt_tbl ALIGN(4) : > qoswt_table + .rgid_size_tbl ALIGN(4) : > rgid_size_table // Logical address:0xFDE12800 + .rgid_m_tbl ALIGN(4) : > rgid_m_table // Logical address:0xFDE12C00 + .rgid_r_tbl ALIGN(4) : > rgid_r_table // Logical address:0xFDE13000 + .rgid_w_tbl ALIGN(4) : > rgid_w_table // Logical address:0xFDE15000 + .rgid_sec_tbl ALIGN(4) : > rgid_sec_table // Logical address:0xFDE17000 + .rgid_axi_tbl ALIGN(4) : > rgid_axi_table // Logical address:0xFDE19000 + .rgid_gid_tbl ALIGN(4) : > rgid_gid_table // Logical address:0xFDE19400 + .ipmmu_rgid_tbl ALIGN(4) : > ipmmu_rgid_table // Logical address:0xFDE19800 + .ipmmu_rgid_sec_tbl ALIGN(4) : > ipmmu_rgid_sec_table // Logical address:0xFDE19C00 + .ipmmu_rgid_en_tbl ALIGN(4) : > ipmmu_rgid_en_table // Logical address:0xFDE1A000 + .data ALIGN(4) : > . + .text ALIGN(4) : > ipl_rom + .RE_CR.text ALIGN(4) : > . + .rosdata ALIGN(4) : > . + .rodata ALIGN(4) : > . + .secinfo ALIGN(4) : > . + + .rom_end ALIGN(4) : > . + .canary ALIGN(4) : > bss + .bss ALIGN(4) : > . + +// ROM mirror SECTIONS(RT-SRAM) + _start = ipl_top_addr; + .ROM_NOCOPY.reset ROM_NOCOPY(.reset) ALIGN(4) : > phys_vector_table + .ROM_NOCOPY.EIINTTBL_ICU ROM_NOCOPY(.EIINTTBL_ICU) ALIGN(4) : > . + .ROM_NOCOPY.qosbw_tbl ROM_NOCOPY(.qosbw_tbl) ALIGN(4) : > phys_qosbw_table + .ROM_NOCOPY.qoswt_tbl ROM_NOCOPY(.qoswt_tbl) ALIGN(4) : > phys_qoswt_table + .ROM_NOCOPY.rgid_size_tbl ROM_NOCOPY(.rgid_size_tbl) ALIGN(4) : > phys_rgid_size_table // Physical address:0xEB212800 + .ROM_NOCOPY.rgid_m_tbl ROM_NOCOPY(.rgid_m_tbl) ALIGN(4) : > phys_rgid_m_table // Physical address:0xEB212C00 + .ROM_NOCOPY.rgid_r_tbl ROM_NOCOPY(.rgid_r_tbl) ALIGN(4) : > phys_rgid_r_table // Physical address:0xEB213000 + .ROM_NOCOPY.rgid_w_tbl ROM_NOCOPY(.rgid_w_tbl) ALIGN(4) : > phys_rgid_w_table // Physical address:0xEB215000 + .ROM_NOCOPY.rgid_sec_tbl ROM_NOCOPY(.rgid_sec_tbl) ALIGN(4) : > phys_rgid_sec_table // Physical address:0xEB217000 + .ROM_NOCOPY.rgid_axi_tbl ROM_NOCOPY(.rgid_axi_tbl) ALIGN(4) : > phys_rgid_axi_table // Physical address:0xEB219000 + .ROM_NOCOPY.rgid_gid_tbl ROM_NOCOPY(.rgid_gid_tbl) ALIGN(4) : > phys_rgid_gid_table // Physical address:0xEB219400 + .ROM_NOCOPY.ipmmu_rgid_tbl ROM_NOCOPY(.ipmmu_rgid_tbl) ALIGN(4) : > phys_ipmmu_rgid_table // Physical address:0xEB219800 + .ROM_NOCOPY.ipmmu_rgid_sec_tbl ROM_NOCOPY(.ipmmu_rgid_sec_tbl) ALIGN(4) : > phys_ipmmu_rgid_sec_table // Physical address:0xEB219C00 + .ROM_NOCOPY.ipmmu_rgid_en_tbl ROM_NOCOPY(.ipmmu_rgid_en_tbl) ALIGN(4) : > phys_ipmmu_rgid_en_table // Physical address:0xEB21A000 + .ROM_NOCOPY.data ROM_NOCOPY(.data) ALIGN(4) : > . + .ROM_NOCOPY.text ROM_NOCOPY(.text) ALIGN(4) : > phys_ipl_rom + .ROM_NOCOPY.RE_CR.text ROM_NOCOPY(.RE_CR.text) ALIGN(4) : > . + .ROM_NOCOPY.rosdata ROM_NOCOPY(.rosdata) ALIGN(4) : > . + .ROM_NOCOPY.rodata ROM_NOCOPY(.rodata) ALIGN(4) : > . + .ROM_NOCOPY.secinfo ROM_NOCOPY(.secinfo) ALIGN(4) : > . + .cr_hot_plug_magic ALIGN(16): > . // This section must be placed at the last of binary. + + + +// +// RAM SECTIONS +// + .top.local.ram : > local_ram + .sdata ALIGN(4) : > . + .tdata ALIGN(4) : > . + .sdabase ALIGN(4) : > . + .top_stack : > stack + .RT.stack ALIGN(4) PAD(stack_size) ABS : > . + .end_stack : > . + .used_by_bootrom ALIGN(4) PAD(bootrom_work_size) ABS : > bootrom_work // 0xFEDFF800 - 0xFEDFFFFF is prohibited writing + .end.local.ram : > . + + .sa9_load ALIGN(4) PAD(sa9_size) : > sa9_load +} diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader.S b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader.S rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader.S diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_common.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_common.c new file mode 100644 index 00000000..64970415 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_common.c @@ -0,0 +1,268 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader main common function + ******************************************************************************/ +/****************************************************************************** + * @file loader_main_common.c + * - Version : 0.04 + * @brief 1.Output boot message. + * 2.Judge boot mode. + * 3.Set BL31 parameter. + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 02.04.2022 0.01 First Release + * : 04.04.2023 0.02 Removed stdio.h. + * : 21.08.2023 0.03 Add support for V4M. + * : 19.09.2023 0.04 Add log output for build option LSI. + *****************************************************************************/ + +#include +#include /* NULL pointer */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RST_MODEMR0_MD5 (0x00000020U) + +/* Define for Work Around of APMU */ +#define CL0GRP3_BIT (1U << 3) +#define CL1GRP3_BIT (1U << 7) +#define RTGRP3_BIT (1U << 19) +#define APMU_ACC_ENB_FOR_ARM_CPU (CL0GRP3_BIT | CL1GRP3_BIT | RTGRP3_BIT) + +static void judge_bootmode(uint32_t lcs); + +/* global variable */ +uint32_t is_verify = SECURE_BOOT; + +static void judge_bootmode(uint32_t lcs) +{ + uint32_t md; + + /* LCS Status check */ + if((lcs != LCS_CM) + && (lcs != LCS_DM) + && (lcs != LCS_SD) + && (lcs != LCS_SE) + && (lcs != LCS_FA)) + { + ERROR("LCS state error." + "LCS = 0x%x", lcs); + panic; + } + + md = (mem_read32(RST_MODEMR0) & RST_MODEMR0_MD5) >> 5U; + if (lcs == LCS_SE) + { + /* LCS=SE => Secure boot */ + is_verify = SECURE_BOOT; + } + else if ((lcs != LCS_SD) && (md == 0U)) + { + /* LCS=CM/DM/FA and MD5=0 => Secure boot */ + is_verify = SECURE_BOOT; + } + else + { + /* LCS=SD or MD5=1 => Normal boot */ + is_verify = NORMAL_BOOT; + } + + if (NORMAL_BOOT != is_verify) + { + NOTICE("Secure boot(ICUMX)\n"); + } + else + { + NOTICE("Normal boot(ICUMX)\n"); + } +} +/* End of function judge_bootmode(uint32_t lcs) */ + +void print_boot_msg(void) +{ + uint32_t lcs = 0U; /* store LCS state */ + uint32_t lcs_size = sizeof(lcs); + uint32_t prr; + uint32_t reg; /* store register value */ + uint32_t ret; /* store return value */ + __attribute__((__unused__)) const char *str; + __attribute__((__unused__)) const char *product_s4 = "S4"; + __attribute__((__unused__)) const char *product_v4h = "V4H"; + __attribute__((__unused__)) const char *product_v4m = "V4M"; + __attribute__((__unused__)) const char *unknown = "unknown"; + __attribute__((__unused__)) const char *boot_hyper80_160= "HyperFlash"; + __attribute__((__unused__)) const char *boot_serial40 = "Serial Flash"; + __attribute__((__unused__)) const char *boot_qspi80_160 = "Octal SPI Flash"; + __attribute__((__unused__)) const char *boot_emmc50x8 = "eMMC(50MHz x8)"; + const char *lcs_name[8U] = { + [LCS_CM] = "CM", + [LCS_DM] = "DM", + [LCS_SD] = "SD", + [LCS_SE] = "SE", + [LCS_FA] = "FA", + }; + + NOTICE("ICUMX Loader Rev.%s\n", IPL_VERSION); + + NOTICE("LSI=%d (Build Option : S4=0, V4H=1, V4M=2)\n", RCAR_LSI); + + NOTICE("%s\n", build_message); + + /* Get PRR */ + prr = mem_read32(PRR); + prr &= (PRR_PRODUCT_MASK | PRR_MAJOR_MASK | PRR_MINOR_MASK); + switch (prr & PRR_PRODUCT_MASK) + { + case PRR_PRODUCT_S4: + { + str = product_s4; + break; + } + case PRR_PRODUCT_V4H: + { + str = product_v4h; + break; + } + case PRR_PRODUCT_V4M: + { + str = product_v4m; + break; + } + default: + { + str = unknown; + break; + } + } + NOTICE("PRR is R-Car %s Ver%d.%d\n", str, + ((prr & PRR_MAJOR_MASK) >> PRR_MAJOR_SHIFT) + PRR_MAJOR_OFFSET, + (prr & PRR_MINOR_MASK)); + + reg = mem_read32(RST_MODEMR0); + reg &= RST_MODEMR0_BOOT_DEV_MASK; + + switch (reg) + { + case RST_MODEMR0_BOOT_DEV_HYPERFLASH160: + case RST_MODEMR0_BOOT_DEV_HYPERFLASH80: + { + str = boot_hyper80_160; + break; + } + case RST_MODEMR0_BOOT_DEV_SERIAL_FLASH40: + case RST_MODEMR0_BOOT_DEV_SERIAL_FLASH: + { + str = boot_serial40; + break; + } + case RST_MODEMR0_BOOT_DEV_QSPI_FLASH80: + { + str = boot_qspi80_160; + break; + } + case RST_MODEMR0_BOOT_DEV_EMMC_50X8: + { + str = boot_emmc50x8; + break; + } + default: + { + str = unknown; + break; + } + } + NOTICE("Boot device is %s(0x%x)\n", str, reg); +#if (QSPI_DDR_MODE==1) + NOTICE("Change QSPI DDR Transfer mode\n"); +#endif + + /* Get LCS state */ + ret = call_ROM_GetLcs(&lcs, lcs_size); + str = unknown; + if (ret == ROMAPI_OK) + { + if (NULL != lcs_name[lcs]) + { + str = lcs_name[lcs]; + } + } + NOTICE("LCM state is %s\n", str); + + /* If PRR is S4 Ver.1.0 */ + if ((PRR_PRODUCT_S4 == (prr & PRR_PRODUCT_MASK)) && (0U == (prr & PRR_CUT_MASK))) + { + set_sicremap_s4v10(); /* downgrade SICREMAP setting. */ + is_verify = NORMAL_BOOT;/* S4 Ver.1.0 is Normal Boot only. */ + } + else + { + /* LCS judgement for secure boot */ + judge_bootmode(lcs); + } + +#if (SET_FCPR_PARAM == FCPR_ENABLE) + NOTICE("Data Compression Enable\n"); + NOTICE("Start address = 0x%08x End address = 0x%08x\n", COMPRESSION_START_ADDR, COMPRESSION_END_ADDR); +#endif + +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) + NOTICE("Access protection Enable\n"); +#endif +} +/* End of function print_boot_msg(void) */ + +/* Work Around setting for APMU */ +void wa_setting_apmu(void) +{ + uint32_t apmu_tmp; + + /* Work Around setting for D0_ACCENR-DOMAIN3_ACCENR */ + apmu_tmp = mem_read32(APMU_D0_ACCENR); + apmu_tmp |= APMU_ACC_ENB_FOR_ARM_CPU; + apmu_reg_write(APMU_D0_ACCENR, apmu_tmp); + + apmu_tmp = mem_read32(APMU_D1_ACCENR); + apmu_tmp |= APMU_ACC_ENB_FOR_ARM_CPU; + apmu_reg_write(APMU_D1_ACCENR, apmu_tmp); + + apmu_tmp = mem_read32(APMU_D2_ACCENR); + apmu_tmp |= APMU_ACC_ENB_FOR_ARM_CPU; + apmu_reg_write(APMU_D2_ACCENR, apmu_tmp); + + apmu_tmp = mem_read32(APMU_D3_ACCENR); + apmu_tmp |= APMU_ACC_ENB_FOR_ARM_CPU; + apmu_reg_write(APMU_D3_ACCENR, apmu_tmp); +} +/* End of function wa_setting_apmu(void) */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_s4.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_s4.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_s4.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_v4h.c new file mode 100644 index 00000000..542156f3 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_v4h.c @@ -0,0 +1,471 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader main function for V4H + ******************************************************************************/ +/****************************************************************************** + * @file loader_main.c + * - Version : 0.14 + * @brief 1. IP initialization. + * 2. DMA transfer the binary image from Flash to RAM. + * 3. Authentication of the transferred image. + * 4. Boot CR and CA core. + * 5. Release of used resources. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Modify macro definition name. + * Add process to call rpc_release function. + * : 30.09.2021 0.03 Support of eMMC boot. + * : (30.11.2021 0.04) Support boot sequence of V4H. + * : 03.12.2021 0.05 Add RT-VRAM extend mode. + * : 23.05.2022 0.06 Integration of S4 and V4H + * Renamed from loader_main.c to loader_main_v4h.c. + * : 05.08.2022 0.07 Add authentication of software minimum + * version table. + * : 30.09.2022 0.08 Modify authentication process of software + * minimum version. + * : 20.01.2023 0.09 Add W/A OTLINT-5556: increased latency + * : 17.04.2023 0.10 Add setting for V4H v2.x leak current reduce + * Removed stdio.h. + * Add certificate authentication functions to be + * execute before image transfer. + * : 15.05.2023 0.11 Change the jump address of secure firmware from + * on SIC remap area to CF remap area. + * : 13.06.2024 0.12 Updated ECM register setting in wa_for_v4h2 + * function. + * : 27.12.2024 0.13 Change the location of ECC and EDC + * initialization function. + * : 07.04.2025 0.14 Added ecm_init_setting function calling. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "rcar_def.h" +#include "../ip/ddr/v4h/lpddr5/ecm_enable_v4h.h" + +/* Provided code */ +#include "../ip/ddr/boot_init_dram.h" +#include "../ip/ddr/v4h/lpddr5/ecc_enable_v4h.h" +#include +#include +#include + +/* Time analysis */ +#include +#include +#include + +#define ICISTP_BASE (BASE_ICISTP_ADDR) +#define ICISTPSTPER000 (ICISTP_BASE + 0x30300U) + +#define EDC_BASE (BASE_ECM_ADDR) +#define EDCSTRT20 (EDC_BASE + 0x80C0U) +#define TIDSTRT20 (EDC_BASE + 0x81C0U) + +/* SYSC register */ +#define SYSC_BASE (BASE_SYSC_ADDR) +#define SYSC_SYSCSR (SYSC_BASE + 0x0000U) /* SYSC Status Register */ +#define SYSC_SYSCISCR1 (SYSC_BASE + 0x0814U) /* Interrupt Status/Clear Register1 */ +#define SYSC_SYSCIER1 (SYSC_BASE + 0x0824U) /* Interrupt Enable Register1 */ +#define SYSC_SYSCIMR1 (SYSC_BASE + 0x0834U) /* Interrupt MASK Register1 */ + +/* Power Domain Register */ +#define SYSC_PDR41 (0x0A40U) /* A1CNN0 */ +#define SYSC_PDR42 (0x0A80U) /* A2CN0 */ +#define SYSC_PDR43 (0x0AC0U) /* A3IR */ +#define SYSC_PDRSR (SYSC_BASE + 0x1000U) /* Base address of Power Domain Status Register */ +#define SYSC_PDRSR41 (SYSC_PDRSR + (SYSC_PDR41)) +#define SYSC_PDRSR42 (SYSC_PDRSR + (SYSC_PDR42)) +#define SYSC_PDRSR43 (SYSC_PDRSR + (SYSC_PDR43)) +#define SYSC_PDRONCR (SYSC_BASE + 0x1004U) /* Base address of Power Domain Power-ON Control Register */ +#define SYSC_PDRONCR41 (SYSC_PDRONCR + (SYSC_PDR41)) +#define SYSC_PDRONCR42 (SYSC_PDRONCR + (SYSC_PDR42)) +#define SYSC_PDRONCR43 (SYSC_PDRONCR + (SYSC_PDR43)) + +#define PDR_MAX (3U) /* Number of PDR's to be set */ +#define SYSC_BIT_PDR41 (0x00000200U) /* SYSC register target PDR41 bit */ +#define SYSC_BIT_PDR42 (0x00000400U) /* SYSC register target PDR42 bit */ +#define SYSC_BIT_PDR43 (0x00000800U) /* SYSC register target PDR43 bit */ + +#define SYSCSR_BUSY_MASK (0x00000003U) /* SYSC Power On or Power Off seaquence status */ +#define SYSCSR_NOT_BUSY (0x00000003U) /* Not processing */ + +#define SYSC_PDRSR_PWR_MASK (0x00001111U) /* PDR Power On / Off Status MASK */ +#define SYSC_PDRSR_PWROFF (0x00000001U) /* PDR Power OFF Status */ +#define SYSC_PDRONCR_PWRON (0x00000001U) /* PDR Power On request */ +#define SYSC_PDR_PWR_PROC (0x00000000U) /* PDR Power On or Poweer off processing */ + +#define RGID_SET_RGID_FIN_FLG_ADDR (0xFD95EFFCU) /* 0xE635EFFC:Remap 12 */ +#define RGID_SET_RGID_FIN_FLG_VAL (0x64U) + + +#if (ADD_HOTPLUG_MAGIC == ADD_MAGIC_NUMBER) +#define HOTPLUG_MAGIC_NUM (0x853F912EU) +#else +#define HOTPLUG_MAGIC_NUM (0x00000000U) +#endif +__attribute__ ((section (".cr_hot_plug_magic"))) const uint32_t magic_num[4] = {0x00000000U, 0x00000000U, + 0x00000000U, HOTPLUG_MAGIC_NUM}; + +/* Prototype functions */ +#include +static void wa_for_v4h2(void); +static void set_leak_current_reduce_for_v4h2x(void); + +uint32_t loader_main(void) +{ + uint32_t boot_ca_id; + uint32_t auth_count = 0U; + uint32_t boot_cpu; + uint32_t tmp; + __attribute__((__unused__)) uint32_t loop = 0U; + __attribute__((__unused__)) uint32_t ca_load_num; /* number of load for Optional CA program */ + LOAD_INFO li[MAX_PLACED] = {0U}; + +#if (1 == (MEASURE_TIME)) +#warning "MEASURE_TIME is enabled" + scmt_module_start(); + store_time_checkpoint("loader_main", 0); +#endif +#if (SAN_ENABLE == 1) + /* Appendix A Sequence of Activation + step (5) Stop RWDT and System WDT */ + rwdt_init(0); + swdt_init(0); +#endif +/***************************************************************************** + * Initialize Hardware + *****************************************************************************/ + /* IP initialize, step(6) of Sequence of Activation? */ + ip_init(); + +#if (ECM_ERROR_ENABLE == 1) + ecm_init_setting(); +#endif /* ECM_ERROR_ENABLE == 1 */ +#if (SAN_ENABLE == 1) + fusa_init_external_pins(); +#endif +/***************************************************************************** + * Work Around for APMU + *****************************************************************************/ + wa_setting_apmu(); + +/***************************************************************************** + * Output boot message + *****************************************************************************/ + print_boot_msg(); +/***************************************************************************** + * WA for V4H ver2.0 + *****************************************************************************/ + uint32_t Prr_Cut; + Prr_Cut = mem_read32(PRR) & PRR_CUT_MASK; + + if (Prr_Cut >= PRR_PRODUCT_20) + { + /* IPL setting for V4H v2.x leak current reduce */ + set_leak_current_reduce_for_v4h2x(); + + wa_for_v4h2(); + } + + /* WA OTLINT-5556 increased latency: APMU FRSTCTRL bit[29] disable */ + tmp = mem_read32(BASE_APMU_ADDR + 0x68U); + tmp = tmp & ~(1 << 29); + mem_write32((BASE_APMU_ADDR + 0x68U), tmp); + +#if (ECM_ENABLE == 1) +/***************************************************************************** + * ECC and EDC Initialize + *****************************************************************************/ + edc_axi_enable(); + edc_vram_enable(); +#endif + +#if (SAN_ENABLE == 1) + /* step(7) Initial Checks */ + fusa_run_soc_activation_tests(); + /* step(8) start the timers for Periodical checks */ +#endif +/***************************************************************************** + * Setting Access protection + *****************************************************************************/ + /* Region ID access protection */ + rgid_protection(); + ram_protection(); + + /* Change the Region ID (Master) of the Module used for data transfer to a temporary setting. */ + set_master_rgid_4_tfr_mod(); + +/***************************************************************************** + * Clear ECM Status Bits + *****************************************************************************/ + /* Check the V4H is v1.0 */ + if(Prr_Cut == PRR_PRODUCT_10) + { + clear_ecm_st_axi(); + } + store_time_checkpoint("init_done", 0); + +/***************************************************************************** + * Load Certficate from QSPI + *****************************************************************************/ + int slot; + + slot = ab_select_slot(); +#ifndef STRICT_AB_BOOTING +#warning "STRICT_AB_BOOTING is not defined, using default slot selection" + if (slot < 0) { + ERROR("Failed to select slot: %d, using default slot\n", slot); + slot = 0; + } else +#endif + NOTICE("slot: %d\n", slot); + + /* Load content certificate */ + ca_load_num = load_content_cert(slot); + store_time_checkpoint("load_cert_done", + CONTENT_CERT_INFO_SIZE + ca_load_num*CONTENT_CERT_SIZE); + + /* Get load information */ + load_init(li, slot); + + /* verify the each content certs before Image load */ + preload_verify_cntcert(li); + +/***************************************************************************** + * Authenticate Software minimum version table + *****************************************************************************/ + auth_min_ver_tbl(li); + store_time_checkpoint("verify_cert_done", 0); + +/***************************************************************************** + * Load Cx IPL from Flash + *****************************************************************************/ + /* Start loading Cx IPL image from Flash into SDRAM */ + load_image(&li[CA_PROGRAM_ID]); + + /* The CA image to boot is CA IPL. */ + boot_ca_id = CA_PROGRAM_ID; + + /* boot CPU is CR */ + boot_cpu = RCAR_PWR_TARGET_CR; + + /* finish loading Cx IPL */ + load_end(); + store_time_checkpoint("load_Cx_IPL_done", li[CA_PROGRAM_ID].image_size); + gpio_N1305(2); + + /* Set V4H_SDRDES_1V8(GP1_23) to high before optee start */ + gpio_V4H_SERDES_1V8_en(1); + +/***************************************************************************** + * Load Secure Firmware from Flash + *****************************************************************************/ + /* Start loading Secure FW image from Flash into SDRAM */ + load_image(&li[SECURE_FW_ID]); + store_time_checkpoint("load_Secure_FW_start (DMA-background)", li[SECURE_FW_ID].image_size); + + /* Authenticate of CA Program#n */ + rom_secureboot(&li[boot_ca_id + auth_count]); + store_time_checkpoint("verify_Cx_IPL_done", 0); + + /* SystemRAM has an undefined initial value, clear the address of + * the SystemRAM that is going to store set finish flag of RGID. */ + mem_write8(RGID_SET_RGID_FIN_FLG_ADDR, 0xFFU); + + /* Before Boot CPU, Set the division ratio for CPU operating frequency */ + adj_cr_variant_freq(); + + /* boot CA */ + arm_cpu_on(boot_cpu, li[boot_ca_id].boot_addr); + store_time_checkpoint("start_Cx_IPL_done", 0); + + /* finish loading Secure Firmware */ + load_end(); + store_time_checkpoint("load_Secure_FW_done", 0); + + /* load_secure data(for ICUMXB) */ + load_securedata(SECURE_FW_ID); + store_time_checkpoint("load_Secure_Data_start (DMA-background)", SECUREDATA_SIZE); + + /* Authenticate of Secure Firmware */ + rom_secureboot(&li[SECURE_FW_ID]); + store_time_checkpoint("verify_Secure_FW_done", 0); + + /* finish loading secure data */ + load_end(); + store_time_checkpoint("load_Secure_Data_done", 0); + gpio_N1305(2); + + /* Finally Protection setting */ + rgid_protection_final(); + + /* set RGID setting finish flag. + * because polling from CX 2nd IPL. */ + mem_write8(RGID_SET_RGID_FIN_FLG_ADDR, RGID_SET_RGID_FIN_FLG_VAL); + +// #if (ECM_ENABLE == 1) +// /* Notice the ecc enable */ +// NOTICE("Enabled EDC for AXI-Bus, RT-VRAM. \n"); +// #endif +// /* step(9) send the first WDT message */ +// PMIC_SM_12_wdt(); +// NOTICE("Load finish.\n"); +// ip_release(); + + store_time_checkpoint("done (Jumping to [SECURE_FW_ID].boot_addr)", 0); + print_time_checkpoints(); + return get_cfremap_addr(li[SECURE_FW_ID].boot_addr); +} +/* End of function loader_main(void) */ + +void clear_ecm_st_axi(void) +{ + mem_write32(ICISTPSTPER000,0x30U); + mem_write32(EDCSTRT20, 0x10U); + mem_write32(TIDSTRT20, 0x12U); +}/* End of function clear_ecm_st_axi(void) */ + +static void wa_for_v4h2(void) +{ + uint32_t tmp; + + /* 1. Release of pseudo power shutdown */ + /* Process moved to function set_leak_current_reduce_for_v4h2x(). */ + + /* 2. Reset ON for A2CN0 and Reset OFF for A2CN0 */ + tmp = mem_read32(BASE_CPG_ADDR + 0x2C00U); /* Software Reset Register 0 (SRCR0) */ + tmp = tmp | (0x1U << 23U); + mem_write32(CPG_CPGWPR, ~tmp); + mem_write32((BASE_CPG_ADDR + 0x2C00U),tmp); + + tmp = mem_read32(BASE_CPG_ADDR + 0x2C80U); /* Software Reset Clearing Register 0 (SRSTCLR0) */ + tmp = tmp | (0x1U << 23U); + mem_write32(CPG_CPGWPR, ~tmp); + mem_write32((BASE_CPG_ADDR + 0x2C80U),tmp); + + /* Unlock the ECM register protect. */ + mem_write32(ECMWPCNTR, 0xACCE0001); + + /* 3. ECM Enable */ + tmp = mem_read32(BASE_ECM_ADDR + 0x50018U); /* ECM Error Control Register 6 (ECMERRCTLR6) */ + tmp = tmp | (0xfU << 24U); + mem_write32((BASE_ECM_ADDR + 0x50018U),tmp); + + /* Lock the ECM register protect. */ + mem_write32(ECMWPCNTR, 0xACCE0000U); +}/* End of function wa_for_v4h2(void) */ + +static void set_leak_current_reduce_for_v4h2x(void) +{ + uint32_t reg; + const uint32_t pdrsr_tbl[PDR_MAX] = { /* SYSC PDRSR register table */ + SYSC_PDRSR43, /* A3IR */ + SYSC_PDRSR42, /* A2CN0 */ + SYSC_PDRSR41 /* A1CNN0 */ + }; + const uint32_t pdroncr_tbl[PDR_MAX] = { /* SYSC PDRONCR register table */ + SYSC_PDRONCR43, /* A3IR */ + SYSC_PDRONCR42, /* A2CN0 */ + SYSC_PDRONCR41 /* A1CNN0 */ + }; + + /* Power ON / OFF process complete interrupt enable for PDR41-PDR43 */ + reg = mem_read32(SYSC_SYSCIER1); + reg |= (SYSC_BIT_PDR41 | SYSC_BIT_PDR42 | SYSC_BIT_PDR43); + mem_write32(SYSC_SYSCIER1, reg); + INFO("SYSCIER1(0x%08x) = %08x\n",SYSC_SYSCIER1,mem_read32(SYSC_SYSCIER1)); + + /* MASK complete interrupt request to INTC for PDR41-PDR43 */ + reg = mem_read32(SYSC_SYSCIMR1); + reg |= (SYSC_BIT_PDR41 | SYSC_BIT_PDR42 | SYSC_BIT_PDR43); + mem_write32(SYSC_SYSCIMR1, reg); + INFO("SYSCIMR1(0x%08x) = %08x\n",SYSC_SYSCIMR1,mem_read32(SYSC_SYSCIMR1)); + + for(uint32_t loop = 0U; loop < PDR_MAX; loop++) + { + /* Check PDRn Power on state */ + reg = mem_read32(pdrsr_tbl[loop]); + INFO("PDRSR(0x%08x) = %08x\n",pdrsr_tbl[loop],reg); + reg &= SYSC_PDRSR_PWR_MASK; + /* Only when the Power state of PDRn is OFF, the Power On Request is processed */ + if((reg == SYSC_PDRSR_PWROFF) == true) + { + /* Wait until SYSC is in Not busy status */ + do{ + /* Get SYSC processing Power ON / OFF status */ + reg = mem_read32(SYSC_SYSCSR); + INFO("SYSCSR(0x%08x) = %08x\n", SYSC_SYSCSR, reg); + reg &= SYSCSR_BUSY_MASK; + } while((reg == SYSCSR_NOT_BUSY) != true); + + /* PDRn Power ON request */ + mem_write32(pdroncr_tbl[loop], SYSC_PDRONCR_PWRON); + INFO("PDRONCRn(0x%08x) = %08x\n",pdroncr_tbl[loop],mem_read32(pdroncr_tbl[loop])); + + /* Power ON process complete interrupt status for PDR41-PDR43 */ + do{ + reg = mem_read32(SYSC_SYSCISCR1); + INFO("SYSCISCR1(0x%08x) = %08x\n", SYSC_SYSCISCR1, reg); + reg &= (SYSC_BIT_PDR43 >> loop); /* loop = 0:PDR43 1:PDR42 2:PDR41 */ + } while((reg !=SYSC_PDR_PWR_PROC) != true); + + /* Clear Power ON process complete interrupt status for PDR41-PDR43 */ + mem_write32(SYSC_SYSCISCR1, reg); + INFO("SYSCISCR1(0x%08x) = %08x\n",SYSC_SYSCISCR1,mem_read32(SYSC_SYSCISCR1)); + } + } + + /* Power ON / OFF process complete interrupt disable for PDR41-PDR43 */ + reg = mem_read32(SYSC_SYSCIER1); + reg &= ~(SYSC_BIT_PDR41 | SYSC_BIT_PDR42 | SYSC_BIT_PDR43); + mem_write32(SYSC_SYSCIER1, reg); + INFO("SYSCIER1(0x%08x) = %08x\n",SYSC_SYSCIER1,mem_read32(SYSC_SYSCIER1)); + + /* MASK complete interrupt request to INTC for PDR41-PDR43 */ + reg = mem_read32(SYSC_SYSCIMR1); + reg &= ~(SYSC_BIT_PDR41 | SYSC_BIT_PDR42 | SYSC_BIT_PDR43); + mem_write32(SYSC_SYSCIMR1, reg); + INFO("SYSCIMR1(0x%08x) = %08x\n",SYSC_SYSCIMR1,mem_read32(SYSC_SYSCIMR1)); +} diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_v4m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/loader/loader_main_v4m.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/codesram_ecc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/codesram_ecc.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/codesram_ecc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/codesram_ecc.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/cpu_on_for_mcu.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/cpu_on_for_mcu.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/cpu_on_for_mcu.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/cpu_on_for_mcu.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/image_load_for_mcu.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/image_load_for_mcu.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/image_load_for_mcu.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/image_load_for_mcu.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/loader_main_mcu.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/loader_main_mcu.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/loader_main_mcu.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/loader_main_mcu.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/sdmac.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/sdmac.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/sdmac.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/sdmac.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac_register.h b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/sdmac_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mcu/sdmac_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mk.linux.sh b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mk.linux.sh new file mode 100644 index 00000000..ee754b12 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mk.linux.sh @@ -0,0 +1,55 @@ +#!/bin/bash +export LANG=C + +_no_clean=0 +_build_param="" +_default_b="LSI=V4H" +_echo="@" +if [ -f env.ini ]; then + . env.ini +fi + +while getopts "cl:vp:h" opt; do + case $opt in + c) _no_clean=1 + ;; + l) _build_param="${_build_param} LOG_LEVEL=$OPTARG" + ;; + v) _echo="" + ;; + p) if [ "x$OPTARG" = "x0" ]; then + _build_param="${_build_param} MEASURE_TIME=1 MEASURE_TIME_NOPRINT=1" + elif [ "x$OPTARG" = "x1" ]; then + _build_param="${_build_param} MEASURE_TIME=1" + fi + ;; + h) + echo "usage: $0 [option]" + echo " -l set loglevel (default: 1)" + echo " -p enable MEASURE_TIME (0: NO PRINT, 1: PRINT)" + echo "" + echo " -c do not clean before build" + echo " -v build verbosely" + echo "" + echo "BUILD_PARAM: BOOT_GPIO, STRICT_AB_BOOT, WDT_RESET" + exit 0 + esac +done +shift $((OPTIND-1)) + +if [ $_no_clean -ne 1 ]; then + make clean + make CC=echo AS=echo LD=echo OC=echo OD=echo >& /dev/null +fi +BUILD_PARAM="${BUILD_PARAM} ${_default_b} ${_build_param} V=$_echo" + +_uuid=`uuidgen` +_obj_bat=/run/lock/${_uuid}.bat + GHS_PATH=`winepath -w $(readlink -f ../comp_202015)` + echo "@path %path%;${GHS_PATH}" > ${_obj_bat} + echo "@set GHS_LMHOST=@10.230.22.82" >> ${_obj_bat} + echo "@set GHS_LMWHICH=ghs" >> ${_obj_bat} + echo "make -f dos.mk ${BUILD_PARAM} $*" >> ${_obj_bat} + echo 'set /p "_wait=WAIT..."' >> ${_obj_bat} +wineconsole z\:\\run\\lock\\${_uuid}.bat +rm ${_obj_bat} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mk.win.sh b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mk.win.sh new file mode 100644 index 00000000..6b293ee9 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/mk.win.sh @@ -0,0 +1,48 @@ +#!/bin/bash +export LANG=C + +_no_clean=0 +_build_param="" +_default_b="LSI=V4H" +_echo="@" +if [ -f env.ini ]; then + . env.ini +fi + +while getopts "cl:vp:h" opt; do + case $opt in + c) _no_clean=1 + ;; + l) _build_param="${_build_param} LOG_LEVEL=$OPTARG" + ;; + v) _echo="" + ;; + p) if [ "x$OPTARG" = "x0" ]; then + _build_param="${_build_param} MEASURE_TIME=1 MEASURE_TIME_NOPRINT=1" + elif [ "x$OPTARG" = "x1" ]; then + _build_param="${_build_param} MEASURE_TIME=1" + fi + ;; + h) + echo "usage: $0 [option]" + echo " -l set loglevel (default: 1)" + echo " -p enable MEASURE_TIME (0: NO PRINT, 1: PRINT)" + echo "" + echo " -c do not clean before build" + echo " -v build verbosely" + echo "" + echo "BUILD_PARAM: BOOT_GPIO, STRICT_AB_BOOT, WDT_RESET" + exit 0 + esac +done +shift $((OPTIND-1)) + +if [ $_no_clean -ne 1 ]; then + make clean + make CC=echo AS=echo LD=echo OC=echo OD=echo >& /dev/null +fi +BUILD_PARAM="${BUILD_PARAM} ${_default_b} ${_build_param} V=$_echo" + +make -f dos.mk ${BUILD_PARAM} "$@" + + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/ram_protection.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/protect/ram_protection.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/ram_protection.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/protect/ram_protection.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/protect/region_id.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/protect/region_id.c new file mode 100644 index 00000000..75420a62 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/protect/region_id.c @@ -0,0 +1,589 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Region ID protection function + ******************************************************************************/ + /****************************************************************************** + * @file region_id.c + * - Version : 0.09 + * @brief Each module to R/W access protection by Region ID. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 03.03.2022 0.01 First Release + * : 23.05.2022 0.02 Modify remap address + * : 21.10.2022 0.03 Supported for V4H + * : 23.01.2023 0.04 Remove pre-process branch for S4N. + * Added a process for judgement the number of + * Clusters to the rgid_gid_setting function. + * Changed to temporarily sweeten the protection + * setting only when the IPL is running. + * : 21.08.2023 0.05 Add support for V4M. + * : 13.11.2023 0.06 Changed to use CCI MPU GID register setting + * table in rgid_gid_setting function. + * : 13.09.2024 0.07 Change setting order of Region ID. + * (Swap Write and Secure.) + * : 06.01.2025 0.08 Added IMP Region ID setting process. + * Added Domain protection setting process. + * Added IPMMU Region ID setting process. + * : 03.09.2025 0.09 Added remap function when Region ID + * setting process. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Unregistered base address of Region ID in SIC Remap. */ +#if (RCAR_LSI == RCAR_S4) +#define RGID_SICREMAP_NUM (1U) +#define RGID_BASE1 (0xFF800000U) + +#define GID_SETTING_VALUE (0x0002BFC4U) +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define RGID_SICREMAP_NUM (5U) +#define RGID_BASE1 (0xFD800000U) +#define RGID_BASE2 (0xE7A00000U) +#define RGID_BASE3 (0xEB800000U) +#define RGID_BASE4 (0xFE600000U) +#define RGID_BASE5 (0xFF800000U) +/* For IPMMU Region ID setting */ +#define RGID_IPMMU_SICREMAP_NUM (3U) +#define RGID_IPMMU_BASE1 (0xEE400000U) +#define RGID_IPMMU_BASE2 (0xEEC00000U) +#define RGID_IPMMU_BASE3 (0xEEE00000U) +#endif + +#define RGID_M_SDHI (38U) + +#define RGIDMEN_RTDM_BASE (0xFD441800U) /* 0xFFC41800:Remap 10 */ +#define RGIDMEN_SYDM_BASE (0xFCB51800U) /* 0xE7751800:Remap 5 */ +#define RGIDMEN_RGIDEN_MASK (0x0000FFFFU) + +#define GID_BASE (0xF12F0000U) + +#if (RCAR_LSI == RCAR_V4H) +#define IMP_IMPSLV_PRESET (0xFF902000U) /* PRESET Register (IMPSLV) */ +#define IMPSLV_PRESET_INIT_SET_VAL (0x0000000AU) /* Initial set value */ +#define IMP_SPMI_PRESET (0xFFA8E000U) /* PRESET Register (SPMI) */ +#define SPMI_PRESET_INIT_SET_VAL (0x0000000AU) /* Initial set value */ +#define IMP_SPMI_MBCTRL120 (0xFFA8C868U) /* Master Bus ConTRoL120 (SPMI) */ +#define SPMI_MBCTRL120_INIT_SET_VAL (0x00030000U) /* Initial set value */ +#define IMP_SPMI_MBCTRL130 (0xFFA8D028U) /* Master Bus ConTRoL130 (SPMI) */ +#define SPMI_MBCTRL130_INIT_SET_VAL (0x00030000U) /* Initial set value */ +#define IMP_SPMC_PRESET (0xFFAB2000U) /* PRESET Register (SPMC) */ +#define SPMC_PRESET_INIT_SET_VAL (0x00000009U) /* Initial set value */ +#endif /* (RCAR_LSI == RCAR_V4H) */ + +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) +static void rgid_rtdma_master_setting(void); +static void rgid_sysdma_master_setting(void); +static uint32_t get_rgidmen_rtdm_addr(uint32_t module, uint32_t ch); +static uint32_t get_rgidmen_sydm_addr(uint32_t module, uint32_t ch); +static void rgid_gid_setting(void); +#if (RCAR_SA9_TYPE == FLASH_BOOT) +static void set_rgid_rtdma_master(uint32_t module, uint32_t ch, uint32_t rgid); +#else /* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ +static void set_rgid_master(uint32_t id, uint32_t val); +#endif /* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ +static void rgid_register_protection(void); +static void domain_protection_setting(void); +#endif /* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ + +void rgid_protection(void) +{ +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) + uint32_t loop; + + REMAP_TABLE rgid_remap_tbl[RGID_SICREMAP_NUM] = { + {RGID_BASE1, 0U}, +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + {RGID_BASE2, 0U}, + {RGID_BASE3, 0U}, + {RGID_BASE4, 0U}, /* Since 0xFE600000 is an access prohibited area, remapping is required. */ + {RGID_BASE5, 0U}, /* Since 0xFF800000 is an access prohibited area, remapping is required. */ +#endif +}; + + REMAP_TABLE ipmmu_rgid_remap_tbl[RGID_IPMMU_SICREMAP_NUM] = { + {RGID_IPMMU_BASE1, 0U}, + {RGID_IPMMU_BASE2, 0U}, + {RGID_IPMMU_BASE3, 0U}, + }; + + /* Set domain protection registers */ + domain_protection_setting(); + + /* Set RGID of DMA (Master) */ + rgid_rtdma_master_setting(); + rgid_sysdma_master_setting(); + + /* Set RGID of GID */ + rgid_gid_setting(); + + /* Register of IPMMU Region ID Base */ + for (loop = 0U; loop < RGID_IPMMU_SICREMAP_NUM; loop++) + { + remap_register(ipmmu_rgid_remap_tbl[loop].base_addr, &ipmmu_rgid_remap_tbl[loop].rmp_addr); + } + + /* IPMMU Region ID setting */ + for(loop = 0U; loop < IPMMU_RGID_MAX; loop++) + { + /* Set access protection setting value of IPMMU */ + mem_write32(remap_get_remap_addr(g_ipmmu_rgid_tbl[loop].addr), g_ipmmu_rgid_tbl[loop].value); + + INFO("IMRGID_IPMMU[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_ipmmu_rgid_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_ipmmu_rgid_tbl[loop].addr)), g_ipmmu_rgid_tbl[loop].value); + } + + for(loop = 0U; loop < IPMMU_RGID_MAX; loop++) + { + /* Set access protection setting value of IPMMU Secure */ + mem_write32(remap_get_remap_addr(g_ipmmu_rgid_sec_tbl[loop].addr), g_ipmmu_rgid_sec_tbl[loop].value); + + INFO("IMSECGRP_IPMMU[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_ipmmu_rgid_sec_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_ipmmu_rgid_sec_tbl[loop].addr)), g_ipmmu_rgid_sec_tbl[loop].value); + } + + for(loop = 0U; loop < IPMMU_RGID_MAX; loop++) + { + /* Set access protection setting value of IPMMU Region ID Enable */ + mem_write32(remap_get_remap_addr(g_ipmmu_rgid_en_tbl[loop].addr), g_ipmmu_rgid_en_tbl[loop].value); + + INFO("IMRGIDEN_IPMMU[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_ipmmu_rgid_en_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_ipmmu_rgid_en_tbl[loop].addr)), g_ipmmu_rgid_en_tbl[loop].value); + } + + /* Unregister of IPMMU Region ID Base */ + for (loop = 0U; loop < RGID_IPMMU_SICREMAP_NUM; loop++) + { + remap_unregister(ipmmu_rgid_remap_tbl[loop].rmp_addr); + } + + /* Register of Region ID Base */ + for (loop = 0U; loop < RGID_SICREMAP_NUM; loop++) + { + remap_register(rgid_remap_tbl[loop].base_addr, &rgid_remap_tbl[loop].rmp_addr); + } + +#if (RCAR_LSI == RCAR_V4H) + /* For the IMP Region ID setting flow, see "Table U34.3" in */ + /* "R-Car Series, V4H Series User's Manual". */ + /* Following setting is described as step7 in "Table U34.3". */ + mem_write32(IMP_IMPSLV_PRESET, IMPSLV_PRESET_INIT_SET_VAL); + mem_write32(IMP_SPMI_PRESET, SPMI_PRESET_INIT_SET_VAL); + mem_write32(IMP_SPMI_MBCTRL120, SPMI_MBCTRL120_INIT_SET_VAL); + mem_write32(IMP_SPMI_MBCTRL130, SPMI_MBCTRL130_INIT_SET_VAL); + mem_write32(IMP_SPMC_PRESET, SPMC_PRESET_INIT_SET_VAL); + + /* IMP Region ID setting */ + for(loop = 0U; loop < IMP_MASTER_MAX; loop++) + { + /* Set access protection setting value of IMP (Master) */ + mem_write32(g_imp_rgid_m_tbl[loop].addr, g_imp_rgid_m_tbl[loop].value); + + INFO("IMP_Master[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_imp_rgid_m_tbl[loop].addr, mem_read32(g_imp_rgid_m_tbl[loop].addr), g_imp_rgid_m_tbl[loop].value); + } + + for(loop = 0U; loop < IMP_SLAVE_MAX; loop++) + { + /* Set access protection setting value of IMP (Slave) */ + mem_write32(g_imp_rgid_s_tbl[loop].addr, g_imp_rgid_s_tbl[loop].value); + + INFO("IMP_Slave[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_imp_rgid_s_tbl[loop].addr, mem_read32(g_imp_rgid_s_tbl[loop].addr), g_imp_rgid_s_tbl[loop].value); + } +#endif /* (RCAR_LSI == RCAR_V4H) */ + + for(loop = 0U; loop < RGID_M_MAX; loop++) + { + /* Set access protection setting value of Region ID (Master) */ + mem_write32(remap_get_remap_addr(g_rgid_m_tbl[loop].addr), g_rgid_m_tbl[loop].value); + + INFO("RGIDM[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_rgid_m_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_rgid_m_tbl[loop].addr)), g_rgid_m_tbl[loop].value); + } + + for(loop = 0U; loop < RGID_R_MAX; loop++) + { + /* Set access protection setting value of Region ID (READ) */ + mem_write32(remap_get_remap_addr(g_rgid_r_tbl[loop].addr), g_rgid_r_tbl[loop].value); /* Read */ + + INFO("RGIDR[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_rgid_r_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_rgid_r_tbl[loop].addr)), g_rgid_r_tbl[loop].value); + } + + wdt_restart(); + + for(loop = 0U; loop < RGID_SEC_MAX; loop++) + { + /* Set access protection setting value of Region ID (Secure) */ + mem_write32(remap_get_remap_addr(g_rgid_sec_tbl[loop].addr), g_rgid_sec_tbl[loop].value); /* Secure */ + + INFO("SEC_MODID[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_rgid_sec_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_rgid_sec_tbl[loop].addr)), g_rgid_sec_tbl[loop].value); + } + + wdt_restart(); + + for(loop = 0U; loop < RGID_W_MAX; loop++) + { + /* Set access protection setting value of Region ID (Write) */ + mem_write32(remap_get_remap_addr(g_rgid_w_tbl[loop].addr), g_rgid_w_tbl[loop].value); /* Write */ + + INFO("RGIDW[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_rgid_w_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_rgid_w_tbl[loop].addr)), g_rgid_w_tbl[loop].value); + } + + wdt_restart(); + + /* Unregister of Region ID Base */ + for (loop = 0U; loop < RGID_SICREMAP_NUM; loop++) + { + remap_unregister(rgid_remap_tbl[loop].rmp_addr); + } +#endif /* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ +} +/* End of function rgid_protection(void) */ + +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) +static void rgid_rtdma_master_setting(void) +{ + uint32_t addr; + uint32_t val; + + /* Region ID(Master) RT-DMAC set:Region ID (i = 0-3(S4/V4H) 0-1(V4M), j = 0-15) */ + for(uint32_t module = 0U; module < RTDMA_MODULE_MAX; module++) { + for(uint32_t ch = 0U; ch < RTDMA_CH_MAX; ch++) { + addr = get_rgidmen_rtdm_addr(module, ch); + val = mem_read32(addr); + val &= ~(RGIDMEN_RGIDEN_MASK); + val |= g_rgid_rtdma_setting_value[module][ch][0U]; + mem_write32(addr, val); + + INFO("RGIDMEN_RTDM[%d]_CH[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", module, ch, addr, mem_read32(addr), val); + + addr = dma_get_rtdma_regionid_addr(module, ch); + val = mem_read32(addr); + val &= ~(DMA_REGIONID_MASK); + val |= g_rgid_rtdma_setting_value[module][ch][1U]; + mem_write32(addr, val); + + INFO("RDMREGIONID_[%d]_CH[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", module, ch, addr, mem_read32(addr), val); + } + } +} +/* End of function rgid_rtdma_master_setting(void) */ + +static uint32_t get_rgidmen_rtdm_addr(uint32_t module, uint32_t ch) +{ + return (RGIDMEN_RTDM_BASE + (module * 0x40U) + (ch * 0x04U)); +} +/* End of function get_rgidmen_rtdm_addr(uint32_t module, uint32_t ch) */ + +static void rgid_sysdma_master_setting(void) +{ + uint32_t addr; + uint32_t val; + + + /* Region ID(Master) SYSDMAC set:Region ID (i = 0, j = 0-15)(i = 1, j = 0-15(S4/V4H) 0-7(V4M)) */ + for(uint32_t module = 0U; module < SYSDMA_MODULE_MAX; module++) { + for(uint32_t ch = 0U; ch < SYSDMA_CH_MAX; ch++) { + if (g_rgid_sysdma_setting_value[module][ch][1U] != RGID_INVALID) + { + addr = get_rgidmen_sydm_addr(module, ch); + val = mem_read32(addr); + val &= ~(RGIDMEN_RGIDEN_MASK); + val |= g_rgid_sysdma_setting_value[module][ch][0U]; + mem_write32(addr, val); + + INFO("RGIDMEN_SYDM[%d]_CH[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", module, ch, addr, mem_read32(addr), val); + + addr = dma_get_sysdma_regionid_addr(module, ch); + val = mem_read32(addr); + val &= ~(DMA_REGIONID_MASK); + val |= g_rgid_sysdma_setting_value[module][ch][1U]; + mem_write32(addr, val); + + INFO("SDMREGIONID_[%d]_CH[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", module, ch, addr, mem_read32(addr), val); + } + } + } +} +/* End of function rgid_sysdma_master_setting(void) */ + +static uint32_t get_rgidmen_sydm_addr(uint32_t module, uint32_t ch) +{ + return (RGIDMEN_SYDM_BASE + (module * 0x40U) + (ch * 0x04U)); +} +/* End of function get_rgidmen_sydm_addr(uint32_t module, uint32_t ch) */ + +static void rgid_gid_setting(void) +{ + uint32_t rmp_addr; + + /* Register of GID Base */ + remap_register(GID_BASE, &rmp_addr); + + for(uint32_t loop = 0U; loop < RGID_GID_MAX; loop++) + { + /* Set access protection setting value of CCI MPU GID register */ + mem_write32(remap_get_remap_addr(g_rgid_gid_tbl[loop].addr), g_rgid_gid_tbl[loop].value); + + INFO("GID[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_rgid_gid_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_rgid_gid_tbl[loop].addr)), g_rgid_gid_tbl[loop].value); + } + + /* Unregister of GID Base */ + remap_unregister(rmp_addr); +} +/* End of function rgid_gid_setting(void) */ +#endif /* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ + +/* Change the Region ID of the Master to be used for the transfer to the value of the argument. */ +void set_master_rgid_4_tfr_mod(void) +{ +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) +#if (RCAR_SA9_TYPE == FLASH_BOOT) + uint32_t module; + uint32_t ch; + + module = 0U; + ch = 0U; + set_rgid_rtdma_master(module, ch, RGID_0); +#else/* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ + set_rgid_master(RGID_M_SDHI, RGID_0); +#endif/* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ +#endif/* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ +} +/* End of function set_master_rgid_4_tfr_mod(void) */ + +/* Set the final expected value of Region ID. */ +void rgid_protection_final(void) +{ +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) +#if (RCAR_SA9_TYPE == FLASH_BOOT) + /* Updated Master authority for RT-DMA. */ + rgid_rtdma_master_setting(); +#else/* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ + /* Updated Master authority for SDHI. */ + set_rgid_master(RGID_M_SDHI, RGID_2); +#endif/* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ + /* Access protection setting function for AXI bus of Region ID register */ + rgid_register_protection(); +#endif/* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ +} +/* End of function rgid_protection_final(void) */ + +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) +#if (RCAR_SA9_TYPE == FLASH_BOOT) +static void set_rgid_rtdma_master(uint32_t module, uint32_t ch, uint32_t rgid) +{ + uint32_t addr; + uint32_t val; + + /* Region ID(Master) RT-DMAC set:Region ID */ + addr = get_rgidmen_rtdm_addr(module, ch); + val = mem_read32(addr); + val |= (1UL << rgid); + mem_write32(addr, val); + + INFO("RGIDMEN_RTDM[%d]_CH[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", module, ch, addr, mem_read32(addr), val); + + addr = dma_get_rtdma_regionid_addr(module, ch); + val = mem_read32(addr); + val &= ~(DMA_REGIONID_MASK); + val |= rgid; + mem_write32(addr, val); + + INFO("RDMREGIONID_[%d]_CH[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", module, ch, addr, mem_read32(addr), val); +} +/* End of function set_rgid_rtdma_master(uint32_t module, uint32_t ch, uint32_t rgid) */ +#else /* (RCAR_SA9_TYPE == FLASH_BOOT) */ +/* Individual setting function of RGIDM register */ +static void set_rgid_master(uint32_t id, uint32_t rgid) +{ +#if (RCAR_LSI == RCAR_S4) + uint32_t loop; + + REMAP_TABLE rgid_remap_tbl[RGID_SICREMAP_NUM] = { + {RGID_BASE1, 0U}, + }; + + /* Register of Region ID Base */ + for (loop = 0U; loop < RGID_SICREMAP_NUM; loop++) + { + remap_register(rgid_remap_tbl[loop].base_addr, &rgid_remap_tbl[loop].rmp_addr); + } + + /* Set access protection setting value of Region ID (Master) */ + mem_write32(g_rgid_m_tbl[id].addr, rgid); + INFO("RGIDM[%d](0x%08x) =\t0x%08x\n", id, g_rgid_m_tbl[id].addr, mem_read32(g_rgid_m_tbl[id].addr)); + + /* Unregister of Region ID Base */ + for (loop = 0U; loop < RGID_SICREMAP_NUM; loop++) + { + remap_unregister(rgid_remap_tbl[loop].rmp_addr); + } +#endif /* #if (RCAR_LSI == RCAR_S4) */ +} +/* End of function set_rgid_master(uint32_t id, uint32_t rgid) */ +#endif /* (RCAR_SA9_TYPE == FLASH_BOOT) */ + +/* Access protection setting function for AXI bus of Region ID register */ +static void rgid_register_protection(void) +{ + uint32_t loop; + + REMAP_TABLE rgid_remap_tbl[RGID_SICREMAP_NUM] = { + {RGID_BASE1, 0U}, +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + {RGID_BASE2, 0U}, + {RGID_BASE3, 0U}, + {RGID_BASE4, 0U}, + {RGID_BASE5, 0U}, +#endif /* ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) */ + }; + + /* Register of Region ID Base */ + for (loop = 0U; loop < RGID_SICREMAP_NUM; loop++) + { + remap_register(rgid_remap_tbl[loop].base_addr, &rgid_remap_tbl[loop].rmp_addr); + } + + for(loop = 0U; loop < RGID_AXI_MAX; loop++) + { + /* Set access protection setting value of Region ID (AXI bus of Region ID register) */ + mem_write32(remap_get_remap_addr(g_rgid_axi_tbl[loop].addr), g_rgid_axi_tbl[loop].value); + + INFO("RGID_AXI[%d](0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", loop, g_rgid_axi_tbl[loop].addr, mem_read32(remap_get_remap_addr(g_rgid_axi_tbl[loop].addr)), g_rgid_axi_tbl[loop].value); + } + + /* Unregister of Region ID Base */ + for (loop = 0U; loop < RGID_SICREMAP_NUM; loop++) + { + remap_unregister(rgid_remap_tbl[loop].rmp_addr); + } +} +/* End of function rgid_register_protection(void) */ + +static void domain_protection_setting(void) +{ + uint32_t loop; + + /* Set CPG domain write access control register */ + for(loop = 0U; loop <= CPG_PROTECTION; loop++) + { + cpg_reg_write((CPG_D1WACRA00 + (loop * 4U)), (CPG_D1WACRA00 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D2WACRA00 + (loop * 4U)), (CPG_D2WACRA00 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D3WACRA00 + (loop * 4U)), (CPG_D3WACRA00 + (loop * 4U)), WRITE_ENABLE); + } + + /* Set PFC domain write access control register */ + /* Port Group0 */ + pfc_reg_write(PFC_DM1PR0_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR0_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR0_RW, WRITE_ENABLE); + + /* Port Group1 */ + pfc_reg_write(PFC_DM1PR1_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR1_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR1_RW, WRITE_ENABLE); + + /* Port Group2 */ + pfc_reg_write(PFC_DM1PR2_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR2_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR2_RW, WRITE_ENABLE); + + /* Port Group3 */ + pfc_reg_write(PFC_DM1PR3_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR3_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR3_RW, WRITE_ENABLE); + + /* Port Group4 */ + pfc_reg_write(PFC_DM1PR4_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR4_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR4_RW, WRITE_ENABLE); + + /* Port Group5 */ + pfc_reg_write(PFC_DM1PR5_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR5_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR5_RW, WRITE_ENABLE); + + /* Port Group6 */ + pfc_reg_write(PFC_DM1PR6_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR6_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR6_RW, WRITE_ENABLE); + + /* Port Group7 */ + pfc_reg_write(PFC_DM1PR7_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR7_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR7_RW, WRITE_ENABLE); + +#if (RCAR_LSI == RCAR_V4H) + /* Port Group8 */ + pfc_reg_write(PFC_DM1PR8_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PR8_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PR8_RW, WRITE_ENABLE); +#endif/* #if (RCAR_LSI == RCAR_V4H) */ + + /* System Group */ + pfc_reg_write(PFC_DM1PRSYS_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM2PRSYS_RW, WRITE_ENABLE); + pfc_reg_write(PFC_DM3PRSYS_RW, WRITE_ENABLE); + + /* Set SYSC domain write access control register */ + for(loop = 0U; loop <= SYSC_PROTECTION; loop++) + { + mem_write32((SYSC_SYSCD1WACR0 + (loop * 4U)), WRITE_ENABLE); + mem_write32((SYSC_SYSCD2WACR0 + (loop * 4U)), WRITE_ENABLE); + mem_write32((SYSC_SYSCD3WACR0 + (loop * 4U)), WRITE_ENABLE); + } + + /* Set Reset domain write access control register */ + for(loop = 0U; loop <= RESET_PROTECTION; loop++) + { + cpg_reg_write((CPG_D1WACR_MSTPCR0 + (loop * 4U)), (CPG_D1WACR_MSTPCR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D1WACR_RAHSR0 + (loop * 4U)), (CPG_D1WACR_RAHSR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D1WACR_SRCR0 + (loop * 4U)), (CPG_D1WACR_SRCR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D1WACR_SRSTCLR0 + (loop * 4U)), (CPG_D1WACR_SRSTCLR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D2WACR_MSTPCR0 + (loop * 4U)), (CPG_D2WACR_MSTPCR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D2WACR_RAHSR0 + (loop * 4U)), (CPG_D2WACR_RAHSR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D2WACR_SRCR0 + (loop * 4U)), (CPG_D2WACR_SRCR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D2WACR_SRSTCLR0 + (loop * 4U)), (CPG_D2WACR_SRSTCLR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D3WACR_MSTPCR0 + (loop * 4U)), (CPG_D3WACR_MSTPCR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D3WACR_RAHSR0 + (loop * 4U)), (CPG_D3WACR_RAHSR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D3WACR_SRCR0 + (loop * 4U)), (CPG_D3WACR_SRCR0 + (loop * 4U)), WRITE_ENABLE); + cpg_reg_write((CPG_D3WACR_SRSTCLR0 + (loop * 4U)), (CPG_D3WACR_SRSTCLR0 + (loop * 4U)), WRITE_ENABLE); + } +} +/* End of function domain_protection_setting(void) */ +#endif/* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/stack_protect.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/protect/stack_protect.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/stack_protect.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/protect/stack_protect.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/remap/remap.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/remap/remap.c new file mode 100644 index 00000000..aec11480 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/remap/remap.c @@ -0,0 +1,286 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : remap driver + ******************************************************************************/ +/****************************************************************************** + * @file remap.c + * - Version : 0.07 + * @brief 1. Setting of SIC REMAP AREA. + * 2. Release of SIC REMAP AREA. + * 3. Calculation of logical address. + * 4. Calculation of physical address. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Modify remap_reg_write function to inline. + * : 06.01.2022 0.03 Static analysis support + * : 23.05.2022 0.04 Supported SICREMAP address for S4 ver1.0 + * S4/V4H differences applied to s_remap_tbl. + * : 15.05.2023 0.05 Add get_cfremap_addr() function to jump + * the secure firmware on CF remap Area. + * : 21.08.2023 0.06 Add support for V4M. + * : 03.09.2025 0.07 Update remap_get_remap_addr() function. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +/* Range of SICREMAP2M register */ +#define REMAP_REG_MAX (16U) + +#define REMAP_2M_BITS (21U) +#define REMAP_2M_SIZE ((uint32_t)1U << REMAP_2M_BITS) +#define REMAP_2M_MASK (REMAP_2M_SIZE - 1U) +#define REMAP_TBL_MAX (sizeof(s_remap_tbl)/sizeof(s_remap_tbl[0])) +#define REMAP_UNUSED (0xFFFFFFFFU) + +typedef struct { + uint32_t number; + uint32_t address; +}st_remap_address_table_t; + +/* Remap management table */ +static st_remap_address_table_t s_remap_tbl[REMAP_REG_MAX] = { + [0] = {REMAP_UNUSED, 0x00000000U}, + [1] = {REMAP_UNUSED, 0x00000000U}, + [2] = {REMAP_UNUSED, 0x00000000U}, + [3] = {REMAP_UNUSED, 0x00000000U}, +#if (RCAR_LSI == RCAR_S4) + [4] = {4, 0xD8E00000}, /* MCU */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + [4] = {REMAP_UNUSED, 0x00000000U}, +#endif + [5] = {5, 0xE7600000U}, /* Region ID */ + [6] = {6, 0xE7200000U}, /* SYS-DMAC0 */ + [7] = {7, 0xE6400000U}, /* HSCIF */ + [8] = {8, 0xEE000000U}, /* MMC */ + [9] = {9, 0xE6E00000U}, /* SCIF */ + [10] = {10, 0xFFC00000U}, /* RT-DMAC0,PFC(MCU) */ + [11] = {11, 0xEE200000U}, /* RPC */ + [12] = {12, 0xE6200000U}, /* ECM,AP-System Core */ + [13] = {13, 0xE6000000U}, /* PFC,GPIO,CPGA,RESET */ + [14] = {14, 0xE6600000U}, /* CC63S,AXMM,QoS,FCPR */ + [15] = {15, 0xEB200000U}, /* RT-SRAM */ +}; + +static inline uint32_t get_sicremap2m_addr(uint32_t num) +{ + return (REMAP_BASE + (num * 0x0004U)); +} +/* End of function get_sicremap2m_addr(uint32_t num) */ + +static inline void remap_reg_write(uint32_t num, uint32_t value) +{ + /* Specific write Procedure for Write-Protected Register. */ + do + { + mem_write32(ICUMX_PROT0PCMD, PROTCMD_START); + mem_write32(get_sicremap2m_addr(num), value); + mem_write32(get_sicremap2m_addr(num), ~value); + mem_write32(get_sicremap2m_addr(num), value); + } while (mem_read32(ICUMX_PROT0PS) == PROTS0ERR); +} +/* End of function remap_reg_write(uint32_t num, uint32_t value) */ + +void remap_register(uint32_t addr, uint32_t *remap_addr) +{ + uint32_t loop; + uint32_t set_addr; + + /* Check unused area in order from the top of + the remap management table. */ + for (loop = 0U; loop < REMAP_TBL_MAX; ++loop) + { + if (REMAP_UNUSED == s_remap_tbl[loop].number) + { + break; + } + } + + /* When necessary area can not be secured */ + if (REMAP_TBL_MAX <= loop) + { + ERROR("There is no space in the logical address area.\n"); + panic; + } + + syncm(); + + /* Set remap area */ + set_addr = addr & ~REMAP_2M_MASK; + + /* Update the table managing the remap space */ + s_remap_tbl[loop].address = set_addr; + s_remap_tbl[loop].number = (uint8_t)loop; + /* Set SICREMAP register */ + remap_reg_write(loop, set_addr); + INFO("s_remap_tbl[%d].number = 0x%x\n",loop,s_remap_tbl[loop].number); + INFO("s_remap_tbl[%d].address = 0x%x\n",loop,s_remap_tbl[loop].address); + + syncm(); + + /* Calculating the logical address of the + address received as an argument */ + *remap_addr = icu_remap_calc(loop); + *remap_addr += addr & REMAP_2M_MASK; +} +/* End of function remap_register(uint32_t addr, uint32_t size, uint32_t *remap_addr) */ + +void remap_unregister(uint32_t remap_addr) +{ + uint32_t loop; + + /* Is the remap space where the address of the argument is used? */ + for (loop = 0U; loop < REMAP_TBL_MAX; ++loop) + { + INFO("s_remap_tbl[%d].number = 0x%x\n",loop,s_remap_tbl[loop].number); + if ((REMAP_UNUSED != s_remap_tbl[loop].number) + && ((icu_remap_calc(loop) <= remap_addr) + && (remap_addr < icu_remap_calc(loop + 1U)))) + { + break; + } + } + + /* When an area to release can not be found */ + if (REMAP_TBL_MAX <= loop) + { + ERROR("Not registered in the logical address.\n" + "remap address = 0x%x\n",remap_addr); + panic; + } + syncm(); + + /* release remap area */ + /* Update the table managing the remap space */ + s_remap_tbl[loop].address = 0U; + s_remap_tbl[loop].number = REMAP_UNUSED; + /* Release SICREMAP register */ + remap_reg_write(loop, icu_remap_calc(loop)); + + syncm(); +} +/* End of function remap_unregister(uint32_t remap_addr) */ + +uint32_t remap_get_phys_addr(uint32_t remap_addr) +{ + uint32_t phys_addr; + uint32_t reg; + + /* It checks whether the argument is within the range + of the logical address. */ + if ((ICU_REMAP0 > remap_addr) + || (icu_remap_calc(REMAP_REG_MAX) <= remap_addr)) + { + ERROR("Address convert error.\n" + "source address = 0x%x\n",remap_addr); + panic; + } + + /* Calculate the physical address of the argument */ + phys_addr = remap_addr - ICU_REMAP0; + phys_addr >>= REMAP_2M_BITS; + reg = get_sicremap2m_addr(phys_addr); + reg = mem_read32(reg); + phys_addr = reg + (remap_addr & REMAP_2M_MASK); + + return phys_addr; +} +/* End of function remap_get_phys_addr(uint32_t remap_addr) */ + +uint32_t remap_get_remap_addr(uint32_t phys_addr) +{ + uint32_t return_addr; + uint32_t reg; + uint32_t loop; + + /* It checks whether the argument is within the range + of the physical address registered in SICREMAP. */ + for (loop = 0U; loop < REMAP_REG_MAX; loop++) + { + reg = mem_read32(get_sicremap2m_addr(loop)); + if ((reg <= phys_addr) + && (phys_addr <= (reg + REMAP_2M_MASK))) + { + break; + } + } + + /* Calculate the logical address of the argument */ + if (REMAP_REG_MAX > loop) + { + return_addr = icu_remap_calc(loop); + return_addr += phys_addr - reg; + } + else + { + return_addr = phys_addr; + } + + return return_addr; +} +/* End of function remap_get_remap_addr(uint32_t phys_addr) */ + +uint32_t get_cfremap_addr(uint32_t fetch_addr) +{ + uint32_t cf_remap_addr = 0x0U; + uint32_t cf_current_base = mem_read32(ICUMX_CFREMAP); + + /* Get current setting of "physical address for cf remap base", + and calculate cf remap address of target fetch */ + cf_remap_addr = fetch_addr - cf_current_base; + + /* Check whether the calculated address is outside of Code Fetch area */ + if ((CFREMAP_AREA_SIZE <= cf_remap_addr) || (fetch_addr < cf_current_base)) + { + ERROR("Target fetch address is invalid: 0x%08x\n", fetch_addr); + panic; + } + + return cf_remap_addr; +} + +void set_sicremap_s4v10(void) +{ +#if (RCAR_LSI == RCAR_S4) + /* Change the setting of SICREMAP for S4 Ver1.0 to be the setting of SICREMAP for S4 Ver1.1. */ + remap_reg_write(ICU_REMAP_NUM_RGID, ICU_REMAP_RGID); /* SIC REMAP5:Region ID */ + remap_reg_write(ICU_REMAP_NUM_MCU , ICU_REMAP_MCU); /* SIC REMAP4:MCU */ +#endif +} +/* End of function set_sicremap_s4v10(void) */ + +void set_sicremap_fcpr(void) +{ + remap_reg_write(ICU_REMAP_NUM_FCPR, ICU_REMAP_FCPR); /* SIC REMAP14:FCPR */ +} +/* End of function set_sicremap_fcpr(void) */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/rom_api/rom_api.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/rom_api/rom_api.c new file mode 100644 index 00000000..2957a6e5 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/rom_api/rom_api.c @@ -0,0 +1,381 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : boot ROM API + ******************************************************************************/ +/****************************************************************************** + * @file rom_api.c + * - Version : 0.13 + * @brief 1.Call ROM_SecureBootAPI. + * 2.Call ROM_GetLcsAPI. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : (30.11.2021 0.02) Modify argument of ROM_GetLcs. + * : 23.05.2022 0.03 Supported Secure boot for ROM API. + * : 05.08.2022 0.04 Add sw_version_check function and macros. + * Add sw_version_check function call to + * rom_secureboot function. + * : 30.09.2022 0.05 Add auth_min_ver_tbl function. + * : 09.12.2022 0.06 Remove argument 'is_verify' used in + * auth_min_ver_tbl function. + * : 14.02.2023 0.07 Add Hash save process to rom_secureboot. + * : 14.04.2023 0.08 Add certificate authentication functions. + * : 21.08.2023 0.09 Add support for V4M. + * : 11.01.2024 0.10 Add process that change writing privilege + * to System RAM by ICUMX. + * : 08.02.2024 0.11 Update icu_remove_write_access calling + * condition to always calling. + * : 05.12.2024 0.12 Remove icu_remove_write_access function. + * : 26.05.2025 0.13 Add verification support for the OP-TEE + * content cert. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* For software version check */ +#define TBL_VERSION_CHECK_DISABLE (0U) +#define TFMV_MIN_VER_TBL_TOP (0xFDE35000U) /* remapped address */ +#define NTFMV_MIN_VER_TBL_TOP (0xFDE35800U) /* remapped address */ +#define NTFMV_LD_ID_OFST (7U) +#define SW_MIN_VER_TBL_UNIT (0x10U) +#define TBL_VER_OFST (4U) +#define TBL_IMG_OFST (8U) + +/* Hash size definition */ +#define SECURE_BOOT_COMPARE_HASH_SIZE_BYTE (64U) /* SHA-256 * 2 */ +/* Definitions for get_hash_save_addr() */ +#if (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) +/* cnt=0: TFMV Software minimum version table */ +/* cnt=1: NTFMV Software minimum version table */ +/* cnt=2: CR52 2nd IPL */ +#define CR52_IPL_HASH_SAVE_CNT (0x2U) +/* cnt=3: Secure FW */ +#define SECURE_FW_HASH_SAVE_CNT (0x3U) +#else +#define CR52_IPL_HASH_SAVE_CNT (0x0U) +#define SECURE_FW_HASH_SAVE_CNT (0x1U) +#endif +#define CR52_IPL_HASH_SAVE_ADDR (0xE635FF40U) /* Physical address */ +#define SECURE_FW_HASH_SAVE_ADDR (0xE635FFC0U) /* Physical address */ +/* For TFMV/NTFMV Software minimum version table */ +#define OTHERS_HASH_SAVE_ADDR (0xE635FC00U) /* Physical address */ + +static uint32_t call_ROM_SecureBootVerify(uint32_t *pKeyCert, uint32_t *pContentCert); +static uint32_t call_ROM_SecureBootCompare(uint32_t *pContentCert, uint32_t *hash, uint32_t hash_size); +static uint32_t call_ROM_SecureBootDecrypt(uint32_t *pContentCert); +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +static uint32_t get_hash_save_addr(void); +#endif /* ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) */ + +extern uint32_t is_verify; + +void rom_secureboot(LOAD_INFO* li) +{ + uint32_t *keycert = (uint32_t*)li->key_cert_addr; + uint32_t *contentcert = (uint32_t*)li->cnt_cert_addr; +#if (RCAR_LSI == RCAR_S4) + uint32_t hash[16]; /* hash space is 64byte */ +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + uint32_t *hash; /* SystemRAM logical address */ +#endif /* (RCAR_LSI == RCAR_S4) */ + uint32_t ret; + + /* If boot mode is Secure BOOT, the ROM API is used to authenticate the image. */ + if (NORMAL_BOOT != is_verify) + { + /* Content cert certification */ + ret = call_ROM_SecureBootVerify(keycert, contentcert); + if (ROMAPI_OK != ret) + { + ERROR("%s Certificate Verification Failed!!!(0x%x)\n", li->name, ret); + panic; + } + + /* Decryption image */ + ret = call_ROM_SecureBootDecrypt(contentcert); + if ((ROMAPI_OK != ret) && (ROM_ERR_IMG_VERIFIER_NO_ENCRYPT_IMG != ret)) + { + ERROR("%s Decryption Failed!!!(0x%x)\n", li->name, ret); + panic; + } + } /* if (NORMAL_BOOT != is_verify) */ + + /* + * System RAM is divided two regions that Cx 2nd IPL and others by RAM protection. + * After loading and decrypting Cx 2nd IPL, writing privilege to Cx 2nd IPL region + * from RGID0(ICUMX) to be disabled and then comparing Hash. + * This implementation is according to operation in SAN (Application Domain Safety Application Note) + * chapter 6.23.5. + */ +/* Remove the following comment out if user want to enable protection of System Ram. */ +/* if(CA_PROGRAM_ID == (li->image_id)) */ +/* { */ +/* icu_remove_write_access(); */ +/* } */ + + if (NORMAL_BOOT != is_verify) + { + /* Hash save SystemRAM logical address calculation (V4H only) */ +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + hash = (uint32_t *)get_hash_save_addr(); +#endif + /* Image certification */ + ret = call_ROM_SecureBootCompare(contentcert, hash, SECURE_BOOT_COMPARE_HASH_SIZE_BYTE); + if (ROMAPI_OK != ret) + { + ERROR("%s Image Verification Failed!!!(0x%x)\n", li->name, ret); + panic; + } + + /* Software version check */ + sw_version_check(li); + } /* if (NORMAL_BOOT != is_verify) */ +} +/* End of function rom_secureboot(LOAD_INFO* li) */ + +static uint32_t call_ROM_SecureBootVerify(uint32_t *pKeyCert, uint32_t *pContentCert) +{ + /* Secure Boot API address */ + static const uintptr_t s_rom_secureboot_verify_addr = ROM_SECUREBOOT_VERIFY; + ROM_SECUREBOOT_VERIFY_API func; + uint32_t ret; + + func = (ROM_SECUREBOOT_VERIFY_API)s_rom_secureboot_verify_addr; + + ret = func(pKeyCert, pContentCert); + return ret; +} +/* End of function call_ROM_SecureBootVerify(uint32_t *pKeyCert, uint32_t *pContentCert) */ + +static uint32_t call_ROM_SecureBootCompare(uint32_t *pContentCert, uint32_t *hash, uint32_t hash_size) +{ + /* Secure Boot API address */ + static const uintptr_t s_rom_secureboot_compare_addr = ROM_SECUREBOOT_COMPARE; + ROM_SECUREBOOT_COMPARE_API func; + uint32_t ret; + + func = (ROM_SECUREBOOT_COMPARE_API)s_rom_secureboot_compare_addr; + + ret = func(pContentCert, hash, hash_size); + return ret; +} +/* End of function call_ROM_SecureBootCompare(uint32_t *pContentCert, uint32_t *hash, uint32_t hash_size) */ + +static uint32_t call_ROM_SecureBootDecrypt(uint32_t *pContentCert) +{ + /* Secure Boot API address */ + static const uintptr_t s_rom_secureboot_decrypt_addr = ROM_SECUREBOOT_DECRYPT; + ROM_SECUREBOOT_DECRYPT_API func; + uint32_t ret; + + func = (ROM_SECUREBOOT_DECRYPT_API)s_rom_secureboot_decrypt_addr; + + ret = func(pContentCert); + return ret; +} +/* End of function call_ROM_SecureBootDecrypt(uint32_t *pContentCert) */ + +uint32_t call_ROM_GetLcs(uint32_t *pLcs, uint32_t lcs_size) +{ + /* Get LCS stete API address */ + static const uintptr_t s_rom_getlcs_addr = ROM_GETLCS; + ROM_GETLCS_API func; + uint32_t ret; + + func = (ROM_GETLCS_API)s_rom_getlcs_addr; + + ret = func(pLcs, lcs_size); + return ret; +} +/* End of function call_ROM_GetLcs(uint32_t *pLcs, uint32_t lcs_size) */ + +void sw_version_check(const LOAD_INFO* li) +{ +#if (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) + uint32_t ver_tbl_base; + uint32_t ver_tbl_addr; + uint32_t ver_tbl_version; + uint32_t ver_tbl_ofst; + uint32_t img_version; + uint32_t id_adj = 0U; + uint32_t val; + uint32_t rmp_addr; + uint32_t load_id; + + load_id = get_load_info_id(li); + + if (load_id < TFMV_MIN_VER_TBL_ID) + { + /* If image is other than Software minimum version table */ + if(li->key_cert_addr == TFMV_KEY_CERT_ADDR) + { + /* Refer to TFMV Software minimum version table */ + ver_tbl_base = TFMV_MIN_VER_TBL_TOP; /* 0xFDE35000 */ + } + else + { + /* Refer to NTFMV Software minimum version table */ + ver_tbl_base = NTFMV_MIN_VER_TBL_TOP; /* 0xFDE35800 */ + id_adj = NTFMV_LD_ID_OFST; + } + + /* Calculate Software minimum version address for Load ID */ + ver_tbl_addr = ver_tbl_base + (SW_MIN_VER_TBL_UNIT * (load_id - id_adj)); + + val = mem_read32(ver_tbl_addr); + if(val != TBL_VERSION_CHECK_DISABLE) + { + /* If a flag in Software minimum version is enable */ + ver_tbl_version = mem_read32(ver_tbl_addr + TBL_VER_OFST); + ver_tbl_ofst = mem_read32(ver_tbl_addr + TBL_IMG_OFST); + + /* Read image version in Load ID's image */ + remap_register(li->boot_addr + ver_tbl_ofst, &rmp_addr); + img_version = mem_read32(rmp_addr); + remap_unregister(rmp_addr); + + if(img_version < ver_tbl_version) + { + ERROR("%s Software version check result is failed.\n", li->name); + panic; + } + } + } +#endif /* (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) */ +} +/* End of function sw_version_check(const LOAD_INFO* li) */ + +void auth_min_ver_tbl(LOAD_INFO* li) +{ +#if (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) + rom_secureboot(&li[TFMV_MIN_VER_TBL_ID]); + rom_secureboot(&li[NTFMV_MIN_VER_TBL_ID]); +#endif /* (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) */ +} +/* End of function auth_min_ver_tbl(LOAD_INFO* li) */ + +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +static uint32_t get_hash_save_addr(void) +{ + uint32_t hash_addr; + static uint32_t cnt = 0U; + + if(cnt == CR52_IPL_HASH_SAVE_CNT) + { + /* When loading image is Cx 2nd IPL. */ + hash_addr = remap_get_remap_addr(CR52_IPL_HASH_SAVE_ADDR); + } + else if(cnt == SECURE_FW_HASH_SAVE_CNT) + { + /* When loading image is Secure FW. */ + hash_addr = remap_get_remap_addr(SECURE_FW_HASH_SAVE_ADDR); + } + else + { + /* When loading image is TFMV/NTFMV Software minimum version table. */ + hash_addr = remap_get_remap_addr(OTHERS_HASH_SAVE_ADDR); + } + /* Count how many times this function called. */ + cnt++; + + if(cnt > SECURE_FW_HASH_SAVE_CNT + 1U) + { + NOTICE("get_hash_save_addr: Unexpected cnt value.\n"); + } + + return hash_addr; +} +/* End of function get_hash_save_addr(void) */ + +void preload_verify_cntcert(const LOAD_INFO* li) +{ + if (NORMAL_BOOT != is_verify) + { + /* Set error code value as initial value */ + int32_t ret = -1; + + /* verify the content cert of RTOS */ + ret = call_ROM_SecureBootVerify((uint32_t *)li[RTOS_ID].key_cert_addr, (uint32_t *)li[RTOS_ID].cnt_cert_addr); + if (ROMAPI_OK != ret) + { + ERROR("%s Certificate Verification Failed!!!(0x%x)\n", li[RTOS_ID].name, ret); + panic; + } + + /* verify the content cert of Secure FW */ + ret = call_ROM_SecureBootVerify((uint32_t *)li[SECURE_FW_ID].key_cert_addr, (uint32_t *)li[SECURE_FW_ID].cnt_cert_addr); + if (ROMAPI_OK != ret) + { + ERROR("%s Certificate Verification Failed!!!(0x%x)\n", li[SECURE_FW_ID].name, ret); + panic; + } + + /* verify the content cert of CxIPL */ + ret = call_ROM_SecureBootVerify((uint32_t *)li[CA_PROGRAM_ID].key_cert_addr, (uint32_t *)li[CA_PROGRAM_ID].cnt_cert_addr); + if (ROMAPI_OK != ret) + { + ERROR("%s Certificate Verification Failed!!!(0x%x)\n", li[CA_PROGRAM_ID].name, ret); + panic; + } + + /* verify the content cert of Secure Monitor */ + ret = call_ROM_SecureBootVerify((uint32_t *)li[CA_OPTIONAL_ID].key_cert_addr, (uint32_t *)li[CA_OPTIONAL_ID].cnt_cert_addr); + if (ROMAPI_OK != ret) + { + ERROR("%s Certificate Verification Failed!!!(0x%x)\n", li[CA_OPTIONAL_ID].name, ret); + panic; + } + + /* verity the content cert of U-boot */ + ret = call_ROM_SecureBootVerify((uint32_t *)li[CA_OPTIONAL_ID + 1U].key_cert_addr, (uint32_t *)li[CA_OPTIONAL_ID + 1U].cnt_cert_addr); + if (ROMAPI_OK != ret) + { + ERROR("%s Certificate Verification Failed!!!(0x%x)\n", li[CA_OPTIONAL_ID + 1U].name, ret); + panic; + } + +#if (OPTEE_LOAD_ENABLE == OPTEE_ENABLE) + /* verity the content cert of OP-TEE */ + ret = call_ROM_SecureBootVerify((uint32_t *)li[CA_OPTIONAL_ID + 2U].key_cert_addr, (uint32_t *)li[CA_OPTIONAL_ID + 2U].cnt_cert_addr); + if (ROMAPI_OK != ret) + { + ERROR("%s Certificate Verification Failed!!!(0x%x)\n", li[CA_OPTIONAL_ID + 2U].name, ret); + panic; + } +#endif /* OPTEE_LOAD_ENABLE == OPTEE_ENABLE */ + } +} + +#endif /* ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/s4/sa9.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/s4/sa9.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/s4/sa9.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/s4/sa9.ld diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/sa0.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/sa0.c new file mode 100644 index 00000000..24fa664a --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/sa0.c @@ -0,0 +1,63 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : dummy flash data for sector 0(0x00000) + ******************************************************************************/ + +#include + +#define BOOT_PARAM (0x00000000U) +#define SFLASH_CLKSELR (0x00000005U) /* H'05 = B'0000_0101 = 80MHz Quad I/O */ +#define SFLASH_DMCYC (0xFFFFFFFFU) +// #define SFLASH_DMCYC (0x00000007U) /* H'07 = B'0_0111 = 8 Dummy Cycles */ +/* Actually setting the dummy cycles to 0x7 causes a boot error, + but setting 0xFFFFFFFF will let it go to default value of 0x7 - that works. */ +/* Botting QSPI wiht CLKSELR+DMCYC works + with MODEMR[1:0]: 0x0 0x820509ac - Wont work with 0x820109AC */ +#define CERT_MAGIC (0xE291F358U) +#define LOADER_ADDR (0xEB210000U) +#define LOADER_SIZE (128U * 1024U / 4U) + +/* SA0 */ +/* boot parameter */ +__attribute__ ((section(".sa0_boot"))) const uint32_t boot[] = { + [0] = BOOT_PARAM, +#if 0 + [1] = SFLASH_CLKSELR, + [2] = SFLASH_DMCYC, + [3] = 0xFFFFFFFFU, +#else + [1] = 0xFFFFFF02U, /* for 133MHz Quad read output */ +#endif + // [1] = 0xFFFFFF00U, /* for 80MHz Quad read output or Single Fast Read */ +}; + + +/* A-side contents Key (0x3000) */ +__attribute__ ((section(".sa0_content_a"))) const uint32_t content_a[872 / 4] = { +// [0x000 / 4] = CERT_MAGIC, /* magic */ + [0x00C / 4] = 0x00000000U, /* magic */ + [0x154 / 4] = LOADER_ADDR, /* address */ + [0x264 / 4] = LOADER_SIZE, /* size */ +}; diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/sa0.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/sa0.ld new file mode 100644 index 00000000..4dd7e9e9 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/sa0.ld @@ -0,0 +1,53 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : dummy flash data for sector 0(0x00000) linker directive + ******************************************************************************/ +DEFAULTS { + dummy_addr = 0xEB200000 + dummy_size = 2M + +} +MEMORY +{ + dram : ORIGIN = dummy_addr, LENGTH = dummy_size +} +SECTIONS +{ +// +// Dummy Certificate +// + .sa0 ALIGN(16) : { + _start=0; + *(.sa0_boot) _boot=0; + .=0x3000; + *(.sa0_content_a) _content_a=.; + } > dram + + .sdata : > . + .tdata : > . + .rosdata ALIGN(4) : > . + .sdabase ALIGN(4) : > . + .secinfo ALIGN(4) : > . +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4h/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4h/sa9.c new file mode 100644 index 00000000..1af47f33 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4h/sa9.c @@ -0,0 +1,302 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : dummy flash data for sector 9(0x240000) + ******************************************************************************/ + +#include +#include + +#define FLASH_BOOT (0U) +#define EMMC_BOOT (1U) +#define CA_IPL (0U) +#define BL31 (1U) + +#define RTOS_LOAD_NUM_1 (1U) +#define RTOS_LOAD_NUM_3 (3U) + +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +#error "OPTEE_LOAD_ENABLE==1 should be for RCAR_V4H" +#endif +#if (BL2_LOAD_ENABLE == 0) +#error "BL2_LOAD_ENABLE==1 should be for RCAR_V4H" +#endif +#if (QNX_OS_LOAD_ENABLE == 0) +#error "QNX_OS_LOAD_ENABLE==1 should be for RCAR_V4H" +#endif + +/* CA program load num */ +#define CA_IMAGE_NUM (0x00000005U) +/* Source address on flash for Secure FW */ +#define SECURE_FW_SRC_ADDRESS (0x00280000U) +/* Source address on flash for RTOS#0 */ +#define RTOS_SRC_ADDRESS (0x00500000U) +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +/* Source address on eMMC for RTOS#1 */ +#define RTOS1_SRC_ADDRESS (0x00DC0000U) +/* Source address on eMMC for RTOS#2 */ +#define RTOS2_SRC_ADDRESS (0x00DE0000U) +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +#if (CA_LOAD_TYPE == CA_IPL) +/* Source address on flash for CX IPL */ +#define CX_IPL_SRC_ADDRESS (0x00480000U) +#else +/* Reserved */ +#define CX_IPL_SRC_ADDRESS (0x00000000U) +#endif +/* ----------- customized ----------- */ +/* Source address on flash for BL31 */ +#define CA_PROG_01_SRC_ADDRESS (0x00D00000U) +/* Source address on flash for U-Boot */ +#define CA_PROG_02_SRC_ADDRESS (0x00E00000U) +/* Source address on flash for TEE-OS */ +#define CA_PROG_03_SRC_ADDRESS (0x00C00000U) +/* Source address of CA76-Loader */ +#define CA_PROG_04_SRC_ADDRESS (0x004C0000U) +/* Source address of QNX-OS */ +#define CA_PROG_05_SRC_ADDRESS (0x01000000U) +/* Reserved */ +#define CA_PROG_06_SRC_ADDRESS (0x01000000U) +/* Reserved */ +#define CA_PROG_07_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_08_SRC_ADDRESS (0x00000000U) +/* ----------- customized ----------- */ + +#if (RCAR_SA9_TYPE == FLASH_BOOT) +#define SECURE_FW_PARTITION (0x00000000U) +#define CX_IPL_PARTITION (0x00000000U) + #if (CA_LOAD_TYPE == CA_IPL) +#define RTOS_PARTITION (0x00000001U) +#define CA_PROG_01_PARTITION (0x00000001U) +#define CA_PROG_02_PARTITION (0x00000001U) +#define CA_PROG_03_PARTITION (0x00000001U) +#define CA_PROG_04_PARTITION (0x00000001U) +#define CA_PROG_05_PARTITION (0x00000001U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) + #if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +#define RTOS1_PARTITION (0x00000001U) +#define RTOS2_PARTITION (0x00000001U) + #endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + #else /* #if (CA_LOAD_TYPE == CA_IPL) */ +#define RTOS_PARTITION (0x00000000U) +#define CA_PROG_01_PARTITION (0x00000000U) +#define CA_PROG_02_PARTITION (0x00000000U) +#define CA_PROG_03_PARTITION (0x00000000U) +#define CA_PROG_04_PARTITION (0x00000000U) +#define CA_PROG_05_PARTITION (0x00000000U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) + #endif /* #if (CA_LOAD_TYPE == CA_IPL) */ +#else /* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ +#define SECURE_FW_PARTITION (0x00000001U) +#define RTOS_PARTITION (0x00000001U) +#define CX_IPL_PARTITION (0x00000001U) +#define CA_PROG_01_PARTITION (0x00000001U) +#define CA_PROG_02_PARTITION (0x00000001U) +#define CA_PROG_03_PARTITION (0x00000001U) +#define CA_PROG_04_PARTITION (0x00000001U) +#define CA_PROG_05_PARTITION (0x00000001U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) +#endif + +#if (RCAR_SA9_TYPE != EMMC_BOOT) +/* Test data for QSPI DDR mode */ +#define QSPI_TESTDATA (0x5A5AA5A5U) +#else +#define QSPI_TESTDATA (0x00000000U) +#endif /* (RCAR_SA9_TYPE == FLASH_BOOT) */ + +/* Destination address for Secure FW */ +#define SECURE_FW_ADDRESS (0xEB240000U) +#define SECURE_FW_ADDRESSH (0x00000000U) +/* Destination size for Secure FW */ +#define SECURE_FW_DST_SIZE (0x00028000U) /* 640KiB / 4 */ +/* Destination address for RTOS#0 */ +#define RTOS_ADDRESS (0x40100000U) +#define RTOS_ADDRESSH (0x00000000U) +/* Destination size for RTOS#0 */ +#define RTOS_DST_SIZE (0x001C0000U) /* 7MiB / 4 */ +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +/* Destination address for RTOS#1 */ +#define RTOS1_ADDRESS (0xE3100000U) +#define RTOS1_ADDRESSH (0x00000000U) +/* Destination size for RTOS#1 */ +#define RTOS1_DST_SIZE (0x00004000U) /* 64KiB / 4 */ +/* Destination address for RTOS#2 */ +#define RTOS2_ADDRESS (0xE3200000U) +#define RTOS2_ADDRESSH (0x00000000U) +/* Decstination size for RTOS#2 */ +#define RTOS2_DST_SIZE (0x00004000U) /* 64KiB / 4 */ +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +#if (CA_LOAD_TYPE == CA_IPL) +/* Destination address for CA Loader */ +#define CX_IPL_ADDRESS (0xE6300000U) +#define CX_UPL_ADDRESSH (0x00000000U) +/* Destination size for CA Loader */ +#define CX_IPL_SIZE (0x0000C000U) /* 192KiB / 4 */ +#else +/* CX IPL Reserved */ +#define CX_IPL_ADDRESS (0x00000000U) +#define CX_UPL_ADDRESSH (0x00000000U) +#define CX_IPL_SIZE (0x00000000U) +#endif +/* ----------- customized ----------- */ +/* Destination address for BL31 */ +#define CA_PROG_01_ADDRESS (0x46400000U) +#define CA_PROG_01_ADDRESSH (0x00000000U) +#define CA_PROG_01_SIZE (0x00008800U) /* 136KiB / 4 */ +/* Destination address for U-Boot */ +#define CA_PROG_02_ADDRESS (0x50000000U) +#define CA_PROG_02_ADDRESSH (0x00000000U) +#define CA_PROG_02_SIZE (0x00040000U) /* 1MiB / 4 */ +/* Destination address for tee-OS */ +#define CA_PROG_03_ADDRESS (0x44100000U) +#define CA_PROG_03_ADDRESSH (0x00000000U) +#define CA_PROG_03_SIZE (0x00040000U) /* 1MiB / 4 */ +/* Destination address for CA76-Loader */ +#define CA_PROG_04_ADDRESS (0x41D00000U) +#define CA_PROG_04_ADDRESSH (0x00000000U) +#define CA_PROG_04_SIZE (0x00008000U) /* 128KiB / 4 */ +/* Destination address of QNX-OS */ +#define CA_PROG_05_ADDRESS (0x50100000U) +#define CA_PROG_05_ADDRESSH (0x00000000U) +#define CA_PROG_05_SIZE (0x00200000U) /* 8MiB / 4 */ +/* Reserved */ +#define CA_PROG_06_ADDRESS (0x00000000U) +#define CA_PROG_06_ADDRESSH (0x00000000U) +#define CA_PROG_06_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_07_ADDRESS (0x00000000U) +#define CA_PROG_07_ADDRESSH (0x00000000U) +#define CA_PROG_07_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_08_ADDRESS (0x00000000U) +#define CA_PROG_08_ADDRESSH (0x00000000U) +#define CA_PROG_08_SIZE (0x00000000U) +/* ----------- customized ----------- */ + +/* sa9 */ +__attribute__ ((section (".sa9_top"))) const uint32_t top_cert[1024 / 4] = { + [0x0000 / 4] = CA_IMAGE_NUM, + [0x0008 / 4] = SECURE_FW_SRC_ADDRESS, + [0x0010 / 4] = SECURE_FW_PARTITION, + [0x0018 / 4] = RTOS_SRC_ADDRESS, + [0x0020 / 4] = RTOS_PARTITION, + [0x0028 / 4] = CX_IPL_SRC_ADDRESS, + [0x0030 / 4] = CX_IPL_PARTITION, + [0x0068 / 4] = CA_PROG_01_SRC_ADDRESS, + [0x0070 / 4] = CA_PROG_01_PARTITION, + [0x0078 / 4] = CA_PROG_02_SRC_ADDRESS, + [0x0080 / 4] = CA_PROG_02_PARTITION, + [0x0088 / 4] = CA_PROG_03_SRC_ADDRESS, + [0x0090 / 4] = CA_PROG_03_PARTITION, + [0x0098 / 4] = CA_PROG_04_SRC_ADDRESS, + [0x00A0 / 4] = CA_PROG_04_PARTITION, + [0x00A8 / 4] = CA_PROG_05_SRC_ADDRESS, + [0x00B0 / 4] = CA_PROG_05_PARTITION, + [0x00B8 / 4] = CA_PROG_06_SRC_ADDRESS, + [0x00C0 / 4] = CA_PROG_06_PARTITION, + [0x00C8 / 4] = CA_PROG_07_SRC_ADDRESS, + [0x00D0 / 4] = CA_PROG_07_PARTITION, + [0x00D8 / 4] = CA_PROG_08_SRC_ADDRESS, + [0x00E0 / 4] = CA_PROG_08_PARTITION, +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) + [0x0108 / 4] = RTOS1_SRC_ADDRESS, + [0x0110 / 4] = RTOS1_PARTITION, + [0x0118 / 4] = RTOS2_SRC_ADDRESS, + [0x0120 / 4] = RTOS2_PARTITION, +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ +}; +__attribute__ ((section (".qspi_test_data"))) const uint32_t test_data[1] = { + QSPI_TESTDATA +}; +__attribute__ ((section (".sa9_firm"))) const uint32_t firm_cert[2048 / 4] = { + [0x0154 / 4] = SECURE_FW_ADDRESS, + [0x0264 / 4] = SECURE_FW_DST_SIZE, +}; +__attribute__ ((section (".sa9_rtos"))) const uint32_t rtos_cert[2048 / 4] = { + [0x0154 / 4] = RTOS_ADDRESS, + [0x0264 / 4] = RTOS_DST_SIZE, +}; +__attribute__ ((section (".sa9_cx_ipl"))) const uint32_t cx_ipl_cert[2048 / 4] = { + [0x0154 / 4] = CX_IPL_ADDRESS, + [0x0264 / 4] = CX_IPL_SIZE, +}; +__attribute__ ((section (".sa9_ca_01"))) const uint32_t ca_01_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_01_ADDRESS, + [0x0264 / 4] = CA_PROG_01_SIZE, +}; + +__attribute__ ((section (".sa9_ca_02"))) const uint32_t ca_02_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_02_ADDRESS, + [0x0264 / 4] = CA_PROG_02_SIZE, +}; +__attribute__ ((section (".sa9_ca_03"))) const uint32_t ca_03_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_03_ADDRESS, + [0x0264 / 4] = CA_PROG_03_SIZE, +}; +__attribute__ ((section (".sa9_ca_04"))) const uint32_t ca_04_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_04_ADDRESS, + [0x0264 / 4] = CA_PROG_04_SIZE, +}; +__attribute__ ((section (".sa9_ca_05"))) const uint32_t ca_05_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_05_ADDRESS, + [0x0264 / 4] = CA_PROG_05_SIZE, +}; +__attribute__ ((section (".sa9_ca_06"))) const uint32_t ca_06_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_06_ADDRESS, + [0x0264 / 4] = CA_PROG_06_SIZE, +}; +__attribute__ ((section (".sa9_ca_07"))) const uint32_t ca_07_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_07_ADDRESS, + [0x0264 / 4] = CA_PROG_07_SIZE, +}; +__attribute__ ((section (".sa9_ca_08"))) const uint32_t ca_08_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_08_ADDRESS, + [0x0264 / 4] = CA_PROG_08_SIZE, +}; + +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +__attribute__ ((section (".sa9_rtos_01"))) const uint32_t rtos1_cert[2048 / 4] = { + [0x0154 / 4] = RTOS1_ADDRESS, + [0x0264 / 4] = RTOS1_DST_SIZE, +}; +__attribute__ ((section (".sa9_rtos_02"))) const uint32_t rtos2_cert[2048 / 4] = { + [0x0154 / 4] = RTOS2_ADDRESS, + [0x0264 / 4] = RTOS2_DST_SIZE, +}; +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +/* TFMV key(8KB) + NTFMV key(8KB) + minimum version table(4KB) */ +__attribute__ ((section (".reserved"))) const uint32_t reserved[20480 / 4] = {0}; +/* G4MH cert * 2 + ICUMH Cert */ +__attribute__ ((section (".reserved2"))) const uint32_t reserved2[6144 / 4] = {0}; diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4h/sa9.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4h/sa9.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4m/sa9.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4m/sa9.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4m/sa9.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/dummy_create/v4m/sa9.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/sw_min_ver_tbl/tfmv_ver_tbl.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/sw_min_ver_tbl/tfmv_ver_tbl.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld b/Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld rename to Src/0_Tool/Gen4_R-Car_IPL/Customer/Mobis/20260126/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/boot_mon.s diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/stack.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/stack.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/stack.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch32_boot/stack.s diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/boot_mon.s diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/stack.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/stack.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/stack.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/AArch64_boot/stack.s diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/LICENSE.md b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/LICENSE.md similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/LICENSE.md rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/LICENSE.md diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/cert_param.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/cert_param.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/cert_param.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/cert_param.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/common.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/devdrv.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/devdrv.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/devdrv.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/devdrv.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/bit.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/bit.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/bit.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/bit.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/common.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/devdrv.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/devdrv.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/devdrv.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/devdrv.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/init_scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/init_scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/init_scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/init_scif.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/main.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/main.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/main.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/main.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/reg_rcargen3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/reg_rcargen3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/reg_rcargen3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/reg_rcargen3.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0_v3h.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0_v3h.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0_v3h.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv0_v3h.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv2.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv2.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv2.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/scifdrv2.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/include/types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/include/types.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/init_scif.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/init_scif.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/init_scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/init_scif.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/main.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/makefile diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/memory_cr7.def b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/memory_cr7.def similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/memory_cr7.def rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/memory_cr7.def diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/memory_icumxa.def b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/memory_icumxa.def similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/memory_icumxa.def rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/memory_icumxa.def diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv0.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv0.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv0.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv0.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv0_v3h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv0_v3h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv0_v3h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv0_v3h.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv2.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv2.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv2.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_CA53_Program/scifdrv2.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/Makefile diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/log.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/log.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/log.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/log.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/mem_io.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/mem_io.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/mem_io.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/mem_io.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/micro_wait.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/micro_wait.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/micro_wait.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/micro_wait.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/remap.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/remap.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/remap.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/remap.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/scif.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/common/scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/common/scif.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw.S diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw.ld diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/fw/dummy_fw_main.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/fw/vecttbl.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/fw/vecttbl.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/fw/vecttbl.S rename to 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a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/micro_wait.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/micro_wait.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/micro_wait.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/rcar_def.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/remap.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/remap.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/remap.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/remap.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/remap_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/remap_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/remap_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/remap_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/rst_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/rst_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/rst_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/rst_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/scif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/scif_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_FW/include/scif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_FW/include/scif_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/Makefile diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/common/div.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/common/div.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/common/div.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/common/div.s diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/common/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/common/scif.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/common/scif.c rename to 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a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/stdarg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/stdarg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/stdarg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/stdarg.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/stddef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/stddef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/stddef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/stddef.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/stdio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/stdio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/stdio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/stdio.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/string.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/string.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/string.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/string.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/sys/_null.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/sys/_null.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/sys/_null.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/sys/_null.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/include/sys/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/include/sys/_stdint.h similarity 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Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos.ld.S diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos.s diff --git a/Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/Dummy_RTOS/rtos/rtos_main.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/.gitignore b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/.gitignore similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/.gitignore rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/.gitignore diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/Makefile diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/log.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/log.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/log.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/log.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/scif.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/log/scif.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/mem_io/mem_io.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/mem_io/mem_io.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/mem_io/mem_io.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/mem_io/mem_io.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/timer/micro_wait.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/timer/micro_wait.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/timer/micro_wait.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/common/timer/micro_wait.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/image_load/image_load.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/image_load/image_load.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/image_load/image_load.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/image_load/image_load.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_lifec.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_lifec.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_lifec.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_lifec.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_memory.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_memory.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_memory.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/acc_prot_memory.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/axi_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/axi_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/axi_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/axi_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpg_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpu_on.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpu_on.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpu_on.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/cpu_on.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/dma_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/edcinten.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/edcinten.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/edcinten.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/edcinten.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/image_load.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/image_load.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/image_load.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/image_load.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/ip_control.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/ip_control.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/ip_control.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/ip_control.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/lifec_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/lifec_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/lifec_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/lifec_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/loader_main.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/loader_main.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/loader_main.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/loader_main.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/log.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/log.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/log.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/log.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mem_io.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mem_io.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mem_io.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mem_io.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/mfis_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/micro_wait.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/micro_wait.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/micro_wait.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/pfc_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_mstat.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_mstat.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_mstat.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_mstat.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_qoswt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_qoswt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_qoswt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/qos_qoswt.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rcar_def.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/remap_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rom_api.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rom_api.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rom_api.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rom_api.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rpc_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rst_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rst_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rst_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rst_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rtsram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rtsram_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rtsram_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/rtsram_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/scif_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/sysc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/sysc_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/sysc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/sysc_register.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/wdt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/wdt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/wdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/include/wdt.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/axi-bus_edcint/edcinten.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/axi-bus_edcint/edcinten.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/axi-bus_edcint/edcinten.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/axi-bus_edcint/edcinten.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/cpg/cpg.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/cpg/cpg.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/cpg/cpg.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/cpg/cpg.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_config.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_config.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_config.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_config.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regcheck.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regcheck.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regcheck.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regcheck.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr.mk diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/ddr_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/dram_sub_func.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_chk.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_chk.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_chk.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_chk.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3ver2.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3ver2.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3ver2.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_h3ver2.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3n.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3n.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3n.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ddr/init_dram_tbl_m3n.h diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/dma/dma.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/dma/dma.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/dma/dma.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/dma/dma.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ip_control.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ip_control.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ip_control.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/ip_control.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/mfis/mfis.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/mfis/mfis.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/mfis/mfis.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/mfis/mfis.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/pfc/pfc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/pfc/pfc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/pfc/pfc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/pfc/pfc.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/qos/qos.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/qos/qos.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/qos/qos.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/qos/qos.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/rpc/rpc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/rpc/rpc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/rpc/rpc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/rpc/rpc.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/wdt/wdt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/wdt/wdt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/wdt/wdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/ip/wdt/wdt.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/cpu_on.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/cpu_on.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/cpu_on.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/cpu_on.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/icumxa_loader.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/icumxa_loader.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/icumxa_loader.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/icumxa_loader.ld diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader.S diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/loader/loader_main.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/acc_prot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/acc_prot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/acc_prot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/acc_prot.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/lifec/acc_prot_lifec.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/lifec/acc_prot_lifec.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/lifec/acc_prot_lifec.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/lifec/acc_prot_lifec.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/memory/acc_prot_memory.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/memory/acc_prot_memory.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/memory/acc_prot_memory.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/protect/memory/acc_prot_memory.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/remap/remap.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/remap/remap.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/remap/remap.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/remap/remap.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api_wrap.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api_wrap.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api_wrap.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/rom_api/rom_api_wrap.S diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa0.ld diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa6.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa6.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa6.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa6.c diff --git a/Src/0_Tool/IPL/SDK/v3h/src/V3H_ICUMXA_Loader/tools/dummy_create/sa6.ld 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1.ld.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/bl1/bl1_private.h similarity index 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/crypto_mod.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/crypto_mod.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/crypto_mod.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/crypto_mod.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/img_parser_mod.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/img_parser_mod.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/img_parser_mod.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/img_parser_mod.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_common.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_crypto.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509_parser.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509_parser.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509_parser.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/mbedtls/mbedtls_x509_parser.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/tbbr/tbbr_cot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/tbbr/tbbr_cot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/tbbr/tbbr_cot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/auth/tbbr/tbbr_cot.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/console/console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/console/console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/console/console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/console/console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/console/skeleton_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/console/skeleton_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/console/skeleton_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/console/skeleton_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/delay_timer/delay_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/delay_timer/delay_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/delay_timer/delay_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/delay_timer/delay_timer.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_fip.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_fip.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_fip.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_fip.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_memmap.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_memmap.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_memmap.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_memmap.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_semihosting.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_semihosting.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_semihosting.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_semihosting.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_storage.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_storage.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_storage.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/io/io_storage.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/ti/uart/16550_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/ti/uart/16550_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/drivers/ti/uart/16550_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/drivers/ti/uart/16550_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2-psci.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv2legacy-psci.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-base-gicv3-psci.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv2-psci.dts similarity index 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-gicv3-psci.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard-no_psci.dtsi b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard-no_psci.dtsi similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard-no_psci.dtsi rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard-no_psci.dtsi diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard.dtsi b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard.dtsi similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard.dtsi rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/fvp-foundation-motherboard.dtsi diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard-no_psci.dtsi b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard-no_psci.dtsi similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard-no_psci.dtsi rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard-no_psci.dtsi diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard.dtsi b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard.dtsi similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard.dtsi rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/fdts/rtsm_ve-motherboard.dtsi diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/bl31.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/bl31.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/bl31.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/bl31.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/context.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/context.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/context.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/context.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/context_mgmt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/context_mgmt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/context_mgmt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/context_mgmt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/cpu_data.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/cpu_data.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/cpu_data.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/cpu_data.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/interrupt_mgmt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/interrupt_mgmt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/interrupt_mgmt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/interrupt_mgmt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/runtime_svc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/runtime_svc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/runtime_svc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/runtime_svc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci_compat.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci_compat.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci_compat.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/psci_compat.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/std_svc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/std_svc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/std_svc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl31/services/std_svc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl32/payloads/tlk.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl32/payloads/tlk.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl32/payloads/tlk.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl32/payloads/tlk.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/platform_tsp.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/platform_tsp.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/platform_tsp.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/platform_tsp.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/tsp.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/tsp.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/tsp.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/bl32/tsp/tsp.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/asm_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/asm_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/asm_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/asm_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/assert_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/assert_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/assert_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/assert_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/bl_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/bl_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/bl_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/bl_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/debug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/debug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/debug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/debug.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/el3_common_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/el3_common_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/el3_common_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/el3_common_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/firmware_image_package.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/firmware_image_package.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/firmware_image_package.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/firmware_image_package.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/tbbr/cot_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/tbbr/cot_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/tbbr/cot_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/tbbr/cot_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/tbbr/tbbr_img_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/tbbr/tbbr_img_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/common/tbbr/tbbr_img_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/common/tbbr/tbbr_img_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/arm_gic.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/arm_gic.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/arm_gic.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/arm_gic.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci400.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci400.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci400.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/cci400.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/ccn.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/ccn.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/ccn.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/ccn.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v2.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v2.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v2.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v2.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/gic_v3.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/nic_400.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/nic_400.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/nic_400.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/nic_400.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/pl011.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/pl011.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/pl011.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/pl011.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/sp804_delay_timer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/sp804_delay_timer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/sp804_delay_timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/sp804_delay_timer.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/tzc400.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/tzc400.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/tzc400.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/arm/tzc400.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_mod.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_mod.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_mod.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/auth_mod.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/crypto_mod.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/crypto_mod.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/crypto_mod.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/crypto_mod.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/img_parser_mod.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/img_parser_mod.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/img_parser_mod.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/img_parser_mod.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/auth/mbedtls/mbedtls_config.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/console.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/console.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/console.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/console.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/delay_timer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/delay_timer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/delay_timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/delay_timer.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_fip.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_fip.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_fip.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_fip.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_memmap.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_memmap.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_memmap.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_memmap.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_semihosting.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_semihosting.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_semihosting.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_semihosting.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_storage.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_storage.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_storage.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/io/io_storage.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/ti/uart/uart_16550.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/ti/uart/uart_16550.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/drivers/ti/uart/uart_16550.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/drivers/ti/uart/uart_16550.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch_helpers.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch_helpers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch_helpers.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/arch_helpers.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/xlat_tables.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/xlat_tables.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/xlat_tables.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/aarch64/xlat_tables.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/bakery_lock.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/bakery_lock.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/bakery_lock.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/bakery_lock.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cassert.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cassert.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cassert.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cassert.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/aem_generic.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/aem_generic.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/aem_generic.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/aem_generic.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a53.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a53.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a53.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a53.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a57.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a57.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a57.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a57.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a72.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a72.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a72.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cortex_a72.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cpu_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cpu_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cpu_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/cpu_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/denver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/denver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/denver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/cpus/aarch64/denver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/mmio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/mmio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/mmio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/mmio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/semihosting.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/semihosting.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/semihosting.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/semihosting.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/spinlock.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/spinlock.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/lib/spinlock.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/lib/spinlock.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_oid.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_oid.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_oid.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_arm_oid.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_css_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_css_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_css_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/board_css_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/v2m_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/v2m_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/v2m_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/board/common/v2m_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/aarch64/arm_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/aarch64/arm_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/aarch64/arm_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/aarch64/arm_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_config.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/arm_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/plat_arm.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/plat_arm.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/plat_arm.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/common/plat_arm.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/aarch64/css_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/aarch64/css_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/aarch64/css_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/aarch64/css_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/css_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/css_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/css_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/css/common/css_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/arm/soc/common/soc_css_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/common/common_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/common/common_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/common/common_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/common/common_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/common/platform.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/common/platform.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/plat/common/platform.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/plat/common/platform.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/assert.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/assert.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/assert.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/assert.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/inttypes.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/inttypes.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/inttypes.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/inttypes.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_inttypes.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_inttypes.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_inttypes.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_inttypes.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_limits.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_limits.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_limits.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_limits.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/machine/_types.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stddef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stddef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stddef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stddef.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stdio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stdio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stdio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stdio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stdlib.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stdlib.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stdlib.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/stdlib.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/string.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/string.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/string.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/string.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/strings.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/strings.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/strings.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/strings.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_null.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_null.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_null.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_null.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_timespec.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_timespec.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_timespec.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_timespec.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/_types.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/cdefs.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/cdefs.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/sys/cdefs.h rename to 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/time.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/time.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/time.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/time.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_strings.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_strings.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_strings.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_strings.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_time.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_time.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/include/stdlib/xlocale/_time.h rename to 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to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/aarch64/board_arm_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_arm_trusted_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_arm_trusted_boot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_arm_trusted_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_arm_trusted_boot.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_common.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_common.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_common.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/board_css_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotpk_rsa.der b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotpk_rsa.der similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotpk_rsa.der rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotpk_rsa.der diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/aarch64/fvp_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h similarity index 100% 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_bl31_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_bl31_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_bl31_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_bl31_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_io_storage.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_io_storage.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/fvp_io_storage.c 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_oid.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_oid.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_oid.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/include/platform_oid.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/fvp/platform.mk similarity index 100% rename from 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/aarch64/juno_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/aarch64/juno_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/aarch64/juno_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/aarch64/juno_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/include/platform_def.h similarity index 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/juno_security.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/juno_security.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/juno_security.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/juno_security.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/platform.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/platform.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/tsp/tsp-juno.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/board/juno/tsp/tsp-juno.mk similarity index 100% rename from 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl1_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl1_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl1_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl1_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl2_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl2_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl2_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl2_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl31_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl31_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl31_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_bl31_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_common.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_common.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_common.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_io_storage.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_io_storage.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_io_storage.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_io_storage.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_security.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_security.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_security.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_security.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/arm_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/common/tsp/arm_tsp_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/aarch64/css_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/aarch64/css_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/aarch64/css_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/aarch64/css_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_bl2_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_bl2_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_bl2_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_bl2_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_common.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_mhu.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scp_bootloader.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_scpi.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/css/common/css_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css_security.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css_security.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css_security.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/arm/soc/common/soc_css_security.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_psci_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_psci_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_psci_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/plat_psci_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_mp_stack.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_mp_stack.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_mp_stack.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_mp_stack.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_up_stack.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_up_stack.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/common/aarch64/platform_up_stack.S rename to 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from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_compat.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_compat.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_pm_compat.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_pm_compat.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_pm_compat.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_pm_compat.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_topology_compat.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_topology_compat.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_topology_compat.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/compat/plat_topology_compat.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/common/mtk_sip_svc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/plat_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/plat_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/plat_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/plat_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/platform_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/platform_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/platform_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/aarch64/platform_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/bl31_plat_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/bl31_plat_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/bl31_plat_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/bl31_plat_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/gpio/gpio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/rtc/rtc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/spm/spm_suspend.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/8250_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/8250_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/8250_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/8250_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/uart8250.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/uart8250.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/uart8250.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/drivers/uart/uart8250.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/mcucfg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/mcucfg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/mcucfg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/mcucfg.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/platform_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/platform_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/platform_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/power_tracer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/power_tracer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/power_tracer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/power_tracer.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/scu.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/scu.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/scu.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/include/scu.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/mt8173_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/mt8173_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/mt8173_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/mt8173_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_delay_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_delay_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_delay_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_delay_timer.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_mt_gic.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_mt_gic.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_mt_gic.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_mt_gic.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_sip_calls.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_sip_calls.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_sip_calls.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_sip_calls.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/plat_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/platform.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/platform.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/power_tracer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/mediatek/mt8173/power_tracer.c similarity index 100% rename from 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/memctrl/memctrl.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/memctrl/memctrl.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/memctrl/memctrl.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/memctrl/memctrl.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/pmc/pmc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/pmc/pmc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/pmc/pmc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/drivers/pmc/pmc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_bl31_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_bl31_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_bl31_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_bl31_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_common.mk similarity index 100% rename from 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_sip_calls.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_sip_calls.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_sip_calls.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_sip_calls.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/common/tegra_topology.c similarity index 100% rename from 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--git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t210/platform_t210.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t210/platform_t210.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t210/platform_t210.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/nvidia/tegra/soc/t210/platform_t210.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/bl2_reset.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/bl2_reset.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/bl2_reset.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/bl2_reset.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/aarch64/rcar_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_cpg_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_cpg_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_cpg_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_cpg_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_rcar_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_rcar_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_rcar_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_rcar_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_secure_setting.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_secure_setting.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_secure_setting.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl2_secure_setting.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl31_rcar_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl31_rcar_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl31_rcar_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl31_rcar_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl33_rcar_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl33_rcar_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl33_rcar_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/bl33_rcar_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/boot_init_dram_h3_es10.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/boot_init_dram_h3_ws11.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/boot_init_dram_m3_es10.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/init_dram_tbl_m3_es10.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/init_dram_tbl_m3_es10.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/init_dram_tbl_m3_es10.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/M3/init_dram_tbl_m3_es10.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/boot_init_dram.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/ddr.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/ddr.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/ddr.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/ddr/ddr.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/auth/rcarboot.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/avs/avs_driver.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/avs/avs_driver.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/avs/avs_driver.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/avs/avs_driver.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/dma/dma_driver.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/dma/dma_driver.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/dma/dma_driver.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/dma/dma_driver.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/error/bl2_int_error.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/error/bl2_int_error.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/error/bl2_int_error.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/error/bl2_int_error.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_memdrv.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_memdrv.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_memdrv.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_memdrv.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_rcar.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_rcar.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_rcar.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/io/io_rcar.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/memdrv/rcar_printf.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/rpc/rpc_driver.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/rpc/rpc_driver.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/rpc/rpc_driver.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/rpc/rpc_driver.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/scif/scif.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/scif/scif.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/scif/scif.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/scif/scif.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/timer/bl2_swdt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/timer/bl2_swdt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/timer/bl2_swdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/drivers/timer/bl2_swdt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/avs_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/avs_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/avs_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/avs_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_axi_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_axi_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_axi_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_axi_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_cpg_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_dma_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_dma_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_dma_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_dma_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_int_error.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_int_error.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_int_error.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_int_error.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_lifec_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_lifec_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_lifec_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_lifec_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_rpc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_rpc_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_rpc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_rpc_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_secure_setting.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_secure_setting.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_secure_setting.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_secure_setting.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_swdt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_swdt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_swdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/bl2_swdt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/dma_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/dma_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/dma_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/dma_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_memdrv.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_memdrv.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_memdrv.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_memdrv.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_rcar.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_rcar.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_rcar.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/io_rcar.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/pfc_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/pfc_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/pfc_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/pfc_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/platform_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/rpc_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/rpc_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/rpc_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/rpc_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/H3/pfc_init_h3.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/M3/pfc_init_m3.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/pfc/pfc_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/platform.mk rename to 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a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/H3/WS11/qos_init_h3_ws11.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/M3/qos_init_m3_es10.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/qos/qos_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_io_storage.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_io_storage.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_io_storage.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_io_storage.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_version.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_version.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/plat/renesas/rcar/rcar_version.h rename to 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Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/opteed_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed_macros.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed_macros.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed_macros.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/opteed/teesmc_opteed_macros.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tlkd/tlkd_pm.c similarity index 100% rename from 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/spd/tspd/tspd_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_common.c rename to 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_off.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_off.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_off.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_off.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_on.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_on.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_on.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_on.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_suspend.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_suspend.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_suspend.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_suspend.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_system_off.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_system_off.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_system_off.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/psci/psci_system_off.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/std_svc_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/std_svc_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/std_svc_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/services/std_svc/std_svc_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/Makefile diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/cert.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/cert.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/cert.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/cert.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/debug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/debug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/debug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/debug.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/ext.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/ext.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/ext.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/ext.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/key.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/key.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/key.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/key.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/sha.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/sha.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/sha.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/sha.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_cert.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_cert.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_cert.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_cert.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_ext.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_ext.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_ext.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_ext.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_key.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_key.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_key.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/include/tbbr/tbb_key.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/cert.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/cert.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/cert.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/cert.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/ext.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/ext.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/ext.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/ext.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/key.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/key.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/key.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/key.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/sha.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/sha.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/sha.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/sha.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/tbbr/tbb_cert.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/tbbr/tbb_cert.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/tbbr/tbb_cert.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/tbbr/tbb_cert.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/tbbr/tbb_ext.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/tbbr/tbb_ext.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/cert_create/src/tbbr/tbb_ext.c rename to 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/fip_create.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/fip_create.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/fip_create.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/firmware_image_package.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/firmware_image_package.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/firmware_image_package.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/firmware_image_package.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/uuid.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/uuid.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/Dummy_BL33/tools/fip_create/uuid.h rename to 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Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/auth.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/axi_bus_timeout.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/axi_bus_timeout.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/axi_bus_timeout.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/axi_bus_timeout.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/cpsr_acc.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/cpsr_acc.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/cpsr_acc.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/cpsr_acc.s diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/div.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/div.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/div.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/div.s diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/dma_driver.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/dma_driver.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/dma_driver.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/dma_driver.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/ecc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/ecc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/ecc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/ecc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/edc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/edc_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/edc_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/edc_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/error_output.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/error_output.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/error_output.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/error_output.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/gic_v2.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/gic_v2.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/gic_v2.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/gic_v2.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/lifec_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/lifec_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/lifec_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/lifec_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/llsl.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/llsl.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/llsl.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/llsl.s diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/llsr.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/llsr.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/llsr.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/llsr.s diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/mem.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/mem.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/mem.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/mem.s diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/mfis_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/mfis_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/mfis_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/mfis_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/micro_wait.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/micro_wait.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/micro_wait.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/micro_wait.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/printf.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/printf.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/printf.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/printf.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/protection_setting.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/protection_setting.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/protection_setting.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/protection_setting.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rcar_pwrc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rcar_pwrc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rcar_pwrc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rcar_pwrc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/report_exception.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/report_exception.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/report_exception.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/report_exception.s diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rom_api.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rom_api.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rom_api.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rom_api.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rpc_driver.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rpc_driver.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/common/rpc_driver.c rename to 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/V3M/ddr_init_v3m.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/V3M/ddr_init_v3m.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/V3M/ddr_init_v3m.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/boot_init_dram.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/boot_init_dram.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/boot_init_dram.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/boot_init_dram.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/boot_init_dram.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/boot_init_dram_regcheck.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/boot_init_dram_regcheck.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/boot_init_dram_regcheck.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/boot_init_dram_regcheck.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/init_dram_tbl_chk.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/init_dram_tbl_chk.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/init_dram_tbl_chk.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/init_dram_tbl_chk.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/init_dram_tbl_v3m.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/init_dram_tbl_v3m.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/init_dram_tbl_v3m.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/ddr/ddr_regcheck/init_dram_tbl_v3m.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/arm_gic.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/arm_gic.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/arm_gic.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/arm_gic.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/assert.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/assert.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/assert.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/assert.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/auth.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/auth.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/auth.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/auth.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/axi_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/axi_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/axi_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/axi_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/axi_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/axi_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/axi_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/axi_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/bit.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/bit.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/bit.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/bit.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/bl_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/bl_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/bl_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/bl_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpg_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpg_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpg_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpg_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpg_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpg_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpg_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpg_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpsr_acc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpsr_acc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpsr_acc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/cpsr_acc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/debug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/debug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/debug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/debug.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/dma_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/dma_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/dma_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/dma_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/dma_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/dma_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/dma_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/dma_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/ecc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/ecc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/ecc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/ecc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/edc_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/edc_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/edc_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/edc_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/error_output.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/error_output.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/error_output.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/error_output.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/gic_v2.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/gic_v2.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/gic_v2.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/gic_v2.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/lifec_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/loader_main.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/loader_main.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/loader_main.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/loader_main.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/machine/_types.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mfis_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/micro_wait.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/micro_wait.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/micro_wait.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mmio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mmio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mmio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/mmio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/pfc_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/pfc_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/pfc_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/pfc_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/protection_setting.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/protection_setting.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/protection_setting.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/protection_setting.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat390.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat390.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat390.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat390.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat780.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat780.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat780.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/qos_mstat780.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_addr.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_addr.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_addr.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_addr.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_pwrc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_pwrc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_pwrc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_pwrc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_version.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_version.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_version.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rcar_version.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rom_api.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rom_api.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rom_api.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rom_api.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/rpc_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdarg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdarg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdarg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdarg.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stddef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stddef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stddef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stddef.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/stdio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/string.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/string.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/string.h rename to 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Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/_types.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/cdefs.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/cdefs.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/cdefs.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/sys/cdefs.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/ths_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/ths_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/ths_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/include/ths_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/cpg_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/cpg_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/cpg_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/cpg_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader.ld.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/loader_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/rcar_addr.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/rcar_addr.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/rcar_addr.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/rcar_addr.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/rcar_version.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/rcar_version.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/rcar_version.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/rcar_version.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/stack.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/stack.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/stack.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/loader/stack.s diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/V3M/pfc_init_v3m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/V3M/pfc_init_v3m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/V3M/pfc_init_v3m.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/V3M/pfc_init_v3m.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/V3M/pfc_init_v3m.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/V3M/pfc_init_v3m.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/V3M/pfc_init_v3m.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/V3M/pfc_init_v3m.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/pfc.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/pfc.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/pfc.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/pfc.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/pfc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/pfc_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/pfc_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/pfc/pfc_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/V3M/qos_init_v3m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/V3M/qos_init_v3m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/V3M/qos_init_v3m.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/V3M/qos_init_v3m.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/V3M/qos_init_v3m.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/V3M/qos_init_v3m.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/V3M/qos_init_v3m.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/V3M/qos_init_v3m.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/qos/qos_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa0.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa0.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa0.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa0.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa0.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa0.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa0.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa0.ld.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa3.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa3.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa3.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa3.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa3.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa3.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa3.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_CortexR7_Loader/tools/dummy_create/sa3.ld.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/Makefile diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/div.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/div.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/div.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/div.s diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/micro_wait.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/micro_wait.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/micro_wait.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/micro_wait.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/printf.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/printf.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/printf.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/printf.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/scif.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/scif.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/scif.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/common/scif.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/debug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/debug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/debug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/debug.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/machine/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/machine/_stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/machine/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/machine/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/machine/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/machine/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/machine/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/machine/_types.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/micro_wait.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/micro_wait.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/micro_wait.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/mmio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/mmio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/mmio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/mmio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/reg_rcar_gen3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/reg_rcar_gen3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/reg_rcar_gen3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/reg_rcar_gen3.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/stdarg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/stdarg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/stdarg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/stdarg.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/stddef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/stddef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/V3M_Dummy_RTOS/include/stddef.h rename to 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Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/acknowledgements.md diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_arch_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_arch_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_arch_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_arch_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_context_mgmt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_context_mgmt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_context_mgmt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_context_mgmt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_entrypoint.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_entrypoint.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_entrypoint.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_entrypoint.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_exceptions.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_exceptions.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_exceptions.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch32/bl1_exceptions.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch64/bl1_arch_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch64/bl1_arch_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch64/bl1_arch_setup.c rename to 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch64/bl1_exceptions.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch64/bl1_exceptions.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/aarch64/bl1_exceptions.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1.ld.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_fwu.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_fwu.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_fwu.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_fwu.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl1/bl1_private.h diff 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2.ld.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_image_load.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_image_load.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_image_load.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_image_load.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_image_load_v2.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_image_load_v2.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_image_load_v2.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_image_load_v2.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/bl2/bl2_private.h rename to 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch32/pl011_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch32/pl011_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch32/pl011_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch32/pl011_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch64/pl011_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch64/pl011_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch64/pl011_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/aarch64/pl011_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/pl011_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/pl011_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/pl011_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl011/pl011_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl061/pl061_gpio.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl061/pl061_gpio.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl061/pl061_gpio.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/pl061/pl061_gpio.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp804/sp804_delay_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp804/sp804_delay_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp804/sp804_delay_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp804/sp804_delay_timer.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp805/sp805.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp805/sp805.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp805/sp805.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/sp805/sp805.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc400.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc400.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc400.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc400.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_common_private.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_common_private.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_common_private.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_common_private.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_dmc500.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_dmc500.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_dmc500.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc/tzc_dmc500.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc400/tzc400.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc400/tzc400.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc400/tzc400.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/arm/tzc400/tzc400.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/auth_mod.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/auth_mod.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/auth_mod.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/auth_mod.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/crypto_mod.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/crypto_mod.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/crypto_mod.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/crypto_mod.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/img_parser_mod.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/img_parser_mod.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/img_parser_mod.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/img_parser_mod.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_common.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_crypto.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509_parser.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509_parser.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509_parser.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/mbedtls/mbedtls_x509_parser.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/tbbr/tbbr_cot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/tbbr/tbbr_cot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/tbbr/tbbr_cot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/auth/tbbr/tbbr_cot.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/aarch64/cdns_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/aarch64/cdns_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/aarch64/cdns_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/aarch64/cdns_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/cdns_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/cdns_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/cdns_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/cadence/uart/cdns_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/skeleton_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/skeleton_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/skeleton_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch32/skeleton_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/skeleton_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/skeleton_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/skeleton_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/aarch64/skeleton_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/skeleton_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/skeleton_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/skeleton_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/console/skeleton_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/delay_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/delay_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/delay_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/delay_timer.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/generic_delay_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/generic_delay_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/generic_delay_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/delay_timer/generic_delay_timer.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/emmc/emmc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/emmc/emmc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/emmc/emmc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/emmc/emmc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/gpio/gpio.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/gpio/gpio.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/gpio/gpio.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/gpio/gpio.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_block.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_block.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_block.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_block.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_dummy.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_dummy.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_dummy.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_dummy.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_fip.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_fip.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_fip.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_fip.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_memmap.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_memmap.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_memmap.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_memmap.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_semihosting.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_semihosting.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_semihosting.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_semihosting.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_storage.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_storage.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_storage.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/io/io_storage.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/16550_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/16550_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/16550_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/16550_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/aarch64/16550_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/aarch64/16550_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/aarch64/16550_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/drivers/ti/uart/aarch64/16550_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci-aarch32.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci-aarch32.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dtb b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dtb similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dtb rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dtb diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dts b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dts similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dts rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dts diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-motherboard.dtsi b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-motherboard.dtsi similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-motherboard.dtsi rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/fvp-foundation-motherboard.dtsi diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/rtsm_ve-motherboard.dtsi b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/rtsm_ve-motherboard.dtsi similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/fdts/rtsm_ve-motherboard.dtsi rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/fdts/rtsm_ve-motherboard.dtsi diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl1/bl1.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl1/bl1.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl1/bl1.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl1/bl1.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl1/tbbr/tbbr_img_desc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl1/tbbr/tbbr_img_desc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl1/tbbr/tbbr_img_desc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl1/tbbr/tbbr_img_desc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl31/bl31.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl31/bl31.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl31/bl31.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl31/bl31.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl31/interrupt_mgmt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl31/interrupt_mgmt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl31/interrupt_mgmt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl31/interrupt_mgmt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/payloads/tlk.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/payloads/tlk.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/payloads/tlk.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/payloads/tlk.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/sp_min/platform_sp_min.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/sp_min/platform_sp_min.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/sp_min/platform_sp_min.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/sp_min/platform_sp_min.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/platform_tsp.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/platform_tsp.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/platform_tsp.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/platform_tsp.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/tsp.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/tsp.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/tsp.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/bl32/tsp/tsp.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/asm_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/asm_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/asm_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/asm_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/assert_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/assert_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/assert_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/assert_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/el3_common_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/el3_common_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/el3_common_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch32/el3_common_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/asm_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/asm_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/asm_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/asm_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/assert_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/assert_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/assert_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/assert_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/el3_common_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/el3_common_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/el3_common_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/aarch64/el3_common_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/asm_macros_common.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/asm_macros_common.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/asm_macros_common.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/asm_macros_common.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/bl_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/bl_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/bl_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/bl_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/debug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/debug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/debug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/debug.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/desc_image_load.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/desc_image_load.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/desc_image_load.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/desc_image_load.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/firmware_image_package.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/firmware_image_package.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/firmware_image_package.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/firmware_image_package.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/runtime_svc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/runtime_svc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/runtime_svc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/runtime_svc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/cot_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/cot_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/cot_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/cot_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/tbbr_img_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/tbbr_img_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/tbbr_img_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/common/tbbr/tbbr_img_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/arm_gic.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/arm_gic.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/arm_gic.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/arm_gic.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci400.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci400.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci400.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/cci400.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/ccn.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/ccn.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/ccn.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/ccn.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v2.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v2.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v2.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v2.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gic_v3.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv2.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv2.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv2.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv2.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/gicv3.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/nic_400.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/nic_400.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/nic_400.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/nic_400.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl011.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl011.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl011.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl011.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl061_gpio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl061_gpio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl061_gpio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/pl061_gpio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp804_delay_timer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp804_delay_timer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp804_delay_timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp804_delay_timer.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp805.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp805.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp805.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/sp805.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc400.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc400.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc400.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc400.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_dmc500.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_dmc500.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_dmc500.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/arm/tzc_dmc500.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_mod.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_mod.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_mod.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/auth_mod.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/crypto_mod.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/crypto_mod.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/crypto_mod.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/crypto_mod.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/img_parser_mod.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/img_parser_mod.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/img_parser_mod.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/img_parser_mod.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/auth/mbedtls/mbedtls_config.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/cadence/cdns_uart.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/cadence/cdns_uart.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/cadence/cdns_uart.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/cadence/cdns_uart.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/console.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/console.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/console.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/console.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/delay_timer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/delay_timer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/delay_timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/delay_timer.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/emmc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/emmc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/emmc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/emmc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/generic_delay_timer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/generic_delay_timer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/generic_delay_timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/generic_delay_timer.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/gpio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/gpio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/gpio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/gpio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_block.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_block.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_block.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_block.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_dummy.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_dummy.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_dummy.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_dummy.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_fip.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_fip.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_fip.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_fip.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_memmap.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_memmap.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_memmap.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_memmap.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_semihosting.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_semihosting.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_semihosting.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_semihosting.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_storage.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_storage.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_storage.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/io/io_storage.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/ti/uart/uart_16550.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/ti/uart/uart_16550.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/ti/uart/uart_16550.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/drivers/ti/uart/uart_16550.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch_helpers.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch_helpers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch_helpers.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/arch_helpers.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_helpers.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_helpers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_helpers.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_helpers.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch32/smcc_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch_helpers.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch_helpers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch_helpers.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/arch_helpers.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/smcc_helpers.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/smcc_helpers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/smcc_helpers.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/aarch64/smcc_helpers.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/bakery_lock.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/bakery_lock.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/bakery_lock.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/bakery_lock.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cassert.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cassert.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cassert.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cassert.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/aem_generic.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/aem_generic.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/aem_generic.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/aem_generic.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cortex_a32.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cortex_a32.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cortex_a32.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cortex_a32.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cpu_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cpu_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cpu_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch32/cpu_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/aem_generic.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/aem_generic.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/aem_generic.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/aem_generic.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a35.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a35.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a35.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a35.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a53.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a53.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a53.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a53.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a57.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a57.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a57.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a57.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a72.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a72.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a72.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a72.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a73.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a73.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a73.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cortex_a73.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cpu_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cpu_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cpu_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/cpu_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/denver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/denver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/denver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/cpus/aarch64/denver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch32/context.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch32/context.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch32/context.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch32/context.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch64/context.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch64/context.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch64/context.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/aarch64/context.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/context_mgmt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/context_mgmt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/context_mgmt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/context_mgmt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/cpu_data.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/cpu_data.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/cpu_data.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/el3_runtime/cpu_data.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/fdt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/fdt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/fdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/fdt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt_env.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt_env.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt_env.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/libfdt/libfdt_env.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/mmio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/mmio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/mmio.h rename to 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/pmf/pmf_helpers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/pmf/pmf_helpers.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/pmf/pmf_helpers.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci_compat.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci_compat.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/psci/psci_compat.h rename to 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_inttypes.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_inttypes.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_inttypes.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_inttypes.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_limits.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_limits.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_limits.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_limits.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/machine/_types.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stddef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stddef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stddef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stddef.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdio.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdlib.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdlib.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdlib.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/stdlib.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/string.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/string.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/string.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/string.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/strings.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/strings.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/strings.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/strings.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_null.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_null.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_null.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_null.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_timespec.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_timespec.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_timespec.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_timespec.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/_types.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/cdefs.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/cdefs.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/cdefs.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/cdefs.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/ctype.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/ctype.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/ctype.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/ctype.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/errno.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/errno.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/errno.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/errno.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/limits.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/limits.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/limits.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/limits.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdarg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdarg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdarg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdarg.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/stdint.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/timespec.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/timespec.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/timespec.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/timespec.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/types.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/uuid.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/uuid.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/uuid.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/sys/uuid.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/time.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/time.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/time.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/time.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_strings.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_strings.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_strings.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_strings.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_time.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_time.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_time.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/stdlib/xlocale/_time.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/utils.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/utils.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/utils.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/utils.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/xlat_tables.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/xlat_tables.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/xlat_tables.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/lib/xlat_tables.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_oid.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_oid.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_oid.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_arm_oid.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_css_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_css_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_css_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/board_css_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/drivers/norflash.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/drivers/norflash.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/drivers/norflash.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/drivers/norflash.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/v2m_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/v2m_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/v2m_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/board/common/v2m_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/arm_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/arm_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/arm_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/arm_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/cci_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/cci_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/cci_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/aarch64/cci_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_config.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/arm_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/plat_arm.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/plat_arm.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/plat_arm.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/common/plat_arm.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/css/common/aarch64/css_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/css/common/aarch64/css_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/css/common/aarch64/css_macros.S rename to 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/arm/soc/common/soc_css_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/common/common_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/common/common_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/common/common_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/common/common_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/common/platform.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/common/platform.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/common/platform.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/plat/common/platform.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/services/std_svc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/services/std_svc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/include/services/std_svc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/include/services/std_svc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/cache_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/cache_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/cache_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/cache_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/misc_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/misc_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/misc_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch32/misc_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/cache_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/cache_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/cache_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/cache_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/misc_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/misc_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/misc_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/misc_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/xlat_tables.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/xlat_tables.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/aarch64/xlat_tables.c rename to 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch32/cpu_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch32/cpu_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch32/cpu_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/aem_generic.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/aem_generic.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/aem_generic.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/aem_generic.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a35.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a35.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a35.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a35.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a53.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a53.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a53.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a53.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a57.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a57.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a57.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a57.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a72.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a72.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a72.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a72.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a73.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a73.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a73.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cortex_a73.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cpu_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cpu_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/cpus/aarch64/cpu_helpers.S rename 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/context_mgmt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/context_mgmt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/context_mgmt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/cpu_data.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/cpu_data.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/cpu_data.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch32/cpu_data.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context_mgmt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context_mgmt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context_mgmt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/context_mgmt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/cpu_data.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/cpu_data.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/cpu_data.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/aarch64/cpu_data.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/cpu_data_array.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/cpu_data_array.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/cpu_data_array.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/el3_runtime/cpu_data_array.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_addresses.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_addresses.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_addresses.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_addresses.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_empty_tree.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_empty_tree.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_empty_tree.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_empty_tree.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_ro.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_ro.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_ro.c rename to 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from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_sw.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_sw.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_wip.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_wip.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_wip.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/fdt_wip.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt_internal.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt_internal.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt_internal.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/libfdt/libfdt_internal.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_coherent.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_coherent.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_coherent.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_coherent.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_normal.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_normal.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_normal.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/bakery/bakery_lock_normal.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch32/spinlock.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch32/spinlock.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch32/spinlock.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch32/spinlock.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch64/spinlock.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch64/spinlock.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch64/spinlock.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/aarch64/spinlock.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/spinlock.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/spinlock.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/spinlock.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/locks/exclusive/spinlock.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_smc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_smc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_smc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/pmf/pmf_smc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch32/psci_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch32/psci_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch32/psci_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch32/psci_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch64/psci_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch64/psci_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch64/psci_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/aarch64/psci_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_lib.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_lib.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_lib.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_lib.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_off.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_off.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_off.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_off.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_on.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_on.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_on.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_on.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_stat.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_stat.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_stat.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_stat.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_suspend.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_suspend.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_suspend.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_suspend.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_system_off.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_system_off.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_system_off.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/psci/psci_system_off.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch32/semihosting_call.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch32/semihosting_call.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch32/semihosting_call.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch32/semihosting_call.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch64/semihosting_call.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch64/semihosting_call.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch64/semihosting_call.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/aarch64/semihosting_call.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/semihosting.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/semihosting.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/semihosting.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/semihosting/semihosting.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/abort.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/abort.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/abort.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/abort.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/assert.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/assert.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/assert.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/assert.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/exit.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/exit.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/exit.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/exit.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/mem.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/mem.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/mem.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/mem.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/printf.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/printf.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/printf.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/printf.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/putchar.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/putchar.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/putchar.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/putchar.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/puts.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/puts.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/puts.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/puts.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/sscanf.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/sscanf.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/sscanf.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/sscanf.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/stdlib.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/stdlib.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/stdlib.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/stdlib.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strchr.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strchr.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strchr.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strchr.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strcmp.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strcmp.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strcmp.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strcmp.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strlen.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strlen.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strlen.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strlen.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strncmp.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strncmp.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strncmp.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/strncmp.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/subr_prf.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/subr_prf.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/subr_prf.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/stdlib/subr_prf.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch32/xlat_tables.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch32/xlat_tables.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch32/xlat_tables.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch32/xlat_tables.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch64/xlat_tables.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch64/xlat_tables.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch64/xlat_tables.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/aarch64/xlat_tables.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/lib/xlat_tables/xlat_tables_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/license.md b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/license.md similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/license.md rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/license.md diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_env.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_env.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_env.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_env.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_macros.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_macros.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_macros.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/build_macros.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/cygwin.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/cygwin.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/cygwin.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/cygwin.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/msys.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/msys.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/msys.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/msys.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/plat_helpers.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/plat_helpers.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/plat_helpers.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/plat_helpers.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/tbbr/tbbr_tools.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/tbbr/tbbr_tools.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/tbbr/tbbr_tools.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/tbbr/tbbr_tools.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/unix.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/unix.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/unix.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/unix.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/windows.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/windows.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/windows.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/make_helpers/windows.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch32/board_arm_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch32/board_arm_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch32/board_arm_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch32/board_arm_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch64/board_arm_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch64/board_arm_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch64/board_arm_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/aarch64/board_arm_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_arm_trusted_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_arm_trusted_boot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_arm_trusted_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_arm_trusted_boot.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_common.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_common.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_common.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/board_css_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/drivers/norflash/norflash.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/drivers/norflash/norflash.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/drivers/norflash/norflash.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/drivers/norflash/norflash.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotpk_rsa.der b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotpk_rsa.der similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotpk_rsa.der rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotpk_rsa.der diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch32/fvp_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch32/fvp_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch32/fvp_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch32/fvp_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch64/fvp_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch64/fvp_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch64/fvp_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/aarch64/fvp_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c similarity index 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Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl1_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2u_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2u_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2u_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2u_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl31_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl31_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl31_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_bl31_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_def.h similarity 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_security.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_security.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_security.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_trusted_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_trusted_boot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_trusted_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/fvp_trusted_boot.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_oid.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_oid.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_oid.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/include/platform_oid.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/platform.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/platform.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/sp_min-fvp.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/sp_min-fvp.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/sp_min-fvp.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/sp_min/sp_min-fvp.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/fvp_tsp_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/fvp_tsp_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/fvp_tsp_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/fvp_tsp_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/tsp-fvp.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/tsp-fvp.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/tsp-fvp.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/fvp/tsp/tsp-fvp.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/aarch64/juno_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/aarch64/juno_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/aarch64/juno_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/aarch64/juno_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_oid.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_oid.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_oid.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/include/platform_oid.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_bl1_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_bl1_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_bl1_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_bl1_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_err.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_err.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_err.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_err.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_security.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_security.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_security.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_security.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/juno_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/platform.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/platform.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/tsp/tsp-juno.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/tsp/tsp-juno.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/tsp/tsp-juno.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/board/juno/tsp/tsp-juno.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch32/arm_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/aarch64/arm_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_fwu.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_fwu.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_fwu.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_fwu.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl1_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2u_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2u_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2u_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl2u_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl31_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl31_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl31_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_bl31_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_cci.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_cci.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_cci.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_cci.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_ccn.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_ccn.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_ccn.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_ccn.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_common.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv2.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv2.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv2.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv2.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv3.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv3.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv3.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv3.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv3_legacy.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv3_legacy.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv3_legacy.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_gicv3_legacy.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_image_load.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_image_load.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_image_load.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_image_load.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_io_storage.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_io_storage.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_io_storage.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_io_storage.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_tzc400.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_tzc400.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_tzc400.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_tzc400.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_tzc_dmc500.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_tzc_dmc500.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_tzc_dmc500.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/arm_tzc_dmc500.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/common/tsp/arm_tsp_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/aarch64/css_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/aarch64/css_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/aarch64/css_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/aarch64/css_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl1_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl1_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl1_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl1_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2u_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2u_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2u_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_bl2u_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_common.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_common.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_common.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_common.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_mhu.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scp_bootloader.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_scpi.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/css/common/css_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css_security.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css_security.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css_security.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/arm/soc/common/soc_css_security.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/plat_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/plat_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/plat_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/plat_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/platform_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/platform_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch32/platform_helpers.S rename to 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_psci_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_psci_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_psci_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/plat_psci_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_mp_stack.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_mp_stack.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_mp_stack.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_mp_stack.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_up_stack.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_up_stack.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_up_stack.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/aarch64/platform_up_stack.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_bl1_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_bl1_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_bl1_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_bl1_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gic.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gic.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gic.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gic.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv2.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv2.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv2.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv2.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv3.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv3.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv3.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_gicv3.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_psci_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_psci_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_psci_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/common/plat_psci_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/aarch64/plat_helpers_compat.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/aarch64/plat_helpers_compat.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/aarch64/plat_helpers_compat.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/aarch64/plat_helpers_compat.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_compat.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_compat.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_compat.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_compat.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_pm_compat.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_pm_compat.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_pm_compat.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_pm_compat.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_topology_compat.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_topology_compat.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_topology_compat.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/compat/plat_topology_compat.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/custom/oem_svc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/8250_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/8250_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/8250_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/8250_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/uart8250.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/uart8250.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/uart8250.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/drivers/uart/uart8250.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_plat_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/common/mtk_sip_svc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/aarch64/plat_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/aarch64/plat_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/aarch64/plat_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/aarch64/plat_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31.ld.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31_plat_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31_plat_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31_plat_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/bl31_plat_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/drivers/timer/mt_cpuxgpt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/mcucfg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/mcucfg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/mcucfg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/mcucfg.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_sip_calls.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_sip_calls.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_sip_calls.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/plat_sip_calls.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/platform_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/platform_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/platform_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/power_tracer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/power_tracer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/power_tracer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/power_tracer.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/scu.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/scu.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/scu.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/scu.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/spm.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/spm.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/spm.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/include/spm.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_delay_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_delay_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_delay_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_delay_timer.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_mt_gic.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_mt_gic.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_mt_gic.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_mt_gic.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/plat_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/platform.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/platform.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/power_tracer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/power_tracer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/power_tracer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/power_tracer.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/scu.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/scu.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/scu.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt6795/scu.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/plat_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/plat_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/plat_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/plat_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/platform_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/platform_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/platform_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/platform_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/bl31_plat_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/bl31_plat_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/bl31_plat_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/bl31_plat_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/crypt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/mtcmos.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/rtc/rtc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/rtc/rtc.c similarity index 100% rename from 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mcucfg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mcucfg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mcucfg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mcucfg.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mt8173_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mt8173_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mt8173_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/mt8173_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_sip_calls.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_sip_calls.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_sip_calls.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/plat_sip_calls.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/include/platform_def.h similarity index 100% rename from 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_sip_calls.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_sip_calls.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_sip_calls.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_sip_calls.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/plat_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/mediatek/mt8173/platform.mk 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/aarch64/plat_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/aarch64/plat_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/aarch64/plat_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/aarch64/plat_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/dt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/dt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/dt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/dt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/include/plat_macros.S similarity index 100% rename from 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl1_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl1_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl1_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl1_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl2_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl2_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl2_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl2_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl31_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl31_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl31_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_bl31_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_gic.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_gic.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_gic.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_gic.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_io_storage.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_io_storage.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_io_storage.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_io_storage.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/qemu/qemu_private.h rename to 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/aarch64/rcar_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_cpg_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_cpg_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_cpg_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_cpg_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_rcar_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_rcar_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_rcar_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl2_rcar_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl31_rcar_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl31_rcar_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl31_rcar_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/bl31_rcar_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/auth/rcarboot.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/avs/avs_driver.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/avs/avs_driver.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/avs/avs_driver.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/avs/avs_driver.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/board/board.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/cpld/ulcb_cpld.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/cpld/ulcb_cpld.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/cpld/ulcb_cpld.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/cpld/ulcb_cpld.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/dma/dma_driver.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/dma/dma_driver.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/dma/dma_driver.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/dma/dma_driver.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_cmd.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_cmd.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_cmd.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_cmd.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_init.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_interrupt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_interrupt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_interrupt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_interrupt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_mount.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_mount.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/emmc/emmc_mount.c rename to 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Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/iic_dvfs/iic_dvfs.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_emmcdrv.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_emmcdrv.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_emmcdrv.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_emmcdrv.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_memdrv.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_memdrv.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_memdrv.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_memdrv.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_rcar.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_rcar.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_rcar.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/io/io_rcar.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_console.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_console.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_console.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_console.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/memdrv/rcar_printf.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_call_sram.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_call_sram.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_call_sram.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_call_sram.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/pwrc/rcar_pwrc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rom/rom_api.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rom/rom_api.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rom/rom_api.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rom/rom_api.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rpc/rpc_driver.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rpc/rpc_driver.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rpc/rpc_driver.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/rpc/rpc_driver.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/scif/scif.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/scif/scif.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/scif/scif.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/scif/scif.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/timer/bl2_swdt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/timer/bl2_swdt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/timer/bl2_swdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/timer/bl2_swdt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/wait/micro_wait.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/wait/micro_wait.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/wait/micro_wait.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/drivers/wait/micro_wait.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/avs_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/avs_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/avs_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/avs_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_init.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_init.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_init.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_init.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_cpg_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_dma_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_dma_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_dma_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_dma_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_int_error.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_int_error.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_int_error.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_int_error.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_rpc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_rpc_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_rpc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_rpc_register.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_swdt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_swdt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_swdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/bl2_swdt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/dma_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/dma_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/dma_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/dma_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_config.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_hal.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_hal.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_hal.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_hal.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_registers.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_registers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_registers.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_registers.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_std.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_std.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_std.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/emmc_std.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_emmcdrv.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_emmcdrv.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_emmcdrv.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_emmcdrv.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_memdrv.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_memdrv.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_memdrv.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_memdrv.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_rcar.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_rcar.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_rcar.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/io_rcar.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/micro_wait.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/micro_wait.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/micro_wait.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/platform_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rcar_pm.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rcar_pm.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rcar_pm.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rcar_pm.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rom_api.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rom_api.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rom_api.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rom_api.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rpc_driver.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rpc_driver.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rpc_driver.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/rpc_driver.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/platform.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/platform.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_io_storage.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_io_storage.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_io_storage.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_io_storage.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_version.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_version.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_version.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/renesas/rcar/rcar_version.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/plat_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/plat_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/plat_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/plat_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/platform_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/platform_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/platform_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/aarch64/platform_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/bl31_plat_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/bl31_plat_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/bl31_plat_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/bl31_plat_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/drivers/pmu/pmu_com.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/drivers/pmu/pmu_com.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/drivers/pmu/pmu_com.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/drivers/pmu/pmu_com.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_macros.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_params.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_params.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_params.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_params.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/plat_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/rockchip_sip_svc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/rockchip_sip_svc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/rockchip_sip_svc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/include/rockchip_sip_svc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/params_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/params_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/params_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/params_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/plat_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv2.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv2.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv2.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv2.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv3.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv3.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv3.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_gicv3.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_sip_svc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_sip_svc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_sip_svc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/common/rockchip_sip_svc.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h rename to 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/soc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/soc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/soc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/soc.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/plat_sip_calls.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/plat_sip_calls.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/plat_sip_calls.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/plat_sip_calls.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/platform_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/platform_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/platform_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/include/platform_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/plat_sip_calls.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/plat_sip_calls.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/plat_sip_calls.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/plat_sip_calls.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3368/platform.mk similarity index 100% rename from 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/rk3399_gpio.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/rk3399_gpio.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/rk3399_gpio.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/rk3399_gpio.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S diff --git 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/platform.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/platform.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/rk3399_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/rk3399_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/rk3399_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/rockchip/rk3399/rk3399_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/aarch64/zynqmp_common.c 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_topology.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_topology.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_topology.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_topology.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_zynqmp.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_zynqmp.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_zynqmp.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/plat_zynqmp.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/platform.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/platform.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/platform.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/platform.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_common.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_defs.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_defs.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_defs.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_defs.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_ipi.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/sip_svc_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/sip_svc_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/sip_svc_setup.c rename to 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a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_def.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/readme.md b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/readme.md similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/readme.md rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/readme.md diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/opteed_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/teesmc_opteed.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/opteed/teesmc_opteed.h similarity index 100% rename from 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tlkd/tlkd_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd.mk diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_common.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_helpers.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_helpers.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_helpers.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_helpers.S diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_pm.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_pm.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_pm.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_pm.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_private.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_private.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_private.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/spd/tspd/tspd_private.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/std_svc/std_svc_setup.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/std_svc/std_svc_setup.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/services/std_svc/std_svc_setup.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/services/std_svc/std_svc_setup.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/Makefile diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cert.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cert.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cert.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cert.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cmd_opt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cmd_opt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cmd_opt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/cmd_opt.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/debug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/debug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/debug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/debug.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/ext.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/ext.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/ext.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/ext.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/key.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/key.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/key.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/key.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/sha.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/sha.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/sha.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/sha.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_cert.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_cert.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_cert.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_cert.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_ext.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_ext.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_ext.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_ext.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_key.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_key.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_key.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_key.h diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cert.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cert.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cert.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cert.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cmd_opt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cmd_opt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cmd_opt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/cmd_opt.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/ext.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/ext.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/ext.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/ext.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/key.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/key.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/key.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/key.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/main.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/sha.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/sha.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/sha.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/sha.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_cert.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_cert.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_cert.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_cert.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_ext.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_ext.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_ext.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_ext.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_key.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_key.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_key.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_key.c diff --git a/Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/dummy_create/makefile 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/tbbr_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/tbbr_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v3m/src/arm-trusted-firmware/tools/fiptool/tbbr_config.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/boot_mon.s diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/stack.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/stack.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/stack.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch32_boot/stack.s diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/boot_mon.s diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/d_armasm.s diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/stack.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/stack.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/stack.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/AArch64_boot/stack.s diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/LICENSE.md b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/LICENSE.md similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/LICENSE.md rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/LICENSE.md diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/cert_param.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/cert_param.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/cert_param.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/cert_param.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/common.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/devdrv.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/devdrv.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/devdrv.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/devdrv.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/generic_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/generic_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/generic_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/generic_timer.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/hscifdrv0.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/hscifdrv0.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/hscifdrv0.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/hscifdrv0.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/bit.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/bit.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/bit.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/bit.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/common.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/devdrv.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/devdrv.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/devdrv.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/devdrv.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/hscifdrv0.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/hscifdrv0.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/hscifdrv0.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/hscifdrv0.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/init_scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/init_scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/init_scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/init_scif.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/main.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/main.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/main.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/main.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/mem_io.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/mem_io.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/mem_io.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/mem_io.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/reg_rcargen3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/reg_rcargen3.h similarity index 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Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/scifdrv2.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/scifdrv2.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/scifdrv3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/scifdrv3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/scifdrv3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/scifdrv3.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/timer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/timer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/timer.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/include/types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/include/types.h rename to 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b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/makefile diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/mem_io.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/mem_io.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/mem_io.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/mem_io.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_cr7.def b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_cr7.def similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_cr7.def rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_cr7.def diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_smon.def b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_smon.def similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_smon.def rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_smon.def diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_smon_rgid_on.def b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_smon_rgid_on.def similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_smon_rgid_on.def rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_smon_rgid_on.def diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_tee.def b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_tee.def similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_tee.def rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_tee.def diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_tee_rgid_on.def b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/memory_tee_rgid_on.def similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/memory_tee_rgid_on.def rename to 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--git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/scifdrv0_v3h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/scifdrv0_v3h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/scifdrv0_v3h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/scifdrv0_v3h.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/scifdrv2.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/scifdrv2.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/scifdrv2.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/scifdrv2.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/scifdrv3.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/scifdrv3.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/scifdrv3.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/scifdrv3.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/vmsatable.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/vmsatable.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_CA76/vmsatable.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_CA76/vmsatable.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/Makefile diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/log.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/log.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/log.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/log.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/mem_io.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/mem_io.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/mem_io.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/mem_io.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/micro_wait.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/micro_wait.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/micro_wait.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/micro_wait.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/remap.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/remap.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/remap.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/remap.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/scif.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/scif.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/wdt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/wdt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/common/wdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/common/wdt.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/fw/dummy_fw_main.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/fw/vecttbl.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/fw/vecttbl.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/fw/vecttbl.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/fw/vecttbl.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/dummy_fw_main.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/dummy_fw_main.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/dummy_fw_main.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/dummy_fw_main.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/log.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/log.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/log.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/log.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/mem_io.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/mem_io.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/mem_io.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/mem_io.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/micro_wait.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/micro_wait.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/micro_wait.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/rcar_def.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/remap.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/remap.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/remap.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/remap.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/remap_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/remap_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/remap_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/remap_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/rst_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/rst_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/rst_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/rst_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/scif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/scif_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/scif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/scif_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/wdt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/wdt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_FW/include/wdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_FW/include/wdt.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/Makefile diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/common/div.s b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/common/div.s similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/common/div.s rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/common/div.s diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/common/generic_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/common/generic_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/common/generic_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/common/generic_timer.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/common/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/common/scif.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/common/scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/common/scif.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/debug.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/debug.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/debug.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/debug.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/machine/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/machine/_stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/machine/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/machine/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/machine/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/machine/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/machine/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/machine/_types.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/reg_rcar_gen3.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/reg_rcar_gen3.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/reg_rcar_gen3.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/reg_rcar_gen3.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/stdarg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/stdarg.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/stdarg.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/stdarg.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/stddef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/stddef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/stddef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/stddef.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/stdint.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/stdio.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/stdio.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/stdio.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/stdio.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/string.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/string.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/string.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/string.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_null.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_null.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_null.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_null.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_stdint.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_stdint.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_stdint.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_stdint.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/sys/_types.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/sys/cdefs.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/sys/cdefs.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/sys/cdefs.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/sys/cdefs.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/timer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/timer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/include/timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/include/timer.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos.ld.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core1.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core1.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core1.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core1.ld.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core2.ld.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core2.ld.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core2.ld.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_core2.ld.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Dummy_RTOS/rtos/rtos_main.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/Makefile diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c new file mode 100644 index 00000000..2d385566 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_s4.c @@ -0,0 +1,2468 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Configuration table + ******************************************************************************/ +/****************************************************************************** + * @file cnf_tbl.c + * - Version : 0.02 + * @brief Configuration table for S4. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 23.05.2022 0.02 Integration of S4 and V4H + * Renamed from conf_tbl.c to cnf_tbl_s4.c. + * : 23.01.2023 0.03 Update the set value of Region ID. + * Add the RAM access protection + * setting value tables. + *****************************************************************************/ + +#include +#include +#include +#include +#include + +#define RTDMA_EN (0x00000002U) +#define SYSDMA_EN (0x0000BFC4U) + +#pragma ghs section rodata=".qosbw_tbl" +const QOS_SETTING_TABLE g_qosbw_tbl[] = { + [0] = {0x000C04020000FFFFULL, 0x00100000031FFC01ULL}, + [1] = {0x000C04080000FFFFULL, 0x00100000031FFC01ULL}, + [2] = {0x000C08100000FFFFULL, 0x00100000031FFC01ULL}, + [3] = {0x000000000000FFFFULL, 0x0000000000000000ULL}, + [4] = {0x000000000000FFFFULL, 0x0000000000000000ULL}, + [5] = {0x000C04020000FFFFULL, 0x00100000031FFC01ULL}, + [6] = {0x000C04080000FFFFULL, 0x00100000031FFC01ULL}, + [7] = {0x000C08100000FFFFULL, 0x00200000031FFC01ULL}, + [8] = {0x000000000000FFFFULL, 0x0000000000000000ULL}, + [9] = {0x000000000000FFFFULL, 0x0000000000000000ULL}, + [10] = {0x000C04020000FFFFULL, 0x00100000031FFC01ULL}, + [11] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [12] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [13] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [14] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [15] = {0x000C04020000FFFFULL, 0x00100000031FFC01ULL}, + [16] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [17] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [18] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [19] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [20] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [21] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [22] = {0x000C04280000FFFFULL, 0x00100000031FFC01ULL}, + [23] = {0x000000000000FFFFULL, 0x0000000000000000ULL}, + [24] = {0x000C08280000FFFFULL, 0x00100000031FFC01ULL}, + [25] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [26] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [27] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [28] = {0x000C14280000FFFFULL, 0x00100000031FFC01ULL}, + [29] = {0x000000000000FFFFULL, 0x0000000000000000ULL}, + [30] = {0x001008280000FFFFULL, 0x00100000031FFC01ULL}, + [31] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [32] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [33] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [34] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [35] = {0x000C04020000FFFFULL, 0x00100000031FFC01ULL}, + [36] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [37] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [38] = {0x001404100000FFFFULL, 0x00100000031FFC01ULL}, + [39] = {0x001404100000FFFFULL, 0x00100000031FFC01ULL}, + [40] = {0x000C1C6F0000FFFFULL, 0x00100000031FFC01ULL}, + [41] = {0x000C103F0000FFFFULL, 0x00100000031FFC01ULL}, + [42] = {0x000C04100000FFFFULL, 0x00100000031FFC01ULL}, + [43] = {0x000C144F0000FFFFULL, 0x00100000031FFC01ULL}, + [44] = {0x001408200000FFFFULL, 0x00100000031FFC01ULL}, + [45] = {0x0014185F0000FFFFULL, 0x00100000031FFC01ULL}, + [46] = {0x000C0C300000FFFFULL, 0x00100000031FFC01ULL}, + [47] = {0x000C1C6F0000FFFFULL, 0x00100000031FFC01ULL} +}; + + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".qoswt_tbl" +const QOS_SETTING_TABLE g_qoswt_tbl[] = { + [0] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [1] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [2] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [3] = {0x0000000000000000ULL, 0x0000000000000000ULL}, + [4] = {0x0000000000000000ULL, 0x0000000000000000ULL}, + [5] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [6] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [7] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [8] = {0x0000000000000000ULL, 0x0000000000000000ULL}, + [9] = {0x0000000000000000ULL, 0x0000000000000000ULL}, + [10] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [11] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [12] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [13] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [14] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [15] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [16] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [17] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [18] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [19] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [20] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [21] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [22] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [23] = {0x0000000000000000ULL, 0x0000000000000000ULL}, + [24] = {0x000C08280000FFF0ULL, 0x0000000000000000ULL}, + [25] = {0x000C00000000FFF0ULL, 0x0000000000000000ULL}, + [26] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [27] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [28] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [29] = {0x0000000000000000ULL, 0x0000000000000000ULL}, + [30] = {0x001008280000C010ULL, 0x0000000000000000ULL}, + [31] = {0x000C00000000C010ULL, 0x0000000000000000ULL}, + [32] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [33] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [34] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [35] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [36] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [37] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [38] = {0x001404100000FFF0ULL, 0x0000000000000000ULL}, + [39] = {0x001404100000C010ULL, 0x0000000000000000ULL}, + [40] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [41] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [42] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [43] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [44] = {0x0014000000000000ULL, 0x0000000000000000ULL}, + [45] = {0x0014000000000000ULL, 0x0000000000000000ULL}, + [46] = {0x000C000000000000ULL, 0x0000000000000000ULL}, + [47] = {0x000C000000000000ULL, 0x0000000000000000ULL} +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + + +#pragma ghs section rodata=".rgid_m_tbl" +const REGION_ID_SETTING_TABLE g_rgid_m_tbl[] = { + [0] = {0xFCF81000U, 0x00000002U}, /* RGIDM_MODID[0]:PCI0 */ + [1] = {0xFCF81020U, 0x00000002U}, /* RGIDM_MODID[1]:PCI1 */ + [2] = {0xFCF81024U, 0x00000002U}, /* RGIDM_MODID[2]:PCI2 */ + [3] = {0xFCF81034U, 0x00000002U}, /* RGIDM_MODID[3]:PCI3 */ + [4] = {0xFCF81038U, 0x00000002U}, /* RGIDM_MODID[4]:RSW2 */ + [5] = {0xFCF8103CU, 0x00000001U}, /* RGIDM_MODID[5]:RSW2SEC */ + [6] = {0xFCF81044U, 0x00000002U}, /* RGIDM_MODID[6]:UFS */ + [7] = {0xFDC21004U, 0x00000000U}, /* RGIDM_MODID[7]:CR0 */ + [8] = {0xFDC2100CU, 0x00000000U}, /* RGIDM_MODID[8]:ICUMX */ + [9] = {0xFDC21010U, 0x00000000U}, /* RGIDM_MODID[9]:ICUMX */ + [10] = {0xFDC21014U, 0x00000000U}, /* RGIDM_MODID[10]:ICUMX */ + [11] = {0xFD441018U, 0x00000001U}, /* RGIDM_MODID[11]:CR52SS */ + [12] = {0xFD44101CU, 0x00000003U}, /* RGIDM_MODID[12]:CSD */ + [13] = {0xFD441024U, 0x00000002U}, /* RGIDM_MODID[13]:INTAP0 */ + [14] = {0xFD441068U, 0x00000005U}, /* RGIDM_MODID[14]:ControlDomain0 */ + [15] = {0xFD44106CU, 0x00000005U}, /* RGIDM_MODID[15]:ControlDomain1 */ + [16] = {0xFD4410A0U, 0x00000005U}, /* RGIDM_MODID[16]:ControlDomain2 */ + [17] = {0xFD4410ACU, 0x00000005U}, /* RGIDM_MODID[17]:ControlDomain3 */ + [18] = {0xFD4410B0U, 0x00000005U}, /* RGIDM_MODID[18]:ControlDomain4 */ + [19] = {0xFD4410B4U, 0x00000005U}, /* RGIDM_MODID[19]:ControlDomain5 */ + [20] = {0xFD4410B8U, 0x00000005U}, /* RGIDM_MODID[20]:ControlDomain6 */ + [21] = {0xFD4410BCU, 0x00000005U}, /* RGIDM_MODID[21]:ControlDomain7 */ + [22] = {0xFD4410C0U, 0x00000005U}, /* RGIDM_MODID[22]:ControlDomain8 */ + [23] = {0xFD4410C4U, 0x00000005U}, /* RGIDM_MODID[23]:ControlDomain9 */ + [24] = {0xFD441078U, 0x00000005U}, /* RGIDM_MODID[24]:ControlDomain10 */ + [25] = {0xFD44107CU, 0x00000005U}, /* RGIDM_MODID[25]:ControlDomain11 */ + [26] = {0xFD441080U, 0x00000005U}, /* RGIDM_MODID[26]:ControlDomain12 */ + [27] = {0xFD441084U, 0x00000004U}, /* RGIDM_MODID[27]:ControlDomain13 */ + [28] = {0xFD441088U, 0x00000004U}, /* RGIDM_MODID[28]:ControlDomain14 */ + [29] = {0xFD44108CU, 0x00000005U}, /* RGIDM_MODID[29]:ControlDomain15 */ + [30] = {0xFD441090U, 0x00000005U}, /* RGIDM_MODID[30]:ControlDomain16 */ + [31] = {0xFD441094U, 0x00000005U}, /* RGIDM_MODID[31]:ControlDomain17 */ + [32] = {0xFD441098U, 0x00000005U}, /* RGIDM_MODID[32]:ControlDomain18 */ + [33] = {0xFD44109CU, 0x00000005U}, /* RGIDM_MODID[33]:ControlDomain19 */ + [34] = {0xFD4410A4U, 0x00000005U}, /* RGIDM_MODID[34]:ControlDomain20 */ + [35] = {0xFD4410A8U, 0x00000003U}, /* RGIDM_MODID[35]:ControlDomain21 */ + [36] = {0xFF861018U, 0x00000002U}, /* RGIDM_MODID[36]:FBABUSTOP0 */ + [37] = {0xFF86101CU, 0x00000002U}, /* RGIDM_MODID[37]:FBABUSTOP1 */ + [38] = {0xFCB51020U, 0x00000002U}, /* RGIDM_MODID[38]:SDHI0 */ + [39] = {0xFF811000U, 0x00000002U}, /* RGIDM_MODID[39]:AXMM2AXSTM */ + [40] = {0xFF811004U, 0x00000003U}, /* RGIDM_MODID[40]:CSDE0 */ + [41] = {0xFF811008U, 0x00000003U}, /* RGIDM_MODID[41]:CSDE1 */ + [42] = {0xFDDBF500U, 0x0000000EU}, /* RGIDM_MODID[42]:VRAM_R */ + [43] = {0xFDDBF504U, 0x0000000EU}, /* RGIDM_MODID[43]:VRAM_W */ + +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_r_tbl" +const REGION_ID_SETTING_TABLE g_rgid_r_tbl[] = { + [0] = {0xFD482000U, 0x0000002EU}, /* RGIDR_MODID[0]:ARMGC0 */ + [1] = {0xFD482004U, 0x0000002EU}, /* RGIDR_MODID[1]:ARMGC1 */ + [2] = {0xFD482008U, 0x00000000U}, /* RGIDR_MODID[2]:ARMGC2 */ + [3] = {0xFD48200CU, 0x0000003FU}, /* RGIDR_MODID[3]:ARRT00 */ + /* After setting */ /* RGIDR_MODID[4]:ARRT01 */ + /* After setting */ /* RGIDR_MODID[5]:ARRT02 */ + [4] = {0xFD482018U, 0x0000003FU}, /* RGIDR_MODID[6]:ARRT03 */ + [5] = {0xFD48201CU, 0x0000003FU}, /* RGIDR_MODID[7]:ARRT04 */ + [6] = {0xFD482020U, 0x0000003FU}, /* RGIDR_MODID[8]:ARRT05 */ + [7] = {0xFD482024U, 0x0000003FU}, /* RGIDR_MODID[9]:ARRT06 */ + [8] = {0xFD482028U, 0x0000003FU}, /* RGIDR_MODID[10]:ARRT07 */ + [9] = {0xFD48202CU, 0x00000000U}, /* RGIDR_MODID[11]:ARRT08 */ + [10] = {0xFD482030U, 0x00000011U}, /* RGIDR_MODID[12]:LIFEC0 */ + [11] = {0xFD482034U, 0x00000026U}, /* RGIDR_MODID[13]:SWDT */ + [12] = {0xFD482038U, 0x0000003FU}, /* RGIDR_MODID[14]:TMU0 */ + [13] = {0xFD48203CU, 0x00000026U}, /* RGIDR_MODID[15]:WDT */ + [14] = {0xFD482040U, 0x00000026U}, /* RGIDR_MODID[16]:WWDT0 */ + [15] = {0xFD482044U, 0x00000026U}, /* RGIDR_MODID[17]:WWDT1 */ + [16] = {0xFD482048U, 0x00000026U}, /* RGIDR_MODID[18]:WWDT2 */ + [17] = {0xFD48204CU, 0x00000026U}, /* RGIDR_MODID[19]:WWDT3 */ + [18] = {0xFD482050U, 0x00000026U}, /* RGIDR_MODID[20]:WWDT4 */ + [19] = {0xFD482054U, 0x00000026U}, /* RGIDR_MODID[21]:WWDT5 */ + [20] = {0xFD482058U, 0x00000026U}, /* RGIDR_MODID[22]:WWDT6 */ + [21] = {0xFD48205CU, 0x00000026U}, /* RGIDR_MODID[23]:WWDT7 */ + [22] = {0xFD482060U, 0x00000026U}, /* RGIDR_MODID[24]:WWDT8 */ + [23] = {0xFD482064U, 0x00000026U}, /* RGIDR_MODID[25]:WWDT9 */ + [24] = {0xFD482068U, 0x0000003FU}, /* RGIDR_MODID[26]:ECMRT3 */ + [25] = {0xFDA02000U, 0x0000002EU}, /* RGIDR_MODID[27]:ADVFSC */ + [26] = {0xFDA02004U, 0x0000003FU}, /* RGIDR_MODID[28]:APMU0 */ + [27] = {0xFDA02008U, 0x00000002U}, /* RGIDR_MODID[29]:APMU1 */ + [28] = {0xFDA0200CU, 0x00000000U}, /* RGIDR_MODID[30]:APMU10 */ + [29] = {0xFDA02010U, 0x00000000U}, /* RGIDR_MODID[31]:APMU11 */ + [30] = {0xFDA02014U, 0x00000000U}, /* RGIDR_MODID[32]:APMU12 */ + [31] = {0xFDA02018U, 0x00000000U}, /* RGIDR_MODID[33]:APMU13 */ + [32] = {0xFDA0201CU, 0x00000000U}, /* RGIDR_MODID[34]:APMU14 */ + [33] = {0xFDA02020U, 0x00000000U}, /* RGIDR_MODID[35]:APMU15 */ + [34] = {0xFDA02024U, 0x00000004U}, /* RGIDR_MODID[36]:APMU2 */ + [35] = {0xFDA02028U, 0x00000004U}, /* RGIDR_MODID[37]:APMU3 */ + [36] = {0xFDA0202CU, 0x00000000U}, /* RGIDR_MODID[38]:APMU4 */ + [37] = {0xFDA02030U, 0x00000000U}, /* RGIDR_MODID[39]:APMU5 */ + [38] = {0xFDA02034U, 0x00000000U}, /* RGIDR_MODID[40]:APMU6 */ + [39] = {0xFDA02038U, 0x00000000U}, /* RGIDR_MODID[41]:APMU7 */ + [40] = {0xFDA0203CU, 0x00000000U}, /* RGIDR_MODID[42]:APMU8 */ + [41] = {0xFDA02040U, 0x00000000U}, /* RGIDR_MODID[43]:APMU9 */ + [42] = {0xFDA02044U, 0x0000003FU}, /* RGIDR_MODID[44]:ARS00 */ + /* After setting */ /* RGIDR_MODID[45]:ARS01 */ + /* After setting */ /* RGIDR_MODID[46]:ARS02 */ + [43] = {0xFDA02050U, 0x0000003FU}, /* RGIDR_MODID[47]:ARS03 */ + [44] = {0xFDA02054U, 0x0000003FU}, /* RGIDR_MODID[48]:ARS04 */ + [45] = {0xFDA02058U, 0x0000003FU}, /* RGIDR_MODID[49]:ARS05 */ + [46] = {0xFDA0205CU, 0x0000003FU}, /* RGIDR_MODID[50]:ARS06 */ + [47] = {0xFDA02060U, 0x0000003FU}, /* RGIDR_MODID[51]:ARS07 */ + [48] = {0xFDA02064U, 0x00000000U}, /* RGIDR_MODID[52]:ARS08 */ + [49] = {0xFDA02068U, 0x0000002EU}, /* RGIDR_MODID[53]:CMT0 */ + [50] = {0xFDA0206CU, 0x0000002EU}, /* RGIDR_MODID[54]:CMT1 */ + [51] = {0xFDA02070U, 0x0000002EU}, /* RGIDR_MODID[55]:CMT2 */ + [52] = {0xFDA02074U, 0x0000002EU}, /* RGIDR_MODID[56]:CMT3 */ + [53] = {0xFDA02078U, 0x0000002AU}, /* RGIDR_MODID[57]:CKM */ + [54] = {0xFDA0207CU, 0x0000002EU}, /* RGIDR_MODID[58]:DBE */ + [55] = {0xFDA02080U, 0x0000002EU}, /* RGIDR_MODID[59]:IRQC */ + [56] = {0xFDA02084U, 0x0000003BU}, /* RGIDR_MODID[60]:ECMPS0 */ + [57] = {0xFDA0209CU, 0x0000002EU}, /* RGIDR_MODID[61]:SCMT */ + [58] = {0xFDA020A8U, 0x0000002EU}, /* RGIDR_MODID[62]:TSC1 */ + [59] = {0xFDA020ACU, 0x0000002EU}, /* RGIDR_MODID[63]:TSC2 */ + [60] = {0xFDA020B0U, 0x0000002EU}, /* RGIDR_MODID[64]:TSC3 */ + [61] = {0xFDA020B4U, 0x0000002EU}, /* RGIDR_MODID[65]:TSC4 */ + [62] = {0xFDA020B8U, 0x00000026U}, /* RGIDR_MODID[66]:UCMT */ + [63] = {0xFDA02100U, 0x0000003FU}, /* RGIDR_MODID[67]:CPG0 */ + [64] = {0xFDA02104U, 0x0000002AU}, /* RGIDR_MODID[68]:CPG1 */ + [65] = {0xFDA02108U, 0x0000000CU}, /* RGIDR_MODID[69]:CPG2 */ + [66] = {0xFDA0210CU, 0x0000000CU}, /* RGIDR_MODID[70]:CPG3 */ + [67] = {0xFDA02110U, 0x0000003FU}, /* RGIDR_MODID[71]:PFC00 */ + [68] = {0xFDA02114U, 0x0000002AU}, /* RGIDR_MODID[72]:PFC01 */ + [69] = {0xFDA02118U, 0x0000000CU}, /* RGIDR_MODID[73]:PFC02 */ + [70] = {0xFDA0211CU, 0x0000000CU}, /* RGIDR_MODID[74]:PFC03 */ + [71] = {0xFDA02150U, 0x0000003FU}, /* RGIDR_MODID[75]:PFCS0 */ + [72] = {0xFDA02154U, 0x0000002AU}, /* RGIDR_MODID[76]:PFCS1 */ + [73] = {0xFDA02158U, 0x0000000CU}, /* RGIDR_MODID[77]:PFCS2 */ + [74] = {0xFDA0215CU, 0x0000000CU}, /* RGIDR_MODID[78]:PFCS3 */ + [75] = {0xFDA02160U, 0x0000003FU}, /* RGIDR_MODID[79]:RESET0 */ + [76] = {0xFDA02164U, 0x0000002AU}, /* RGIDR_MODID[80]:RESET1 */ + [77] = {0xFDA02168U, 0x0000000CU}, /* RGIDR_MODID[81]:RESET2 */ + [78] = {0xFDA0216CU, 0x0000000CU}, /* RGIDR_MODID[82]:RESET3 */ + [79] = {0xFDA02170U, 0x0000003FU}, /* RGIDR_MODID[83]:SYS0 */ + [80] = {0xFDA02174U, 0x0000002AU}, /* RGIDR_MODID[84]:SYS1 */ + [81] = {0xFDA02178U, 0x0000000CU}, /* RGIDR_MODID[85]:SYS2 */ + [82] = {0xFDA0217CU, 0x0000000CU}, /* RGIDR_MODID[86]:SYS3 */ + [83] = {0xFCB62000U, 0x0000002EU}, /* RGIDR_MODID[87]:DMAMSI0 */ + [84] = {0xFCB62004U, 0x0000002EU}, /* RGIDR_MODID[88]:DMAMSI1 */ + [85] = {0xFCB62008U, 0x0000002EU}, /* RGIDR_MODID[89]:DMAMSI2 */ + [86] = {0xFCB6200CU, 0x0000002EU}, /* RGIDR_MODID[90]:DMAMSI3 */ + [87] = {0xFCB62018U, 0x0000003BU}, /* RGIDR_MODID[91]:ECMSP3 */ + [88] = {0xFCB62024U, 0x0000003FU}, /* RGIDR_MODID[92]:ARSP30 */ + /* After setting */ /* RGIDR_MODID[93]:ARSP31 */ + /* After setting */ /* RGIDR_MODID[94]:ARSP32 */ + [89] = {0xFCB62030U, 0x0000003FU}, /* RGIDR_MODID[95]:ARSP33 */ + [90] = {0xFCB62034U, 0x0000003FU}, /* RGIDR_MODID[96]:ARSP34 */ + [91] = {0xFCB62038U, 0x0000003FU}, /* RGIDR_MODID[97]:ARSP35 */ + [92] = {0xFCB6203CU, 0x0000003FU}, /* RGIDR_MODID[98]:ARSP36 */ + [93] = {0xFCB62040U, 0x0000003FU}, /* RGIDR_MODID[99]:ARSP37 */ + [94] = {0xFCB62044U, 0x00000000U}, /* RGIDR_MODID[100]:ARSP38 */ + [95] = {0xFCB62048U, 0x0000002EU}, /* RGIDR_MODID[101]:MSI0 */ + [96] = {0xFCB6204CU, 0x0000002EU}, /* RGIDR_MODID[102]:MSI1 */ + [97] = {0xFCB62050U, 0x0000002EU}, /* RGIDR_MODID[103]:MSI2 */ + [98] = {0xFCB62054U, 0x0000002EU}, /* RGIDR_MODID[104]:MSI3 */ + [99] = {0xFCB92000U, 0x0000003FU}, /* RGIDR_MODID[105]:ARSP40 */ + /* After setting */ /* RGIDR_MODID[106]:ARSP41 */ + /* After setting */ /* RGIDR_MODID[107]:ARSP42 */ + [100] = {0xFCB9200CU, 0x0000003FU}, /* RGIDR_MODID[108]:ARSP43 */ + [101] = {0xFCB92010U, 0x0000003FU}, /* RGIDR_MODID[109]:ARSP44 */ + [102] = {0xFCB92014U, 0x0000003FU}, /* RGIDR_MODID[110]:ARSP45 */ + [103] = {0xFCB92018U, 0x0000003FU}, /* RGIDR_MODID[111]:ARSP46 */ + [104] = {0xFCB9201CU, 0x0000003FU}, /* RGIDR_MODID[112]:ARSP47 */ + [105] = {0xFCB92020U, 0x00000000U}, /* RGIDR_MODID[113]:ARSP48 */ + [106] = {0xFCB92024U, 0x0000003FU}, /* RGIDR_MODID[114]:DMAHSCIF0 */ + [107] = {0xFCB92028U, 0x0000003FU}, /* RGIDR_MODID[115]:DMAHSCIF1 */ + [108] = {0xFCB9202CU, 0x0000003FU}, /* RGIDR_MODID[116]:DMAHSCIF2 */ + [109] = {0xFCB92030U, 0x0000003FU}, /* RGIDR_MODID[117]:DMAHSCIF3 */ + [110] = {0xFCB92034U, 0x0000003FU}, /* RGIDR_MODID[118]:DMASCIF0 */ + [111] = {0xFCB92038U, 0x0000003FU}, /* RGIDR_MODID[119]:DMASCIF1 */ + [112] = {0xFCB9203CU, 0x0000003FU}, /* RGIDR_MODID[120]:DMASCIF3 */ + [113] = {0xFCB92040U, 0x0000003FU}, /* RGIDR_MODID[121]:DMASCIF4 */ + [114] = {0xFCB92044U, 0x0000003BU}, /* RGIDR_MODID[122]:ECMSP4 */ + [115] = {0xFCB92048U, 0x0000003FU}, /* RGIDR_MODID[123]:HSCIF0 */ + [116] = {0xFCB9204CU, 0x0000003FU}, /* RGIDR_MODID[124]:HSCIF1 */ + [117] = {0xFCB92050U, 0x0000003FU}, /* RGIDR_MODID[125]:HSCIF2 */ + [118] = {0xFCB92054U, 0x0000003FU}, /* RGIDR_MODID[126]:HSCIF3 */ + [119] = {0xFCB92058U, 0x0000003FU}, /* RGIDR_MODID[127]:SCIF0 */ + [120] = {0xFCB9205CU, 0x0000003FU}, /* RGIDR_MODID[128]:SCIF1 */ + [121] = {0xFCB92060U, 0x0000003FU}, /* RGIDR_MODID[129]:SCIF3 */ + [122] = {0xFCB92064U, 0x0000003FU}, /* RGIDR_MODID[130]:SCIF4 */ + [123] = {0xFCB92068U, 0x0000003FU}, /* RGIDR_MODID[131]:TMU1 */ + [124] = {0xFCB9206CU, 0x0000003FU}, /* RGIDR_MODID[132]:TMU2 */ + [125] = {0xFCB92070U, 0x0000003FU}, /* RGIDR_MODID[133]:TMU3 */ + [126] = {0xFCB92074U, 0x0000003FU}, /* RGIDR_MODID[134]:TMU4 */ + [127] = {0xFCF82000U, 0x0000002AU}, /* RGIDR_MODID[135]:CKMHSC */ + [128] = {0xFCF82004U, 0x0000000CU}, /* RGIDR_MODID[136]:AXIPCI001 */ + [129] = {0xFCF82008U, 0x0000000CU}, /* RGIDR_MODID[137]:AXIPCI002 */ + [130] = {0xFCF8200CU, 0x0000000CU}, /* RGIDR_MODID[138]:AXIPCI003 */ + [131] = {0xFCF82010U, 0x0000002EU}, /* RGIDR_MODID[139]:ETHPHY */ + [132] = {0xFCF82014U, 0x0000000CU}, /* RGIDR_MODID[140]:AXIPCI005 */ + [133] = {0xFCF82018U, 0x0000000CU}, /* RGIDR_MODID[141]:AXIPCI006 */ + [134] = {0xFCF8201CU, 0x0000000CU}, /* RGIDR_MODID[142]:AXIPCI007 */ + [135] = {0xFCF82020U, 0x0000000CU}, /* RGIDR_MODID[143]:AXIPCI008 */ + [136] = {0xFCF82024U, 0x0000000CU}, /* RGIDR_MODID[144]:AXIPCI009 */ + [137] = {0xFCF82028U, 0x0000000CU}, /* RGIDR_MODID[145]:AXIPCI010 */ + [138] = {0xFCF8202CU, 0x0000000CU}, /* RGIDR_MODID[146]:AXIPCI011 */ + [139] = {0xFCF82030U, 0x0000000CU}, /* RGIDR_MODID[147]:AXIPCI012 */ + [140] = {0xFCF82034U, 0x0000000CU}, /* RGIDR_MODID[148]:AXIPCI013 */ + [141] = {0xFCF82038U, 0x0000000CU}, /* RGIDR_MODID[149]:AXIPCI014 */ + [142] = {0xFCF8203CU, 0x0000000CU}, /* RGIDR_MODID[150]:AXIPCI015 */ + [143] = {0xFCF82040U, 0x0000000CU}, /* RGIDR_MODID[151]:AXIPCI100 */ + [144] = {0xFCF82044U, 0x0000000CU}, /* RGIDR_MODID[152]:AXIPCI101 */ + [145] = {0xFCF82048U, 0x0000000CU}, /* RGIDR_MODID[153]:AXIPCI102 */ + [146] = {0xFCF8204CU, 0x0000000CU}, /* RGIDR_MODID[154]:AXIPCI103 */ + [147] = {0xFCF82050U, 0x0000000CU}, /* RGIDR_MODID[155]:AXIPCI104 */ + [148] = {0xFCF82054U, 0x0000000CU}, /* RGIDR_MODID[156]:AXIPCI105 */ + [149] = {0xFCF82058U, 0x0000000CU}, /* RGIDR_MODID[157]:AXIPCI106 */ + [150] = {0xFCF8205CU, 0x0000000CU}, /* RGIDR_MODID[158]:AXIPCI107 */ + [151] = {0xFCF82060U, 0x0000000CU}, /* RGIDR_MODID[159]:AXIPCI108 */ + [152] = {0xFCF82064U, 0x0000000CU}, /* RGIDR_MODID[160]:AXIPCI109 */ + [153] = {0xFCF82068U, 0x0000000CU}, /* RGIDR_MODID[161]:AXIPCI110 */ + [154] = {0xFCF8206CU, 0x0000000CU}, /* RGIDR_MODID[162]:AXIPCI111 */ + [155] = {0xFCF82070U, 0x0000000CU}, /* RGIDR_MODID[163]:AXIPCI112 */ + [156] = {0xFCF82074U, 0x0000000CU}, /* RGIDR_MODID[164]:AXIPCI113 */ + [157] = {0xFCF82078U, 0x0000000CU}, /* RGIDR_MODID[165]:AXIPCI114 */ + [158] = {0xFCF8207CU, 0x0000000CU}, /* RGIDR_MODID[166]:AXIPCI115 */ + [159] = {0xFCF82080U, 0x0000002EU}, /* RGIDR_MODID[167]:ETHPHYRAM */ + [160] = {0xFCF82088U, 0x0000000CU}, /* RGIDR_MODID[168]:IPMMUHC00 */ + [161] = {0xFCF8208CU, 0x0000002EU}, /* RGIDR_MODID[169]:RSW200 */ + [162] = {0xFCF82090U, 0x0000002EU}, /* RGIDR_MODID[170]:RSW201 */ + [163] = {0xFCF82094U, 0x0000002EU}, /* RGIDR_MODID[171]:RSW210 */ + [164] = {0xFCF82098U, 0x0000002EU}, /* RGIDR_MODID[172]:RSW211 */ + [165] = {0xFCF8209CU, 0x0000002EU}, /* RGIDR_MODID[173]:RSW202 */ + [166] = {0xFCF820A0U, 0x0000002EU}, /* RGIDR_MODID[174]:RSW203 */ + [167] = {0xFCF820A4U, 0x0000002EU}, /* RGIDR_MODID[175]:RSW204 */ + [168] = {0xFCF820A8U, 0x0000002EU}, /* RGIDR_MODID[176]:RSW205 */ + [169] = {0xFCF820ACU, 0x0000002EU}, /* RGIDR_MODID[177]:RSW206 */ + [170] = {0xFCF820B0U, 0x0000002EU}, /* RGIDR_MODID[178]:RSW207 */ + [171] = {0xFCF820B4U, 0x0000002EU}, /* RGIDR_MODID[179]:RSW208 */ + [172] = {0xFCF820B8U, 0x0000002EU}, /* RGIDR_MODID[180]:RSW209 */ + [173] = {0xFCF820BCU, 0x0000002EU}, /* RGIDR_MODID[181]:RSW2RAM */ + [174] = {0xFCF820C0U, 0x0000002AU}, /* RGIDR_MODID[182]:RSW2SEC00 */ + [175] = {0xFCF820C4U, 0x0000002AU}, /* RGIDR_MODID[183]:RSW2SEC01 */ + [176] = {0xFCF820C8U, 0x0000002AU}, /* RGIDR_MODID[184]:RSW2SEC10 */ + [177] = {0xFCF820CCU, 0x0000002AU}, /* RGIDR_MODID[185]:RSW2SEC11 */ + [178] = {0xFCF820D0U, 0x0000002AU}, /* RGIDR_MODID[186]:RSW2SEC02 */ + [179] = {0xFCF820D4U, 0x0000002AU}, /* RGIDR_MODID[187]:RSW2SEC03 */ + [180] = {0xFCF820D8U, 0x0000002AU}, /* RGIDR_MODID[188]:RSW2SEC04 */ + [181] = {0xFCF820DCU, 0x0000002AU}, /* RGIDR_MODID[189]:RSW2SEC05 */ + [182] = {0xFCF820E0U, 0x0000002AU}, /* RGIDR_MODID[190]:RSW2SEC06 */ + [183] = {0xFCF820E4U, 0x0000002AU}, /* RGIDR_MODID[191]:RSW2SEC07 */ + [184] = {0xFCF820E8U, 0x0000002AU}, /* RGIDR_MODID[192]:RSW2SEC08 */ + [185] = {0xFCF820ECU, 0x0000002AU}, /* RGIDR_MODID[193]:RSW2SEC09 */ + [186] = {0xFCF820F4U, 0x0000000CU}, /* RGIDR_MODID[194]:AXIPCI000 */ + [187] = {0xFCF820F8U, 0x0000000CU}, /* RGIDR_MODID[195]:AXIPCI004 */ + [188] = {0xFCF820FCU, 0x0000000CU}, /* RGIDR_MODID[196]:IPMMUHC01 */ + [189] = {0xFCF8210CU, 0x0000000CU}, /* RGIDR_MODID[197]:IPMMUHC10 */ + [190] = {0xFCF82110U, 0x0000000CU}, /* RGIDR_MODID[198]:IPMMUHC11 */ + [191] = {0xFCF82114U, 0x0000000CU}, /* RGIDR_MODID[199]:IPMMUHC12 */ + [192] = {0xFCF82118U, 0x0000000CU}, /* RGIDR_MODID[200]:IPMMUHC13 */ + [193] = {0xFCF8211CU, 0x0000000CU}, /* RGIDR_MODID[201]:PPHY0 */ + [194] = {0xFCF82120U, 0x0000000CU}, /* RGIDR_MODID[202]:PPHY1 */ + [195] = {0xFCF82124U, 0x0000000CU}, /* RGIDR_MODID[203]:IPMMUHC14 */ + [196] = {0xFCF82128U, 0x0000000CU}, /* RGIDR_MODID[204]:IPMMUHC15 */ + [197] = {0xFCF8212CU, 0x0000002EU}, /* RGIDR_MODID[205]:FBAHSC */ + [198] = {0xFCF82130U, 0x0000000CU}, /* RGIDR_MODID[206]:IPMMUHC02 */ + [199] = {0xFCF82134U, 0x0000003FU}, /* RGIDR_MODID[207]:AXIUFSS */ + [200] = {0xFCF82138U, 0x0000003BU}, /* RGIDR_MODID[208]:ECMHSC */ + [201] = {0xFCF8213CU, 0x0000003FU}, /* RGIDR_MODID[209]:ARHC0 */ + /* After setting */ /* RGIDR_MODID[210]:ARHC1 */ + /* After setting */ /* RGIDR_MODID[211]:ARHC2 */ + [202] = {0xFCF82148U, 0x0000003FU}, /* RGIDR_MODID[212]:ARHC3 */ + [203] = {0xFCF8214CU, 0x0000003FU}, /* RGIDR_MODID[213]:ARHC4 */ + [204] = {0xFCF82150U, 0x0000003FU}, /* RGIDR_MODID[214]:ARHC5 */ + [205] = {0xFCF82154U, 0x0000003FU}, /* RGIDR_MODID[215]:ARHC6 */ + [206] = {0xFCF82158U, 0x0000003FU}, /* RGIDR_MODID[216]:ARHC7 */ + [207] = {0xFCF8215CU, 0x00000000U}, /* RGIDR_MODID[217]:ARHC8 */ + [208] = {0xFCF82160U, 0x0000000CU}, /* RGIDR_MODID[218]:IPMMUHC03 */ + [209] = {0xFCF82164U, 0x0000000CU}, /* RGIDR_MODID[219]:IPMMUHC04 */ + [210] = {0xFCF82168U, 0x0000000CU}, /* RGIDR_MODID[220]:IPMMUHC05 */ + [211] = {0xFCF8216CU, 0x0000000CU}, /* RGIDR_MODID[221]:IPMMUHC06 */ + [212] = {0xFCF82170U, 0x0000000CU}, /* RGIDR_MODID[222]:IPMMUHC07 */ + [213] = {0xFCF82174U, 0x0000000CU}, /* RGIDR_MODID[223]:IPMMUHC08 */ + [214] = {0xFCF82178U, 0x0000000CU}, /* RGIDR_MODID[224]:IPMMUHC09 */ + [215] = {0xFDC22000U, 0x0000003FU}, /* RGIDR_MODID[225]:ARRC0 */ + /* After setting */ /* RGIDR_MODID[226]:ARRC1 */ + /* After setting */ /* RGIDR_MODID[227]:ARRC2 */ + [216] = {0xFDC2200CU, 0x0000003FU}, /* RGIDR_MODID[228]:ARRC3 */ + [217] = {0xFDC22010U, 0x0000003FU}, /* RGIDR_MODID[229]:ARRC4 */ + [218] = {0xFDC22014U, 0x0000003FU}, /* RGIDR_MODID[230]:ARRC5 */ + [219] = {0xFDC22018U, 0x0000003FU}, /* RGIDR_MODID[231]:ARRC6 */ + [220] = {0xFDC2201CU, 0x0000003FU}, /* RGIDR_MODID[232]:ARRC7 */ + [221] = {0xFDC22020U, 0x00000000U}, /* RGIDR_MODID[233]:ARRC8 */ + [222] = {0xFDC22024U, 0x00000019U}, /* RGIDR_MODID[234]:CR0 */ + [223] = {0xFDC22028U, 0x0000003FU}, /* RGIDR_MODID[235]:ICUMX */ + [224] = {0xFDC2202CU, 0x0000003BU}, /* RGIDR_MODID[236]:ECMRC */ + [225] = {0xFD432000U, 0x0000002EU}, /* RGIDR_MODID[237]:DMAWCRC0 */ + [226] = {0xFD432004U, 0x0000002EU}, /* RGIDR_MODID[238]:DMAWCRC1 */ + [227] = {0xFD432008U, 0x0000002EU}, /* RGIDR_MODID[239]:DMAWCRC2 */ + [228] = {0xFD43200CU, 0x0000002EU}, /* RGIDR_MODID[240]:DMAWCRC3 */ + [229] = {0xFD432010U, 0x0000000CU}, /* RGIDR_MODID[241]:DMATSIP0 */ + [230] = {0xFD432014U, 0x0000000CU}, /* RGIDR_MODID[242]:DMATSIP1 */ + [231] = {0xFD432018U, 0x0000000CU}, /* RGIDR_MODID[243]:DMATSIP2 */ + [232] = {0xFD442000U, 0x0000003FU}, /* RGIDR_MODID[244]:ARMREG00 */ + [233] = {0xFD442004U, 0x0000000CU}, /* RGIDR_MODID[245]:ARMREG01 */ + [234] = {0xFD442008U, 0x00000000U}, /* RGIDR_MODID[246]:ARMREG10 */ + [235] = {0xFD44200CU, 0x00000000U}, /* RGIDR_MODID[247]:ARMREG11 */ + [236] = {0xFD442010U, 0x0000002AU}, /* RGIDR_MODID[248]:ARMREG12 */ + [237] = {0xFD442014U, 0x0000003FU}, /* RGIDR_MODID[249]:ARMREG13 */ + [238] = {0xFD442018U, 0x0000002AU}, /* RGIDR_MODID[250]:ARMREG14 */ + [239] = {0xFD44201CU, 0x00000022U}, /* RGIDR_MODID[251]:AXICR52SS */ + [240] = {0xFD442020U, 0x0000002EU}, /* RGIDR_MODID[252]:AXICSD0 */ + [241] = {0xFD442024U, 0x0000002EU}, /* RGIDR_MODID[253]:AXIINTAP0 */ + [242] = {0xFD442028U, 0x0000002EU}, /* RGIDR_MODID[254]:AXIINTAP1 */ + [243] = {0xFD44202CU, 0x00000019U}, /* RGIDR_MODID[255]:AXISECROM */ + [244] = {0xFD442030U, 0x0000003FU}, /* RGIDR_MODID[256]:AXISYSRAM0 */ + [245] = {0xFD442034U, 0x0000003FU}, /* RGIDR_MODID[257]:AXISYSRAM1 */ + [246] = {0xFD442038U, 0x00000000U}, /* RGIDR_MODID[258]:ARGREG15 */ + [247] = {0xFD44203CU, 0x00000000U}, /* RGIDR_MODID[259]:ARMREG2 */ + [248] = {0xFD442040U, 0x00000000U}, /* RGIDR_MODID[260]:ARMREG3 */ + [249] = {0xFD442044U, 0x00000000U}, /* RGIDR_MODID[261]:ARMREG4 */ + [250] = {0xFD442048U, 0x0000003FU}, /* RGIDR_MODID[262]:ARMREG5 */ + [251] = {0xFD44204CU, 0x0000002AU}, /* RGIDR_MODID[263]:ARMREG6 */ + [252] = {0xFD442050U, 0x00000000U}, /* RGIDR_MODID[264]:ARMREG7 */ + [253] = {0xFD442054U, 0x0000000CU}, /* RGIDR_MODID[265]:ARMREG8 */ + [254] = {0xFD442058U, 0x0000000CU}, /* RGIDR_MODID[266]:ARMREG9 */ + [255] = {0xFD44205CU, 0x0000003FU}, /* RGIDR_MODID[267]:ARRD0 */ + /* After setting */ /* RGIDR_MODID[268]:ARRD1 */ + /* After setting */ /* RGIDR_MODID[269]:ARRD2 */ + [256] = {0xFD442068U, 0x0000003FU}, /* RGIDR_MODID[270]:ARRD3 */ + [257] = {0xFD44206CU, 0x0000003FU}, /* RGIDR_MODID[271]:ARRD4 */ + [258] = {0xFD442070U, 0x0000003FU}, /* RGIDR_MODID[272]:ARRD5 */ + [259] = {0xFD442074U, 0x0000003FU}, /* RGIDR_MODID[273]:ARRD6 */ + [260] = {0xFD442078U, 0x0000003FU}, /* RGIDR_MODID[274]:ARRD7 */ + [261] = {0xFD44207CU, 0x00000000U}, /* RGIDR_MODID[275]:ARRD8 */ + [262] = {0xFD442080U, 0x0000003FU}, /* RGIDR_MODID[276]:ARRT0 */ + /* After setting */ /* RGIDR_MODID[277]:ARRT1 */ + /* After setting */ /* RGIDR_MODID[278]:ARRT2 */ + [263] = {0xFD44208CU, 0x0000003FU}, /* RGIDR_MODID[279]:ARRT3 */ + [264] = {0xFD442090U, 0x0000003FU}, /* RGIDR_MODID[280]:ARRT4 */ + [265] = {0xFD442094U, 0x0000003FU}, /* RGIDR_MODID[281]:ARRT5 */ + [266] = {0xFD442098U, 0x0000003FU}, /* RGIDR_MODID[282]:ARRT6 */ + [267] = {0xFD44209CU, 0x0000003FU}, /* RGIDR_MODID[283]:ARRT7 */ + [268] = {0xFD4420A0U, 0x00000000U}, /* RGIDR_MODID[284]:ARRT8 */ + [269] = {0xFD4420A4U, 0x0000002AU}, /* RGIDR_MODID[285]:CKMRT */ + [270] = {0xFD4420A8U, 0x0000002EU}, /* RGIDR_MODID[286]:CRC0 */ + [271] = {0xFD4420ACU, 0x0000002EU}, /* RGIDR_MODID[287]:CRC1 */ + [272] = {0xFD4420B0U, 0x0000002EU}, /* RGIDR_MODID[288]:CRC2 */ + [273] = {0xFD4420B4U, 0x0000002EU}, /* RGIDR_MODID[289]:CRC3 */ + [274] = {0xFD4420B8U, 0x0000002EU}, /* RGIDR_MODID[290]:CSD */ + [275] = {0xFD4420BCU, 0x0000003BU}, /* RGIDR_MODID[291]:ECM */ + [276] = {0xFD4420C0U, 0x0000003BU}, /* RGIDR_MODID[292]:ECMRT */ + [277] = {0xFD4420C4U, 0x0000002EU}, /* RGIDR_MODID[293]:FBACR52 */ + [278] = {0xFD4420C8U, 0x0000002EU}, /* RGIDR_MODID[294]:FBART */ + [279] = {0xFD4420CCU, 0x0000002EU}, /* RGIDR_MODID[295]:INTTP */ + [280] = {0xFD4420D0U, 0x0000000CU}, /* RGIDR_MODID[296]:IPMMURT000 */ + [281] = {0xFD4420D4U, 0x0000000CU}, /* RGIDR_MODID[297]:IPMMURT100 */ + [282] = {0xFD4420D8U, 0x0000002EU}, /* RGIDR_MODID[298]:KCRC4 */ + [283] = {0xFD4420DCU, 0x0000002EU}, /* RGIDR_MODID[299]:KCRC5 */ + [284] = {0xFD4420E0U, 0x0000002EU}, /* RGIDR_MODID[300]:KCRC6 */ + [285] = {0xFD4420E4U, 0x0000002EU}, /* RGIDR_MODID[301]:KCRC7 */ + [286] = {0xFD4420E8U, 0x0000003FU}, /* RGIDR_MODID[302]:MFI00 */ + [287] = {0xFD4420ECU, 0x0000002EU}, /* RGIDR_MODID[303]:MFI01 */ + [288] = {0xFD4420F0U, 0x0000002EU}, /* RGIDR_MODID[304]:MFI10 */ + [289] = {0xFD4420F4U, 0x0000002EU}, /* RGIDR_MODID[305]:MFI02 */ + [290] = {0xFD4420F8U, 0x0000002EU}, /* RGIDR_MODID[306]:MFI03 */ + [291] = {0xFD4420FCU, 0x0000002EU}, /* RGIDR_MODID[307]:MFI04 */ + [292] = {0xFD442100U, 0x00000000U}, /* RGIDR_MODID[308]:MFI05 */ + [293] = {0xFD442104U, 0x00000000U}, /* RGIDR_MODID[309]:MFI06 */ + [294] = {0xFD442108U, 0x00000000U}, /* RGIDR_MODID[310]:MFI07 */ + [295] = {0xFD44210CU, 0x00000000U}, /* RGIDR_MODID[311]:MFI08 */ + [296] = {0xFD442110U, 0x0000002EU}, /* RGIDR_MODID[312]:MFI09 */ + [297] = {0xFD442114U, 0x0000003FU}, /* RGIDR_MODID[313]:MFI15 */ + [298] = {0xFD442118U, 0x0000002AU}, /* RGIDR_MODID[314]:CKMCR52 */ + [299] = {0xFD44211CU, 0x0000003BU}, /* RGIDR_MODID[315]:RTDM0P */ + [300] = {0xFD442120U, 0x0000003BU}, /* RGIDR_MODID[316]:ECMRD */ + [301] = {0xFD442124U, 0x0000003BU}, /* RGIDR_MODID[317]:RTDM1P */ + [302] = {0xFD44212CU, 0x0000003BU}, /* RGIDR_MODID[318]:RTDM2P */ + [303] = {0xFD442130U, 0x0000003BU}, /* RGIDR_MODID[319]:SYSRAM10 */ + [304] = {0xFD442134U, 0x0000003BU}, /* RGIDR_MODID[320]:RTDM3P */ + [305] = {0xFD442138U, 0x00000003U}, /* RGIDR_MODID[321]:SYSRAM00 */ + [306] = {0xFD44213CU, 0x0000002EU}, /* RGIDR_MODID[322]:TSIPL0 */ + [307] = {0xFD442140U, 0x0000002EU}, /* RGIDR_MODID[323]:TSIPL1 */ + [308] = {0xFD442144U, 0x0000002EU}, /* RGIDR_MODID[324]:TSIPL2 */ + [309] = {0xFD442148U, 0x0000002EU}, /* RGIDR_MODID[325]:TSIPL3 */ + [310] = {0xFD44214CU, 0x0000002EU}, /* RGIDR_MODID[326]:TSIPL4 */ + [311] = {0xFD442150U, 0x0000002EU}, /* RGIDR_MODID[327]:TSIPL5 */ + [312] = {0xFD442154U, 0x0000002EU}, /* RGIDR_MODID[328]:TSIPL6 */ + [313] = {0xFD442158U, 0x0000002EU}, /* RGIDR_MODID[329]:TSIPL7 */ + [314] = {0xFD44215CU, 0x0000002EU}, /* RGIDR_MODID[330]:WCRC0 */ + [315] = {0xFD442160U, 0x0000002EU}, /* RGIDR_MODID[331]:WCRC1 */ + [316] = {0xFD442164U, 0x0000002EU}, /* RGIDR_MODID[332]:WCRC2 */ + [317] = {0xFD442168U, 0x0000002EU}, /* RGIDR_MODID[333]:WCRC3 */ + [318] = {0xFD442174U, 0x0000000CU}, /* RGIDR_MODID[334]:TSIP0 */ + [319] = {0xFD442178U, 0x0000000CU}, /* RGIDR_MODID[335]:TSIP1 */ + [320] = {0xFD44217CU, 0x0000000CU}, /* RGIDR_MODID[336]:TSIP2 */ + [321] = {0xFD442180U, 0x0000002EU}, /* RGIDR_MODID[337]:MFI11 */ + [322] = {0xFD442184U, 0x00000000U}, /* RGIDR_MODID[338]:MFI12 */ + [323] = {0xFD442188U, 0x00000000U}, /* RGIDR_MODID[339]:MFI13 */ + [324] = {0xFD44218CU, 0x00000000U}, /* RGIDR_MODID[340]:MFI14 */ + [325] = {0xFD442190U, 0x0000000CU}, /* RGIDR_MODID[341]:IPMMURT001 */ + [326] = {0xFD442194U, 0x0000000CU}, /* RGIDR_MODID[342]:IPMMURT010 */ + [327] = {0xFD442198U, 0x0000000CU}, /* RGIDR_MODID[343]:IPMMURT011 */ + [328] = {0xFD44219CU, 0x0000000CU}, /* RGIDR_MODID[344]:IPMMURT012 */ + [329] = {0xFD4421A0U, 0x0000000CU}, /* RGIDR_MODID[345]:IPMMURT013 */ + [330] = {0xFD4421A4U, 0x0000000CU}, /* RGIDR_MODID[346]:IPMMURT014 */ + [331] = {0xFD4421A8U, 0x0000000CU}, /* RGIDR_MODID[347]:IPMMURT015 */ + [332] = {0xFD4421ACU, 0x0000000CU}, /* RGIDR_MODID[348]:IPMMURT002 */ + [333] = {0xFD4421B0U, 0x0000000CU}, /* RGIDR_MODID[349]:IPMMURT003 */ + [334] = {0xFD4421B4U, 0x0000000CU}, /* RGIDR_MODID[350]:IPMMURT004 */ + [335] = {0xFD4421B8U, 0x0000000CU}, /* RGIDR_MODID[351]:IPMMURT005 */ + [336] = {0xFD4421BCU, 0x0000000CU}, /* RGIDR_MODID[352]:IPMMURT006 */ + [337] = {0xFD4421C0U, 0x0000000CU}, /* RGIDR_MODID[353]:IPMMURT007 */ + [338] = {0xFD4421C4U, 0x0000000CU}, /* RGIDR_MODID[354]:IPMMURT008 */ + [339] = {0xFD4421C8U, 0x0000000CU}, /* RGIDR_MODID[355]:IPMMURT009 */ + [340] = {0xFD4421CCU, 0x0000000CU}, /* RGIDR_MODID[356]:IPMMURT101 */ + [341] = {0xFD4421D0U, 0x0000000CU}, /* RGIDR_MODID[357]:IPMMURT110 */ + [342] = {0xFD4421D4U, 0x0000000CU}, /* RGIDR_MODID[358]:IPMMURT111 */ + [343] = {0xFD4421D8U, 0x0000000CU}, /* RGIDR_MODID[359]:IPMMURT112 */ + [344] = {0xFD4421DCU, 0x0000000CU}, /* RGIDR_MODID[360]:IPMMURT113 */ + [345] = {0xFD4421E0U, 0x0000000CU}, /* RGIDR_MODID[361]:IPMMURT114 */ + [346] = {0xFD4421E4U, 0x0000000CU}, /* RGIDR_MODID[362]:IPMMURT115 */ + [347] = {0xFD4421E8U, 0x0000000CU}, /* RGIDR_MODID[363]:IPMMURT102 */ + [348] = {0xFD4421ECU, 0x0000000CU}, /* RGIDR_MODID[364]:IPMMURT103 */ + [349] = {0xFD4421F0U, 0x0000000CU}, /* RGIDR_MODID[365]:IPMMURT104 */ + [350] = {0xFD4421F4U, 0x0000000CU}, /* RGIDR_MODID[366]:IPMMURT105 */ + [351] = {0xFD4421F8U, 0x0000000CU}, /* RGIDR_MODID[367]:IPMMURT106 */ + [352] = {0xFD4421FCU, 0x0000000CU}, /* RGIDR_MODID[368]:IPMMURT107 */ + [353] = {0xFD442200U, 0x0000003BU}, /* RGIDR_MODID[369]:RTDM000 */ + [354] = {0xFD442204U, 0x0000003BU}, /* RGIDR_MODID[370]:RTDM001 */ + [355] = {0xFD442208U, 0x0000003BU}, /* RGIDR_MODID[371]:RTDM010 */ + [356] = {0xFD44220CU, 0x0000003BU}, /* RGIDR_MODID[372]:RTDM011 */ + [357] = {0xFD442210U, 0x0000003BU}, /* RGIDR_MODID[373]:RTDM012 */ + [358] = {0xFD442214U, 0x0000003BU}, /* RGIDR_MODID[374]:RTDM013 */ + [359] = {0xFD442218U, 0x0000003BU}, /* RGIDR_MODID[375]:RTDM014 */ + [360] = {0xFD44221CU, 0x0000003BU}, /* RGIDR_MODID[376]:RTDM015 */ + [361] = {0xFD442220U, 0x0000003BU}, /* RGIDR_MODID[377]:RTDM002 */ + [362] = {0xFD442224U, 0x0000003BU}, /* RGIDR_MODID[378]:RTDM003 */ + [363] = {0xFD442228U, 0x0000003BU}, /* RGIDR_MODID[379]:RTDM004 */ + [364] = {0xFD44222CU, 0x0000003BU}, /* RGIDR_MODID[380]:RTDM005 */ + [365] = {0xFD442230U, 0x0000003BU}, /* RGIDR_MODID[381]:RTDM006 */ + [366] = {0xFD442234U, 0x0000003BU}, /* RGIDR_MODID[382]:RTDM007 */ + [367] = {0xFD442238U, 0x0000003BU}, /* RGIDR_MODID[383]:RTDM008 */ + [368] = {0xFD44223CU, 0x0000003BU}, /* RGIDR_MODID[384]:RTDM009 */ + [369] = {0xFD442240U, 0x0000003BU}, /* RGIDR_MODID[385]:RTDM100 */ + [370] = {0xFD442244U, 0x0000003BU}, /* RGIDR_MODID[386]:RTDM101 */ + [371] = {0xFD442248U, 0x0000003BU}, /* RGIDR_MODID[387]:RTDM110 */ + [372] = {0xFD44224CU, 0x0000003BU}, /* RGIDR_MODID[388]:RTDM111 */ + [373] = {0xFD442250U, 0x0000003BU}, /* RGIDR_MODID[389]:RTDM112 */ + [374] = {0xFD442254U, 0x0000003BU}, /* RGIDR_MODID[390]:RTDM113 */ + [375] = {0xFD442258U, 0x0000003BU}, /* RGIDR_MODID[391]:RTDM114 */ + [376] = {0xFD44225CU, 0x0000003BU}, /* RGIDR_MODID[392]:RTDM115 */ + [377] = {0xFD442260U, 0x0000003BU}, /* RGIDR_MODID[393]:RTDM102 */ + [378] = {0xFD442264U, 0x0000003BU}, /* RGIDR_MODID[394]:RTDM103 */ + [379] = {0xFD442268U, 0x0000003BU}, /* RGIDR_MODID[395]:RTDM104 */ + [380] = {0xFD44226CU, 0x0000003BU}, /* RGIDR_MODID[396]:RTDM105 */ + [381] = {0xFD442270U, 0x0000003BU}, /* RGIDR_MODID[397]:RTDM106 */ + [382] = {0xFD442274U, 0x0000003BU}, /* RGIDR_MODID[398]:RTDM107 */ + [383] = {0xFD442278U, 0x0000003BU}, /* RGIDR_MODID[399]:RTDM108 */ + [384] = {0xFD44227CU, 0x0000003BU}, /* RGIDR_MODID[400]:RTDM109 */ + [385] = {0xFD442280U, 0x0000003BU}, /* RGIDR_MODID[401]:RTDM200 */ + [386] = {0xFD442284U, 0x0000003BU}, /* RGIDR_MODID[402]:RTDM201 */ + [387] = {0xFD442288U, 0x0000003BU}, /* RGIDR_MODID[403]:RTDM210 */ + [388] = {0xFD44228CU, 0x0000003BU}, /* RGIDR_MODID[404]:RTDM211 */ + [389] = {0xFD442290U, 0x0000003BU}, /* RGIDR_MODID[405]:RTDM212 */ + [390] = {0xFD442294U, 0x0000003BU}, /* RGIDR_MODID[406]:RTDM213 */ + [391] = {0xFD442298U, 0x0000003BU}, /* RGIDR_MODID[407]:RTDM214 */ + [392] = {0xFD44229CU, 0x0000003BU}, /* RGIDR_MODID[408]:RTDM215 */ + [393] = {0xFD4422A0U, 0x0000003BU}, /* RGIDR_MODID[409]:RTDM202 */ + [394] = {0xFD4422A4U, 0x0000003BU}, /* RGIDR_MODID[410]:RTDM203 */ + [395] = {0xFD4422A8U, 0x0000003BU}, /* RGIDR_MODID[411]:RTDM204 */ + [396] = {0xFD4422ACU, 0x0000003BU}, /* RGIDR_MODID[412]:RTDM205 */ + [397] = {0xFD4422B0U, 0x0000003BU}, /* RGIDR_MODID[413]:RTDM206 */ + [398] = {0xFD4422B4U, 0x0000003BU}, /* RGIDR_MODID[414]:RTDM207 */ + [399] = {0xFD4422B8U, 0x0000003BU}, /* RGIDR_MODID[415]:RTDM208 */ + [400] = {0xFD4422BCU, 0x0000003BU}, /* RGIDR_MODID[416]:RTDM209 */ + [401] = {0xFD4422C0U, 0x0000003BU}, /* RGIDR_MODID[417]:RTDM300 */ + [402] = {0xFD4422C4U, 0x0000003BU}, /* RGIDR_MODID[418]:RTDM301 */ + [403] = {0xFD4422C8U, 0x0000003BU}, /* RGIDR_MODID[419]:RTDM310 */ + [404] = {0xFD4422CCU, 0x0000003BU}, /* RGIDR_MODID[420]:RTDM311 */ + [405] = {0xFD4422D0U, 0x0000003BU}, /* RGIDR_MODID[421]:RTDM312 */ + [406] = {0xFD4422D4U, 0x0000003BU}, /* RGIDR_MODID[422]:RTDM313 */ + [407] = {0xFD4422D8U, 0x0000003BU}, /* RGIDR_MODID[423]:RTDM314 */ + [408] = {0xFD4422DCU, 0x0000003BU}, /* RGIDR_MODID[424]:RTDM315 */ + [409] = {0xFD4422E0U, 0x0000003BU}, /* RGIDR_MODID[425]:RTDM302 */ + [410] = {0xFD4422E4U, 0x0000003BU}, /* RGIDR_MODID[426]:RTDM303 */ + [411] = {0xFD4422E8U, 0x0000003BU}, /* RGIDR_MODID[427]:RTDM304 */ + [412] = {0xFD4422ECU, 0x0000003BU}, /* RGIDR_MODID[428]:RTDM305 */ + [413] = {0xFD4422F0U, 0x0000003BU}, /* RGIDR_MODID[429]:RTDM306 */ + [414] = {0xFD4422F4U, 0x0000003BU}, /* RGIDR_MODID[430]:RTDM307 */ + [415] = {0xFD4422F8U, 0x0000003BU}, /* RGIDR_MODID[431]:RTDM308 */ + [416] = {0xFD4422FCU, 0x0000003BU}, /* RGIDR_MODID[432]:RTDM309 */ + [417] = {0xFD442300U, 0x0000000CU}, /* RGIDR_MODID[433]:IPMMURT108 */ + [418] = {0xFD442304U, 0x0000000CU}, /* RGIDR_MODID[434]:IPMMURT109 */ + [419] = {0xFD442308U, 0x00000011U}, /* RGIDR_MODID[435]:SYSRAM01 */ + [420] = {0xFD44230CU, 0x0000003BU}, /* RGIDR_MODID[436]:SYSRAM02 */ + [421] = {0xFD442310U, 0x00000011U}, /* RGIDR_MODID[437]:SYSRAM03 */ + [422] = {0xFD442314U, 0x00000011U}, /* RGIDR_MODID[438]:SYSRAM04 */ + [423] = {0xFD442318U, 0x00000011U}, /* RGIDR_MODID[439]:SYSRAM05 */ + [424] = {0xFD44231CU, 0x00000011U}, /* RGIDR_MODID[440]:SYSRAM06 */ + [425] = {0xFD442320U, 0x00000000U}, /* RGIDR_MODID[441]:SYSRAM07 */ + [426] = {0xFD442324U, 0x0000003BU}, /* RGIDR_MODID[442]:SYSRAM11 */ + [427] = {0xFD442328U, 0x0000003BU}, /* RGIDR_MODID[443]:SYSRAM12 */ + [428] = {0xFD44232CU, 0x0000003BU}, /* RGIDR_MODID[444]:SYSRAM13 */ + [429] = {0xFD442330U, 0x0000003BU}, /* RGIDR_MODID[445]:SYSRAM14 */ + [430] = {0xFD442334U, 0x0000003BU}, /* RGIDR_MODID[446]:SYSRAM15 */ + [431] = {0xFD442338U, 0x0000003BU}, /* RGIDR_MODID[447]:SYSRAM16 */ + [432] = {0xFD44233CU, 0x00000000U}, /* RGIDR_MODID[448]:SYSRAM17 */ + [433] = {0xFD442360U, 0x00000022U}, /* RGIDR_MODID[449]:BKBUF */ + [434] = {0xFD44236CU, 0x0000003FU}, /* RGIDR_MODID[450]:MCU */ + [435] = {0xFF862000U, 0x0000003FU}, /* RGIDR_MODID[451]:ARSC0 */ + /* After setting */ /* RGIDR_MODID[452]:ARSC1 */ + /* After setting */ /* RGIDR_MODID[453]:ARSC2 */ + [436] = {0xFF86200CU, 0x0000003FU}, /* RGIDR_MODID[454]:ARSC3 */ + [437] = {0xFF862010U, 0x0000003FU}, /* RGIDR_MODID[455]:ARSC4 */ + [438] = {0xFF862014U, 0x0000003FU}, /* RGIDR_MODID[456]:ARSC5 */ + [439] = {0xFF862018U, 0x0000003FU}, /* RGIDR_MODID[457]:ARSC6 */ + [440] = {0xFF86201CU, 0x0000003FU}, /* RGIDR_MODID[458]:ARSC7 */ + [441] = {0xFF862020U, 0x00000000U}, /* RGIDR_MODID[459]:ARSC8 */ + [442] = {0xFF862024U, 0x0000003FU}, /* RGIDR_MODID[460]:ARSTM0 */ + /* After setting */ /* RGIDR_MODID[461]:ARSTM1 */ + [443] = {0xFF862030U, 0x0000002EU}, /* RGIDR_MODID[462]:AXIFBABUSTOP0 */ + [444] = {0xFF862034U, 0x0000002EU}, /* RGIDR_MODID[463]:AXIFBABUSTOP1 */ + /* After setting */ /* RGIDR_MODID[464]:ARSTM2 */ + [445] = {0xFF86203CU, 0x0000003FU}, /* RGIDR_MODID[465]:ARSTM3 */ + [446] = {0xFF862040U, 0x0000003FU}, /* RGIDR_MODID[466]:ARSTM4 */ + [447] = {0xFF862044U, 0x0000003FU}, /* RGIDR_MODID[467]:ARSTM5 */ + [448] = {0xFF862048U, 0x0000003FU}, /* RGIDR_MODID[468]:ARSTM6 */ + [449] = {0xFF86204CU, 0x0000003FU}, /* RGIDR_MODID[469]:ARSTM7 */ + [450] = {0xFF862050U, 0x00000000U}, /* RGIDR_MODID[470]:ARSTM8 */ + [451] = {0xFF862054U, 0x0000003BU}, /* RGIDR_MODID[471]:ECMTOP */ + [452] = {0xFF862058U, 0x0000002EU}, /* RGIDR_MODID[472]:FBA */ + [453] = {0xFF86205CU, 0x0000002EU}, /* RGIDR_MODID[473]:FBC */ + [454] = {0xFF862060U, 0x0000000CU}, /* RGIDR_MODID[474]:AXICCI00 */ + [455] = {0xFF862064U, 0x0000000CU}, /* RGIDR_MODID[475]:AXICCI01 */ + [456] = {0xFF862068U, 0x0000000CU}, /* RGIDR_MODID[476]:AXICCI10 */ + [457] = {0xFF86206CU, 0x0000000CU}, /* RGIDR_MODID[477]:AXICCI11 */ + [458] = {0xFF862070U, 0x0000000CU}, /* RGIDR_MODID[478]:AXICCI12 */ + [459] = {0xFF862074U, 0x0000000CU}, /* RGIDR_MODID[479]:AXICCI13 */ + [460] = {0xFF862078U, 0x0000000CU}, /* RGIDR_MODID[480]:AXICCI14 */ + [461] = {0xFF86207CU, 0x0000000CU}, /* RGIDR_MODID[481]:AXICCI15 */ + [462] = {0xFF862080U, 0x0000000CU}, /* RGIDR_MODID[482]:AXICCI2 */ + [463] = {0xFF862084U, 0x0000000CU}, /* RGIDR_MODID[483]:AXICCI3 */ + [464] = {0xFF862088U, 0x0000000CU}, /* RGIDR_MODID[484]:AXICCI4 */ + [465] = {0xFF86208CU, 0x0000000CU}, /* RGIDR_MODID[485]:AXICCI5 */ + [466] = {0xFF862090U, 0x0000000CU}, /* RGIDR_MODID[486]:AXICCI6 */ + [467] = {0xFF862094U, 0x0000000CU}, /* RGIDR_MODID[487]:AXICCI7 */ + [468] = {0xFF862098U, 0x0000000CU}, /* RGIDR_MODID[488]:AXICCI8 */ + [469] = {0xFF86209CU, 0x0000003FU}, /* RGIDR_MODID[489]:AXICCI9 */ + [470] = {0xFF8620A0U, 0x0000003FU}, /* RGIDR_MODID[490]:ECMSTM */ + [471] = {0xFCB82014U, 0x0000002EU}, /* RGIDR_MODID[491]:DMAI2C0 */ + [472] = {0xFCB82018U, 0x0000002EU}, /* RGIDR_MODID[492]:DMAI2C1 */ + [473] = {0xFCB8201CU, 0x0000002EU}, /* RGIDR_MODID[493]:DMAI2C2 */ + [474] = {0xFCB82020U, 0x0000002EU}, /* RGIDR_MODID[494]:DMAI2C3 */ + [475] = {0xFCB82024U, 0x0000002EU}, /* RGIDR_MODID[495]:DMAI2C4 */ + [476] = {0xFCB82028U, 0x0000002EU}, /* RGIDR_MODID[496]:DMAI2C5 */ + [477] = {0xFDDC2000U, 0x00000000U}, /* RGIDR_MODID[497]:ARMM */ + /* After setting */ /* RGIDR_MODID[498]:AXIARNMM */ + [478] = {0xFDDC2008U, 0x0000003FU}, /* RGIDR_MODID[499]:ARSM0 */ + /* After setting */ /* RGIDR_MODID[500]:ARSM1 */ + /* After setting */ /* RGIDR_MODID[501]:ARSM2 */ + [479] = {0xFDDC2014U, 0x0000003FU}, /* RGIDR_MODID[502]:AXIQOS0 */ + [480] = {0xFDDC2018U, 0x0000003FU}, /* RGIDR_MODID[503]:AXIQOS1 */ + [481] = {0xFDDC201CU, 0x0000003FU}, /* RGIDR_MODID[504]:AXIQOS2 */ + [482] = {0xFDDC2020U, 0x0000003FU}, /* RGIDR_MODID[505]:AXIQOS3 */ + [483] = {0xFDDC2024U, 0x0000003FU}, /* RGIDR_MODID[506]:AXIQOS4 */ + [484] = {0xFDDC2030U, 0x0000003FU}, /* RGIDR_MODID[507]:AXIQOS5 */ + [485] = {0xFDDC2034U, 0x0000003FU}, /* RGIDR_MODID[508]:ARSM3 */ + [486] = {0xFDDC2038U, 0x0000003FU}, /* RGIDR_MODID[509]:ARSM4 */ + [487] = {0xFDDC203CU, 0x0000003FU}, /* RGIDR_MODID[510]:ARSM5 */ + [488] = {0xFDDC2040U, 0x0000003FU}, /* RGIDR_MODID[511]:ARSM6 */ + [489] = {0xFDDC2044U, 0x0000003FU}, /* RGIDR_MODID[512]:ARSM7 */ + [490] = {0xFDDC2048U, 0x00000000U}, /* RGIDR_MODID[513]:ARSM8 */ + [491] = {0xFDDC204CU, 0x0000003FU}, /* RGIDR_MODID[514]:AXMM0 */ + [492] = {0xFDDC2050U, 0x0000003FU}, /* RGIDR_MODID[515]:AXMM1 */ + [493] = {0xFDDC2054U, 0x00000000U}, /* RGIDR_MODID[516]:AXMMPMON */ + [494] = {0xFDDC2058U, 0x0000002AU}, /* RGIDR_MODID[517]:CKMMM */ + [495] = {0xFDDC205CU, 0x0000003BU}, /* RGIDR_MODID[518]:ECMMM */ + [496] = {0xFDDC2068U, 0x0000002EU}, /* RGIDR_MODID[519]:FBAMM */ + [497] = {0xFDDC206CU, 0x0000000CU}, /* RGIDR_MODID[520]:IPMMUMM00 */ + [498] = {0xFDDC2070U, 0x0000003FU}, /* RGIDR_MODID[521]:DBS00 */ + [499] = {0xFDDC2074U, 0x0000002AU}, /* RGIDR_MODID[522]:DBS01 */ + [500] = {0xFDDC2080U, 0x0000003FU}, /* RGIDR_MODID[523]:AXCIDBS */ + [501] = {0xFDDC209CU, 0x0000000CU}, /* RGIDR_MODID[524]:IPMMUMM01 */ + [502] = {0xFDDC20A0U, 0x0000000CU}, /* RGIDR_MODID[525]:IPMMUMM10 */ + [503] = {0xFDDC20A4U, 0x0000000CU}, /* RGIDR_MODID[526]:IPMMUMM11 */ + [504] = {0xFDDC20A8U, 0x0000000CU}, /* RGIDR_MODID[527]:IPMMUMM12 */ + [505] = {0xFDDC20ACU, 0x0000000CU}, /* RGIDR_MODID[528]:IPMMUMM13 */ + [506] = {0xFDDC20B0U, 0x0000000CU}, /* RGIDR_MODID[529]:IPMMUMM14 */ + [507] = {0xFDDC20B4U, 0x0000000CU}, /* RGIDR_MODID[530]:IPMMUMM15 */ + [508] = {0xFDDC20B8U, 0x0000000CU}, /* RGIDR_MODID[531]:IPMMUMM02 */ + [509] = {0xFDDC20BCU, 0x0000000CU}, /* RGIDR_MODID[532]:IPMMUMM03 */ + [510] = {0xFDDC20C0U, 0x0000000CU}, /* RGIDR_MODID[533]:IPMMUMM04 */ + [511] = {0xFDDC20C4U, 0x0000000CU}, /* RGIDR_MODID[534]:IPMMUMM05 */ + [512] = {0xFDDC20C8U, 0x0000000CU}, /* RGIDR_MODID[535]:IPMMUMM06 */ + [513] = {0xFDDC20CCU, 0x0000000CU}, /* RGIDR_MODID[536]:IPMMUMM07 */ + [514] = {0xFDDC20D0U, 0x0000000CU}, /* RGIDR_MODID[537]:IPMMUMM08 */ + [515] = {0xFDDC20D4U, 0x0000000CU}, /* RGIDR_MODID[538]:IPMMUMM09 */ + [516] = {0xFCB52000U, 0x0000003FU}, /* RGIDR_MODID[539]:ARSD00 */ + /* After setting */ /* RGIDR_MODID[540]:ARSD01 */ + /* After setting */ /* RGIDR_MODID[541]:ARSD02 */ + [517] = {0xFCB5200CU, 0x0000003FU}, /* RGIDR_MODID[542]:ARSD03 */ + [518] = {0xFCB52010U, 0x0000003FU}, /* RGIDR_MODID[543]:ARSD04 */ + [519] = {0xFCB52014U, 0x0000003FU}, /* RGIDR_MODID[544]:ARSD05 */ + [520] = {0xFCB52018U, 0x0000003FU}, /* RGIDR_MODID[545]:ARSD06 */ + [521] = {0xFCB52028U, 0x0000003FU}, /* RGIDR_MODID[546]:AXIRPC */ + [522] = {0xFCB5202CU, 0x0000003FU}, /* RGIDR_MODID[547]:AXISDHI0 */ + [523] = {0xFCB52030U, 0x0000003FU}, /* RGIDR_MODID[548]:ARSD07 */ + [524] = {0xFCB52034U, 0x00000000U}, /* RGIDR_MODID[549]:ARSD07 */ + [525] = {0xFCB52038U, 0x0000003FU}, /* RGIDR_MODID[550]:ARSP00 */ + /* After setting */ /* RGIDR_MODID[551]:ARSP01 */ + /* After setting */ /* RGIDR_MODID[552]:ARSP02 */ + [526] = {0xFCB52044U, 0x0000003FU}, /* RGIDR_MODID[553]:ARSP03 */ + [527] = {0xFCB52048U, 0x0000003FU}, /* RGIDR_MODID[554]:ARSP04 */ + [528] = {0xFCB5204CU, 0x0000003FU}, /* RGIDR_MODID[555]:ARSP05 */ + [529] = {0xFCB52050U, 0x0000003FU}, /* RGIDR_MODID[556]:ARSP06 */ + [530] = {0xFCB52054U, 0x00000022U}, /* RGIDR_MODID[557]:ARSP07 */ + [531] = {0xFCB52058U, 0x00000000U}, /* RGIDR_MODID[558]:ARSP08 */ + [532] = {0xFCB5205CU, 0x0000000CU}, /* RGIDR_MODID[559]:IPMMUDS001 */ + [533] = {0xFCB52060U, 0x0000002AU}, /* RGIDR_MODID[560]:CKMPER0 */ + [534] = {0xFCB52064U, 0x0000003BU}, /* RGIDR_MODID[561]:ECMPER0 */ + [535] = {0xFCB52068U, 0x0000002EU}, /* RGIDR_MODID[562]:FBAPER0 */ + [536] = {0xFCB5206CU, 0x0000002EU}, /* RGIDR_MODID[563]:FSO0 */ + [537] = {0xFCB52070U, 0x0000002EU}, /* RGIDR_MODID[564]:FSO1 */ + [538] = {0xFCB52074U, 0x0000002EU}, /* RGIDR_MODID[565]:FSO10 */ + [539] = {0xFCB52078U, 0x0000002EU}, /* RGIDR_MODID[566]:FSO2 */ + [540] = {0xFCB5207CU, 0x0000002EU}, /* RGIDR_MODID[567]:FSO3 */ + [541] = {0xFCB52080U, 0x0000002EU}, /* RGIDR_MODID[568]:FSO4 */ + [542] = {0xFCB52084U, 0x0000002EU}, /* RGIDR_MODID[569]:FSO5 */ + [543] = {0xFCB52088U, 0x0000002EU}, /* RGIDR_MODID[570]:FSO6 */ + [544] = {0xFCB5208CU, 0x0000002EU}, /* RGIDR_MODID[571]:FSO7 */ + [545] = {0xFCB52090U, 0x0000002EU}, /* RGIDR_MODID[572]:FSO8 */ + [546] = {0xFCB52094U, 0x0000002EU}, /* RGIDR_MODID[573]:FSO9 */ + [547] = {0xFCB5209CU, 0x0000003BU}, /* RGIDR_MODID[574]:ECMSD0 */ + [548] = {0xFCB520A0U, 0x0000000CU}, /* RGIDR_MODID[575]:IPMMUDS010 */ + [549] = {0xFCB520A4U, 0x0000000CU}, /* RGIDR_MODID[576]:IPMMUDS011 */ + [550] = {0xFCB520A8U, 0x0000002EU}, /* RGIDR_MODID[577]:I2C0 */ + [551] = {0xFCB520ACU, 0x0000002EU}, /* RGIDR_MODID[578]:I2C1 */ + [552] = {0xFCB520B0U, 0x0000002EU}, /* RGIDR_MODID[579]:I2C2 */ + [553] = {0xFCB520B4U, 0x0000002EU}, /* RGIDR_MODID[580]:I2C3 */ + [554] = {0xFCB520B8U, 0x0000002EU}, /* RGIDR_MODID[581]:I2C4 */ + [555] = {0xFCB520BCU, 0x0000002EU}, /* RGIDR_MODID[582]:I2C5 */ + [556] = {0xFCB520C0U, 0x0000000CU}, /* RGIDR_MODID[583]:IPMMUDS012 */ + [557] = {0xFCB520C8U, 0x0000000CU}, /* RGIDR_MODID[584]:IPMMUDS000 */ + [558] = {0xFCB520CCU, 0x0000000CU}, /* RGIDR_MODID[585]:IPMMUDS013 */ + [559] = {0xFCB520D0U, 0x0000000CU}, /* RGIDR_MODID[586]:IPMMUDS014 */ + [560] = {0xFCB520D4U, 0x0000000CU}, /* RGIDR_MODID[587]:IPMMUDS015 */ + [561] = {0xFCB520D8U, 0x0000000CU}, /* RGIDR_MODID[588]:IPMMUDS002 */ + [562] = {0xFCB520DCU, 0x0000000CU}, /* RGIDR_MODID[589]:IPMMUDS003 */ + [563] = {0xFCB520E0U, 0x0000000CU}, /* RGIDR_MODID[590]:IPMMUDS004 */ + [564] = {0xFCB520E4U, 0x0000000CU}, /* RGIDR_MODID[591]:IPMMUDS005 */ + [565] = {0xFCB520ECU, 0x0000000CU}, /* RGIDR_MODID[592]:IPMMUDS006 */ + [566] = {0xFCB520F0U, 0x0000000CU}, /* RGIDR_MODID[593]:IPMMUDS007 */ + [567] = {0xFCB520F4U, 0x0000000CU}, /* RGIDR_MODID[594]:SYDM1P */ + [568] = {0xFCB520F8U, 0x0000000CU}, /* RGIDR_MODID[595]:IPMMUDS008 */ + [569] = {0xFCB520FCU, 0x0000000CU}, /* RGIDR_MODID[596]:SYDM2P */ + [570] = {0xFCB52100U, 0x0000000CU}, /* RGIDR_MODID[597]:IPMMUDS009 */ + [571] = {0xFCB52240U, 0x0000000CU}, /* RGIDR_MODID[598]:SYDM100 */ + [572] = {0xFCB52244U, 0x0000000CU}, /* RGIDR_MODID[599]:SYDM101 */ + [573] = {0xFCB52248U, 0x0000000CU}, /* RGIDR_MODID[600]:SYDM110 */ + [574] = {0xFCB5224CU, 0x0000000CU}, /* RGIDR_MODID[601]:SYDM111 */ + [575] = {0xFCB52250U, 0x0000000CU}, /* RGIDR_MODID[602]:SYDM112 */ + [576] = {0xFCB52254U, 0x0000000CU}, /* RGIDR_MODID[603]:SYDM113 */ + [577] = {0xFCB52258U, 0x0000000CU}, /* RGIDR_MODID[604]:SYDM114 */ + [578] = {0xFCB5225CU, 0x0000000CU}, /* RGIDR_MODID[605]:SYDM115 */ + [579] = {0xFCB52260U, 0x0000000CU}, /* RGIDR_MODID[606]:SYDM102 */ + [580] = {0xFCB52264U, 0x0000000CU}, /* RGIDR_MODID[607]:SYDM103 */ + [581] = {0xFCB52268U, 0x0000000CU}, /* RGIDR_MODID[608]:SYDM104 */ + [582] = {0xFCB5226CU, 0x0000000CU}, /* RGIDR_MODID[609]:SYDM105 */ + [583] = {0xFCB52270U, 0x0000000CU}, /* RGIDR_MODID[610]:SYDM106 */ + [584] = {0xFCB52274U, 0x0000000CU}, /* RGIDR_MODID[611]:SYDM107 */ + [585] = {0xFCB52278U, 0x0000000CU}, /* RGIDR_MODID[612]:SYDM108 */ + [586] = {0xFCB5227CU, 0x0000000CU}, /* RGIDR_MODID[613]:SYDM109 */ + [587] = {0xFCB52280U, 0x0000000CU}, /* RGIDR_MODID[614]:SYDM200 */ + [588] = {0xFCB52284U, 0x0000000CU}, /* RGIDR_MODID[615]:SYDM201 */ + [589] = {0xFCB52288U, 0x0000000CU}, /* RGIDR_MODID[616]:SYDM210 */ + [590] = {0xFCB5228CU, 0x0000000CU}, /* RGIDR_MODID[617]:SYDM211 */ + [591] = {0xFCB52290U, 0x0000000CU}, /* RGIDR_MODID[618]:SYDM212 */ + [592] = {0xFCB52294U, 0x0000000CU}, /* RGIDR_MODID[619]:SYDM213 */ + [593] = {0xFCB52298U, 0x0000000CU}, /* RGIDR_MODID[620]:SYDM214 */ + [594] = {0xFCB5229CU, 0x0000000CU}, /* RGIDR_MODID[621]:SYDM215 */ + [595] = {0xFCB522A0U, 0x0000000CU}, /* RGIDR_MODID[622]:SYDM202 */ + [596] = {0xFCB522A4U, 0x0000000CU}, /* RGIDR_MODID[623]:SYDM203 */ + [597] = {0xFCB522A8U, 0x0000000CU}, /* RGIDR_MODID[624]:SYDM204 */ + [598] = {0xFCB522ACU, 0x0000000CU}, /* RGIDR_MODID[625]:SYDM205 */ + [599] = {0xFCB522B0U, 0x0000000CU}, /* RGIDR_MODID[626]:SYDM206 */ + [600] = {0xFCB522B4U, 0x0000000CU}, /* RGIDR_MODID[627]:SYDM207 */ + [601] = {0xFCB522B8U, 0x0000000CU}, /* RGIDR_MODID[628]:SYDM208 */ + [602] = {0xFCB522BCU, 0x0000000CU}, /* RGIDR_MODID[629]:SYDM209 */ + [604] = {0xFDDB9660U, 0x0000003FU}, /* RGIDR_MODID[630]:ARCC */ + [603] = {0xFDDB9674U, 0x0000003FU}, /* RGIDR_MODID[631]:ARRTRAM */ + [605] = {0xFCB52024U, 0x00000000U}, /* RGIDR_MODID[632]:RSV0 */ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_w_tbl" +const REGION_ID_SETTING_TABLE g_rgid_w_tbl[] = { + [0] = {0xFD482400U, 0x0000002EU}, /* RGIDW_MODID[0]:ARMGC0 */ + [1] = {0xFD482404U, 0x0000002EU}, /* RGIDW_MODID[1]:ARMGC1 */ + [2] = {0xFD482408U, 0x00000000U}, /* RGIDW_MODID[2]:ARMGC2 */ + [3] = {0xFD48240CU, 0x00000022U}, /* RGIDW_MODID[3]:ARRT00 */ + /* After setting */ /* RGIDW_MODID[4]:ARRT01 */ + /* After setting */ /* RGIDW_MODID[5]:ARRT02 */ + [4] = {0xFD482418U, 0x00000011U}, /* RGIDW_MODID[6]:ARRT03 */ + [5] = {0xFD48241CU, 0x00000022U}, /* RGIDW_MODID[7]:ARRT04 */ + [6] = {0xFD482420U, 0x00000011U}, /* RGIDW_MODID[8]:ARRT05 */ + [7] = {0xFD482424U, 0x00000022U}, /* RGIDW_MODID[9]:ARRT06 */ + [8] = {0xFD482428U, 0x00000022U}, /* RGIDW_MODID[10]:ARRT07 */ + [9] = {0xFD48242CU, 0x00000000U}, /* RGIDW_MODID[11]:ARRT08 */ + [10] = {0xFD482430U, 0x00000011U}, /* RGIDW_MODID[12]:LIFEC0 */ + [11] = {0xFD482434U, 0x00000026U}, /* RGIDW_MODID[13]:SWDT */ + [12] = {0xFD482438U, 0x0000003FU}, /* RGIDW_MODID[14]:TMU0 */ + [13] = {0xFD48243CU, 0x00000026U}, /* RGIDW_MODID[15]:WDT */ + [14] = {0xFD482440U, 0x00000026U}, /* RGIDW_MODID[16]:WWDT0 */ + [15] = {0xFD482444U, 0x00000026U}, /* RGIDW_MODID[17]:WWDT1 */ + [16] = {0xFD482448U, 0x00000026U}, /* RGIDW_MODID[18]:WWDT2 */ + [17] = {0xFD48244CU, 0x00000026U}, /* RGIDW_MODID[19]:WWDT3 */ + [18] = {0xFD482450U, 0x00000026U}, /* RGIDW_MODID[20]:WWDT4 */ + [19] = {0xFD482454U, 0x00000026U}, /* RGIDW_MODID[21]:WWDT5 */ + [20] = {0xFD482458U, 0x00000026U}, /* RGIDW_MODID[22]:WWDT6 */ + [21] = {0xFD48245CU, 0x00000026U}, /* RGIDW_MODID[23]:WWDT7 */ + [22] = {0xFD482460U, 0x00000026U}, /* RGIDW_MODID[24]:WWDT8 */ + [23] = {0xFD482464U, 0x00000026U}, /* RGIDW_MODID[25]:WWDT9 */ + [24] = {0xFD482468U, 0x0000003FU}, /* RGIDW_MODID[26]:ECMRT3 */ + [25] = {0xFDA02400U, 0x00000026U}, /* RGIDW_MODID[27]:ADVFSC */ + [26] = {0xFDA02404U, 0x0000003FU}, /* RGIDW_MODID[28]:APMU0 */ + [27] = {0xFDA02408U, 0x00000002U}, /* RGIDW_MODID[29]:APMU1 */ + [28] = {0xFDA0240CU, 0x00000000U}, /* RGIDW_MODID[30]:APMU10 */ + [29] = {0xFDA02410U, 0x00000000U}, /* RGIDW_MODID[31]:APMU11 */ + [30] = {0xFDA02414U, 0x00000000U}, /* RGIDW_MODID[32]:APMU12 */ + [31] = {0xFDA02418U, 0x00000000U}, /* RGIDW_MODID[33]:APMU13 */ + [32] = {0xFDA0241CU, 0x00000000U}, /* RGIDW_MODID[34]:APMU14 */ + [33] = {0xFDA02420U, 0x00000000U}, /* RGIDW_MODID[35]:APMU15 */ + [34] = {0xFDA02424U, 0x00000004U}, /* RGIDW_MODID[36]:APMU2 */ + [35] = {0xFDA02428U, 0x00000004U}, /* RGIDW_MODID[37]:APMU3 */ + [36] = {0xFDA0242CU, 0x00000000U}, /* RGIDW_MODID[38]:APMU4 */ + [37] = {0xFDA02430U, 0x00000000U}, /* RGIDW_MODID[39]:APMU5 */ + [38] = {0xFDA02434U, 0x00000000U}, /* RGIDW_MODID[40]:APMU6 */ + [39] = {0xFDA02438U, 0x00000000U}, /* RGIDW_MODID[41]:APMU7 */ + [40] = {0xFDA0243CU, 0x00000000U}, /* RGIDW_MODID[42]:APMU8 */ + [41] = {0xFDA02440U, 0x00000000U}, /* RGIDW_MODID[43]:APMU9 */ + [42] = {0xFDA02444U, 0x00000022U}, /* RGIDW_MODID[44]:ARS00 */ + /* After setting */ /* RGIDW_MODID[45]:ARS01 */ + /* After setting */ /* RGIDW_MODID[46]:ARS02 */ + [43] = {0xFDA02450U, 0x00000011U}, /* RGIDW_MODID[47]:ARS03 */ + [44] = {0xFDA02454U, 0x00000022U}, /* RGIDW_MODID[48]:ARS04 */ + [45] = {0xFDA02458U, 0x00000011U}, /* RGIDW_MODID[49]:ARS05 */ + [46] = {0xFDA0245CU, 0x00000022U}, /* RGIDW_MODID[50]:ARS06 */ + [47] = {0xFDA02460U, 0x00000022U}, /* RGIDW_MODID[51]:ARS07 */ + [48] = {0xFDA02464U, 0x00000000U}, /* RGIDW_MODID[52]:ARS08 */ + [49] = {0xFDA02468U, 0x0000002EU}, /* RGIDW_MODID[53]:CMT0 */ + [50] = {0xFDA0246CU, 0x0000002EU}, /* RGIDW_MODID[54]:CMT1 */ + [51] = {0xFDA02470U, 0x0000002EU}, /* RGIDW_MODID[55]:CMT2 */ + [52] = {0xFDA02474U, 0x0000002EU}, /* RGIDW_MODID[56]:CMT3 */ + [53] = {0xFDA02478U, 0x0000002AU}, /* RGIDW_MODID[57]:CKM */ + [54] = {0xFDA0247CU, 0x0000002EU}, /* RGIDW_MODID[58]:DBE */ + [55] = {0xFDA02480U, 0x0000002EU}, /* RGIDW_MODID[59]:IRQC */ + [56] = {0xFDA02484U, 0x0000003BU}, /* RGIDW_MODID[60]:ECMPS0 */ + [57] = {0xFDA0249CU, 0x0000002EU}, /* RGIDW_MODID[61]:SCMT */ + [58] = {0xFDA024A8U, 0x0000002EU}, /* RGIDW_MODID[62]:TSC1 */ + [59] = {0xFDA024ACU, 0x0000002EU}, /* RGIDW_MODID[63]:TSC2 */ + [60] = {0xFDA024B0U, 0x0000002EU}, /* RGIDW_MODID[64]:TSC3 */ + [61] = {0xFDA024B4U, 0x0000002EU}, /* RGIDW_MODID[65]:TSC4 */ + [62] = {0xFDA024B8U, 0x00000026U}, /* RGIDW_MODID[66]:UCMT */ + [63] = {0xFDA02500U, 0x0000003FU}, /* RGIDW_MODID[67]:CPG0 */ + [64] = {0xFDA02504U, 0x0000002AU}, /* RGIDW_MODID[68]:CPG1 */ + [65] = {0xFDA02508U, 0x0000000CU}, /* RGIDW_MODID[69]:CPG2 */ + [66] = {0xFDA0250CU, 0x0000000CU}, /* RGIDW_MODID[70]:CPG3 */ + [67] = {0xFDA02510U, 0x0000003FU}, /* RGIDW_MODID[71]:PFC00 */ + [68] = {0xFDA02514U, 0x0000002AU}, /* RGIDW_MODID[72]:PFC01 */ + [69] = {0xFDA02518U, 0x0000000CU}, /* RGIDW_MODID[73]:PFC02 */ + [70] = {0xFDA0251CU, 0x0000000CU}, /* RGIDW_MODID[74]:PFC03 */ + [71] = {0xFDA02550U, 0x0000003FU}, /* RGIDW_MODID[75]:PFCS0 */ + [72] = {0xFDA02554U, 0x0000002AU}, /* RGIDW_MODID[76]:PFCS1 */ + [73] = {0xFDA02558U, 0x0000000CU}, /* RGIDW_MODID[77]:PFCS2 */ + [74] = {0xFDA0255CU, 0x0000000CU}, /* RGIDW_MODID[78]:PFCS3 */ + [75] = {0xFDA02560U, 0x0000003FU}, /* RGIDW_MODID[79]:RESET0 */ + [76] = {0xFDA02564U, 0x0000002AU}, /* RGIDW_MODID[80]:RESET1 */ + [77] = {0xFDA02568U, 0x0000000CU}, /* RGIDW_MODID[81]:RESET2 */ + [78] = {0xFDA0256CU, 0x0000000CU}, /* RGIDW_MODID[82]:RESET3 */ + [79] = {0xFDA02570U, 0x0000003FU}, /* RGIDW_MODID[83]:SYS0 */ + [80] = {0xFDA02574U, 0x0000002AU}, /* RGIDW_MODID[84]:SYS1 */ + [81] = {0xFDA02578U, 0x0000000CU}, /* RGIDW_MODID[85]:SYS2 */ + [82] = {0xFDA0257CU, 0x0000000CU}, /* RGIDW_MODID[86]:SYS3 */ + [83] = {0xFCB62400U, 0x0000002EU}, /* RGIDW_MODID[87]:DMAMSI0 */ + [84] = {0xFCB62404U, 0x0000002EU}, /* RGIDW_MODID[88]:DMAMSI1 */ + [85] = {0xFCB62408U, 0x0000002EU}, /* RGIDW_MODID[89]:DMAMSI2 */ + [86] = {0xFCB6240CU, 0x0000002EU}, /* RGIDW_MODID[90]:DMAMSI3 */ + [87] = {0xFCB62418U, 0x0000003BU}, /* RGIDW_MODID[91]:ECMSP3 */ + [88] = {0xFCB62424U, 0x00000022U}, /* RGIDW_MODID[92]:ARSP30 */ + /* After setting */ /* RGIDW_MODID[93]:ARSP31 */ + /* After setting */ /* RGIDW_MODID[94]:ARSP32 */ + [89] = {0xFCB62430U, 0x00000011U}, /* RGIDW_MODID[95]:ARSP33 */ + [90] = {0xFCB62434U, 0x00000022U}, /* RGIDW_MODID[96]:ARSP34 */ + [91] = {0xFCB62438U, 0x00000011U}, /* RGIDW_MODID[97]:ARSP35 */ + [92] = {0xFCB6243CU, 0x00000022U}, /* RGIDW_MODID[98]:ARSP36 */ + [93] = {0xFCB62440U, 0x00000022U}, /* RGIDW_MODID[99]:ARSP37 */ + [94] = {0xFCB62444U, 0x00000000U}, /* RGIDW_MODID[100]:ARSP38 */ + [95] = {0xFCB62448U, 0x0000002EU}, /* RGIDW_MODID[101]:MSI0 */ + [96] = {0xFCB6244CU, 0x0000002EU}, /* RGIDW_MODID[102]:MSI1 */ + [97] = {0xFCB62450U, 0x0000002EU}, /* RGIDW_MODID[103]:MSI2 */ + [98] = {0xFCB62454U, 0x0000002EU}, /* RGIDW_MODID[104]:MSI3 */ + [99] = {0xFCB92400U, 0x00000022U}, /* RGIDW_MODID[105]:ARSP40 */ + /* After setting */ /* RGIDW_MODID[106]:ARSP41 */ + /* After setting */ /* RGIDW_MODID[107]:ARSP42 */ + [100] = {0xFCB9240CU, 0x00000011U}, /* RGIDW_MODID[108]:ARSP43 */ + [101] = {0xFCB92410U, 0x00000022U}, /* RGIDW_MODID[109]:ARSP44 */ + [102] = {0xFCB92414U, 0x00000011U}, /* RGIDW_MODID[110]:ARSP45 */ + [103] = {0xFCB92418U, 0x00000022U}, /* RGIDW_MODID[111]:ARSP46 */ + [104] = {0xFCB9241CU, 0x00000022U}, /* RGIDW_MODID[112]:ARSP47 */ + [105] = {0xFCB92420U, 0x00000000U}, /* RGIDW_MODID[113]:ARSP48 */ + [106] = {0xFCB92424U, 0x0000003FU}, /* RGIDW_MODID[114]:DMAHSCIF0 */ + [107] = {0xFCB92428U, 0x0000003FU}, /* RGIDW_MODID[115]:DMAHSCIF1 */ + [108] = {0xFCB9242CU, 0x0000003FU}, /* RGIDW_MODID[116]:DMAHSCIF2 */ + [109] = {0xFCB92430U, 0x0000003FU}, /* RGIDW_MODID[117]:DMAHSCIF3 */ + [110] = {0xFCB92434U, 0x0000003FU}, /* RGIDW_MODID[118]:DMASCIF0 */ + [111] = {0xFCB92438U, 0x0000003FU}, /* RGIDW_MODID[119]:DMASCIF1 */ + [112] = {0xFCB9243CU, 0x0000003FU}, /* RGIDW_MODID[120]:DMASCIF3 */ + [113] = {0xFCB92440U, 0x0000003FU}, /* RGIDW_MODID[121]:DMASCIF4 */ + [114] = {0xFCB92444U, 0x0000003BU}, /* RGIDW_MODID[122]:ECMSP4 */ + [115] = {0xFCB92448U, 0x0000003FU}, /* RGIDW_MODID[123]:HSCIF0 */ + [116] = {0xFCB9244CU, 0x0000003FU}, /* RGIDW_MODID[124]:HSCIF1 */ + [117] = {0xFCB92450U, 0x0000003FU}, /* RGIDW_MODID[125]:HSCIF2 */ + [118] = {0xFCB92454U, 0x0000003FU}, /* RGIDW_MODID[126]:HSCIF3 */ + [119] = {0xFCB92458U, 0x0000003FU}, /* RGIDW_MODID[127]:SCIF0 */ + [120] = {0xFCB9245CU, 0x0000003FU}, /* RGIDW_MODID[128]:SCIF1 */ + [121] = {0xFCB92460U, 0x0000003FU}, /* RGIDW_MODID[129]:SCIF3 */ + [122] = {0xFCB92464U, 0x0000003FU}, /* RGIDW_MODID[130]:SCIF4 */ + [123] = {0xFCB92468U, 0x0000003FU}, /* RGIDW_MODID[131]:TMU1 */ + [124] = {0xFCB9246CU, 0x0000003FU}, /* RGIDW_MODID[132]:TMU2 */ + [125] = {0xFCB92470U, 0x0000003FU}, /* RGIDW_MODID[133]:TMU3 */ + [126] = {0xFCB92474U, 0x0000003FU}, /* RGIDW_MODID[134]:TMU4 */ + [127] = {0xFCF82400U, 0x0000002AU}, /* RGIDW_MODID[135]:CKMHSC */ + [128] = {0xFCF82404U, 0x0000000CU}, /* RGIDW_MODID[136]:AXIPCI001 */ + [129] = {0xFCF82408U, 0x0000000CU}, /* RGIDW_MODID[137]:AXIPCI002 */ + [130] = {0xFCF8240CU, 0x0000000CU}, /* RGIDW_MODID[138]:AXIPCI003 */ + [131] = {0xFCF82410U, 0x0000002EU}, /* RGIDW_MODID[139]:ETHPHY */ + [132] = {0xFCF82414U, 0x0000000CU}, /* RGIDW_MODID[140]:AXIPCI005 */ + [133] = {0xFCF82418U, 0x0000000CU}, /* RGIDW_MODID[141]:AXIPCI006 */ + [134] = {0xFCF8241CU, 0x0000000CU}, /* RGIDW_MODID[142]:AXIPCI007 */ + [135] = {0xFCF82420U, 0x0000000CU}, /* RGIDW_MODID[143]:AXIPCI008 */ + [136] = {0xFCF82424U, 0x0000000CU}, /* RGIDW_MODID[144]:AXIPCI009 */ + [137] = {0xFCF82428U, 0x0000000CU}, /* RGIDW_MODID[145]:AXIPCI010 */ + [138] = {0xFCF8242CU, 0x0000000CU}, /* RGIDW_MODID[146]:AXIPCI011 */ + [139] = {0xFCF82430U, 0x0000000CU}, /* RGIDW_MODID[147]:AXIPCI012 */ + [140] = {0xFCF82434U, 0x0000000CU}, /* RGIDW_MODID[148]:AXIPCI013 */ + [141] = {0xFCF82438U, 0x0000000CU}, /* RGIDW_MODID[149]:AXIPCI014 */ + [142] = {0xFCF8243CU, 0x0000000CU}, /* RGIDW_MODID[150]:AXIPCI015 */ + [143] = {0xFCF82440U, 0x0000000CU}, /* RGIDW_MODID[151]:AXIPCI100 */ + [144] = {0xFCF82444U, 0x0000000CU}, /* RGIDW_MODID[152]:AXIPCI101 */ + [145] = {0xFCF82448U, 0x0000000CU}, /* RGIDW_MODID[153]:AXIPCI102 */ + [146] = {0xFCF8244CU, 0x0000000CU}, /* RGIDW_MODID[154]:AXIPCI103 */ + [147] = {0xFCF82450U, 0x0000000CU}, /* RGIDW_MODID[155]:AXIPCI104 */ + [148] = {0xFCF82454U, 0x0000000CU}, /* RGIDW_MODID[156]:AXIPCI105 */ + [149] = {0xFCF82458U, 0x0000000CU}, /* RGIDW_MODID[157]:AXIPCI106 */ + [150] = {0xFCF8245CU, 0x0000000CU}, /* RGIDW_MODID[158]:AXIPCI107 */ + [151] = {0xFCF82460U, 0x0000000CU}, /* RGIDW_MODID[159]:AXIPCI108 */ + [152] = {0xFCF82464U, 0x0000000CU}, /* RGIDW_MODID[160]:AXIPCI109 */ + [153] = {0xFCF82468U, 0x0000000CU}, /* RGIDW_MODID[161]:AXIPCI110 */ + [154] = {0xFCF8246CU, 0x0000000CU}, /* RGIDW_MODID[162]:AXIPCI111 */ + [155] = {0xFCF82470U, 0x0000000CU}, /* RGIDW_MODID[163]:AXIPCI112 */ + [156] = {0xFCF82474U, 0x0000000CU}, /* RGIDW_MODID[164]:AXIPCI113 */ + [157] = {0xFCF82478U, 0x0000000CU}, /* RGIDW_MODID[165]:AXIPCI114 */ + [158] = {0xFCF8247CU, 0x0000000CU}, /* RGIDW_MODID[166]:AXIPCI115 */ + [159] = {0xFCF82480U, 0x0000002EU}, /* RGIDW_MODID[167]:ETHPHYRAM */ + [160] = {0xFCF82488U, 0x0000000CU}, /* RGIDW_MODID[168]:IPMMUHC00 */ + [161] = {0xFCF8248CU, 0x0000002EU}, /* RGIDW_MODID[169]:RSW200 */ + [162] = {0xFCF82490U, 0x0000002EU}, /* RGIDW_MODID[170]:RSW201 */ + [163] = {0xFCF82494U, 0x0000002EU}, /* RGIDW_MODID[171]:RSW210 */ + [164] = {0xFCF82498U, 0x0000002EU}, /* RGIDW_MODID[172]:RSW211 */ + [165] = {0xFCF8249CU, 0x0000002EU}, /* RGIDW_MODID[173]:RSW202 */ + [166] = {0xFCF824A0U, 0x0000002EU}, /* RGIDW_MODID[174]:RSW203 */ + [167] = {0xFCF824A4U, 0x0000002EU}, /* RGIDW_MODID[175]:RSW204 */ + [168] = {0xFCF824A8U, 0x0000002EU}, /* RGIDW_MODID[176]:RSW205 */ + [169] = {0xFCF824ACU, 0x0000002EU}, /* RGIDW_MODID[177]:RSW206 */ + [170] = {0xFCF824B0U, 0x0000002EU}, /* RGIDW_MODID[178]:RSW207 */ + [171] = {0xFCF824B4U, 0x0000002EU}, /* RGIDW_MODID[179]:RSW208 */ + [172] = {0xFCF824B8U, 0x0000002EU}, /* RGIDW_MODID[180]:RSW209 */ + [173] = {0xFCF824BCU, 0x0000002EU}, /* RGIDW_MODID[181]:RSW2RAM */ + [174] = {0xFCF824C0U, 0x0000002AU}, /* RGIDW_MODID[182]:RSW2SEC00 */ + [175] = {0xFCF824C4U, 0x0000002AU}, /* RGIDW_MODID[183]:RSW2SEC01 */ + [176] = {0xFCF824C8U, 0x0000002AU}, /* RGIDW_MODID[184]:RSW2SEC10 */ + [177] = {0xFCF824CCU, 0x0000002AU}, /* RGIDW_MODID[185]:RSW2SEC11 */ + [178] = {0xFCF824D0U, 0x0000002AU}, /* RGIDW_MODID[186]:RSW2SEC02 */ + [179] = {0xFCF824D4U, 0x0000002AU}, /* RGIDW_MODID[187]:RSW2SEC03 */ + [180] = {0xFCF824D8U, 0x0000002AU}, /* RGIDW_MODID[188]:RSW2SEC04 */ + [181] = {0xFCF824DCU, 0x0000002AU}, /* RGIDW_MODID[189]:RSW2SEC05 */ + [182] = {0xFCF824E0U, 0x0000002AU}, /* RGIDW_MODID[190]:RSW2SEC06 */ + [183] = {0xFCF824E4U, 0x0000002AU}, /* RGIDW_MODID[191]:RSW2SEC07 */ + [184] = {0xFCF824E8U, 0x0000002AU}, /* RGIDW_MODID[192]:RSW2SEC08 */ + [185] = {0xFCF824ECU, 0x0000002AU}, /* RGIDW_MODID[193]:RSW2SEC09 */ + [186] = {0xFCF824F4U, 0x0000000CU}, /* RGIDW_MODID[194]:AXIPCI000 */ + [187] = {0xFCF824F8U, 0x0000000CU}, /* RGIDW_MODID[195]:AXIPCI004 */ + [188] = {0xFCF824FCU, 0x0000000CU}, /* RGIDW_MODID[196]:IPMMUHC01 */ + [189] = {0xFCF8250CU, 0x0000000CU}, /* RGIDW_MODID[197]:IPMMUHC10 */ + [190] = {0xFCF82510U, 0x0000000CU}, /* RGIDW_MODID[198]:IPMMUHC11 */ + [191] = {0xFCF82514U, 0x0000000CU}, /* RGIDW_MODID[199]:IPMMUHC12 */ + [192] = {0xFCF82518U, 0x0000000CU}, /* RGIDW_MODID[200]:IPMMUHC13 */ + [193] = {0xFCF8251CU, 0x0000000CU}, /* RGIDW_MODID[201]:PPHY0 */ + [194] = {0xFCF82520U, 0x0000000CU}, /* RGIDW_MODID[202]:PPHY1 */ + [195] = {0xFCF82524U, 0x0000000CU}, /* RGIDW_MODID[203]:IPMMUHC14 */ + [196] = {0xFCF82528U, 0x0000000CU}, /* RGIDW_MODID[204]:IPMMUHC15 */ + [197] = {0xFCF8252CU, 0x0000002EU}, /* RGIDW_MODID[205]:FBAHSC */ + [198] = {0xFCF82530U, 0x0000000CU}, /* RGIDW_MODID[206]:IPMMUHC02 */ + [199] = {0xFCF82534U, 0x0000003FU}, /* RGIDW_MODID[207]:AXIUFSS */ + [200] = {0xFCF82538U, 0x0000003BU}, /* RGIDW_MODID[208]:ECMHSC */ + [201] = {0xFCF8253CU, 0x00000022U}, /* RGIDW_MODID[209]:ARHC0 */ + /* After setting */ /* RGIDW_MODID[210]:ARHC1 */ + /* After setting */ /* RGIDW_MODID[211]:ARHC2 */ + [202] = {0xFCF82548U, 0x00000011U}, /* RGIDW_MODID[212]:ARHC3 */ + [203] = {0xFCF8254CU, 0x00000022U}, /* RGIDW_MODID[213]:ARHC4 */ + [204] = {0xFCF82550U, 0x00000011U}, /* RGIDW_MODID[214]:ARHC5 */ + [205] = {0xFCF82554U, 0x00000022U}, /* RGIDW_MODID[215]:ARHC6 */ + [206] = {0xFCF82558U, 0x00000022U}, /* RGIDW_MODID[216]:ARHC7 */ + [207] = {0xFCF8255CU, 0x00000000U}, /* RGIDW_MODID[217]:ARHC8 */ + [208] = {0xFCF82560U, 0x0000000CU}, /* RGIDW_MODID[218]:IPMMUHC03 */ + [209] = {0xFCF82564U, 0x0000000CU}, /* RGIDW_MODID[219]:IPMMUHC04 */ + [210] = {0xFCF82568U, 0x0000000CU}, /* RGIDW_MODID[220]:IPMMUHC05 */ + [211] = {0xFCF8256CU, 0x0000000CU}, /* RGIDW_MODID[221]:IPMMUHC06 */ + [212] = {0xFCF82570U, 0x0000000CU}, /* RGIDW_MODID[222]:IPMMUHC07 */ + [213] = {0xFCF82574U, 0x0000000CU}, /* RGIDW_MODID[223]:IPMMUHC08 */ + [214] = {0xFCF82578U, 0x0000000CU}, /* RGIDW_MODID[224]:IPMMUHC09 */ + [215] = {0xFDC22400U, 0x00000022U}, /* RGIDW_MODID[225]:ARRC0 */ + [216] = {0xFDC22404U, 0x00000000U}, /* RGIDW_MODID[226]:ARRC1 */ + /* After setting */ /* RGIDW_MODID[227]:ARRC2 */ + /* After setting */ /* RGIDW_MODID[228]:ARRC3 */ + [217] = {0xFDC22410U, 0x00000022U}, /* RGIDW_MODID[229]:ARRC4 */ + [218] = {0xFDC22414U, 0x00000011U}, /* RGIDW_MODID[230]:ARRC5 */ + [219] = {0xFDC22418U, 0x00000022U}, /* RGIDW_MODID[231]:ARRC6 */ + [220] = {0xFDC2241CU, 0x00000022U}, /* RGIDW_MODID[232]:ARRC7 */ + [221] = {0xFDC22420U, 0x00000000U}, /* RGIDW_MODID[233]:ARRC8 */ + [222] = {0xFDC22424U, 0x00000019U}, /* RGIDW_MODID[234]:CR0 */ + [223] = {0xFDC22428U, 0x0000003FU}, /* RGIDW_MODID[235]:ICUMX */ + [224] = {0xFDC2242CU, 0x0000003BU}, /* RGIDW_MODID[236]:ECMRC */ + [225] = {0xFD432400U, 0x0000002EU}, /* RGIDW_MODID[237]:DMAWCRC0 */ + [226] = {0xFD432404U, 0x0000002EU}, /* RGIDW_MODID[238]:DMAWCRC1 */ + [227] = {0xFD432408U, 0x0000002EU}, /* RGIDW_MODID[239]:DMAWCRC2 */ + [228] = {0xFD43240CU, 0x0000002EU}, /* RGIDW_MODID[240]:DMAWCRC3 */ + [229] = {0xFD432410U, 0x0000000CU}, /* RGIDW_MODID[241]:DMATSIP0 */ + [230] = {0xFD432414U, 0x0000000CU}, /* RGIDW_MODID[242]:DMATSIP1 */ + [231] = {0xFD432418U, 0x0000000CU}, /* RGIDW_MODID[243]:DMATSIP2 */ + [232] = {0xFD442400U, 0x0000003FU}, /* RGIDW_MODID[244]:ARMREG00 */ + [233] = {0xFD442404U, 0x0000000CU}, /* RGIDW_MODID[245]:ARMREG01 */ + [234] = {0xFD442408U, 0x00000000U}, /* RGIDW_MODID[246]:ARMREG10 */ + [235] = {0xFD44240CU, 0x00000000U}, /* RGIDW_MODID[247]:ARMREG11 */ + [236] = {0xFD442410U, 0x0000002AU}, /* RGIDW_MODID[248]:ARMREG12 */ + [237] = {0xFD442414U, 0x0000003FU}, /* RGIDW_MODID[249]:ARMREG13 */ + [238] = {0xFD442418U, 0x0000002AU}, /* RGIDW_MODID[250]:ARMREG14 */ + [239] = {0xFD44241CU, 0x00000033U}, /* RGIDW_MODID[251]:AXICR52SS */ + [240] = {0xFD442420U, 0x0000002EU}, /* RGIDW_MODID[252]:AXICSD0 */ + [241] = {0xFD442424U, 0x0000002EU}, /* RGIDW_MODID[253]:AXIINTAP0 */ + [242] = {0xFD442428U, 0x0000002EU}, /* RGIDW_MODID[254]:AXIINTAP1 */ + [243] = {0xFD44242CU, 0x00000019U}, /* RGIDW_MODID[255]:AXISECROM */ + [244] = {0xFD442430U, 0x0000003FU}, /* RGIDW_MODID[256]:AXISYSRAM0 */ + [245] = {0xFD442434U, 0x0000003FU}, /* RGIDW_MODID[257]:AXISYSRAM1 */ + [246] = {0xFD442438U, 0x00000000U}, /* RGIDW_MODID[258]:ARGREG15 */ + [247] = {0xFD44243CU, 0x00000000U}, /* RGIDW_MODID[259]:ARMREG2 */ + [248] = {0xFD442440U, 0x00000000U}, /* RGIDW_MODID[260]:ARMREG3 */ + [249] = {0xFD442444U, 0x00000000U}, /* RGIDW_MODID[261]:ARMREG4 */ + [250] = {0xFD442448U, 0x0000003FU}, /* RGIDW_MODID[262]:ARMREG5 */ + [251] = {0xFD44244CU, 0x0000002AU}, /* RGIDW_MODID[263]:ARMREG6 */ + [252] = {0xFD442450U, 0x00000000U}, /* RGIDW_MODID[264]:ARMREG7 */ + [253] = {0xFD442454U, 0x0000000CU}, /* RGIDW_MODID[265]:ARMREG8 */ + [254] = {0xFD442458U, 0x0000000CU}, /* RGIDW_MODID[266]:ARMREG9 */ + [255] = {0xFD44245CU, 0x00000022U}, /* RGIDW_MODID[267]:ARRD0 */ + /* After setting */ /* RGIDW_MODID[268]:ARRD1 */ + /* After setting */ /* RGIDW_MODID[269]:ARRD2 */ + [256] = {0xFD442468U, 0x00000011U}, /* RGIDW_MODID[270]:ARRD3 */ + [257] = {0xFD44246CU, 0x00000022U}, /* RGIDW_MODID[271]:ARRD4 */ + [258] = {0xFD442470U, 0x00000011U}, /* RGIDW_MODID[272]:ARRD5 */ + [259] = {0xFD442474U, 0x00000022U}, /* RGIDW_MODID[273]:ARRD6 */ + [260] = {0xFD442478U, 0x00000022U}, /* RGIDW_MODID[274]:ARRD7 */ + [261] = {0xFD44247CU, 0x00000000U}, /* RGIDW_MODID[275]:ARRD8 */ + [262] = {0xFD442480U, 0x00000022U}, /* RGIDW_MODID[276]:ARRT0 */ + /* After setting */ /* RGIDW_MODID[277]:ARRT1 */ + /* After setting */ /* RGIDW_MODID[278]:ARRT2 */ + [263] = {0xFD44248CU, 0x00000011U}, /* RGIDW_MODID[279]:ARRT3 */ + [264] = {0xFD442490U, 0x00000022U}, /* RGIDW_MODID[280]:ARRT4 */ + [265] = {0xFD442494U, 0x00000011U}, /* RGIDW_MODID[281]:ARRT5 */ + [266] = {0xFD442498U, 0x00000022U}, /* RGIDW_MODID[282]:ARRT6 */ + [267] = {0xFD44249CU, 0x00000022U}, /* RGIDW_MODID[283]:ARRT7 */ + [268] = {0xFD4424A0U, 0x00000000U}, /* RGIDW_MODID[284]:ARRT8 */ + [269] = {0xFD4424A4U, 0x0000002AU}, /* RGIDW_MODID[285]:CKMRT */ + [270] = {0xFD4424A8U, 0x0000002EU}, /* RGIDW_MODID[286]:CRC0 */ + [271] = {0xFD4424ACU, 0x0000002EU}, /* RGIDW_MODID[287]:CRC1 */ + [272] = {0xFD4424B0U, 0x0000002EU}, /* RGIDW_MODID[288]:CRC2 */ + [273] = {0xFD4424B4U, 0x0000002EU}, /* RGIDW_MODID[289]:CRC3 */ + [274] = {0xFD4424B8U, 0x0000002EU}, /* RGIDW_MODID[290]:CSD */ + [275] = {0xFD4424BCU, 0x0000003BU}, /* RGIDW_MODID[291]:ECM */ + [276] = {0xFD4424C0U, 0x0000003BU}, /* RGIDW_MODID[292]:ECMRT */ + [277] = {0xFD4424C4U, 0x0000002EU}, /* RGIDW_MODID[293]:FBACR52 */ + [278] = {0xFD4424C8U, 0x0000002EU}, /* RGIDW_MODID[294]:FBART */ + [279] = {0xFD4424CCU, 0x0000002EU}, /* RGIDW_MODID[295]:INTTP */ + [280] = {0xFD4424D0U, 0x0000000CU}, /* RGIDW_MODID[296]:IPMMURT000 */ + [281] = {0xFD4424D4U, 0x0000000CU}, /* RGIDW_MODID[297]:IPMMURT100 */ + [282] = {0xFD4424D8U, 0x0000002EU}, /* RGIDW_MODID[298]:KCRC4 */ + [283] = {0xFD4424DCU, 0x0000002EU}, /* RGIDW_MODID[299]:KCRC5 */ + [284] = {0xFD4424E0U, 0x0000002EU}, /* RGIDW_MODID[300]:KCRC6 */ + [285] = {0xFD4424E4U, 0x0000002EU}, /* RGIDW_MODID[301]:KCRC7 */ + [286] = {0xFD4424E8U, 0x0000003FU}, /* RGIDW_MODID[302]:MFI00 */ + [287] = {0xFD4424ECU, 0x0000002EU}, /* RGIDW_MODID[303]:MFI01 */ + [288] = {0xFD4424F0U, 0x0000002EU}, /* RGIDW_MODID[304]:MFI10 */ + [289] = {0xFD4424F4U, 0x0000002EU}, /* RGIDW_MODID[305]:MFI02 */ + [290] = {0xFD4424F8U, 0x0000002EU}, /* RGIDW_MODID[306]:MFI03 */ + [291] = {0xFD4424FCU, 0x0000002EU}, /* RGIDW_MODID[307]:MFI04 */ + [292] = {0xFD442500U, 0x00000000U}, /* RGIDW_MODID[308]:MFI05 */ + [293] = {0xFD442504U, 0x00000000U}, /* RGIDW_MODID[309]:MFI06 */ + [294] = {0xFD442508U, 0x00000000U}, /* RGIDW_MODID[310]:MFI07 */ + [295] = {0xFD44250CU, 0x00000000U}, /* RGIDW_MODID[311]:MFI08 */ + [296] = {0xFD442510U, 0x0000002EU}, /* RGIDW_MODID[312]:MFI09 */ + [297] = {0xFD442514U, 0x0000003FU}, /* RGIDW_MODID[313]:MFI15 */ + [298] = {0xFD442518U, 0x0000002AU}, /* RGIDW_MODID[314]:CKMCR52 */ + [299] = {0xFD44251CU, 0x0000003BU}, /* RGIDW_MODID[315]:RTDM0P */ + [300] = {0xFD442520U, 0x0000003BU}, /* RGIDW_MODID[316]:ECMRD */ + [301] = {0xFD442524U, 0x0000003BU}, /* RGIDW_MODID[317]:RTDM1P */ + [302] = {0xFD44252CU, 0x0000003BU}, /* RGIDW_MODID[318]:RTDM2P */ + [303] = {0xFD442530U, 0x0000003BU}, /* RGIDW_MODID[319]:SYSRAM10 */ + [304] = {0xFD442534U, 0x0000003BU}, /* RGIDW_MODID[320]:RTDM3P */ + [305] = {0xFD442538U, 0x00000003U}, /* RGIDW_MODID[321]:SYSRAM00 */ + [306] = {0xFD44253CU, 0x0000002EU}, /* RGIDW_MODID[322]:TSIPL0 */ + [307] = {0xFD442540U, 0x0000002EU}, /* RGIDW_MODID[323]:TSIPL1 */ + [308] = {0xFD442544U, 0x0000002EU}, /* RGIDW_MODID[324]:TSIPL2 */ + [309] = {0xFD442548U, 0x0000002EU}, /* RGIDW_MODID[325]:TSIPL3 */ + [310] = {0xFD44254CU, 0x0000002EU}, /* RGIDW_MODID[326]:TSIPL4 */ + [311] = {0xFD442550U, 0x0000002EU}, /* RGIDW_MODID[327]:TSIPL5 */ + [312] = {0xFD442554U, 0x0000002EU}, /* RGIDW_MODID[328]:TSIPL6 */ + [313] = {0xFD442558U, 0x0000002EU}, /* RGIDW_MODID[329]:TSIPL7 */ + [314] = {0xFD44255CU, 0x0000002EU}, /* RGIDW_MODID[330]:WCRC0 */ + [315] = {0xFD442560U, 0x0000002EU}, /* RGIDW_MODID[331]:WCRC1 */ + [316] = {0xFD442564U, 0x0000002EU}, /* RGIDW_MODID[332]:WCRC2 */ + [317] = {0xFD442568U, 0x0000002EU}, /* RGIDW_MODID[333]:WCRC3 */ + [318] = {0xFD442574U, 0x0000000CU}, /* RGIDW_MODID[334]:TSIP0 */ + [319] = {0xFD442578U, 0x0000000CU}, /* RGIDW_MODID[335]:TSIP1 */ + [320] = {0xFD44257CU, 0x0000000CU}, /* RGIDW_MODID[336]:TSIP2 */ + [321] = {0xFD442580U, 0x0000002EU}, /* RGIDW_MODID[337]:MFI11 */ + [322] = {0xFD442584U, 0x00000000U}, /* RGIDW_MODID[338]:MFI12 */ + [323] = {0xFD442588U, 0x00000000U}, /* RGIDW_MODID[339]:MFI13 */ + [324] = {0xFD44258CU, 0x00000000U}, /* RGIDW_MODID[340]:MFI14 */ + [325] = {0xFD442590U, 0x0000000CU}, /* RGIDW_MODID[341]:IPMMURT001 */ + [326] = {0xFD442594U, 0x0000000CU}, /* RGIDW_MODID[342]:IPMMURT010 */ + [327] = {0xFD442598U, 0x0000000CU}, /* RGIDW_MODID[343]:IPMMURT011 */ + [328] = {0xFD44259CU, 0x0000000CU}, /* RGIDW_MODID[344]:IPMMURT012 */ + [329] = {0xFD4425A0U, 0x0000000CU}, /* RGIDW_MODID[345]:IPMMURT013 */ + [330] = {0xFD4425A4U, 0x0000000CU}, /* RGIDW_MODID[346]:IPMMURT014 */ + [331] = {0xFD4425A8U, 0x0000000CU}, /* RGIDW_MODID[347]:IPMMURT015 */ + [332] = {0xFD4425ACU, 0x0000000CU}, /* RGIDW_MODID[348]:IPMMURT002 */ + [333] = {0xFD4425B0U, 0x0000000CU}, /* RGIDW_MODID[349]:IPMMURT003 */ + [334] = {0xFD4425B4U, 0x0000000CU}, /* RGIDW_MODID[350]:IPMMURT004 */ + [335] = {0xFD4425B8U, 0x0000000CU}, /* RGIDW_MODID[351]:IPMMURT005 */ + [336] = {0xFD4425BCU, 0x0000000CU}, /* RGIDW_MODID[352]:IPMMURT006 */ + [337] = {0xFD4425C0U, 0x0000000CU}, /* RGIDW_MODID[353]:IPMMURT007 */ + [338] = {0xFD4425C4U, 0x0000000CU}, /* RGIDW_MODID[354]:IPMMURT008 */ + [339] = {0xFD4425C8U, 0x0000000CU}, /* RGIDW_MODID[355]:IPMMURT009 */ + [340] = {0xFD4425CCU, 0x0000000CU}, /* RGIDW_MODID[356]:IPMMURT101 */ + [341] = {0xFD4425D0U, 0x0000000CU}, /* RGIDW_MODID[357]:IPMMURT110 */ + [342] = {0xFD4425D4U, 0x0000000CU}, /* RGIDW_MODID[358]:IPMMURT111 */ + [343] = {0xFD4425D8U, 0x0000000CU}, /* RGIDW_MODID[359]:IPMMURT112 */ + [344] = {0xFD4425DCU, 0x0000000CU}, /* RGIDW_MODID[360]:IPMMURT113 */ + [345] = {0xFD4425E0U, 0x0000000CU}, /* RGIDW_MODID[361]:IPMMURT114 */ + [346] = {0xFD4425E4U, 0x0000000CU}, /* RGIDW_MODID[362]:IPMMURT115 */ + [347] = {0xFD4425E8U, 0x0000000CU}, /* RGIDW_MODID[363]:IPMMURT102 */ + [348] = {0xFD4425ECU, 0x0000000CU}, /* RGIDW_MODID[364]:IPMMURT103 */ + [349] = {0xFD4425F0U, 0x0000000CU}, /* RGIDW_MODID[365]:IPMMURT104 */ + [350] = {0xFD4425F4U, 0x0000000CU}, /* RGIDW_MODID[366]:IPMMURT105 */ + [351] = {0xFD4425F8U, 0x0000000CU}, /* RGIDW_MODID[367]:IPMMURT106 */ + [352] = {0xFD4425FCU, 0x0000000CU}, /* RGIDW_MODID[368]:IPMMURT107 */ + [353] = {0xFD442600U, 0x0000003BU}, /* RGIDW_MODID[369]:RTDM000 */ + [354] = {0xFD442604U, 0x0000003BU}, /* RGIDW_MODID[370]:RTDM001 */ + [355] = {0xFD442608U, 0x0000003BU}, /* RGIDW_MODID[371]:RTDM010 */ + [356] = {0xFD44260CU, 0x0000003BU}, /* RGIDW_MODID[372]:RTDM011 */ + [357] = {0xFD442610U, 0x0000003BU}, /* RGIDW_MODID[373]:RTDM012 */ + [358] = {0xFD442614U, 0x0000003BU}, /* RGIDW_MODID[374]:RTDM013 */ + [359] = {0xFD442618U, 0x0000003BU}, /* RGIDW_MODID[375]:RTDM014 */ + [360] = {0xFD44261CU, 0x0000003BU}, /* RGIDW_MODID[376]:RTDM015 */ + [361] = {0xFD442620U, 0x0000003BU}, /* RGIDW_MODID[377]:RTDM002 */ + [362] = {0xFD442624U, 0x0000003BU}, /* RGIDW_MODID[378]:RTDM003 */ + [363] = {0xFD442628U, 0x0000003BU}, /* RGIDW_MODID[379]:RTDM004 */ + [364] = {0xFD44262CU, 0x0000003BU}, /* RGIDW_MODID[380]:RTDM005 */ + [365] = {0xFD442630U, 0x0000003BU}, /* RGIDW_MODID[381]:RTDM006 */ + [366] = {0xFD442634U, 0x0000003BU}, /* RGIDW_MODID[382]:RTDM007 */ + [367] = {0xFD442638U, 0x0000003BU}, /* RGIDW_MODID[383]:RTDM008 */ + [368] = {0xFD44263CU, 0x0000003BU}, /* RGIDW_MODID[384]:RTDM009 */ + [369] = {0xFD442640U, 0x0000003BU}, /* RGIDW_MODID[385]:RTDM100 */ + [370] = {0xFD442644U, 0x0000003BU}, /* RGIDW_MODID[386]:RTDM101 */ + [371] = {0xFD442648U, 0x0000003BU}, /* RGIDW_MODID[387]:RTDM110 */ + [372] = {0xFD44264CU, 0x0000003BU}, /* RGIDW_MODID[388]:RTDM111 */ + [373] = {0xFD442650U, 0x0000003BU}, /* RGIDW_MODID[389]:RTDM112 */ + [374] = {0xFD442654U, 0x0000003BU}, /* RGIDW_MODID[390]:RTDM113 */ + [375] = {0xFD442658U, 0x0000003BU}, /* RGIDW_MODID[391]:RTDM114 */ + [376] = {0xFD44265CU, 0x0000003BU}, /* RGIDW_MODID[392]:RTDM115 */ + [377] = {0xFD442660U, 0x0000003BU}, /* RGIDW_MODID[393]:RTDM102 */ + [378] = {0xFD442664U, 0x0000003BU}, /* RGIDW_MODID[394]:RTDM103 */ + [379] = {0xFD442668U, 0x0000003BU}, /* RGIDW_MODID[395]:RTDM104 */ + [380] = {0xFD44266CU, 0x0000003BU}, /* RGIDW_MODID[396]:RTDM105 */ + [381] = {0xFD442670U, 0x0000003BU}, /* RGIDW_MODID[397]:RTDM106 */ + [382] = {0xFD442674U, 0x0000003BU}, /* RGIDW_MODID[398]:RTDM107 */ + [383] = {0xFD442678U, 0x0000003BU}, /* RGIDW_MODID[399]:RTDM108 */ + [384] = {0xFD44267CU, 0x0000003BU}, /* RGIDW_MODID[400]:RTDM109 */ + [385] = {0xFD442680U, 0x0000003BU}, /* RGIDW_MODID[401]:RTDM200 */ + [386] = {0xFD442684U, 0x0000003BU}, /* RGIDW_MODID[402]:RTDM201 */ + [387] = {0xFD442688U, 0x0000003BU}, /* RGIDW_MODID[403]:RTDM210 */ + [388] = {0xFD44268CU, 0x0000003BU}, /* RGIDW_MODID[404]:RTDM211 */ + [389] = {0xFD442690U, 0x0000003BU}, /* RGIDW_MODID[405]:RTDM212 */ + [390] = {0xFD442694U, 0x0000003BU}, /* RGIDW_MODID[406]:RTDM213 */ + [391] = {0xFD442698U, 0x0000003BU}, /* RGIDW_MODID[407]:RTDM214 */ + [392] = {0xFD44269CU, 0x0000003BU}, /* RGIDW_MODID[408]:RTDM215 */ + [393] = {0xFD4426A0U, 0x0000003BU}, /* RGIDW_MODID[409]:RTDM202 */ + [394] = {0xFD4426A4U, 0x0000003BU}, /* RGIDW_MODID[410]:RTDM203 */ + [395] = {0xFD4426A8U, 0x0000003BU}, /* RGIDW_MODID[411]:RTDM204 */ + [396] = {0xFD4426ACU, 0x0000003BU}, /* RGIDW_MODID[412]:RTDM205 */ + [397] = {0xFD4426B0U, 0x0000003BU}, /* RGIDW_MODID[413]:RTDM206 */ + [398] = {0xFD4426B4U, 0x0000003BU}, /* RGIDW_MODID[414]:RTDM207 */ + [399] = {0xFD4426B8U, 0x0000003BU}, /* RGIDW_MODID[415]:RTDM208 */ + [400] = {0xFD4426BCU, 0x0000003BU}, /* RGIDW_MODID[416]:RTDM209 */ + [401] = {0xFD4426C0U, 0x0000003BU}, /* RGIDW_MODID[417]:RTDM300 */ + [402] = {0xFD4426C4U, 0x0000003BU}, /* RGIDW_MODID[418]:RTDM301 */ + [403] = {0xFD4426C8U, 0x0000003BU}, /* RGIDW_MODID[419]:RTDM310 */ + [404] = {0xFD4426CCU, 0x0000003BU}, /* RGIDW_MODID[420]:RTDM311 */ + [405] = {0xFD4426D0U, 0x0000003BU}, /* RGIDW_MODID[421]:RTDM312 */ + [406] = {0xFD4426D4U, 0x0000003BU}, /* RGIDW_MODID[422]:RTDM313 */ + [407] = {0xFD4426D8U, 0x0000003BU}, /* RGIDW_MODID[423]:RTDM314 */ + [408] = {0xFD4426DCU, 0x0000003BU}, /* RGIDW_MODID[424]:RTDM315 */ + [409] = {0xFD4426E0U, 0x0000003BU}, /* RGIDW_MODID[425]:RTDM302 */ + [410] = {0xFD4426E4U, 0x0000003BU}, /* RGIDW_MODID[426]:RTDM303 */ + [411] = {0xFD4426E8U, 0x0000003BU}, /* RGIDW_MODID[427]:RTDM304 */ + [412] = {0xFD4426ECU, 0x0000003BU}, /* RGIDW_MODID[428]:RTDM305 */ + [413] = {0xFD4426F0U, 0x0000003BU}, /* RGIDW_MODID[429]:RTDM306 */ + [414] = {0xFD4426F4U, 0x0000003BU}, /* RGIDW_MODID[430]:RTDM307 */ + [415] = {0xFD4426F8U, 0x0000003BU}, /* RGIDW_MODID[431]:RTDM308 */ + [416] = {0xFD4426FCU, 0x0000003BU}, /* RGIDW_MODID[432]:RTDM309 */ + [417] = {0xFD442700U, 0x0000000CU}, /* RGIDW_MODID[433]:IPMMURT108 */ + [418] = {0xFD442704U, 0x0000000CU}, /* RGIDW_MODID[434]:IPMMURT109 */ + [419] = {0xFD442708U, 0x00000011U}, /* RGIDW_MODID[435]:SYSRAM01 */ + [420] = {0xFD44270CU, 0x0000003BU}, /* RGIDW_MODID[436]:SYSRAM02 */ + [421] = {0xFD442710U, 0x00000011U}, /* RGIDW_MODID[437]:SYSRAM03 */ + [422] = {0xFD442714U, 0x00000011U}, /* RGIDW_MODID[438]:SYSRAM04 */ + [423] = {0xFD442718U, 0x00000011U}, /* RGIDW_MODID[439]:SYSRAM05 */ + [424] = {0xFD44271CU, 0x00000011U}, /* RGIDW_MODID[440]:SYSRAM06 */ + [425] = {0xFD442720U, 0x00000000U}, /* RGIDW_MODID[441]:SYSRAM07 */ + [426] = {0xFD442724U, 0x0000003BU}, /* RGIDW_MODID[442]:SYSRAM11 */ + [427] = {0xFD442728U, 0x0000002AU}, /* RGIDW_MODID[443]:SYSRAM12 */ + [428] = {0xFD44272CU, 0x0000003BU}, /* RGIDW_MODID[444]:SYSRAM13 */ + [429] = {0xFD442730U, 0x0000003BU}, /* RGIDW_MODID[445]:SYSRAM14 */ + [430] = {0xFD442734U, 0x0000003BU}, /* RGIDW_MODID[446]:SYSRAM15 */ + [431] = {0xFD442738U, 0x0000003BU}, /* RGIDW_MODID[447]:SYSRAM16 */ + [432] = {0xFD44273CU, 0x00000000U}, /* RGIDW_MODID[448]:SYSRAM17 */ + [433] = {0xFD442760U, 0x00000022U}, /* RGIDW_MODID[449]:BKBUF */ + [434] = {0xFD44276CU, 0x0000003FU}, /* RGIDW_MODID[450]:MCU */ + [435] = {0xFF862400U, 0x00000022U}, /* RGIDW_MODID[451]:ARSC0 */ + /* After setting */ /* RGIDW_MODID[452]:ARSC1 */ + /* After setting */ /* RGIDW_MODID[453]:ARSC2 */ + [436] = {0xFF86240CU, 0x00000011U}, /* RGIDW_MODID[454]:ARSC3 */ + [437] = {0xFF862410U, 0x00000022U}, /* RGIDW_MODID[455]:ARSC4 */ + [438] = {0xFF862414U, 0x00000011U}, /* RGIDW_MODID[456]:ARSC5 */ + [439] = {0xFF862418U, 0x00000022U}, /* RGIDW_MODID[457]:ARSC6 */ + [440] = {0xFF86241CU, 0x00000022U}, /* RGIDW_MODID[458]:ARSC7 */ + [441] = {0xFF862420U, 0x00000000U}, /* RGIDW_MODID[459]:ARSC8 */ + [442] = {0xFF862424U, 0x00000022U}, /* RGIDW_MODID[460]:ARSTM0 */ + /* After setting */ /* RGIDW_MODID[461]:ARSTM1 */ + [443] = {0xFF862430U, 0x0000002EU}, /* RGIDW_MODID[462]:AXIFBABUSTOP0 */ + [444] = {0xFF862434U, 0x0000002EU}, /* RGIDW_MODID[463]:AXIFBABUSTOP1 */ + /* After setting */ /* RGIDW_MODID[464]:ARSTM2 */ + [445] = {0xFF86243CU, 0x00000011U}, /* RGIDW_MODID[465]:ARSTM3 */ + [446] = {0xFF862440U, 0x00000022U}, /* RGIDW_MODID[466]:ARSTM4 */ + [447] = {0xFF862444U, 0x00000011U}, /* RGIDW_MODID[467]:ARSTM5 */ + [448] = {0xFF862448U, 0x00000022U}, /* RGIDW_MODID[468]:ARSTM6 */ + [449] = {0xFF86244CU, 0x00000022U}, /* RGIDW_MODID[469]:ARSTM7 */ + [450] = {0xFF862450U, 0x00000000U}, /* RGIDW_MODID[470]:ARSTM8 */ + [451] = {0xFF862454U, 0x0000003BU}, /* RGIDW_MODID[471]:ECMTOP */ + [452] = {0xFF862458U, 0x0000002EU}, /* RGIDW_MODID[472]:FBA */ + [453] = {0xFF86245CU, 0x0000002EU}, /* RGIDW_MODID[473]:FBC */ + [454] = {0xFF862460U, 0x0000000CU}, /* RGIDW_MODID[474]:AXICCI00 */ + [455] = {0xFF862464U, 0x0000000CU}, /* RGIDW_MODID[475]:AXICCI01 */ + [456] = {0xFF862468U, 0x0000000CU}, /* RGIDW_MODID[476]:AXICCI10 */ + [457] = {0xFF86246CU, 0x0000000CU}, /* RGIDW_MODID[477]:AXICCI11 */ + [458] = {0xFF862470U, 0x0000000CU}, /* RGIDW_MODID[478]:AXICCI12 */ + [459] = {0xFF862474U, 0x0000000CU}, /* RGIDW_MODID[479]:AXICCI13 */ + [460] = {0xFF862478U, 0x0000000CU}, /* RGIDW_MODID[480]:AXICCI14 */ + [461] = {0xFF86247CU, 0x0000000CU}, /* RGIDW_MODID[481]:AXICCI15 */ + [462] = {0xFF862480U, 0x0000000CU}, /* RGIDW_MODID[482]:AXICCI2 */ + [463] = {0xFF862484U, 0x0000000CU}, /* RGIDW_MODID[483]:AXICCI3 */ + [464] = {0xFF862488U, 0x0000000CU}, /* RGIDW_MODID[484]:AXICCI4 */ + [465] = {0xFF86248CU, 0x0000000CU}, /* RGIDW_MODID[485]:AXICCI5 */ + [466] = {0xFF862490U, 0x0000000CU}, /* RGIDW_MODID[486]:AXICCI6 */ + [467] = {0xFF862494U, 0x0000000CU}, /* RGIDW_MODID[487]:AXICCI7 */ + [468] = {0xFF862498U, 0x0000000CU}, /* RGIDW_MODID[488]:AXICCI8 */ + [469] = {0xFF86249CU, 0x0000003BU}, /* RGIDW_MODID[489]:AXICCI9 */ + [470] = {0xFF8624A0U, 0x0000003FU}, /* RGIDW_MODID[490]:ECMSTM */ + [471] = {0xFCB82414U, 0x0000002EU}, /* RGIDW_MODID[491]:DMAI2C0 */ + [472] = {0xFCB82418U, 0x0000002EU}, /* RGIDW_MODID[492]:DMAI2C1 */ + [473] = {0xFCB8241CU, 0x0000002EU}, /* RGIDW_MODID[493]:DMAI2C2 */ + [474] = {0xFCB82420U, 0x0000002EU}, /* RGIDW_MODID[494]:DMAI2C3 */ + [475] = {0xFCB82424U, 0x0000002EU}, /* RGIDW_MODID[495]:DMAI2C4 */ + [476] = {0xFCB82428U, 0x0000002EU}, /* RGIDW_MODID[496]:DMAI2C5 */ + [477] = {0xFDDC2400U, 0x00000000U}, /* RGIDW_MODID[497]:ARMM */ + /* After setting */ /* RGIDW_MODID[498]:AXIARNMM */ + [478] = {0xFDDC2408U, 0x00000022U}, /* RGIDW_MODID[499]:ARSM0 */ + /* After setting */ /* RGIDW_MODID[500]:ARSM1 */ + /* After setting */ /* RGIDW_MODID[501]:ARSM2 */ + [479] = {0xFDDC2414U, 0x0000003FU}, /* RGIDW_MODID[502]:AXIQOS0 */ + [480] = {0xFDDC2418U, 0x0000003FU}, /* RGIDW_MODID[503]:AXIQOS1 */ + [481] = {0xFDDC241CU, 0x0000003FU}, /* RGIDW_MODID[504]:AXIQOS2 */ + [482] = {0xFDDC2420U, 0x0000003FU}, /* RGIDW_MODID[505]:AXIQOS3 */ + [483] = {0xFDDC2424U, 0x0000003FU}, /* RGIDW_MODID[506]:AXIQOS4 */ + [484] = {0xFDDC2430U, 0x0000003FU}, /* RGIDW_MODID[507]:AXIQOS5 */ + [485] = {0xFDDC2434U, 0x00000011U}, /* RGIDW_MODID[508]:ARSM3 */ + [486] = {0xFDDC2438U, 0x00000022U}, /* RGIDW_MODID[509]:ARSM4 */ + [487] = {0xFDDC243CU, 0x00000011U}, /* RGIDW_MODID[510]:ARSM5 */ + [488] = {0xFDDC2440U, 0x00000022U}, /* RGIDW_MODID[511]:ARSM6 */ + [489] = {0xFDDC2444U, 0x00000022U}, /* RGIDW_MODID[512]:ARSM7 */ + [490] = {0xFDDC2448U, 0x00000000U}, /* RGIDW_MODID[513]:ARSM8 */ + [491] = {0xFDDC244CU, 0x0000003FU}, /* RGIDW_MODID[514]:AXMM0 */ + [492] = {0xFDDC2450U, 0x0000003FU}, /* RGIDW_MODID[515]:AXMM1 */ + [493] = {0xFDDC2454U, 0x00000000U}, /* RGIDW_MODID[516]:AXMMPMON */ + [494] = {0xFDDC2458U, 0x0000002AU}, /* RGIDW_MODID[517]:CKMMM */ + [495] = {0xFDDC245CU, 0x0000003BU}, /* RGIDW_MODID[518]:ECMMM */ + [496] = {0xFDDC2468U, 0x0000002EU}, /* RGIDW_MODID[519]:FBAMM */ + [497] = {0xFDDC246CU, 0x0000000CU}, /* RGIDW_MODID[520]:IPMMUMM00 */ + [498] = {0xFDDC2470U, 0x0000003FU}, /* RGIDW_MODID[521]:DBS00 */ + [499] = {0xFDDC2474U, 0x0000002AU}, /* RGIDW_MODID[522]:DBS01 */ + [500] = {0xFDDC2480U, 0x0000003FU}, /* RGIDW_MODID[523]:AXCIDBS */ + [501] = {0xFDDC249CU, 0x0000000CU}, /* RGIDW_MODID[524]:IPMMUMM01 */ + [502] = {0xFDDC24A0U, 0x0000000CU}, /* RGIDW_MODID[525]:IPMMUMM10 */ + [503] = {0xFDDC24A4U, 0x0000000CU}, /* RGIDW_MODID[526]:IPMMUMM11 */ + [504] = {0xFDDC24A8U, 0x0000000CU}, /* RGIDW_MODID[527]:IPMMUMM12 */ + [505] = {0xFDDC24ACU, 0x0000000CU}, /* RGIDW_MODID[528]:IPMMUMM13 */ + [506] = {0xFDDC24B0U, 0x0000000CU}, /* RGIDW_MODID[529]:IPMMUMM14 */ + [507] = {0xFDDC24B4U, 0x0000000CU}, /* RGIDW_MODID[530]:IPMMUMM15 */ + [508] = {0xFDDC24B8U, 0x0000000CU}, /* RGIDW_MODID[531]:IPMMUMM02 */ + [509] = {0xFDDC24BCU, 0x0000000CU}, /* RGIDW_MODID[532]:IPMMUMM03 */ + [510] = {0xFDDC24C0U, 0x0000000CU}, /* RGIDW_MODID[533]:IPMMUMM04 */ + [511] = {0xFDDC24C4U, 0x0000000CU}, /* RGIDW_MODID[534]:IPMMUMM05 */ + [512] = {0xFDDC24C8U, 0x0000000CU}, /* RGIDW_MODID[535]:IPMMUMM06 */ + [513] = {0xFDDC24CCU, 0x0000000CU}, /* RGIDW_MODID[536]:IPMMUMM07 */ + [514] = {0xFDDC24D0U, 0x0000000CU}, /* RGIDW_MODID[537]:IPMMUMM08 */ + [515] = {0xFDDC24D4U, 0x0000000CU}, /* RGIDW_MODID[538]:IPMMUMM09 */ + [516] = {0xFCB52400U, 0x00000022U}, /* RGIDW_MODID[539]:ARSD00 */ + /* After setting */ /* RGIDW_MODID[540]:ARSD01 */ + /* After setting */ /* RGIDW_MODID[541]:ARSD02 */ + [517] = {0xFCB5240CU, 0x00000011U}, /* RGIDW_MODID[542]:ARSD03 */ + [518] = {0xFCB52410U, 0x00000022U}, /* RGIDW_MODID[543]:ARSD04 */ + [519] = {0xFCB52414U, 0x00000011U}, /* RGIDW_MODID[544]:ARSD05 */ + [520] = {0xFCB52418U, 0x00000022U}, /* RGIDW_MODID[545]:ARSD06 */ + [521] = {0xFCB52428U, 0x0000003FU}, /* RGIDW_MODID[546]:AXIRPC */ + [522] = {0xFCB5242CU, 0x0000003FU}, /* RGIDW_MODID[547]:AXISDHI0 */ + [523] = {0xFCB52430U, 0x00000022U}, /* RGIDW_MODID[548]:ARSD07 */ + [524] = {0xFCB52434U, 0x00000000U}, /* RGIDW_MODID[549]:ARSD07 */ + [525] = {0xFCB52438U, 0x00000022U}, /* RGIDW_MODID[550]:ARSP00 */ + /* After setting */ /* RGIDW_MODID[551]:ARSP01 */ + /* After setting */ /* RGIDW_MODID[552]:ARSP02 */ + [526] = {0xFCB52444U, 0x00000011U}, /* RGIDW_MODID[553]:ARSP03 */ + [527] = {0xFCB52448U, 0x00000022U}, /* RGIDW_MODID[554]:ARSP04 */ + [528] = {0xFCB5244CU, 0x00000011U}, /* RGIDW_MODID[555]:ARSP05 */ + [529] = {0xFCB52450U, 0x00000022U}, /* RGIDW_MODID[556]:ARSP06 */ + [530] = {0xFCB52454U, 0x00000022U}, /* RGIDW_MODID[557]:ARSP07 */ + [531] = {0xFCB52458U, 0x00000000U}, /* RGIDW_MODID[558]:ARSP08 */ + [532] = {0xFCB5245CU, 0x0000000CU}, /* RGIDW_MODID[559]:IPMMUDS001 */ + [533] = {0xFCB52460U, 0x0000002AU}, /* RGIDW_MODID[560]:CKMPER0 */ + [534] = {0xFCB52464U, 0x0000003BU}, /* RGIDW_MODID[561]:ECMPER0 */ + [535] = {0xFCB52468U, 0x0000002EU}, /* RGIDW_MODID[562]:FBAPER0 */ + [536] = {0xFCB5246CU, 0x0000002EU}, /* RGIDW_MODID[563]:FSO0 */ + [537] = {0xFCB52470U, 0x0000002EU}, /* RGIDW_MODID[564]:FSO1 */ + [538] = {0xFCB52474U, 0x0000002EU}, /* RGIDW_MODID[565]:FSO10 */ + [539] = {0xFCB52478U, 0x0000002EU}, /* RGIDW_MODID[566]:FSO2 */ + [540] = {0xFCB5247CU, 0x0000002EU}, /* RGIDW_MODID[567]:FSO3 */ + [541] = {0xFCB52480U, 0x0000002EU}, /* RGIDW_MODID[568]:FSO4 */ + [542] = {0xFCB52484U, 0x0000002EU}, /* RGIDW_MODID[569]:FSO5 */ + [543] = {0xFCB52488U, 0x0000002EU}, /* RGIDW_MODID[570]:FSO6 */ + [544] = {0xFCB5248CU, 0x0000002EU}, /* RGIDW_MODID[571]:FSO7 */ + [545] = {0xFCB52490U, 0x0000002EU}, /* RGIDW_MODID[572]:FSO8 */ + [546] = {0xFCB52494U, 0x0000002EU}, /* RGIDW_MODID[573]:FSO9 */ + [547] = {0xFCB5249CU, 0x0000003BU}, /* RGIDW_MODID[574]:ECMSD0 */ + [548] = {0xFCB524A0U, 0x0000000CU}, /* RGIDW_MODID[575]:IPMMUDS010 */ + [549] = {0xFCB524A4U, 0x0000000CU}, /* RGIDW_MODID[576]:IPMMUDS011 */ + [550] = {0xFCB524A8U, 0x0000002EU}, /* RGIDW_MODID[577]:I2C0 */ + [551] = {0xFCB524ACU, 0x0000002EU}, /* RGIDW_MODID[578]:I2C1 */ + [552] = {0xFCB524B0U, 0x0000002EU}, /* RGIDW_MODID[579]:I2C2 */ + [553] = {0xFCB524B4U, 0x0000002EU}, /* RGIDW_MODID[580]:I2C3 */ + [554] = {0xFCB524B8U, 0x0000002EU}, /* RGIDW_MODID[581]:I2C4 */ + [555] = {0xFCB524BCU, 0x0000002EU}, /* RGIDW_MODID[582]:I2C5 */ + [556] = {0xFCB524C0U, 0x0000000CU}, /* RGIDW_MODID[583]:IPMMUDS012 */ + [557] = {0xFCB524C8U, 0x0000000CU}, /* RGIDW_MODID[584]:IPMMUDS000 */ + [558] = {0xFCB524CCU, 0x0000000CU}, /* RGIDW_MODID[585]:IPMMUDS013 */ + [559] = {0xFCB524D0U, 0x0000000CU}, /* RGIDW_MODID[586]:IPMMUDS014 */ + [560] = {0xFCB524D4U, 0x0000000CU}, /* RGIDW_MODID[587]:IPMMUDS015 */ + [561] = {0xFCB524D8U, 0x0000000CU}, /* RGIDW_MODID[588]:IPMMUDS002 */ + [562] = {0xFCB524DCU, 0x0000000CU}, /* RGIDW_MODID[589]:IPMMUDS003 */ + [563] = {0xFCB524E0U, 0x0000000CU}, /* RGIDW_MODID[590]:IPMMUDS004 */ + [564] = {0xFCB524E4U, 0x0000000CU}, /* RGIDW_MODID[591]:IPMMUDS005 */ + [565] = {0xFCB524ECU, 0x0000000CU}, /* RGIDW_MODID[592]:IPMMUDS006 */ + [566] = {0xFCB524F0U, 0x0000000CU}, /* RGIDW_MODID[593]:IPMMUDS007 */ + [567] = {0xFCB524F4U, 0x0000000CU}, /* RGIDW_MODID[594]:SYDM1P */ + [568] = {0xFCB524F8U, 0x0000000CU}, /* RGIDW_MODID[595]:IPMMUDS008 */ + [569] = {0xFCB524FCU, 0x0000000CU}, /* RGIDW_MODID[596]:SYDM2P */ + [570] = {0xFCB52500U, 0x0000000CU}, /* RGIDW_MODID[597]:IPMMUDS009 */ + [571] = {0xFCB52640U, 0x0000000CU}, /* RGIDW_MODID[598]:SYDM100 */ + [572] = {0xFCB52644U, 0x0000000CU}, /* RGIDW_MODID[599]:SYDM101 */ + [573] = {0xFCB52648U, 0x0000000CU}, /* RGIDW_MODID[600]:SYDM110 */ + [574] = {0xFCB5264CU, 0x0000000CU}, /* RGIDW_MODID[601]:SYDM111 */ + [575] = {0xFCB52650U, 0x0000000CU}, /* RGIDW_MODID[602]:SYDM112 */ + [576] = {0xFCB52654U, 0x0000000CU}, /* RGIDW_MODID[603]:SYDM113 */ + [577] = {0xFCB52658U, 0x0000000CU}, /* RGIDW_MODID[604]:SYDM114 */ + [578] = {0xFCB5265CU, 0x0000000CU}, /* RGIDW_MODID[605]:SYDM115 */ + [579] = {0xFCB52660U, 0x0000000CU}, /* RGIDW_MODID[606]:SYDM102 */ + [580] = {0xFCB52664U, 0x0000000CU}, /* RGIDW_MODID[607]:SYDM103 */ + [581] = {0xFCB52668U, 0x0000000CU}, /* RGIDW_MODID[608]:SYDM104 */ + [582] = {0xFCB5266CU, 0x0000000CU}, /* RGIDW_MODID[609]:SYDM105 */ + [583] = {0xFCB52670U, 0x0000000CU}, /* RGIDW_MODID[610]:SYDM106 */ + [584] = {0xFCB52674U, 0x0000000CU}, /* RGIDW_MODID[611]:SYDM107 */ + [585] = {0xFCB52678U, 0x0000000CU}, /* RGIDW_MODID[612]:SYDM108 */ + [586] = {0xFCB5267CU, 0x0000000CU}, /* RGIDW_MODID[613]:SYDM109 */ + [587] = {0xFCB52680U, 0x0000000CU}, /* RGIDW_MODID[614]:SYDM200 */ + [588] = {0xFCB52684U, 0x0000000CU}, /* RGIDW_MODID[615]:SYDM201 */ + [589] = {0xFCB52688U, 0x0000000CU}, /* RGIDW_MODID[616]:SYDM210 */ + [590] = {0xFCB5268CU, 0x0000000CU}, /* RGIDW_MODID[617]:SYDM211 */ + [591] = {0xFCB52690U, 0x0000000CU}, /* RGIDW_MODID[618]:SYDM212 */ + [592] = {0xFCB52694U, 0x0000000CU}, /* RGIDW_MODID[619]:SYDM213 */ + [593] = {0xFCB52698U, 0x0000000CU}, /* RGIDW_MODID[620]:SYDM214 */ + [594] = {0xFCB5269CU, 0x0000000CU}, /* RGIDW_MODID[621]:SYDM215 */ + [595] = {0xFCB526A0U, 0x0000000CU}, /* RGIDW_MODID[622]:SYDM202 */ + [596] = {0xFCB526A4U, 0x0000000CU}, /* RGIDW_MODID[623]:SYDM203 */ + [597] = {0xFCB526A8U, 0x0000000CU}, /* RGIDW_MODID[624]:SYDM204 */ + [598] = {0xFCB526ACU, 0x0000000CU}, /* RGIDW_MODID[625]:SYDM205 */ + [599] = {0xFCB526B0U, 0x0000000CU}, /* RGIDW_MODID[626]:SYDM206 */ + [600] = {0xFCB526B4U, 0x0000000CU}, /* RGIDW_MODID[627]:SYDM207 */ + [601] = {0xFCB526B8U, 0x0000000CU}, /* RGIDW_MODID[628]:SYDM208 */ + [602] = {0xFCB526BCU, 0x0000000CU}, /* RGIDW_MODID[629]:SYDM209 */ + [604] = {0xFDDB969CU, 0x00000000U}, /* RGIDW_MODID[630]:ARCC */ + [603] = {0xFDDB96B0U, 0x00000000U}, /* RGIDW_MODID[631]:ARRTRAM */ + [605] = {0xFCB52424U, 0x00000000U}, /* RGIDW_MODID[632]:RSV0 */ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +#pragma ghs section rodata=".rgid_sec_tbl" +const REGION_ID_SETTING_TABLE g_rgid_sec_tbl[] = { + [0] = {0xFD483400U, 0x00000000U}, /* RGIDSEC_MODID[0]:ARMGC0 */ + [1] = {0xFD483404U, 0x00000002U}, /* RGIDSEC_MODID[1]:ARMGC1 */ + [2] = {0xFD483408U, 0x00000002U}, /* RGIDSEC_MODID[2]:ARMGC2 */ + [3] = {0xFD48340CU, 0x00000002U}, /* RGIDSEC_MODID[3]:ARRT00 */ + [4] = {0xFD483410U, 0x00000002U}, /* RGIDSEC_MODID[4]:ARRT01 */ + [5] = {0xFD483414U, 0x00000002U}, /* RGIDSEC_MODID[5]:ARRT02 */ + [6] = {0xFD483418U, 0x00000002U}, /* RGIDSEC_MODID[6]:ARRT03 */ + [7] = {0xFD48341CU, 0x00000002U}, /* RGIDSEC_MODID[7]:ARRT04 */ + [8] = {0xFD483420U, 0x00000002U}, /* RGIDSEC_MODID[8]:ARRT05 */ + [9] = {0xFD483424U, 0x00000002U}, /* RGIDSEC_MODID[9]:ARRT06 */ + [10] = {0xFD483428U, 0x00000002U}, /* RGIDSEC_MODID[10]:ARRT07 */ + [11] = {0xFD48342CU, 0x00000002U}, /* RGIDSEC_MODID[11]:ARRT08 */ + [12] = {0xFD483430U, 0x00000000U}, /* RGIDSEC_MODID[12]:LIFEC0 */ + [13] = {0xFD483434U, 0x00000002U}, /* RGIDSEC_MODID[13]:SWDT */ + [14] = {0xFD483438U, 0x00000002U}, /* RGIDSEC_MODID[14]:TMU0 */ + [15] = {0xFD48343CU, 0x00000002U}, /* RGIDSEC_MODID[15]:WDT */ + [16] = {0xFD483440U, 0x00000002U}, /* RGIDSEC_MODID[16]:WWDT0 */ + [17] = {0xFD483444U, 0x00000002U}, /* RGIDSEC_MODID[17]:WWDT1 */ + [18] = {0xFD483448U, 0x00000002U}, /* RGIDSEC_MODID[18]:WWDT2 */ + [19] = {0xFD48344CU, 0x00000002U}, /* RGIDSEC_MODID[19]:WWDT3 */ + [20] = {0xFD483450U, 0x00000002U}, /* RGIDSEC_MODID[20]:WWDT4 */ + [21] = {0xFD483454U, 0x00000002U}, /* RGIDSEC_MODID[21]:WWDT5 */ + [22] = {0xFD483458U, 0x00000002U}, /* RGIDSEC_MODID[22]:WWDT6 */ + [23] = {0xFD48345CU, 0x00000002U}, /* RGIDSEC_MODID[23]:WWDT7 */ + [24] = {0xFD483460U, 0x00000002U}, /* RGIDSEC_MODID[24]:WWDT8 */ + [25] = {0xFD483464U, 0x00000002U}, /* RGIDSEC_MODID[25]:WWDT9 */ + [26] = {0xFD483468U, 0x00000002U}, /* RGIDSEC_MODID[26]:ECMRT3 */ + [27] = {0xFDA03400U, 0x00000002U}, /* RGIDSEC_MODID[27]:ADVFSC */ + [28] = {0xFDA03404U, 0x00000002U}, /* RGIDSEC_MODID[28]:APMU0 */ + [29] = {0xFDA03408U, 0x00000002U}, /* RGIDSEC_MODID[29]:APMU1 */ + [30] = {0xFDA0340CU, 0x00000002U}, /* RGIDSEC_MODID[30]:APMU10 */ + [31] = {0xFDA03410U, 0x00000002U}, /* RGIDSEC_MODID[31]:APMU11 */ + [32] = {0xFDA03414U, 0x00000002U}, /* RGIDSEC_MODID[32]:APMU12 */ + [33] = {0xFDA03418U, 0x00000002U}, /* RGIDSEC_MODID[33]:APMU13 */ + [34] = {0xFDA0341CU, 0x00000002U}, /* RGIDSEC_MODID[34]:APMU14 */ + [35] = {0xFDA03420U, 0x00000002U}, /* RGIDSEC_MODID[35]:APMU15 */ + [36] = {0xFDA03424U, 0x00000002U}, /* RGIDSEC_MODID[36]:APMU2 */ + [37] = {0xFDA03428U, 0x00000002U}, /* RGIDSEC_MODID[37]:APMU3 */ + [38] = {0xFDA0342CU, 0x00000002U}, /* RGIDSEC_MODID[38]:APMU4 */ + [39] = {0xFDA03430U, 0x00000002U}, /* RGIDSEC_MODID[39]:APMU5 */ + [40] = {0xFDA03434U, 0x00000002U}, /* RGIDSEC_MODID[40]:APMU6 */ + [41] = {0xFDA03438U, 0x00000002U}, /* RGIDSEC_MODID[41]:APMU7 */ + [42] = {0xFDA0343CU, 0x00000002U}, /* RGIDSEC_MODID[42]:APMU8 */ + [43] = {0xFDA03440U, 0x00000002U}, /* RGIDSEC_MODID[43]:APMU9 */ + [44] = {0xFDA03444U, 0x00000002U}, /* RGIDSEC_MODID[44]:ARS00 */ + [45] = {0xFDA03448U, 0x00000002U}, /* RGIDSEC_MODID[45]:ARS01 */ + [46] = {0xFDA0344CU, 0x00000002U}, /* RGIDSEC_MODID[46]:ARS02 */ + [47] = {0xFDA03450U, 0x00000002U}, /* RGIDSEC_MODID[47]:ARS03 */ + [48] = {0xFDA03454U, 0x00000002U}, /* RGIDSEC_MODID[48]:ARS04 */ + [49] = {0xFDA03458U, 0x00000002U}, /* RGIDSEC_MODID[49]:ARS05 */ + [50] = {0xFDA0345CU, 0x00000002U}, /* RGIDSEC_MODID[50]:ARS06 */ + [51] = {0xFDA03460U, 0x00000002U}, /* RGIDSEC_MODID[51]:ARS07 */ + [52] = {0xFDA03464U, 0x00000002U}, /* RGIDSEC_MODID[52]:ARS08 */ + [53] = {0xFDA03468U, 0x00000002U}, /* RGIDSEC_MODID[53]:CMT0 */ + [54] = {0xFDA0346CU, 0x00000002U}, /* RGIDSEC_MODID[54]:CMT1 */ + [55] = {0xFDA03470U, 0x00000002U}, /* RGIDSEC_MODID[55]:CMT2 */ + [56] = {0xFDA03474U, 0x00000002U}, /* RGIDSEC_MODID[56]:CMT3 */ + [57] = {0xFDA03478U, 0x00000002U}, /* RGIDSEC_MODID[57]:CKM */ + [58] = {0xFDA0347CU, 0x00000002U}, /* RGIDSEC_MODID[58]:DBE */ + [59] = {0xFDA03480U, 0x00000002U}, /* RGIDSEC_MODID[59]:IRQC */ + [60] = {0xFDA03484U, 0x00000002U}, /* RGIDSEC_MODID[60]:ECMPS0 */ + [61] = {0xFDA0349CU, 0x00000002U}, /* RGIDSEC_MODID[61]:SCMT */ + [62] = {0xFDA034A8U, 0x00000002U}, /* RGIDSEC_MODID[62]:TSC1 */ + [63] = {0xFDA034ACU, 0x00000002U}, /* RGIDSEC_MODID[63]:TSC2 */ + [64] = {0xFDA034B0U, 0x00000002U}, /* RGIDSEC_MODID[64]:TSC3 */ + [65] = {0xFDA034B4U, 0x00000002U}, /* RGIDSEC_MODID[65]:TSC4 */ + [66] = {0xFDA034B8U, 0x00000002U}, /* RGIDSEC_MODID[66]:UCMT */ + [67] = {0xFDA03500U, 0x00000002U}, /* RGIDSEC_MODID[67]:CPG0 */ + [68] = {0xFDA03504U, 0x00000002U}, /* RGIDSEC_MODID[68]:CPG1 */ + [69] = {0xFDA03508U, 0x00000002U}, /* RGIDSEC_MODID[69]:CPG2 */ + [70] = {0xFDA0350CU, 0x00000002U}, /* RGIDSEC_MODID[70]:CPG3 */ + [71] = {0xFDA03510U, 0x00000002U}, /* RGIDSEC_MODID[71]:PFC00 */ + [72] = {0xFDA03514U, 0x00000002U}, /* RGIDSEC_MODID[72]:PFC01 */ + [73] = {0xFDA03518U, 0x00000002U}, /* RGIDSEC_MODID[73]:PFC02 */ + [74] = {0xFDA0351CU, 0x00000002U}, /* RGIDSEC_MODID[74]:PFC03 */ + [75] = {0xFDA03550U, 0x00000002U}, /* RGIDSEC_MODID[75]:PFCS0 */ + [76] = {0xFDA03554U, 0x00000002U}, /* RGIDSEC_MODID[76]:PFCS1 */ + [77] = {0xFDA03558U, 0x00000002U}, /* RGIDSEC_MODID[77]:PFCS2 */ + [78] = {0xFDA0355CU, 0x00000002U}, /* RGIDSEC_MODID[78]:PFCS3 */ + [79] = {0xFDA03560U, 0x00000002U}, /* RGIDSEC_MODID[79]:RESET0 */ + [80] = {0xFDA03564U, 0x00000002U}, /* RGIDSEC_MODID[80]:RESET1 */ + [81] = {0xFDA03568U, 0x00000002U}, /* RGIDSEC_MODID[81]:RESET2 */ + [82] = {0xFDA0356CU, 0x00000002U}, /* RGIDSEC_MODID[82]:RESET3 */ + [83] = {0xFDA03570U, 0x00000002U}, /* RGIDSEC_MODID[83]:SYS0 */ + [84] = {0xFDA03574U, 0x00000002U}, /* RGIDSEC_MODID[84]:SYS1 */ + [85] = {0xFDA03578U, 0x00000002U}, /* RGIDSEC_MODID[85]:SYS2 */ + [86] = {0xFDA0357CU, 0x00000002U}, /* RGIDSEC_MODID[86]:SYS3 */ + [87] = {0xFCB63400U, 0x00000002U}, /* RGIDSEC_MODID[87]:DMAMSI0 */ + [88] = {0xFCB63404U, 0x00000002U}, /* RGIDSEC_MODID[88]:DMAMSI1 */ + [89] = {0xFCB63408U, 0x00000002U}, /* RGIDSEC_MODID[89]:DMAMSI2 */ + [90] = {0xFCB6340CU, 0x00000002U}, /* RGIDSEC_MODID[90]:DMAMSI3 */ + [91] = {0xFCB63418U, 0x00000002U}, /* RGIDSEC_MODID[91]:ECMSP3 */ + [92] = {0xFCB63424U, 0x00000002U}, /* RGIDSEC_MODID[92]:ARSP30 */ + [93] = {0xFCB63428U, 0x00000002U}, /* RGIDSEC_MODID[93]:ARSP31 */ + [94] = {0xFCB6342CU, 0x00000002U}, /* RGIDSEC_MODID[94]:ARSP32 */ + [95] = {0xFCB63430U, 0x00000002U}, /* RGIDSEC_MODID[95]:ARSP33 */ + [96] = {0xFCB63434U, 0x00000002U}, /* RGIDSEC_MODID[96]:ARSP34 */ + [97] = {0xFCB63438U, 0x00000002U}, /* RGIDSEC_MODID[97]:ARSP35 */ + [98] = {0xFCB6343CU, 0x00000002U}, /* RGIDSEC_MODID[98]:ARSP36 */ + [99] = {0xFCB63440U, 0x00000002U}, /* RGIDSEC_MODID[99]:ARSP37 */ + [100] = {0xFCB63444U, 0x00000002U}, /* RGIDSEC_MODID[100]:ARSP38 */ + [101] = {0xFCB63448U, 0x00000002U}, /* RGIDSEC_MODID[101]:MSI0 */ + [102] = {0xFCB6344CU, 0x00000002U}, /* RGIDSEC_MODID[102]:MSI1 */ + [103] = {0xFCB63450U, 0x00000002U}, /* RGIDSEC_MODID[103]:MSI2 */ + [104] = {0xFCB63454U, 0x00000002U}, /* RGIDSEC_MODID[104]:MSI3 */ + [105] = {0xFCB93400U, 0x00000002U}, /* RGIDSEC_MODID[105]:ARSP40 */ + [106] = {0xFCB93404U, 0x00000002U}, /* RGIDSEC_MODID[106]:ARSP41 */ + [107] = {0xFCB93408U, 0x00000002U}, /* RGIDSEC_MODID[107]:ARSP42 */ + [108] = {0xFCB9340CU, 0x00000002U}, /* RGIDSEC_MODID[108]:ARSP43 */ + [109] = {0xFCB93410U, 0x00000002U}, /* RGIDSEC_MODID[109]:ARSP44 */ + [110] = {0xFCB93414U, 0x00000002U}, /* RGIDSEC_MODID[110]:ARSP45 */ + [111] = {0xFCB93418U, 0x00000002U}, /* RGIDSEC_MODID[111]:ARSP46 */ + [112] = {0xFCB9341CU, 0x00000002U}, /* RGIDSEC_MODID[112]:ARSP47 */ + [113] = {0xFCB93420U, 0x00000002U}, /* RGIDSEC_MODID[113]:ARSP48 */ + [114] = {0xFCB93424U, 0x00000002U}, /* RGIDSEC_MODID[114]:DMAHSCIF0 */ + [115] = {0xFCB93428U, 0x00000002U}, /* RGIDSEC_MODID[115]:DMAHSCIF1 */ + [116] = {0xFCB9342CU, 0x00000002U}, /* RGIDSEC_MODID[116]:DMAHSCIF2 */ + [117] = {0xFCB93430U, 0x00000002U}, /* RGIDSEC_MODID[117]:DMAHSCIF3 */ + [118] = {0xFCB93434U, 0x00000002U}, /* RGIDSEC_MODID[118]:DMASCIF0 */ + [119] = {0xFCB93438U, 0x00000002U}, /* RGIDSEC_MODID[119]:DMASCIF1 */ + [120] = {0xFCB9343CU, 0x00000002U}, /* RGIDSEC_MODID[120]:DMASCIF3 */ + [121] = {0xFCB93440U, 0x00000002U}, /* RGIDSEC_MODID[121]:DMASCIF4 */ + [122] = {0xFCB93444U, 0x00000002U}, /* RGIDSEC_MODID[122]:ECMSP4 */ + [123] = {0xFCB93448U, 0x00000002U}, /* RGIDSEC_MODID[123]:HSCIF0 */ + [124] = {0xFCB9344CU, 0x00000002U}, /* RGIDSEC_MODID[124]:HSCIF1 */ + [125] = {0xFCB93450U, 0x00000002U}, /* RGIDSEC_MODID[125]:HSCIF2 */ + [126] = {0xFCB93454U, 0x00000002U}, /* RGIDSEC_MODID[126]:HSCIF3 */ + [127] = {0xFCB93458U, 0x00000002U}, /* RGIDSEC_MODID[127]:SCIF0 */ + [128] = {0xFCB9345CU, 0x00000002U}, /* RGIDSEC_MODID[128]:SCIF1 */ + [129] = {0xFCB93460U, 0x00000002U}, /* RGIDSEC_MODID[129]:SCIF3 */ + [130] = {0xFCB93464U, 0x00000002U}, /* RGIDSEC_MODID[130]:SCIF4 */ + [131] = {0xFCB93468U, 0x00000002U}, /* RGIDSEC_MODID[131]:TMU1 */ + [132] = {0xFCB9346CU, 0x00000002U}, /* RGIDSEC_MODID[132]:TMU2 */ + [133] = {0xFCB93470U, 0x00000002U}, /* RGIDSEC_MODID[133]:TMU3 */ + [134] = {0xFCB93474U, 0x00000002U}, /* RGIDSEC_MODID[134]:TMU4 */ + [135] = {0xFCF83400U, 0x00000002U}, /* RGIDSEC_MODID[135]:CKMHSC */ + [136] = {0xFCF83404U, 0x00000002U}, /* RGIDSEC_MODID[136]:AXIPCI001 */ + [137] = {0xFCF83408U, 0x00000002U}, /* RGIDSEC_MODID[137]:AXIPCI002 */ + [138] = {0xFCF8340CU, 0x00000002U}, /* RGIDSEC_MODID[138]:AXIPCI003 */ + [139] = {0xFCF83410U, 0x00000002U}, /* RGIDSEC_MODID[139]:ETHPHY */ + [140] = {0xFCF83414U, 0x00000002U}, /* RGIDSEC_MODID[140]:AXIPCI005 */ + [141] = {0xFCF83418U, 0x00000002U}, /* RGIDSEC_MODID[141]:AXIPCI006 */ + [142] = {0xFCF8341CU, 0x00000002U}, /* RGIDSEC_MODID[142]:AXIPCI007 */ + [143] = {0xFCF83420U, 0x00000002U}, /* RGIDSEC_MODID[143]:AXIPCI008 */ + [144] = {0xFCF83424U, 0x00000002U}, /* RGIDSEC_MODID[144]:AXIPCI009 */ + [145] = {0xFCF83428U, 0x00000002U}, /* RGIDSEC_MODID[145]:AXIPCI010 */ + [146] = {0xFCF8342CU, 0x00000002U}, /* RGIDSEC_MODID[146]:AXIPCI011 */ + [147] = {0xFCF83430U, 0x00000002U}, /* RGIDSEC_MODID[147]:AXIPCI012 */ + [148] = {0xFCF83434U, 0x00000002U}, /* RGIDSEC_MODID[148]:AXIPCI013 */ + [149] = {0xFCF83438U, 0x00000002U}, /* RGIDSEC_MODID[149]:AXIPCI014 */ + [150] = {0xFCF8343CU, 0x00000002U}, /* RGIDSEC_MODID[150]:AXIPCI015 */ + [151] = {0xFCF83440U, 0x00000002U}, /* RGIDSEC_MODID[151]:AXIPCI100 */ + [152] = {0xFCF83444U, 0x00000002U}, /* RGIDSEC_MODID[152]:AXIPCI101 */ + [153] = {0xFCF83448U, 0x00000002U}, /* RGIDSEC_MODID[153]:AXIPCI102 */ + [154] = {0xFCF8344CU, 0x00000002U}, /* RGIDSEC_MODID[154]:AXIPCI103 */ + [155] = {0xFCF83450U, 0x00000002U}, /* RGIDSEC_MODID[155]:AXIPCI104 */ + [156] = {0xFCF83454U, 0x00000002U}, /* RGIDSEC_MODID[156]:AXIPCI105 */ + [157] = {0xFCF83458U, 0x00000002U}, /* RGIDSEC_MODID[157]:AXIPCI106 */ + [158] = {0xFCF8345CU, 0x00000002U}, /* RGIDSEC_MODID[158]:AXIPCI107 */ + [159] = {0xFCF83460U, 0x00000002U}, /* RGIDSEC_MODID[159]:AXIPCI108 */ + [160] = {0xFCF83464U, 0x00000002U}, /* RGIDSEC_MODID[160]:AXIPCI109 */ + [161] = {0xFCF83468U, 0x00000002U}, /* RGIDSEC_MODID[161]:AXIPCI110 */ + [162] = {0xFCF8346CU, 0x00000002U}, /* RGIDSEC_MODID[162]:AXIPCI111 */ + [163] = {0xFCF83470U, 0x00000002U}, /* RGIDSEC_MODID[163]:AXIPCI112 */ + [164] = {0xFCF83474U, 0x00000002U}, /* RGIDSEC_MODID[164]:AXIPCI113 */ + [165] = {0xFCF83478U, 0x00000002U}, /* RGIDSEC_MODID[165]:AXIPCI114 */ + [166] = {0xFCF8347CU, 0x00000002U}, /* RGIDSEC_MODID[166]:AXIPCI115 */ + [167] = {0xFCF83480U, 0x00000002U}, /* RGIDSEC_MODID[167]:ETHPHYRAM */ + [168] = {0xFCF83488U, 0x00000002U}, /* RGIDSEC_MODID[168]:IPMMUHC00 */ + [169] = {0xFCF8348CU, 0x00000002U}, /* RGIDSEC_MODID[169]:RSW200 */ + [170] = {0xFCF83490U, 0x00000002U}, /* RGIDSEC_MODID[170]:RSW201 */ + [171] = {0xFCF83494U, 0x00000002U}, /* RGIDSEC_MODID[171]:RSW210 */ + [172] = {0xFCF83498U, 0x00000002U}, /* RGIDSEC_MODID[172]:RSW211 */ + [173] = {0xFCF8349CU, 0x00000002U}, /* RGIDSEC_MODID[173]:RSW202 */ + [174] = {0xFCF834A0U, 0x00000002U}, /* RGIDSEC_MODID[174]:RSW203 */ + [175] = {0xFCF834A4U, 0x00000002U}, /* RGIDSEC_MODID[175]:RSW204 */ + [176] = {0xFCF834A8U, 0x00000002U}, /* RGIDSEC_MODID[176]:RSW205 */ + [177] = {0xFCF834ACU, 0x00000002U}, /* RGIDSEC_MODID[177]:RSW206 */ + [178] = {0xFCF834B0U, 0x00000002U}, /* RGIDSEC_MODID[178]:RSW207 */ + [179] = {0xFCF834B4U, 0x00000002U}, /* RGIDSEC_MODID[179]:RSW208 */ + [180] = {0xFCF834B8U, 0x00000002U}, /* RGIDSEC_MODID[180]:RSW209 */ + [181] = {0xFCF834BCU, 0x00000002U}, /* RGIDSEC_MODID[181]:RSW2RAM */ + [182] = {0xFCF834C0U, 0x00000002U}, /* RGIDSEC_MODID[182]:RSW2SEC00 */ + [183] = {0xFCF834C4U, 0x00000002U}, /* RGIDSEC_MODID[183]:RSW2SEC01 */ + [184] = {0xFCF834C8U, 0x00000002U}, /* RGIDSEC_MODID[184]:RSW2SEC10 */ + [185] = {0xFCF834CCU, 0x00000002U}, /* RGIDSEC_MODID[185]:RSW2SEC11 */ + [186] = {0xFCF834D0U, 0x00000002U}, /* RGIDSEC_MODID[186]:RSW2SEC02 */ + [187] = {0xFCF834D4U, 0x00000002U}, /* RGIDSEC_MODID[187]:RSW2SEC03 */ + [188] = {0xFCF834D8U, 0x00000002U}, /* RGIDSEC_MODID[188]:RSW2SEC04 */ + [189] = {0xFCF834DCU, 0x00000002U}, /* RGIDSEC_MODID[189]:RSW2SEC05 */ + [190] = {0xFCF834E0U, 0x00000002U}, /* RGIDSEC_MODID[190]:RSW2SEC06 */ + [191] = {0xFCF834E4U, 0x00000002U}, /* RGIDSEC_MODID[191]:RSW2SEC07 */ + [192] = {0xFCF834E8U, 0x00000002U}, /* RGIDSEC_MODID[192]:RSW2SEC08 */ + [193] = {0xFCF834ECU, 0x00000002U}, /* RGIDSEC_MODID[193]:RSW2SEC09 */ + [194] = {0xFCF834F4U, 0x00000002U}, /* RGIDSEC_MODID[194]:AXIPCI000 */ + [195] = {0xFCF834F8U, 0x00000002U}, /* RGIDSEC_MODID[195]:AXIPCI004 */ + [196] = {0xFCF834FCU, 0x00000002U}, /* RGIDSEC_MODID[196]:IPMMUHC01 */ + [197] = {0xFCF8350CU, 0x00000002U}, /* RGIDSEC_MODID[197]:IPMMUHC10 */ + [198] = {0xFCF83510U, 0x00000002U}, /* RGIDSEC_MODID[198]:IPMMUHC11 */ + [199] = {0xFCF83514U, 0x00000002U}, /* RGIDSEC_MODID[199]:IPMMUHC12 */ + [200] = {0xFCF83518U, 0x00000002U}, /* RGIDSEC_MODID[200]:IPMMUHC13 */ + [201] = {0xFCF8351CU, 0x00000002U}, /* RGIDSEC_MODID[201]:PPHY0 */ + [202] = {0xFCF83520U, 0x00000002U}, /* RGIDSEC_MODID[202]:PPHY1 */ + [203] = {0xFCF83524U, 0x00000002U}, /* RGIDSEC_MODID[203]:IPMMUHC14 */ + [204] = {0xFCF83528U, 0x00000002U}, /* RGIDSEC_MODID[204]:IPMMUHC15 */ + [205] = {0xFCF8352CU, 0x00000002U}, /* RGIDSEC_MODID[205]:FBAHSC */ + [206] = {0xFCF83530U, 0x00000002U}, /* RGIDSEC_MODID[206]:IPMMUHC02 */ + [207] = {0xFCF83534U, 0x00000002U}, /* RGIDSEC_MODID[207]:AXIUFSS */ + [208] = {0xFCF83538U, 0x00000002U}, /* RGIDSEC_MODID[208]:ECMHSC */ + [209] = {0xFCF8353CU, 0x00000002U}, /* RGIDSEC_MODID[209]:ARHC0 */ + [210] = {0xFCF83540U, 0x00000002U}, /* RGIDSEC_MODID[210]:ARHC1 */ + [211] = {0xFCF83544U, 0x00000002U}, /* RGIDSEC_MODID[211]:ARHC2 */ + [212] = {0xFCF83548U, 0x00000002U}, /* RGIDSEC_MODID[212]:ARHC3 */ + [213] = {0xFCF8354CU, 0x00000002U}, /* RGIDSEC_MODID[213]:ARHC4 */ + [214] = {0xFCF83550U, 0x00000002U}, /* RGIDSEC_MODID[214]:ARHC5 */ + [215] = {0xFCF83554U, 0x00000002U}, /* RGIDSEC_MODID[215]:ARHC6 */ + [216] = {0xFCF83558U, 0x00000002U}, /* RGIDSEC_MODID[216]:ARHC7 */ + [217] = {0xFCF8355CU, 0x00000002U}, /* RGIDSEC_MODID[217]:ARHC8 */ + [218] = {0xFCF83560U, 0x00000002U}, /* RGIDSEC_MODID[218]:IPMMUHC03 */ + [219] = {0xFCF83564U, 0x00000002U}, /* RGIDSEC_MODID[219]:IPMMUHC04 */ + [220] = {0xFCF83568U, 0x00000002U}, /* RGIDSEC_MODID[220]:IPMMUHC05 */ + [221] = {0xFCF8356CU, 0x00000002U}, /* RGIDSEC_MODID[221]:IPMMUHC06 */ + [222] = {0xFCF83570U, 0x00000002U}, /* RGIDSEC_MODID[222]:IPMMUHC07 */ + [223] = {0xFCF83574U, 0x00000002U}, /* RGIDSEC_MODID[223]:IPMMUHC08 */ + [224] = {0xFCF83578U, 0x00000002U}, /* RGIDSEC_MODID[224]:IPMMUHC09 */ + [225] = {0xFDC23400U, 0x00000002U}, /* RGIDSEC_MODID[225]:ARRC0 */ + [226] = {0xFDC23404U, 0x00000002U}, /* RGIDSEC_MODID[226]:ARRC1 */ + [227] = {0xFDC23408U, 0x00000002U}, /* RGIDSEC_MODID[227]:ARRC2 */ + [228] = {0xFDC2340CU, 0x00000002U}, /* RGIDSEC_MODID[228]:ARRC3 */ + [229] = {0xFDC23410U, 0x00000002U}, /* RGIDSEC_MODID[229]:ARRC4 */ + [230] = {0xFDC23414U, 0x00000002U}, /* RGIDSEC_MODID[230]:ARRC5 */ + [231] = {0xFDC23418U, 0x00000002U}, /* RGIDSEC_MODID[231]:ARRC6 */ + [232] = {0xFDC2341CU, 0x00000002U}, /* RGIDSEC_MODID[232]:ARRC7 */ + [233] = {0xFDC23420U, 0x00000002U}, /* RGIDSEC_MODID[233]:ARRC8 */ + [234] = {0xFDC23424U, 0x00000000U}, /* RGIDSEC_MODID[234]:CR0 */ + [235] = {0xFDC23428U, 0x00000002U}, /* RGIDSEC_MODID[235]:ICUMX */ + [236] = {0xFDC2342CU, 0x00000002U}, /* RGIDSEC_MODID[236]:ECMRC */ + [237] = {0xFD433400U, 0x00000002U}, /* RGIDSEC_MODID[237]:DMAWCRC0 */ + [238] = {0xFD433404U, 0x00000002U}, /* RGIDSEC_MODID[238]:DMAWCRC1 */ + [239] = {0xFD433408U, 0x00000002U}, /* RGIDSEC_MODID[239]:DMAWCRC2 */ + [240] = {0xFD43340CU, 0x00000002U}, /* RGIDSEC_MODID[240]:DMAWCRC3 */ + [241] = {0xFD433410U, 0x00000002U}, /* RGIDSEC_MODID[241]:DMATSIP0 */ + [242] = {0xFD433414U, 0x00000002U}, /* RGIDSEC_MODID[242]:DMATSIP1 */ + [243] = {0xFD433418U, 0x00000002U}, /* RGIDSEC_MODID[243]:DMATSIP2 */ + [244] = {0xFD443400U, 0x00000002U}, /* RGIDSEC_MODID[244]:ARMREG00 */ + [245] = {0xFD443404U, 0x00000002U}, /* RGIDSEC_MODID[245]:ARMREG01 */ + [246] = {0xFD443408U, 0x00000002U}, /* RGIDSEC_MODID[246]:ARMREG10 */ + [247] = {0xFD44340CU, 0x00000002U}, /* RGIDSEC_MODID[247]:ARMREG11 */ + [248] = {0xFD443410U, 0x00000002U}, /* RGIDSEC_MODID[248]:ARMREG12 */ + [249] = {0xFD443414U, 0x00000000U}, /* RGIDSEC_MODID[249]:ARMREG13 */ + [250] = {0xFD443418U, 0x00000000U}, /* RGIDSEC_MODID[250]:ARMREG14 */ + [251] = {0xFD44341CU, 0x00000002U}, /* RGIDSEC_MODID[251]:AXICR52SS */ + [252] = {0xFD443420U, 0x00000002U}, /* RGIDSEC_MODID[252]:AXICSD0 */ + [253] = {0xFD443424U, 0x00000002U}, /* RGIDSEC_MODID[253]:AXIINTAP0 */ + [254] = {0xFD443428U, 0x00000002U}, /* RGIDSEC_MODID[254]:AXIINTAP1 */ + [255] = {0xFD44342CU, 0x00000002U}, /* RGIDSEC_MODID[255]:AXISECROM */ + [256] = {0xFD443430U, 0x00000002U}, /* RGIDSEC_MODID[256]:AXISYSRAM0 */ + [257] = {0xFD443434U, 0x00000002U}, /* RGIDSEC_MODID[257]:AXISYSRAM1 */ + [258] = {0xFD443438U, 0x00000002U}, /* RGIDSEC_MODID[258]:ARGREG15 */ + [259] = {0xFD44343CU, 0x00000002U}, /* RGIDSEC_MODID[259]:ARMREG2 */ + [260] = {0xFD443440U, 0x00000002U}, /* RGIDSEC_MODID[260]:ARMREG3 */ + [261] = {0xFD443444U, 0x00000002U}, /* RGIDSEC_MODID[261]:ARMREG4 */ + [262] = {0xFD443448U, 0x00000002U}, /* RGIDSEC_MODID[262]:ARMREG5 */ + [263] = {0xFD44344CU, 0x00000002U}, /* RGIDSEC_MODID[263]:ARMREG6 */ + [264] = {0xFD443450U, 0x00000002U}, /* RGIDSEC_MODID[264]:ARMREG7 */ + [265] = {0xFD443454U, 0x00000000U}, /* RGIDSEC_MODID[265]:ARMREG8 */ + [266] = {0xFD443458U, 0x00000000U}, /* RGIDSEC_MODID[266]:ARMREG9 */ + [267] = {0xFD44345CU, 0x00000002U}, /* RGIDSEC_MODID[267]:ARRD0 */ + [268] = {0xFD443460U, 0x00000002U}, /* RGIDSEC_MODID[268]:ARRD1 */ + [269] = {0xFD443464U, 0x00000002U}, /* RGIDSEC_MODID[269]:ARRD2 */ + [270] = {0xFD443468U, 0x00000002U}, /* RGIDSEC_MODID[270]:ARRD3 */ + [271] = {0xFD44346CU, 0x00000002U}, /* RGIDSEC_MODID[271]:ARRD4 */ + [272] = {0xFD443470U, 0x00000002U}, /* RGIDSEC_MODID[272]:ARRD5 */ + [273] = {0xFD443474U, 0x00000002U}, /* RGIDSEC_MODID[273]:ARRD6 */ + [274] = {0xFD443478U, 0x00000002U}, /* RGIDSEC_MODID[274]:ARRD7 */ + [275] = {0xFD44347CU, 0x00000002U}, /* RGIDSEC_MODID[275]:ARRD8 */ + [276] = {0xFD443480U, 0x00000002U}, /* RGIDSEC_MODID[276]:ARRT0 */ + [277] = {0xFD443484U, 0x00000002U}, /* RGIDSEC_MODID[277]:ARRT1 */ + [278] = {0xFD443488U, 0x00000002U}, /* RGIDSEC_MODID[278]:ARRT2 */ + [279] = {0xFD44348CU, 0x00000002U}, /* RGIDSEC_MODID[279]:ARRT3 */ + [280] = {0xFD443490U, 0x00000002U}, /* RGIDSEC_MODID[280]:ARRT4 */ + [281] = {0xFD443494U, 0x00000002U}, /* RGIDSEC_MODID[281]:ARRT5 */ + [282] = {0xFD443498U, 0x00000002U}, /* RGIDSEC_MODID[282]:ARRT6 */ + [283] = {0xFD44349CU, 0x00000002U}, /* RGIDSEC_MODID[283]:ARRT7 */ + [284] = {0xFD4434A0U, 0x00000002U}, /* RGIDSEC_MODID[284]:ARRT8 */ + [285] = {0xFD4434A4U, 0x00000002U}, /* RGIDSEC_MODID[285]:CKMRT */ + [286] = {0xFD4434A8U, 0x00000002U}, /* RGIDSEC_MODID[286]:CRC0 */ + [287] = {0xFD4434ACU, 0x00000002U}, /* RGIDSEC_MODID[287]:CRC1 */ + [288] = {0xFD4434B0U, 0x00000002U}, /* RGIDSEC_MODID[288]:CRC2 */ + [289] = {0xFD4434B4U, 0x00000002U}, /* RGIDSEC_MODID[289]:CRC3 */ + [290] = {0xFD4434B8U, 0x00000002U}, /* RGIDSEC_MODID[290]:CSD */ + [291] = {0xFD4434BCU, 0x00000002U}, /* RGIDSEC_MODID[291]:ECM */ + [292] = {0xFD4434C0U, 0x00000002U}, /* RGIDSEC_MODID[292]:ECMRT */ + [293] = {0xFD4434C4U, 0x00000002U}, /* RGIDSEC_MODID[293]:FBACR52 */ + [294] = {0xFD4434C8U, 0x00000002U}, /* RGIDSEC_MODID[294]:FBART */ + [295] = {0xFD4434CCU, 0x00000002U}, /* RGIDSEC_MODID[295]:INTTP */ + [296] = {0xFD4434D0U, 0x00000002U}, /* RGIDSEC_MODID[296]:IPMMURT000 */ + [297] = {0xFD4434D4U, 0x00000002U}, /* RGIDSEC_MODID[297]:IPMMURT100 */ + [298] = {0xFD4434D8U, 0x00000002U}, /* RGIDSEC_MODID[298]:KCRC4 */ + [299] = {0xFD4434DCU, 0x00000002U}, /* RGIDSEC_MODID[299]:KCRC5 */ + [300] = {0xFD4434E0U, 0x00000002U}, /* RGIDSEC_MODID[300]:KCRC6 */ + [301] = {0xFD4434E4U, 0x00000002U}, /* RGIDSEC_MODID[301]:KCRC7 */ + [302] = {0xFD4434E8U, 0x00000002U}, /* RGIDSEC_MODID[302]:MFI00 */ + [303] = {0xFD4434ECU, 0x00000002U}, /* RGIDSEC_MODID[303]:MFI01 */ + [304] = {0xFD4434F0U, 0x00000002U}, /* RGIDSEC_MODID[304]:MFI10 */ + [305] = {0xFD4434F4U, 0x00000002U}, /* RGIDSEC_MODID[305]:MFI02 */ + [306] = {0xFD4434F8U, 0x00000002U}, /* RGIDSEC_MODID[306]:MFI03 */ + [307] = {0xFD4434FCU, 0x00000002U}, /* RGIDSEC_MODID[307]:MFI04 */ + [308] = {0xFD443500U, 0x00000002U}, /* RGIDSEC_MODID[308]:MFI05 */ + [309] = {0xFD443504U, 0x00000002U}, /* RGIDSEC_MODID[309]:MFI06 */ + [310] = {0xFD443508U, 0x00000002U}, /* RGIDSEC_MODID[310]:MFI07 */ + [311] = {0xFD44350CU, 0x00000002U}, /* RGIDSEC_MODID[311]:MFI08 */ + [312] = {0xFD443510U, 0x00000002U}, /* RGIDSEC_MODID[312]:MFI09 */ + [313] = {0xFD443514U, 0x00000002U}, /* RGIDSEC_MODID[313]:MFI15 */ + [314] = {0xFD443518U, 0x00000002U}, /* RGIDSEC_MODID[314]:CKMCR52 */ + [315] = {0xFD44351CU, 0x00000002U}, /* RGIDSEC_MODID[315]:RTDM0P */ + [316] = {0xFD443520U, 0x00000002U}, /* RGIDSEC_MODID[316]:ECMRD */ + [317] = {0xFD443524U, 0x00000002U}, /* RGIDSEC_MODID[317]:RTDM1P */ + [318] = {0xFD44352CU, 0x00000002U}, /* RGIDSEC_MODID[318]:RTDM2P */ + [319] = {0xFD443530U, 0x00000002U}, /* RGIDSEC_MODID[319]:SYSRAM10 */ + [320] = {0xFD443534U, 0x00000002U}, /* RGIDSEC_MODID[320]:RTDM3P */ + [321] = {0xFD443538U, 0x00000000U}, /* RGIDSEC_MODID[321]:SYSRAM00 */ + [322] = {0xFD44353CU, 0x00000002U}, /* RGIDSEC_MODID[322]:TSIPL0 */ + [323] = {0xFD443540U, 0x00000002U}, /* RGIDSEC_MODID[323]:TSIPL1 */ + [324] = {0xFD443544U, 0x00000002U}, /* RGIDSEC_MODID[324]:TSIPL2 */ + [325] = {0xFD443548U, 0x00000002U}, /* RGIDSEC_MODID[325]:TSIPL3 */ + [326] = {0xFD44354CU, 0x00000002U}, /* RGIDSEC_MODID[326]:TSIPL4 */ + [327] = {0xFD443550U, 0x00000002U}, /* RGIDSEC_MODID[327]:TSIPL5 */ + [328] = {0xFD443554U, 0x00000002U}, /* RGIDSEC_MODID[328]:TSIPL6 */ + [329] = {0xFD443558U, 0x00000002U}, /* RGIDSEC_MODID[329]:TSIPL7 */ + [330] = {0xFD44355CU, 0x00000002U}, /* RGIDSEC_MODID[330]:WCRC0 */ + [331] = {0xFD443560U, 0x00000002U}, /* RGIDSEC_MODID[331]:WCRC1 */ + [332] = {0xFD443564U, 0x00000002U}, /* RGIDSEC_MODID[332]:WCRC2 */ + [333] = {0xFD443568U, 0x00000002U}, /* RGIDSEC_MODID[333]:WCRC3 */ + [334] = {0xFD443574U, 0x00000002U}, /* RGIDSEC_MODID[334]:TSIP0 */ + [335] = {0xFD443578U, 0x00000002U}, /* RGIDSEC_MODID[335]:TSIP1 */ + [336] = {0xFD44357CU, 0x00000002U}, /* RGIDSEC_MODID[336]:TSIP2 */ + [337] = {0xFD443580U, 0x00000002U}, /* RGIDSEC_MODID[337]:MFI11 */ + [338] = {0xFD443584U, 0x00000002U}, /* RGIDSEC_MODID[338]:MFI12 */ + [339] = {0xFD443588U, 0x00000002U}, /* RGIDSEC_MODID[339]:MFI13 */ + [340] = {0xFD44358CU, 0x00000002U}, /* RGIDSEC_MODID[340]:MFI14 */ + [341] = {0xFD443590U, 0x00000002U}, /* RGIDSEC_MODID[341]:IPMMURT001 */ + [342] = {0xFD443594U, 0x00000002U}, /* RGIDSEC_MODID[342]:IPMMURT010 */ + [343] = {0xFD443598U, 0x00000002U}, /* RGIDSEC_MODID[343]:IPMMURT011 */ + [344] = {0xFD44359CU, 0x00000002U}, /* RGIDSEC_MODID[344]:IPMMURT012 */ + [345] = {0xFD4435A0U, 0x00000002U}, /* RGIDSEC_MODID[345]:IPMMURT013 */ + [346] = {0xFD4435A4U, 0x00000002U}, /* RGIDSEC_MODID[346]:IPMMURT014 */ + [347] = {0xFD4435A8U, 0x00000002U}, /* RGIDSEC_MODID[347]:IPMMURT015 */ + [348] = {0xFD4435ACU, 0x00000002U}, /* RGIDSEC_MODID[348]:IPMMURT002 */ + [349] = {0xFD4435B0U, 0x00000002U}, /* RGIDSEC_MODID[349]:IPMMURT003 */ + [350] = {0xFD4435B4U, 0x00000002U}, /* RGIDSEC_MODID[350]:IPMMURT004 */ + [351] = {0xFD4435B8U, 0x00000002U}, /* RGIDSEC_MODID[351]:IPMMURT005 */ + [352] = {0xFD4435BCU, 0x00000002U}, /* RGIDSEC_MODID[352]:IPMMURT006 */ + [353] = {0xFD4435C0U, 0x00000002U}, /* RGIDSEC_MODID[353]:IPMMURT007 */ + [354] = {0xFD4435C4U, 0x00000002U}, /* RGIDSEC_MODID[354]:IPMMURT008 */ + [355] = {0xFD4435C8U, 0x00000002U}, /* RGIDSEC_MODID[355]:IPMMURT009 */ + [356] = {0xFD4435CCU, 0x00000002U}, /* RGIDSEC_MODID[356]:IPMMURT101 */ + [357] = {0xFD4435D0U, 0x00000002U}, /* RGIDSEC_MODID[357]:IPMMURT110 */ + [358] = {0xFD4435D4U, 0x00000002U}, /* RGIDSEC_MODID[358]:IPMMURT111 */ + [359] = {0xFD4435D8U, 0x00000002U}, /* RGIDSEC_MODID[359]:IPMMURT112 */ + [360] = {0xFD4435DCU, 0x00000002U}, /* RGIDSEC_MODID[360]:IPMMURT113 */ + [361] = {0xFD4435E0U, 0x00000002U}, /* RGIDSEC_MODID[361]:IPMMURT114 */ + [362] = {0xFD4435E4U, 0x00000002U}, /* RGIDSEC_MODID[362]:IPMMURT115 */ + [363] = {0xFD4435E8U, 0x00000002U}, /* RGIDSEC_MODID[363]:IPMMURT102 */ + [364] = {0xFD4435ECU, 0x00000002U}, /* RGIDSEC_MODID[364]:IPMMURT103 */ + [365] = {0xFD4435F0U, 0x00000002U}, /* RGIDSEC_MODID[365]:IPMMURT104 */ + [366] = {0xFD4435F4U, 0x00000002U}, /* RGIDSEC_MODID[366]:IPMMURT105 */ + [367] = {0xFD4435F8U, 0x00000002U}, /* RGIDSEC_MODID[367]:IPMMURT106 */ + [368] = {0xFD4435FCU, 0x00000002U}, /* RGIDSEC_MODID[368]:IPMMURT107 */ + [369] = {0xFD443600U, 0x00000002U}, /* RGIDSEC_MODID[369]:RTDM000 */ + [370] = {0xFD443604U, 0x00000002U}, /* RGIDSEC_MODID[370]:RTDM001 */ + [371] = {0xFD443608U, 0x00000002U}, /* RGIDSEC_MODID[371]:RTDM010 */ + [372] = {0xFD44360CU, 0x00000002U}, /* RGIDSEC_MODID[372]:RTDM011 */ + [373] = {0xFD443610U, 0x00000002U}, /* RGIDSEC_MODID[373]:RTDM012 */ + [374] = {0xFD443614U, 0x00000002U}, /* RGIDSEC_MODID[374]:RTDM013 */ + [375] = {0xFD443618U, 0x00000002U}, /* RGIDSEC_MODID[375]:RTDM014 */ + [376] = {0xFD44361CU, 0x00000002U}, /* RGIDSEC_MODID[376]:RTDM015 */ + [377] = {0xFD443620U, 0x00000002U}, /* RGIDSEC_MODID[377]:RTDM002 */ + [378] = {0xFD443624U, 0x00000002U}, /* RGIDSEC_MODID[378]:RTDM003 */ + [379] = {0xFD443628U, 0x00000002U}, /* RGIDSEC_MODID[379]:RTDM004 */ + [380] = {0xFD44362CU, 0x00000002U}, /* RGIDSEC_MODID[380]:RTDM005 */ + [381] = {0xFD443630U, 0x00000002U}, /* RGIDSEC_MODID[381]:RTDM006 */ + [382] = {0xFD443634U, 0x00000002U}, /* RGIDSEC_MODID[382]:RTDM007 */ + [383] = {0xFD443638U, 0x00000002U}, /* RGIDSEC_MODID[383]:RTDM008 */ + [384] = {0xFD44363CU, 0x00000002U}, /* RGIDSEC_MODID[384]:RTDM009 */ + [385] = {0xFD443640U, 0x00000002U}, /* RGIDSEC_MODID[385]:RTDM100 */ + [386] = {0xFD443644U, 0x00000002U}, /* RGIDSEC_MODID[386]:RTDM101 */ + [387] = {0xFD443648U, 0x00000002U}, /* RGIDSEC_MODID[387]:RTDM110 */ + [388] = {0xFD44364CU, 0x00000002U}, /* RGIDSEC_MODID[388]:RTDM111 */ + [389] = {0xFD443650U, 0x00000002U}, /* RGIDSEC_MODID[389]:RTDM112 */ + [390] = {0xFD443654U, 0x00000002U}, /* RGIDSEC_MODID[390]:RTDM113 */ + [391] = {0xFD443658U, 0x00000002U}, /* RGIDSEC_MODID[391]:RTDM114 */ + [392] = {0xFD44365CU, 0x00000002U}, /* RGIDSEC_MODID[392]:RTDM115 */ + [393] = {0xFD443660U, 0x00000002U}, /* RGIDSEC_MODID[393]:RTDM102 */ + [394] = {0xFD443664U, 0x00000002U}, /* RGIDSEC_MODID[394]:RTDM103 */ + [395] = {0xFD443668U, 0x00000002U}, /* RGIDSEC_MODID[395]:RTDM104 */ + [396] = {0xFD44366CU, 0x00000002U}, /* RGIDSEC_MODID[396]:RTDM105 */ + [397] = {0xFD443670U, 0x00000002U}, /* RGIDSEC_MODID[397]:RTDM106 */ + [398] = {0xFD443674U, 0x00000002U}, /* RGIDSEC_MODID[398]:RTDM107 */ + [399] = {0xFD443678U, 0x00000002U}, /* RGIDSEC_MODID[399]:RTDM108 */ + [400] = {0xFD44367CU, 0x00000002U}, /* RGIDSEC_MODID[400]:RTDM109 */ + [401] = {0xFD443680U, 0x00000002U}, /* RGIDSEC_MODID[401]:RTDM200 */ + [402] = {0xFD443684U, 0x00000002U}, /* RGIDSEC_MODID[402]:RTDM201 */ + [403] = {0xFD443688U, 0x00000002U}, /* RGIDSEC_MODID[403]:RTDM210 */ + [404] = {0xFD44368CU, 0x00000002U}, /* RGIDSEC_MODID[404]:RTDM211 */ + [405] = {0xFD443690U, 0x00000002U}, /* RGIDSEC_MODID[405]:RTDM212 */ + [406] = {0xFD443694U, 0x00000002U}, /* RGIDSEC_MODID[406]:RTDM213 */ + [407] = {0xFD443698U, 0x00000002U}, /* RGIDSEC_MODID[407]:RTDM214 */ + [408] = {0xFD44369CU, 0x00000002U}, /* RGIDSEC_MODID[408]:RTDM215 */ + [409] = {0xFD4436A0U, 0x00000002U}, /* RGIDSEC_MODID[409]:RTDM202 */ + [410] = {0xFD4436A4U, 0x00000002U}, /* RGIDSEC_MODID[410]:RTDM203 */ + [411] = {0xFD4436A8U, 0x00000002U}, /* RGIDSEC_MODID[411]:RTDM204 */ + [412] = {0xFD4436ACU, 0x00000002U}, /* RGIDSEC_MODID[412]:RTDM205 */ + [413] = {0xFD4436B0U, 0x00000002U}, /* RGIDSEC_MODID[413]:RTDM206 */ + [414] = {0xFD4436B4U, 0x00000002U}, /* RGIDSEC_MODID[414]:RTDM207 */ + [415] = {0xFD4436B8U, 0x00000002U}, /* RGIDSEC_MODID[415]:RTDM208 */ + [416] = {0xFD4436BCU, 0x00000002U}, /* RGIDSEC_MODID[416]:RTDM209 */ + [417] = {0xFD4436C0U, 0x00000002U}, /* RGIDSEC_MODID[417]:RTDM300 */ + [418] = {0xFD4436C4U, 0x00000002U}, /* RGIDSEC_MODID[418]:RTDM301 */ + [419] = {0xFD4436C8U, 0x00000002U}, /* RGIDSEC_MODID[419]:RTDM310 */ + [420] = {0xFD4436CCU, 0x00000002U}, /* RGIDSEC_MODID[420]:RTDM311 */ + [421] = {0xFD4436D0U, 0x00000002U}, /* RGIDSEC_MODID[421]:RTDM312 */ + [422] = {0xFD4436D4U, 0x00000002U}, /* RGIDSEC_MODID[422]:RTDM313 */ + [423] = {0xFD4436D8U, 0x00000002U}, /* RGIDSEC_MODID[423]:RTDM314 */ + [424] = {0xFD4436DCU, 0x00000002U}, /* RGIDSEC_MODID[424]:RTDM315 */ + [425] = {0xFD4436E0U, 0x00000002U}, /* RGIDSEC_MODID[425]:RTDM302 */ + [426] = {0xFD4436E4U, 0x00000002U}, /* RGIDSEC_MODID[426]:RTDM303 */ + [427] = {0xFD4436E8U, 0x00000002U}, /* RGIDSEC_MODID[427]:RTDM304 */ + [428] = {0xFD4436ECU, 0x00000002U}, /* RGIDSEC_MODID[428]:RTDM305 */ + [429] = {0xFD4436F0U, 0x00000002U}, /* RGIDSEC_MODID[429]:RTDM306 */ + [430] = {0xFD4436F4U, 0x00000002U}, /* RGIDSEC_MODID[430]:RTDM307 */ + [431] = {0xFD4436F8U, 0x00000002U}, /* RGIDSEC_MODID[431]:RTDM308 */ + [432] = {0xFD4436FCU, 0x00000002U}, /* RGIDSEC_MODID[432]:RTDM309 */ + [433] = {0xFD443700U, 0x00000002U}, /* RGIDSEC_MODID[433]:IPMMURT108 */ + [434] = {0xFD443704U, 0x00000002U}, /* RGIDSEC_MODID[434]:IPMMURT109 */ + [435] = {0xFD443708U, 0x00000000U}, /* RGIDSEC_MODID[435]:SYSRAM01 */ + [436] = {0xFD44370CU, 0x00000002U}, /* RGIDSEC_MODID[436]:SYSRAM02 */ + [437] = {0xFD443710U, 0x00000000U}, /* RGIDSEC_MODID[437]:SYSRAM03 */ + [438] = {0xFD443714U, 0x00000000U}, /* RGIDSEC_MODID[438]:SYSRAM04 */ + [439] = {0xFD443718U, 0x00000000U}, /* RGIDSEC_MODID[439]:SYSRAM05 */ + [440] = {0xFD44371CU, 0x00000000U}, /* RGIDSEC_MODID[440]:SYSRAM06 */ + [441] = {0xFD443720U, 0x00000002U}, /* RGIDSEC_MODID[441]:SYSRAM07 */ + [442] = {0xFD443724U, 0x00000002U}, /* RGIDSEC_MODID[442]:SYSRAM11 */ + [443] = {0xFD443728U, 0x00000002U}, /* RGIDSEC_MODID[443]:SYSRAM12 */ + [444] = {0xFD44372CU, 0x00000002U}, /* RGIDSEC_MODID[444]:SYSRAM13 */ + [445] = {0xFD443730U, 0x00000002U}, /* RGIDSEC_MODID[445]:SYSRAM14 */ + [446] = {0xFD443734U, 0x00000002U}, /* RGIDSEC_MODID[446]:SYSRAM15 */ + [447] = {0xFD443738U, 0x00000002U}, /* RGIDSEC_MODID[447]:SYSRAM16 */ + [448] = {0xFD44373CU, 0x00000002U}, /* RGIDSEC_MODID[448]:SYSRAM17 */ + [449] = {0xFD443760U, 0x00000002U}, /* RGIDSEC_MODID[449]:BKBUF */ + [450] = {0xFD44376CU, 0x00000002U}, /* RGIDSEC_MODID[450]:MCU */ + [451] = {0xFF863400U, 0x00000002U}, /* RGIDSEC_MODID[451]:ARSC0 */ + [452] = {0xFF863404U, 0x00000002U}, /* RGIDSEC_MODID[452]:ARSC1 */ + [453] = {0xFF863408U, 0x00000002U}, /* RGIDSEC_MODID[453]:ARSC2 */ + [454] = {0xFF86340CU, 0x00000002U}, /* RGIDSEC_MODID[454]:ARSC3 */ + [455] = {0xFF863410U, 0x00000002U}, /* RGIDSEC_MODID[455]:ARSC4 */ + [456] = {0xFF863414U, 0x00000002U}, /* RGIDSEC_MODID[456]:ARSC5 */ + [457] = {0xFF863418U, 0x00000002U}, /* RGIDSEC_MODID[457]:ARSC6 */ + [458] = {0xFF86341CU, 0x00000002U}, /* RGIDSEC_MODID[458]:ARSC7 */ + [459] = {0xFF863420U, 0x00000002U}, /* RGIDSEC_MODID[459]:ARSC8 */ + [460] = {0xFF863424U, 0x00000002U}, /* RGIDSEC_MODID[460]:ARSTM0 */ + [461] = {0xFF863428U, 0x00000002U}, /* RGIDSEC_MODID[461]:ARSTM1 */ + [462] = {0xFF863430U, 0x00000002U}, /* RGIDSEC_MODID[462]:AXIFBABUSTOP0 */ + [463] = {0xFF863434U, 0x00000002U}, /* RGIDSEC_MODID[463]:AXIFBABUSTOP1 */ + [464] = {0xFF863438U, 0x00000002U}, /* RGIDSEC_MODID[464]:ARSTM2 */ + [465] = {0xFF86343CU, 0x00000002U}, /* RGIDSEC_MODID[465]:ARSTM3 */ + [466] = {0xFF863440U, 0x00000002U}, /* RGIDSEC_MODID[466]:ARSTM4 */ + [467] = {0xFF863444U, 0x00000002U}, /* RGIDSEC_MODID[467]:ARSTM5 */ + [468] = {0xFF863448U, 0x00000002U}, /* RGIDSEC_MODID[468]:ARSTM6 */ + [469] = {0xFF86344CU, 0x00000002U}, /* RGIDSEC_MODID[469]:ARSTM7 */ + [470] = {0xFF863450U, 0x00000002U}, /* RGIDSEC_MODID[470]:ARSTM8 */ + [471] = {0xFF863454U, 0x00000002U}, /* RGIDSEC_MODID[471]:ECMTOP */ + [472] = {0xFF863458U, 0x00000002U}, /* RGIDSEC_MODID[472]:FBA */ + [473] = {0xFF86345CU, 0x00000002U}, /* RGIDSEC_MODID[473]:FBC */ + [474] = {0xFF863460U, 0x00000002U}, /* RGIDSEC_MODID[474]:AXICCI00 */ + [475] = {0xFF863464U, 0x00000002U}, /* RGIDSEC_MODID[475]:AXICCI01 */ + [476] = {0xFF863468U, 0x00000002U}, /* RGIDSEC_MODID[476]:AXICCI10 */ + [477] = {0xFF86346CU, 0x00000002U}, /* RGIDSEC_MODID[477]:AXICCI11 */ + [478] = {0xFF863470U, 0x00000002U}, /* RGIDSEC_MODID[478]:AXICCI12 */ + [479] = {0xFF863474U, 0x00000002U}, /* RGIDSEC_MODID[479]:AXICCI13 */ + [480] = {0xFF863478U, 0x00000002U}, /* RGIDSEC_MODID[480]:AXICCI14 */ + [481] = {0xFF86347CU, 0x00000002U}, /* RGIDSEC_MODID[481]:AXICCI15 */ + [482] = {0xFF863480U, 0x00000002U}, /* RGIDSEC_MODID[482]:AXICCI2 */ + [483] = {0xFF863484U, 0x00000002U}, /* RGIDSEC_MODID[483]:AXICCI3 */ + [484] = {0xFF863488U, 0x00000002U}, /* RGIDSEC_MODID[484]:AXICCI4 */ + [485] = {0xFF86348CU, 0x00000002U}, /* RGIDSEC_MODID[485]:AXICCI5 */ + [486] = {0xFF863490U, 0x00000002U}, /* RGIDSEC_MODID[486]:AXICCI6 */ + [487] = {0xFF863494U, 0x00000002U}, /* RGIDSEC_MODID[487]:AXICCI7 */ + [488] = {0xFF863498U, 0x00000002U}, /* RGIDSEC_MODID[488]:AXICCI8 */ + [489] = {0xFF86349CU, 0x00000002U}, /* RGIDSEC_MODID[489]:AXICCI9 */ + [490] = {0xFF8634A0U, 0x00000002U}, /* RGIDSEC_MODID[490]:ECMSTM */ + [491] = {0xFCB83414U, 0x00000002U}, /* RGIDSEC_MODID[491]:DMAI2C0 */ + [492] = {0xFCB83418U, 0x00000002U}, /* RGIDSEC_MODID[492]:DMAI2C1 */ + [493] = {0xFCB8341CU, 0x00000002U}, /* RGIDSEC_MODID[493]:DMAI2C2 */ + [494] = {0xFCB83420U, 0x00000002U}, /* RGIDSEC_MODID[494]:DMAI2C3 */ + [495] = {0xFCB83424U, 0x00000002U}, /* RGIDSEC_MODID[495]:DMAI2C4 */ + [496] = {0xFCB83428U, 0x00000002U}, /* RGIDSEC_MODID[496]:DMAI2C5 */ + [497] = {0xFDDC3400U, 0x00000002U}, /* RGIDSEC_MODID[497]:ARMM */ + [498] = {0xFDDC3404U, 0x00000002U}, /* RGIDSEC_MODID[498]:AXIARNMM */ + [499] = {0xFDDC3408U, 0x00000002U}, /* RGIDSEC_MODID[499]:ARSM0 */ + [500] = {0xFDDC340CU, 0x00000002U}, /* RGIDSEC_MODID[500]:ARSM1 */ + [501] = {0xFDDC3410U, 0x00000002U}, /* RGIDSEC_MODID[501]:ARSM2 */ + [502] = {0xFDDC3414U, 0x00000002U}, /* RGIDSEC_MODID[502]:AXIQOS0 */ + [503] = {0xFDDC3418U, 0x00000002U}, /* RGIDSEC_MODID[503]:AXIQOS1 */ + [504] = {0xFDDC341CU, 0x00000002U}, /* RGIDSEC_MODID[504]:AXIQOS2 */ + [505] = {0xFDDC3420U, 0x00000002U}, /* RGIDSEC_MODID[505]:AXIQOS3 */ + [506] = {0xFDDC3424U, 0x00000002U}, /* RGIDSEC_MODID[506]:AXIQOS4 */ + [507] = {0xFDDC3430U, 0x00000002U}, /* RGIDSEC_MODID[507]:AXIQOS5 */ + [508] = {0xFDDC3434U, 0x00000002U}, /* RGIDSEC_MODID[508]:ARSM3 */ + [509] = {0xFDDC3438U, 0x00000002U}, /* RGIDSEC_MODID[509]:ARSM4 */ + [510] = {0xFDDC343CU, 0x00000002U}, /* RGIDSEC_MODID[510]:ARSM5 */ + [511] = {0xFDDC3440U, 0x00000002U}, /* RGIDSEC_MODID[511]:ARSM6 */ + [512] = {0xFDDC3444U, 0x00000002U}, /* RGIDSEC_MODID[512]:ARSM7 */ + [513] = {0xFDDC3448U, 0x00000002U}, /* RGIDSEC_MODID[513]:ARSM8 */ + [514] = {0xFDDC344CU, 0x00000000U}, /* RGIDSEC_MODID[514]:AXMM0 */ + [515] = {0xFDDC3450U, 0x00000000U}, /* RGIDSEC_MODID[515]:AXMM1 */ + [516] = {0xFDDC3454U, 0x00000002U}, /* RGIDSEC_MODID[516]:AXMMPMON */ + [517] = {0xFDDC3458U, 0x00000002U}, /* RGIDSEC_MODID[517]:CKMMM */ + [518] = {0xFDDC345CU, 0x00000002U}, /* RGIDSEC_MODID[518]:ECMMM */ + [519] = {0xFDDC3468U, 0x00000002U}, /* RGIDSEC_MODID[519]:FBAMM */ + [520] = {0xFDDC346CU, 0x00000002U}, /* RGIDSEC_MODID[520]:IPMMUMM00 */ + [521] = {0xFDDC3470U, 0x00000002U}, /* RGIDSEC_MODID[521]:DBS00 */ + [522] = {0xFDDC3474U, 0x00000002U}, /* RGIDSEC_MODID[522]:DBS01 */ + [523] = {0xFDDC3480U, 0x00000002U}, /* RGIDSEC_MODID[523]:AXCIDBS */ + [524] = {0xFDDC349CU, 0x00000002U}, /* RGIDSEC_MODID[524]:IPMMUMM01 */ + [525] = {0xFDDC34A0U, 0x00000002U}, /* RGIDSEC_MODID[525]:IPMMUMM10 */ + [526] = {0xFDDC34A4U, 0x00000002U}, /* RGIDSEC_MODID[526]:IPMMUMM11 */ + [527] = {0xFDDC34A8U, 0x00000002U}, /* RGIDSEC_MODID[527]:IPMMUMM12 */ + [528] = {0xFDDC34ACU, 0x00000002U}, /* RGIDSEC_MODID[528]:IPMMUMM13 */ + [529] = {0xFDDC34B0U, 0x00000002U}, /* RGIDSEC_MODID[529]:IPMMUMM14 */ + [530] = {0xFDDC34B4U, 0x00000002U}, /* RGIDSEC_MODID[530]:IPMMUMM15 */ + [531] = {0xFDDC34B8U, 0x00000002U}, /* RGIDSEC_MODID[531]:IPMMUMM02 */ + [532] = {0xFDDC34BCU, 0x00000002U}, /* RGIDSEC_MODID[532]:IPMMUMM03 */ + [533] = {0xFDDC34C0U, 0x00000002U}, /* RGIDSEC_MODID[533]:IPMMUMM04 */ + [534] = {0xFDDC34C4U, 0x00000002U}, /* RGIDSEC_MODID[534]:IPMMUMM05 */ + [535] = {0xFDDC34C8U, 0x00000002U}, /* RGIDSEC_MODID[535]:IPMMUMM06 */ + [536] = {0xFDDC34CCU, 0x00000002U}, /* RGIDSEC_MODID[536]:IPMMUMM07 */ + [537] = {0xFDDC34D0U, 0x00000002U}, /* RGIDSEC_MODID[537]:IPMMUMM08 */ + [538] = {0xFDDC34D4U, 0x00000002U}, /* RGIDSEC_MODID[538]:IPMMUMM09 */ + [539] = {0xFCB53400U, 0x00000002U}, /* RGIDSEC_MODID[539]:ARSD00 */ + [540] = {0xFCB53404U, 0x00000002U}, /* RGIDSEC_MODID[540]:ARSD01 */ + [541] = {0xFCB53408U, 0x00000002U}, /* RGIDSEC_MODID[541]:ARSD02 */ + [542] = {0xFCB5340CU, 0x00000002U}, /* RGIDSEC_MODID[542]:ARSD03 */ + [543] = {0xFCB53410U, 0x00000002U}, /* RGIDSEC_MODID[543]:ARSD04 */ + [544] = {0xFCB53414U, 0x00000002U}, /* RGIDSEC_MODID[544]:ARSD05 */ + [545] = {0xFCB53418U, 0x00000002U}, /* RGIDSEC_MODID[545]:ARSD06 */ + [546] = {0xFCB53428U, 0x00000002U}, /* RGIDSEC_MODID[546]:AXIRPC */ + [547] = {0xFCB5342CU, 0x00000002U}, /* RGIDSEC_MODID[547]:AXISDHI0 */ + [548] = {0xFCB53430U, 0x00000002U}, /* RGIDSEC_MODID[548]:ARSD07 */ + [549] = {0xFCB53434U, 0x00000002U}, /* RGIDSEC_MODID[549]:ARSD07 */ + [550] = {0xFCB53438U, 0x00000002U}, /* RGIDSEC_MODID[550]:ARSP00 */ + [551] = {0xFCB5343CU, 0x00000002U}, /* RGIDSEC_MODID[551]:ARSP01 */ + [552] = {0xFCB53440U, 0x00000002U}, /* RGIDSEC_MODID[552]:ARSP02 */ + [553] = {0xFCB53444U, 0x00000002U}, /* RGIDSEC_MODID[553]:ARSP03 */ + [554] = {0xFCB53448U, 0x00000002U}, /* RGIDSEC_MODID[554]:ARSP04 */ + [555] = {0xFCB5344CU, 0x00000002U}, /* RGIDSEC_MODID[555]:ARSP05 */ + [556] = {0xFCB53450U, 0x00000002U}, /* RGIDSEC_MODID[556]:ARSP06 */ + [557] = {0xFCB53454U, 0x00000002U}, /* RGIDSEC_MODID[557]:ARSP07 */ + [558] = {0xFCB53458U, 0x00000002U}, /* RGIDSEC_MODID[558]:ARSP08 */ + [559] = {0xFCB5345CU, 0x00000002U}, /* RGIDSEC_MODID[559]:IPMMUDS001 */ + [560] = {0xFCB53460U, 0x00000002U}, /* RGIDSEC_MODID[560]:CKMPER0 */ + [561] = {0xFCB53464U, 0x00000002U}, /* RGIDSEC_MODID[561]:ECMPER0 */ + [562] = {0xFCB53468U, 0x00000002U}, /* RGIDSEC_MODID[562]:FBAPER0 */ + [563] = {0xFCB5346CU, 0x00000002U}, /* RGIDSEC_MODID[563]:FSO0 */ + [564] = {0xFCB53470U, 0x00000002U}, /* RGIDSEC_MODID[564]:FSO1 */ + [565] = {0xFCB53474U, 0x00000002U}, /* RGIDSEC_MODID[565]:FSO10 */ + [566] = {0xFCB53478U, 0x00000002U}, /* RGIDSEC_MODID[566]:FSO2 */ + [567] = {0xFCB5347CU, 0x00000002U}, /* RGIDSEC_MODID[567]:FSO3 */ + [568] = {0xFCB53480U, 0x00000002U}, /* RGIDSEC_MODID[568]:FSO4 */ + [569] = {0xFCB53484U, 0x00000002U}, /* RGIDSEC_MODID[569]:FSO5 */ + [570] = {0xFCB53488U, 0x00000002U}, /* RGIDSEC_MODID[570]:FSO6 */ + [571] = {0xFCB5348CU, 0x00000002U}, /* RGIDSEC_MODID[571]:FSO7 */ + [572] = {0xFCB53490U, 0x00000002U}, /* RGIDSEC_MODID[572]:FSO8 */ + [573] = {0xFCB53494U, 0x00000002U}, /* RGIDSEC_MODID[573]:FSO9 */ + [574] = {0xFCB5349CU, 0x00000002U}, /* RGIDSEC_MODID[574]:ECMSD0 */ + [575] = {0xFCB534A0U, 0x00000002U}, /* RGIDSEC_MODID[575]:IPMMUDS010 */ + [576] = {0xFCB534A4U, 0x00000002U}, /* RGIDSEC_MODID[576]:IPMMUDS011 */ + [577] = {0xFCB534A8U, 0x00000002U}, /* RGIDSEC_MODID[577]:I2C0 */ + [578] = {0xFCB534ACU, 0x00000002U}, /* RGIDSEC_MODID[578]:I2C1 */ + [579] = {0xFCB534B0U, 0x00000002U}, /* RGIDSEC_MODID[579]:I2C2 */ + [580] = {0xFCB534B4U, 0x00000002U}, /* RGIDSEC_MODID[580]:I2C3 */ + [581] = {0xFCB534B8U, 0x00000002U}, /* RGIDSEC_MODID[581]:I2C4 */ + [582] = {0xFCB534BCU, 0x00000002U}, /* RGIDSEC_MODID[582]:I2C5 */ + [583] = {0xFCB534C0U, 0x00000002U}, /* RGIDSEC_MODID[583]:IPMMUDS012 */ + [584] = {0xFCB534C8U, 0x00000002U}, /* RGIDSEC_MODID[584]:IPMMUDS000 */ + [585] = {0xFCB534CCU, 0x00000002U}, /* RGIDSEC_MODID[585]:IPMMUDS013 */ + [586] = {0xFCB534D0U, 0x00000002U}, /* RGIDSEC_MODID[586]:IPMMUDS014 */ + [587] = {0xFCB534D4U, 0x00000002U}, /* RGIDSEC_MODID[587]:IPMMUDS015 */ + [588] = {0xFCB534D8U, 0x00000002U}, /* RGIDSEC_MODID[588]:IPMMUDS002 */ + [589] = {0xFCB534DCU, 0x00000002U}, /* RGIDSEC_MODID[589]:IPMMUDS003 */ + [590] = {0xFCB534E0U, 0x00000002U}, /* RGIDSEC_MODID[590]:IPMMUDS004 */ + [591] = {0xFCB534E4U, 0x00000002U}, /* RGIDSEC_MODID[591]:IPMMUDS005 */ + [592] = {0xFCB534ECU, 0x00000002U}, /* RGIDSEC_MODID[592]:IPMMUDS006 */ + [593] = {0xFCB534F0U, 0x00000002U}, /* RGIDSEC_MODID[593]:IPMMUDS007 */ + [594] = {0xFCB534F4U, 0x00000002U}, /* RGIDSEC_MODID[594]:SYDM1P */ + [595] = {0xFCB534F8U, 0x00000002U}, /* RGIDSEC_MODID[595]:IPMMUDS008 */ + [596] = {0xFCB534FCU, 0x00000002U}, /* RGIDSEC_MODID[596]:SYDM2P */ + [597] = {0xFCB53500U, 0x00000002U}, /* RGIDSEC_MODID[597]:IPMMUDS009 */ + [598] = {0xFCB53640U, 0x00000002U}, /* RGIDSEC_MODID[598]:SYDM100 */ + [599] = {0xFCB53644U, 0x00000002U}, /* RGIDSEC_MODID[599]:SYDM101 */ + [600] = {0xFCB53648U, 0x00000002U}, /* RGIDSEC_MODID[600]:SYDM110 */ + [601] = {0xFCB5364CU, 0x00000002U}, /* RGIDSEC_MODID[601]:SYDM111 */ + [602] = {0xFCB53650U, 0x00000002U}, /* RGIDSEC_MODID[602]:SYDM112 */ + [603] = {0xFCB53654U, 0x00000002U}, /* RGIDSEC_MODID[603]:SYDM113 */ + [604] = {0xFCB53658U, 0x00000002U}, /* RGIDSEC_MODID[604]:SYDM114 */ + [605] = {0xFCB5365CU, 0x00000002U}, /* RGIDSEC_MODID[605]:SYDM115 */ + [606] = {0xFCB53660U, 0x00000002U}, /* RGIDSEC_MODID[606]:SYDM102 */ + [607] = {0xFCB53664U, 0x00000002U}, /* RGIDSEC_MODID[607]:SYDM103 */ + [608] = {0xFCB53668U, 0x00000002U}, /* RGIDSEC_MODID[608]:SYDM104 */ + [609] = {0xFCB5366CU, 0x00000002U}, /* RGIDSEC_MODID[609]:SYDM105 */ + [610] = {0xFCB53670U, 0x00000002U}, /* RGIDSEC_MODID[610]:SYDM106 */ + [611] = {0xFCB53674U, 0x00000002U}, /* RGIDSEC_MODID[611]:SYDM107 */ + [612] = {0xFCB53678U, 0x00000002U}, /* RGIDSEC_MODID[612]:SYDM108 */ + [613] = {0xFCB5367CU, 0x00000002U}, /* RGIDSEC_MODID[613]:SYDM109 */ + [614] = {0xFCB53680U, 0x00000002U}, /* RGIDSEC_MODID[614]:SYDM200 */ + [615] = {0xFCB53684U, 0x00000002U}, /* RGIDSEC_MODID[615]:SYDM201 */ + [616] = {0xFCB53688U, 0x00000002U}, /* RGIDSEC_MODID[616]:SYDM210 */ + [617] = {0xFCB5368CU, 0x00000002U}, /* RGIDSEC_MODID[617]:SYDM211 */ + [618] = {0xFCB53690U, 0x00000002U}, /* RGIDSEC_MODID[618]:SYDM212 */ + [619] = {0xFCB53694U, 0x00000002U}, /* RGIDSEC_MODID[619]:SYDM213 */ + [620] = {0xFCB53698U, 0x00000002U}, /* RGIDSEC_MODID[620]:SYDM214 */ + [621] = {0xFCB5369CU, 0x00000002U}, /* RGIDSEC_MODID[621]:SYDM215 */ + [622] = {0xFCB536A0U, 0x00000002U}, /* RGIDSEC_MODID[622]:SYDM202 */ + [623] = {0xFCB536A4U, 0x00000002U}, /* RGIDSEC_MODID[623]:SYDM203 */ + [624] = {0xFCB536A8U, 0x00000002U}, /* RGIDSEC_MODID[624]:SYDM204 */ + [625] = {0xFCB536ACU, 0x00000002U}, /* RGIDSEC_MODID[625]:SYDM205 */ + [626] = {0xFCB536B0U, 0x00000002U}, /* RGIDSEC_MODID[626]:SYDM206 */ + [627] = {0xFCB536B4U, 0x00000002U}, /* RGIDSEC_MODID[627]:SYDM207 */ + [628] = {0xFCB536B8U, 0x00000002U}, /* RGIDSEC_MODID[628]:SYDM208 */ + [629] = {0xFCB536BCU, 0x00000002U}, /* RGIDSEC_MODID[629]:SYDM209 */ + [631] = {0xFDDB9624U, 0x00000001U}, /* RGIDSEC_MODID[630]:ARCC */ + [630] = {0xFDDB9638U, 0x00000001U}, /* RGIDSEC_MODID[631]:ARRTRAM */ + [632] = {0xFCB53424U, 0x00000002U}, /* RGIDSEC_MODID[632]:RSV0 */ +}; +/* Now go back to default rules */ +#pragma ghs section rodata=default + +/* T.B.D. */ +#pragma ghs section rodata=".rgid_axi_tbl" +const REGION_ID_SETTING_TABLE g_rgid_axi_tbl[] = { + [0] = {0xFD482010U, 0x0000003FU}, /* RGIDR_MODID[4]:ARRT01 */ + [1] = {0xFD482014U, 0x0000003FU}, /* RGIDR_MODID[5]:ARRT02 */ + [2] = {0xFDA02048U, 0x0000003FU}, /* RGIDR_MODID[45]:ARS01 */ + [3] = {0xFDA0204CU, 0x0000003FU}, /* RGIDR_MODID[46]:ARS02 */ + [4] = {0xFCB62028U, 0x0000003FU}, /* RGIDR_MODID[93]:ARSP31 */ + [5] = {0xFCB6202CU, 0x0000003FU}, /* RGIDR_MODID[94]:ARSP32 */ + [6] = {0xFCB92004U, 0x0000003FU}, /* RGIDR_MODID[106]:ARSP41 */ + [7] = {0xFCB92008U, 0x0000003FU}, /* RGIDR_MODID[107]:ARSP42 */ + [8] = {0xFCF82140U, 0x0000003FU}, /* RGIDR_MODID[210]:ARHC1 */ + [9] = {0xFCF82144U, 0x0000003FU}, /* RGIDR_MODID[211]:ARHC2 */ + [10] = {0xFDC22004U, 0x0000003FU}, /* RGIDR_MODID[226]:ARRC1 */ + [11] = {0xFDC22008U, 0x0000003FU}, /* RGIDR_MODID[227]:ARRC2 */ + [12] = {0xFD442060U, 0x0000003FU}, /* RGIDR_MODID[268]:ARRD1 */ + [13] = {0xFD442064U, 0x0000003FU}, /* RGIDR_MODID[269]:ARRD2 */ + [14] = {0xFD442084U, 0x0000003FU}, /* RGIDR_MODID[277]:ARRT1 */ + [15] = {0xFD442088U, 0x0000003FU}, /* RGIDR_MODID[278]:ARRT2 */ + [18] = {0xFF862004U, 0x0000003FU}, /* RGIDR_MODID[452]:ARSC1 */ + [19] = {0xFF862008U, 0x0000003FU}, /* RGIDR_MODID[453]:ARSC2 */ + [16] = {0xFF862028U, 0x0000003FU}, /* RGIDR_MODID[461]:ARSTM1 */ + [17] = {0xFF862038U, 0x0000003FU}, /* RGIDR_MODID[464]:ARSTM2 */ + [20] = {0xFDDC2004U, 0x0000003FU}, /* RGIDR_MODID[498]:AXIARNMM */ + [21] = {0xFDDC200CU, 0x0000003FU}, /* RGIDR_MODID[500]:ARSM1 */ + [22] = {0xFDDC2010U, 0x0000003FU}, /* RGIDR_MODID[501]:ARSM2 */ + [23] = {0xFCB52004U, 0x0000003FU}, /* RGIDR_MODID[540]:ARSD01 */ + [24] = {0xFCB52008U, 0x0000003FU}, /* RGIDR_MODID[541]:ARSD02 */ + [25] = {0xFCB5203CU, 0x0000003FU}, /* RGIDR_MODID[551]:ARSP01 */ + [26] = {0xFCB52040U, 0x0000003FU}, /* RGIDR_MODID[552]:ARSP02 */ + [27] = {0xFD482410U, 0x00000000U}, /* RGIDW_MODID[4]:ARRT01 */ + [28] = {0xFD482414U, 0x00000000U}, /* RGIDW_MODID[5]:ARRT02 */ + [29] = {0xFDA02448U, 0x00000000U}, /* RGIDW_MODID[45]:ARS01 */ + [30] = {0xFDA0244CU, 0x00000000U}, /* RGIDW_MODID[46]:ARS02 */ + [31] = {0xFCB62428U, 0x00000000U}, /* RGIDW_MODID[93]:ARSP31 */ + [32] = {0xFCB6242CU, 0x00000000U}, /* RGIDW_MODID[94]:ARSP32 */ + [33] = {0xFCB92404U, 0x00000000U}, /* RGIDW_MODID[106]:ARSP41 */ + [34] = {0xFCB92408U, 0x00000000U}, /* RGIDW_MODID[107]:ARSP42 */ + [35] = {0xFCF82540U, 0x00000000U}, /* RGIDW_MODID[210]:ARHC1 */ + [36] = {0xFCF82544U, 0x00000000U}, /* RGIDW_MODID[211]:ARHC2 */ + [37] = {0xFDC22404U, 0x00000000U}, /* RGIDW_MODID[226]:ARRC1 */ + [38] = {0xFDC22408U, 0x00000011U}, /* RGIDW_MODID[227]:ARRC2 */ + [39] = {0xFD442460U, 0x00000000U}, /* RGIDW_MODID[268]:ARRD1 */ + [40] = {0xFD442464U, 0x00000000U}, /* RGIDW_MODID[269]:ARRD2 */ + [41] = {0xFD442484U, 0x00000000U}, /* RGIDW_MODID[277]:ARRT1 */ + [42] = {0xFD442488U, 0x00000000U}, /* RGIDW_MODID[278]:ARRT2 */ + [45] = {0xFF862404U, 0x00000000U}, /* RGIDW_MODID[452]:ARSC1 */ + [46] = {0xFF862408U, 0x00000000U}, /* RGIDW_MODID[453]:ARSC2 */ + [43] = {0xFF862428U, 0x00000000U}, /* RGIDW_MODID[461]:ARSTM1 */ + [44] = {0xFF862438U, 0x00000000U}, /* RGIDW_MODID[464]:ARSTM2 */ + [47] = {0xFDDC2404U, 0x00000000U}, /* RGIDW_MODID[498]:AXIARNMM */ + [48] = {0xFDDC240CU, 0x00000000U}, /* RGIDW_MODID[500]:ARSM1 */ + [49] = {0xFDDC2410U, 0x00000000U}, /* RGIDW_MODID[501]:ARSM2 */ + [50] = {0xFCB52404U, 0x00000000U}, /* RGIDW_MODID[540]:ARSD01 */ + [51] = {0xFCB52408U, 0x00000000U}, /* RGIDW_MODID[541]:ARSD02 */ + [52] = {0xFCB5243CU, 0x00000000U}, /* RGIDW_MODID[551]:ARSP01 */ + [53] = {0xFCB52440U, 0x00000000U}, /* RGIDW_MODID[552]:ARSP02 */ +}; + +/* Now go back to default rules */ +#pragma ghs section rodata=default + +const uint32_t g_rgid_rtdma_setting_value[RTDMA_MODULE_MAX][RTDMA_CH_MAX][2U] = { + {/* Module0 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + }, + {/* Module1 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + }, + {/* Module2 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + }, + {/* Module3 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {RTDMA_EN, RGID_1}, /* CH0 */ + [1] = {RTDMA_EN, RGID_1}, /* CH1 */ + [2] = {RTDMA_EN, RGID_1}, /* CH2 */ + [3] = {RTDMA_EN, RGID_1}, /* CH3 */ + [4] = {RTDMA_EN, RGID_1}, /* CH4 */ + [5] = {RTDMA_EN, RGID_1}, /* CH5 */ + [6] = {RTDMA_EN, RGID_1}, /* CH6 */ + [7] = {RTDMA_EN, RGID_1}, /* CH7 */ + [8] = {RTDMA_EN, RGID_1}, /* CH8 */ + [9] = {RTDMA_EN, RGID_1}, /* CH9 */ + [10] = {RTDMA_EN, RGID_1}, /* CH10 */ + [11] = {RTDMA_EN, RGID_1}, /* CH11 */ + [12] = {RTDMA_EN, RGID_1}, /* CH12 */ + [13] = {RTDMA_EN, RGID_1}, /* CH13 */ + [14] = {RTDMA_EN, RGID_1}, /* CH14 */ + [15] = {RTDMA_EN, RGID_1} /* CH15 */ + } +}; + +const uint32_t g_rgid_sysdma_setting_value[SYSDMA_MODULE_MAX][SYSDMA_CH_MAX][2U] = { + {/* Module0 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {SYSDMA_EN, RGID_2}, /* CH0 */ + [1] = {SYSDMA_EN, RGID_2}, /* CH1 */ + [2] = {SYSDMA_EN, RGID_2}, /* CH2 */ + [3] = {SYSDMA_EN, RGID_2}, /* CH3 */ + [4] = {SYSDMA_EN, RGID_2}, /* CH4 */ + [5] = {SYSDMA_EN, RGID_2}, /* CH5 */ + [6] = {SYSDMA_EN, RGID_2}, /* CH6 */ + [7] = {SYSDMA_EN, RGID_2}, /* CH7 */ + [8] = {SYSDMA_EN, RGID_2}, /* CH8 */ + [9] = {SYSDMA_EN, RGID_2}, /* CH9 */ + [10] = {SYSDMA_EN, RGID_2}, /* CH10 */ + [11] = {SYSDMA_EN, RGID_2}, /* CH11 */ + [12] = {SYSDMA_EN, RGID_2}, /* CH12 */ + [13] = {SYSDMA_EN, RGID_2}, /* CH13 */ + [14] = {SYSDMA_EN, RGID_2}, /* CH14 */ + [15] = {SYSDMA_EN, RGID_2} /* CH15 */ + }, + {/* Module1 */ + /* | RGIDMEN | RGID(Master) | */ + [0] = {SYSDMA_EN, RGID_2}, /* CH0 */ + [1] = {SYSDMA_EN, RGID_2}, /* CH1 */ + [2] = {SYSDMA_EN, RGID_2}, /* CH2 */ + [3] = {SYSDMA_EN, RGID_2}, /* CH3 */ + [4] = {SYSDMA_EN, RGID_2}, /* CH4 */ + [5] = {SYSDMA_EN, RGID_2}, /* CH5 */ + [6] = {SYSDMA_EN, RGID_2}, /* CH6 */ + [7] = {SYSDMA_EN, RGID_2}, /* CH7 */ + [8] = {SYSDMA_EN, RGID_2}, /* CH8 */ + [9] = {SYSDMA_EN, RGID_2}, /* CH9 */ + [10] = {SYSDMA_EN, RGID_2}, /* CH10 */ + [11] = {SYSDMA_EN, RGID_2}, /* CH11 */ + [12] = {SYSDMA_EN, RGID_2}, /* CH12 */ + [13] = {SYSDMA_EN, RGID_2}, /* CH13 */ + [14] = {SYSDMA_EN, RGID_2}, /* CH14 */ + [15] = {SYSDMA_EN, RGID_2} /* CH15 */ + }, +}; + +/* When V4H, this table is used as RT-VRAM0. */ +const RTRAM_PROTECTION_STRUCTUR g_rtsram_protection_table[RAM_PROTECTION_MAX] = { + /* address READ Write */ + [RTSRAM_ICUMX_IPL_AREA] = {NOT_USED_VALUE, {0x0000FFCAU, 0x0000FFEEU}}, /* not used for address value */ + [RTSRAM_ICUMX_FW_AREA] = {0xEB240000U, {0x0004FFEEU, 0x0004FFEEU}}, + [2] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [3] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {RTSRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +/* this table is temporary setting for RT-VRAM protection */ +const RTRAM_PROTECTION_STRUCTUR g_rtvram1_protection_table_1[RAM_PROTECTION_MAX] = { + /* address READ Write */ + [RTVRAM_BLANK_AREA] = {NOT_USED_VALUE, {0x0000FFF8U, 0x0000FFF8U}}, /* not used for address value */ + [RTVRAM_EXTEND_CACHE_AREA] = {0xE2010000U, {0x0000BFF8U, 0x0000BFF8U}}, + [RTVRAM_RTOS_AREA] = {0xE2100000U, {0x0000FFD9U, 0x0000FFD9U}}, + [3] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +/* this table is finaly setting for RT-VRAM protection */ +const RTRAM_PROTECTION_STRUCTUR g_rtvram1_protection_table_2[RAM_PROTECTION_MAX] = { + /* address READ Write */ + [RTVRAM_BLANK_AREA] = {NOT_USED_VALUE, {0x0000FFF8U, 0x0000FFF8U}}, /* not used for address value */ + [RTVRAM_EXTEND_CACHE_AREA] = {0xE2010000U, {0x0000BFFFU, 0x0000BFFFU}}, + [RTVRAM_RTOS_AREA] = {0xE2100000U, {0x0000FFD9U, 0x0000FFD9U}}, + [3] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {RTVRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +const SYSTEM_RAM_PROTECTION_STRUCTUR g_system_ram_protection_table[RAM_PROTECTION_MAX] = { + /* access Secure */ + /* address R | W R|W */ + [SYSTEM_RAM_ALL] = {NOT_USED_VALUE, {0xFFD0FFD0U, 0x00000000U}}, /* not used for address value */ + [1] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [2] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [3] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [4] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {SYSTEM_RAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; + +const DRAM_PROTECTION_STRUCTUR g_dram_protection_table[DRAM_PROTECTION_MAX] = { + /* access secure */ + /* address R | W R|W */ + [RTVRAM_EXTEND_AREA] = {NOT_USED_VALUE, {0xBFFFBFFFU, 0x00000000U}}, /* not used for address value */ + [SDRAM_BLANK_AREA] = {0x0401C00000U, {0xFFC0FFC0U, 0x00000000U}}, + [SDRAM_PROTECT_AREA] = {0x0406400000U, {0xFFC8FFC8U, 0x00000000U}}, + [SDRAM_PUBLIC_AREA] = {0x0407E00000U, {0xFFC0FFC0U, 0x00000000U}}, + [4] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [5] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [6] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [7] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [8] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [9] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [10] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [11] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [12] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [13] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [14] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [15] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [16] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [17] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [18] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [19] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [20] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [21] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [22] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [23] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [24] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [25] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [26] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [27] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [28] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [29] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [30] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [31] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [32] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [33] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [34] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [35] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [36] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [37] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [38] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [39] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [40] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [41] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [42] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [43] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [44] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [45] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [46] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [47] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [48] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [49] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [50] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [51] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [52] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [53] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [54] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [55] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [56] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [57] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [58] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [59] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [60] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [61] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [62] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, + [63] = {DRAM_ADDR_END, {0x00000000U, 0x00000000U}}, +}; diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4h.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cnf_tbl/cnf_tbl_v4m.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/log.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/log.c new file mode 100644 index 00000000..bf46cab3 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/log.c @@ -0,0 +1,100 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Log driver + ******************************************************************************/ +/****************************************************************************** + * @file log.c + * - Version : 0.03 + * @brief Log driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 06.01.2022 0.02 Static analysis support + * : 04,04,2023 0.03 Fixed to not use the standard input/output + * library when LOG_LEVEL=0. + *****************************************************************************/ + +#include +#include +#include + +#if LOG_LEVEL >= LOG_ERROR +#include + +#define VSPRINTF_OK (0) + +void local_printf(const char *fmt, ...) +{ + va_list ap; + static char s_buffer[1024]; + int32_t num; + uint32_t loop; + + /* Convert all arguments to one string */ + va_start(ap, fmt); + num = vsprintf(s_buffer, fmt, ap); + va_end(ap); + + /* String output */ + if (VSPRINTF_OK <= num) + { + for (loop = 0U; loop < num; loop++) + { + (void)console_putc((uint8_t)s_buffer[loop]); + /* If the outputted character is LF, output CR */ + if (s_buffer[loop] == 0x0A) /* \n */ + { + (void)console_putc((uint8_t)'\r'); + } + } + } + else + { + while(1) + { + /* loop due to error detection. */ + } + } +} +/* End of function local_printf(const char *fmt, ...) */ +#endif + +void panic_printf(const char *str) +{ + const uint8_t *p = (const uint8_t *)str; + + /* Output one character at a time until the data in the argument is null-terminated string. */ + while(*p != (uint8_t)'\0') + { + (void)console_putc(*p); + p++; + } + /* output character is CR and LF */ + (void)console_putc((uint8_t)'\r'); + (void)console_putc((uint8_t)'\n'); +} +/* End of function panic_printf(const char *str) */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/scif.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/log/scif.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/timer/micro_wait.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/timer/micro_wait.c new file mode 100644 index 00000000..8aaaff58 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/common/timer/micro_wait.c @@ -0,0 +1,109 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Time wait driver + ******************************************************************************/ +/****************************************************************************** + * @file micro_wait.c + * - Version : 0.03 + * @brief Wait of micro second + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 15.10.2021 0.02 modify register access to read modify write. + * : 03.12.2021 0.03 fix incorrect configuration process. + *****************************************************************************/ + +#include +#include +#include + +/************************************************************************************************/ +/* Definitions */ +/************************************************************************************************/ + +#define INTICUOSTM0 (0xFFFEEA14U) +#define INTCR_RF ((uint16_t)1U << 12U) +#define INTCR_RF_NO_REQ ((uint16_t)0U << 12U) + +#define OSTM0_BASE (0xFFFEE000U) +#define OSTM0CMP (OSTM0_BASE) +#define OSTM0TS (OSTM0_BASE + 0x0014U) +#define OSTM0TT (OSTM0_BASE + 0x0018U) +#define OSTM0CTL (OSTM0_BASE + 0x0020U) + +#define OSTM0TS_TS (uint8_t)(0x01U) /* b0:1: Start */ +#define OSTM0TT_TT (uint8_t)(0x01U) /* b0:1: Stop */ +#define OSTM0CMP_MICRO_VALUE (0x00000190U) /* PCLK=400MHz(400=0x190 = 1us) */ + +#define OSTM0CTL_MD10 (uint8_t)(0x02U) /* b1:1: Free-run compare mode(Start:0 Counting Direction:up) */ + /* b0:0: Interrupts when counting starts are enabled */ + +#define MAX_MICRO_WAIT (10737418U) /* 0xFFFFFFFF / 400 */ + +void micro_wait(uint32_t count_us) +{ + uint32_t val; + uint16_t reg16; + uint8_t reg8; + + if (count_us != 0U) + { + /* When the timer count is an argument that exceeds 0xFFFFFFFF */ + if(MAX_MICRO_WAIT < count_us) + { + count_us = MAX_MICRO_WAIT; + } + val = count_us * OSTM0CMP_MICRO_VALUE; + /* timer start */ + reg8 = mem_read8(OSTM0TT); + reg8 |= OSTM0TT_TT; + mem_write8(OSTM0TT, reg8); + mem_write32(OSTM0CMP, val); + reg8 = mem_read8(OSTM0CTL); + reg8 |= OSTM0CTL_MD10; + mem_write8(OSTM0CTL, reg8); + reg8 = mem_read8(OSTM0TS); + reg8 |= OSTM0TS_TS; + mem_write8(OSTM0TS, reg8); + + while (1) + { + reg16 = mem_read16(INTICUOSTM0); + if ((reg16 & (INTCR_RF)) != INTCR_RF_NO_REQ) + { + /* timer stop */ + reg16 = (reg16 & (uint16_t)(~(INTCR_RF))); + mem_write16(INTICUOSTM0, reg16); + reg8 = mem_read8(OSTM0TT); + reg8 |= OSTM0TT_TT; + mem_write8(OSTM0TT, reg8); + break; + } + } + } +} +/* End of function micro_wait(uint32_t count_us) */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cpu_on/cpu_on.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cpu_on/cpu_on.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cpu_on/cpu_on.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/cpu_on/cpu_on.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_emmc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_emmc.c new file mode 100644 index 00000000..45366b79 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_emmc.c @@ -0,0 +1,145 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load for emmc function + ******************************************************************************/ +/****************************************************************************** + * @file image_load_emmc.c + * - Version : 0.04 + * @brief Image load for emmc function. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 30.09.2021 0.01 First Release + * : 23.05.2022 0.02 Support for updating the memory map. + * : 05.08.2022 0.03 Add load_ver_tbl_cert_for_emmc function. + * : 30.09.2022 0.04 Modify size output in + * load_ver_tbl_cert_for_emmc function. + *****************************************************************************/ + +/* indelude */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void load_ver_tbl_cert_for_emmc(void); + +uint32_t load_content_cert_for_emmc(void) +{ + uint32_t load_num; + uint32_t phys_dst; + uint32_t phys_src; + uint32_t size; + uint32_t part; + + /* source address.(0x00240000/sector:0x1200) */ + phys_src = EMMC_CONTENT_CERT_SECTOR_NUMBER; + /* Get physical address of transfer destination. */ + phys_dst = remap_get_phys_addr(SA9_DEST_ADDR); + /* transfer size(number of secters) */ + size = CONTENT_CERT_INFO_SIZE >> EMMC_SECTOR_SIZE_SHIFT; + /* The partition that contains A. */ + part = (uint32_t)PARTITION_ID_BOOT_1; + + /* Load content cert header */ + (void)emmc_trans_data(part, phys_src, phys_dst, size); + + NOTICE( + "======== content cert info ========\n" + "destination address:0x%08x\n" + "physical destination address:0x%08x\n" + "source address:(p:%d)0x%08x\n" + "size:0x%08x\n", SA9_DEST_ADDR, phys_dst, + PARTITION_ID_BOOT_1, EMMC_CONTENT_CERT_ADDR, CONTENT_CERT_INFO_SIZE); + + load_num = mem_read32(SA9_DEST_ADDR); + + /* Check number of image load. + In case of number of image load is 0, error of transfer parameter. + In case of number of image loads is higher than 8, + the transfer parameter error. */ + if ((load_num == 0U) || (load_num > CA_MAX_IMAGE)) + { + ERROR("Content cert info 'load image num' fault.\n"); + ERROR("load image num = %d\n",load_num); + panic; + } + + /* Increase forwarding address by the size of cert header */ + phys_src += (CONTENT_CERT_INFO_SIZE >> EMMC_SECTOR_SIZE_SHIFT); + phys_dst += CONTENT_CERT_INFO_SIZE; + + /* Transfer size calculation for SA9 * + * TFMV key + NTFMV key + minimum version table + (content cert * number of loads) */ + size = ((KEY_CERT_SIZE * 2U) + MIN_VER_TBL_SIZE + + ((NUM_OF_ALWAYS_LOAD_CERT + load_num) * CONTENT_CERT_SIZE)); + + (void)emmc_trans_data(part, phys_src, phys_dst, size >> EMMC_SECTOR_SIZE_SHIFT); + + NOTICE( + "======== content cert ========\n" + "address:0x%08x size:0x%08x\n", phys_dst, size); + + /* Load content cert of Software minimum version table */ + load_ver_tbl_cert_for_emmc(); + + return load_num; +} +/* End of function load_content_cert_for_emmc(void) */ + +static void load_ver_tbl_cert_for_emmc(void) +{ +#if (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) + uint32_t phys_dst; + uint32_t phys_src; + uint32_t size; + uint32_t part; + + /* source address.(0x0024D000/sector:0x1268) */ + phys_src = EMMC_VER_TBL_CNT_CERT_SEC_NUM; + /* Get physical address of transfer destination. */ + phys_dst = remap_get_phys_addr(SA9_DEST_ADDR + EMMC_VER_TBL_OFFSET); + /* transfer size(number of secters) */ + size = (CONTENT_CERT_SIZE * 2U) >> EMMC_SECTOR_SIZE_SHIFT; + /* The partition that contains content cert of Software minimum version table. */ + part = (uint32_t)PARTITION_ID_BOOT_1; + + /* Load content cert of Software minimum version table */ + (void)emmc_trans_data(part, phys_src, phys_dst, size); + + NOTICE("======== content cert of SW version table ========\n" + "address:0x%08x size:0x%08x\n", phys_dst, (size << EMMC_SECTOR_SIZE_SHIFT)); + +#endif /* (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) */ +} +/* End of function load_ver_tbl_cert_for_emmc(void) */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_flash.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_flash.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_flash.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/image_load/image_load_flash.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/access_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/access_protection.h new file mode 100644 index 00000000..9d5f08ce --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/access_protection.h @@ -0,0 +1,53 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Access Protection function header + ******************************************************************************/ + +#include + +#ifndef ACCESS_PROTECTION_ID_H__ +#define ACCESS_PROTECTION_ID_H__ + +#define PROTECTION_DISABLE (0U) +#define PROTECTION_ENABLE (1U) + +#define RGID_0 (0U) +#define RGID_1 (1U) +#define RGID_2 (2U) +#define RGID_INVALID (0xFFFFFFFFU) + +#define CPG_PROTECTION (63U) +#define SYSC_PROTECTION (5U) +#define RESET_PROTECTION (29U) +#define WRITE_ENABLE (0xFFFFFFFFU) + +void rgid_protection(void); +void ram_protection(void); +void rgid_protection_final(void); +void ram_protection_final(void); +void set_master_rgid_4_tfr_mod(void); +void icu_remove_write_access(void); + +#endif /* ACCESS_PROTECTION_ID_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ap_system_core_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ap_system_core_register.h new file mode 100644 index 00000000..01fa5d5d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ap_system_core_register.h @@ -0,0 +1,43 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : AP-System Core register header + ******************************************************************************/ + +#ifndef AP_SYSTEM_CORE_REGISTER_H_ +#define AP_SYSTEM_CORE_REGISTER_H_ + +#include + +#define AP_CORE_BASE (BASE_AP_CORE_ADDR) /* 0xE6280000 */ + +#define AP_CORE_APSREG_CCI500_AUX (AP_CORE_BASE + 0x00009010U) +#define AP_CORE_APSREG_P_CCI500_AUX (AP_CORE_BASE + 0x00029010U) + +static inline uint32_t ap_core_get_ap_cluster_n_aux0_addr(uint32_t num) +{ + return (AP_CORE_BASE + 0x00000010U + (num * 0x1000U)); +} + +#endif /* AP_SYSTEM_CORE_REGISTER_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/avs.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/avs.h new file mode 100644 index 00000000..cc5bfeae --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/avs.h @@ -0,0 +1,34 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : AVS driver header + ******************************************************************************/ + +#ifndef AVS_DRIVER_H__ +#define AVS_DRIVER_H__ + +void avs_low_power_mode_setting(void); + +#endif /* AVS_DRIVER_H__ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/axmm_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/axmm_register.h new file mode 100644 index 00000000..8cc39fe6 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/axmm_register.h @@ -0,0 +1,82 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : AXMM register header + ******************************************************************************/ + +#ifndef AXMM_REGISTER_H__ +#define AXMM_REGISTER_H__ + +#include +#include + +/* RT-SRAM register base address */ +#define AXMM_BASE (BASE_AXMM_ADDR) + +#define AXMM_DPTDIVCR (AXMM_BASE + 0x6000U) +#define AXMM_DPTRGNCR (AXMM_BASE + 0x6100U) +#define AXMM_DPTSECCR (AXMM_BASE + 0x6200U) +#define AXMM_SPTDIVCR (AXMM_BASE + 0x6300U) +#define AXMM_SPTRGNCR (AXMM_BASE + 0x6400U) +#define AXMM_SPTSECCR (AXMM_BASE + 0x6500U) + + +#define AXMM_DPTDIVCR_DIVADDR_MASK (0x003FFFFFU) +#define AXMM_DPTSECCR_SECGRP_MASK (0x00000F00U) +#define AXMM_DPTSECCR_SECGWP_MASK (0x0000000FU) +#define AXMM_SPTDIVCR_DIVADDR_MASK (0x000FFFFFU) +#define AXMM_SPTSECCR_SECGRP_MASK (0x00000F00U) +#define AXMM_SPTSECCR_SECGWP_MASK (0x0000000FU) + +static inline uint32_t get_dptdivcr_addr(uint32_t num) +{ + return ((AXMM_DPTDIVCR + (num * 4U))); +} + +static inline uint32_t get_dptrgncr_addr(uint32_t num) +{ + return ((AXMM_DPTRGNCR + (num * 4U))); +} + +static inline uint32_t get_dptseccr_addr(uint32_t num) +{ + return ((AXMM_DPTSECCR + (num * 4U))); +} + +static inline uint32_t get_sptdivcr_addr(uint32_t num) +{ + return ((AXMM_SPTDIVCR + (num * 4U))); +} + +static inline uint32_t get_sptrgncr_addr(uint32_t num) +{ + return ((AXMM_SPTRGNCR + (num * 4U))); +} + +static inline uint32_t get_sptseccr_addr(uint32_t num) +{ + return ((AXMM_SPTSECCR + (num * 4U))); +} + +#endif /* AXMM_REGISTER_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cnf_tbl.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cnf_tbl.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cnf_tbl.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cnf_tbl.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg.h new file mode 100644 index 00000000..254f41d7 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg.h @@ -0,0 +1,57 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : CPG driver header + ******************************************************************************/ +#ifndef CPG_H_ +#define CPG_H_ + +#include +#include +#include + +#define RPC_CLK_160MHZ (0x00000013U) /* RPCphi = 160MHz RPCD2phi = 80MHZ */ + +/* Prototype */ +void cpg_init(void); + +/* Inline function */ +static inline void cpg_reg_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t data) +{ + mem_write32(CPG_CPGWPR, ~data); + mem_write32(mstpcr, data); + while ((mem_read32(mstpsr) & ~(uint32_t)(data)) != 0U) + { + /* Loop to wait for confirmation that changes to "MSTPCRn" are reflected in "MSTPSRn". */ + } +} + +/* Inline function */ +static inline void apmu_reg_write(uint32_t reg, uint32_t data) +{ + mem_write32(APMU_WPR, ~data); + mem_write32(reg, data); +} + +#endif /* CPG_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpg_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu.h new file mode 100644 index 00000000..51275cb9 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu.h @@ -0,0 +1,103 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : CPU register access list header + ******************************************************************************/ + + +#ifndef CPU_H_ +#define CPU_H_ + +/* + * Groups + */ + +/* Name Reg, Group Comment */ +#define EIPC 0, 0 /* Status save registers when acknowledging EI level exception SV */ +#define EIPSW 1, 0 /* Status save registers when acknowledging EI level exception SV */ +#define FEPC 2, 0 /* Status save registers when acknowledging FE level exception SV */ +#define FEPSW 3, 0 /* Status save registers when acknowledging FE level exception SV */ +#define PSW 5, 0 /* Program status word Note 1 */ +#define EIIC 13, 0 /* EI level exception cause SV */ +#define FEIC 14, 0 /* FE level exception cause SV */ +#define CTPC 16, 0 /* CALLT execution status save register UM */ +#define CTPSW 17, 0 /* CALLT execution status save register UM */ +#define CTBP 20, 0 /* CALLT base pointer UM */ +#define EIWR 28, 0 /* EI level exception working register SV */ +#define FEWR 29, 0 /* FE level exception working register SV */ +#define BSEL 31, 0 /* (Reserved for backward compatibility with V850E2 series)Note 2 SV */ + +#define MCFG0 0, 1 /* Machine configuration SV */ +#define RBASE 2, 1 /* Reset vector base address SV */ +#define EBASE 3, 1 /* Exception handler vector address SV */ +#define INTBP 4, 1 /* Base address of the interrupt handler table SV */ +#define MCTL 5, 1 /* CPU control SV */ +#define PID 6, 1 /* Processor ID SV */ +#define SCCFG 11, 1 /* SYSCALL operation setting SV */ +#define SCBP 12, 1 /* SYSCALL base pointer SV */ + +#define HTCFG0 0, 2 /* Thread configuration SV */ +#define MEA 6, 2 /* Memory error address SV */ +#define ASID 7, 2 /* Address space ID SV */ +#define MEI 8, 2 /* Memory error information SV */ +#define ISPR 10, 2 /* Priority of interrupt being serviced SV */ +#define PMR 11, 2 /* Interrupt priority masking SV */ +#define ICSR 12, 2 /* Interrupt control status SV */ +#define INTCFG 13, 2 /* Interrupt function setting SV */ + +#define MPM 0, 5 /* Memory protection operation mode setting SV */ +#define MPRC 1, 5 /* MPU region control SV */ +#define MPBRGN 4, 5 /* MPU base region number SV */ +#define MPTRGN 5, 5 /* MPU end region number SV */ +#define MCA 8, 5 /* Memory protection setting check address SV */ +#define MCS 9, 5 /* Memory protection setting check size SV */ +#define MCC 10, 5 /* Memory protection setting check command SV */ +#define MCR 11, 5 /* Memory protection setting check result SV */ + +#define MPLA0 0, 6 /* Protection area minimum address SV */ +#define MPUA0 1, 6 /* Protection area maximum address SV */ +#define MPAT0 2, 6 /* Protection area attribute SV */ +#define MPLA1 4, 6 /* Protection area minimum address SV */ +#define MPUA1 5, 6 /* Protection area maximum address SV */ +#define MPAT1 6, 6 /* Protection area attribute SV */ +#define MPLA2 8, 6 /* Lower address of the protection area SV */ +#define MPUA2 9, 6 /* Protection area maximum address SV */ +#define MPAT2 10, 6 /* Protection area attribute SV */ +#define MPLA3 12, 6 /* Protection area minimum address SV */ +#define MPUA3 13, 6 /* Protection area maximum address SV */ +#define MPAT3 14, 6 /* Protection area attribute SV */ +#define MPLA4 16, 6 /* Protection area minimum address SV */ +#define MPUA4 17, 6 /* Protection area maximum address SV */ +#define MPAT4 18, 6 /* Protection area attribute SV */ +#define MPLA5 20, 6 /* Protection area minimum address SV */ +#define MPUA5 21, 6 /* Protection area maximum address SV */ +#define MPAT5 22, 6 /* Protection area attribute SV */ +#define MPLA6 24, 6 /* Protection area minimum address SV */ +#define MPUA6 25, 6 /* Protection area maximum address SV */ +#define MPAT6 26, 6 /* Protection area attribute SV */ +#define MLUA7 28, 6 /* Protection area minimum address SV */ +#define MPUA7 29, 6 /* Protection area maximum address SV */ +#define MPAT7 30, 6 /* Protection area attribute SV */ + +#endif /* CPU_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu_on.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu_on.h new file mode 100644 index 00000000..754113ec --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/cpu_on.h @@ -0,0 +1,62 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Power management driver header + ******************************************************************************/ + +#ifndef CPU_ON_H__ +#define CPU_ON_H__ +#include "remap_register.h" + +#define RCAR_PWR_TARGET_CR (0U) +#define RCAR_PWR_TARGET_CA (1U) + +#define AP_CORE_APSREG_AP_CLUSTER_N_AUX0_ACTDIS1 (0x00000001U << 1U) +#define AP_CORE_APSREG_AP_CLUSTER_N_AUX0_ACTDIS0 (0x00000001U << 0U) +#define AP_CORE_APSREG_CCI500_AUX_ACTDIS (0x00000001U << 0U) +#define AP_CORE_APSREG_AP_CLUSTER_N_AUX0_INIT (AP_CORE_APSREG_AP_CLUSTER_N_AUX0_ACTDIS1 | AP_CORE_APSREG_AP_CLUSTER_N_AUX0_ACTDIS0) + + +#define OTP_MEM_1_BASE (BASE_OTP_MEM_ADDR) +#define OTP_MEM_OTPMONITOR17 (OTP_MEM_1_BASE + 0x0144U) +#define OTP_MEM_PRODUCT_MASK (0x000000FFU) + +#if (RCAR_LSI == RCAR_V4H) +#define VARIANT_V4H_7 (0x00U) +#define VARIANT_V4H_5 (0x01U) +#define VARIANT_V4H_3 (0x02U) +#elif (RCAR_LSI == RCAR_V4M) +#define VARIANT_V4M_7 (0x00U) +#define VARIANT_V4M_5 (0x01U) +#define VARIANT_V4M_3 (0x02U) +#define VARIANT_V4M_2 (0x04U) +#endif /* RCAR_LSI == RCAR_V4H */ + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ +void arm_cpu_on(uint32_t target, uint32_t boot_addr); +void adj_cr_variant_freq(void); + +#endif /* CPU_ON_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma_register.h new file mode 100644 index 00000000..bd064231 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/dma_register.h @@ -0,0 +1,154 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : DMA register header + ******************************************************************************/ + +#ifndef DMA_REGISTER_H_ +#define DMA_REGISTER_H_ + +#include +#include + +#define DMACH (0U) /* The range of DMA ch is 0-15. */ + +#if ((RCAR_LSI == RCAR_S4) || (RCAR_LSI == RCAR_V4H)) +#define RTDMA_MODULE_MAX (4U) +#define RTDMA_CH_MAX (16U) +#define SYSDMA_MODULE_MAX (2U) +#define SYSDMA_CH_MAX (16U) +#elif (RCAR_LSI == RCAR_V4M) +#define RTDMA_MODULE_MAX (2U) +#define RTDMA_CH_MAX (16U) +#define SYSDMA_MODULE_MAX (2U) +#define SYSDMA_CH_MAX (16U) +#endif + +/* RT-DMA Control */ +#define RTDMACTL_BASE (BASE_RTDMACTL_ADDR) + +#define RTDMA_DMOR (RTDMACTL_BASE + 0x0060U) /* DMA operation register */ + +/* RT-DMAC0(for RPC) */ +#define RTDMA0_BASE (BASE_RTDMA0_ADDR) +#define RTDMA1_BASE (RTDMA0_BASE + 0x00010000U) +#define RTDMA2_BASE (RTDMA0_BASE + 0x00160000U) +#define RTDMA3_BASE (RTDMA0_BASE + 0x00170000U) +/* SYSDMAC */ +#define SYSDMA0_BASE (BASE_DMA_ADDR) +#define SYSDMA1_BASE (SYSDMA0_BASE + 0x00010000U) + +#define RTDMA_DMSEC (RTDMA0_BASE + 0x00B0U) + +#define DMA_REGIONID_MASK (0x0000000FU) + + +static inline uint32_t dma_get_rtdma_sar_addr(uint32_t num) +{ + return (RTDMA0_BASE + 0x0000U + (num * 0x1000U)); +} + +static inline uint32_t dma_get_rtdma_dar_addr(uint32_t num) +{ + return (RTDMA0_BASE + 0x0004U + (num * 0x1000U)); +} + +static inline uint32_t dma_get_rtdma_tcr_addr(uint32_t num) +{ + return (RTDMA0_BASE + 0x0008U + (num * 0x1000U)); +} + +static inline uint32_t dma_get_rtdma_chcr_addr(uint32_t num) +{ + return (RTDMA0_BASE + 0x000CU + (num * 0x1000U)); +} + +static inline uint32_t dma_get_rtdma_module_base_addr(uint32_t module) +{ + uint32_t ret; + + if(module == 0U) + { + ret = RTDMA0_BASE; + } + else if(module == 1U) + { + ret = RTDMA1_BASE; + } +#if ((RCAR_LSI == RCAR_S4) || (RCAR_LSI == RCAR_V4H)) + else if(module ==2U) + { + ret = RTDMA2_BASE; + } + else if(module == 3U) + { + ret = RTDMA3_BASE; + } +#endif /* ((RCAR_LSI == RCAR_S4) || (RCAR_LSI == RCAR_V4H)) */ + else + { + ERROR("Invalid DMA module value!\n"); + panic; + } + return ret; +} + +static inline uint32_t dma_get_rtdma_regionid_addr(uint32_t module, uint32_t ch) +{ + uint32_t base; + base = dma_get_rtdma_module_base_addr(module); + + return (base + 0x0078U + (ch * 0x1000U)); +} + +static inline uint32_t dma_get_sysdma_module_base_addr(uint32_t module) +{ + uint32_t ret; + + if(module == 0U) + { + ret = SYSDMA0_BASE; + } + else if(module == 1U) + { + ret = SYSDMA1_BASE; + } + else + { + ERROR("Invalid DMA module value!\n"); + panic; + } + + return ret; +} + +static inline uint32_t dma_get_sysdma_regionid_addr(uint32_t module, uint32_t ch) +{ + uint32_t base; + base = dma_get_sysdma_module_base_addr(module); + + return (base + 0x0078U + (ch * 0x1000U)); +} + +#endif /* DMAREGISTER_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_boot.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_boot.h new file mode 100644 index 00000000..437c50c6 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_boot.h @@ -0,0 +1,41 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC boot header + ******************************************************************************/ + +#ifndef EMMC_BOOT_ +#define EMMC_BOOT_ + +#include + +#define FLASH_BOOT (0U) +#define EMMC_BOOT (1U) + +#define CA_IPL (0U) +#define BL31 (1U) + +void emmc_initialize( void ); + +#endif /* EMMC_BOOT_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_config.h new file mode 100644 index 00000000..847fe7e2 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_config.h @@ -0,0 +1,82 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC Config header + ******************************************************************************/ + +#ifndef EMMC_CONFIG_H__ +#define EMMC_CONFIG_H__ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include "cpg_register.h" +#include "pfc_register.h" +#include "cpg.h" +#include "pfc.h" + +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + +/* MMC driver config */ +#define EMMC_RCA (1U) /* RCA */ +#define EMMC_RW_DATA_TIMEOUT (0x40U) /* 314ms (freq = 400KHz, timeout Counter = 0x04(SDCLK * 2^17) */ +#define EMMC_CMD_MAX (60U) /* Don't change. */ + +/* etc */ +#define LOADIMAGE_FLAGS_DMA_ENABLE (0x00000001U) + +/* Module stop */ +#define CPG_MSTPCR_SDHI (1U << 6U) + +/* clock */ +#define CPG_SD0CKCR0_STP0HCK (1U << 9U) +#define CPG_SD0CKCR0_SDSRCFC_MASK (7U << 2U) +#define CPG_SD0CKCR0_SDSRCFC_000 (0U << 2U) +#define CPG_SD0CKCR0_SDSRCFC_010 (2U << 2U) +#define CPG_SD0CKCR0_SD0FC_MASK (3U << 0U) +#define CPG_SD0CKCR0_SD0FC_DIV2 (0U << 0U) +#define CPG_SD0CKCR0_SD0FC_DIV4 (1U << 0U) +#define CPG_SD0CKCR0_100MHZ (CPG_SD0CKCR0_STP0HCK | CPG_SD0CKCR0_SDSRCFC_010 | CPG_SD0CKCR0_SD0FC_DIV2) +#define CPG_SD0CKCR0_200MHZ (CPG_SD0CKCR0_STP0HCK | CPG_SD0CKCR0_SDSRCFC_000 | CPG_SD0CKCR0_SD0FC_DIV4) + +#if (RCAR_LSI == RCAR_S4) +#define PFC_POC_MMC_RW (PFC_POC1_RW) +#define PFC_POC_MMC_MASK (0x007FF000U) +#define PFC_POC_MMC_VAL (0x00000000U) +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define PFC_POC_MMC_RW (PFC_POC3_RW) +#define PFC_POC_MMC_MASK (0x000007FFU) +#define PFC_POC_MMC_VAL (0x00000000U) +#endif /* RCAR_LSI == RCAR_S4 */ + + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ + +/* ********************************* CODE ********************************** */ + +#endif /* #ifndef EMMC_CONFIG_H__ */ +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_def.h new file mode 100644 index 00000000..74b22224 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_def.h @@ -0,0 +1,74 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC Define header + ******************************************************************************/ + +#ifndef EMMC_DEF_H__ +#define EMMC_DEF_H__ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include "emmc_std.h" + +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ +#define EMMC_DEV_OK (0x525F4F4BU) /* "R_OK" */ +#define EMMC_DEV_ERR (0xFFFFFFFFU) +#define EMMC_DEV_ERR_HW (0x00000004U) +#define EMMC_DEV_ERR_FAULT_INJECTION (0x00000005U) + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ +extern st_mmc_base mmc_drv_obj; + +/* ************************** FUNCTION PROTOTYPES ************************** */ + +/* eMMC driver API */ +EMMC_ERROR_CODE emmc_init(void); +EMMC_ERROR_CODE emmc_terminate(void); +EMMC_ERROR_CODE emmc_memcard_power(uint32_t mode); +EMMC_ERROR_CODE emmc_mount(void); +EMMC_ERROR_CODE emmc_set_request_mmc_clock(const uint32_t *freq); +EMMC_ERROR_CODE emmc_send_idle_cmd (uint32_t arg); +EMMC_ERROR_CODE emmc_select_partition(EMMC_PARTITION_ID id); +EMMC_ERROR_CODE emmc_read_sector(uint32_t *buff_address_virtual, uint32_t sector_number, uint32_t count, uint32_t feature_flags); +uint32_t emmc_bit_field (const uint8_t *data, uint32_t top, uint32_t bottom); + + +/* interrupt service */ +uint32_t emmc_interrupt(void); + + +/* send command API */ +EMMC_ERROR_CODE emmc_exec_cmd (uint32_t error_mask, uint32_t *response); +void emmc_make_nontrans_cmd (HAL_MEMCARD_COMMAND cmd, uint32_t arg); +void emmc_make_trans_cmd (HAL_MEMCARD_COMMAND cmd, uint32_t arg, uint32_t *buff_address_virtual, + uint32_t len, HAL_MEMCARD_OPERATION dir, HAL_MEMCARD_DATA_TRANSFER_MODE transfer_mode); +EMMC_ERROR_CODE emmc_set_ext_csd(uint32_t arg); + +/* ********************************* CODE ********************************** */ + +#endif /* #define EMMC_DEF_H__ */ +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_hal.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_hal.h new file mode 100644 index 00000000..1db49a6d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_hal.h @@ -0,0 +1,162 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC HAL driverd header + ******************************************************************************/ + +#ifndef EMMC_HAL_H__ +#define EMMC_HAL_H__ +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include + +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ +/* Memory card response types */ +#define HAL_MEMCARD_COMMAND_INDEX_MASK (0x0003fU) + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* memory access operation */ +typedef enum +{ + HAL_MEMCARD_READ = 0U, /**< read */ + HAL_MEMCARD_WRITE = 1U /**< write */ +} HAL_MEMCARD_OPERATION; + +/* Type of data width on memorycard bus */ +typedef enum +{ + HAL_MEMCARD_DATA_WIDTH_1_BIT = 0U, + HAL_MEMCARD_DATA_WIDTH_4_BIT = 1U, + HAL_MEMCARD_DATA_WIDTH_8_BIT = 2U +} HAL_MEMCARD_DATA_WIDTH; /**< data (bus) width types */ + +/* mode of data transfer */ +typedef enum +{ + HAL_MEMCARD_DMA = 0U, + HAL_MEMCARD_NOT_DMA = 1U +} HAL_MEMCARD_DATA_TRANSFER_MODE; + + +/* Memory card response types. */ +typedef enum hal_memcard_response_type +{ + HAL_MEMCARD_RESPONSE_NONE = 0x00000U, + HAL_MEMCARD_RESPONSE_R1 = 0x00100U, + HAL_MEMCARD_RESPONSE_R1b = 0x00200U, + HAL_MEMCARD_RESPONSE_R2 = 0x00300U, + HAL_MEMCARD_RESPONSE_R3 = 0x00400U, + HAL_MEMCARD_RESPONSE_R4 = 0x00500U, + HAL_MEMCARD_RESPONSE_R5 = 0x00600U, + HAL_MEMCARD_RESPONSE_R6 = 0x00700U, + HAL_MEMCARD_RESPONSE_R7 = 0x00800U, + HAL_MEMCARD_RESPONSE_TYPE_MASK = 0x00f00U +} HAL_MEMCARD_RESPONSE_TYPE; + + +/* Memory card command types. */ +typedef enum hal_memcard_command_type +{ + HAL_MEMCARD_COMMAND_TYPE_BC = 0x00000U, + HAL_MEMCARD_COMMAND_TYPE_BCR = 0x01000U, + HAL_MEMCARD_COMMAND_TYPE_AC = 0x02000U, + HAL_MEMCARD_COMMAND_TYPE_ADTC_WRITE = 0x03000U, + HAL_MEMCARD_COMMAND_TYPE_ADTC_READ = 0x04000U, + HAL_MEMCARD_COMMAND_TYPE_MASK = 0x07000U +} HAL_MEMCARD_COMMAND_TYPE; + +/* Type of memory card */ +typedef enum hal_memcard_command_card_type +{ + HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON = 0x00000U, + HAL_MEMCARD_COMMAND_CARD_TYPE_MMC = 0x08000U, + HAL_MEMCARD_COMMAND_CARD_TYPE_SD = 0x10000U, + HAL_MEMCARD_COMMAND_CARD_TYPE_MASK = 0x18000U +} HAL_MEMCARD_COMMAND_CARD_TYPE; + +/* Memory card application command. */ +typedef enum hal_memcard_command_app_norm +{ + HAL_MEMCARD_COMMAND_NORMAL = 0x00000U, + HAL_MEMCARD_COMMAND_APP = 0x20000U, + HAL_MEMCARD_COMMAND_APP_NORM_MASK = 0x20000U +} HAL_MEMCARD_COMMAND_APP_NORM; + + +/* Memory card command codes. */ +typedef enum +{ +/* class 0 and class 1 */ + CMD0_GO_IDLE_STATE = 0 | HAL_MEMCARD_RESPONSE_NONE | HAL_MEMCARD_COMMAND_TYPE_BC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD0 */ + CMD1_SEND_OP_COND = 1 | HAL_MEMCARD_RESPONSE_R3 | HAL_MEMCARD_COMMAND_TYPE_BCR | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD1 */ + CMD2_ALL_SEND_CID_MMC = 2 | HAL_MEMCARD_RESPONSE_R2 | HAL_MEMCARD_COMMAND_TYPE_BCR | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD2 */ + CMD2_ALL_SEND_CID_SD = 2 | HAL_MEMCARD_RESPONSE_R2 | HAL_MEMCARD_COMMAND_TYPE_BCR | HAL_MEMCARD_COMMAND_CARD_TYPE_SD | HAL_MEMCARD_COMMAND_NORMAL, + CMD3_SET_RELATIVE_ADDR = 3 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD3 */ + CMD3_SEND_RELATIVE_ADDR = 3 | HAL_MEMCARD_RESPONSE_R6 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_SD | HAL_MEMCARD_COMMAND_NORMAL, + CMD4_SET_DSR = 4 | HAL_MEMCARD_RESPONSE_NONE | HAL_MEMCARD_COMMAND_TYPE_BC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD4 */ + CMD5_SLEEP_AWAKE = 5 | HAL_MEMCARD_RESPONSE_R1b | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD5 */ + CMD6_SWITCH = 6 | HAL_MEMCARD_RESPONSE_R1b | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD6 */ + CMD6_SWITCH_FUNC = 6 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_SD | HAL_MEMCARD_COMMAND_NORMAL, + ACMD6_SET_BUS_WIDTH = 6 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_SD | HAL_MEMCARD_COMMAND_APP, + CMD7_SELECT_CARD = 7 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD7 */ + CMD7_SELECT_CARD_PROG = 7 | HAL_MEMCARD_RESPONSE_R1b | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD7(from Disconnected State to Programming State) */ + CMD7_DESELECT_CARD = 7 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, + CMD8_SEND_EXT_CSD = 8 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_ADTC_READ | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD8 */ + CMD8_SEND_IF_COND = 8 | HAL_MEMCARD_RESPONSE_R7 | HAL_MEMCARD_COMMAND_TYPE_BCR | HAL_MEMCARD_COMMAND_CARD_TYPE_SD | HAL_MEMCARD_COMMAND_NORMAL, + CMD9_SEND_CSD = 9 | HAL_MEMCARD_RESPONSE_R2 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD9 */ + CMD10_SEND_CID = 10 | HAL_MEMCARD_RESPONSE_R2 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD10 */ + CMD11_READ_DAT_UNTIL_STOP = 11 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_ADTC_READ | HAL_MEMCARD_COMMAND_CARD_TYPE_SD | HAL_MEMCARD_COMMAND_NORMAL, /* CMD11 */ + CMD12_STOP_TRANSMISSION = 12 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD12 */ + CMD12_STOP_TRANSMISSION_WRITE = 12 | HAL_MEMCARD_RESPONSE_R1b | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD12 R1b : write case */ + CMD13_SEND_STATUS = 13 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD13 */ + ACMD13_SD_STATUS = 13 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_ADTC_READ | HAL_MEMCARD_COMMAND_CARD_TYPE_SD | HAL_MEMCARD_COMMAND_APP, + CMD14_BUSTEST_R = 14 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_ADTC_READ | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD14 */ + CMD15_GO_INACTIVE_STATE = 15 | HAL_MEMCARD_RESPONSE_NONE | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD15 */ + +/* class 2 */ + CMD16_SET_BLOCKLEN = 16 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD16 */ + CMD17_READ_SINGLE_BLOCK = 17 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_ADTC_READ | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD17 */ + CMD18_READ_MULTIPLE_BLOCK = 18 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_ADTC_READ | HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON | HAL_MEMCARD_COMMAND_NORMAL, /* CMD18 */ + CMD19_BUS_TEST_W = 19 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_ADTC_WRITE | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD19 */ +/* class 3 */ + CMD20_WRITE_DAT_UNTIL_STOP = 20 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_ADTC_WRITE | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL, /* CMD20 */ + CMD21 = 21, /* CMD21 */ + CMD22 = 22, /* CMD22 */ + ACMD22_SEND_NUM_WR_BLOCKS = 22 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_SD | HAL_MEMCARD_COMMAND_APP, + +/* class 4 */ + CMD23_SET_BLOCK_COUNT = 23 | HAL_MEMCARD_RESPONSE_R1 | HAL_MEMCARD_COMMAND_TYPE_AC | HAL_MEMCARD_COMMAND_CARD_TYPE_MMC | HAL_MEMCARD_COMMAND_NORMAL /* CMD23 */ + +} HAL_MEMCARD_COMMAND; + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ + +/* ********************************* CODE ********************************** */ + +#endif /* EMMC_HAL_H__ */ + +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_multiboot.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_multiboot.h new file mode 100644 index 00000000..35f76803 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_multiboot.h @@ -0,0 +1,44 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC Multi boot header + ******************************************************************************/ + +#ifndef EMMC_MULTIBOOT_H_ +#define EMMC_MULTIBOOT_H_ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ + +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + + +/* ************************** FUNCTION PROTOTYPES ************************** */ +uint32_t emmc_trans_data(uint32_t next_bootPartition, uintptr_t sourceSct, uintptr_t targetAd, uint32_t sectorSize); +/* ******************************** END ************************************ */ +#endif /* #ifndef EMMC_MULTIBOOT_H_*/ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_registers.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_registers.h new file mode 100644 index 00000000..e81d9a4e --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_registers.h @@ -0,0 +1,146 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC register header + ******************************************************************************/ + +#ifndef EMMC_REGISTERS_H__ +#define EMMC_REGISTERS_H__ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ +/* MMC0 channel */ +#define MMC0_SD_BASE (BASE_MMC0_ADDR) /* reg addr is 0xEE140000U */ + +#define SD_CMD (MMC0_SD_BASE + 0x0000U) +#define SD_ARG (MMC0_SD_BASE + 0x0010U) +#define SD_STOP (MMC0_SD_BASE + 0x0020U) +#define SD_SECCNT (MMC0_SD_BASE + 0x0028U) +#define SD_RSP10 (MMC0_SD_BASE + 0x0030U) +#define SD_RSP32 (MMC0_SD_BASE + 0x0040U) +#define SD_RSP54 (MMC0_SD_BASE + 0x0050U) +#define SD_RSP76 (MMC0_SD_BASE + 0x0060U) +#define SD_INFO1 (MMC0_SD_BASE + 0x0070U) +#define SD_INFO2 (MMC0_SD_BASE + 0x0078U) +#define SD_INFO1_MASK (MMC0_SD_BASE + 0x0080U) +#define SD_INFO2_MASK (MMC0_SD_BASE + 0x0088U) +#define SD_CLK_CTRL (MMC0_SD_BASE + 0x0090U) +#define SD_SIZE (MMC0_SD_BASE + 0x0098U) +#define SD_OPTION (MMC0_SD_BASE + 0x00A0U) +#define SD_ERR_STS1 (MMC0_SD_BASE + 0x00B0U) +#define SD_ERR_STS2 (MMC0_SD_BASE + 0x00B8U) +#define SD_BUF0 (MMC0_SD_BASE + 0x00C0U) +#define CC_EXT_MODE (MMC0_SD_BASE + 0x0360U) +#define SOFT_RST (MMC0_SD_BASE + 0x0380U) +#define HOST_MODE (MMC0_SD_BASE + 0x0390U) +#define DM_CM_DTRAN_MODE (MMC0_SD_BASE + 0x0820U) +#define DM_CM_DTRAN_CTRL (MMC0_SD_BASE + 0x0828U) +#define DM_CM_INFO1 (MMC0_SD_BASE + 0x0840U) +#define DM_CM_INFO1_MASK (MMC0_SD_BASE + 0x0848U) +#define DM_CM_INFO2 (MMC0_SD_BASE + 0x0850U) +#define DM_CM_INFO2_MASK (MMC0_SD_BASE + 0x0858U) +#define DM_DTRAN_ADDR (MMC0_SD_BASE + 0x0880U) + + + +/* SD_INFO1 Registers */ +#define SD_INFO1_INFO2 (0x00000004U) /* Access end */ +#define SD_INFO1_INFO0 (0x00000001U) /* Response end */ + +/* SD_INFO2 Registers */ +#define SD_INFO2_CBSY (0x00004000U) /* Command Type Register Busy */ +#define SD_INFO2_BWE (0x00000200U) /* SD_BUF Write Enable */ +#define SD_INFO2_BRE (0x00000100U) /* SD_BUF Read Enable */ +#define SD_INFO2_DAT0 (0x00000080U) /* SDDAT0 */ +#define SD_INFO2_ALL_ERR (0x0000807FU) +#define SD_INFO2_CLEAR (0x00000800U) /* BIT11 The write value should always be 1. HWM_0003 */ + +/* DM_INFO1 Registers */ +#define DM_CM_INFO_DTRANEND0 (0x00010000U) /* DMAC Channel 0 Transfer End */ +#define DM_CM_INFO_DTRANEND1 (0x00020000U) /* DMAC Channel 0 Transfer End */ + +/* SOFT_RST */ +#define SOFT_RST_SDRST (0x00000001U) + +/* SD_CLK_CTRL */ +#define SD_CLK_CTRL_CLKDIV_MASK (0x000000FFU) +#define SD_CLK_WRITE_MASK (0x000003FFU) + +/* SD_OPTION */ +#define SD_OPTION_WIDTH (0x00008000U) +#define SD_OPTION_WIDTH8 (0x00002000U) +#define SD_OPTION_TIMEOUT_CNT_MASK (0x000000F0U) + + +/* MMC Clock Frequency + * 200MHz * 1/x = output clock + */ +#define MMC_400KHZ (512U) /* 200MHz * 1/512 = 390 KHz */ +#define MMC_20MHZ (16U) /* 200MHz * 1/16 = 12.5 MHz Normal speed mode */ +#define MMC_26MHZ (8U) /* 200MHz * 1/8 = 25 MHz High speed mode 26Mhz */ +#define MMC_52MHZ (4U) /* 200MHz * 1/4 = 50 MHz High speed mode 52Mhz */ + + +#define MMC_FREQ_52MHZ (52000000U) +#define MMC_FREQ_26MHZ (26000000U) +#define MMC_FREQ_20MHZ (20000000U) + + +/* MMC Clock DIV */ +#define MMC_SD_CLK_START (0x00000100U) /* CLOCK On */ +#define MMC_SD_CLK_STOP (~0x00000100UL) /* CLOCK stop */ + +/* DM_CM_DTRAN_MODE */ +#define DM_CM_DTRAN_MODE_CH0 (0x00000000U) /* CH0 : downstream */ +#define DM_CM_DTRAN_MODE_CH1 (0x00010000U) /* CH1 : upstream */ +#define DM_CM_DTRAN_MODE_BIT_WIDTH (0x00000030U) + +/* CC_EXT_MODE */ +#define CC_EXT_MODE_DMASDRW_ENABLE (0x00000002U) /* SD_BUF Read/Write DMA Transfer */ +#define CC_EXT_MODE_CLEAR (0x00001010U) /* BIT 12 & 4 always 1. */ + +/* DM_CM_INFO_MASK */ +#define DM_CM_INFO_MASK_CLEAR (0xFFFCFFFEU) +#define DM_CM_INFO_CH0_ENABLE (0x00010001U) +#define DM_CM_INFO_CH1_ENABLE (0x00020001U) + +/* DM_DTRAN_ADDR */ +#define DM_DTRAN_ADDR_WRITE_MASK (0xFFFFFFF8U) + +/*DM_CM_DTRAN_CTRL */ +#define DM_CM_DTRAN_CTRL_START (0x00000001U) + + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ + +/* ********************************* CODE ********************************** */ + +#endif /* EMMC_REGISTERS_H__ */ +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_std.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_std.h new file mode 100644 index 00000000..3057bf75 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/emmc_std.h @@ -0,0 +1,263 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC standard header + ******************************************************************************/ + +#ifndef EMMC_STD_H__ +#define EMMC_STD_H__ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include "emmc_hal.h" +#include "emmc_registers.h" +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + +/*CSD register Macros */ +#define EMMC_CSD_SPEC_VARS() (emmc_bit_field(mmc_drv_obj.csd_data, 125,122)) +#define EMMC_CSD_TRAN_SPEED() (emmc_bit_field(mmc_drv_obj.csd_data, 103,96)) + +/* for sector access */ +#define EMMC_SECTOR_SIZE_SHIFT (9U) /* 512 = 2^9 */ +#define EMMC_SECTOR_PADD_MASK ((1U << EMMC_SECTOR_SIZE_SHIFT) - 1U) +#define EMMC_SECTOR_SIZE (512U) +#define EMMC_BLOCK_LENGTH (512U) +#define EMMC_BLOCK_LENGTH_DW (128U) + +/* EMMC driver error code. (extended HAL_MEMCARD_RETURN) */ +typedef enum +{ + EMMC_ERR = 0U, /**< unknown error */ + EMMC_SUCCESS , /**< OK */ + EMMC_ERR_FROM_DMAC , /**< DMAC allocation error */ + EMMC_ERR_FROM_DMAC_TRANSFER , /**< DMAC transfer error */ + EMMC_ERR_CARD_STATUS_BIT , /**< card status error. Non-masked error bit was set in the card status */ + EMMC_ERR_CMD_TIMEOUT , /**< command timeout error */ + EMMC_ERR_DATA_TIMEOUT , /**< data timeout error */ + EMMC_ERR_CMD_CRC , /**< command CRC error */ + EMMC_ERR_DATA_CRC , /**< data CRC error */ + EMMC_ERR_PARAM , /**< parameter error */ + EMMC_ERR_RESPONSE , /**< response error */ + EMMC_ERR_RESPONSE_BUSY , /**< response busy error */ + EMMC_ERR_TRANSFER , /**< data transfer error */ + EMMC_ERR_READ_SECTOR , /**< read sector error */ + EMMC_ERR_WRITE_SECTOR , /**< write sector error */ + EMMC_ERR_STATE , /**< state error */ + EMMC_ERR_TIMEOUT , /**< timeout error */ + EMMC_ERR_ILLEGAL_CARD , /**< illegal card */ + EMMC_ERR_CARD_BUSY , /**< Busy state */ + EMMC_ERR_CARD_STATE , /**< card state error */ + EMMC_ERR_SET_TRACE , /**< trace information error */ + EMMC_ERR_FROM_TIMER , /**< Timer error */ + EMMC_ERR_FORCE_TERMINATE , /**< Force terminate */ + EMMC_ERR_CARD_POWER , /**< card power fail */ + EMMC_ERR_ERASE_SECTOR , /**< erase sector error */ + EMMC_ERR_INFO2 /**< exec cmd error info2 */ +} EMMC_ERROR_CODE; + +/* Response */ +/** R1 */ +#define EMMC_R1_ERROR_MASK (0xFDBFE080U) /* Type 'E' bit and bit14(must be 0). ignore bit22 */ +#define EMMC_R1_ERROR_MASK_WITHOUT_CRC (0xFD3FE080U) /* Ignore bit23 (Not check CRC error) */ +#define EMMC_R1_STATE_MASK (0x00001E00U) /* [12:9] */ +#define EMMC_R1_READY (0x00000100U) /* bit8 */ +#define EMMC_R1_STATE_SHIFT (9U) + +/** R4 */ +#define EMMC_R4_STATUS (0x00008000U) + +/** CSD */ +#define EMMC_TRANSPEED_FREQ_UNIT_MASK (0x07U) /* bit[2:0] */ +#define EMMC_TRANSPEED_MULT_MASK (0x78U) /* bit[6:3] */ +#define EMMC_TRANSPEED_MULT_SHIFT (3U) + +/** OCR */ +#define EMMC_HOST_OCR_VALUE (0x40FF8080U) +#define EMMC_OCR_STATUS_BIT (0x80000000U) /* Card power up status bit */ +#define EMMC_OCR_ACCESS_MODE_MASK (0x60000000U) /* bit[30:29] */ +#define EMMC_OCR_ACCESS_MODE_SECT (0x40000000U) + +/** EXT_CSD */ +#define EMMC_EXT_CSD_CARD_TYPE (196U) +#define EMMC_EXT_CSD_PARTITION_CONFIG (179U) + +#define EMMC_EXT_CSD_CARD_TYPE_26MHZ (0x01U) +#define EMMC_EXT_CSD_CARD_TYPE_52MHZ (0x02U) + +/** SWITCH (CMD6) argument */ +#define EXTCSD_ACCESS_BYTE (0x03000000U) + +#define HS_TIMING_ADD (185U<<16U) /* H'b9 */ +#define HS_TIMING_1 (1U<<8U) + +#define BUS_WIDTH_ADD (183U<<16U) /* H'b7 */ +#define BUS_WIDTH_1 (0U<<8U) + +#define EMMC_SWITCH_HS_TIMING (EXTCSD_ACCESS_BYTE|HS_TIMING_ADD|HS_TIMING_1) /**< H'03b90100 */ + +#define EMMC_SWITCH_BUS_WIDTH_1 (EXTCSD_ACCESS_BYTE|BUS_WIDTH_ADD|BUS_WIDTH_1) /**< H'03b70000 */ +#define EMMC_SWITCH_PARTITION_CONFIG 0x03B30000UL /**< Partition config = 0x00 */ + +/** for st_mmc_base */ +#define EMMC_MAX_RESPONSE_LENGTH (17U) +#define EMMC_MAX_CID_LENGTH (16U) +#define EMMC_MAX_CSD_LENGTH (16U) +#define EMMC_MAX_EXT_CSD_LENGTH (512U) + + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* Partition id */ +typedef enum +{ + PARTITION_ID_USER = 0x0, /**< User Area */ + PARTITION_ID_BOOT_1 = 0x1, /**< boot partition 1 */ + PARTITION_ID_BOOT_2 = 0x2, /**< boot partition 2 */ + PARTITION_ID_RPMB = 0x3, /**< Replay Protected Memory Block */ + PARTITION_ID_GP_1 = 0x4, /**< General Purpose partition 1 */ + PARTITION_ID_GP_2 = 0x5, /**< General Purpose partition 2 */ + PARTITION_ID_GP_3 = 0x6, /**< General Purpose partition 3 */ + PARTITION_ID_GP_4 = 0x7, /**< General Purpose partition 4 */ + PARTITION_ID_MASK = 0x7 /**< [2:0] */ +} EMMC_PARTITION_ID; + +/* card state in R1 response [12:9] */ +typedef enum +{ + EMMC_R1_STATE_IDLE = 0, + EMMC_R1_STATE_READY, + EMMC_R1_STATE_IDENT, + EMMC_R1_STATE_STBY, + EMMC_R1_STATE_TRAN, + EMMC_R1_STATE_DATA, + EMMC_R1_STATE_RCV, + EMMC_R1_STATE_PRG, + EMMC_R1_STATE_DIS, + EMMC_R1_STATE_BTST, + EMMC_R1_STATE_SLEP +} EMMC_R1_STATE; + +typedef enum{ + ESTATE_BEGIN = 0, + ESTATE_ISSUE_CMD, + ESTATE_NON_RESP_CMD, + ESTATE_RCV_RESP, + ESTATE_RCV_RESPONSE_BUSY, + ESTATE_CHECK_RESPONSE_COMPLETE, + ESTATE_DATA_TRANSFER, + ESTATE_DATA_TRANSFER_COMPLETE, + ESTATE_ACCESS_END, + ESTATE_TRANSFER_ERROR, + ESTATE_ERROR, + ESTATE_END +}EMMC_INT_STATE; + +/* eMMC boot driver error information */ +typedef struct +{ + volatile uint32_t info1; /**< SD_INFO1 register value. (hardware dependence) */ + volatile uint32_t info2; /**< SD_INFO2 register value. (hardware dependence) */ + volatile uint32_t status1; /**< SD_ERR_STS1 register value. (hardware dependence) */ + volatile uint32_t status2; /**< SD_ERR_STS2 register value. (hardware dependence) */ + volatile uint32_t dm_info1; /**< DM_CM_INFO1 register value. (hardware dependence) */ + volatile uint32_t dm_info2; /**< DM_CM_INFO2 register value. (hardware dependence) */ +} st_error_info; + + +/* Command information */ +typedef struct +{ + HAL_MEMCARD_COMMAND cmd; /**< Command information */ + uint32_t arg; /**< argument */ + HAL_MEMCARD_OPERATION dir; /**< direction */ + uint32_t hw; /**< H/W dependence. SD_CMD register value. */ +} st_command_info; + + +/* MMC driver base */ +typedef struct +{ + st_error_info error_info; /**< error information */ + st_command_info cmd_info; /**< command information */ + + /* for data transfer */ + uint32_t *buff_address_virtual; /**< Dest or Src buff */ + uint32_t *buff_address_physical; /**< Dest or Src buff */ + HAL_MEMCARD_DATA_WIDTH bus_width; /**< bus width */ + uint32_t trans_size; /**< transfer size for this command */ + uint32_t remain_size; /**< remain size for this command */ + uint32_t response_length; /**< response length for this command */ + + /* clock */ + uint32_t max_freq; /**< Max frequency (Card Spec)[Hz]. It changes dynamically by CSD and EXT_CSD. */ + uint32_t current_freq; /**< current MMC clock[Hz] (the closest frequency supported by HW) */ + + /* state flag */ + uint32_t card_power_enable; /**< True : Power ON */ + uint32_t clock_enable; /**< True : Clock ON */ + uint32_t initialize; /**< True : initialize complete. */ + uint32_t mount; /**< True : mount complete. */ + uint32_t selected; /**< True : selected card. */ + HAL_MEMCARD_DATA_TRANSFER_MODE transfer_mode; /**< 0: DMA, 1:PIO */ + EMMC_R1_STATE current_state; /**< card state */ + volatile uint32_t during_transfer; /**< True : during transfer */ + volatile uint32_t during_dma_transfer; /**< True : during transfer (DMA)*/ + volatile uint32_t dma_error_flag; /**< True : occurred DMAC error */ + volatile uint32_t force_terminate; /**< force terminate flag */ + volatile uint32_t state_machine_blocking; /**< state machine blocking flag : True or False */ + + /* timeout */ + uint32_t data_timeout; /**< read and write data timeout.*/ + + /* interrupt */ + volatile uint32_t int_event1; /**< interrupt SD_INFO1 Event */ + volatile uint32_t int_event2; /**< interrupt SD_INFO2 Event */ + volatile uint32_t dm_event1; /**< interrupt DM_CM_INFO1 Event */ + volatile uint32_t dm_event2; /**< interrupt DM_CM_INFO2 Event */ + + /* response */ + uint32_t *response; /**< pointer to buffer for executing command. */ + uint32_t r1_card_status; /**< R1 response data */ + uint32_t r3_ocr; /**< R3 response data */ + uint32_t r4_resp; /**< R4 response data */ + uint32_t r5_resp; /**< R5 response data */ + + /* Card registers (4byte align) */ + uint8_t csd_data[EMMC_MAX_CSD_LENGTH]; /**< CSD */ + uint8_t cid_data[EMMC_MAX_CID_LENGTH]; /**< CID */ + uint8_t ext_csd_data[EMMC_MAX_EXT_CSD_LENGTH]; /**< EXT_CSD */ + uint8_t response_data[EMMC_MAX_RESPONSE_LENGTH]; /**< other response */ + + /* SDHI base address */ + uintptr_t base_address; +} st_mmc_base; + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ + +/* ********************************* CODE ********************************** */ + +/* ******************************** END ************************************ */ +#endif /* EMMC_STD_H__ */ + /* EMMC_STD_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr.h new file mode 100644 index 00000000..0e85a3c6 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : FCPR driver header + ******************************************************************************/ + +#ifndef FCPR_H__ +#define FCPR_H__ + +#include + +/************************************************************************************************/ +/* Definitions */ +/************************************************************************************************/ +#define FCPR_DISABLE (0U) +#define FCPR_ENABLE (1U) + +#define COMPRESSION_START_ADDR (0x80000000U) +#define COMPRESSION_END_ADDR (0xA2FFFFFFU) +#define COMPRESSION_ENABLE (0x00000001U) + +void fcpr_init(void); + +#endif /* FCPR_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr_register.h new file mode 100644 index 00000000..dc2f5cac --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/fcpr_register.h @@ -0,0 +1,46 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : FCPR register header + ******************************************************************************/ + +#ifndef FCPR_REGISTER_H__ +#define FCPR_REGISTER_H__ + +#include + +/************************************************************************************************/ +/* Definitions */ +/************************************************************************************************/ +/* CPG base address */ +/* 0xE6785700 */ +#define FCPR_BASE (BASE_FCPR_ADDR) + +/* FCPR */ +#define FCPR_CMP_CTRL (BASE_FCPR_ADDR + 0x0030U) +#define FCPR_CMP_SPACE (BASE_FCPR_ADDR + 0x0080U) +#define FCPR_CMP_STADR (BASE_FCPR_ADDR + 0x0084U) +#define FCPR_CMP_EDADR (BASE_FCPR_ADDR + 0x0088U) + +#endif /* FCPR_REGISTER_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/hscif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/hscif_register.h new file mode 100644 index 00000000..7b331714 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/hscif_register.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : HSCIF register header + ******************************************************************************/ + + +#ifndef HSCIF_REGISTER_H_ +#define HSCIF_REGISTER_H_ + +#include + +/* HSCIF0 base address */ +/* 0xE6540000U */ +#define HSCIF0_BASE (BASE_HSCIF_ADDR) + +#define HSCIF_HSSMR (HSCIF0_BASE + 0x0000U) /* 16 Serial mode register */ +#define HSCIF_HSBRR (HSCIF0_BASE + 0x0004U) /* 8 Bit rate register */ +#define HSCIF_HSSCR (HSCIF0_BASE + 0x0008U) /* 16 Serial control register */ +#define HSCIF_HSFTDR (HSCIF0_BASE + 0x000CU) /* 8 Transmit FIFO data register */ +#define HSCIF_HSFSR (HSCIF0_BASE + 0x0010U) /* 16 Serial status register */ +#define HSCIF_HSFCR (HSCIF0_BASE + 0x0018U) /* 16 FIFO control register */ +#define HSCIF_HSLSR (HSCIF0_BASE + 0x0024U) /* 16 Line status register */ +#define HSCIF_DL (HSCIF0_BASE + 0x0030U) /* 16 Frequency division register */ +#define HSCIF_CKS (HSCIF0_BASE + 0x0034U) /* 16 Clock Select register */ +#define HSCIF_HSSRR (HSCIF0_BASE + 0x0040U) /* 16 Sampling rate register */ + +#endif /* HSCIF_REGISTER_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/i2c_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_emmc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_emmc.h new file mode 100644 index 00000000..64831f2a --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_emmc.h @@ -0,0 +1,73 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load function for eMMC header + ******************************************************************************/ + +#ifndef LOAD_IMAGE_EMMC_H_ +#define LOAD_IMAGE_EMMC_H_ + +#include +#include +#include +#include + +/* define */ +/* eMMC */ +#define EMMC_TOP (0x00000000U) +#define EMMC_BOOT_PART_SIZE (31U * 1024U * 1024U) /* 31MB */ +#define EMMC_END ((EMMC_TOP + EMMC_BOOT_PART_SIZE) - 1U) +#define SRC_TOP (EMMC_TOP) +#define SRC_END (EMMC_END) + +/* For eMMC */ +#define EMMC_SECTOR_SIZE (512U) +#define EMMC_SECTOR_SIZE_SHIFT (9U) /* 512 = 2^9 */ +#define EMMC_CONTENT_CERT_ADDR (0x00240000U) +#define EMMC_CONTENT_CERT_SECTOR_NUMBER (EMMC_CONTENT_CERT_ADDR >> EMMC_SECTOR_SIZE_SHIFT) +#define EMMC_PARTITION_1 (1U) +#if (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) +#define EMMC_VER_TBL_OFFSET (0x0000D000U) +#define EMMC_VER_TBL_CNT_CERT_ADDR (EMMC_CONTENT_CERT_ADDR + EMMC_VER_TBL_OFFSET) +#define EMMC_VER_TBL_CNT_CERT_SEC_NUM (EMMC_VER_TBL_CNT_CERT_ADDR >> EMMC_SECTOR_SIZE_SHIFT) +#endif /* (SW_VERSION_CHECK == OPT_VERSION_CHECK_ENABLE) */ + +static inline void load_image_info_print_for_emmc(const LOAD_INFO* li) +{ + NOTICE("======== %s image load info ========\n" + "load address \t= 0x%08x\n" "image size \t= 0x%08x\n" + "source address \t= (p:%d)0x%08x\n", + li->name, li->boot_addr, li->image_size, + li->part_num, li->src_addr); +} + +static inline uint32_t get_part_num_in_cert(uint32_t id) +{ + return (SA9_DEST_ADDR + ((id + 1U) * 0x10U)); +} + +/* Prototype */ +uint32_t load_content_cert_for_emmc(void); +#endif /* LOAD_IMAGE_EMMC_H_ */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_flash.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_flash.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_flash.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/image_load_flash.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/inline_asm.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/inline_asm.h new file mode 100644 index 00000000..5f9f38f3 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/inline_asm.h @@ -0,0 +1,41 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : inline asm func header + ******************************************************************************/ + +#ifndef INLINE_ASM_H__ +#define INLINE_ASM_H__ + +static inline void syncm(void) +{ + __asm__ __volatile__ ("SYNCM"); +} + +static inline void synci(void) +{ + __asm__ __volatile__ ("SYNCI"); +} + +#endif /* INLINE_ASM_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc.h new file mode 100644 index 00000000..b7832014 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc.h @@ -0,0 +1,58 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : window watchdog timer function header + ******************************************************************************/ + +#ifndef INTC_H__ +#define INTC_H__ + +/************************************************************************************************/ +/* Definitions */ +/************************************************************************************************/ + +#define INTC1_BASE (0xFFFEEA00UL) +#define INTC2_BASE (0xFFFEF000UL) + +typedef void (* INT_HANDLER)(uint32_t int_no, uint32_t arg); + +static inline uint32_t get_icumx_ic_addr(uint32_t id) +{ + uint32_t ret; + if(id < 32U) + { + ret = INTC1_BASE + (0x02U * (id % 32U)); + } + else + { + ret = (INTC2_BASE + 0x40U) + (0x02U * (id % 32U)); + } + return ret; +} + +void intc_set_interrupt(uint32_t int_no, uint32_t level, INT_HANDLER cb); +void intc_disable_interrupt(uint32_t int_no); +void intc_handler(void); + +#endif /* INTC_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc_id.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc_id.h new file mode 100644 index 00000000..764ab7a2 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/intc_id.h @@ -0,0 +1,71 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Interrupt controler ID header + ******************************************************************************/ + +#ifndef INTC_ID_H_ +#define INTC_ID_H_ + +#define ECC_ERR_LRAM (0U) /* ECC Error Detection for Local RAM */ +#define ECC_ERR_CACHE (1U) /* ECC Error Detection for Cache RAM */ +#define EDC_ERR_INT_AXI (2U) /* EDC Error interrupt of AXI */ +#define ECC_ERR_INT_AXIAB (3U) /* ECC Error interrupt of AXIAB */ +#define ECC_ERR_INT_PKCC (4U) /* ECC Error interrupt of PKCC */ +#define CORTEX_INT_REQ_SINGLE_CORE (5U) /* Cortex-R/A interrupt request (single main core) */ +#define CORTEX_INT_REQ_SEL_SINGLE_CORE (6U) /* Cortex-R/A interrupt request (selected single main core) */ +#define COMPLETION_AES (7U) /* Completion of AES encryption or decryption */ + /* ID 8 Reserved */ +#define COMPLETION_RAND_NUMBER (9U) /* Random number generation complete */ +#define OSTIMER0_OVERFLOW (10U) /* OS Timer 0 overflow */ +#define OSTIMER1_OVERFLOW (11U) /* OS Timer 1 overflow */ +#define WDT0_INT (12U) /* Watchdog Timer 0 interrupt (at 75%) */ +#define COMPLETION_PKCC (13U) /* Completion of PKCC operation */ +#define COMPLETION_DMAC_CH5CH6 (14U) /* Interrupt request by transfer completion for channel-5/6 */ +#define INT_REQ_BRESP_RRESP_ERR_AXI (15U) /* Interrupt request by BRESP/RRESP-error for AXI */ + /* ID 16 Reserved */ +#define REQ_SHAA0 (17U) /* Input data request for SHAA0 */ +#define COMPLETION_SHAA0 (18U) /* Completion or suspension of SHAA0 data output */ +#define REQ_CHALLENGE_DATA_FOR_ARM_DEBUG (19U) /* Challenge data request for ARM Debugger */ +#define REQ_RES_COMP_FOR_ARM_DEBUG (20U) /* Response data compare request for ARM Debugger */ +#define REQ_CHALLENGE_DATA_FOR_RH850_DEBUG (21U) /* Challenge data request for RH850 Debugger */ +#define REQ_RES_COMP_FOR_RH850_DEBUG (22U) /* Response data compare request for RH850 Debugger */ +#define REQ_CHALLENGE_DATA_FOR_RH850_DEBUG_R (23U) /* Challenge data request for RH850 Debugger r */ + /* Reserved */ +#define ACC_ERR_MASKROM_RTSRAM (25U) /* Data access error detection of Mask ROM or RTSRAM area */ +#define ACC_ERR_EXCEPT_MASKROM_RTSRAM (26U) /* Data access error detection except Mask ROM and RT-SRAM area */ + /* ID 27 Reserved */ + /* ID 28 Reserved */ +#define RTSRAM_SAFETY_ERR (29U) /* RT-SRAM Error Safety Error Detection */ +#define RTSRAM_SECURE_ERR (30U) /* RT-SRAM Error Secure Error Detection */ +#define RTSRAM_EDC_ERR (31U) /* RT-SRAM Error EDC Error Detection */ +#define RTSRAM_DUPLEX_ERR (32U) /* RT-SRAM Error Duplex circuit Error Detection */ +#define RTSRAM_SYSRAM_2BIT_ERR (33U) /* RT-SRAM Error SYSRAM 2bit Error Detection */ +#define RTSRAM_SYSRAM_1BIT_ERR (34U) /* RT-SRAM Error SYSRAM 1bit Error Detection */ +#define SECROM_SYSRAM_2BIT_ERR (35U) /* Sec ROM Error SYSRAM 2bit Error Detection */ +#define SECROM_SYSRAM_1BIT_ERR (36U) /* Sec ROM Error SYSRAM 1bit Error Detection */ +#define COMPLETION_SECURE_BOOT_ENGINE_CALC (37U) /* Completion of secure boot engine calculation */ + /* ID 38 -- 63 Reserved */ + +#endif /* INTC_ID_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ip_control.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ip_control.h new file mode 100644 index 00000000..aefd1f43 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ip_control.h @@ -0,0 +1,34 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : IP's control header + ******************************************************************************/ +#ifndef IP_CONTROL_H_ +#define IP_CONTROL_H_ + +/* Prototype */ +void ip_init(void); +void ip_release(void); + +#endif /* IP_CONTROL_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main.h new file mode 100644 index 00000000..3a250e90 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader main header + ******************************************************************************/ + +#ifndef LOADER_MAIN_H_ +#define LOADER_MAIN_H_ + +/* prototype */ +uint32_t loader_main(void); +#if (RCAR_LSI == RCAR_V4H) +void clear_ecm_st_axi(void); +#endif +#endif /* LOAD_MAIN_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/loader_main_common.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/log.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/log.h new file mode 100644 index 00000000..df767b8d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/log.h @@ -0,0 +1,86 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Log driver header + ******************************************************************************/ + +#ifndef LOG_H__ +#define LOG_H__ + +#include +#include + +#define LOG_NONE (0) +#define LOG_ERROR (1) +#define LOG_NOTICE (2) +#define LOG_WARNING (3) +#define LOG_INFO (4) +#define LOG_VERBOSE (5) + +#if LOG_LEVEL >= LOG_ERROR +#include +#endif + +#if LOG_LEVEL >= LOG_VERBOSE +# define VERBOSE(...) local_printf("V:" __VA_ARGS__) +#else +# define VERBOSE(...) +#endif + +#if LOG_LEVEL >= LOG_INFO +# define INFO(...) local_printf("I:" __VA_ARGS__) +#else +# define INFO(...) +#endif + +#if LOG_LEVEL >= LOG_WARNING +# define WARN(...) local_printf("W:" __VA_ARGS__) +#else +# define WARN(...) +#endif + +#if LOG_LEVEL >= LOG_ERROR +# define ERROR(...) local_printf("E:" __VA_ARGS__) +#else +# define ERROR(...) +#endif + +#if LOG_LEVEL >= LOG_NOTICE +# define NOTICE(...) local_printf("N:" __VA_ARGS__) +#else +# define NOTICE(...) +#endif + +#define panic \ + do { \ + panic_printf(__func__); \ + while(true){} \ + } while (false) + +#if LOG_LEVEL >= LOG_ERROR +void local_printf(const char *fmt, ...); +#endif +void panic_printf(const char *str); + +#endif /* LOG_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mcu_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mcu_register.h new file mode 100644 index 00000000..bd28444b --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mcu_register.h @@ -0,0 +1,125 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : MCU register header + ******************************************************************************/ + +#ifndef MCU_REGISTER_H_ +#define MCU_REGISTER_H_ + +#include + +/* The Base is remapped in the IPL, and the address is calculated and accessed + * by adding the offset to the remapped address. */ +#define MCU_BASE (BASE_MCU_ADDR) + +/* SCDS0 (0xD8F00800) */ +#define MCU_ICUM_OPBT0 (MCU_BASE + 0x09C0U) +#define MCU_ICUM_OPBT1 (MCU_BASE + 0x09C4U) +#define MCU_ICUM_OPBT2 (MCU_BASE + 0x09C8U) +#define MCU_ICUM_OPBT4 (MCU_BASE + 0x09D0U) +#define MCU_ICUM_OPBT5 (MCU_BASE + 0x09D4U) +#define MCU_ICUM_OPBT6 (MCU_BASE + 0x09D8U) +#define MCU_ICUM_OPBT7 (MCU_BASE + 0x09DCU) +#define MCU_GREG120 (MCU_BASE + 0x09E0U) + +/* SCDS2 (0xD8F00C00) */ +#define MCU_RESET_VECTOR_PE0 (MCU_BASE + 0x0C00U) +#define MCU_RESET_VECTOR_PE1 (MCU_BASE + 0x0C04U) +#define MCU_OPBT0 (MCU_BASE + 0x0C20U) +#define MCU_OPBT1 (MCU_BASE + 0x0C24U) +#define MCU_OPBT2 (MCU_BASE + 0x0C28U) +#define MCU_OPBT3 (MCU_BASE + 0x0C2CU) +#define MCU_OPBT4 (MCU_BASE + 0x0C30U) +#define MCU_OPBT6 (MCU_BASE + 0x0C38U) +#define MCU_OPBT7 (MCU_BASE + 0x0C3CU) +#define MCU_OPBT8 (MCU_BASE + 0x0C40U) +#define MCU_OPBT9 (MCU_BASE + 0x0C44U) +#define MCU_OPBT96 (MCU_BASE + 0x0CA0U) + +/* MCCR_SELB0 (0xD8F01000) */ +#define MCU_OPBT_STAT (MCU_BASE + 0x1000U) +#define MCU_OPBT_CTRL (MCU_BASE + 0x1004U) +#define MCU_G4MH_BOOT_CTLR (MCU_BASE + 0x1008U) +#define MCU_ICUMH_BOOT_CTLR (MCU_BASE + 0x100CU) +#define MCU_BOOT_STAT (MCU_BASE + 0x1024U) + +/* MCCR_SELB1 (0xD8F02000) */ + +/* HBG (0xD8F12000) */ +#define MCU_HBG_CS0_HBGPROT0 (MCU_BASE + 0x00012000U) +#define MCU_HBG_CS1_HBGPROT0 (MCU_BASE + 0x00012100U) +#define MCU_HBG_CS2_HBGPROT0 (MCU_BASE + 0x00012200U) +#define MCU_HBG_CS3_HBGPROT0 (MCU_BASE + 0x00012300U) +#define MCU_HBG_CS4_HBGPROT0 (MCU_BASE + 0x00012400U) +#define MCU_HBG_CS5_HBGPROT0 (MCU_BASE + 0x00012500U) +#define MCU_HBG_DS_HBGPROT0 (MCU_BASE + 0x00012600U) +#define MCU_HBG_PFS_HBGPROT0 (MCU_BASE + 0x00012700U) +#define MCU_HBG_SOCM_HBGPROT0 (MCU_BASE + 0x00012800U) +#define MCU_HBG_SOCS_HBGPROT0 (MCU_BASE + 0x00012900U) + +/* HBGSLVER (0xD8F19000) */ +#define MCU_HBGSLVER_CS0_HBGKCPROT (MCU_BASE + 0x00019018U) +#define MCU_HBGSLVER_CS1_HBGKCPROT (MCU_BASE + 0x00019118U) +#define MCU_HBGSLVER_CS2_HBGKCPROT (MCU_BASE + 0x00019218U) +#define MCU_HBGSLVER_CS3_HBGKCPROT (MCU_BASE + 0x00019318U) +#define MCU_HBGSLVER_CS4_HBGKCPROT (MCU_BASE + 0x00019418U) +#define MCU_HBGSLVER_CS5_HBGKCPROT (MCU_BASE + 0x00019518U) +#define MCU_HBGSLVER_DS_HBGKCPROT (MCU_BASE + 0x00019618U) +#define MCU_HBGSLVER_PFS_HBGKCPROT (MCU_BASE + 0x00019718U) +#define MCU_HBGSLVER_SOCM_HBGKCPROT (MCU_BASE + 0x00019818U) +#define MCU_HBGSLVER_SOCS_HBGKCPROT (MCU_BASE + 0x00019918U) + +/* PBG (0xD8F01800) */ +#define MCUAXI_PBG_PBGPROT0_0 (MCU_BASE + 0x1800U) +#define MCUAXI_PBG_PBGPROT0_1 (MCU_BASE + 0x1808U) +#define MCUAXI_PBG_PBGPROT0_2 (MCU_BASE + 0x1810U) +#define MCUAXI_PBG_PBGPROT0_3 (MCU_BASE + 0x1818U) +#define MCUAXI_PBG_PBGPROT0_4 (MCU_BASE + 0x1820U) +#define MCUAXI_PBG_PBGPROT0_5 (MCU_BASE + 0x1828U) +#define MCUAXI_PBG_PBGPROT0_6 (MCU_BASE + 0x1830U) +#define MCUAXI_PBG_ERRSLV_PBGKCPROT (MCU_BASE + 0x00018118U) + + +/* CSRM (0xD8F10000) */ +#define MCU_CSRM0ECCCTL (MCU_BASE + 0x00010000U) +#define MCU_CSRM1ECCCTL (MCU_BASE + 0x00010100U) +#define MCU_CSRM2ECCCTL (MCU_BASE + 0x00010200U) +#define MCU_CSRM3ECCCTL (MCU_BASE + 0x00010300U) +#define MCU_CSRM4ECCCTL (MCU_BASE + 0x00010400U) +#define MCU_CSRM5ECCCTL (MCU_BASE + 0x00010500U) +#define MCU_CSRM0APCTL (MCU_BASE + 0x00010050U) +#define MCU_CSRM1APCTL (MCU_BASE + 0x00010150U) +#define MCU_CSRM2APCTL (MCU_BASE + 0x00010250U) +#define MCU_CSRM3APCTL (MCU_BASE + 0x00010350U) +#define MCU_CSRM4APCTL (MCU_BASE + 0x00010450U) +#define MCU_CSRM5APCTL (MCU_BASE + 0x00010550U) +#define MCU_CSRM0CSIFCODE (MCU_BASE + 0x00010080U) +#define MCU_CSRM1CSIFCODE (MCU_BASE + 0x00010180U) +#define MCU_CSRM2CSIFCODE (MCU_BASE + 0x00010280U) +#define MCU_CSRM3CSIFCODE (MCU_BASE + 0x00010380U) +#define MCU_CSRM4CSIFCODE (MCU_BASE + 0x00010480U) +#define MCU_CSRM5CSIFCODE (MCU_BASE + 0x00010580U) + +#endif /* MCU_REGISTER_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mem_io.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mem_io.h new file mode 100644 index 00000000..1ab5cbd1 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mem_io.h @@ -0,0 +1,84 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Memory access driver header + ******************************************************************************/ +#ifndef MEM_IO_H_ +#define MEM_IO_H_ + +#include + +static inline void mem_write8(uintptr_t addr, uint8_t data) +{ + *(volatile uint8_t*)addr = data; +} + +static inline uint8_t mem_read8(uintptr_t addr) +{ + return (*(volatile uint8_t*)addr); +} + +static inline void mem_write16(uintptr_t addr, uint16_t data) +{ + *(volatile uint16_t*)addr = data; +} + +static inline uint16_t mem_read16(uintptr_t addr) +{ + return (*(volatile uint16_t*)addr); +} + +static inline void mem_write32(uintptr_t addr, uint32_t data) +{ + *(volatile uint32_t*)addr = data; +} + +static inline uint32_t mem_read32(uintptr_t addr) +{ + return (*(volatile uint32_t*)addr); +} + +static inline void mem_write64(uintptr_t addr, uint64_t data) +{ + *(volatile uint64_t*)addr = data; +} + +static inline uint64_t mem_read64(uintptr_t addr) +{ + return (*(volatile uint64_t*)addr); +} + +static inline void mem_bitclrset32(uintptr_t addr, uint32_t clr, uint32_t set) +{ + mem_write32(addr, (mem_read32(addr) & ~clr) | set); +} + +#if defined(__RH850G3K__) +#define mmio_write_32(a,b) mem_write32(a,b) +#define mmio_read_32(a) mem_read32(a) +#define mmio_clrsetbits_32(a,b,c) mem_bitclrset32(a,b,c) +#endif + + +#endif /* MEM_IO_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis.h new file mode 100644 index 00000000..52ed3369 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis.h @@ -0,0 +1,39 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : MFIS driver header + ******************************************************************************/ + +#ifndef MFIS_H__ +#define MFIS_H__ + +/************************************************************************************************/ +/* Definitions */ +/************************************************************************************************/ + +void mfis_init(void); +void mfis_lock(void); +void mfis_unlock(void); + +#endif /* MFIS_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis_register.h new file mode 100644 index 00000000..cd93e2f5 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/mfis_register.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : MFIS register header + ******************************************************************************/ + +#ifndef MFIS_REGISTER_H__ +#define MFIS_REGISTER_H__ + +#include + +/* The Base is remapped in the IPL, and the address is calculated and accessed + * by adding the offset to the remapped address. */ +#define MFIS_BASE (BASE_MFIS_ADDR) + +#define MFISLCKR_ADDRESS (0x0800U) /* MFISLCKR[j] Address 0x724 +(4U*(63U-8U)) */ + +/* Register Definition */ +#define MFIS_LCKR (MFIS_BASE + MFISLCKR_ADDRESS) /* MFIS Lock Register */ +#define MFIS_WPCNTR (MFIS_BASE + 0x0900U) /* Write Protection Control Register */ +#define MFIS_WACNTR (MFIS_BASE + 0x0904U) /* Write Access Control Register */ + + +#endif /* MFIS_REGISTER_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/micro_wait.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/micro_wait.h new file mode 100644 index 00000000..a16a913d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/micro_wait.h @@ -0,0 +1,39 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Time wait driver header + ******************************************************************************/ + +#ifndef MICRO_WAIT_H_ +#define MICRO_WAIT_H_ + +#include + +/* Define */ + +/* Prototype */ +void micro_wait(uint32_t count_us); + + +#endif /* MICRO_WAIT_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc.h new file mode 100644 index 00000000..4c5b9702 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc.h @@ -0,0 +1,41 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : PFC driver header + ******************************************************************************/ + +#ifndef PFC_H__ +#define PFC_H__ + +#include +#include +#include + +static inline void pfc_reg_write(uint32_t addr, uint32_t data) +{ + mem_write32(get_pmmr_addr(addr), ~data); + mem_write32(addr, data); +} + +#endif /* PFC_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/pfc_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/qos.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/qos.h new file mode 100644 index 00000000..2992d656 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/qos.h @@ -0,0 +1,33 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : QoS driver header + ******************************************************************************/ + +#ifndef QOS_INIT_H_ +#define QOS_INIT_H_ + +extern void qos_init(void); + +#endif /* QOS_INIT_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_def.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_protection.h new file mode 100644 index 00000000..287e9d47 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/ram_protection.h @@ -0,0 +1,162 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RAM protection driver header + ******************************************************************************/ +#ifndef RAM_PROTECTION_H_ +#define RAM_PROTECTION_H_ + +#include +#include + +#define RTSRAM_AREA1_TOP (0xE0040000U) +#define RTSRAM_ADDR_END (0xE0100000U) +#if (RCAR_LSI == RCAR_S4) +#define RTSRAM_ADDR_OFFSET_MASK (0x000FF000U) +#else +#define RTSRAM_ADDR_OFFSET_MASK (0xFFFFF000U) +#endif +#define RTVRAM_AREA1_TOP (0xE2010000U) +#define RTVRAM_AREA2_TOP (0xE2100000U) +#define RTVRAM_ADDR_END (0xE3C00000U) +#define RTVRAM_ADDR_MASK (0xFFFFF000U) +#if (RCAR_LSI == RCAR_S4) +#define SYSTEM_RAM_ADDR_END (0xE6360000U) +#else /* (RCAR_LSI == RCAR_S4) */ +/* For V4H/V4M */ +#define SYSTEM_RAM_AREA1_TOP (0xE635E000U) +#define SYSTEM_RAM_AREA2_TOP (0xE6360000U) +#define SYSTEM_RAM_ADDR_END (0xE6400000U) +#endif /* (RCAR_LSI == RCAR_S4) */ +#define SYSTEM_RAM_ADDR_MASK (0xFFFFF000U) +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define DRAM_ADDR_AREA1 (0x0401C00000ULL) +#define DRAM_ADDR_AREA2 (0x0401D00000ULL) +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +#define DRAM_ADDR_AREA3 (0x0406400000ULL) +#define DRAM_ADDR_AREA4 (0x0406440000ULL) +#define DRAM_ADDR_AREA5 (0x0407FC0000ULL) +#define DRAM_ADDR_AREA6 (0x0408000000ULL) +#define DRAM_ADDR_AREA7 (0x041DC00000ULL) +#define DRAM_ADDR_AREA8 (0x0420000000ULL) +#define DRAM_ADDR_AREA9 (0x0440000000ULL) +#define DRAM_ADDR_AREA10 (0x0460000000ULL) +#define DRAM_ADDR_AREA11 (0x0480000000ULL) +#define DRAM_ADDR_AREA12 (0x0500000000ULL) +#define DRAM_ADDR_AREA13 (0x0600000000ULL) +#else +#define DRAM_ADDR_AREA3 (0x0404100000ULL) +#define DRAM_ADDR_AREA4 (0x0406400000ULL) +#define DRAM_ADDR_AREA5 (0x0406440000ULL) +#define DRAM_ADDR_AREA6 (0x0407E00000ULL) +#define DRAM_ADDR_AREA7 (0x0407F00000ULL) +#define DRAM_ADDR_AREA8 (0x0407FC0000ULL) +#define DRAM_ADDR_AREA9 (0x0408000000ULL) +#define DRAM_ADDR_AREA10 (0x041DC00000ULL) +#define DRAM_ADDR_AREA11 (0x0420000000ULL) +#define DRAM_ADDR_AREA12 (0x0440000000ULL) +#define DRAM_ADDR_AREA13 (0x0460000000ULL) +#define DRAM_ADDR_AREA14 (0x0480000000ULL) +#define DRAM_ADDR_AREA15 (0x0500000000ULL) +#define DRAM_ADDR_AREA16 (0x0600000000ULL) +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +#else +#define DRAM_ADDR_AREA1 (0x0401C00000ULL) +#define DRAM_ADDR_AREA2 (0x0406400000ULL) +#define DRAM_ADDR_AREA3 (0x0406440000ULL) +#endif /* ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) */ +#define DRAM_ADDR_END (0x0700000000ULL) +#define SDRAM_ADDR_MASK (0x3FFFFF0000ULL) + +#define NOT_USED_VALUE (0x00000000U) + +/* For System RAM protection setting */ +#define REGIONID0_WRITE_PRIVILEGE (0x00000001U) /* bit0 */ + +/* RAM DIVISION AREA ID */ +/* RT-SRAM */ +#define RTSRAM_ICUMX_IPL_AREA (0U) /* 0xE0000000 -- 0xE003FFFF */ +#define RTSRAM_ICUMX_FW_AREA (1U) /* 0xE0040000 -- 0xE00FFFFF */ +/* RT-VRAM */ +#define RTVRAM_BLANK_AREA (0U) /* 0xE2000000 -- 0xE200FFFF */ +#define RTVRAM_EXTEND_CACHE_AREA (1U) /* 0xE2010000 -- 0xE20FFFFF */ +#define RTVRAM_RTOS_AREA (2U) /* 0xE2100000 -- 0xE3BFFFFF */ +/* System RAM */ +#define SYSTEM_RAM_CX_2ND_IPL (0U) /* 0xE6300000 -- 0xE635DFFF */ +#define SYSTEM_RAM_SHARED_MEM (1U) /* 0xE635E000 -- 0xE635FFFF */ +/* SDRAM */ +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define RTVRAM_EXTEND_AREA (0U) /* 0x04_00000000 -- 0x04_01BFFFFF */ +#define CR_FW_SHARED_AREA (1U) /* 0x04_01C00000 -- 0x04_01CFFFFF */ +#define SDRAM_BLANK_AREA (2U) /* OPTEE_DISABLE:0x04_01D00000 -- 0x04_063FFFFF + * OPTEE_ENABLE :0x04_01D00000 -- 0x04_040FFFFF */ +#define SDRAM_PROTECT_AREA (3U) /* OPTEE_DISABLE:0x04_06400000 -- 0x04_0643FFFF + * OPTEE_ENABLE :0x04_04100000 -- 0x04_0643FFFF */ +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +#define SDRAM_PUBLIC_AREA (4U) /* 0x04_06440000 -- 0x04_07FBFFFF */ +#define ICCOM_USED_AREA (5U) /* 0x04_07FC0000 -- 0x04_07FFFFFF */ +#define LINUX_USED_AREA (6U) /* 0x04_08000000 -- 0x04_1DBFFFFF */ +#define CAAREA2_USED_AREA (7U) /* 0x04_1DC00000 -- 0x04_1FFFFFFF */ +#define CR52_USED_AREA (8U) /* 0x04_20000000 -- 0x04_3FFFFFFF */ +#define CAAREA3_USED_AREA (9U) /* 0x04_40000000 -- 0x04_5FFFFFFF */ +#define CAAREA2_USED_AREA2 (10U) /* 0x04_60000000 -- 0x04_7FFFFFFF */ +#define CAAREA1_USED_AREA (11U) /* 0x04_80000000 -- 0x04_FFFFFFFF */ +#else +#define SDRAM_PROTECT_AREA2 (4U) /* 0x04_06400000 -- 0x04_0643FFFF */ +#define SDRAM_BLANK_AREA2 (5U) /* 0x04_06440000 -- 0x04_07DFFFFF */ +#define OPTEE_SHARED_AREA (6U) /* 0x04_07E00000 -- 0x04_07EFFFFF */ +#define SDRAM_BLANK_AREA3 (7U) /* 0x04_07F00000 -- 0x04_07FBFFFF */ +#define ICCOM_USED_AREA (8U) /* 0x04_07FC0000 -- 0x04_07FFFFFF */ +#define LINUX_USED_AREA (9U) /* 0x04_08000000 -- 0x04_1DBFFFFF */ +#define CAAREA2_USED_AREA (10U) /* 0x04_1DC00000 -- 0x04_1FFFFFFF */ +#define CR52_USED_AREA (11U) /* 0x04_20000000 -- 0x04_3FFFFFFF */ +#define CAAREA3_USED_AREA (12U) /* 0x04_40000000 -- 0x04_5FFFFFFF */ +#define CAAREA2_USED_AREA2 (13U) /* 0x04_60000000 -- 0x04_7FFFFFFF */ +#define CAAREA1_USED_AREA (14U) /* 0x04_80000000 -- 0x04_FFFFFFFF */ +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +#if (RCAR_LSI == RCAR_V4H) +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +#define RESERVERD_AREA (12U) /* 0x05_00000000 -- 0x05_FFFFFFFF */ +#define CAAREA1_USED_AREA2 (13U) /* 0x06_00000000 -- 0x06_FFFFFFFF */ +#else +#define RESERVERD_AREA (15U) /* 0x05_00000000 -- 0x05_FFFFFFFF */ +#define CAAREA1_USED_AREA2 (16U) /* 0x06_00000000 -- 0x06_FFFFFFFF */ +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +#elif (RCAR_LSI == RCAR_V4M) +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +#define CAAREA1_USED_AREA2 (12U) /* 0x05_00000000 -- 0x05_FFFFFFFF */ +#define RESERVERD_AREA (13U) /* 0x06_00000000 -- 0x06_FFFFFFFF */ +#else +#define CAAREA1_USED_AREA2 (15U) /* 0x05_00000000 -- 0x05_FFFFFFFF */ +#define RESERVERD_AREA (16U) /* 0x06_00000000 -- 0x06_FFFFFFFF */ +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +#endif /* RCAR_LSI == RCAR_V4H */ +#else +#define RTVRAM_EXTEND_AREA (0U) /* 0x04_00000000 -- 0x04_01BFFFFF */ +#define SDRAM_BLANK_AREA (1U) /* 0x04_01C00000 -- 0x04_063FFFFF */ +#define SDRAM_PROTECT_AREA (2U) /* 0x04_06400000 -- 0x04_0643FFFF */ +#define SDRAM_PUBLIC_AREA (3U) /* 0x04_06440000 -- 0x06_FFFFFFFF */ +#endif /* ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) */ + +#endif /* RAM_PROTECTION_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rcar_def.h new file mode 100644 index 00000000..ada224c3 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rcar_def.h @@ -0,0 +1,51 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : R-Car common header + ******************************************************************************/ + +#ifndef RCAR_DEF_H_ +#define RCAR_DEF_H_ + +#include "remap_register.h" + +/* Product Register */ +#define PRR (0xFFF00044U) /* PRR register */ +#define PRR_CA_CL3_STATE_MASK (0x80000000U) /* Cortex-A Cluster 3 State */ +#define PRR_PRODUCT_MASK (0x00007F00U) /* Product mask */ +#define PRR_CUT_MASK (0x000000FFU) /* Cut Number bit mask */ +#define PRR_MAJOR_MASK (0x000000F0U) /* Major bit mask */ +#define PRR_MINOR_MASK (0x0000000FU) /* Minor bit mask */ +#define PRR_MAJOR_SHIFT (4U) /* Major bit shift */ +#define PRR_MAJOR_OFFSET (1U) + +#define PRR_PRODUCT_S4 (0x00005A00U) /* R-Car S4 */ +#define PRR_PRODUCT_V4H (0x00005C00U) /* R-Car V4H */ +#define PRR_PRODUCT_V4M (0x00005D00U) /* R-Car V4M */ + +#define PRR_PRODUCT_10 (0x00000000U) /* ver 1.0 */ +#define PRR_PRODUCT_11 (0x00000001U) /* ver 1.1 */ +#define PRR_PRODUCT_20 (0x00000010U) /* ver 2.0 */ +#endif /* RCAR_DEF_H_ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap.h new file mode 100644 index 00000000..03fb5e68 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap.h @@ -0,0 +1,48 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : remap driver header + ******************************************************************************/ +#ifndef REMAP_H_ +#define REMAP_H_ + +#define ICUMX_CTLREG_BASE (0xFFFEE200U) +#define ICUMX_CFREMAP (ICUMX_CTLREG_BASE + 0x4CU) +#define CFREMAP_AREA_SIZE (0x02000000U) + +#include + +typedef struct{ + uint32_t base_addr; /* Base address of Region ID registers. */ + uint32_t rmp_addr; /* Stores the address converted from the Region ID base address to SICREMAP address. */ +} REMAP_TABLE; + +uint32_t remap_get_phys_addr(uint32_t remap_addr); +uint32_t get_cfremap_addr(uint32_t fetch_addr); +uint32_t remap_get_remap_addr(uint32_t phys_addr); +void remap_register(uint32_t addr, uint32_t *remap_addr); +void remap_unregister(uint32_t remap_addr); +void set_sicremap_s4v10(void); +void set_sicremap_fcpr(void); +#endif /* REMAP_H_ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/remap_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rom_api.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rom_api.h new file mode 100644 index 00000000..b87365e8 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rom_api.h @@ -0,0 +1,73 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : boot ROM API header + ******************************************************************************/ +#ifndef ROM_API_H__ +#define ROM_API_H__ + +#include +#include + +#define SECURE_BOOT (0x0U) +#define NORMAL_BOOT (0x211883DFU) + +#define ROMAPI_OK (0x00000000U) +#define ROM_ERR_IMG_VERIFIER_NO_ENCRYPT_IMG (0xF100001DU) + +#define LCS_CM (0x00000000U) /* CM */ +#define LCS_DM (0x00000001U) /* DM */ +#define LCS_SD (0x00000003U) /* SD */ +#define LCS_SE (0x00000005U) /* SE */ +#define LCS_FA (0x00000007U) /* FA */ + +/* BOOTROM API address */ +#define ROM_GETLCS (0x01104418U) +#define ROM_SECUREBOOT_VERIFY (0x011044C8U) +#define ROM_SECUREBOOT_DECRYPT (0x011044D0U) +#define ROM_SECUREBOOT_COMPARE (0x011044D8U) + +/* For build option SW_VERSION_CHECK */ +#define OPT_VERSION_CHECK_ENABLE (1U) + +typedef uint32_t (*ROM_SECUREBOOT_VERIFY_API)(uint32_t *pKeyCert, uint32_t *pContentCert); +typedef uint32_t (*ROM_SECUREBOOT_DECRYPT_API)(uint32_t *pContentCert); +typedef uint32_t (*ROM_SECUREBOOT_COMPARE_API)(uint32_t *pContentCert, + uint32_t *hash, + uint32_t hash_size); +typedef uint32_t (*ROM_GETLCS_API)(uint32_t *pLcs, uint32_t lcs_size); + +static inline uint32_t get_load_info_id(const LOAD_INFO *li) +{ + return ((li->cnt_cert_addr - (SA9_DEST_ADDR + CONTENT_CERT_OFFSET)) / CONTENT_CERT_SIZE); +} +/* End of function get_load_info_id(LOAD_INFO *li) */ + +void rom_secureboot(LOAD_INFO* li); +uint32_t call_ROM_GetLcs(uint32_t *pLcs, uint32_t lcs_size); +void sw_version_check(const LOAD_INFO* li); +void auth_min_ver_tbl(LOAD_INFO* li); +void preload_verify_cntcert(const LOAD_INFO* li); + +#endif /* ROM_API_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rpc_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rst_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rst_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rst_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rst_register.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtsram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtsram_register.h new file mode 100644 index 00000000..5dc6825d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtsram_register.h @@ -0,0 +1,65 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RT-SRAM register header + ******************************************************************************/ + +#ifndef RTSRAM_REGISTER_H__ +#define RTSRAM_REGISTER_H__ + +#include + +/* RT-SRAM register base address */ +#define RTSRAM_REG_BASE (0xFFE90000U) + +#define RTSRAM_SECDIVD (RTSRAM_REG_BASE + 0x0000U) +#define RTSRAM_SECCTRRD (RTSRAM_REG_BASE + 0x0040U) +#define RTSRAM_SECCTRWD (RTSRAM_REG_BASE + 0x0340U) + +#if (RCAR_LSI == RCAR_S4) +#define RTSRAM_SECDIVD_DIVADDR_MASK (0x000000FFU) +#else +#define RTSRAM_SECDIVD_DIVADDR_MASK (0x000FFFFFU) +#endif +#define RTSRAM_SECCTRRD_SECGRP_MASK (0x000F0000U) +#define RTSRAM_SECCTRRD_SAFGRP_MASK (0x0000FFFFU) +#define RTSRAM_SECCTRWD_SECGRP_MASK (0x000F0000U) +#define RTSRAM_SECCTRWD_SAFGRP_MASK (0x0000FFFFU) + +static inline uint32_t get_rtsram_secdivd_addr(uint32_t num) +{ + return ((RTSRAM_SECDIVD + (num * 4U))); +} + +static inline uint32_t get_rtsram_secctrrd_addr(uint32_t num) +{ + return ((RTSRAM_SECCTRRD + (num * 4U))); +} + +static inline uint32_t get_rtsram_secctrwd_addr(uint32_t num) +{ + return ((RTSRAM_SECCTRWD + (num * 4U))); +} + +#endif /* RTSRAM_REGISTER_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram.h new file mode 100644 index 00000000..1ee2ecc1 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram.h @@ -0,0 +1,35 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RT-VRAM driver header + ******************************************************************************/ + +#ifndef RTVRAM_H_ +#define RTVRAM_H_ + +#include + +void rtvram_extendmode(void); + +#endif /* RTVRAM_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram_register.h new file mode 100644 index 00000000..42d4a689 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/rtvram_register.h @@ -0,0 +1,70 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RT-VRAM register header + ******************************************************************************/ + +#ifndef RTVRAM_REGISTER_H__ +#define RTVRAM_REGISTER_H__ + +#include + +/* RT-VRAM register base address */ +#define RTVRAM_REG_BASE (0xFFEC0000U) + +#define RTVRAM_SECDIVD (RTVRAM_REG_BASE + 0x0000U) +#define RTVRAM_SECCTRRD (RTVRAM_REG_BASE + 0x0040U) +#define RTVRAM_SECCTRWD (RTVRAM_REG_BASE + 0x0340U) +#define RTVRAM_EXT_MODE (RTVRAM_REG_BASE + 0x8500U) +#define RTVRAM_VBUF_CFG (RTVRAM_REG_BASE + 0x6504U) +#define RTVRAM_CACHE_FLUSH (RTVRAM_REG_BASE + 0x4530U) +#define RTVRAM_VBUF_BADDR (RTVRAM_REG_BASE + 0xC580U) + +#define RTVRAM_SECDIVD_DIVADDR_MASK (0x000FFFFFU) +#define RTVRAM_SECCTRRD_SECGRP_MASK (0x000F0000U) +#define RTVRAM_SECCTRRD_SAFGRP_MASK (0x0000FFFFU) +#define RTVRAM_SECCTRWD_SECGRP_MASK (0x000F0000U) +#define RTVRAM_SECCTRWD_SAFGRP_MASK (0x0000FFFFU) + +static inline uint32_t get_rtvram_secdivd_addr(uint32_t num) +{ + return ((RTVRAM_SECDIVD + (num * 4U))); +} + +static inline uint32_t get_rtvram_secctrrd_addr(uint32_t num) +{ + return ((RTVRAM_SECCTRRD + (num * 4U))); +} + +static inline uint32_t get_rtvram_secctrwd_addr(uint32_t num) +{ + return ((RTVRAM_SECCTRWD + (num * 4U))); +} + +static inline uint32_t get_vbuf_baddr_addr(uint32_t num) +{ + return ((RTVRAM_VBUF_BADDR + (num * 4U))); +} + +#endif /* RTVRAM_REGISTER_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif.h new file mode 100644 index 00000000..9aae4e9b --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif.h @@ -0,0 +1,38 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : SCIF driver header + ******************************************************************************/ + +#ifndef SCIF_H_ +#define SCIF_H_ + +#include +#include + +/* Prototype */ +void scif_init(void); +void console_putc(uint8_t outchar); + +#endif /* SCIF_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif_register.h new file mode 100644 index 00000000..f3278c64 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/scif_register.h @@ -0,0 +1,47 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : SCIF register header + ******************************************************************************/ + + +#ifndef SCIF_REGISTER_H_ +#define SCIF_REGISTER_H_ + +#include + +/* SCIF base address */ +/* S4:0xE6C50000(CH3), V4H:0xE6E60000(CH0) */ +#define SCIF_BASE (BASE_SCIF_ADDR) + +#define SCIF_SCSMR (SCIF_BASE + 0x0000U) /* 16 Serial mode register */ +#define SCIF_SCBRR (SCIF_BASE + 0x0004U) /* 8 Bit rate register */ +#define SCIF_SCSCR (SCIF_BASE + 0x0008U) /* 16 Serial control register */ +#define SCIF_SCFTDR (SCIF_BASE + 0x000CU) /* 8 Transmit FIFO data register */ +#define SCIF_SCFSR (SCIF_BASE + 0x0010U) /* 16 Serial status register */ +#define SCIF_SCFCR (SCIF_BASE + 0x0018U) /* 16 FIFO control register */ +#define SCIF_SCLSR (SCIF_BASE + 0x0024U) /* 16 Line status register */ +#define SCIF_CKS (SCIF_BASE + 0x0034U) /* 16 Clock Select register */ + +#endif /* SCIF_REGISTER_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/sysc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/sysc.h new file mode 100644 index 00000000..4dcbd043 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/sysc.h @@ -0,0 +1,71 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* Copyright 2023-2025 Renesas Electronics Corporation All rights reserved. +*******************************************************************************/ + + + +/******************************************************************************* + * DESCRIPTION : sysc header + ******************************************************************************/ +/****************************************************************************** + * @file sysc.h + * - Version : 0.02 + * @brief + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 29.09.2023 0.01 First Release + * : 08.01.2025 0.02 Add write protection register definition. + *****************************************************************************/ +#ifndef SYSC_H_ +#define SYSC_H_ + +#include +#include + +#define BASE_SYSC (BASE_SYSC_ADDR) /* SYSC logical address 0xFDB80000 */ + /* SYSC physical address 0xE6180000 */ +#if (RCAR_LSI == RCAR_V4M) +#define SYSC_SYSCSR (BASE_SYSC + 0x0000U) +#define SYSC_SYSCISCR0 (BASE_SYSC + 0x0810U) +#define SYSC_SYSCIER0 (BASE_SYSC + 0x0820U) +#define SYSC_SYSCIMR0 (BASE_SYSC + 0x0830U) +#define SYSC_PDRONCR31 (BASE_SYSC + 0x1004U + (31U * 64U)) /* Power Domain:C4 */ +#endif /* RCAR_LSI == RCAR_V4M */ +#define SYSC_SYSCD1WACR0 (BASE_SYSC + 0x3020U) +#define SYSC_SYSCD2WACR0 (BASE_SYSC + 0x3040U) +#define SYSC_SYSCD3WACR0 (BASE_SYSC + 0x3060U) + +#if (RCAR_LSI == RCAR_V4M) +#define SYSCIER0_PDR31 (0x80000000U) /* Bit31 */ +#define SYSCIMR0_PDR31 (0x80000000U) /* Bit31 */ +#define SYSCISCR0_PDR31 (0x80000000U) /* Bit31 */ +#define SYSCSR_BUSY1 (0x00000002U) /* Bit1 */ +#define PDRONCR31_PWRON (0x00000001U) /* Bit0 */ +#endif /* RCAR_LSI == RCAR_V4M */ + +/* Prototype */ +#if (RCAR_LSI == RCAR_V4M) +void sysc_c4_power_on(void); +#endif /* RCAR_LSI == RCAR_V4M */ +#endif /* SYSC_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/types.h new file mode 100644 index 00000000..8a34d4c6 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/types.h @@ -0,0 +1,57 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Types Define header + ******************************************************************************/ + + +#ifndef TYPES_H +#define TYPES_H + +#ifdef __cplusplus +extern "C" +{ +#endif + +/**************************************************************************** + * File Name: types.h + * Contents : Types Define + ****************************************************************************/ +#include +#include + +#ifndef FALSE +#define FALSE (0U) +#endif + +#ifndef TRUE +#define TRUE (1U) +#endif + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/vect_set.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/vect_set.h new file mode 100644 index 00000000..b90dbc2d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/vect_set.h @@ -0,0 +1,35 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Set vector table function header + ******************************************************************************/ + +#ifndef VECT_SET_H__ +#define VECT_SET_H__ + +extern char __ghsbegin_EIINTTBL_ICU[]; + +void set_vect_table(void); + +#endif /* VECT_SET_H__ */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/wdt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/wdt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/wdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/include/wdt.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/intc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/intc.c new file mode 100644 index 00000000..aca25762 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/intc.c @@ -0,0 +1,155 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Interrupt controler driver + ******************************************************************************/ +/****************************************************************************** + * @file intc.c + * - Version : 0.02 + * @brief Interrupt controler driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 06.01.2022 0.01 First Release + * : 05,04.2023 0.02 Remove string.h + *****************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include + +#define INTC_EI_MAX (64U) +#define INTC_EI_ID_MASK (0xFFU) + +#define ICUMX_IC_MK_BIT (0x0080U) /* Interrupt request mask */ +#define ICUMX_IC_TB_BIT (0x0040U) /* Vector table selection system */ +#define ICUMX_IC_PRIORITY_MASK (0x0007U) + +#define INT_FLG_ENABLE (0x10U) +#define INT_FLG_DISABLE (0x00U) + +#define EXCEPTION_SOURCE_CODE_BIT (0x1000U) + + +typedef struct { + INT_HANDLER handler; + uint32_t arg; + uint32_t flg; +} INTC_HDR_TBL; + +static INTC_HDR_TBL s_intc_tbl[INTC_EI_MAX]; + +void intc_set_interrupt(uint32_t int_no, uint32_t level, INT_HANDLER cb) +{ + uint16_t reg; + __DI(); + + /* check Exception Source code */ + if (INTC_EI_MAX <= int_no) + { + ERROR("Undefined Exception Source code error.(0x%x)\n", int_no); + panic; + } + + /* set interrupt handler */ + s_intc_tbl[int_no].handler = cb; + s_intc_tbl[int_no].flg = INT_FLG_ENABLE; + + /* the interrupt enable */ + reg = mem_read16(get_icumx_ic_addr(int_no)); + reg &= (~(ICUMX_IC_MK_BIT) | ICUMX_IC_PRIORITY_MASK); + reg |= (ICUMX_IC_TB_BIT | (level & ICUMX_IC_PRIORITY_MASK)); + mem_write16(get_icumx_ic_addr(int_no), reg); + + __EI(); +} +/* End of function intc_set_interrupt(uint32_t int_no, uint32_t level, INT_HANDLER cb) */ + + +void intc_disable_interrupt(uint32_t int_no) +{ + uint16_t reg; + __DI(); + + /* check Exception Source code */ + if (INTC_EI_MAX <= int_no) + { + ERROR("Undefined Exception Source code error.(0x%x)\n", int_no); + panic; + } + + /* check interrupt enable flag */ + if (INT_FLG_DISABLE == (s_intc_tbl[int_no].flg & INT_FLG_ENABLE)) + { + ERROR("Execption disabled.(0x%x)\n", int_no); + panic; + } + + /* the interrupt disable */ + s_intc_tbl[int_no].flg &= ~INT_FLG_ENABLE; + reg = mem_read16(get_icumx_ic_addr(int_no)); + reg &= ~(ICUMX_IC_TB_BIT); + reg |= ICUMX_IC_MK_BIT; + mem_write16(get_icumx_ic_addr(int_no), reg); + + __EI(); +} +/* End of function intc_disable_interrupt(uint32_t int_no) */ + +#pragma ghs interrupt(nonreentrant) +void intc_handler(void) +{ + uint32_t reg; + uint32_t int_no; + reg = __STSR(EIIC); + + /* check Exception Source code */ + if ((reg & EXCEPTION_SOURCE_CODE_BIT) == 0U) + { + ERROR("Undefined Exception Source code error.(0x%x)\n", reg); + panic; + } + int_no = reg & INTC_EI_ID_MASK; + if (INTC_EI_MAX <= int_no) + { + ERROR("Undefined Exception Source code error.(0x%x)\n", int_no); + panic; + } + + /* check interrupt enable flag */ + if (INT_FLG_DISABLE == (s_intc_tbl[int_no].flg & INT_FLG_ENABLE)) + { + ERROR("Execption disabled.(0x%x)\n", int_no); + panic; + } + + /* execute interrupt handler */ + s_intc_tbl[int_no].handler(int_no, s_intc_tbl[int_no].arg); +} +/* End of function intc_handler(void) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vect_set.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vect_set.c new file mode 100644 index 00000000..cb7b7ec9 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vect_set.c @@ -0,0 +1,50 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Set vector table function + ******************************************************************************/ +/****************************************************************************** + * @file vect_set.c + * - Version : 0.01 + * @brief Set vector table function. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 06.01.2022 0.01 First Release + *****************************************************************************/ +#include +#include +#include "intc.h" +#include "vect_set.h" +#include "cpu.h" +#include "rst_register.h" +#include "mem_io.h" + +void set_vect_table(void) +{ + /* set interrupt table */ + __LDSR(INTBP, (uint32_t)&__ghsbegin_EIINTTBL_ICU[0]); +} +/* End of function set_vect_table(void) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vecttbl.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vecttbl.S new file mode 100644 index 00000000..4128399b --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/intc/vecttbl.S @@ -0,0 +1,181 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader vector table + ******************************************************************************/ + + .global code_start + .global intc_handler + + .section ".reset" + .align 512 + .align 16 +_start: + jr32 code_start //RESET + .align 16 + jr32 _Dummy //SYSERR + .align 16 + jr32 _Dummy //HVTRAP + .align 16 + jr32 _Dummy //FETRAP + .align 16 + jr32 _Dummy //TRAP0 + .align 16 + jr32 _Dummy //TRAP1 + .align 16 + jr32 _Dummy //RIE + .align 16 + jr32 _Dummy //FPP/FPI + .align 16 + jr32 _Dummy //UCPOP + .align 16 + jr32 _Dummy //MIP/MDP + .align 16 + jr32 _Dummy //PIE + .align 16 + jr32 _Dummy //Debug + .align 16 + jr32 _Dummy //MAE + .align 16 + jr32 _Dummy //(R.F.U) + .align 16 + jr32 _Dummy //FENMI + .align 16 + jr32 _Dummy //FEINT + .align 16 + jr32 _Dummy //INTn(priority0) + .align 16 + jr32 _Dummy //INTn(priority1) + .align 16 + jr32 _Dummy //INTn(priority2) + .align 16 + jr32 _Dummy //INTn(priority3) + .align 16 + jr32 _Dummy //INTn(priority4) + .align 16 + jr32 _Dummy //INTn(priority5) + .align 16 + jr32 _Dummy //INTn(priority6) + .align 16 + jr32 _Dummy //INTn(priority7) + .align 16 + jr32 _Dummy //INTn(priority8) + .align 16 + jr32 _Dummy //INTn(priority9) + .align 16 + jr32 _Dummy //INTn(priority10) + .align 16 + jr32 _Dummy //INTn(priority11) + .align 16 + jr32 _Dummy //INTn(priority12) + .align 16 + jr32 _Dummy //INTn(priority13) + .align 16 + jr32 _Dummy //INTn(priority14) + .align 16 + jr32 _Dummy //INTn(priority15) + + .section ".EIINTTBL_ICU", const + .align 512 +.offset 0x0000 + .word _intc_handler /* 0 : INTICUECCLRAM */ +.offset 0x0004 + .word _intc_handler /* 1 : INTICUECCCRAM */ +.offset 0x0008 + .word _intc_handler /* 2 : INTICUEDCAXI */ +.offset 0x000C + .word _intc_handler /* 3 : INTICUECCAXIAB */ +.offset 0x0010 + .word _intc_handler /* 4 : INTICUECCPKRAM */ +.offset 0x0014 + .word _intc_handler /* 5 : INTPES */ +.offset 0x0018 + .word _intc_handler /* 6 : INTPE */ +.offset 0x001C + .word _intc_handler /* 7 : INTICUAESD0RD */ +.offset 0x0020 + .word _intc_handler /* 8 : Reserved */ +.offset 0x0024 + .word _intc_handler /* 9 : INTICUTRNGE0 */ +.offset 0x0028 + .word _intc_handler /* 10 : INTICUOSTM0 */ +.offset 0x002C + .word _intc_handler /* 11 : INTICUOSTM1 */ +.offset 0x0030 + .word _intc_handler /* 12 : INTICUWDTA0 */ +.offset 0x0034 + .word _intc_handler /* 13 : INTICUPKCCA0 */ +.offset 0x0038 + .word _intc_handler /* 14 : INTICUDMACA0 */ +.offset 0x003C + .word _intc_handler /* 15 : INTICUDMACA0AXI */ +.offset 0x0040 + .word _intc_handler /* 16 : Reserved */ +.offset 0x0044 + .word _intc_handler /* 17 : INTICUSHAA0IREQ */ +.offset 0x0048 + .word _intc_handler /* 18 : INTICUSHAA0OEND */ +.offset 0x004C + .word _intc_handler /* 19 : INTICUCRCDRQA */ +.offset 0x0050 + .word _intc_handler /* 20 : INTICUCRRDRQA */ +.offset 0x0054 + .word _intc_handler /* 21 : INTICUCRCDRQ1 */ +.offset 0x0058 + .word _intc_handler /* 22 : INTICUCRRDRQ */ +.offset 0x005C + .word _intc_handler /* 23 : INTICUCRCDRQ2 */ +.offset 0x0060 + .word _intc_handler /* 24 : Reserved */ +.offset 0x0064 + .word _intc_handler /* 25 : INTICUERRCFDA */ +.offset 0x0068 + .word _intc_handler /* 26 : INTICUERRDFDA */ +.offset 0x006C + .word _intc_handler /* 27 : Reserved */ +.offset 0x0070 + .word _intc_handler /* 28 : Reserved */ +.offset 0x0074 + .word _intc_handler /* 29 : INTSAFRTRAMERR */ +.offset 0x0078 + .word _intc_handler /* 30 : INTSECRTRAMERR */ +.offset 0x007C + .word _intc_handler /* 31 : INTEDCRTRAMERR */ +.offset 0x0080 + .word _intc_handler /* 32 : INTECCRTRAMCMPE */ +.offset 0x0084 + .word _intc_handler /* 33 : INTECCMRTRAMERR */ +.offset 0x0088 + .word _intc_handler /* 34 : INTECCSRTRAMERR */ +.offset 0x008C + .word _intc_handler /* 35 : INTEDCMSECROMER */ +.offset 0x0090 + .word _intc_handler /* 36 : INTEDCSSECROMER */ +.offset 0x0094 + .word _intc_handler /* 37 : INTSCEGCALEND */ + + .section ".text" + .align 2 +_Dummy: + br _Dummy diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/avs/avs.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/avs/avs.c new file mode 100644 index 00000000..69bc727f --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/avs/avs.c @@ -0,0 +1,115 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : AVS driver + ******************************************************************************/ +/****************************************************************************** + * @file avs.c + * - Version : 0.01 + * @brief AVS driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 16.11.2023 0.01 First Release + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#define AVS_BASE (BASE_AVS_ADDR) /* Physical address:0xE60A0000, Logical address:0xFDAA0000 */ +#define AVS_ADVADJP (AVS_BASE + 0x0080U) +#define ADVADJP_VOLCOND_MASK (0x000001FFU) + +#define VOLCOND_NUM (5U) /* Array number */ +#define VOLCOND_FLAG_4 (4U) +#define VOLCOND_FLAG_2 (2U) + +/* I2C Slave Address */ +#define SLAVE_RW_ADDR (0x000000C8U) + +/* PMIC register Address */ +#define BUCK1_DVS0CFG1 (0x00000072U) +#define BUCK1_DVS0CFG0 (0x00000073U) +#define DVS_CFG_NUM (2U) /* Array number */ + +/* PMIC register setting value */ +#define BUCK1_DVS0CFG1_VOLCOND2 (0x0000009FU) /* Setting value for 0.7575[V] */ +#define BUCK1_DVS0CFG0_VOLCOND2 (0x000000C0U) /* Setting value for 0.7575[V] */ +#define BUCK1_DVS0CFG1_VOLCOND4 (0x0000009AU) /* Setting value for 0.7325[V] */ +#define BUCK1_DVS0CFG0_VOLCOND4 (0x00000080U) /* Setting value for 0.7325[V] */ + +void avs_low_power_mode_setting(void) +{ + uint32_t volcond; + + /* Initialize I2C ch3. */ + i2c3_init(); + + /* Confirm VOLCOND in ADVADJP register. */ + volcond = mem_read32(AVS_ADVADJP); + volcond &= ADVADJP_VOLCOND_MASK; + + NOTICE("Low Power Mode setting(AVS) VOLCOND=%d\n", volcond); + switch (volcond) + { + case VOLCOND_FLAG_2: + { + /* In case of VOLCOND=2, set supply voltage to 0.7575[V]. */ + i2c3_write(SLAVE_RW_ADDR, BUCK1_DVS0CFG1, BUCK1_DVS0CFG1_VOLCOND2); + i2c3_write(SLAVE_RW_ADDR, BUCK1_DVS0CFG0, BUCK1_DVS0CFG0_VOLCOND2); + INFO("VOLCOND=0x%x SET Slave=0x%x Register=0x%x Value=0x%x\n", + volcond, SLAVE_RW_ADDR, BUCK1_DVS0CFG1, BUCK1_DVS0CFG1_VOLCOND2); + INFO("VOLCOND=0x%x SET Slave=0x%x Register=0x%x Value=0x%x\n", + volcond, SLAVE_RW_ADDR, BUCK1_DVS0CFG0, BUCK1_DVS0CFG0_VOLCOND2); + break; + } + case VOLCOND_FLAG_4: + { + /* In case of VOLCOND=4, set supply voltage to 0.7325[V]. */ + i2c3_write(SLAVE_RW_ADDR, BUCK1_DVS0CFG1, BUCK1_DVS0CFG1_VOLCOND4); + i2c3_write(SLAVE_RW_ADDR, BUCK1_DVS0CFG0, BUCK1_DVS0CFG0_VOLCOND4); + INFO("VOLCOND=0x%x SET Slave=0x%x Register=0x%x Value=0x%x\n", + volcond, SLAVE_RW_ADDR, BUCK1_DVS0CFG1, BUCK1_DVS0CFG1_VOLCOND4); + INFO("VOLCOND=0x%x SET Slave=0x%x Register=0x%x Value=0x%x\n", + volcond, SLAVE_RW_ADDR, BUCK1_DVS0CFG0, BUCK1_DVS0CFG0_VOLCOND4); + break; + } + default: + { + /* Other than VOLCOND = 2 or 4, nothing to do. */ + break; + } + } + + /* Release I2C ch3 */ + i2c3_release(); +} +/* End of function avs_low_power_mode_setting(void) */ + + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/cpg/cpg.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/cpg/cpg.c new file mode 100644 index 00000000..0825aba1 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/cpg/cpg.c @@ -0,0 +1,83 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : CPG initialize + ******************************************************************************/ + /****************************************************************************** + * @file cpg.c + * - Version : 0.03 + * @brief Initial setting process of CPG. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Move cpg_reg_write function to cpg.h. + * : 27.12.2024 0.03 Add set_srcr function. + *****************************************************************************/ + +#include +#include +#if (RCAR_LSI == RCAR_V4H) +#include +#endif /* RCAR_LSI == RCAR_V4H */ + +/* CPG write protect value */ +#define CPGWPCR_PASSWORD (0xA5A50000U) +#define CPGWPCR_WPE ((uint32_t)1U << 0U) +#define CPGWPCR_WPE_VALID (0U) + +#if (RCAR_LSI == RCAR_V4H) +static void set_srcr(void); +#endif /* RCAR_LSI == RCAR_V4H */ + +void cpg_init(void) +{ + /* Release CPG write protect */ + if((mem_read32(CPG_CPGWPCR) & CPGWPCR_WPE) != CPGWPCR_WPE_VALID) + { + mem_write32(CPG_CPGWPR, ~(uint32_t)(CPGWPCR_PASSWORD)); + mem_write32(CPG_CPGWPCR, CPGWPCR_PASSWORD); + + /* bit in WPE = 0? */ + while ((mem_read32(CPG_CPGWPCR) & CPGWPCR_WPE) != CPGWPCR_WPE_VALID) + { + ; + } + } + +#if (RCAR_LSI == RCAR_V4H) + set_srcr(); +#endif /* RCAR_LSI == RCAR_V4H */ +} +/* End of function cpg_init(void) */ + +#if (RCAR_LSI == RCAR_V4H) +static void set_srcr(void) +{ + mem_write32(CPG_SRCR28, CPGSRCR28_VAL); + mem_write32(CPG_SRCR29, CPGSRCR29_VAL); +} +/* End of function set_srcr(void) */ +#endif /* RCAR_LSI == RCAR_V4H */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h new file mode 100644 index 00000000..1ab608d4 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/boot_init_dram.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2015-2019, Renesas Electronics Corporation All rights reserved. + */ + +#ifndef __BOOT_INIT_DRAM_ +#define __BOOT_INIT_DRAM_ + +extern int32_t InitDram(void); + +#define INITDRAM_OK (0) +#define INITDRAM_NG (0xffffffff) +#define INITDRAM_ERR_I (0xffffffff) +#define INITDRAM_ERR_O (0xfffffffe) +#define INITDRAM_ERR_T (0xfffffff0) + +#endif /* __BOOT_INIT_DRAM_*/ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/ddr.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/ddr.mk new file mode 100644 index 00000000..b31c2eaa --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/ddr.mk @@ -0,0 +1,6 @@ +# +# Copyright (c) 2015-2022, Renesas Electronics Corporation All rights reserved. +# + +OBJ_FILE += ip/ddr/s4/lpddr4x/boot_init_dram.o +OBJ_FILE += ip/ddr/dram_sub_func.o \ No newline at end of file diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c new file mode 100644 index 00000000..80034344 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.c @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2015-2018, Renesas Electronics Corporation All rights reserved. + */ + +#include +#include "dram_sub_func.h" + +void dram_get_boot_status(uint32_t *status) +{ + *status = DRAM_BOOT_STATUS_COLD; +} + +int32_t dram_update_boot_status(uint32_t status) +{ + int32_t ret = 0; + return ret; +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h new file mode 100644 index 00000000..0afbb352 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/dram_sub_func.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2015-2019, Renesas Electronics Corporation All rights reserved. + */ + +#ifndef DRAM_SUB_FUNC_H_ +#define DRAM_SUB_FUNC_H_ + +#define DRAM_BOOT_STATUS_COLD (0U) +#define DRAM_BOOT_STATUS_WARM (1U) + +#define DRAM_UPDATE_STATUS_ERR (-1) + +void dram_get_boot_status(uint32_t *status); +int32_t dram_update_boot_status(uint32_t status); + +#endif /* DRAM_SUB_FUNC_H_ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c new file mode 100644 index 00000000..f4137dc7 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram.c @@ -0,0 +1,2243 @@ +/******************************************************************************* + * Copyright (c) 2021-2023 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +#include +#if defined(__RH850G3K__) +#include "mem_io.h" +#include "log.h" +#else +#include +#include +#endif +#include "ddr_regdef.h" +#include "init_dram_tbl_s4.h" +#include "boot_init_dram_regdef.h" +#include "boot_init_dram.h" +#include "dram_sub_func.h" + +#define DDR_BACKUPMODE +#define FATAL_MSG(x) NOTICE(x) + +/******************************************************************************* + * variables + ******************************************************************************/ +/* +static uint32_t Prr_Product; +static uint32_t Prr_Cut; +*/ +static uint32_t _cnf_BOARDTYPE; +static uint32_t brd_clk; +static uint32_t brd_clkdiv; +static uint32_t brd_clkdiva; +static uint32_t ddr_mbps; +static uint32_t ddr_mbpsdiv; +static uint32_t bus_mbps, bus_mbpsdiv; +static uint32_t ddr_tccd; +static const struct _boardcnf *Boardcnf; +static uint32_t ddr_phyvalid; +static uint32_t ddr_density[DRAM_CH_CNT][CS_CNT]; +static uint32_t ch_have_this_cs[CS_CNT]; +static uint32_t max_density; +static uint32_t ddr_mul; +static uint32_t ddr_mul_nf; +static uint32_t ddr_mul_low; +static uint32_t ddrtbl_load_num; + +#define DDR_PHY_REGSET_MAX 143 +#define DDR_PI_REGSET_MAX 223 +static uint32_t _cnf_DDR_PHY_SLICE_REGSET[DDR_PHY_REGSET_MAX]; +static uint32_t _cnf_DDR_PHY_ADR_V_REGSET[DDR_PHY_REGSET_MAX]; +static uint32_t _cnf_DDR_PHY_ADR_G_REGSET[DDR_PHY_REGSET_MAX]; +static uint32_t _cnf_DDR_PI_REGSET[DDR_PI_REGSET_MAX]; +#ifdef DDR_BACKUPMODE +static uint32_t ddrBackup; +#endif + +/******************************************************************************* + * Prototypes + ******************************************************************************/ +static uint32_t vch_nxt(uint32_t pos); +static void cpg_write_32(uint32_t a, uint32_t v); +static void pll3_control(uint32_t high); + +static void send_dbcmd(uint32_t cmd); +static uint32_t reg_ddrphy_read(uint32_t phyno, uint32_t regadd); +static void reg_ddrphy_write(uint32_t phyno, uint32_t regadd, uint32_t regdata); +static void reg_ddrphy_write_a(uint32_t regadd, uint32_t regdata); +static void ddr_setval_s(uint32_t ch, uint32_t slice, uint32_t _regdef, uint32_t val); +static uint32_t ddr_getval_s(uint32_t ch, uint32_t slice, uint32_t _regdef); +static void ddr_setval(uint32_t ch, uint32_t regdef, uint32_t val); +static void ddr_setval_ach_s(uint32_t slice, uint32_t regdef, uint32_t val); +static void ddr_setval_ach(uint32_t regdef, uint32_t val); +static void ddr_setval_ach_as(uint32_t regdef, uint32_t val); +static uint32_t ddr_getval(uint32_t ch, uint32_t regdef); +static void _tblcopy(uint32_t *to, const uint32_t *from, uint32_t size); +static void ddrtbl_setval(uint32_t *tbl, uint32_t _regdef, uint32_t val); +static uint32_t ddrtbl_getval(uint32_t *tbl, uint32_t _regdef); +static uint16_t _f_scale(uint32_t f_ddr_mbps, uint32_t f_ddr_mbpsdiv, uint32_t ps, uint16_t cyc); +static void _f_scale_js2(uint32_t f_ddr_mbps, uint32_t f_ddr_mbpsdiv, uint16_t *f_js2); +static void ddrtbl_load(void); +static void ddrtbl_load_pi(void); +static void ddr_config(void); +static void dbsc_regset(void); +static void dbsc_regset_post(void); +static uint32_t dfi_init_start(void); +static void ddr_register_set(void); +static void wait_dbpdstat1(uint32_t status); +static uint32_t wait_freqchgreq(uint32_t req_assert); +static void set_freqchgack(uint32_t ack_assert); +static void set_dfifrequency(uint32_t freq); +static uint32_t pll3_freq(uint32_t fsel); +static uint32_t pi_training_go(void); +static void manual_frequency_change(void); +static uint32_t manual_training_wrlvl(void); +static uint32_t manual_training_rdgtlvl(void); +static uint32_t manual_training_rdlvl(void); +static uint32_t manual_training_wdqlvl(void); +static uint32_t ca_vref_training(void); +static uint32_t init_ddr(void); +static uint32_t boardcnf_get_brd_type(void); +static void dbsc_write_32(uintptr_t addr, uint32_t data); + +/******************************************************************************* + * load board configuration + ******************************************************************************/ +#include "boot_init_dram_config.c" + +/******************************************************************************* + * CA Vref Training setting + ******************************************************************************/ +#ifndef DDR_CAVREF_VAL +#define DDR_CAVREF_VAL 0x11 +#endif + +#ifndef DDR_CAVREF_DELTA +#define DDR_CAVREF_DELTA 3 +#endif + +/******************************************************************************* + * macro for channel selection loop + ******************************************************************************/ +static uint32_t vch_nxt(uint32_t pos) +{ + uint32_t posn; + + for (posn = pos; posn < DRAM_CH_CNT; posn++) { + if (ddr_phyvalid & (1U << posn)) { + break; + } + } + return posn; +} + +#define foreach_vch(ch) \ +for (ch = vch_nxt(0); ch < DRAM_CH_CNT; ch = vch_nxt(ch + 1U)) + +#define foreach_ech(ch) \ +for (ch = 0U; ch < DRAM_CH_CNT; ch++) + +/******************************************************************************* + * Printing functions + ******************************************************************************/ +#define MSG_LF(...) + +/******************************************************************************* + * clock settings, reset control + ******************************************************************************/ +static void cpg_write_32(uint32_t a, uint32_t v) +{ + mmio_write_32(CPG_CPGWPR, ~v); + mmio_write_32(a, v); +} + +static void pll3_control(uint32_t high) +{ + uint32_t dataDIV, dataMUL; + uint32_t ssmode, dataNF; + + if (high) { + /* High frequency mode */ + dataMUL = ddr_mul - 1U; + dataDIV = 0x02U; + dataNF = ddr_mul_nf; + } else { + /* Low frequency mode (25MHz) */ + dataMUL = ddr_mul_low - 1U; /* PLL3VCO = 1600MHz */ + dataDIV = 0x0CU; /* div = 64 */ + dataNF = 0x00U; + } + + ssmode = 0x04U; + dataMUL = (dataMUL << 20) | (ssmode << 16); + dataNF = (dataNF << 20); + + /* PLL3 multiplie set */ + if (((mmio_read_32(CPG_PLL3CR0) & 0x3FFFFF7FU) != dataMUL) || (mmio_read_32(CPG_PLL3CR1) != dataNF) ) { + cpg_write_32(CPG_PLL3CR0, dataMUL); + cpg_write_32(CPG_PLL3CR1, dataNF); + cpg_write_32(CPG_PLL3CR0, mmio_read_32(CPG_PLL3CR0) | CPG_PLL3CR_KICK_BIT); + while ((mmio_read_32(CPG_PLLECR) & CPG_PLLECR_PLL3ST_BIT) != CPG_PLLECR_PLL3ST_BIT); + } + /* PLL3 DIV set(Target value) */ + while ((mmio_read_32(CPG_FRQCRD) & CPG_FRQCRD_KICK_BIT)); + cpg_write_32(CPG_FRQCRD, dataDIV | (mmio_read_32(CPG_FRQCRD) & 0xFFFFFF80U)); + cpg_write_32(CPG_FRQCRD, mmio_read_32(CPG_FRQCRD) | CPG_FRQCRD_KICK_BIT); + while ((mmio_read_32(CPG_FRQCRD) & CPG_FRQCRD_KICK_BIT)); + +} + +/******************************************************************************* + * DDR memory register access + ******************************************************************************/ +static void send_dbcmd(uint32_t cmd) +{ + /* dummy read */ + mmio_read_32(DBSC_DBCMD); + while ((mmio_read_32(DBSC_DBWAIT)) & 0x01U); + + dbsc_write_32((DBSC_DBCMD), cmd); +} + +/******************************************************************************* + * DDRPHY register access (raw) + ******************************************************************************/ +static uint32_t reg_ddrphy_read(uint32_t phyno, uint32_t regadd) +{ + uint32_t val; + + val = 0U; + mmio_write_32(DBSC_DBPDRGA(phyno), regadd | 0x00004000U); + while (mmio_read_32(DBSC_DBPDRGA(phyno)) != (regadd | 0x0000C000U)); + + val = mmio_read_32(DBSC_DBPDRGA(phyno)); + + mmio_write_32(DBSC_DBPDRGA(phyno), regadd | 0x00008000U); + while (mmio_read_32(DBSC_DBPDRGA(phyno)) != regadd); + + mmio_write_32(DBSC_DBPDRGA(phyno), regadd | 0x00008000U); + while (mmio_read_32(DBSC_DBPDRGA(phyno)) != regadd); + + val = mmio_read_32(DBSC_DBPDRGD(phyno)); + (void)val; + + return val; +} + +static void reg_ddrphy_write(uint32_t phyno, uint32_t regadd, uint32_t regdata) +{ + mmio_write_32(DBSC_DBPDRGA(phyno), regadd); + while (mmio_read_32(DBSC_DBPDRGA(phyno)) != regadd); + + mmio_write_32(DBSC_DBPDRGD(phyno), regdata); + while (mmio_read_32(DBSC_DBPDRGA(phyno)) != (regadd | 0x00008000U)); + + mmio_write_32(DBSC_DBPDRGA(phyno), regadd | 0x00008000U); + while (mmio_read_32(DBSC_DBPDRGA(phyno)) != regadd); + + mmio_write_32(DBSC_DBPDRGA(phyno), regadd); +} + +static void reg_ddrphy_write_a(uint32_t regadd, uint32_t regdata) +{ + uint32_t ch; + + foreach_vch(ch) { + reg_ddrphy_write(ch, regadd, regdata); + } +} + +/******************************************************************************* + * DDRPHY register access (field modify) + ******************************************************************************/ +static void ddr_setval_s(uint32_t ch, uint32_t slice, uint32_t _regdef, uint32_t val) +{ + uint32_t adr; + uint32_t lsb; + uint32_t len; + uint32_t msk; + uint32_t tmp; + + adr = DDR_REGDEF_ADR(_regdef) + 0x100U * slice; + len = DDR_REGDEF_LEN(_regdef); + lsb = DDR_REGDEF_LSB(_regdef); + if (len == 0x20U) { + msk = 0xffffffffU; + } else { + msk = ((1U << len) - 1U) << lsb; + } + + tmp = reg_ddrphy_read(ch, adr); + tmp = (tmp & (~msk)) | ((val << lsb) & msk); + reg_ddrphy_write(ch, adr, tmp); +} + +static uint32_t ddr_getval_s(uint32_t ch, uint32_t slice, uint32_t _regdef) +{ + uint32_t adr; + uint32_t lsb; + uint32_t len; + uint32_t msk; + uint32_t tmp; + + adr = DDR_REGDEF_ADR(_regdef) + 0x100U * slice; + len = DDR_REGDEF_LEN(_regdef); + lsb = DDR_REGDEF_LSB(_regdef); + if (len == 0x20U) { + msk = 0xffffffffU; + } else { + msk = ((1U << len) - 1U); + } + + tmp = reg_ddrphy_read(ch, adr); + tmp = (tmp >> lsb) & msk; + + return tmp; +} + +static void ddr_setval(uint32_t ch, uint32_t regdef, uint32_t val) +{ + ddr_setval_s(ch, 0U, regdef, val); +} + +static void ddr_setval_ach_s(uint32_t slice, uint32_t regdef, uint32_t val) +{ + uint32_t ch; + + foreach_vch(ch) { + ddr_setval_s(ch, slice, regdef, val); + } +} + +static void ddr_setval_ach(uint32_t regdef, uint32_t val) +{ + ddr_setval_ach_s(0U, regdef, val); +} + +static void ddr_setval_ach_as(uint32_t regdef, uint32_t val) +{ + uint32_t slice; + + for (slice = 0U; slice < SLICE_CNT; slice++) { + ddr_setval_ach_s(slice, regdef, val); + } +} + +static uint32_t ddr_getval(uint32_t ch, uint32_t regdef) +{ + return ddr_getval_s(ch, 0U, regdef); +} + +/******************************************************************************* + * DBSC register access + ******************************************************************************/ +static void dbsc_write_32(uintptr_t addr, uint32_t data) +{ + *((volatile uint32_t*)addr) = data; +} + +/******************************************************************************* + * handling functions for setteing ddrphy value table + ******************************************************************************/ +static void _tblcopy(uint32_t *to, const uint32_t *from, uint32_t size) +{ + uint32_t i; + + for (i = 0U; i < size; i++) { + to[i] = from[i]; + } +} + +static void ddrtbl_setval(uint32_t *tbl, uint32_t _regdef, uint32_t val) +{ + uint32_t adr; + uint32_t lsb; + uint32_t len; + uint32_t msk; + uint32_t tmp; + const uint32_t adrmsk = 0x000000ffU; + + adr = DDR_REGDEF_ADR(_regdef); + len = DDR_REGDEF_LEN(_regdef); + lsb = DDR_REGDEF_LSB(_regdef); + if (len == 0x20U) { + msk = 0xffffffffU; + } else { + msk = ((1U << len) - 1U) << lsb; + } + + tmp = tbl[adr & adrmsk]; + tmp = (tmp & (~msk)) | ((val << lsb) & msk); + tbl[adr & adrmsk] = tmp; +} + +static uint32_t ddrtbl_getval(uint32_t *tbl, uint32_t _regdef) +{ + uint32_t adr; + uint32_t lsb; + uint32_t len; + uint32_t msk; + uint32_t tmp; + const uint32_t adrmsk = 0x000000ffU; + + adr = DDR_REGDEF_ADR(_regdef); + len = DDR_REGDEF_LEN(_regdef); + lsb = DDR_REGDEF_LSB(_regdef); + if (len == 0x20U) { + msk = 0xffffffffU; + } else { + msk = ((1U << len) - 1U); + } + + tmp = tbl[adr & adrmsk]; + tmp = (tmp >> lsb) & msk; + + return tmp; +} + +/******************************************************************************* + * functions and parameters for timing setting + ******************************************************************************/ +struct _jedec_spec1 { + uint16_t fx3; + uint8_t RLwoDBI; + uint8_t RLwDBI; + uint8_t WL; + uint8_t nWR; + uint8_t nRTP; + uint8_t ODTLon; + uint8_t MR1; + uint8_t MR2; + uint16_t tRRD; + uint16_t tFAW; +}; + +#define JS1_USABLEC_SPEC_LO 2 +#define JS1_USABLEC_SPEC_HI 7 +#define JS1_FREQ_TBL_NUM 8 +#define JS1_MR1(f) (0x04 | ((f) << 4)) +#define JS1_MR2(f) (0x00 | ((f) << 3) | (f)) + +const struct _jedec_spec1 js1[JS1_FREQ_TBL_NUM] = { + { 800, 6, 6, 4, 6 , 8, 0, JS1_MR1(0), JS1_MR2(0)|0x40,10000, 40000 }, /* 533.333Mbps*/ + { 1600, 10, 12, 8, 10 , 8, 0, JS1_MR1(1), JS1_MR2(1)|0x40,10000, 40000 }, /* 1066.666Mbps*/ + { 2400, 14, 16, 12, 16 , 8, 6, JS1_MR1(2), JS1_MR2(2)|0x40,10000, 40000 }, /* 1600.000Mbps*/ + { 3200, 20, 22, 10, 20 , 8, 4, JS1_MR1(3), JS1_MR2(3), 10000, 40000 }, /* 2133.333Mbps*/ + { 4000, 24, 28, 12, 24 ,10, 4, JS1_MR1(4), JS1_MR2(4), 10000, 40000 }, /* 2666.666Mbps*/ + { 4800, 28, 32, 14, 30 ,12, 6, JS1_MR1(5), JS1_MR2(5), 10000, 40000 }, /* 3200.000Mbps*/ + { 5600, 32, 36, 16, 34 ,14, 6, JS1_MR1(6), JS1_MR2(6), 10000, 40000 }, /* 3733.333Mbps*/ + { 6400, 36, 40, 18, 40 ,16, 8, JS1_MR1(7), JS1_MR2(7), 7500, 30000 } /* 4266.666Mbps*/ +}; + +struct _jedec_spec2 { + uint16_t ps; + uint16_t cyc; +}; + +#define JS2_tSR 0 +#define JS2_tXP 1 +#define JS2_tRTP 2 +#define JS2_tRCD 3 +#define JS2_tRPpb 4 +#define JS2_tRPab 5 +#define JS2_tRAS 6 +#define JS2_tWR 7 +#define JS2_tWTR 8 +#define JS2_tRRD 9 +#define JS2_tPPD 10 +#define JS2_tFAW 11 +#define JS2_tDQSCK 12 +#define JS2_tCKEHCMD 13 +#define JS2_tCKELCMD 14 +#define JS2_tCKELPD 15 +#define JS2_tMRR 16 +#define JS2_tMRW 17 +#define JS2_tMRD 18 +#define JS2_tZQCALns 19 +#define JS2_tZQLAT 20 +#define JS2_tIEdly 21 +#define JS2_tODTon_min 22 +#define JS2_TBLCNT 23 + +#define JS2_tRCpb (JS2_TBLCNT) +#define JS2_tRCab (JS2_TBLCNT + 1) +#define JS2_tRFCab (JS2_TBLCNT + 2) +#define JS2_CNT (JS2_TBLCNT + 3) + +#ifndef JS2_DERATE +#define JS2_DERATE 0 +#endif +const struct _jedec_spec2 jedec_spec2[2][JS2_TBLCNT] = { + { +/*tSR */ { 15000, 3 }, +/*tXP */ { 7500, 3 }, +/*tRTP */ { 7500, 8 }, +/*tRCD */ { 18000, 4 }, +/*tRPpb */ { 18000, 3 }, +/*tRPab */ { 21000, 3 }, +/*tRAS */ { 42000, 3 }, +/*tWR */ { 18000, 4 }, +/*tWTR */ { 10000, 8 }, +/*tRRD */ { 0, 0 }, +/*tPPD */ { 0, 0 }, +/*tFAW */ { 0, 0 }, +/*tDQSCK*/ { 3500, 0 }, +/*tCKEHCMD*/ { 7500, 3 }, +/*tCKELCMD*/ { 7500, 3 }, +/*tCKELPD*/ { 7500, 3 }, +/*tMRR*/ { 0, 8 }, +/*tMRW*/ { 10000, 10 }, +/*tMRD*/ { 14000, 10 }, +/*tZQCALns*/ { 1000, 0 }, +/*tZQLAT*/ { 30000, 10 }, +/*tIEdly*/ { 6000, 0 }, +/*tODTon_min*/ { 1500, 0 } + },{ +/*tSR */ { 15000, 3 }, +/*tXP */ { 7500, 3 }, +/*tRTP */ { 7500, 8 }, +/*tRCD */ { 19875, 4 }, +/*tRPpb */ { 19875, 3 }, +/*tRPab */ { 22875, 3 }, +/*tRAS */ { 43875, 3 }, +/*tWR */ { 18000, 4 }, +/*tWTR */ { 10000, 8 }, +/*tRRD */ { 1875, 0 }, +/*tPPD */ { 0, 0 }, +/*tFAW */ { 0, 0 }, +/*tDQSCK*/ { 3600, 0 }, +/*tCKEHCMD*/ { 7500, 3 }, +/*tCKELCMD*/ { 7500, 3 }, +/*tCKELPD*/ { 7500, 3 }, +/*tMRR*/ { 0, 8 }, +/*tMRW*/ { 10000, 10 }, +/*tMRD*/ { 14000, 10 }, +/*tZQCALns*/ { 1000, 0 }, +/*tZQLAT*/ { 30000, 10 }, +/*tIEdly*/ { 6000, 0 }, +/*tODTon_min*/ { 1500, 0 } + } +}; + +const uint16_t jedec_spec2_tRFC_ab[5] = { +/* 4Gb, 6Gb, 8Gb,12Gb,16Gb (24Gb/32Gb non) */ + 130, 180, 180, 280, 280 +}; + +static uint32_t js1_ind; +static uint16_t js2[JS2_CNT]; +static uint8_t RL; +static uint8_t WL; + +static uint16_t _f_scale(uint32_t f_ddr_mbps, uint32_t f_ddr_mbpsdiv, uint32_t ps, uint16_t cyc) +{ + uint32_t tmp; + uint32_t div; + + tmp = (((uint32_t)(ps) + 9U) / 10U) * f_ddr_mbps; + div = tmp / (200000U * f_ddr_mbpsdiv); + if (tmp != (div * 200000U * f_ddr_mbpsdiv)) { + div = div + 1U; + } + + if (div > cyc) { + cyc = (uint16_t)div; + } + + return cyc; +} + +static void _f_scale_js2(uint32_t f_ddr_mbps, uint32_t f_ddr_mbpsdiv, uint16_t *f_js2) +{ + uint32_t i; + + for (i = 0U; i < JS2_TBLCNT; i++) { + f_js2[i] = _f_scale(f_ddr_mbps, f_ddr_mbpsdiv, + (uint32_t)jedec_spec2[JS2_DERATE][i].ps, + jedec_spec2[JS2_DERATE][i].cyc); + } + + f_js2[JS2_tRRD] = _f_scale(f_ddr_mbps, f_ddr_mbpsdiv, (uint32_t)(js1[js1_ind].tRRD + jedec_spec2[JS2_DERATE][JS2_tPPD].ps), 4U); + f_js2[JS2_tFAW] = _f_scale(f_ddr_mbps, f_ddr_mbpsdiv, (uint32_t)(js1[js1_ind].tFAW + jedec_spec2[JS2_DERATE][JS2_tFAW].ps), 0U); + f_js2[JS2_tZQCALns] = _f_scale(f_ddr_mbps, f_ddr_mbpsdiv, (uint32_t)(jedec_spec2[JS2_DERATE][JS2_tZQCALns].ps) * 1000U, 0U); + f_js2[JS2_tRCpb] = f_js2[JS2_tRAS] + f_js2[JS2_tRPpb]; + f_js2[JS2_tRCab] = f_js2[JS2_tRAS] + f_js2[JS2_tRPab]; +} + +static const uint32_t _reg_PI_MR1_DATA_Fx_CSx[3][CS_CNT] = { + { + _reg_PI_MR1_DATA_F0_0, + _reg_PI_MR1_DATA_F0_1 + }, + { + _reg_PI_MR1_DATA_F1_0, + _reg_PI_MR1_DATA_F1_1 + }, + { + _reg_PI_MR1_DATA_F2_0, + _reg_PI_MR1_DATA_F2_1 + } +}; + +static const uint32_t _reg_PI_MR2_DATA_Fx_CSx[3][CS_CNT] = { + { + _reg_PI_MR2_DATA_F0_0, + _reg_PI_MR2_DATA_F0_1 + }, + { + _reg_PI_MR2_DATA_F1_0, + _reg_PI_MR2_DATA_F1_1 + }, + { + _reg_PI_MR2_DATA_F2_0, + _reg_PI_MR2_DATA_F2_1 + } +}; + +static const uint32_t _reg_PI_MR3_DATA_Fx_CSx[3][CS_CNT] = { + { + _reg_PI_MR3_DATA_F0_0, + _reg_PI_MR3_DATA_F0_1 + }, + { + _reg_PI_MR3_DATA_F1_0, + _reg_PI_MR3_DATA_F1_1 + }, + { + _reg_PI_MR3_DATA_F2_0, + _reg_PI_MR3_DATA_F2_1 + } +}; + +static const uint32_t _reg_PI_MR11_DATA_Fx_CSx[3][CS_CNT] = { + { + _reg_PI_MR11_DATA_F0_0, + _reg_PI_MR11_DATA_F0_1 + }, + { + _reg_PI_MR11_DATA_F1_0, + _reg_PI_MR11_DATA_F1_1 + }, + { + _reg_PI_MR11_DATA_F2_0, + _reg_PI_MR11_DATA_F2_1 + } +}; + +static const uint32_t _reg_PI_MR12_DATA_Fx_CSx[3][CS_CNT] = { + { + _reg_PI_MR12_DATA_F0_0, + _reg_PI_MR12_DATA_F0_1 + }, + { + _reg_PI_MR12_DATA_F1_0, + _reg_PI_MR12_DATA_F1_1 + }, + { + _reg_PI_MR12_DATA_F2_0, + _reg_PI_MR12_DATA_F2_1 + } +}; + +static const uint32_t _reg_PI_MR14_DATA_Fx_CSx[3][CS_CNT] = { + { + _reg_PI_MR14_DATA_F0_0, + _reg_PI_MR14_DATA_F0_1 + }, + { + _reg_PI_MR14_DATA_F1_0, + _reg_PI_MR14_DATA_F1_1 + }, + { + _reg_PI_MR14_DATA_F2_0, + _reg_PI_MR14_DATA_F2_1 + } +}; + +/******************************************************************************* + * load table data into DDR registers + ******************************************************************************/ +static void ddrtbl_load(void) +{ + uint32_t i; + uint32_t slice; + uint32_t cs; + uint32_t adr; + uint32_t dataL; + uint32_t tmp[2]; + + const uint32_t DDR_PHY_SLICE_REGSET_OFS = DDR_PHY_SLICE_REGSET_OFS_S4; + const uint32_t DDR_PHY_ADR_V_REGSET_OFS = DDR_PHY_ADR_V_REGSET_OFS_S4; + const uint32_t DDR_PHY_ADR_G_REGSET_OFS = DDR_PHY_ADR_G_REGSET_OFS_S4; + const uint32_t DDR_PI_REGSET_OFS = DDR_PI_REGSET_OFS_S4; + + const uint32_t DDR_PHY_SLICE_REGSET_SIZE = DDR_PHY_SLICE_REGSET_SIZE_S4; + + const uint32_t DDR_PHY_SLICE_REGSET_NUM = DDR_PHY_SLICE_REGSET_NUM_S4; + const uint32_t DDR_PHY_ADR_V_REGSET_NUM = DDR_PHY_ADR_V_REGSET_NUM_S4; + const uint32_t DDR_PHY_ADR_G_REGSET_NUM = DDR_PHY_ADR_G_REGSET_NUM_S4; + + /*********************************************************************** + * TIMING REGISTERS + ***********************************************************************/ + /* search jedec_spec1 index */ + for (i = JS1_USABLEC_SPEC_LO; i < JS1_FREQ_TBL_NUM - 1U; i++) { + if (js1[i].fx3 * 2U * ddr_mbpsdiv >= ddr_mbps * 3U) { + break; + } + } + if (JS1_USABLEC_SPEC_HI < i) { + js1_ind = JS1_USABLEC_SPEC_HI; + } else { + js1_ind = i; + } + + RL = js1[js1_ind].RLwDBI; + + WL = js1[js1_ind].WL; + + /* calculate jedec_spec2 */ + _f_scale_js2(ddr_mbps, ddr_mbpsdiv, js2); + + /*********************************************************************** + * PREPARE TBL + ***********************************************************************/ + _tblcopy(_cnf_DDR_PHY_SLICE_REGSET, + DDR_PHY_SLICE_REGSET_S4, DDR_PHY_SLICE_REGSET_NUM_S4); + _tblcopy(_cnf_DDR_PHY_ADR_V_REGSET, + DDR_PHY_ADR_V_REGSET_S4, DDR_PHY_ADR_V_REGSET_NUM_S4); + _tblcopy(_cnf_DDR_PHY_ADR_G_REGSET, + DDR_PHY_ADR_G_REGSET_S4, DDR_PHY_ADR_G_REGSET_NUM_S4); + _tblcopy(_cnf_DDR_PI_REGSET, + DDR_PI_REGSET_S4, DDR_PI_REGSET_NUM_S4); + + /*********************************************************************** + * Adjust PI paramters + ***********************************************************************/ + if (js2[JS2_tIEdly] > RL) { + js2[JS2_tIEdly] = RL; + } + + if (js2[JS2_tIEdly] >= 0x0fU) { + dataL = 0x0fU; + } else { + dataL = js2[JS2_tIEdly]; + } + + ddrtbl_setval(_cnf_DDR_PHY_SLICE_REGSET, _reg_PHY_RDDATA_EN_DLY, dataL); + ddrtbl_setval(_cnf_DDR_PHY_SLICE_REGSET, _reg_PHY_RDDATA_EN_TSEL_DLY, (dataL - 2U)); + ddrtbl_setval(_cnf_DDR_PHY_SLICE_REGSET, _reg_PHY_RDDATA_EN_OE_DLY, dataL); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_RDLAT_ADJ_F1, RL - dataL - 1U); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_WRLAT_ADJ_F1, WL - 4U); + + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_WRLAT_F1, WL); + + tmp[0] = js1[js1_ind].MR1; + tmp[1] = js1[js1_ind].MR2; + + for (cs = 0U; cs < CS_CNT; cs++) { + for (i = 1U; i < 3U; i++) { + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_MR1_DATA_Fx_CSx[i][cs], tmp[0]); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_MR2_DATA_Fx_CSx[i][cs], tmp[1]); + } + } + +#ifdef DDR_BACKUPMODE + if (ddrBackup == DRAM_BOOT_STATUS_WARM) { + ddrtbl_setval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_SET_DFI_INPUT_RST_PAD, 0x01U); + } +#endif /* DDR_BACKUPMODE */ + + /*********************************************************************** + * Read Vref (SoC side) Training range + ***********************************************************************/ + dataL = (uint32_t)(Boardcnf->vref_r); + if (dataL) { + ddrtbl_setval(_cnf_DDR_PHY_SLICE_REGSET, _reg_PHY_VREF_INITIAL_START_POINT, dataL & 0x00ffU); + ddrtbl_setval(_cnf_DDR_PHY_SLICE_REGSET, _reg_PHY_VREF_INITIAL_STOP_POINT, (dataL & 0xff00U) >> 8); + } + + /*********************************************************************** + * Write Vref (MR14) Training range + ***********************************************************************/ + dataL = (uint32_t)(Boardcnf->vref_w); + if (dataL) { + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_WDQLVL_VREF_DELTA_F0, (((dataL & 0xff00U) >> 8) - (dataL & 0x00ffU) + 1) / 2); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_WDQLVL_VREF_DELTA_F1, (((dataL & 0xff00U) >> 8) - (dataL & 0x00ffU) + 1) / 2); + for (cs = 0U; cs < CS_CNT; cs++) { + for (i = 0U; i < 3U; i++) { + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_MR14_DATA_Fx_CSx[i][cs], (((dataL & 0xff00U) >> 8) + (dataL & 0x00ffU)) / 2); + } + } + } + + /*********************************************************************** + * CA Vref (MR12) Default configuration + ***********************************************************************/ + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_MR12_DATA_F0_1, DDR_CAVREF_VAL); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_MR12_DATA_F0_0, DDR_CAVREF_VAL); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_MR12_DATA_F1_1, DDR_CAVREF_VAL); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_MR12_DATA_F1_0, DDR_CAVREF_VAL); + + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_CALVL_VREF_INITIAL_START_POINT_F0, DDR_CAVREF_VAL); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_CALVL_VREF_INITIAL_STOP_POINT_F0, DDR_CAVREF_VAL); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_CALVL_VREF_INITIAL_START_POINT_F1, DDR_CAVREF_VAL); + ddrtbl_setval(_cnf_DDR_PI_REGSET, _reg_PI_CALVL_VREF_INITIAL_STOP_POINT_F1, DDR_CAVREF_VAL); + + /*********************************************************************** + * Low Freq setting + ***********************************************************************/ + if (3 * ddr_mbps < 4 * 1600 * ddr_mbpsdiv) { + ddrtbl_setval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_PLL_CTRL, 0x1342); + } + + if (ddr_mbps < 4 * 640 * ddr_mbpsdiv) { + /* PCLK(10-100MHz) */ + ddrtbl_setval(_cnf_DDR_PHY_SLICE_REGSET, _reg_PHY_PAD_DSLICE_IO_CFG, 0x05); + ddrtbl_setval(_cnf_DDR_PHY_ADR_V_REGSET, _reg_PHY_PAD_ADR_IO_CFG_0, 0x05); + ddrtbl_setval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_PAD_ACS_IO_CFG, 0x05); + + /* CAL_CLK(10-20MHz) */ + ddrtbl_setval(_cnf_DDR_PHY_SLICE_REGSET, _reg_PHY_DATA_DC_CAL_CLK_SEL, 0x04); + ddrtbl_setval(_cnf_DDR_PHY_ADR_V_REGSET, _reg_PHY_ADR_DC_CAL_CLK_SEL_0, 0x04); + ddrtbl_setval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_CLK_DC_CAL_CLK_SEL, 0x04); + ddrtbl_setval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_CAL_CLK_SELECT_0, 0x05); + } + + /*********************************************************************** + * FREQ_SEL_MULTICAST & PER_CS_TRAINING_MULTICAST SET (for safety) + ***********************************************************************/ + ddr_setval_ach(_reg_PHY_FREQ_SEL_MULTICAST_EN, 0x01U); + ddr_setval_ach_as(_reg_PHY_PER_CS_TRAINING_MULTICAST_EN, 0x01U); + + /*********************************************************************** + * SET DATA SLICE TABLE + ***********************************************************************/ + for (slice = 0U; slice < SLICE_CNT; slice++) { + adr = DDR_PHY_SLICE_REGSET_OFS + DDR_PHY_SLICE_REGSET_SIZE * slice; + for (i = 0U; i < DDR_PHY_SLICE_REGSET_NUM; i++) { + reg_ddrphy_write_a(adr + i, _cnf_DDR_PHY_SLICE_REGSET[i]); + } + } + + /*********************************************************************** + * SET ADR SLICE TABLE + ***********************************************************************/ + adr = DDR_PHY_ADR_V_REGSET_OFS; + for (i = 0U; i < DDR_PHY_ADR_V_REGSET_NUM; i++) { + reg_ddrphy_write_a(adr + i, _cnf_DDR_PHY_ADR_V_REGSET[i]); + } + + /*********************************************************************** + * SET ADRCTRL SLICE TABLE + ***********************************************************************/ + adr = DDR_PHY_ADR_G_REGSET_OFS; + for (i = 0U; i < DDR_PHY_ADR_G_REGSET_NUM; i++) { + reg_ddrphy_write_a(adr + i, _cnf_DDR_PHY_ADR_G_REGSET[i]); + } + + /*********************************************************************** + * SET PI REGISTERS + ***********************************************************************/ + adr = DDR_PI_REGSET_OFS; + ddrtbl_load_num = 83U; + for (i = 0U; i < ddrtbl_load_num; i++) { + reg_ddrphy_write_a(adr + i, _cnf_DDR_PI_REGSET[i]); + } +} + +static void ddrtbl_load_pi(void) +{ + uint32_t ch, dataL; + + const uint32_t DDR_PI_REGSET_OFS = DDR_PI_REGSET_OFS_S4; + const uint32_t DDR_PI_REGSET_NUM = DDR_PI_REGSET_NUM_S4; + + /*********************************************************************** + * SET PI REGISTERS + ***********************************************************************/ + dataL = ddrtbl_load_num; + while (dataL < DDR_PI_REGSET_NUM) { + reg_ddrphy_write_a(DDR_PI_REGSET_OFS + dataL, _cnf_DDR_PI_REGSET[dataL]); + ++dataL; + } + + foreach_vch(ch) { + /* --- DATA_BYTE_SWAP --- */ + dataL = (uint32_t)(Boardcnf->ch[ch].dqs_swap); + ddr_setval(ch, _reg_PI_DATA_BYTE_SWAP_EN, 0x01U); + ddr_setval(ch, _reg_PI_DATA_BYTE_SWAP_SLICE0, dataL & 0x0fU); + ddr_setval(ch, _reg_PI_DATA_BYTE_SWAP_SLICE1, (dataL >> 4) & 0x0fU); + + if (!(ch_have_this_cs[1] & (1U << ch))) { + ddr_setval(ch, _reg_PI_CS_MAP, 0x01U); + } + } +} + +/******************************************************************************* + * CONFIGURE DDR REGISTERS + ******************************************************************************/ +static void ddr_config(void) +{ + uint32_t ch, slice; + uint32_t dataL; + uint8_t high_byte[SLICE_CNT]; + + const uint32_t _par_CALVL_DEVICE_MAP = 1U; + + foreach_vch(ch) { + /*********************************************************************** + * BOARD SETTINGS (DQ, DM, VREF_DRIVING) + ***********************************************************************/ + for (slice = 0U; slice < SLICE_CNT; slice++) { + high_byte[slice] = ((uint32_t)(Boardcnf->ch[ch].dqs_swap) >> (4U * slice)) % 2; + ddr_setval_s(ch, slice, _reg_PHY_DQ_DM_SWIZZLE0, Boardcnf->ch[ch].dq_swap[slice]); + ddr_setval_s(ch, slice, _reg_PHY_DQ_DM_SWIZZLE1, (uint32_t)(Boardcnf->ch[ch].dm_swap[slice])); + if (high_byte[slice]) { + /* HIGHER 16 BYTE */ + ddr_setval_s(ch, slice, _reg_PHY_CALVL_VREF_DRIVING_SLICE, 0x00U); + } else { + /* LOWER 16 BYTE */ + ddr_setval_s(ch, slice, _reg_PHY_CALVL_VREF_DRIVING_SLICE, 0x01U); + } + } + + /*********************************************************************** + * BOARD SETTINGS (CA, ADDR_SEL) + ***********************************************************************/ + dataL = (0x00ffffffU & (uint32_t)(Boardcnf->ch[ch].ca_swap)); + + /* --- ADR_ADDR_SEL --- */ + ddr_setval(ch, _reg_PHY_ADR_ADDR_SEL_0, dataL); + + /* --- ADR_CALVL_SWIZZLE --- */ + if (high_byte[1]) { + dataL |= 0x00888888U; + } + ddr_setval(ch, _reg_PHY_ADR_CALVL_SWIZZLE0_0, dataL); + ddr_setval(ch, _reg_PHY_ADR_CALVL_SWIZZLE1_0, 0x00000000U); + ddr_setval(ch, _reg_PHY_CALVL_DEVICE_MAP, _par_CALVL_DEVICE_MAP); + + /*********************************************************************** + * mask CS_MAP if RANK1 is not found + ***********************************************************************/ + if (!(ch_have_this_cs[1] & (1U << ch))) { + ddr_setval(ch, _reg_PHY_ADR_CALVL_RANK_CTRL_0, 0x00U); + for (slice = 0U; slice < SLICE_CNT; slice++) { + ddr_setval_s(ch, slice, _reg_PHY_PER_CS_TRAINING_EN, 0x00U); + } + } + } +} + +/******************************************************************************* + * DBSC register setting functions + ******************************************************************************/ +static void dbsc_regset_pre(void) +{ + uint32_t ch, cs; + + /*********************************************************************** + * PRIMARY SETTINGS + ***********************************************************************/ + /* LPDDR4, BL=16, DFI interface */ + dbsc_write_32(DBSC_DBKIND, 0x0000000aU); + dbsc_write_32(DBSC_DBKINDA, 0x0000000aU); + dbsc_write_32(DBSC_DBBL, 0x00000002U); + dbsc_write_32(DBSC_DBBLA, 0x00000002U); + dbsc_write_32(DBSC_DBPHYCONF0, 0x00000001U); + + dbsc_write_32(DBSC_DBSYSCONF0, 0x00000001U); + + /* FREQRATIO=2 */ + dbsc_write_32(DBSC_DBSYSCONF1, 0x00000002U); + dbsc_write_32(DBSC_DBSYSCONF1A, 0x00000002U); + + dbsc_write_32(DBSC_DBSYSCONF2, 0x00000001U); + dbsc_write_32(DBSC_DBSYSCONF2A, 0x00000061U); + + foreach_ech(ch) { + for (cs = 0U; cs < CS_CNT; cs++) { + if (ddr_density[ch][cs] == 0xffU) { + mmio_write_32(DBSC_DBMEMCONF(ch, cs), 0x00U); + mmio_write_32(DBSC_DBMEMCONFA(ch, cs), 0x00U); + } else { + mmio_write_32(DBSC_DBMEMCONF(ch, cs), DBMEMCONF_REGD(ddr_density[ch][cs])); + mmio_write_32(DBSC_DBMEMCONFA(ch, cs), DBMEMCONF_REGD(ddr_density[ch][cs])); + } + } + } +} + +static void dbsc_regset(void) +{ + uint32_t dataL; + uint32_t tmp[4]; + + /* RFC */ + js2[JS2_tRFCab] = _f_scale(ddr_mbps, ddr_mbpsdiv, + 1UL * jedec_spec2_tRFC_ab[max_density] * 1000, 0); + + /* DBTR0.CL : RL */ + dbsc_write_32(DBSC_DBTR(0), RL); + + /* DBTR1.CWL : WL */ + dbsc_write_32(DBSC_DBTR(1), WL); + + /* DBTR2.AL : 0 */ + dbsc_write_32(DBSC_DBTR(2), 0U); + + /* DBTR3.TRCD: tRCD */ + dbsc_write_32(DBSC_DBTR(3), js2[JS2_tRCD]); + + /* DBTR4.TRPA,TRP: tRPab,tRPpb */ + dbsc_write_32(DBSC_DBTR(4), (js2[JS2_tRPab] << 16) | js2[JS2_tRPpb]); + + /* DBTR5.TRC : use tRCpb */ + dbsc_write_32(DBSC_DBTR(5), js2[JS2_tRCpb]); + + /* DBTR6.TRAS : tRAS */ + dbsc_write_32(DBSC_DBTR(6), js2[JS2_tRAS]); + + /* DBTR7.TRRD : tRRD */ + dbsc_write_32(DBSC_DBTR(7), (js2[JS2_tRRD] << 16) | js2[JS2_tRRD]); + + /* DBTR8.TFAW : tFAW */ + dbsc_write_32(DBSC_DBTR(8), js2[JS2_tFAW]); + + /* DBTR9.TRDPR : nRTP */ + dbsc_write_32(DBSC_DBTR(9), js1[js1_ind].nRTP); + + /* DBTR10.TWR : nWR */ + dbsc_write_32(DBSC_DBTR(10), js1[js1_ind].nWR); + + /* DBTR11.TRDWR : RL + BL / 2 + Rounddown(tRPST) + PHY_ODTLoff - ODTLon + tDQSCK - tODTon,min + PCB delay (out+in) + tPHY_ODToff */ + dbsc_write_32(DBSC_DBTR(11), + RL + (16 / 2) + 1 + 2 - js1[js1_ind].ODTLon + js2[JS2_tDQSCK] - js2[JS2_tODTon_min] + _f_scale(ddr_mbps, ddr_mbpsdiv, (1500 + 500 + 800), 0)); + + /* DBTR12.TWRRD : WL + 1 + BL/2 + tWTR */ + dataL = WL + 1 + (16 / 2) + js2[JS2_tWTR]; + dbsc_write_32(DBSC_DBTR(12), (dataL << 16) | dataL); + + /* DBTR13.TRFCAB : tRFCab */ + dbsc_write_32(DBSC_DBTR(13), + (js2[JS2_tRFCab])); + + /* DBTR14.TCKEHDLL,tCKEH : tCKEHCMD,tCKEHCMD */ + dbsc_write_32(DBSC_DBTR(14), + ((js2[JS2_tCKEHCMD] + 3U) << 16) | (js2[JS2_tCKEHCMD] + 3U)); + + /* DBTR15.TCKESR,TCKEL : tSR,tCKELPD */ + dbsc_write_32(DBSC_DBTR(15), + (js2[JS2_tSR] << 16) | (js2[JS2_tCKELPD])); + + /* DBTR16 */ + tmp[0] = WL; + tmp[1] = WL - 4U; + tmp[2] = RL + 33U + 2U; + tmp[3] = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_RDLAT_ADJ_F1) - 1U; + dbsc_write_32(DBSC_DBTR(16), + (tmp[3] << 24) | (tmp[2] << 16) | (tmp[1] << 8) | tmp[0]); + + /* DBTR24 */ + /* WRCSLAT */ + tmp[0] = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_WRLAT_ADJ_F1) - 5U; + /* WRCSGAP = 6 + 1 */ + tmp[1] = 7U; + /* RDCSLAT */ + tmp[2] = RL - 6U; + /* RDCSGAP */ + tmp[3] = 4U + 2U; + dbsc_write_32(DBSC_DBTR(24), + (tmp[3] << 24) | (tmp[2] << 16) | (tmp[1] << 8) | tmp[0]); + + /* DBTR17.TMODRD,TMOD,TRDMR: tMRR,tMRD,(0)*/ + dbsc_write_32(DBSC_DBTR(17), (js2[JS2_tMRR] << 24) | (js2[JS2_tMRD] << 16)); + + /* DBTR18.RODTL, RODTA, WODTL, WODTA : do not use in LPDDR4 */ + dbsc_write_32(DBSC_DBTR(18), 0U); + + /* DBTR19.TZQCL, TZQCS : do not use in LPDDR4 */ + dbsc_write_32(DBSC_DBTR(19), 0U); + + /* DBTR20.TXSDLL, TXS : tRFCab+tCKEHCMD */ + dataL = js2[JS2_tRFCab] + js2[JS2_tCKEHCMD] + 3U; + dbsc_write_32(DBSC_DBTR(20), (dataL << 16) | dataL); + + /* DBTR21.TCCD */ + dbsc_write_32(DBSC_DBTR(21), (ddr_tccd << 16) | ddr_tccd); + + /* DBTR22.ZQLAT : */ + dbsc_write_32(DBSC_DBTR(22), (js2[JS2_tZQCALns] << 16) | js2[JS2_tZQLAT]); + + /* DBTR23.RRSPC */ + dbsc_write_32(DBSC_DBTR(23), 0x00000003U); + + /* DBTR25 : do not use in LPDDR4 */ + dbsc_write_32(DBSC_DBTR(25), 0U); + + /* DBRNK : */ + /* DBSC_DBRNK2 rkrr */ + dbsc_write_32(DBSC_DBRNK(2), 0x000000CC); + + /* DBSC_DBRNK3 rkrw */ + dbsc_write_32(DBSC_DBRNK(3), 0x00000066); + + /* DBSC_DBRNK4 rkwr */ + dbsc_write_32(DBSC_DBRNK(4), 0x00000066); + + /* DBSC_DBRNK5 rkww */ + dbsc_write_32(DBSC_DBRNK(5), 0x000000CC); + + /*********************************************************************** + * timing registers for Scheduler + ***********************************************************************/ + /* SCFCTST0 */ + /* SCFCTST0 ACT-ACT*/ + tmp[3] = 1UL * js2[JS2_tRCpb] * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv; + /* SCFCTST0 RDA-ACT*/ + tmp[2] = 1UL * ((16U / 2U) + js2[JS2_tRTP] - 8U + js2[JS2_tRPpb]) * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv; + /* SCFCTST0 WRA-ACT*/ + tmp[1] = 1UL * (WL + 1U + (16U / 2U) + js1[js1_ind].nWR) * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv; + /* SCFCTST0 PRE-ACT*/ + tmp[0] = 1UL * js2[JS2_tRPpb] * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv; + dbsc_write_32(DBSC_SCFCTST0, (tmp[3] << 24) | (tmp[2] << 16) | (tmp[1] << 8) | tmp[0]); + + /* SCFCTST1 */ + /* SCFCTST1 RD-WR*/ + tmp[3] = 1UL * (mmio_read_32(DBSC_DBTR(11)) & 0xffU) * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv; + /* SCFCTST1 WR-RD*/ + tmp[2] = 1UL * (mmio_read_32(DBSC_DBTR(12)) & 0xffU) * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv; + /* SCFCTST1 ACT-RD/WR*/ + tmp[1] = 1UL * js2[JS2_tRCD] * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv; + /* SCFCTST1 ASYNCOFS*/ + tmp[0] = 12U; + dbsc_write_32(DBSC_SCFCTST1, (tmp[3] << 24) | (tmp[2] << 16) | (tmp[1] << 8) | tmp[0]); + + /* DBSCHRW1 */ + /* DBSCHRW1 SCTRFCAB*/ + tmp[0] = 1UL * js2[JS2_tRFCab] * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv; + dataL =(((mmio_read_32(DBSC_DBTR(16)) & 0x00FF0000U) >> 16) + + (mmio_read_32(DBSC_DBTR(22)) & 0x0000FFFFU) + + (0x28U * 2U)) * bus_mbps * ddr_mbpsdiv / ddr_mbps / bus_mbpsdiv + 7U; + if (tmp[0] < dataL) { + tmp[0] = dataL; + } + dbsc_write_32(DBSC_DBSCHRW1, tmp[0] + + ((mmio_read_32(DBSC_DBTR(22)) & 0x0000FFFF) + * bus_mbps * ddr_mbpsdiv + (ddr_mbps - 1U)) / ddr_mbps / bus_mbpsdiv); + + /*********************************************************************** + * QOS and CAM + ***********************************************************************/ + dbsc_write_32(DBSC_DBBCAMDIS, 0x00000001U); +} + +static void dbsc_regset_post(void) +{ + uint32_t dataL; + +#if RCAR_REWT_TRAINING != 0 + uint32_t ctrl_clk; + uint32_t clk_count; + uint32_t phymster_req_interval; +#endif /* RCAR_REWT_TRAINING */ + + /*set DBI */ + dbsc_write_32(DBSC_DBDBICNT, 0x00000003U); + + /*set REFCYCLE */ + dataL = DBSC_REFINT * ddr_mbps / 2000U / ddr_mbpsdiv; + dbsc_write_32(DBSC_DBRFCNF1, 0x00080000U | (dataL & 0x0000ffffU)); + dbsc_write_32(DBSC_DBRFCNF2, 0x00010000U | DBSC_REFINTS); + +#if RCAR_REWT_TRAINING != 0 + /* Periodic-WriteDQ Training seeting */ + dbsc_write_32(DBSC_DBDFIPMSTRCNF, 0x00000000U); + + ddr_setval_ach(_reg_PI_WDQLVL_EN_F1, 0x03U); + ddr_setval_ach(_reg_PI_WDQLVL_VREF_EN, 0x00U); + ddr_setval_ach(_reg_PI_WDQLVL_PERIODIC, 0x01U); + + /* DFI_PHYMSTR_ACK , WTmode = b'01 */ + dbsc_write_32(DBSC_DBDFIPMSTRCNF, 0x00000011U); +#endif /* RCAR_REWT_TRAINING */ + + /* PCLK */ + if (ddr_mbps < 4 * 640 * ddr_mbpsdiv) { + ddr_setval_ach(_reg_PHY_PAD_CAL_IO_CFG_0, 0x05U); + } else { + ddr_setval_ach(_reg_PHY_PAD_CAL_IO_CFG_0, 0x06U); + } + + /* periodic SoC zqcal enable */ + ddr_setval_ach(_reg_PHY_CAL_MODE_0, ddrtbl_getval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_CAL_MODE_0) | 0x02U); + + /* periodic dram zqcal enable */ + dbsc_write_32(DBSC_DBCALCNF, 0x01000010U); + + /* periodic phy ctrl update enable */ + dbsc_write_32(DBSC_DBDFICUPDCNF, 0x504C0001U); + +#ifdef DDR_BACKUPMODE + if (ddrBackup == DRAM_BOOT_STATUS_WARM) { + /* SRX */ + send_dbcmd(0x0A840001U); + } +#endif /* DDR_BACKUPMODE */ + /* set Auto Refresh */ + dbsc_write_32(DBSC_DBRFEN, 0x00000001U); + +#if RCAR_REWT_TRAINING != 0 + /* Periodic WriteDQ Training */ + clk_count = 1024U - ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_LONG_COUNT_MASK) * 32U; + ctrl_clk = ddr_mbps / ddr_mbpsdiv / 4U; + dataL = clk_count * (1000U * 1000U * 1000U / (1000U * ctrl_clk)); + + phymster_req_interval = REWT_TRAINING_INTERVAL - 3000; + + ddr_setval_ach(_reg_PI_WDQLVL_INTERVAL, phymster_req_interval * 1000U * 100U / (dataL / 10U) ); +#endif /* RCAR_REWT_TRAINING */ + + /* dram access enable */ + dbsc_write_32(DBSC_DBACEN, 0x00000001U); + + /* MR13: vrcg(normal mode) */ + send_dbcmd(0x0e840dc0U); + + MSG_LF("dbsc_regset_post(done)\n"); +} + +/******************************************************************************* + * DFI_INIT_START + ******************************************************************************/ +static uint32_t dfi_init_start(void) +{ + uint32_t ch; + uint32_t phytrainingok; + uint32_t retry; + uint32_t dataL; + const uint32_t RETRY_MAX = 0x10000U; + + /*********************************************************************** + * init start + ***********************************************************************/ + pll3_control(0U); /* Low frequency mode */ + /* dbdficnt0: + * dfi_dram_clk_disable=1 + * dfi_frequency = 0 + * freq_ratio = 01 (2:1) + * init_start =0 + */ + foreach_vch(ch) { + mmio_write_32(DBSC_DBDFICNT(ch), 0x00000F10U); + } + + /* dbdficnt0: + * dfi_dram_clk_disable=1 + * dfi_frequency = 0 + * freq_ratio = 01 (2:1) + * init_start =1 + */ + foreach_vch(ch) { + mmio_write_32(DBSC_DBDFICNT(ch), 0x00000F11U); + } + + wait_dbpdstat1(0x03U); + + /*********************************************************************** + * dll rst + ***********************************************************************/ + /* dll_rst negate */ + foreach_vch(ch) { + mmio_write_32(DBSC_DBPDCNT3(ch), 0x0000CF01U); + } + + /*********************************************************************** + * wait init_complete + ***********************************************************************/ + phytrainingok = 0U; + retry = 0U; + while (retry++ < RETRY_MAX) { + foreach_vch(ch) { + dataL = mmio_read_32(DBSC_DBDFISTAT(ch)); + if (dataL & 0x00000001U) { + phytrainingok |= (1U << ch); + } + } + if (phytrainingok == ddr_phyvalid) { + break; + } + } + + /*********************************************************************** + * all ch ok? + ***********************************************************************/ + if ((phytrainingok & ddr_phyvalid) != ddr_phyvalid) { + return (phytrainingok); + } + /* dbdficnt0: + * dfi_dram_clk_disable=0 + * dfi_frequency = 0 + * freq_ratio = 01 (2:1) + * init_start =0 + */ + foreach_vch(ch) { + mmio_write_32(DBSC_DBDFICNT(ch), 0x00000010U); + } + + return (phytrainingok); +} + +/******************************************************************************* + * DDR mode register setting + ******************************************************************************/ +static void ddr_register_set(void) +{ + int32_t fspwp; + uint32_t tmp; + + for (fspwp = 0U; fspwp < 2U; fspwp++) { + /* MR13: fspop,fspwp */ + send_dbcmd(0x0e840d08U | ((2U - fspwp) << 6)); + + tmp = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_MR1_DATA_Fx_CSx[fspwp][0]); + send_dbcmd(0x0e840100U | tmp); + + tmp = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_MR2_DATA_Fx_CSx[fspwp][0]); + send_dbcmd(0x0e840200U | tmp); + + tmp = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_MR3_DATA_Fx_CSx[fspwp][0]); + send_dbcmd(0x0e840300U | tmp); + + tmp = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_MR11_DATA_Fx_CSx[fspwp][0]); + send_dbcmd(0x0e840b00U | tmp); + + tmp = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_MR12_DATA_Fx_CSx[fspwp][0]); + send_dbcmd(0x0e840c00U | tmp); + + tmp = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_MR14_DATA_Fx_CSx[fspwp][0]); + send_dbcmd(0x0e840e00U | tmp); + + /* MR22 */ + tmp = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_MR22_DATA_F0_0); + send_dbcmd(0x0e801600U | tmp); + + if (ch_have_this_cs[1]) { + tmp = ddrtbl_getval(_cnf_DDR_PI_REGSET, _reg_PI_MR22_DATA_F0_1); + send_dbcmd(0x0e811600U | tmp); + } + + /* ZQCAL start */ + send_dbcmd(0x0d84004fU); + + /* ZQLAT */ + send_dbcmd(0x0d840051U); + } + + /* MR13, fspwp */ + send_dbcmd(0x0e840d08U); +} + +/******************************************************************************* + * Training handshake functions + ******************************************************************************/ +static void wait_dbpdstat1(uint32_t status) +{ + uint32_t i, ch, dataL; + + for (i = 0U; i < 2U; i++) { + do { + dataL = status; + foreach_vch(ch) { + dataL &= mmio_read_32(DBSC_DBPDSTAT1(ch)); + } + } while (dataL != status); + } +} + +static uint32_t wait_freqchgreq(uint32_t req_assert) +{ + uint32_t dataL; + uint32_t count; + uint32_t ch; + + count = 0xFFFFFFU; + + if (req_assert) { + do { + dataL = 1U; + foreach_vch(ch) { + dataL &= mmio_read_32(DBSC_DBPDSTAT(ch)); + } + count = count - 1U; + } while (((dataL & 0x01U) != 0x01U) & (count != 0U)); + } else { + do { + dataL = 0U; + foreach_vch(ch) { + dataL |= mmio_read_32(DBSC_DBPDSTAT(ch)); + } + count = count - 1U; + } while (((dataL & 0x01U) != 0x00U) & (count != 0U)); + } + + return (count == 0U); +} + +static void set_freqchgack(uint32_t ackassert) +{ + uint32_t ch; + uint32_t dataL; + + if (ackassert) { + dataL = 0x0000CF01U; + } else { + dataL = 0x00000000U; + } + + foreach_vch(ch) { + mmio_write_32(DBSC_DBPDCNT2(ch), dataL); + } +} + +static void set_dfifrequency(uint32_t freq) +{ + uint32_t ch; + + foreach_vch(ch) { + mmio_clrsetbits_32(DBSC_DBDFICNT(ch), 0x1fU << 24, (freq << 24)); + } +} + +static uint32_t pll3_freq(uint32_t fsel) +{ + uint32_t timeout; + + wait_freqchgreq(1); + + if (fsel == 0U) { + pll3_control(0); /* Low frequency mode */ + } else { + pll3_control(1); /* High frequency mode */ + } + + set_dfifrequency(fsel); + set_freqchgack(1); + + timeout = wait_freqchgreq(0); + set_freqchgack(0); + + wait_dbpdstat1(0x03U); + + if (timeout) { + FATAL_MSG("BL2: Time out[2]\n"); + return (1); + } + return (0); +} + +/******************************************************************************* + * training by pi + ******************************************************************************/ +static uint32_t pi_training_go(void) +{ + uint32_t flag; + uint32_t dataL; + uint32_t retry; + const uint32_t RETRY_MAX = 4096 * 16; + uint32_t ch; + + uint32_t mst_ch; + uint32_t cur_frq; + uint32_t complete; + uint32_t frqchg_req; + + /*********************************************************************** + * pi_start + ***********************************************************************/ + foreach_vch(ch) { + while((ddr_getval(ch, _reg_PI_INT_STATUS)) != 0U); + } + + foreach_vch(ch) { + mmio_write_32(DBSC_DBPDRGA(ch), DDR_REGDEF_ADR(_reg_PI_START)); + mmio_write_32(DBSC_DBPDRGD(ch), 0x00000B01U); + } + + foreach_vch(ch) { + while((mmio_read_32(DBSC_DBPDRGA(ch)) & 0x00008000U) == 0U); + mmio_write_32(DBSC_DBPDRGA(ch), mmio_read_32(DBSC_DBPDRGA(ch))); + } + + /* set dfi_phymstr_ack = 1 */ + dbsc_write_32(DBSC_DBDFIPMSTRCNF, 0x00000001U); + + /*********************************************************************** + * wait pi_int_status[0] + ***********************************************************************/ + flag = 0U; + complete = 0U; + cur_frq = 0U; + retry = RETRY_MAX; + + do { + for (frqchg_req = 0U, ch = 0U; ch < DRAM_CH_CNT; ch++) { + if (((~complete) & ddr_phyvalid) & (1U << ch)) { + if (mmio_read_32(DBSC_DBPDSTAT(ch)) & 0x01U) { + frqchg_req = 1U; + mst_ch = ch; + break; + } + } + } + + if (frqchg_req) { + cur_frq = (0x0300U & mmio_read_32(DBSC_DBPDSTAT(mst_ch))) >> 8; + flag = pll3_freq(cur_frq); + if (flag) { + break; + } + } else { + foreach_vch(ch) { + if (complete & (1U << ch)) { + continue; + } + mmio_write_32(DBSC_DBPDRGA(ch), DDR_REGDEF_ADR(_reg_PI_INT_STATUS) | 0x00004000U); + if (0x00008000U & mmio_read_32(DBSC_DBPDRGA(ch))) { + mmio_write_32(DBSC_DBPDRGA(ch), DDR_REGDEF_ADR(_reg_PI_INT_STATUS) | 0x00008000U); + dataL = mmio_read_32(DBSC_DBPDRGD(ch)); + mmio_write_32(DBSC_DBPDRGA(ch), DDR_REGDEF_ADR(_reg_PI_INT_STATUS) | 0x00000000U); + if (dataL & 0x01U) { + complete |= (1U << ch); + } + } + } + if (complete == ddr_phyvalid) { + break; + } + } + } while (--retry); + + foreach_vch(ch) { + /* dummy read */ + dataL = ddr_getval(ch, _reg_PI_START); + dataL = ddr_getval(ch, _reg_PI_INT_STATUS); + ddr_setval(ch, _reg_PI_INT_ACK, dataL); + } + + return complete; +} + +static void manual_frequency_change(void) +{ + uint32_t ch; + + /* FSP-OP:1 FSP-WR:1 VRCG:1 */ + send_dbcmd(0x0e840dc8U); + + /* PDE */ + send_dbcmd(0x08840000U); + + /* init start ass */ + foreach_vch(ch) { + mmio_write_32(DBSC_DBDFICNT(ch), 0x01000011U); + } + + /* wait init comp neg */ + foreach_vch(ch) { + while((mmio_read_32(DBSC_DBDFISTAT(ch)) & 0x00000001U) != 0U); + } + + pll3_control(1); + + /* init start neg */ + foreach_vch(ch) { + mmio_write_32(DBSC_DBDFICNT(ch), 0x01000010U); + } + + /* wait init comp ass */ + foreach_vch(ch) { + while((mmio_read_32(DBSC_DBDFISTAT(ch)) & 0x00000001U) != 1U); + } + + /* PDX */ + send_dbcmd(0x08840001U); + + /* set MR13 for FSP */ + ddr_setval_ach(_reg_PI_MR13_DATA_0, 0xc8U); + ddr_setval_ach(_reg_PI_MR13_DATA_1, 0xc8U); +} + +static uint32_t manual_training_wrlvl(void) +{ + uint32_t dataL; + uint32_t ch, cs, rank; + uint32_t wr_training_ng; + + if (ch_have_this_cs[1] != 0) { + rank = 2; + } else { + rank = 1; + } + + /* WR LVL */ + wr_training_ng = 0x00U; + + for(cs = 0; rank > cs; cs++) { + ddr_setval_ach(_reg_PI_WRLVL_CS, cs); + ddr_setval_ach(_reg_PI_WRLVL_REQ, 0x1U); + + foreach_vch(ch) { + while(1) { + dataL = ddr_getval(ch, _reg_PI_INT_STATUS); + if(dataL & 0x00001000U) break; + } + } + foreach_vch(ch) { + if (ddr_getval(ch, _reg_PHY_WRLVL_STATUS_OBS) & ( 1U << 12 )) { /* bit12 wrlvl_error */ + wr_training_ng |= 1U << ch; + } + } + ddr_setval_ach(_reg_PI_INT_ACK, 0x3FFFFFU); + } + return ~wr_training_ng; +} + +static uint32_t manual_training_rdgtlvl(void) +{ + uint32_t dataL; + uint32_t ch, cs, rank; + uint32_t gt_training_ng; + + if (ch_have_this_cs[1] != 0) { + rank = 2; + } else { + rank = 1; + } + + /* RD GATE LVL */ + gt_training_ng = 0x00U; + + for(cs = 0; rank > cs; cs++) { + ddr_setval_ach(_reg_PI_RDLVL_CS, cs); + ddr_setval_ach(_reg_PI_RDLVL_GATE_REQ, 0x1U); + + foreach_vch(ch) { + while(1) { + dataL = ddr_getval(ch, _reg_PI_INT_STATUS); + if(dataL & 0x00001000U) break; + } + } + foreach_vch(ch) { + if (ddr_getval(ch, _reg_PHY_GTLVL_STATUS_OBS) & ( 3U << 6 )) { /* bit6 Minimum delay setup error, bit7 Maximum delay setup error */ + gt_training_ng |= 1U << ch; + } + } + ddr_setval_ach(_reg_PI_INT_ACK, 0x3FFFFFU); + } + return ~gt_training_ng; +} + +static uint32_t manual_training_rdlvl(void) +{ + uint32_t dataL; + uint32_t ch, cs, rank; + uint32_t rd_training_ng; + + if (ch_have_this_cs[1] != 0) { + rank = 2; + } else { + rank = 1; + } + + /* RD LVL */ + rd_training_ng = 0x00U; + + for(cs = 0; rank > cs; cs++) { + ddr_setval_ach(_reg_PI_RDLVL_CS, cs); + ddr_setval_ach(_reg_PI_RDLVL_REQ, 0x1U); + + foreach_vch(ch) { + while(1) { + dataL = ddr_getval(ch, _reg_PI_INT_STATUS); + if(dataL & 0x00001000U) break; + } + } + foreach_vch(ch) { + if (ddr_getval(ch, _reg_PI_INT_STATUS) & ( 1U << 1 )) { /* bit1 PI_RDLVL_ERROR_BIT */ + rd_training_ng |= 1U << ch; + } + } + ddr_setval_ach(_reg_PI_INT_ACK, 0x3FFFFFU); + } + return ~rd_training_ng; +} + +static uint32_t manual_training_wdqlvl(void) +{ + uint32_t dataL; + uint32_t ch, cs, rank; + uint32_t wdq_training_ng; + + if (ch_have_this_cs[1] != 0) { + rank = 2; + } else { + rank = 1; + } + + /* WDQ LVL */ + wdq_training_ng = 0x00U; + + for(cs = 0; rank > cs; cs++) { + ddr_setval_ach(_reg_PI_WDQLVL_CS, cs); + ddr_setval_ach(_reg_PI_WDQLVL_REQ, 0x1U); + + foreach_vch(ch) { + while(1) { + dataL = ddr_getval(ch, _reg_PI_INT_STATUS); + if(dataL & 0x00001000U) break; + } + } + foreach_vch(ch) { + if (ddr_getval(ch, _reg_PI_INT_STATUS) & ( 1U << 5 )) { /* bit5 PI_WDQLVL_ERROR_BIT */ + wdq_training_ng |= 1U << ch; + } + } + ddr_setval_ach(_reg_PI_INT_ACK, 0x3FFFFFU); + } + return ~wdq_training_ng; +} + +/*********************************************************************** + * CA Vref Training + ***********************************************************************/ +static uint32_t ca_vref_training(void) +{ + uint32_t dvw, dvw_tmp[DRAM_CH_CNT][CS_CNT]; + uint32_t cavref, cavref_set_min[DRAM_CH_CNT][CS_CNT], cavref_set_max[DRAM_CH_CNT][CS_CNT]; + uint32_t ch, cs, rank; + uint32_t i, dataL, tmp; + uint32_t vref_start, vref_end; + uint32_t ca_training_ng; + + foreach_ech(ch) { + for (cs = 0; CS_CNT > cs; cs++) { + dvw_tmp[ch][cs] = 0x0000U; + cavref_set_min[ch][cs] = 0x0000U; + cavref_set_max[ch][cs] = 0x0000U; + } + } + + /*********************************************************************** + * CA Vref (MR12) Training range + ***********************************************************************/ + dataL = (uint32_t)(Boardcnf->vref_ca); + if (dataL) { + vref_start = dataL & 0x00ffU; + vref_end = (dataL & 0xff00U) >> 8; + } else { + vref_start = 0x000eU; + vref_end = 0x0014U; + } + + /*********************************************************************** + * CA training setting + ***********************************************************************/ + ddr_setval_ach(_reg_PI_MR13_DATA_0, 0xc8U); + ddr_setval_ach(_reg_PI_MR13_DATA_1, 0xc8U); + + ddr_setval_ach(_reg_PI_CA_TRAIN_VREF_EN, 0x0001U); + + if (ch_have_this_cs[1] != 0) { + rank = 2; + } else { + rank = 1; + } + + /*********************************************************************** + * Search Best CA VREF + ***********************************************************************/ + for(cs =0; rank > cs; cs++) { + for (cavref = vref_start; cavref <= vref_end; cavref += DDR_CAVREF_DELTA) { + ddr_setval_ach(_reg_PI_CALVL_CS, cs); + if (cs) { + ddr_setval_ach(_reg_PI_MR12_DATA_F1_1, cavref); + } else { + ddr_setval_ach(_reg_PI_MR12_DATA_F1_0, cavref); + } + ddr_setval_ach(_reg_PI_CALVL_REQ, 0x0001U); + + dataL = 0x00U; + while(dataL == 0x00U) { + dataL = 0x01U << 19; + foreach_vch(ch) { + dataL &= (ddr_getval(ch, _reg_PI_INT_STATUS)); + } + } + + foreach_vch(ch) { + if((0x00000010U & ddr_getval(ch, _reg_PI_INT_STATUS)) == 0x00000000U) { + dvw = 0x0000ffffU; + for (i = 0; i < 6; i++){ + ddr_setval(ch, _reg_PHY_ADR_CALVL_OBS_SELECT_0, i); + dataL = ddr_getval(ch, _reg_PHY_ADR_CALVL_CH0_OBS0_0); + tmp = (dataL & 0x000007ffU) - ((dataL >> 16) & 0x000007ffU); + if(dvw > tmp) { + dvw = tmp; + } + } + + if(dvw_tmp[ch][cs] < dvw) { + dvw_tmp[ch][cs] = dvw; + cavref_set_min[ch][cs] = cavref; + cavref_set_max[ch][cs] = cavref; + } else if (dvw_tmp[ch][cs] == dvw) { + cavref_set_max[ch][cs] = cavref; + } + } + ddr_setval(ch, _reg_PI_INT_ACK, ddr_getval(ch, _reg_PI_INT_STATUS)); + } + } + } + + /*********************************************************************** + * Use the Best CA VREF to do CA training + ***********************************************************************/ + if (rank == 2) { + ddr_setval_ach(_reg_PHY_ADR_CALVL_RANK_CTRL_0, 0x03U); + } + + foreach_vch(ch) { + ddr_setval(ch, _reg_PI_MR12_DATA_F1_0, (cavref_set_min[ch][0] + cavref_set_max[ch][0]) / 2); + ddr_setval(ch, _reg_PI_MR12_DATA_F1_1, (cavref_set_min[ch][rank - 1] + cavref_set_max[ch][rank - 1]) / 2); + } + + ca_training_ng = 0x00U; + for(cs = 0; rank > cs; cs++) { + ddr_setval_ach(_reg_PI_CALVL_CS, cs); + ddr_setval_ach(_reg_PI_CALVL_REQ, 0x0001U); + + dataL = 0x00U; + while(dataL == 0x00U) { + dataL = 0x01U << 19; + foreach_vch(ch) { + dataL &= (ddr_getval(ch, _reg_PI_INT_STATUS)); + } + } + + foreach_vch(ch) { + if (ddr_getval(ch, _reg_PHY_CSLVL_OBS1) & 0xF0000000U) { + ca_training_ng |= 1U << ch; + } + ddr_setval(ch, _reg_PI_INT_ACK, ddr_getval(ch, _reg_PI_INT_STATUS)); + } + } + + ddr_setval_ach(_reg_SC_PHY_MANUAL_UPDATE, 0x01U); + ddr_setval_ach(_reg_PHY_ADRCTL_MANUAL_UPDATE, 0x01U); + + return ~ca_training_ng; +} + +/******************************************************************************* + * DSKEWCALLOCK status check + ******************************************************************************/ +static uint32_t dskewcallock_chk(void) +{ + uint32_t ch; + uint32_t dataL; + uint32_t dskewcallock_ok; + + ddr_setval_ach(_reg_SC_PHY_PLL_SPO_CAL_SNAP_OBS, 0x01U); + + dskewcallock_ok = 0U; + foreach_ech(ch) { + dataL = 0x01U & (ddr_getval(ch, _reg_PHY_PLL_SPO_CAL_OBS_0) >> 16); + dataL &= 0x01U & (ddr_getval(ch, _reg_PHY_PLL_SPO_CAL_OBS_1) >> 16); + dskewcallock_ok |= dataL << ch; + } + + return dskewcallock_ok; +} + +/******************************************************************************* + * Initialize ddr + ******************************************************************************/ +static uint32_t init_ddr(void) +{ + uint32_t phytrainingok; + uint32_t ch; + uint32_t err; + + MSG_LF("init_ddr:0\n"); +#ifdef DDR_BACKUPMODE + dram_get_boot_status(&ddrBackup); +#endif + + /*********************************************************************** + * PLL3 initialization setting + ***********************************************************************/ + /* Reset Status Monitor clear */ + cpg_write_32(CPG_FSRCHKCLRR4, 0x00000200U); + /* Reset Status Monitor set */ + cpg_write_32(CPG_FSRCHKSETR4, 0x00000200U); + /* ddrphy soft reset assert */ + cpg_write_32(CPG_SRST4, mmio_read_32(CPG_SRST4) | 0x00000200U); + /* wait reset FB */ + while((mmio_read_32(CPG_FSRCHKRA4) & 0x00000200U) != 0U); + /* Reset Status Monitor clear */ + cpg_write_32(CPG_FSRCHKCLRR4, 0x00000200U); + + pll3_control(1); /* Initialize PLL3 setting */ + + /* ddrphy soft reset negate */ + cpg_write_32(CPG_SRSTCLR4, 0x00000200U); + while((mmio_read_32(CPG_SRST4) & 0x00000200U) != 0U); + + /*********************************************************************** + * unlock phy + ***********************************************************************/ + /* Unlock DDRPHY register */ + foreach_vch(ch) { + mmio_write_32(DBSC_DBPDLK(ch), 0x0000A55AU); + } + + /*********************************************************************** + * dbsc register pre-setting + ***********************************************************************/ + dbsc_regset_pre(); + + /*********************************************************************** + * load ddrphy registers + ***********************************************************************/ + ddrtbl_load(); + + /*********************************************************************** + * configure ddrphy registers + ***********************************************************************/ + ddr_config(); + + /*********************************************************************** + * ddr backupmode end + ***********************************************************************/ +#ifdef DDR_BACKUPMODE + if (ddrBackup) { + NOTICE("BL2: [WARM_BOOT]\n"); + } else { + NOTICE("BL2: [COLD_BOOT]\n"); + } + + err = dram_update_boot_status(ddrBackup); + if (err) { + NOTICE("BL2: [BOOT_STATUS_UPDATE_ERROR]\n"); + return INITDRAM_ERR_I; + } +#endif + MSG_LF("init_ddr:1\n"); + + /*********************************************************************** + * dfi_init_start (start ddrphy) + ***********************************************************************/ + phytrainingok = dfi_init_start(); + + if (ddr_phyvalid != phytrainingok) { + MSG_LF("init_ddr_error:1\n"); + return (phytrainingok); + } + + MSG_LF("init_ddr:2\n"); + + /*********************************************************************** + * load pi registers + ***********************************************************************/ + ddrtbl_load_pi(); + + /*********************************************************************** + * dbsc register set + ***********************************************************************/ + dbsc_regset(); + MSG_LF("init_ddr:3\n"); + + /*********************************************************************** + * setup DDR mode registers + ***********************************************************************/ + /* Dummy PDE */ + send_dbcmd(0x08840000U); + + /* PDX */ + send_dbcmd(0x08840001U); + + /* MRS */ + ddr_register_set(); + + MSG_LF("init_ddr:4\n"); + + /*********************************************************************** + * exec pi_training + ***********************************************************************/ + phytrainingok &= pi_training_go(); + + if (ddr_phyvalid != phytrainingok) { + MSG_LF("init_ddr_error:2\n"); + return (phytrainingok); + } + + /*********************************************************************** + * exec frequency change + ***********************************************************************/ + manual_frequency_change(); + + /*********************************************************************** + * CA Vref Training + ***********************************************************************/ + phytrainingok &= ca_vref_training(); + + if (ddr_phyvalid != phytrainingok) { + MSG_LF("init_ddr_error:3\n"); + return (phytrainingok); + } + + /*********************************************************************** + * exec wr_training + ***********************************************************************/ + phytrainingok &= manual_training_wrlvl(); + + if (ddr_phyvalid != phytrainingok) { + MSG_LF("init_ddr_error:4\n"); + return (phytrainingok); + } + + /*********************************************************************** + * exec rdgt_training + ***********************************************************************/ + phytrainingok &= manual_training_rdgtlvl(); + + if (ddr_phyvalid != phytrainingok) { + MSG_LF("init_ddr_error:5\n"); + return (phytrainingok); + } + + /*********************************************************************** + * exec rd_training + ***********************************************************************/ + phytrainingok &= manual_training_rdlvl(); + + if (ddr_phyvalid != phytrainingok) { + MSG_LF("init_ddr_error:6\n"); + return (phytrainingok); + } + + /*********************************************************************** + * exec wdq_training + ***********************************************************************/ + phytrainingok &= manual_training_wdqlvl(); + + if (ddr_phyvalid != phytrainingok) { + MSG_LF("init_ddr_error:7\n"); + return (phytrainingok); + } + + MSG_LF("init_ddr:5\n"); + + /*********************************************************************** + * FREQ_SEL_MULTICAST & PER_CS_TRAINING_MULTICAST SET (disable) + ***********************************************************************/ + ddr_setval_ach_as(_reg_PHY_PER_CS_TRAINING_MULTICAST_EN, 0x00U); + ddr_setval_ach(_reg_PHY_FREQ_SEL_MULTICAST_EN, 0x00U); + + MSG_LF("init_ddr:6\n"); + + /*********************************************************************** + * DSKEWCALLOCK status check + ***********************************************************************/ + phytrainingok &= dskewcallock_chk(); + + if (ddr_phyvalid != phytrainingok) { + MSG_LF("init_ddr_error:8\n"); + return (phytrainingok); + } + + /*********************************************************************** + * training complete, setup dbsc + ***********************************************************************/ + dbsc_regset_post(); + MSG_LF("init_ddr:7\n"); + + /*********************************************************************** + * lock phy + ***********************************************************************/ + /* Lock DDRPHY register */ + foreach_vch(ch) { + mmio_write_32(DBSC_DBPDLK(ch), 0x00000000U); + } + + return phytrainingok; +} + +/******************************************************************************* + * DDR Initialize entry + ******************************************************************************/ +int32_t InitDram(void) +{ + uint32_t ch, cs; + uint32_t dataL; + uint32_t failcount; + + dbsc_write_32(DBSC_DBSYSCNT0, 0x00001234U); + dbsc_write_32(DBSC_DBSYSCNT0A, 0x00001234U); + + /*********************************************************************** + * Judge product and cut + ***********************************************************************/ +/* + Prr_Product = mmio_read_32(PRR) & PRR_PRODUCT_MASK; + Prr_Cut = mmio_read_32(PRR) & PRR_CUT_MASK; +*/ + /*********************************************************************** + * Judge board type + ***********************************************************************/ + _cnf_BOARDTYPE = boardcnf_get_brd_type(); + if (_cnf_BOARDTYPE >= BOARDNUM) { + FATAL_MSG("BL2: DDR:Unknown Board\n"); + return 0xffU; + } + Boardcnf = (const struct _boardcnf *)&boardcnfs[_cnf_BOARDTYPE]; + + ddr_phyvalid = (uint32_t)(Boardcnf->phyvalid); + + max_density = 0U; + + for (cs = 0U; cs < CS_CNT; cs++) { + ch_have_this_cs[cs] = 0U; + } + + foreach_ech(ch) { + for (cs = 0U; cs < CS_CNT; cs++) { + ddr_density[ch][cs] = 0xffU; + } + } + + foreach_vch(ch) { + for (cs = 0U; cs < CS_CNT; cs++) { + dataL = (uint32_t)(Boardcnf->ch[ch].ddr_density[cs]); + ddr_density[ch][cs] = dataL; + if (dataL == 0xffU) { + continue; + } + if (dataL > max_density) { + max_density = dataL; + } + ch_have_this_cs[cs] |= (1U << ch); + } + } + + /*********************************************************************** + * Judge board clock frequency (in MHz) + ***********************************************************************/ + boardcnf_get_brd_clk(_cnf_BOARDTYPE, &brd_clk, &brd_clkdiv); + if ((0x01U << 14) & mmio_read_32(RST_MODEMR0)) { + brd_clkdiva = 1U; + } else { + brd_clkdiva = 0U; + } + + /*********************************************************************** + * Judge ddr operating frequency clock(in Mbps) + ***********************************************************************/ + boardcnf_get_ddr_mbps(_cnf_BOARDTYPE, &ddr_mbps, &ddr_mbpsdiv); + + ddr_mul = CLK_DIV(ddr_mbps, ddr_mbpsdiv, brd_clk, brd_clkdiv * (brd_clkdiva + 1U)); + ddr_mul_nf = (16U * ddr_mbps * (brd_clkdiv * (brd_clkdiva + 1U))) / (ddr_mbpsdiv * brd_clk) - (16U * ddr_mul); + ddr_mul_low = CLK_DIV(1600U, 1U, brd_clk, brd_clkdiv * (brd_clkdiva + 1U)); + if((ddr_mul_low * brd_clk / (brd_clkdiv * (brd_clkdiva + 1U))) != 1600U) { + ddr_mul_low += 1; + } + + dataL = 0x03U & (mmio_read_32(RST_MODEMR0) >> 13); + bus_mbps = 0U; + bus_mbpsdiv = 0U; + + switch (dataL) { + case 0U: + bus_mbps = brd_clk * 0x32U; + bus_mbpsdiv = brd_clkdiv; + break; + case 1U: + bus_mbps = brd_clk * 0x28U; + bus_mbpsdiv = brd_clkdiv; + break; + case 2U: + /* Not supported */ + bus_mbps = brd_clk * 0x40U; + bus_mbpsdiv = brd_clkdiv * 2U; + break; + case 3U: + bus_mbps = brd_clk * 0x28U; + bus_mbpsdiv = brd_clkdiv * 2U; + break; + default: + bus_mbps = brd_clk * 0x28U; + bus_mbpsdiv = brd_clkdiv * 2U; + break; + } + + /*********************************************************************** + * Adjust tccd + ***********************************************************************/ + ddr_tccd = 8U; + + NOTICE("BL2: DDR%d(%s)", ddr_mbps / ddr_mbpsdiv, RCAR_DDR_VERSION); + + MSG_LF("Start\n"); + + /*********************************************************************** + * initialize DDR + ***********************************************************************/ + dataL = init_ddr(); + if (dataL == ddr_phyvalid) { + failcount = 0U; + } else { + failcount = 1U; + } + + NOTICE("..%d\n", failcount); + + dbsc_write_32(DBSC_DBSYSCNT0, 0x00000000U); + dbsc_write_32(DBSC_DBSYSCNT0A, 0x00000000U); + + if (failcount == 0U) { + return INITDRAM_OK; + } else { + return INITDRAM_NG; + } +} + +/******************************************************************************* + * END + ******************************************************************************/ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c new file mode 100644 index 00000000..b8371914 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.c @@ -0,0 +1,254 @@ +/******************************************************************************* + * Copyright (c) 2021-2022 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DRAM Param setting + ******************************************************************************/ +#define JS2_DERATE 0 +#define DBSC_REFINT 1920 /* Average periodic refresh interval/Average Refresh Interval [ns] */ +#define DBSC_REFINTS 0 /* 0: Average interval is REFINT. / 1: Average interval is 1/2 REFINT. */ + +#define REWT_TRAINING_INTERVAL 20000 /* Periodic-WriteDQ Training Interval [us] */ + +/******************************************************************************* + * NUMBER OF BOARD CONFIGRATION + * PLEASE DEFINE + ******************************************************************************/ +#define BOARDNUM 3 /* Add User platform BOARD */ + +/******************************************************************************* + * PLEASE SET board number or board judge function + ******************************************************************************/ +#define BOARD_JUDGE_AUTO +#ifdef BOARD_JUDGE_AUTO +static uint32_t _board_judge(void); +static uint32_t boardcnf_get_brd_type(void) { + return _board_judge(); +} +#else /* BOARD_JUDGE_AUTO */ +static uint32_t boardcnf_get_brd_type(void) { + return (0); +} +#endif /* BOARD_JUDGE_AUTO */ + +/******************************************************************************* + * BOARD CONFIGRATION + * PLEASE DEFINE boardcnfs[] + ******************************************************************************/ +struct _boardcnf_ch { + /* + 0x00...0000B: 4Gb dual channel die / 2Gb single channel die + 0x01...0001B: 6Gb dual channel die / 3Gb single channel die + 0x02...0010B: 8Gb dual channel die / 4Gb single channel die + 0x03...0011B: 12Gb dual channel die / 6Gb single channel die + 0x04...0100B: 16Gb dual channel die / 8Gb single channel die + 0xff...NO_MEMORY + */ + uint8_t ddr_density[CS_CNT]; + /* SoC caX([5][4][3][2][1][0]) -> MEM caY: */ + uint32_t ca_swap; + /* SoC dqsX([3][2][1][0]) -> MEM dqsY: */ + uint16_t dqs_swap; + /* SoC dq([7][6][5][4][3][2][1][0]) -> MEM dqY/dm: (8 means DM) */ + uint32_t dq_swap[SLICE_CNT]; + /* SoC dm -> MEM dqY/dm: (8 means DM) */ + uint8_t dm_swap[SLICE_CNT]; +}; + +struct _boardcnf { + /* ch in use */ + uint16_t phyvalid; + /* Read vref (SoC) training range : [15:8]stop / [7:0]start, 0x0000 = default val */ + uint16_t vref_r; + /* Write vref (MR14) training range : [15:8]stop / [7:0]start, 0x0000 = default val */ + uint16_t vref_w; + /* CA vref (MR12) training range : [15:8]stop / [7:0]start, 0x0000 = default val */ + uint16_t vref_ca; + + struct _boardcnf_ch ch[2]; +}; + +static const struct _boardcnf boardcnfs[BOARDNUM] = { +/* + * boardcnf[0] RENESAS S4 Spider (16Gbit 2rank) + */ +{ + 0x03, /* phyvalid */ + 0x0000, /* vref_r */ + 0x0000, /* vref_w */ + 0x0000, /* vref_ca */ + { +/* ch[0] */ { /* M0CAxB/M0DQ[23:16],M0DQ[31:24] */ +/* ddr_density[] */ { 0x04, 0x04 }, +/* ca_swap */ 0x243510U, +/* dqs_swap */ 0x10, +/* dq_swap[] */ { 0x21706345, 0x23510746 }, +/* dm_swap[] */ { 0x08, 0x08 } + }, +/* ch[1] */ { /* M0CAxA/M0DQ[15: 0] */ +/* ddr_density[] */ { 0x04, 0x04 }, +/* ca_swap */ 0x345210U, +/* dqs_swap */ 0x10, +/* dq_swap[] */ { 0x30124675, 0x53126047 }, +/* dm_swap[] */ { 0x08, 0x08 } + } + } +}, +/* + * boardcnf[1] RENESAS S4-N Spider (16Gbit 2rank) + */ +{ + 0x03, /* phyvalid */ + 0x0000, /* vref_r */ + 0x0000, /* vref_w */ + 0x0000, /* vref_ca */ + { +/* ch[0] */ { /* M0CAxB/M0DQ[23:16],M0DQ[31:24] */ +/* ddr_density[] */ { 0x04, 0x04 }, +/* ca_swap */ 0x243510U, +/* dqs_swap */ 0x10, +/* dq_swap[] */ { 0x21705634, 0x23516048 }, +/* dm_swap[] */ { 0x08, 0x07 } + }, +/* ch[1] */ { /* M0CAxA/M0DQ[15: 0] */ +/* ddr_density[] */ { 0x04, 0x04 }, +/* ca_swap */ 0x345201U, +/* dqs_swap */ 0x10, +/* dq_swap[] */ { 0x03124675, 0x35126047 }, +/* dm_swap[] */ { 0x08, 0x08 } + } + } +}, +/* + * boardcnf[2] RENESAS S4(2ch) + */ +{ + 0x03, /* phyvalid */ + 0x0000, /* vref_r */ + 0x0000, /* vref_w */ + 0x0000, /* vref_ca */ + { +/* ch[0] */ { +/* ddr_density[] */ { 0x04, 0x04 }, +/* ca_swap */ 0x00543210U, +/* dqs_swap */ 0x10, +/* dq_swap[] */ { 0x76543210, 0x76543210 }, +/* dm_swap[] */ { 0x08, 0x08 } + }, +/* ch[1] */ { +/* ddr_density[] */ { 0x04, 0x04 }, +/* ca_swap */ 0x00543210U, +/* dqs_swap */ 0x10, +/* dq_swap[] */ { 0x76543210, 0x76543210 }, +/* dm_swap[] */ { 0x08, 0x08 } + } + } +} +}; + +/******************************************************************************* + * EXTAL CLOCK DEFINITION + * PLEASE DEFINE HOW TO JUDGE BORAD CLK + ******************************************************************************/ +/* + * RENESAS SPIDER BOARD EXAMPLE + * judge by md14/md13 + * + * 16.00MHz CLK,DIV= 48,3 (md14,md13==0,0) + * 20.00MHz CLK,DIV= 60,3 (md14,md13==0,1) + * 40.00MHz CLK,DIV=120,3 (md14,md13==1,1) +*/ +void boardcnf_get_brd_clk(uint32_t brd, uint32_t *clk, uint32_t *div) { + uint32_t md; + + md = (mmio_read_32(RST_MODEMR0) >> 13) & 0x3; + switch(md) { + case 0x0 : *clk = 48; *div = 3; break; /* 48 / 3 = 16.00MHz */ + case 0x1 : *clk = 60; *div = 3; break; /* 60 / 3 = 20.00MHz */ +/* case 0x2 : *clk = 75; *div = 3; break; */ /* Not supported */ + case 0x3 : *clk =120; *div = 3; break; /* 120 / 3 = 40.00MHz */ + } + (void)brd; +} + +/******************************************************************************* + * DDR MBPS TARGET + * PLEASE DEFINE HOW TO JUDGE DDR BPS + ******************************************************************************/ +/* + DDRxxxx (judge by md17) : Mbps + SSCG enable / disable for PLL1 (judge by md37/md36) +*/ +void boardcnf_get_ddr_mbps(uint32_t brd, uint32_t *mbps, uint32_t *div) { + uint32_t md; + uint32_t sscg; + + md = (mmio_read_32(RST_MODEMR0) >> 17) & 0x01U; + sscg = (mmio_read_32(RST_MODEMR1) >> 4) & 0x03U; + + switch(sscg) { + case 0x0 : + switch(md) { + case 0x0 : *mbps = 3200; *div = 1; break; + case 0x1 : *mbps = 2120; *div = 1; break; + } + break; + case 0x1 : + switch(md) { + case 0x0 : *mbps = 3120; *div = 1; break; + case 0x1 : *mbps = 2120; *div = 1; break; + } + break; + case 0x2 : + switch(md) { + case 0x0 : *mbps = 3040; *div = 1; break; + case 0x1 : *mbps = 2120; *div = 1; break; + } + break; + case 0x3 : + switch(md) { + case 0x0 : *mbps = 3000; *div = 1; break; + case 0x1 : *mbps = 2120; *div = 1; break; + } + break; + } + (void)brd; +} + +#ifdef BOARD_JUDGE_AUTO +/******************************************************************************* + * SAMPLE board detect function + ******************************************************************************/ +static uint32_t _board_judge(void) { + uint32_t brd; + + brd = 0; /* spider (16Gbit 2rank)*/ + + return brd; +} +#endif diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h new file mode 100644 index 00000000..4595f3be --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_config.h @@ -0,0 +1,73 @@ +/******************************************************************************* +* File Name : boot_init_dram_config.h +* Version : 1.0 +* Description : This file containing structure definitions for board settings +******************************************************************************/ + +/***************************************************************************** +* History : Please refer the readme.txt +* +******************************************************************************/ + +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* © 2020-2023 Renesas Electronics Corporation All rights reserved. +*******************************************************************************/ + +#ifndef BOOT_INIT_DRAM_CONFIG +#define BOOT_INIT_DRAM_CONFIG + +#include +#include "boot_init_dram_regdef.h" +/******************************************************************************* + * DRAM Param setting + * this parameter is depending on the user + ******************************************************************************/ +#define JS2_DERATE 0 +#define BOARDNUM 5 +#define USE_BOARD 0 + +/******************************************************************************* + * BOARD CONFIGRATION + * PLEASE DEFINE boardcnfs[] + ******************************************************************************/ + +struct board_cfg_t +{ + uint32_t phyvalid; + uint32_t vref_r; + uint32_t vref_w; + uint32_t vref_ca; + + + uint32_t ddr_density[CH_CNT][CS_CNT]; + uint32_t ca_swap[CH_CNT]; + uint32_t dqs_swap[CH_CNT]; + uint32_t dq_swap[CH_CNT][SLICE_CNT]; + uint32_t dm_swap[CH_CNT][SLICE_CNT]; +}; + +void judge_board_clk_freq(uint32_t* board_clk, uint32_t* board_clkdiv, uint32_t* board_clkdiva); +void judge_ddr_ope_freq(uint32_t* ddr_mbps, uint32_t* ddr_mbpsdiv); +void judge_bus_clk_freq(uint32_t* bus_mbps, uint32_t* bus_mbpsdiv, const uint32_t* board_clk, const uint32_t* board_clkdiv); +extern const struct board_cfg_t board_cfg[BOARDNUM]; + +#endif /* BOOT_INIT_DRAM_CONFIG */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h new file mode 100644 index 00000000..705a895d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/boot_init_dram_regdef.h @@ -0,0 +1,260 @@ +/******************************************************************************* + * Copyright (c) 2021-2022 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +#if defined(__RH850G3K__) +#include "remap_register.h" +#endif + +#define RCAR_DDR_VERSION "rev.0.30rc7" +#define DRAM_CH_CNT 0x02 +#define SLICE_CNT 0x02 +#define CS_CNT 0x02 + +/* for pll setting */ +#define CLK_DIV(a, diva, b, divb) (((a) * (divb)) / ((b) * (diva))) +#define CLK_MUL(a, diva, b, divb) (((a) * (b)) / ((diva) * (divb))) + +/* for ddr density setting */ +#define DBMEMCONF_REG(d3, row, bank, col, dw) (((d3) << 30) | ((row) << 24) | ((bank) << 16) | ((col) << 8) | (dw)) +#define DBMEMCONF_REGD(density) (DBMEMCONF_REG((density) % 2, ((density) + 1) / 2 + (28 - 3 - 10 - 1), 3, 10, 1)) /* 16bit */ +#define DBMEMCONF_VAL(ch,cs) (DBMEMCONF_REGD(DBMEMCONF_DENS(ch, cs))) + +/* system registers : CPG */ +#define CPG_FRQCRD_KICK_BIT (1U << 31) + +#define CPG_PLL3CR_KICK_BIT (1U << 31) + +#define CPG_PLLECR_PLL3E_BIT (1U << 3) +#define CPG_PLLECR_PLL3ST_BIT (1U << 11) + +#if defined(__RH850G3K__) +#define CPG_BASE (BASE_CPG_ADDR) +#else +#define CPG_BASE (0xE6150000U) +#endif +#define CPG_CPGWPR (CPG_BASE + 0x0000U) +#define CPG_CPGWPCR (CPG_BASE + 0x0004U) +#define CPG_FRQCRA (CPG_BASE + 0x0800U) +#define CPG_FRQCRB (CPG_BASE + 0x0804U) +#define CPG_FRQCRC (CPG_BASE + 0x0808U) +#define CPG_FRQCRD (CPG_BASE + 0x080CU) +#define CPG_PLLECR (CPG_BASE + 0x0820U) +#define CPG_PLL3CR0 (CPG_BASE + 0x083CU) +#define CPG_PLL3CR1 (CPG_BASE + 0x08C0U) +#define CPG_Z0CKKSCR (CPG_BASE + 0x08A8U) +#define CPG_Z1CKKSCR (CPG_BASE + 0x08ACU) +#define CPG_SRST4 (CPG_BASE + 0x2C10U) +#define CPG_SRSTCLR4 (CPG_BASE + 0x2C90U) +#define CPG_FSRCHKRA4 (CPG_BASE + 0x0410U) +#define CPG_FSRCHKSETR4 (CPG_BASE + 0x0510U) +#define CPG_FSRCHKCLRR4 (CPG_BASE + 0x0590U) + +#if defined(__RH850G3K__) +#define RST_BASE (BASE_RESET_ADDR) +#else +#define RST_BASE (0xE6160000U) +#endif +#define RST_MODEMR0 (RST_BASE + 0x0000U) +#define RST_MODEMR1 (RST_BASE + 0x0004U) + +/* Product Register */ +#define PRR (0xFFF00044U) +#define PRR_PRODUCT_MASK (0x00007F00U) +#define PRR_CUT_MASK (0x000000FFU) + +#define PRR_PRODUCT_S4 (0x00005A00U) /* R-Car S4 */ + +#define PRR_PRODUCT_10 (0x00000000U) /* ver 1.0 */ +#define PRR_PRODUCT_11 (0x00000001U) /* ver 1.1 */ +#define PRR_PRODUCT_12 (0x00000002U) /* ver 1.2 */ + +/* DBSC registers */ +#if defined(__RH850G3K__) +#define DBSC_BASE (BASE_DBSC_ADDR) +#else +#define DBSC_BASE (0xE6790000U) +#endif +#define DBSC_DBSYSCONF0 (DBSC_BASE + 0x0000U) +#define DBSC_DBSYSCONF1 (DBSC_BASE + 0x0004U) +#define DBSC_DBSYSCONF1A (DBSC_BASE + 0x0008U) +#define DBSC_DBSYSCONF2 (DBSC_BASE + 0x000CU) +#define DBSC_DBPHYCONF0 (DBSC_BASE + 0x0010U) +#define DBSC_DBSYSCONF2A (DBSC_BASE + 0x0014U) +#define DBSC_DBKIND (DBSC_BASE + 0x0020U) +#define DBSC_DBKINDA (DBSC_BASE + 0x0024U) + +#define DBSC_DBMEMCONF(ch, cs) (DBSC_BASE + 0x0030U + 0x2000U * (ch & 0x04U) + 0x10U * (ch & 0x03U) + 0x04U * cs) +#define DBSC_DBMEMCONF_0_0 (DBSC_BASE + 0x0030U) +#define DBSC_DBMEMCONF_0_1 (DBSC_BASE + 0x0034U) +#define DBSC_DBMEMCONF_0_2 (DBSC_BASE + 0x0038U) +#define DBSC_DBMEMCONF_0_3 (DBSC_BASE + 0x003CU) +#define DBSC_DBMEMCONF_1_0 (DBSC_BASE + 0x0040U) +#define DBSC_DBMEMCONF_1_1 (DBSC_BASE + 0x0044U) +#define DBSC_DBMEMCONF_1_2 (DBSC_BASE + 0x0048U) +#define DBSC_DBMEMCONF_1_3 (DBSC_BASE + 0x004CU) +#define DBSC_DBMEMCONF_2_0 (DBSC_BASE + 0x0050U) +#define DBSC_DBMEMCONF_2_1 (DBSC_BASE + 0x0054U) +#define DBSC_DBMEMCONF_2_2 (DBSC_BASE + 0x0058U) +#define DBSC_DBMEMCONF_2_3 (DBSC_BASE + 0x005CU) +#define DBSC_DBMEMCONF_3_0 (DBSC_BASE + 0x0060U) +#define DBSC_DBMEMCONF_3_1 (DBSC_BASE + 0x0064U) +#define DBSC_DBMEMCONF_3_2 (DBSC_BASE + 0x0068U) +#define DBSC_DBMEMCONF_3_3 (DBSC_BASE + 0x006CU) + +#define DBSC_DBMEMCONFA(ch, cs) (DBSC_BASE + 0x0070U + 0x2000U * (ch & 0x04U) + 0x10U * (ch & 0x03U) + 0x04U * cs) +#define DBSC_DBMEMCONF_0_0A (DBSC_BASE + 0x0070U) +#define DBSC_DBMEMCONF_0_1A (DBSC_BASE + 0x0074U) +#define DBSC_DBMEMCONF_0_2A (DBSC_BASE + 0x0078U) +#define DBSC_DBMEMCONF_0_3A (DBSC_BASE + 0x007CU) +#define DBSC_DBMEMCONF_1_0A (DBSC_BASE + 0x0080U) +#define DBSC_DBMEMCONF_1_1A (DBSC_BASE + 0x0084U) +#define DBSC_DBMEMCONF_1_2A (DBSC_BASE + 0x0088U) +#define DBSC_DBMEMCONF_1_3A (DBSC_BASE + 0x008CU) +#define DBSC_DBMEMCONF_2_0A (DBSC_BASE + 0x0090U) +#define DBSC_DBMEMCONF_2_1A (DBSC_BASE + 0x0094U) +#define DBSC_DBMEMCONF_2_2A (DBSC_BASE + 0x0098U) +#define DBSC_DBMEMCONF_2_3A (DBSC_BASE + 0x009CU) +#define DBSC_DBMEMCONF_3_0A (DBSC_BASE + 0x00A0U) +#define DBSC_DBMEMCONF_3_1A (DBSC_BASE + 0x00A4U) +#define DBSC_DBMEMCONF_3_2A (DBSC_BASE + 0x00A8U) +#define DBSC_DBMEMCONF_3_3A (DBSC_BASE + 0x00ACU) + +#define DBSC_DBSYSCNT0 (DBSC_BASE + 0x0100U) +#define DBSC_DBSYSCNT0A (DBSC_BASE + 0x0108U) + +#define DBSC_DBACEN (DBSC_BASE + 0x0200U) +#define DBSC_DBRFEN (DBSC_BASE + 0x0204U) +#define DBSC_DBCMD (DBSC_BASE + 0x0208U) +#define DBSC_DBWAIT (DBSC_BASE + 0x0210U) + +#define DBSC_DBTR(x) (DBSC_BASE + 0x0300U + 0x04U * (x)) +#define DBSC_DBTR0 (DBSC_BASE + 0x0300U) +#define DBSC_DBTR1 (DBSC_BASE + 0x0304U) +#define DBSC_DBTR3 (DBSC_BASE + 0x030CU) +#define DBSC_DBTR4 (DBSC_BASE + 0x0310U) +#define DBSC_DBTR5 (DBSC_BASE + 0x0314U) +#define DBSC_DBTR6 (DBSC_BASE + 0x0318U) +#define DBSC_DBTR7 (DBSC_BASE + 0x031CU) +#define DBSC_DBTR8 (DBSC_BASE + 0x0320U) +#define DBSC_DBTR9 (DBSC_BASE + 0x0324U) +#define DBSC_DBTR10 (DBSC_BASE + 0x0328U) +#define DBSC_DBTR11 (DBSC_BASE + 0x032CU) +#define DBSC_DBTR12 (DBSC_BASE + 0x0330U) +#define DBSC_DBTR13 (DBSC_BASE + 0x0334U) +#define DBSC_DBTR14 (DBSC_BASE + 0x0338U) +#define DBSC_DBTR15 (DBSC_BASE + 0x033CU) +#define DBSC_DBTR16 (DBSC_BASE + 0x0340U) +#define DBSC_DBTR17 (DBSC_BASE + 0x0344U) +#define DBSC_DBTR18 (DBSC_BASE + 0x0348U) +#define DBSC_DBTR19 (DBSC_BASE + 0x034CU) +#define DBSC_DBTR20 (DBSC_BASE + 0x0350U) +#define DBSC_DBTR21 (DBSC_BASE + 0x0354U) +#define DBSC_DBTR22 (DBSC_BASE + 0x0358U) +#define DBSC_DBTR23 (DBSC_BASE + 0x035CU) +#define DBSC_DBTR24 (DBSC_BASE + 0x0360U) +#define DBSC_DBTR25 (DBSC_BASE + 0x0364U) +#define DBSC_DBTR26 (DBSC_BASE + 0x0368U) + +#define DBSC_DBBL (DBSC_BASE + 0x0400U) +#define DBSC_DBBLA (DBSC_BASE + 0x0404U) + +#define DBSC_DBRFCNF1 (DBSC_BASE + 0x0414U) +#define DBSC_DBRFCNF2 (DBSC_BASE + 0x0418U) + +#define DBSC_DBCALCNF (DBSC_BASE + 0x0424U) + +#define DBSC_DBRNK(x) (DBSC_BASE + 0x0430U + 0x04U * (x)) +#define DBSC_DBRNK2 (DBSC_BASE + 0x0438U) +#define DBSC_DBRNK3 (DBSC_BASE + 0x043CU) +#define DBSC_DBRNK4 (DBSC_BASE + 0x0440U) +#define DBSC_DBRNK5 (DBSC_BASE + 0x0444U) + +#define DBSC_DBDBICNT (DBSC_BASE + 0x0518U) +#define DBSC_DBDFIPMSTRCNF (DBSC_BASE + 0x0520U) +#define DBSC_DBDFICUPDCNF (DBSC_BASE + 0x052CU) + +#define DBSC_DBDFISTAT(ch) (DBSC_BASE + 0x0600U + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) +#define DBSC_DBDFISTAT_0 (DBSC_BASE + 0x0600U) +#define DBSC_DBDFISTAT_1 (DBSC_BASE + 0x0640U) +#define DBSC_DBDFISTAT_2 (DBSC_BASE + 0x0680U) +#define DBSC_DBDFISTAT_3 (DBSC_BASE + 0x06C0U) + +#define DBSC_DBDFICNT(ch) (DBSC_BASE + 0x0604U + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) +#define DBSC_DBDFICNT_0 (DBSC_BASE + 0x0604U) +#define DBSC_DBDFICNT_1 (DBSC_BASE + 0x0644U) +#define DBSC_DBDFICNT_2 (DBSC_BASE + 0x0684U) +#define DBSC_DBDFICNT_3 (DBSC_BASE + 0x06C4U) + +#define DBSC_DBPDCNT2(ch) (DBSC_BASE + 0x0618U + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) +#define DBSC_DBPDCNT2_0 (DBSC_BASE + 0x0618U) +#define DBSC_DBPDCNT2_1 (DBSC_BASE + 0x0658U) +#define DBSC_DBPDCNT2_2 (DBSC_BASE + 0x0698U) +#define DBSC_DBPDCNT2_3 (DBSC_BASE + 0x06D8U) + +#define DBSC_DBPDCNT3(ch) (DBSC_BASE + 0x061CU + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) +#define DBSC_DBPDCNT3_0 (DBSC_BASE + 0x061CU) +#define DBSC_DBPDCNT3_1 (DBSC_BASE + 0x065CU) +#define DBSC_DBPDCNT3_2 (DBSC_BASE + 0x069CU) +#define DBSC_DBPDCNT3_3 (DBSC_BASE + 0x06DCU) + +#define DBSC_DBPDLK(ch) (DBSC_BASE + 0x0620U + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) +#define DBSC_DBPDLK_0 (DBSC_BASE + 0x0620U) +#define DBSC_DBPDLK_1 (DBSC_BASE + 0x0660U) +#define DBSC_DBPDLK_2 (DBSC_BASE + 0x06a0U) +#define DBSC_DBPDLK_3 (DBSC_BASE + 0x06e0U) + +#define DBSC_DBPDRGA(ch) (DBSC_BASE + 0x0624U + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) +#define DBSC_DBPDRGA_0 (DBSC_BASE + 0x0624U) +#define DBSC_DBPDRGA_1 (DBSC_BASE + 0x0664U) +#define DBSC_DBPDRGA_2 (DBSC_BASE + 0x06A4U) +#define DBSC_DBPDRGA_3 (DBSC_BASE + 0x06E4U) + +#define DBSC_DBPDRGD(ch) (DBSC_BASE + 0x0628U + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) +#define DBSC_DBPDRGD_0 (DBSC_BASE + 0x0628U) +#define DBSC_DBPDRGD_1 (DBSC_BASE + 0x0668U) +#define DBSC_DBPDRGD_2 (DBSC_BASE + 0x06A8U) +#define DBSC_DBPDRGD_3 (DBSC_BASE + 0x06E8U) + +#define DBSC_DBPDSTAT(ch) (DBSC_BASE + 0x0630U + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) +#define DBSC_DBPDSTAT_0 (DBSC_BASE + 0x0630U) +#define DBSC_DBPDSTAT_1 (DBSC_BASE + 0x0670U) +#define DBSC_DBPDSTAT_2 (DBSC_BASE + 0x06B0U) +#define DBSC_DBPDSTAT_3 (DBSC_BASE + 0x06F0U) + +#define DBSC_DBPDSTAT1(ch) (DBSC_BASE + 0x0634U + 0x2000U * (ch & 0x04U) + 0x40U * (ch & 0x03U)) + +#define DBSC_DBBUS0CNF0 (DBSC_BASE + 0x0800U) +#define DBSC_DBBUS0CNF1 (DBSC_BASE + 0x0804U) + +#define DBSC_DBBCAMDIS (DBSC_BASE + 0x09FCU) + +#define DBSC_DBSCHRW1 (DBSC_BASE + 0x1024U) + +#define DBSC_SCFCTST0 (DBSC_BASE + 0x1700U) +#define DBSC_SCFCTST1 (DBSC_BASE + 0x1708U) + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h new file mode 100644 index 00000000..44b1c25d --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ddr_regdef.h @@ -0,0 +1,1320 @@ +/******************************************************************************* + * Copyright (c) 2021-2022 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +#define _reg_PHY_CLK_WR_BYPASS_SLAVE_DELAY 0x000b1000U +#define _reg_PHY_IO_PAD_DELAY_TIMING_BYPASS 0x10041000U +#define _reg_PHY_CLK_WRDQS_SLAVE_DELAY_BYPASS 0x000a1001U +#define _reg_PHY_WRITE_PATH_LAT_ADD_BYPASS 0x10031001U +#define _reg_PHY_RDDQS_GATE_BYPASS_SLAVE_DELAY 0x000a1002U +#define _reg_PHY_BYPASS_TWO_CYC_PREAMBLE 0x10021002U +#define _reg_PHY_CLK_BYPASS_OVERRIDE 0x18011002U +#define _reg_PHY_SW_WRDQ0_SHIFT 0x00061003U +#define _reg_PHY_SW_WRDQ1_SHIFT 0x08061003U +#define _reg_PHY_SW_WRDQ2_SHIFT 0x10061003U +#define _reg_PHY_SW_WRDQ3_SHIFT 0x18061003U +#define _reg_PHY_SW_WRDQ4_SHIFT 0x00061004U +#define _reg_PHY_SW_WRDQ5_SHIFT 0x08061004U +#define _reg_PHY_SW_WRDQ6_SHIFT 0x10061004U +#define _reg_PHY_SW_WRDQ7_SHIFT 0x18061004U +#define _reg_PHY_SW_WRDM_SHIFT 0x00061005U +#define _reg_PHY_SW_WRDQS_SHIFT 0x08041005U +#define _reg_PHY_PER_RANK_CS_MAP 0x10021005U +#define _reg_PHY_PER_CS_TRAINING_MULTICAST_EN 0x18011005U +#define _reg_PHY_PER_CS_TRAINING_INDEX 0x00011006U +#define _reg_PHY_LP4_BOOT_RDDATA_EN_IE_DLY 0x08021006U +#define _reg_PHY_LP4_BOOT_RDDATA_EN_DLY 0x10051006U +#define _reg_PHY_LP4_BOOT_RDDATA_EN_TSEL_DLY 0x18051006U +#define _reg_PHY_LP4_BOOT_RPTR_UPDATE 0x00041007U +#define _reg_PHY_LP4_BOOT_RDDQS_LATENCY_ADJUST 0x08041007U +#define _reg_PHY_LP4_BOOT_WRPATH_GATE_DISABLE 0x10021007U +#define _reg_PHY_LP4_BOOT_RDDATA_EN_OE_DLY 0x18051007U +#define _reg_PHY_CTRL_LPBK_EN 0x00021008U +#define _reg_PHY_LPBK_CONTROL 0x08091008U +#define _reg_PHY_LPBK_DFX_TIMEOUT_EN 0x18011008U +#define _reg_PHY_AUTO_TIMING_MARGIN_CONTROL 0x00201009U +#define _reg_PHY_AUTO_TIMING_MARGIN_OBS 0x001c100aU +#define _reg_PHY_PRBS_PATTERN_START 0x0007100bU +#define _reg_PHY_PRBS_PATTERN_MASK 0x0809100bU +#define _reg_PHY_RDLVL_MULTI_PATT_ENABLE 0x1801100bU +#define _reg_PHY_RDLVL_MULTI_PATT_RST_DISABLE 0x0001100cU +#define _reg_PHY_VREF_INITIAL_STEPSIZE 0x0806100cU +#define _reg_PHY_VREF_TRAIN_OBS 0x1007100cU +#define _reg_PHY_RDDQS_DQ_BYPASS_SLAVE_DELAY 0x000a100dU +#define _reg_PHY_GATE_ERROR_DELAY_SELECT 0x1004100dU +#define _reg_SC_PHY_SNAP_OBS_REGS 0x1801100dU +#define _reg_PHY_GATE_SMPL1_SLAVE_DELAY 0x0009100eU +#define _reg_PHY_LPDDR 0x1001100eU +#define _reg_PHY_MEM_CLASS 0x1803100eU +#define _reg_PHY_GATE_SMPL2_SLAVE_DELAY 0x0009100fU +#define _reg_ON_FLY_GATE_ADJUST_EN 0x1002100fU +#define _reg_PHY_GATE_TRACKING_OBS 0x00201010U +#define _reg_PHY_DFI40_POLARITY 0x00011011U +#define _reg_PHY_LP4_PST_AMBLE 0x08021011U +#define _reg_PHY_RDLVL_PATT8 0x00201012U +#define _reg_PHY_RDLVL_PATT9 0x00201013U +#define _reg_PHY_RDLVL_PATT10 0x00201014U +#define _reg_PHY_RDLVL_PATT11 0x00201015U +#define _reg_PHY_RDLVL_PATT12 0x00201016U +#define _reg_PHY_RDLVL_PATT13 0x00201017U +#define _reg_PHY_RDLVL_PATT14 0x00201018U +#define _reg_PHY_RDLVL_PATT15 0x00201019U +#define _reg_PHY_SLAVE_LOOP_CNT_UPDATE 0x0003101aU +#define _reg_PHY_SW_FIFO_PTR_RST_DISABLE 0x0801101aU +#define _reg_PHY_MASTER_DLY_LOCK_OBS_SELECT 0x1004101aU +#define _reg_PHY_RDDQ_ENC_OBS_SELECT 0x1803101aU +#define _reg_PHY_RDDQS_DQ_ENC_OBS_SELECT 0x0004101bU +#define _reg_PHY_WR_ENC_OBS_SELECT 0x0804101bU +#define _reg_PHY_WR_SHIFT_OBS_SELECT 0x1004101bU +#define _reg_PHY_FIFO_PTR_OBS_SELECT 0x1804101bU +#define _reg_PHY_LVL_DEBUG_MODE 0x0001101cU +#define _reg_SC_PHY_LVL_DEBUG_CONT 0x0801101cU +#define _reg_PHY_WRLVL_ALGO 0x1002101cU +#define _reg_PHY_WRLVL_PER_START 0x1808101cU +#define _reg_PHY_WRLVL_CAPTURE_CNT 0x0006101dU +#define _reg_PHY_WRLVL_UPDT_WAIT_CNT 0x0804101dU +#define _reg_PHY_DQ_MASK 0x1008101dU +#define _reg_PHY_GTLVL_PER_START 0x000a101eU +#define _reg_PHY_GTLVL_CAPTURE_CNT 0x1006101eU +#define _reg_PHY_GTLVL_UPDT_WAIT_CNT 0x1804101eU +#define _reg_PHY_RDLVL_CAPTURE_CNT 0x0006101fU +#define _reg_PHY_RDLVL_UPDT_WAIT_CNT 0x0804101fU +#define _reg_PHY_RDLVL_OP_MODE 0x1002101fU +#define _reg_PHY_RDLVL_RDDQS_DQ_OBS_SELECT 0x1805101fU +#define _reg_PHY_RDLVL_PERIODIC_OBS_SELECT 0x00081020U +#define _reg_PHY_RDLVL_DATA_MASK 0x08081020U +#define _reg_PHY_WDQLVL_CLK_JITTER_TOLERANCE 0x10081020U +#define _reg_PHY_WDQLVL_BURST_CNT 0x18061020U +#define _reg_PHY_WDQLVL_PATT 0x00031021U +#define _reg_PHY_WDQLVL_DQDM_SLV_DLY_JUMP_OFFSET 0x080b1021U +#define _reg_PHY_WDQLVL_UPDT_WAIT_CNT 0x18041021U +#define _reg_PHY_WDQLVL_DQDM_OBS_SELECT 0x00041022U +#define _reg_PHY_WDQLVL_PERIODIC_OBS_SELECT 0x08081022U +#define _reg_SC_PHY_WDQLVL_CLR_PREV_RESULTS 0x10011022U +#define _reg_PHY_WDQLVL_DATADM_MASK 0x00091023U +#define _reg_PHY_USER_PATT0 0x00201024U +#define _reg_PHY_USER_PATT1 0x00201025U +#define _reg_PHY_USER_PATT2 0x00201026U +#define _reg_PHY_USER_PATT3 0x00201027U +#define _reg_PHY_USER_PATT4 0x00101028U +#define _reg_PHY_NTP_MULT_TRAIN 0x10011028U +#define _reg_PHY_NTP_EARLY_THRESHOLD 0x000a1029U +#define _reg_PHY_NTP_PERIOD_THRESHOLD 0x100a1029U +#define _reg_PHY_NTP_PERIOD_THRESHOLD_MIN 0x000a102aU +#define _reg_PHY_NTP_PERIOD_THRESHOLD_MAX 0x100a102aU +#define _reg_PHY_CALVL_VREF_DRIVING_SLICE 0x0001102bU +#define _reg_SC_PHY_MANUAL_CLEAR 0x0806102bU +#define _reg_PHY_FIFO_PTR_OBS 0x1008102bU +#define _reg_PHY_LPBK_RESULT_OBS 0x0020102cU +#define _reg_PHY_LPBK_ERROR_COUNT_OBS 0x0010102dU +#define _reg_PHY_MASTER_DLY_LOCK_OBS 0x100b102dU +#define _reg_PHY_RDDQ_SLV_DLY_ENC_OBS 0x0007102eU +#define _reg_PHY_RDDQS_BASE_SLV_DLY_ENC_OBS 0x0807102eU +#define _reg_PHY_MEAS_DLY_STEP_VALUE 0x1008102eU +#define _reg_PHY_RDDQS_DQ_RISE_ADDER_SLV_DLY_ENC_OBS 0x1808102eU +#define _reg_PHY_RDDQS_DQ_FALL_ADDER_SLV_DLY_ENC_OBS 0x0008102fU +#define _reg_PHY_RDDQS_GATE_SLV_DLY_ENC_OBS 0x080b102fU +#define _reg_PHY_WRDQS_BASE_SLV_DLY_ENC_OBS 0x1807102fU +#define _reg_PHY_WRDQ_BASE_SLV_DLY_ENC_OBS 0x00081030U +#define _reg_PHY_WR_ADDER_SLV_DLY_ENC_OBS 0x08081030U +#define _reg_PHY_WR_SHIFT_OBS 0x10031030U +#define _reg_PHY_WRLVL_HARD0_DELAY_OBS 0x000a1031U +#define _reg_PHY_WRLVL_HARD1_DELAY_OBS 0x100a1031U +#define _reg_PHY_WRLVL_STATUS_OBS 0x00111032U +#define _reg_PHY_GATE_SMPL1_SLV_DLY_ENC_OBS 0x000a1033U +#define _reg_PHY_GATE_SMPL2_SLV_DLY_ENC_OBS 0x100a1033U +#define _reg_PHY_WRLVL_ERROR_OBS 0x00101034U +#define _reg_PHY_GTLVL_HARD0_DELAY_OBS 0x100e1034U +#define _reg_PHY_GTLVL_HARD1_DELAY_OBS 0x000e1035U +#define _reg_PHY_GTLVL_STATUS_OBS 0x00121036U +#define _reg_PHY_RDLVL_RDDQS_DQ_LE_DLY_OBS 0x000a1037U +#define _reg_PHY_RDLVL_RDDQS_DQ_TE_DLY_OBS 0x100a1037U +#define _reg_PHY_RDLVL_RDDQS_DQ_NUM_WINDOWS_OBS 0x00021038U +#define _reg_PHY_RDLVL_STATUS_OBS 0x00201039U +#define _reg_PHY_RDLVL_PERIODIC_OBS 0x0020103aU +#define _reg_PHY_WDQLVL_DQDM_LE_DLY_OBS 0x000b103bU +#define _reg_PHY_WDQLVL_DQDM_TE_DLY_OBS 0x100b103bU +#define _reg_PHY_WDQLVL_STATUS_OBS 0x0020103cU +#define _reg_PHY_WDQLVL_PERIODIC_OBS 0x0020103dU +#define _reg_PHY_DDL_MODE 0x001f103eU +#define _reg_PHY_DDL_MASK 0x0006103fU +#define _reg_PHY_DDL_TEST_OBS 0x00201040U +#define _reg_PHY_DDL_TEST_MSTR_DLY_OBS 0x00201041U +#define _reg_PHY_DDL_TRACK_UPD_THRESHOLD 0x00081042U +#define _reg_PHY_LP4_WDQS_OE_EXTEND 0x08011042U +#define _reg_SC_PHY_RX_CAL_START 0x10011042U +#define _reg_PHY_RX_CAL_OVERRIDE 0x18011042U +#define _reg_PHY_RX_CAL_SAMPLE_WAIT 0x00081043U +#define _reg_PHY_SLICE_RXCAL_SHUTOFF_FDBK_OE 0x08011043U +#define _reg_PHY_RX_CAL_DQ0 0x10091043U +#define _reg_PHY_RX_CAL_DQ1 0x00091044U +#define _reg_PHY_RX_CAL_DQ2 0x10091044U +#define _reg_PHY_RX_CAL_DQ3 0x00091045U +#define _reg_PHY_RX_CAL_DQ4 0x10091045U +#define _reg_PHY_RX_CAL_DQ5 0x00091046U +#define _reg_PHY_RX_CAL_DQ6 0x10091046U +#define _reg_PHY_RX_CAL_DQ7 0x00091047U +#define _reg_PHY_RX_CAL_DM 0x00121048U +#define _reg_PHY_RX_CAL_DQS 0x00091049U +#define _reg_PHY_RX_CAL_FDBK 0x10091049U +#define _reg_PHY_RX_CAL_OBS 0x000b104aU +#define _reg_PHY_RX_CAL_LOCK_OBS 0x1009104aU +#define _reg_PHY_RX_CAL_DISABLE 0x0001104bU +#define _reg_PHY_RX_CAL_SE_ADJUST 0x0807104bU +#define _reg_PHY_RX_CAL_DIFF_ADJUST 0x1007104bU +#define _reg_PHY_RX_CAL_COMP_VAL 0x1801104bU +#define _reg_PHY_RX_CAL_INDEX_MASK 0x000c104cU +#define _reg_PHY_PAD_RX_BIAS_EN 0x100b104cU +#define _reg_PHY_STATIC_TOG_DISABLE 0x0005104dU +#define _reg_PHY_DATA_DC_CAL_SAMPLE_WAIT 0x0808104dU +#define _reg_PHY_DATA_DC_CAL_TIMEOUT 0x1008104dU +#define _reg_PHY_DATA_DC_WEIGHT 0x1802104dU +#define _reg_PHY_DATA_DC_ADJUST_START 0x0006104eU +#define _reg_PHY_DATA_DC_ADJUST_SAMPLE_CNT 0x0808104eU +#define _reg_PHY_DATA_DC_ADJUST_THRSHLD 0x1008104eU +#define _reg_PHY_DATA_DC_ADJUST_DIRECT 0x1801104eU +#define _reg_PHY_DATA_DC_CAL_POLARITY 0x0001104fU +#define _reg_PHY_DATA_DC_CAL_START 0x0801104fU +#define _reg_PHY_DATA_DC_SW_RANK 0x1002104fU +#define _reg_PHY_FDBK_PWR_CTRL 0x1803104fU +#define _reg_PHY_SLV_DLY_CTRL_GATE_DISABLE 0x00011050U +#define _reg_PHY_RDPATH_GATE_DISABLE 0x08011050U +#define _reg_PHY_DCC_RXCAL_CTRL_GATE_DISABLE 0x10011050U +#define _reg_PHY_SLICE_PWR_RDC_DISABLE 0x18011050U +#define _reg_PHY_PARITY_ERROR_REGIF 0x000b1051U +#define _reg_PHY_DS_FSM_ERROR_INFO 0x100e1051U +#define _reg_PHY_DS_FSM_ERROR_INFO_MASK 0x000e1052U +#define _reg_SC_PHY_DS_FSM_ERROR_INFO_WOCLR 0x100e1052U +#define _reg_PHY_DS_TRAIN_CALIB_ERROR_INFO 0x00051053U +#define _reg_PHY_DS_TRAIN_CALIB_ERROR_INFO_MASK 0x08051053U +#define _reg_SC_PHY_DS_TRAIN_CALIB_ERROR_INFO_WOCLR 0x10051053U +#define _reg_PHY_DQ_TSEL_ENABLE 0x00031054U +#define _reg_PHY_DQ_TSEL_SELECT 0x08101054U +#define _reg_PHY_DQS_TSEL_ENABLE 0x18031054U +#define _reg_PHY_DQS_TSEL_SELECT 0x00101055U +#define _reg_PHY_TWO_CYC_PREAMBLE 0x10021055U +#define _reg_PHY_VREF_INITIAL_START_POINT 0x18071055U +#define _reg_PHY_VREF_INITIAL_STOP_POINT 0x00071056U +#define _reg_PHY_VREF_TRAINING_CTRL 0x08021056U +#define _reg_PHY_NTP_TRAIN_EN 0x10011056U +#define _reg_PHY_NTP_WDQ_STEP_SIZE 0x18081056U +#define _reg_PHY_NTP_WDQ_START 0x000b1057U +#define _reg_PHY_NTP_WDQ_STOP 0x100b1057U +#define _reg_PHY_NTP_WDQ_BIT_EN 0x00081058U +#define _reg_PHY_WDQLVL_DVW_MIN 0x080a1058U +#define _reg_PHY_SW_WDQLVL_DVW_MIN_EN 0x18011058U +#define _reg_PHY_WDQLVL_PER_START_OFFSET 0x00061059U +#define _reg_PHY_FAST_LVL_EN 0x08041059U +#define _reg_PHY_PAD_TX_DCD 0x10051059U +#define _reg_PHY_PAD_RX_DCD_0 0x18051059U +#define _reg_PHY_PAD_RX_DCD_1 0x0005105aU +#define _reg_PHY_PAD_RX_DCD_2 0x0805105aU +#define _reg_PHY_PAD_RX_DCD_3 0x1005105aU +#define _reg_PHY_PAD_RX_DCD_4 0x1805105aU +#define _reg_PHY_PAD_RX_DCD_5 0x0005105bU +#define _reg_PHY_PAD_RX_DCD_6 0x0805105bU +#define _reg_PHY_PAD_RX_DCD_7 0x1005105bU +#define _reg_PHY_PAD_DM_RX_DCD 0x1805105bU +#define _reg_PHY_PAD_DQS_RX_DCD 0x0005105cU +#define _reg_PHY_PAD_FDBK_RX_DCD 0x0805105cU +#define _reg_PHY_PAD_DSLICE_IO_CFG 0x1006105cU +#define _reg_PHY_RDDQ0_SLAVE_DELAY 0x000a105dU +#define _reg_PHY_RDDQ1_SLAVE_DELAY 0x100a105dU +#define _reg_PHY_RDDQ2_SLAVE_DELAY 0x000a105eU +#define _reg_PHY_RDDQ3_SLAVE_DELAY 0x100a105eU +#define _reg_PHY_RDDQ4_SLAVE_DELAY 0x000a105fU +#define _reg_PHY_RDDQ5_SLAVE_DELAY 0x100a105fU +#define _reg_PHY_RDDQ6_SLAVE_DELAY 0x000a1060U +#define _reg_PHY_RDDQ7_SLAVE_DELAY 0x100a1060U +#define _reg_PHY_RDDM_SLAVE_DELAY 0x000a1061U +#define _reg_PHY_DATA_DC_CAL_CLK_SEL 0x10031061U +#define _reg_PHY_DQ_OE_TIMING 0x00081062U +#define _reg_PHY_DQ_TSEL_RD_TIMING 0x08081062U +#define _reg_PHY_DQ_TSEL_WR_TIMING 0x10081062U +#define _reg_PHY_DQS_OE_TIMING 0x18081062U +#define _reg_PHY_IO_PAD_DELAY_TIMING 0x00041063U +#define _reg_PHY_DQS_TSEL_RD_TIMING 0x08081063U +#define _reg_PHY_DQS_OE_RD_TIMING 0x10081063U +#define _reg_PHY_DQS_TSEL_WR_TIMING 0x18081063U +#define _reg_PHY_VREF_SETTING_TIME 0x00101064U +#define _reg_PHY_PAD_VREF_CTRL_DQ 0x100c1064U +#define _reg_PHY_PER_CS_TRAINING_EN 0x00011065U +#define _reg_PHY_DQ_IE_TIMING 0x08081065U +#define _reg_PHY_DQS_IE_TIMING 0x10081065U +#define _reg_PHY_RDDATA_EN_IE_DLY 0x18021065U +#define _reg_PHY_IE_MODE 0x00021066U +#define _reg_PHY_DBI_MODE 0x08011066U +#define _reg_PHY_RDDATA_EN_TSEL_DLY 0x10051066U +#define _reg_PHY_RDDATA_EN_OE_DLY 0x18051066U +#define _reg_PHY_SW_MASTER_MODE 0x00041067U +#define _reg_PHY_MASTER_DELAY_START 0x080b1067U +#define _reg_PHY_MASTER_DELAY_STEP 0x18061067U +#define _reg_PHY_MASTER_DELAY_WAIT 0x00081068U +#define _reg_PHY_MASTER_DELAY_HALF_MEASURE 0x08081068U +#define _reg_PHY_RPTR_UPDATE 0x10041068U +#define _reg_PHY_WRLVL_DLY_STEP 0x18081068U +#define _reg_PHY_WRLVL_DLY_FINE_STEP 0x00041069U +#define _reg_PHY_WRLVL_RESP_WAIT_CNT 0x08061069U +#define _reg_PHY_GTLVL_DLY_STEP 0x10041069U +#define _reg_PHY_GTLVL_RESP_WAIT_CNT 0x18051069U +#define _reg_PHY_GTLVL_BACK_STEP 0x000a106aU +#define _reg_PHY_GTLVL_FINAL_STEP 0x100a106aU +#define _reg_PHY_WDQLVL_DLY_STEP 0x0008106bU +#define _reg_PHY_WDQLVL_QTR_DLY_STEP 0x0804106bU +#define _reg_PHY_TOGGLE_PRE_SUPPORT 0x1001106bU +#define _reg_PHY_RDLVL_DLY_STEP 0x1804106bU +#define _reg_PHY_RDLVL_MAX_EDGE 0x000a106cU +#define _reg_PHY_RDLVL_DVW_MIN 0x000a106dU +#define _reg_PHY_SW_RDLVL_DVW_MIN_EN 0x1001106dU +#define _reg_PHY_RDLVL_PER_START_OFFSET 0x1806106dU +#define _reg_PHY_WRPATH_GATE_DISABLE 0x0002106eU +#define _reg_PHY_WRPATH_GATE_TIMING 0x0803106eU +#define _reg_PHY_DATA_DC_INIT_DISABLE 0x1002106eU +#define _reg_PHY_DATA_DC_DQS_INIT_SLV_DELAY 0x000a106fU +#define _reg_PHY_DATA_DC_DQ_INIT_SLV_DELAY 0x100b106fU +#define _reg_PHY_DATA_DC_WRLVL_ENABLE 0x00011070U +#define _reg_PHY_DATA_DC_WDQLVL_ENABLE 0x08011070U +#define _reg_PHY_DATA_DC_DM_CLK_SE_THRSHLD 0x10081070U +#define _reg_PHY_DATA_DC_DM_CLK_DIFF_THRSHLD 0x18081070U +#define _reg_PHY_WDQ_OSC_DELTA 0x00071071U +#define _reg_PHY_MEAS_DLY_STEP_ENABLE 0x08061071U +#define _reg_PHY_RDDATA_EN_DLY 0x10051071U +#define _reg_PHY_DQ_DM_SWIZZLE0 0x00201072U +#define _reg_PHY_DQ_DM_SWIZZLE1 0x00041073U +#define _reg_PHY_CLK_WRDQ0_SLAVE_DELAY 0x000b1074U +#define _reg_PHY_CLK_WRDQ1_SLAVE_DELAY 0x100b1074U +#define _reg_PHY_CLK_WRDQ2_SLAVE_DELAY 0x000b1075U +#define _reg_PHY_CLK_WRDQ3_SLAVE_DELAY 0x100b1075U +#define _reg_PHY_CLK_WRDQ4_SLAVE_DELAY 0x000b1076U +#define _reg_PHY_CLK_WRDQ5_SLAVE_DELAY 0x100b1076U +#define _reg_PHY_CLK_WRDQ6_SLAVE_DELAY 0x000b1077U +#define _reg_PHY_CLK_WRDQ7_SLAVE_DELAY 0x100b1077U +#define _reg_PHY_CLK_WRDM_SLAVE_DELAY 0x000b1078U +#define _reg_PHY_CLK_WRDQS_SLAVE_DELAY 0x100a1078U +#define _reg_PHY_WRLVL_THRESHOLD_ADJUST 0x00021079U +#define _reg_PHY_RDDQS_DQ0_RISE_SLAVE_DELAY 0x080a1079U +#define _reg_PHY_RDDQS_DQ0_FALL_SLAVE_DELAY 0x000a107aU +#define _reg_PHY_RDDQS_DQ1_RISE_SLAVE_DELAY 0x100a107aU +#define _reg_PHY_RDDQS_DQ1_FALL_SLAVE_DELAY 0x000a107bU +#define _reg_PHY_RDDQS_DQ2_RISE_SLAVE_DELAY 0x100a107bU +#define _reg_PHY_RDDQS_DQ2_FALL_SLAVE_DELAY 0x000a107cU +#define _reg_PHY_RDDQS_DQ3_RISE_SLAVE_DELAY 0x100a107cU +#define _reg_PHY_RDDQS_DQ3_FALL_SLAVE_DELAY 0x000a107dU +#define _reg_PHY_RDDQS_DQ4_RISE_SLAVE_DELAY 0x100a107dU +#define _reg_PHY_RDDQS_DQ4_FALL_SLAVE_DELAY 0x000a107eU +#define _reg_PHY_RDDQS_DQ5_RISE_SLAVE_DELAY 0x100a107eU +#define _reg_PHY_RDDQS_DQ5_FALL_SLAVE_DELAY 0x000a107fU +#define _reg_PHY_RDDQS_DQ6_RISE_SLAVE_DELAY 0x100a107fU +#define _reg_PHY_RDDQS_DQ6_FALL_SLAVE_DELAY 0x000a1080U +#define _reg_PHY_RDDQS_DQ7_RISE_SLAVE_DELAY 0x100a1080U +#define _reg_PHY_RDDQS_DQ7_FALL_SLAVE_DELAY 0x000a1081U +#define _reg_PHY_RDDQS_DM_RISE_SLAVE_DELAY 0x100a1081U +#define _reg_PHY_RDDQS_DM_FALL_SLAVE_DELAY 0x000a1082U +#define _reg_PHY_RDDQS_GATE_SLAVE_DELAY 0x100a1082U +#define _reg_PHY_RDDQS_LATENCY_ADJUST 0x00041083U +#define _reg_PHY_WRITE_PATH_LAT_ADD 0x08031083U +#define _reg_PHY_WRLVL_DELAY_EARLY_THRESHOLD 0x100a1083U +#define _reg_PHY_WRLVL_DELAY_PERIOD_THRESHOLD 0x000a1084U +#define _reg_PHY_WRLVL_EARLY_FORCE_ZERO 0x10011084U +#define _reg_PHY_GTLVL_RDDQS_SLV_DLY_START 0x000a1085U +#define _reg_PHY_GTLVL_LAT_ADJ_START 0x10041085U +#define _reg_PHY_WDQLVL_DQDM_SLV_DLY_START 0x000b1086U +#define _reg_PHY_NTP_WRLAT_START 0x10041086U +#define _reg_PHY_NTP_PASS 0x18011086U +#define _reg_PHY_RDLVL_RDDQS_DQ_SLV_DLY_START 0x000a1087U +#define _reg_PHY_DATA_DC_DQS_CLK_ADJUST 0x00081088U +#define _reg_PHY_DATA_DC_DQ0_CLK_ADJUST 0x08081088U +#define _reg_PHY_DATA_DC_DQ1_CLK_ADJUST 0x10081088U +#define _reg_PHY_DATA_DC_DQ2_CLK_ADJUST 0x18081088U +#define _reg_PHY_DATA_DC_DQ3_CLK_ADJUST 0x00081089U +#define _reg_PHY_DATA_DC_DQ4_CLK_ADJUST 0x08081089U +#define _reg_PHY_DATA_DC_DQ5_CLK_ADJUST 0x10081089U +#define _reg_PHY_DATA_DC_DQ6_CLK_ADJUST 0x18081089U +#define _reg_PHY_DATA_DC_DQ7_CLK_ADJUST 0x0008108aU +#define _reg_PHY_DATA_DC_DM_CLK_ADJUST 0x0808108aU +#define _reg_PHY_DSLICE_PAD_BOOSTPN_SETTING 0x1010108aU +#define _reg_PHY_DSLICE_PAD_RX_CTLE_SETTING 0x0006108bU +#define _reg_PHY_DQ_FFE 0x0802108bU +#define _reg_PHY_DQS_FFE 0x1002108bU +#define _reg_PHY_ADR_CLK_WR_BYPASS_SLAVE_DELAY_0 0x000b1200U +#define _reg_PHY_ADR_CLK_BYPASS_OVERRIDE_0 0x10011200U +#define _reg_SC_PHY_ADR_MANUAL_CLEAR_0 0x18031200U +#define _reg_PHY_ADR_LPBK_RESULT_OBS_0 0x00201201U +#define _reg_PHY_ADR_LPBK_ERROR_COUNT_OBS_0 0x00101202U +#define _reg_PHY_ADR_MEAS_DLY_STEP_VALUE_0 0x10081202U +#define _reg_PHY_ADR_MASTER_DLY_LOCK_OBS_SELECT_0 0x18041202U +#define _reg_PHY_ADR_MASTER_DLY_LOCK_OBS_0 0x000b1203U +#define _reg_PHY_ADR_BASE_SLV_DLY_ENC_OBS_0 0x10071203U +#define _reg_PHY_ADR_ADDER_SLV_DLY_ENC_OBS_0 0x18081203U +#define _reg_PHY_ADR_SLAVE_LOOP_CNT_UPDATE_0 0x00031204U +#define _reg_PHY_ADR_SLV_DLY_ENC_OBS_SELECT_0 0x08031204U +#define _reg_SC_PHY_ADR_SNAP_OBS_REGS_0 0x10011204U +#define _reg_PHY_ADR_TSEL_ENABLE_0 0x18011204U +#define _reg_PHY_ADR_LPBK_CONTROL_0 0x00071205U +#define _reg_PHY_ADR_PRBS_PATTERN_START_0 0x08071205U +#define _reg_PHY_ADR_PRBS_PATTERN_MASK_0 0x10051205U +#define _reg_PHY_ADR_PWR_RDC_DISABLE_0 0x18011205U +#define _reg_PHY_ADR_SLV_DLY_CTRL_GATE_DISABLE_0 0x00011206U +#define _reg_PHY_ADR_TYPE_0 0x08021206U +#define _reg_PHY_ADR_WRADDR_SHIFT_OBS_0 0x10031206U +#define _reg_PHY_ADR_IE_MODE_0 0x18011206U +#define _reg_PHY_ADR_DDL_MODE_0 0x001b1207U +#define _reg_PHY_ADR_DDL_MASK_0 0x00061208U +#define _reg_PHY_ADR_DDL_TEST_OBS_0 0x00201209U +#define _reg_PHY_ADR_DDL_TEST_MSTR_DLY_OBS_0 0x0020120aU +#define _reg_PHY_ADR_CALVL_START_0 0x000b120bU +#define _reg_PHY_ADR_CALVL_COARSE_DLY_0 0x100b120bU +#define _reg_PHY_ADR_CALVL_QTR_0 0x000b120cU +#define _reg_PHY_ADR_CALVL_SWIZZLE0_0 0x0018120dU +#define _reg_PHY_ADR_CALVL_SWIZZLE1_0 0x0018120eU +#define _reg_PHY_ADR_CALVL_RANK_CTRL_0 0x1802120eU +#define _reg_PHY_ADR_CALVL_NUM_PATTERNS_0 0x0002120fU +#define _reg_PHY_ADR_CALVL_RESP_WAIT_CNT_0 0x0804120fU +#define _reg_PHY_ADR_CALVL_PERIODIC_START_OFFSET_0 0x1009120fU +#define _reg_PHY_ADR_CALVL_DEBUG_MODE_0 0x00011210U +#define _reg_SC_PHY_ADR_CALVL_DEBUG_CONT_0 0x08011210U +#define _reg_SC_PHY_ADR_CALVL_ERROR_CLR_0 0x10011210U +#define _reg_PHY_ADR_CALVL_OBS_SELECT_0 0x18031210U +#define _reg_PHY_ADR_CALVL_CH0_OBS0_0 0x00201211U +#define _reg_PHY_ADR_CALVL_CH1_OBS0_0 0x00201212U +#define _reg_PHY_ADR_CALVL_CH2_OBS0_0 0x00201213U +#define _reg_PHY_ADR_CALVL_CH3_OBS0_0 0x00201214U +#define _reg_PHY_ADR_CALVL_OBS1_0 0x00201215U +#define _reg_PHY_ADR_CALVL_OBS2_0 0x00201216U +#define _reg_PHY_ADR_CALVL_FG_0_0 0x00141217U +#define _reg_PHY_ADR_CALVL_BG_0_0 0x00141218U +#define _reg_PHY_ADR_CALVL_FG_1_0 0x00141219U +#define _reg_PHY_ADR_CALVL_BG_1_0 0x0014121aU +#define _reg_PHY_ADR_CALVL_FG_2_0 0x0014121bU +#define _reg_PHY_ADR_CALVL_BG_2_0 0x0014121cU +#define _reg_PHY_ADR_CALVL_FG_3_0 0x0014121dU +#define _reg_PHY_ADR_CALVL_BG_3_0 0x0014121eU +#define _reg_PHY_ADR_ADDR_SEL_0 0x0018121fU +#define _reg_PHY_ADR_LP4_BOOT_SLV_DELAY_0 0x000a1220U +#define _reg_PHY_ADR_BIT_MASK_0 0x10061220U +#define _reg_PHY_ADR_SEG_MASK_0 0x18061220U +#define _reg_PHY_ADR_CALVL_TRAIN_MASK_0 0x00061221U +#define _reg_PHY_ADR_CSLVL_TRAIN_MASK_0 0x08061221U +#define _reg_PHY_ADR_STATIC_TOG_DISABLE_0 0x10041221U +#define _reg_PHY_ADR_SW_TXIO_CTRL_0 0x18061221U +#define _reg_PHY_ADR_DC_INIT_DISABLE_0 0x00021222U +#define _reg_PHY_ADR_DC_ADR0_CLK_ADJUST_0 0x08081222U +#define _reg_PHY_ADR_DC_ADR1_CLK_ADJUST_0 0x10081222U +#define _reg_PHY_ADR_DC_ADR2_CLK_ADJUST_0 0x18081222U +#define _reg_PHY_ADR_DC_ADR3_CLK_ADJUST_0 0x00081223U +#define _reg_PHY_ADR_DC_ADR4_CLK_ADJUST_0 0x08081223U +#define _reg_PHY_ADR_DC_ADR5_CLK_ADJUST_0 0x10081223U +#define _reg_PHY_ADR_DCC_RXCAL_CTRL_GATE_DISABLE_0 0x18011223U +#define _reg_PHY_ADR_DC_CAL_SAMPLE_WAIT_0 0x00081224U +#define _reg_PHY_ADR_DC_CAL_TIMEOUT_0 0x08081224U +#define _reg_PHY_ADR_DC_WEIGHT_0 0x10021224U +#define _reg_PHY_ADR_DC_ADJUST_START_0 0x18061224U +#define _reg_PHY_ADR_DC_ADJUST_SAMPLE_CNT_0 0x00081225U +#define _reg_PHY_ADR_DC_ADJUST_THRSHLD_0 0x08081225U +#define _reg_PHY_ADR_DC_ADJUST_DIRECT_0 0x10011225U +#define _reg_PHY_ADR_DC_CAL_POLARITY_0 0x18011225U +#define _reg_PHY_ADR_DC_CAL_START_0 0x00011226U +#define _reg_PHY_ADR_SW_TXPWR_CTRL_0 0x08061226U +#define _reg_PHY_PARITY_ERROR_REGIF_ADR_0 0x100b1226U +#define _reg_PHY_AS_FSM_ERROR_INFO_0 0x00091227U +#define _reg_PHY_AS_FSM_ERROR_INFO_MASK_0 0x10091227U +#define _reg_SC_PHY_AS_FSM_ERROR_INFO_WOCLR_0 0x00091228U +#define _reg_PHY_AS_TRAIN_CALIB_ERROR_INFO_0 0x10011228U +#define _reg_PHY_AS_TRAIN_CALIB_ERROR_INFO_MASK_0 0x18011228U +#define _reg_SC_PHY_AS_TRAIN_CALIB_ERROR_INFO_WOCLR_0 0x00011229U +#define _reg_PHY_ADR_TSEL_SELECT_0 0x0008122aU +#define _reg_PHY_ADR_DC_CAL_CLK_SEL_0 0x0803122aU +#define _reg_PHY_PAD_ADR_IO_CFG_0 0x100b122aU +#define _reg_PHY_ADR0_SW_WRADDR_SHIFT_0 0x0005122bU +#define _reg_PHY_ADR0_CLK_WR_SLAVE_DELAY_0 0x080b122bU +#define _reg_PHY_ADR1_SW_WRADDR_SHIFT_0 0x1805122bU +#define _reg_PHY_ADR1_CLK_WR_SLAVE_DELAY_0 0x000b122cU +#define _reg_PHY_ADR2_SW_WRADDR_SHIFT_0 0x1005122cU +#define _reg_PHY_ADR2_CLK_WR_SLAVE_DELAY_0 0x000b122dU +#define _reg_PHY_ADR3_SW_WRADDR_SHIFT_0 0x1005122dU +#define _reg_PHY_ADR3_CLK_WR_SLAVE_DELAY_0 0x000b122eU +#define _reg_PHY_ADR4_SW_WRADDR_SHIFT_0 0x1005122eU +#define _reg_PHY_ADR4_CLK_WR_SLAVE_DELAY_0 0x000b122fU +#define _reg_PHY_ADR5_SW_WRADDR_SHIFT_0 0x1005122fU +#define _reg_PHY_ADR5_CLK_WR_SLAVE_DELAY_0 0x000b1230U +#define _reg_PHY_ADR_SW_MASTER_MODE_0 0x10041230U +#define _reg_PHY_ADR_MASTER_DELAY_START_0 0x000b1231U +#define _reg_PHY_ADR_MASTER_DELAY_STEP_0 0x10061231U +#define _reg_PHY_ADR_MASTER_DELAY_WAIT_0 0x18081231U +#define _reg_PHY_ADR_MASTER_DELAY_HALF_MEASURE_0 0x00081232U +#define _reg_PHY_ADR_SW_CALVL_DVW_MIN_0 0x080a1232U +#define _reg_PHY_ADR_SW_CALVL_DVW_MIN_EN_0 0x18011232U +#define _reg_PHY_ADR_CALVL_DLY_STEP_0 0x00041233U +#define _reg_PHY_ADR_CALVL_CAPTURE_CNT_0 0x00041234U +#define _reg_PHY_ADR_MEAS_DLY_STEP_ENABLE_0 0x08011234U +#define _reg_PHY_ADR_DC_INIT_SLV_DELAY_0 0x100a1234U +#define _reg_PHY_ADR_DC_CALVL_ENABLE_0 0x00011235U +#define _reg_PHY_ADR_DC_DM_CLK_THRSHLD_0 0x08081235U +#define _reg_PHY_FREQ_SEL 0x00031300U +#define _reg_PHY_FREQ_SEL_FROM_REGIF 0x00011301U +#define _reg_PHY_FREQ_SEL_MULTICAST_EN 0x08011301U +#define _reg_PHY_FREQ_SEL_INDEX 0x10021301U +#define _reg_PHY_SW_GRP0_SHIFT_0 0x18051301U +#define _reg_PHY_SW_GRP1_SHIFT_0 0x00051302U +#define _reg_PHY_SW_GRP2_SHIFT_0 0x08051302U +#define _reg_PHY_SW_GRP3_SHIFT_0 0x10051302U +#define _reg_PHY_SW_GRP0_SHIFT_1 0x18051302U +#define _reg_PHY_SW_GRP1_SHIFT_1 0x00051303U +#define _reg_PHY_SW_GRP2_SHIFT_1 0x08051303U +#define _reg_PHY_SW_GRP3_SHIFT_1 0x10051303U +#define _reg_PHY_GRP_BYPASS_SLAVE_DELAY 0x000b1304U +#define _reg_PHY_SW_GRP_BYPASS_SHIFT 0x10051304U +#define _reg_PHY_GRP_BYPASS_OVERRIDE 0x18011304U +#define _reg_SC_PHY_MANUAL_UPDATE 0x00011305U +#define _reg_PHY_MANUAL_UPDATE_PHYUPD_ENABLE 0x08011305U +#define _reg_PHY_CSLVL_START 0x100b1305U +#define _reg_PHY_CSLVL_COARSE_DLY 0x000b1306U +#define _reg_PHY_CSLVL_DEBUG_MODE 0x10011306U +#define _reg_SC_PHY_CSLVL_DEBUG_CONT 0x18011306U +#define _reg_SC_PHY_CSLVL_ERROR_CLR 0x00011307U +#define _reg_PHY_CSLVL_OBS0 0x00201308U +#define _reg_PHY_CSLVL_OBS1 0x00201309U +#define _reg_PHY_CSLVL_OBS2 0x0020130aU +#define _reg_PHY_CSLVL_ENABLE 0x0001130bU +#define _reg_PHY_CSLVL_PERIODIC_START_OFFSET 0x0809130bU +#define _reg_PHY_LP4_BOOT_DISABLE 0x1801130bU +#define _reg_PHY_CSLVL_CS_MAP 0x0002130cU +#define _reg_PHY_CSLVL_QTR 0x080b130cU +#define _reg_PHY_CSLVL_COARSE_CHK 0x000b130dU +#define _reg_PHY_CSLVL_COARSE_CAPTURE_CNT 0x1004130dU +#define _reg_PHY_ADRCTL_SLAVE_LOOP_CNT_UPDATE 0x1803130dU +#define _reg_PHY_ADRCTL_SNAP_OBS_REGS 0x0001130eU +#define _reg_PHY_DFI_PHYUPD_TYPE 0x0802130eU +#define _reg_PHY_ADRCTL_LPDDR 0x1001130eU +#define _reg_PHY_LP4_ACTIVE 0x1801130eU +#define _reg_PHY_LPDDR3_CS 0x0001130fU +#define _reg_PHY_CLK_DC_CAL_SAMPLE_WAIT 0x0808130fU +#define _reg_PHY_CLK_DC_CAL_TIMEOUT 0x1008130fU +#define _reg_PHY_CLK_DC_WEIGHT 0x1802130fU +#define _reg_PHY_CLK_DC_FREQ_CHG_ADJ 0x00011310U +#define _reg_PHY_CLK_DC_ADJUST_START 0x08061310U +#define _reg_PHY_CLK_DC_ADJUST_SAMPLE_CNT 0x10081310U +#define _reg_PHY_CLK_DC_ADJUST_THRSHLD 0x18081310U +#define _reg_PHY_CLK_DC_ADJUST_DIRECT 0x00011311U +#define _reg_PHY_CLK_DC_CAL_POLARITY 0x08011311U +#define _reg_PHY_CLK_DC_CAL_START 0x10011311U +#define _reg_SC_PHY_UPDATE_CLK_CAL_VALUES 0x18011311U +#define _reg_PHY_CONTINUOUS_CLK_CAL_UPDATE 0x00011312U +#define _reg_PHY_SW_TXIO_CTRL_0 0x08041312U +#define _reg_PHY_SW_TXIO_CTRL_1 0x10041312U +#define _reg_PHY_MEMCLK_SW_TXIO_CTRL 0x18011312U +#define _reg_PHY_ADRCTL_SW_TXPWR_CTRL_0 0x00041313U +#define _reg_PHY_ADRCTL_SW_TXPWR_CTRL_1 0x08041313U +#define _reg_PHY_MEMCLK_SW_TXPWR_CTRL 0x10011313U +#define _reg_PHY_USER_DEF_REG_AC_0 0x00201314U +#define _reg_PHY_USER_DEF_REG_AC_1 0x00201315U +#define _reg_PHY_USER_DEF_REG_AC_2 0x00201316U +#define _reg_PHY_USER_DEF_REG_AC_3 0x00201317U +#define _reg_PHY_TOP_STATIC_TOG_DISABLE 0x00011318U +#define _reg_PHY_BYTE_DISABLE_STATIC_TOG_DISABLE 0x08011318U +#define _reg_PHY_STATIC_TOG_CONTROL 0x10101318U +#define _reg_PHY_ADRCTL_STATIC_TOG_DISABLE 0x00041319U +#define _reg_PHY_MEMCLK_STATIC_TOG_DISABLE 0x08011319U +#define _reg_PHY_LP4_BOOT_PLL_BYPASS 0x10011319U +#define _reg_PHY_CLK_SWITCH_OBS 0x0020131aU +#define _reg_PHY_PLL_WAIT 0x0010131bU +#define _reg_PHY_SW_PLL_BYPASS 0x0001131cU +#define _reg_PHY_SET_DFI_INPUT_RST_PAD 0x0001131dU +#define _reg_PHY_CS_ACS_ALLOCATION_BIT0_0 0x0802131dU +#define _reg_PHY_CS_ACS_ALLOCATION_BIT1_0 0x1002131dU +#define _reg_PHY_CS_ACS_ALLOCATION_BIT2_0 0x1802131dU +#define _reg_PHY_CS_ACS_ALLOCATION_BIT3_0 0x0002131eU +#define _reg_PHY_CS_ACS_ALLOCATION_BIT0_1 0x0802131eU +#define _reg_PHY_CS_ACS_ALLOCATION_BIT1_1 0x1002131eU +#define _reg_PHY_CS_ACS_ALLOCATION_BIT2_1 0x1802131eU +#define _reg_PHY_CS_ACS_ALLOCATION_BIT3_1 0x0002131fU +#define _reg_PHY_CLK_DC_ADJUST_0 0x0808131fU +#define _reg_PHY_CLK_DC_INIT_DISABLE 0x1001131fU +#define _reg_PHY_CLK_DC_DM_THRSHLD 0x1808131fU +#define _reg_PHY_LP4_BOOT_PLL_CTRL 0x000d1320U +#define _reg_PHY_PLL_CTRL_OVERRIDE 0x10101320U +#define _reg_PHY_USE_PLL_DSKEWCALLOCK 0x00011321U +#define _reg_PHY_PLL_SPO_CAL_CTRL 0x08131321U +#define _reg_SC_PHY_PLL_SPO_CAL_SNAP_OBS 0x00021322U +#define _reg_PHY_PLL_OBS_0 0x08101322U +#define _reg_PHY_PLL_SPO_CAL_OBS_0 0x00111323U +#define _reg_PHY_PLL_OBS_1 0x00101324U +#define _reg_PHY_PLL_SPO_CAL_OBS_1 0x00111325U +#define _reg_PHY_PLL_TESTOUT_SEL 0x18011325U +#define _reg_PHY_LP4_BOOT_LOW_FREQ_SEL 0x00011326U +#define _reg_PHY_TCKSRE_WAIT 0x08041326U +#define _reg_PHY_LP_WAKEUP 0x10081326U +#define _reg_PHY_LS_IDLE_EN 0x18011326U +#define _reg_PHY_LP_CTRLUPD_CNTR_CFG 0x000a1327U +#define _reg_PHY_TDFI_PHY_WRDELAY 0x10011327U +#define _reg_PHY_PAD_FDBK_TERM 0x00121328U +#define _reg_PHY_PAD_DATA_TERM 0x00111329U +#define _reg_PHY_PAD_DQS_TERM 0x0011132aU +#define _reg_PHY_PAD_ADDR_TERM 0x0012132bU +#define _reg_PHY_PAD_CLK_TERM 0x0012132cU +#define _reg_PHY_PAD_CKE_TERM 0x0012132dU +#define _reg_PHY_PAD_RST_TERM 0x0012132eU +#define _reg_PHY_PAD_CS_TERM 0x0012132fU +#define _reg_PHY_PAD_ODT_TERM 0x00121330U +#define _reg_PHY_ADRCTL_RX_CAL 0x000a1331U +#define _reg_PHY_ADRCTL_LP3_RX_CAL 0x100d1331U +#define _reg_PHY_TST_CLK_PAD_CTRL 0x00201332U +#define _reg_PHY_TST_CLK_PAD_CTRL2 0x00171333U +#define _reg_PHY_TST_CLK_PAD_CTRL3 0x00171334U +#define _reg_PHY_TST_CLK_PAD_CTRL4 0x001b1335U +#define _reg_PHY_CAL_MODE_0 0x000d1336U +#define _reg_PHY_CAL_CLEAR_0 0x10011336U +#define _reg_PHY_CAL_START_0 0x18011336U +#define _reg_PHY_CAL_INTERVAL_COUNT_0 0x00201337U +#define _reg_PHY_CAL_SAMPLE_WAIT_0 0x00081338U +#define _reg_PHY_LP4_BOOT_CAL_CLK_SELECT_0 0x08031338U +#define _reg_PHY_CAL_RESULT_OBS_0 0x00181339U +#define _reg_PHY_CAL_RESULT2_OBS_0 0x0018133aU +#define _reg_PHY_CAL_RESULT4_OBS_0 0x0018133bU +#define _reg_PHY_CAL_RESULT5_OBS_0 0x0018133cU +#define _reg_PHY_CAL_RESULT6_OBS_0 0x0018133dU +#define _reg_PHY_CAL_RESULT7_OBS_0 0x0018133eU +#define _reg_PHY_CAL_CPTR_CNT_0 0x1807133eU +#define _reg_PHY_CAL_PU_FINE_ADJ_0 0x0008133fU +#define _reg_PHY_CAL_PD_FINE_ADJ_0 0x0808133fU +#define _reg_PHY_CAL_RCV_FINE_ADJ_0 0x1008133fU +#define _reg_PHY_CAL_DBG_CFG_0 0x1801133fU +#define _reg_SC_PHY_PAD_DBG_CONT_0 0x00011340U +#define _reg_PHY_CAL_RESULT3_OBS_0 0x00201341U +#define _reg_PHY_ADRCTL_PVT_MAP_0 0x00071342U +#define _reg_PHY_CAL_SLOPE_ADJ_0 0x08141342U +#define _reg_PHY_CAL_SLOPE_ADJ_PASS2_0 0x00141343U +#define _reg_PHY_CAL_TWO_PASS_CFG_0 0x00191344U +#define _reg_PHY_CAL_SW_CAL_CFG_0 0x00171345U +#define _reg_PHY_CAL_RANGE_PASS1_PU_MAX_DELTA_0 0x18061345U +#define _reg_PHY_CAL_RANGE_PASS1_PD_MAX_DELTA_0 0x00061346U +#define _reg_PHY_CAL_RANGE_PASS1_RX_MAX_DELTA_0 0x08051346U +#define _reg_PHY_CAL_RANGE_PASS2_PU_MAX_DELTA_0 0x10061346U +#define _reg_PHY_CAL_RANGE_PASS2_PD_MAX_DELTA_0 0x18061346U +#define _reg_PHY_CAL_RANGE_PASS2_RX_MAX_DELTA_0 0x00051347U +#define _reg_PHY_CAL_RANGE_PASS1_PU_MIN_DELTA_0 0x08061347U +#define _reg_PHY_CAL_RANGE_PASS1_PD_MIN_DELTA_0 0x10061347U +#define _reg_PHY_CAL_RANGE_PASS1_RX_MIN_DELTA_0 0x18051347U +#define _reg_PHY_CAL_RANGE_PASS2_PU_MIN_DELTA_0 0x00061348U +#define _reg_PHY_CAL_RANGE_PASS2_PD_MIN_DELTA_0 0x08061348U +#define _reg_PHY_CAL_RANGE_PASS2_RX_MIN_DELTA_0 0x10051348U +#define _reg_PHY_PAD_ATB_CTRL 0x00101349U +#define _reg_PHY_PARITY_ERROR_REGIF_AC 0x100b1349U +#define _reg_PHY_ADRCTL_MANUAL_UPDATE 0x0001134aU +#define _reg_PHY_AC_LPBK_ERR_CLEAR 0x0801134aU +#define _reg_PHY_AC_LPBK_OBS_SELECT 0x1001134aU +#define _reg_PHY_AC_LPBK_ENABLE 0x1802134aU +#define _reg_PHY_AC_LPBK_CONTROL 0x0009134bU +#define _reg_PHY_AC_PRBS_PATTERN_START 0x1007134bU +#define _reg_PHY_AC_PRBS_PATTERN_MASK 0x1804134bU +#define _reg_PHY_AC_LPBK_RESULT_OBS 0x0020134cU +#define _reg_PHY_AC_CLK_LPBK_OBS_SELECT 0x0001134dU +#define _reg_PHY_AC_CLK_LPBK_ENABLE 0x0801134dU +#define _reg_PHY_AC_CLK_LPBK_CONTROL 0x1006134dU +#define _reg_PHY_AC_CLK_LPBK_RESULT_OBS 0x0010134eU +#define _reg_PHY_AC_PWR_RDC_DISABLE 0x1001134eU +#define _reg_PHY_TOP_PWR_RDC_DISABLE 0x1801134eU +#define _reg_PHY_AC_SLV_DLY_CTRL_GATE_DISABLE 0x0001134fU +#define _reg_PHY_CALVL_DEVICE_MAP 0x0805134fU +#define _reg_PHY_ADRCTL_MSTR_DLY_ENC_SEL_0 0x1002134fU +#define _reg_PHY_ADRCTL_MSTR_DLY_ENC_SEL_1 0x1802134fU +#define _reg_PHY_DDL_AC_ENABLE 0x00201350U +#define _reg_PHY_DDL_AC_MODE 0x001a1351U +#define _reg_PHY_DDL_AC_MASK 0x00061352U +#define _reg_PHY_INIT_UPDATE_CONFIG 0x08031352U +#define _reg_PHY_DDL_TRACK_UPD_THRESHOLD_AC 0x10081352U +#define _reg_PHY_ERR_MASK_EN 0x18031352U +#define _reg_PHY_ERR_STATUS 0x00031353U +#define _reg_PHY_DS0_DQS_ERR_COUNTER 0x00201354U +#define _reg_PHY_DS1_DQS_ERR_COUNTER 0x00201355U +#define _reg_PHY_DLL_RST_EN 0x00021356U +#define _reg_PHY_AC_INIT_COMPLETE_OBS 0x080a1356U +#define _reg_PHY_DS_INIT_COMPLETE_OBS 0x18021356U +#define _reg_PHY_UPDATE_MASK 0x00011357U +#define _reg_PHY_AC_DCC_RXCAL_CTRL_GATE_DISABLE 0x08011357U +#define _reg_PHY_GRP_SLV_DLY_ENC_OBS_SELECT 0x10041357U +#define _reg_PHY_GRP_SHIFT_OBS_SELECT 0x18031357U +#define _reg_PHY_GRP_SLV_DLY_ENC_OBS 0x000b1358U +#define _reg_PHY_GRP_SHIFT_OBS 0x10031358U +#define _reg_PHY_PARITY_ERROR_INJECTION_ENABLE 0x00011359U +#define _reg_PHY_PARITY_ERROR_REGIF_PS 0x080b1359U +#define _reg_PHY_PLL_LOCK_DEASSERT_MASK 0x18031359U +#define _reg_PHY_PARITY_ERROR_INFO 0x0005135aU +#define _reg_PHY_PARITY_ERROR_INFO_MASK 0x0805135aU +#define _reg_SC_PHY_PARITY_ERROR_INFO_WOCLR 0x1005135aU +#define _reg_PHY_TIMEOUT_ERROR_INFO 0x000e135bU +#define _reg_PHY_TIMEOUT_ERROR_INFO_MASK 0x100e135bU +#define _reg_SC_PHY_TIMEOUT_ERROR_INFO_WOCLR 0x000e135cU +#define _reg_PHY_PLL_FREQUENCY_ERROR 0x1004135cU +#define _reg_PHY_PLL_FREQUENCY_ERROR_MASK 0x1806135cU +#define _reg_SC_PHY_PLL_FREQUENCY_ERROR_WOCLR 0x0006135dU +#define _reg_PHY_PLL_DSKEWCALOUT_MIN 0x080c135dU +#define _reg_PHY_PLL_DSKEWCALOUT_MAX 0x000c135eU +#define _reg_PHY_PLL_DSKEWCALOUT_ERROR_INFO 0x1002135eU +#define _reg_PHY_PLL_DSKEWCALOUT_ERROR_INFO_MASK 0x1802135eU +#define _reg_SC_PHY_PLL_DSKEWCALOUT_ERROR_INFO_WOCLR 0x0002135fU +#define _reg_PHY_TOP_FSM_ERROR_INFO 0x0809135fU +#define _reg_PHY_TOP_FSM_ERROR_INFO_MASK 0x00091360U +#define _reg_SC_PHY_TOP_FSM_ERROR_INFO_WOCLR 0x10091360U +#define _reg_PHY_FSM_TRANSIENT_ERROR_INFO 0x00081361U +#define _reg_PHY_FSM_TRANSIENT_ERROR_INFO_MASK 0x08081361U +#define _reg_SC_PHY_FSM_TRANSIENT_ERROR_INFO_WOCLR 0x10081361U +#define _reg_PHY_TOP_TRAIN_CALIB_ERROR_INFO 0x18021361U +#define _reg_PHY_TOP_TRAIN_CALIB_ERROR_INFO_MASK 0x00021362U +#define _reg_SC_PHY_TOP_TRAIN_CALIB_ERROR_INFO_WOCLR 0x08021362U +#define _reg_PHY_TRAIN_CALIB_ERROR_INFO 0x10051362U +#define _reg_PHY_TRAIN_CALIB_ERROR_INFO_MASK 0x18051362U +#define _reg_SC_PHY_TRAIN_CALIB_ERROR_INFO_WOCLR 0x00051363U +#define _reg_PHY_GLOBAL_ERROR_INFO 0x08061363U +#define _reg_PHY_GLOBAL_ERROR_INFO_MASK 0x10061363U +#define _reg_PHY_TRAINING_TIMEOUT_VALUE 0x00141364U +#define _reg_PHY_INIT_TIMEOUT_VALUE 0x00141365U +#define _reg_PHY_LP_TIMEOUT_VALUE 0x00101366U +#define _reg_PHY_PHYUPD_TIMEOUT_VALUE 0x00201367U +#define _reg_PHY_PHYMSTR_TIMEOUT_VALUE 0x00141368U +#define _reg_PHY_PLL_LOCK_0_MIN_VALUE 0x18051368U +#define _reg_PHY_PLL_LOCK_TIMEOUT_VALUE 0x00101369U +#define _reg_PHY_RDDATA_VALID_TIMEOUT_VALUE 0x10081369U +#define _reg_PHY_PLL_FREQUENCY_DELTA 0x18041369U +#define _reg_PHY_PLL_FREQUENCY_COMPARE_INTERVAL 0x0010136aU +#define _reg_PHY_ADRCTL_FSM_ERROR_INFO_0 0x100e136aU +#define _reg_PHY_ADRCTL_FSM_ERROR_INFO_MASK_0 0x000e136bU +#define _reg_SC_PHY_ADRCTL_FSM_ERROR_INFO_WOCLR_0 0x100e136bU +#define _reg_PHY_ADRCTL_FSM_ERROR_INFO_1 0x000e136cU +#define _reg_PHY_ADRCTL_FSM_ERROR_INFO_MASK_1 0x100e136cU +#define _reg_SC_PHY_ADRCTL_FSM_ERROR_INFO_WOCLR_1 0x000e136dU +#define _reg_PHY_MEMCLK_FSM_ERROR_INFO_0 0x100e136dU +#define _reg_PHY_MEMCLK_FSM_ERROR_INFO_MASK_0 0x000e136eU +#define _reg_SC_PHY_MEMCLK_FSM_ERROR_INFO_WOCLR_0 0x100e136eU +#define _reg_PHY_PAD_CAL_IO_CFG_0 0x0012136fU +#define _reg_PHY_PAD_ACS_IO_CFG 0x000d1370U +#define _reg_PHY_PLL_BYPASS 0x00011371U +#define _reg_PHY_PLL_CTRL 0x000d1372U +#define _reg_PHY_LOW_FREQ_SEL 0x10011372U +#define _reg_PHY_PAD_VREF_CTRL_AC 0x000c1373U +#define _reg_PHY_CSLVL_CAPTURE_CNT 0x10041373U +#define _reg_PHY_CSLVL_DLY_STEP 0x18041373U +#define _reg_PHY_SW_CSLVL_DVW_MIN 0x00091374U +#define _reg_PHY_SW_CSLVL_DVW_MIN_EN 0x10011374U +#define _reg_PHY_LVL_MEAS_DLY_STEP_ENABLE 0x18011374U +#define _reg_PHY_GRP0_SLAVE_DELAY_0 0x000b1375U +#define _reg_PHY_GRP1_SLAVE_DELAY_0 0x100b1375U +#define _reg_PHY_GRP2_SLAVE_DELAY_0 0x000b1376U +#define _reg_PHY_GRP3_SLAVE_DELAY_0 0x100b1376U +#define _reg_PHY_GRP0_SLAVE_DELAY_1 0x000b1377U +#define _reg_PHY_GRP1_SLAVE_DELAY_1 0x000b1378U +#define _reg_PHY_GRP2_SLAVE_DELAY_1 0x000b1379U +#define _reg_PHY_GRP3_SLAVE_DELAY_1 0x000b137aU +#define _reg_PHY_CLK_DC_CAL_CLK_SEL 0x0003137bU +#define _reg_PHY_PAD_FDBK_DRIVE 0x001e137cU +#define _reg_PHY_PAD_FDBK_DRIVE2 0x0013137dU +#define _reg_PHY_PAD_DATA_DRIVE 0x001f137eU +#define _reg_PHY_PAD_DATA_DRIVE2 0x0001137fU +#define _reg_PHY_PAD_DQS_DRIVE 0x00201380U +#define _reg_PHY_PAD_DQS_DRIVE2 0x00011381U +#define _reg_PHY_PAD_ADDR_DRIVE 0x001e1382U +#define _reg_PHY_PAD_ADDR_DRIVE2 0x001c1383U +#define _reg_PHY_PAD_CLK_DRIVE 0x00201384U +#define _reg_PHY_PAD_CLK_DRIVE2 0x00131385U +#define _reg_PHY_PAD_CKE_DRIVE 0x001e1386U +#define _reg_PHY_PAD_CKE_DRIVE2 0x001c1387U +#define _reg_PHY_PAD_RST_DRIVE 0x001e1388U +#define _reg_PHY_PAD_RST_DRIVE2 0x001c1389U +#define _reg_PHY_PAD_CS_DRIVE 0x001e138aU +#define _reg_PHY_PAD_CS_DRIVE2 0x001c138bU +#define _reg_PHY_PAD_ODT_DRIVE 0x001e138cU +#define _reg_PHY_PAD_ODT_DRIVE2 0x001c138dU +#define _reg_PHY_CAL_CLK_SELECT_0 0x0003138eU +#define _reg_PHY_CAL_VREF_SWITCH_TIMER_0 0x0810138eU +#define _reg_PHY_CAL_SETTLING_PRD_0 0x1807138eU +#define _reg_PI_START 0x00010800U +#define _reg_PI_DRAM_CLASS 0x08040800U +#define _reg_PI_VERSION 0x00200801U +#define _reg_PI_ID 0x00100802U +#define _reg_PI_NORMAL_LVL_SEQ 0x00010803U +#define _reg_PI_INIT_LVL_EN 0x08010803U +#define _reg_PI_NOTCARE_PHYUPD 0x10010803U +#define _reg_PI_TCMD_GAP 0x00100804U +#define _reg_RESERVED_R0 0x10080804U +#define _reg_PI_TRAIN_ALL_FREQ_REQ 0x18010804U +#define _reg_PI_DFI_VERSION 0x00010805U +#define _reg_PI_DFI_PHYMSTR_TYPE 0x08020805U +#define _reg_PI_DFI_PHYMSTR_CS_STATE_R 0x10010805U +#define _reg_PI_DFI_PHYMSTR_STATE_SEL_R 0x18010805U +#define _reg_PI_TDFI_PHYMSTR_MAX 0x00200806U +#define _reg_PI_TDFI_PHYMSTR_RESP 0x00140807U +#define _reg_PI_TDFI_PHYUPD_RESP 0x00140808U +#define _reg_PI_TDFI_PHYUPD_MAX 0x00200809U +#define _reg_PI_FREQ_MAP 0x0020080aU +#define _reg_PI_INIT_WORK_FREQ 0x0005080bU +#define _reg_PI_INIT_DFS_CALVL_ONLY 0x0801080bU +#define _reg_PI_SW_RST_N 0x1001080bU +#define _reg_RESERVED_V3U 0x1801080bU +#define _reg_PI_CS_MAP 0x0002080cU +#define _reg_PI_RANK_NUM_PER_CKE 0x0805080cU +#define _reg_PI_SRX_LVL_TARGET_CS_EN 0x1001080cU +#define _reg_PI_TMRR 0x1804080cU +#define _reg_PI_PREAMBLE_SUPPORT 0x0002080dU +#define _reg_PI_MCAREF_FORWARD_ONLY 0x0801080dU +#define _reg_PI_WRLVL_MRR_DQ_RETURN_HIZ 0x1001080dU +#define _reg_PI_ON_DFIBUS 0x1801080dU +#define _reg_PI_SWLVL_LOAD 0x0001080eU +#define _reg_PI_SWLVL_OP_DONE 0x0801080eU +#define _reg_PI_SW_WRLVL_RESP_0 0x1001080eU +#define _reg_PI_SW_WRLVL_RESP_1 0x1801080eU +#define _reg_PI_SW_RDLVL_RESP_0 0x0002080fU +#define _reg_PI_SW_RDLVL_RESP_1 0x0802080fU +#define _reg_PI_SW_CALVL_RESP_0 0x1002080fU +#define _reg_PI_SW_LEVELING_MODE 0x1803080fU +#define _reg_PI_SWLVL_START 0x00010810U +#define _reg_PI_SWLVL_EXIT 0x08010810U +#define _reg_PI_SWLVL_WR_SLICE_0 0x10010810U +#define _reg_PI_SWLVL_RD_SLICE_0 0x18010810U +#define _reg_PI_SWLVL_VREF_UPDATE_SLICE_0 0x00010811U +#define _reg_PI_SW_WDQLVL_RESP_0 0x08020811U +#define _reg_PI_SWLVL_WR_SLICE_1 0x10010811U +#define _reg_PI_SWLVL_RD_SLICE_1 0x18010811U +#define _reg_PI_SWLVL_VREF_UPDATE_SLICE_1 0x00010812U +#define _reg_PI_SW_WDQLVL_RESP_1 0x08020812U +#define _reg_PI_SWLVL_SM2_START 0x10010812U +#define _reg_PI_SWLVL_SM2_WR 0x18010812U +#define _reg_PI_SWLVL_SM2_RD 0x00010813U +#define _reg_PI_SEQUENTIAL_LVL_REQ 0x08010813U +#define _reg_PI_DFS_PERIOD_EN 0x10010813U +#define _reg_PI_SRE_PERIOD_EN 0x18010813U +#define _reg_PI_DFI40_POLARITY 0x00010814U +#define _reg_PI_WRLVL_REQ 0x08010814U +#define _reg_PI_WRLVL_CS 0x10010814U +#define _reg_PI_WLDQSEN 0x18060814U +#define _reg_PI_WLMRD 0x00060815U +#define _reg_PI_WRLVL_INTERVAL 0x08100815U +#define _reg_PI_WRLVL_PERIODIC 0x18010815U +#define _reg_PI_WRLVL_ON_SREF_EXIT 0x00010816U +#define _reg_PI_WRLVL_DISABLE_DFS 0x08010816U +#define _reg_PI_WRLVL_RESP_MASK 0x10020816U +#define _reg_PI_WRLVL_ROTATE 0x18010816U +#define _reg_PI_WRLVL_CS_MAP 0x00020817U +#define _reg_PI_WRLVL_ERROR_STATUS 0x08010817U +#define _reg_PI_TDFI_WRLVL_EN 0x10080817U +#define _reg_PI_TDFI_WRLVL_RESP 0x00200818U +#define _reg_PI_TDFI_WRLVL_MAX 0x00200819U +#define _reg_PI_WRLVL_STROBE_NUM 0x0005081aU +#define _reg_PI_TODTH_WR 0x0804081aU +#define _reg_PI_TODTH_RD 0x1004081aU +#define _reg_PI_ODT_VALUE 0x1802081aU +#define _reg_PI_RDLVL_REQ 0x0001081bU +#define _reg_PI_RDLVL_GATE_REQ 0x0801081bU +#define _reg_PI_RDLVL_CS 0x1001081bU +#define _reg_PI_RDLVL_PAT_0 0x0020081cU +#define _reg_PI_RDLVL_PAT_1 0x0020081dU +#define _reg_PI_RDLVL_PAT_2 0x0020081eU +#define _reg_PI_RDLVL_PAT_3 0x0020081fU +#define _reg_PI_RDLVL_PAT_4 0x00200820U +#define _reg_PI_RDLVL_PAT_5 0x00200821U +#define _reg_PI_RDLVL_PAT_6 0x00200822U +#define _reg_PI_RDLVL_PAT_7 0x00200823U +#define _reg_PI_RDLVL_SEQ_EN 0x00040824U +#define _reg_PI_RDLVL_PERIODIC 0x08010824U +#define _reg_PI_RDLVL_ON_SREF_EXIT 0x10010824U +#define _reg_PI_RDLVL_DISABLE_DFS 0x18010824U +#define _reg_PI_RDLVL_GATE_PERIODIC 0x00010825U +#define _reg_PI_RDLVL_GATE_ON_SREF_EXIT 0x08010825U +#define _reg_PI_RDLVL_GATE_DISABLE_DFS 0x10010825U +#define _reg_PI_RDLVL_ROTATE 0x18010825U +#define _reg_PI_RDLVL_GATE_ROTATE 0x00010826U +#define _reg_PI_RDLVL_CS_MAP 0x08020826U +#define _reg_PI_RDLVL_GATE_CS_MAP 0x10020826U +#define _reg_PI_TDFI_RDLVL_RR 0x000a0827U +#define _reg_PI_TDFI_RDLVL_RESP 0x00200828U +#define _reg_PI_RDLVL_RESP_MASK 0x00020829U +#define _reg_PI_TDFI_RDLVL_EN 0x08080829U +#define _reg_PI_TDFI_RDLVL_MAX 0x0020082aU +#define _reg_PI_RDLVL_ERROR_STATUS 0x0001082bU +#define _reg_PI_RDLVL_INTERVAL 0x0810082bU +#define _reg_PI_RDLVL_GATE_INTERVAL 0x0010082cU +#define _reg_PI_RDLVL_PATTERN_START 0x1004082cU +#define _reg_PI_RDLVL_PATTERN_NUM 0x1804082cU +#define _reg_PI_RDLVL_STROBE_NUM 0x0005082dU +#define _reg_PI_RDLVL_GATE_STROBE_NUM 0x0805082dU +#define _reg_PI_RD_PREAMBLE_TRAINING_EN 0x1001082dU +#define _reg_PI_REG_DIMM_ENABLE 0x1801082dU +#define _reg_PI_TDFI_RDDATA_EN 0x0007082eU +#define _reg_PI_TDFI_PHY_WRLAT 0x0807082eU +#define _reg_PI_CALVL_REQ 0x1001082eU +#define _reg_PI_CALVL_CS 0x1801082eU +#define _reg_PI_WRLVL_EN_DEASSERT_2_MRR 0x0001082fU +#define _reg_RESERVED_R1 0x0804082fU +#define _reg_PI_CALVL_SEQ_EN 0x1002082fU +#define _reg_PI_CALVL_PERIODIC 0x1801082fU +#define _reg_PI_CALVL_ON_SREF_EXIT 0x00010830U +#define _reg_PI_CALVL_DISABLE_DFS 0x08010830U +#define _reg_PI_CALVL_ROTATE 0x10010830U +#define _reg_PI_CALVL_CS_MAP 0x18020830U +#define _reg_PI_TDFI_CALVL_EN 0x00080831U +#define _reg_PI_TDFI_CALVL_RESP 0x00200832U +#define _reg_PI_TDFI_CALVL_MAX 0x00200833U +#define _reg_PI_CALVL_RESP_MASK 0x00010834U +#define _reg_PI_CALVL_ERROR_STATUS 0x08020834U +#define _reg_PI_CALVL_INTERVAL 0x10100834U +#define _reg_PI_TCACKEL 0x00050835U +#define _reg_PI_TCAMRD 0x08060835U +#define _reg_PI_TCACKEH 0x10050835U +#define _reg_PI_TCAEXT 0x18050835U +#define _reg_PI_CA_TRAIN_VREF_EN 0x00010836U +#define _reg_PI_CALVL_VREF_INITIAL_STEPSIZE 0x08040836U +#define _reg_PI_CALVL_VREF_NORMAL_STEPSIZE 0x10040836U +#define _reg_PI_TDFI_INIT_START_MIN 0x18080836U +#define _reg_PI_TDFI_INIT_COMPLETE_MIN 0x00080837U +#define _reg_PI_TCKCKEH 0x08040837U +#define _reg_PI_CALVL_STROBE_NUM 0x10050837U +#define _reg_PI_SW_CA_TRAIN_VREF 0x18070837U +#define _reg_PI_CLKDISABLE_2_INIT_START 0x00080838U +#define _reg_PI_INIT_STARTORCOMPLETE_2_CLKDISABLE 0x08080838U +#define _reg_PI_DRAM_CLK_DISABLE_DEASSERT_SEL 0x10010838U +#define _reg_PI_REFRESH_BETWEEN_SEGMENT_DISABLE 0x18010838U +#define _reg_PI_MC_DFS_PI_SET_VREF_ENABLE 0x00010839U +#define _reg_PI_FSM_ERROR_INFO_MASK 0x080d0839U +#define _reg_PI_SC_FSM_ERROR_INFO_WOCLR 0x000d083aU +#define _reg_PI_FSM_ERROR_INFO 0x100d083aU +#define _reg_PI_WDQLVL_VREF_EN 0x0001083bU +#define _reg_PI_WDQLVL_BST_NUM 0x0803083bU +#define _reg_PI_WDQLVL_RESP_MASK 0x1002083bU +#define _reg_PI_WDQLVL_ROTATE 0x1801083bU +#define _reg_PI_WDQLVL_CS_MAP 0x0002083cU +#define _reg_PI_WDQLVL_VREF_INITIAL_STEPSIZE 0x0805083cU +#define _reg_PI_WDQLVL_VREF_NORMAL_STEPSIZE 0x1005083cU +#define _reg_PI_WDQLVL_PERIODIC 0x1801083cU +#define _reg_PI_WDQLVL_REQ 0x0001083dU +#define _reg_PI_WDQLVL_CS 0x0801083dU +#define _reg_PI_TDFI_WDQLVL_EN 0x1008083dU +#define _reg_PI_TDFI_WDQLVL_RESP 0x0020083eU +#define _reg_PI_TDFI_WDQLVL_MAX 0x0020083fU +#define _reg_PI_WDQLVL_INTERVAL 0x00100840U +#define _reg_PI_WDQLVL_ON_SREF_EXIT 0x10010840U +#define _reg_PI_WDQLVL_DISABLE_DFS 0x18010840U +#define _reg_PI_WDQLVL_ERROR_STATUS 0x00020841U +#define _reg_PI_WDQLVL_OSC_EN 0x08010841U +#define _reg_PI_DQS_OSC_PERIOD_EN 0x10010841U +#define _reg_PI_BANK_DIFF 0x18020841U +#define _reg_PI_ROW_DIFF 0x00030842U +#define _reg_PI_TCCD 0x08050842U +#define _reg_RESERVED_R2 0x10040842U +#define _reg_RESERVED_R3 0x18040842U +#define _reg_RESERVED_R4 0x00040843U +#define _reg_RESERVED_R5 0x08040843U +#define _reg_RESERVED_R6 0x10040843U +#define _reg_RESERVED_R7 0x18040843U +#define _reg_RESERVED_R8 0x00040844U +#define _reg_RESERVED_R9 0x08040844U +#define _reg_RESERVED_R10 0x10040844U +#define _reg_RESERVED_R11 0x18040844U +#define _reg_RESERVED_R12 0x00040845U +#define _reg_RESERVED_R13 0x08040845U +#define _reg_RESERVED_R14 0x10040845U +#define _reg_RESERVED_R15 0x18040845U +#define _reg_RESERVED_R16 0x00040846U +#define _reg_RESERVED_R17 0x08040846U +#define _reg_RESERVED_R18 0x10040846U +#define _reg_RESERVED_R19 0x18040846U +#define _reg_RESERVED_R20 0x00040847U +#define _reg_RESERVED_R21 0x08040847U +#define _reg_PI_INT_STATUS 0x00170848U +#define _reg_PI_INT_ACK 0x00160849U +#define _reg_PI_INT_MASK 0x0017084aU +#define _reg_PI_BIST_EXP_DATA_P0 0x0020084bU +#define _reg_PI_BIST_EXP_DATA_P1 0x0020084cU +#define _reg_PI_BIST_FAIL_DATA_P0 0x0020084dU +#define _reg_PI_BIST_FAIL_DATA_P1 0x0020084eU +#define _reg_PI_BIST_FAIL_ADDR_P0 0x0020084fU +#define _reg_PI_BIST_FAIL_ADDR_P1 0x00010850U +#define _reg_PI_BSTLEN 0x08050850U +#define _reg_PI_LONG_COUNT_MASK 0x10050850U +#define _reg_PI_DATA_BYTE_SWAP_EN 0x18010850U +#define _reg_PI_DATA_BYTE_SWAP_SLICE0 0x00010851U +#define _reg_PI_DATA_BYTE_SWAP_SLICE1 0x08010851U +#define _reg_PI_CTRLUPD_REQ_PER_AREF_EN 0x10010851U +#define _reg_PI_TDFI_CTRLUPD_MIN 0x18080851U +#define _reg_PI_UPDATE_ERROR_STATUS 0x00020852U +#define _reg_PI_BIST_GO 0x08010852U +#define _reg_PI_BIST_RESULT 0x10020852U +#define _reg_PI_ADDR_SPACE 0x18060852U +#define _reg_PI_BIST_DATA_CHECK 0x00010853U +#define _reg_PI_BIST_ADDR_CHECK 0x08010853U +#define _reg_PI_BIST_START_ADDRESS_P0 0x00200854U +#define _reg_PI_BIST_START_ADDRESS_P1 0x00010855U +#define _reg_PI_MBIST_INIT_PATTERN 0x08080855U +#define _reg_PI_BIST_DATA_MASK 0x00200856U +#define _reg_PI_BIST_ERR_COUNT 0x000c0857U +#define _reg_PI_BIST_ERR_STOP 0x100c0857U +#define _reg_PI_BIST_ADDR_MASK_0_P0 0x00200858U +#define _reg_PI_BIST_ADDR_MASK_0_P1 0x00020859U +#define _reg_PI_BIST_ADDR_MASK_1_P0 0x0020085aU +#define _reg_PI_BIST_ADDR_MASK_1_P1 0x0002085bU +#define _reg_PI_BIST_ADDR_MASK_2_P0 0x0020085cU +#define _reg_PI_BIST_ADDR_MASK_2_P1 0x0002085dU +#define _reg_PI_BIST_ADDR_MASK_3_P0 0x0020085eU +#define _reg_PI_BIST_ADDR_MASK_3_P1 0x0002085fU +#define _reg_PI_BIST_ADDR_MASK_4_P0 0x00200860U +#define _reg_PI_BIST_ADDR_MASK_4_P1 0x00020861U +#define _reg_PI_BIST_ADDR_MASK_5_P0 0x00200862U +#define _reg_PI_BIST_ADDR_MASK_5_P1 0x00020863U +#define _reg_PI_BIST_ADDR_MASK_6_P0 0x00200864U +#define _reg_PI_BIST_ADDR_MASK_6_P1 0x00020865U +#define _reg_PI_BIST_ADDR_MASK_7_P0 0x00200866U +#define _reg_PI_BIST_ADDR_MASK_7_P1 0x00020867U +#define _reg_PI_BIST_ADDR_MASK_8_P0 0x00200868U +#define _reg_PI_BIST_ADDR_MASK_8_P1 0x00020869U +#define _reg_PI_BIST_ADDR_MASK_9_P0 0x0020086aU +#define _reg_PI_BIST_ADDR_MASK_9_P1 0x0002086bU +#define _reg_PI_BIST_MODE 0x0803086bU +#define _reg_PI_BIST_ADDR_MODE 0x1002086bU +#define _reg_PI_BIST_PAT_MODE 0x1802086bU +#define _reg_PI_BIST_USER_PAT_P0 0x0020086cU +#define _reg_PI_BIST_USER_PAT_P1 0x0020086dU +#define _reg_PI_BIST_PAT_NUM 0x0004086eU +#define _reg_PI_BIST_STAGE_0 0x001e086fU +#define _reg_PI_BIST_STAGE_1 0x001e0870U +#define _reg_PI_BIST_STAGE_2 0x001e0871U +#define _reg_PI_BIST_STAGE_3 0x001e0872U +#define _reg_PI_BIST_STAGE_4 0x001e0873U +#define _reg_PI_BIST_STAGE_5 0x001e0874U +#define _reg_PI_BIST_STAGE_6 0x001e0875U +#define _reg_PI_BIST_STAGE_7 0x001e0876U +#define _reg_PI_COL_DIFF 0x00040877U +#define _reg_PI_SELF_REFRESH_EN 0x08010877U +#define _reg_PI_PWRUP_SREFRESH_EXIT 0x10010877U +#define _reg_PI_MONITOR_SRC_SEL_0 0x18040877U +#define _reg_PI_MONITOR_CAP_SEL_0 0x00010878U +#define _reg_PI_MONITOR_0 0x08080878U +#define _reg_PI_MONITOR_SRC_SEL_1 0x10040878U +#define _reg_PI_MONITOR_CAP_SEL_1 0x18010878U +#define _reg_PI_MONITOR_1 0x00080879U +#define _reg_PI_MONITOR_SRC_SEL_2 0x08040879U +#define _reg_PI_MONITOR_CAP_SEL_2 0x10010879U +#define _reg_PI_MONITOR_2 0x18080879U +#define _reg_PI_MONITOR_SRC_SEL_3 0x0004087aU +#define _reg_PI_MONITOR_CAP_SEL_3 0x0801087aU +#define _reg_PI_MONITOR_3 0x1008087aU +#define _reg_PI_MONITOR_SRC_SEL_4 0x1804087aU +#define _reg_PI_MONITOR_CAP_SEL_4 0x0001087bU +#define _reg_PI_MONITOR_4 0x0808087bU +#define _reg_PI_MONITOR_SRC_SEL_5 0x1004087bU +#define _reg_PI_MONITOR_CAP_SEL_5 0x1801087bU +#define _reg_PI_MONITOR_5 0x0008087cU +#define _reg_PI_MONITOR_SRC_SEL_6 0x0804087cU +#define _reg_PI_MONITOR_CAP_SEL_6 0x1001087cU +#define _reg_PI_MONITOR_6 0x1808087cU +#define _reg_PI_MONITOR_SRC_SEL_7 0x0004087dU +#define _reg_PI_MONITOR_CAP_SEL_7 0x0801087dU +#define _reg_PI_MONITOR_7 0x1008087dU +#define _reg_PI_MONITOR_STROBE 0x0008087eU +#define _reg_PI_DLL_LOCK 0x0001087fU +#define _reg_PI_FREQ_NUMBER_STATUS 0x0805087fU +#define _reg_RESERVED_R22 0x1001087fU +#define _reg_PI_PHYMSTR_TYPE 0x1802087fU +#define _reg_RESERVED_R23 0x00010880U +#define _reg_PI_POWER_REDUC_EN 0x08010880U +#define _reg_RESERVED_R24 0x10010880U +#define _reg_RESERVED_R25 0x18010880U +#define _reg_RESERVED_R26 0x00010881U +#define _reg_RESERVED_R27 0x08010881U +#define _reg_RESERVED_R28 0x10010881U +#define _reg_RESERVED_R29 0x18010881U +#define _reg_RESERVED_R30 0x00010882U +#define _reg_RESERVED_R31 0x08010882U +#define _reg_RESERVED_R32 0x10010882U +#define _reg_RESERVED_R33 0x18010882U +#define _reg_RESERVED_R34 0x00010883U +#define _reg_RESERVED_R35 0x08010883U +#define _reg_RESERVED_R36 0x10010883U +#define _reg_RESERVED_R37 0x18010883U +#define _reg_RESERVED_R38 0x00010884U +#define _reg_PI_WRLVL_MAX_STROBE_PEND 0x08080884U +#define _reg_PI_TREFBW_THR 0x10090884U +#define _reg_PI_FREQ_CHANGE_REG_COPY 0x00050885U +#define _reg_PI_FREQ_SEL_FROM_REGIF 0x00010886U +#define _reg_RESERVED_R39 0x08050886U +#define _reg_PI_CATR 0x10020886U +#define _reg_PI_NO_CATR_READ 0x18010886U +#define _reg_PI_MASK_INIT_COMPLETE 0x00010887U +#define _reg_PI_DISCONNECT_MC 0x08010887U +#define _reg_PI_TRACE_MC_MR13 0x10010887U +#define _reg_PI_TSDO_F0 0x18080887U +#define _reg_PI_TSDO_F1 0x00080888U +#define _reg_PI_TSDO_F2 0x08080888U +#define _reg_PI_TDELAY_RDWR_2_BUS_IDLE_F0 0x00080889U +#define _reg_PI_TDELAY_RDWR_2_BUS_IDLE_F1 0x0008088aU +#define _reg_PI_TDELAY_RDWR_2_BUS_IDLE_F2 0x0008088bU +#define _reg_PI_WRLAT_F0 0x0807088bU +#define _reg_PI_CASLAT_LIN_F0 0x1007088bU +#define _reg_PI_WRLAT_F1 0x1807088bU +#define _reg_PI_CASLAT_LIN_F1 0x0007088cU +#define _reg_PI_WRLAT_F2 0x0807088cU +#define _reg_PI_CASLAT_LIN_F2 0x1007088cU +#define _reg_PI_TRFC_F0 0x000a088dU +#define _reg_PI_TREF_F0 0x0014088eU +#define _reg_PI_TRFC_F1 0x000a088fU +#define _reg_PI_TREF_F1 0x00140890U +#define _reg_PI_TRFC_F2 0x000a0891U +#define _reg_PI_TREF_F2 0x00140892U +#define _reg_PI_TDFI_CTRL_DELAY_F0 0x18040892U +#define _reg_PI_TDFI_CTRL_DELAY_F1 0x00040893U +#define _reg_PI_TDFI_CTRL_DELAY_F2 0x08040893U +#define _reg_PI_WRLVL_EN_F0 0x10020893U +#define _reg_PI_WRLVL_EN_F1 0x18020893U +#define _reg_PI_WRLVL_EN_F2 0x00020894U +#define _reg_PI_TDFI_WRLVL_WW_F0 0x080a0894U +#define _reg_PI_TDFI_WRLVL_WW_F1 0x000a0895U +#define _reg_PI_TDFI_WRLVL_WW_F2 0x100a0895U +#define _reg_PI_TODTL_2CMD_F0 0x00080896U +#define _reg_PI_ODT_EN_F0 0x08010896U +#define _reg_PI_TODTL_2CMD_F1 0x10080896U +#define _reg_PI_ODT_EN_F1 0x18010896U +#define _reg_PI_TODTL_2CMD_F2 0x00080897U +#define _reg_PI_ODT_EN_F2 0x08010897U +#define _reg_PI_ODTLON_F0 0x10040897U +#define _reg_PI_TODTON_MIN_F0 0x18040897U +#define _reg_PI_ODTLON_F1 0x00040898U +#define _reg_PI_TODTON_MIN_F1 0x08040898U +#define _reg_PI_ODTLON_F2 0x10040898U +#define _reg_PI_TODTON_MIN_F2 0x18040898U +#define _reg_PI_RDLVL_EN_F0 0x00020899U +#define _reg_PI_RDLVL_GATE_EN_F0 0x08020899U +#define _reg_PI_RDLVL_EN_F1 0x10020899U +#define _reg_PI_RDLVL_GATE_EN_F1 0x18020899U +#define _reg_PI_RDLVL_EN_F2 0x0002089aU +#define _reg_PI_RDLVL_GATE_EN_F2 0x0802089aU +#define _reg_PI_RDLVL_PAT0_EN_F0 0x1002089aU +#define _reg_PI_RDLVL_RXCAL_EN_F0 0x1802089aU +#define _reg_PI_RDLVL_DFE_EN_F0 0x0002089bU +#define _reg_PI_RDLVL_MULTI_EN_F0 0x0802089bU +#define _reg_PI_RDLVL_PAT0_EN_F1 0x1002089bU +#define _reg_PI_RDLVL_RXCAL_EN_F1 0x1802089bU +#define _reg_PI_RDLVL_DFE_EN_F1 0x0002089cU +#define _reg_PI_RDLVL_MULTI_EN_F1 0x0802089cU +#define _reg_PI_RDLVL_PAT0_EN_F2 0x1002089cU +#define _reg_PI_RDLVL_RXCAL_EN_F2 0x1802089cU +#define _reg_PI_RDLVL_DFE_EN_F2 0x0002089dU +#define _reg_PI_RDLVL_MULTI_EN_F2 0x0802089dU +#define _reg_PI_RDLAT_ADJ_F0 0x1007089dU +#define _reg_PI_RDLAT_ADJ_F1 0x1807089dU +#define _reg_PI_RDLAT_ADJ_F2 0x0007089eU +#define _reg_PI_WRLAT_ADJ_F0 0x0807089eU +#define _reg_PI_WRLAT_ADJ_F1 0x1007089eU +#define _reg_PI_WRLAT_ADJ_F2 0x1807089eU +#define _reg_PI_TDFI_PHY_WRDATA_F0 0x0003089fU +#define _reg_PI_TDFI_PHY_WRDATA_F1 0x0803089fU +#define _reg_PI_TDFI_PHY_WRDATA_F2 0x1003089fU +#define _reg_PI_TDFI_CALVL_CC_F0 0x000a08a0U +#define _reg_PI_TDFI_CALVL_CAPTURE_F0 0x100a08a0U +#define _reg_PI_TDFI_CALVL_CC_F1 0x000a08a1U +#define _reg_PI_TDFI_CALVL_CAPTURE_F1 0x100a08a1U +#define _reg_PI_TDFI_CALVL_CC_F2 0x000a08a2U +#define _reg_PI_TDFI_CALVL_CAPTURE_F2 0x100a08a2U +#define _reg_PI_CALVL_EN_F0 0x000208a3U +#define _reg_PI_CALVL_EN_F1 0x080208a3U +#define _reg_PI_CALVL_EN_F2 0x100208a3U +#define _reg_PI_TMRZ_F0 0x180508a3U +#define _reg_PI_TCAENT_F0 0x000e08a4U +#define _reg_PI_TMRZ_F1 0x100508a4U +#define _reg_PI_TCAENT_F1 0x000e08a5U +#define _reg_PI_TMRZ_F2 0x100508a5U +#define _reg_PI_TCAENT_F2 0x000e08a6U +#define _reg_PI_TDFI_CACSCA_F0 0x100508a6U +#define _reg_PI_TDFI_CASEL_F0 0x180508a6U +#define _reg_PI_TVREF_SHORT_F0 0x000a08a7U +#define _reg_PI_TVREF_LONG_F0 0x100a08a7U +#define _reg_PI_TDFI_CACSCA_F1 0x000508a8U +#define _reg_PI_TDFI_CASEL_F1 0x080508a8U +#define _reg_PI_TVREF_SHORT_F1 0x100a08a8U +#define _reg_PI_TVREF_LONG_F1 0x000a08a9U +#define _reg_PI_TDFI_CACSCA_F2 0x100508a9U +#define _reg_PI_TDFI_CASEL_F2 0x180508a9U +#define _reg_PI_TVREF_SHORT_F2 0x000a08aaU +#define _reg_PI_TVREF_LONG_F2 0x100a08aaU +#define _reg_PI_CALVL_VREF_INITIAL_START_POINT_F0 0x000708abU +#define _reg_PI_CALVL_VREF_INITIAL_STOP_POINT_F0 0x080708abU +#define _reg_PI_CALVL_VREF_INITIAL_START_POINT_F1 0x100708abU +#define _reg_PI_CALVL_VREF_INITIAL_STOP_POINT_F1 0x180708abU +#define _reg_PI_CALVL_VREF_INITIAL_START_POINT_F2 0x000708acU +#define _reg_PI_CALVL_VREF_INITIAL_STOP_POINT_F2 0x080708acU +#define _reg_PI_CALVL_VREF_DELTA_F0 0x100408acU +#define _reg_PI_CALVL_VREF_DELTA_F1 0x180408acU +#define _reg_PI_CALVL_VREF_DELTA_F2 0x000408adU +#define _reg_PI_TDFI_CALVL_STROBE_F0 0x080408adU +#define _reg_PI_TXP_F0 0x100508adU +#define _reg_PI_TMRWCKEL_F0 0x180808adU +#define _reg_PI_TCKELCK_F0 0x000508aeU +#define _reg_PI_TDFI_CALVL_STROBE_F1 0x080408aeU +#define _reg_PI_TXP_F1 0x100508aeU +#define _reg_PI_TMRWCKEL_F1 0x180808aeU +#define _reg_PI_TCKELCK_F1 0x000508afU +#define _reg_PI_TDFI_CALVL_STROBE_F2 0x080408afU +#define _reg_PI_TXP_F2 0x100508afU +#define _reg_PI_TMRWCKEL_F2 0x180808afU +#define _reg_PI_TCKELCK_F2 0x000508b0U +#define _reg_PI_TDFI_INIT_START_F0 0x080a08b0U +#define _reg_PI_TDFI_INIT_COMPLETE_F0 0x001008b1U +#define _reg_PI_TDFI_INIT_START_F1 0x100a08b1U +#define _reg_PI_TDFI_INIT_COMPLETE_F1 0x001008b2U +#define _reg_PI_TDFI_INIT_START_F2 0x100a08b2U +#define _reg_PI_TDFI_INIT_COMPLETE_F2 0x001008b3U +#define _reg_PI_TCKEHDQS_F0 0x100608b3U +#define _reg_PI_TFC_F0 0x000a08b4U +#define _reg_PI_TCKEHDQS_F1 0x100608b4U +#define _reg_PI_TFC_F1 0x000a08b5U +#define _reg_PI_TCKEHDQS_F2 0x100608b5U +#define _reg_PI_TFC_F2 0x000a08b6U +#define _reg_PI_TDFI_WDQLVL_WR_F0 0x100a08b6U +#define _reg_PI_TDFI_WDQLVL_RW_F0 0x000a08b7U +#define _reg_PI_WDQLVL_VREF_INITIAL_START_POINT_F0 0x100708b7U +#define _reg_PI_WDQLVL_VREF_INITIAL_STOP_POINT_F0 0x180708b7U +#define _reg_PI_WDQLVL_VREF_DELTA_F0 0x000408b8U +#define _reg_PI_WDQLVL_EN_F0 0x080208b8U +#define _reg_PI_NTP_TRAIN_EN_F0 0x100208b8U +#define _reg_PI_TDFI_WDQLVL_WR_F1 0x000a08b9U +#define _reg_PI_TDFI_WDQLVL_RW_F1 0x100a08b9U +#define _reg_PI_WDQLVL_VREF_INITIAL_START_POINT_F1 0x000708baU +#define _reg_PI_WDQLVL_VREF_INITIAL_STOP_POINT_F1 0x080708baU +#define _reg_PI_WDQLVL_VREF_DELTA_F1 0x100408baU +#define _reg_PI_WDQLVL_EN_F1 0x180208baU +#define _reg_PI_NTP_TRAIN_EN_F1 0x000208bbU +#define _reg_PI_TDFI_WDQLVL_WR_F2 0x080a08bbU +#define _reg_PI_TDFI_WDQLVL_RW_F2 0x000a08bcU +#define _reg_PI_WDQLVL_VREF_INITIAL_START_POINT_F2 0x100708bcU +#define _reg_PI_WDQLVL_VREF_INITIAL_STOP_POINT_F2 0x180708bcU +#define _reg_PI_WDQLVL_VREF_DELTA_F2 0x000408bdU +#define _reg_PI_WDQLVL_EN_F2 0x080208bdU +#define _reg_PI_NTP_TRAIN_EN_F2 0x100208bdU +#define _reg_PI_TRTP_F0 0x180808bdU +#define _reg_PI_TRP_F0 0x000808beU +#define _reg_PI_TRCD_F0 0x080808beU +#define _reg_PI_TWTR_F0 0x100608beU +#define _reg_PI_TWR_F0 0x180808beU +#define _reg_PI_TRAS_MAX_F0 0x001008bfU +#define _reg_PI_TRAS_MIN_F0 0x100808bfU +#define _reg_PI_TDQSCK_MAX_F0 0x180408bfU +#define _reg_PI_TCCDMW_F0 0x000608c0U +#define _reg_PI_TSR_F0 0x080808c0U +#define _reg_PI_TMRD_F0 0x100808c0U +#define _reg_PI_TMRW_F0 0x180808c0U +#define _reg_PI_TRTP_F1 0x000808c1U +#define _reg_PI_TRP_F1 0x080808c1U +#define _reg_PI_TRCD_F1 0x100808c1U +#define _reg_PI_TWTR_F1 0x180608c1U +#define _reg_PI_TWR_F1 0x000808c2U +#define _reg_PI_TRAS_MAX_F1 0x081008c2U +#define _reg_PI_TRAS_MIN_F1 0x180808c2U +#define _reg_PI_TDQSCK_MAX_F1 0x000408c3U +#define _reg_PI_TCCDMW_F1 0x080608c3U +#define _reg_PI_TSR_F1 0x100808c3U +#define _reg_PI_TMRD_F1 0x180808c3U +#define _reg_PI_TMRW_F1 0x000808c4U +#define _reg_PI_TRTP_F2 0x080808c4U +#define _reg_PI_TRP_F2 0x100808c4U +#define _reg_PI_TRCD_F2 0x180808c4U +#define _reg_PI_TWTR_F2 0x000608c5U +#define _reg_PI_TWR_F2 0x080808c5U +#define _reg_PI_TRAS_MAX_F2 0x101008c5U +#define _reg_PI_TRAS_MIN_F2 0x000808c6U +#define _reg_PI_TDQSCK_MAX_F2 0x080408c6U +#define _reg_PI_TCCDMW_F2 0x100608c6U +#define _reg_PI_TSR_F2 0x180808c6U +#define _reg_PI_TMRD_F2 0x000808c7U +#define _reg_PI_TMRW_F2 0x080808c7U +#define _reg_PI_TDFI_CTRLUPD_MAX_F0 0x001508c8U +#define _reg_PI_TDFI_CTRLUPD_INTERVAL_F0 0x002008c9U +#define _reg_PI_TDFI_CTRLUPD_MAX_F1 0x001508caU +#define _reg_PI_TDFI_CTRLUPD_INTERVAL_F1 0x002008cbU +#define _reg_PI_TDFI_CTRLUPD_MAX_F2 0x001508ccU +#define _reg_PI_TDFI_CTRLUPD_INTERVAL_F2 0x002008cdU +#define _reg_PI_TXSR_F0 0x001008ceU +#define _reg_PI_TXSR_F1 0x101008ceU +#define _reg_PI_TXSR_F2 0x001008cfU +#define _reg_PI_WDQ_OSC_DELTA_INDEX_F0 0x100408cfU +#define _reg_PI_WDQ_OSC_DELTA_INDEX_F1 0x180408cfU +#define _reg_PI_WDQ_OSC_DELTA_INDEX_F2 0x000408d0U +#define _reg_PI_MR13_DATA_0 0x080808d0U +#define _reg_PI_MR40_DATA_0 0x100808d0U +#define _reg_PI_MR13_DATA_1 0x180808d0U +#define _reg_PI_MR40_DATA_1 0x000808d1U +#define _reg_PI_DQS_OSC_BASE_VALUE_0_0 0x081008d1U +#define _reg_PI_DQS_OSC_BASE_VALUE_0_1 0x001008d2U +#define _reg_PI_MR1_DATA_F0_0 0x100808d2U +#define _reg_PI_MR2_DATA_F0_0 0x180808d2U +#define _reg_PI_MR3_DATA_F0_0 0x000808d3U +#define _reg_PI_MR11_DATA_F0_0 0x080808d3U +#define _reg_PI_MR12_DATA_F0_0 0x100808d3U +#define _reg_PI_MR14_DATA_F0_0 0x180808d3U +#define _reg_PI_MR22_DATA_F0_0 0x000808d4U +#define _reg_PI_MR23_DATA_F0_0 0x080808d4U +#define _reg_PI_MR1_DATA_F1_0 0x100808d4U +#define _reg_PI_MR2_DATA_F1_0 0x180808d4U +#define _reg_PI_MR3_DATA_F1_0 0x000808d5U +#define _reg_PI_MR11_DATA_F1_0 0x080808d5U +#define _reg_PI_MR12_DATA_F1_0 0x100808d5U +#define _reg_PI_MR14_DATA_F1_0 0x180808d5U +#define _reg_PI_MR22_DATA_F1_0 0x000808d6U +#define _reg_PI_MR23_DATA_F1_0 0x080808d6U +#define _reg_PI_MR1_DATA_F2_0 0x100808d6U +#define _reg_PI_MR2_DATA_F2_0 0x180808d6U +#define _reg_PI_MR3_DATA_F2_0 0x000808d7U +#define _reg_PI_MR11_DATA_F2_0 0x080808d7U +#define _reg_PI_MR12_DATA_F2_0 0x100808d7U +#define _reg_PI_MR14_DATA_F2_0 0x180808d7U +#define _reg_PI_MR22_DATA_F2_0 0x000808d8U +#define _reg_PI_MR23_DATA_F2_0 0x080808d8U +#define _reg_PI_MR1_DATA_F0_1 0x100808d8U +#define _reg_PI_MR2_DATA_F0_1 0x180808d8U +#define _reg_PI_MR3_DATA_F0_1 0x000808d9U +#define _reg_PI_MR11_DATA_F0_1 0x080808d9U +#define _reg_PI_MR12_DATA_F0_1 0x100808d9U +#define _reg_PI_MR14_DATA_F0_1 0x180808d9U +#define _reg_PI_MR22_DATA_F0_1 0x000808daU +#define _reg_PI_MR23_DATA_F0_1 0x080808daU +#define _reg_PI_MR1_DATA_F1_1 0x100808daU +#define _reg_PI_MR2_DATA_F1_1 0x180808daU +#define _reg_PI_MR3_DATA_F1_1 0x000808dbU +#define _reg_PI_MR11_DATA_F1_1 0x080808dbU +#define _reg_PI_MR12_DATA_F1_1 0x100808dbU +#define _reg_PI_MR14_DATA_F1_1 0x180808dbU +#define _reg_PI_MR22_DATA_F1_1 0x000808dcU +#define _reg_PI_MR23_DATA_F1_1 0x080808dcU +#define _reg_PI_MR1_DATA_F2_1 0x100808dcU +#define _reg_PI_MR2_DATA_F2_1 0x180808dcU +#define _reg_PI_MR3_DATA_F2_1 0x000808ddU +#define _reg_PI_MR11_DATA_F2_1 0x080808ddU +#define _reg_PI_MR12_DATA_F2_1 0x100808ddU +#define _reg_PI_MR14_DATA_F2_1 0x180808ddU +#define _reg_PI_MR22_DATA_F2_1 0x000808deU +#define _reg_PI_MR23_DATA_F2_1 0x080808deU +#define _reg_PI_PARITY_ERROR_REGIF 0x100b08deU + +#define DDR_REGDEF_ADR(regdef) ((regdef)&0xffff) +#define DDR_REGDEF_LEN(regdef) (((regdef)>>16)&0xff) +#define DDR_REGDEF_LSB(regdef) (((regdef)>>24)&0xff) + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c new file mode 100644 index 00000000..055e5685 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.c @@ -0,0 +1,354 @@ +/******************************************************************************* + * Copyright (c) 2022-2023 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECC setting function + ******************************************************************************/ +/****************************************************************************** + * @file ecc_enable_s4.c + * - Version : 0.02 + * @brief Enable setting process of ECC for DRAM. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 09.08.2022 0.01 First Release + * : 04.04.2023 0.02 Removed stdio.h and string.h. + *****************************************************************************/ + + +#include + +static void ecm_unlock(void); +static void ecm_write(uint32_t adr, uint32_t val); +static void ecm_lock(void); + +#include "boot_init_dram_regdef.h" +#include "ecc_enable_s4.h" + +static void ecm_unlock(void) +{ + uint32_t tmp_adr; + tmp_adr = ((0xACCEU << 16U) | (ECMWPCNTR & 0xffffU)); + mem_write32(ECMWACNTR, tmp_adr); + mem_write32(ECMWPCNTR, 0xACCE0001); +} + +static void ecm_write(uint32_t adr, uint32_t val) +{ + mem_write32(ECMWACNTR, ((0xACCEU << 16U) | (adr & 0xffffU))); + mem_write32(adr, val); +} + +static void ecm_lock(void) +{ + mem_write32(ECMWACNTR, ((0xACCEU << 16U) | (ECMWACNTR & 0xffffU))); + mem_write32(ECMWPCNTR, 0xACCE0000U); +} + +void enable_ecc(void) +{ + NOTICE("ECC for DRAM is enable.\n"); + uint32_t ecm_tmp; + + /* Unlock the access protect for DBSC registers */ + mem_write32(DBSC_DBSYSCNT0, 0x00001234U); + mem_write32(DBSC_DBSYSCNT0A, 0x00001234U); + + /* (A) Initialization for DRAM */ + mmio_write_32(DBSC_DBACEN, 0x00000000U); + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + /* (1) Set the corresponding bits of the ECMERRTGTR, ECMERRCTLR and ECMERRFATALR registers to inform + the control domain of the fatal error. */ + ecm_tmp = mem_read32(ECMERRTGTR0); + ecm_tmp &= ~(0x3U); + ecm_write(ECMERRTGTR0, ecm_tmp); + + ecm_tmp = mem_read32(ECMERRCTLR0); + ecm_tmp |= 0x3U; + ecm_write(ECMERRCTLR0, ecm_tmp); + + ecm_tmp = mem_read32(ECMERRFATALR0); + ecm_tmp |= 0x3U; + ecm_write(ECMERRFATALR0, ecm_tmp); + + /* (B) Setting ECC protection area */ + /* Set the bottom row address of the ECC protection area */ + mem_write32(DBFSDRAMECCAREA00, ECC_PROT_SIZE0); + mem_write32(DBFSDRAMECCAREA01, ECC_PROT_SIZE1); + + /* (2) Initialization for DRAM connected to DBSCCORE */ + /* Specify RANK0 as the initialization target */ + ecm_tmp = mem_read32(DBFSCONF00A); + ecm_tmp = 0x0U; + mem_write32(DBFSCONF00A, ecm_tmp); + + /* Set the start and end row address of the initialization area */ + mem_write32(DBFSCONF01A, START_ECC_INIT_AREA0); + mem_write32(DBFSCONF05A, END_ECC_INIT_AREA0); + + /* Set 0x1 to start initialization */ + ecm_tmp = mem_read32(DBFSCTRL01A); + ecm_tmp |= 0x01U; + mem_write32(DBFSCTRL01A, ecm_tmp); + + /* Wait until to DRAM initialization is complete */ + NOTICE("DRAM rank 0 is initializing.......\n"); + do + { + ecm_tmp = mem_read32(DBFSSTAT01A); + } while ((ecm_tmp & 0x01U) != 0x01U); + + /* If DRAM is connected to RANK1, Initialize RANK1 */ + /* Specify RANK0 as the initialization target */ + ecm_tmp = mem_read32(DBFSCONF00A); + ecm_tmp |= 0x1U; + mem_write32(DBFSCONF00A, ecm_tmp); + + /* Set the start and end row address of the initialization area */ + mem_write32(DBFSCONF01A, START_ECC_INIT_AREA1); + mem_write32(DBFSCONF05A, END_ECC_INIT_AREA1); + + /* Set 0x1 to start initialization */ + ecm_tmp = mem_read32(DBFSCTRL01A); + ecm_tmp |= 0x01U; + mem_write32(DBFSCTRL01A, ecm_tmp); + + /* Wait until to DRAM initialization is complete */ + NOTICE("DRAM rank 1 is initializing.......\n"); + do + { + ecm_tmp = mem_read32(DBFSSTAT01A); + } while ((ecm_tmp & 0x01U) != 0x01U); + + /* (C) Setting ECC protection enable */ + ecm_tmp = mem_read32(DBFSCONFAXI0); + ecm_tmp |= (0x3 << 8U); + mem_write32(DBFSCONFAXI0, ecm_tmp); + + /* (D) System RAM initialization */ + /* Wait for initialization of System RAM */ + NOTICE("System RAM is initializing.......\n"); + do + { + ; + } while ((mem_read32(DBFSSTAT00A) & 0x1U) != 0x1U); + + /* (E) Setting for ECC error interrupt */ + /* (1) Set the ECC error interrupt for read data. */ + mem_write32(DBFSINTENB02A, 0xFF00U); + + /* (2) Set the ECC error interrupt during RMW operation for System RAM. */ + ecm_tmp = mem_read32(DBFSINTENB02A); + ecm_tmp |= (0xFFU << 24U); + mem_write32(DBFSINTENB02A, ecm_tmp); + + /* (3) Set the ECC error interrupt during RMW operation for DRAM. */ + mem_write32(DBFSINTENB04A, 0xFFFFU); + + /* Lock the ECM registers */ + ecm_lock(); + + /* Enable the write protect of ECM registers */ + mmio_write_32(DBSC_DBACEN, 0x00000001U); + + /* Enable the access protect for DBSC registers */ + mem_write32(DBSC_DBSYSCNT0, 0x00000000U); + mem_write32(DBSC_DBSYSCNT0A, 0x00000000U); +} + +void ecc_rtsram_enable(void) +{ + uint32_t ecc_tmp; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + /* (1) Set the corresponding bits of the ECMERRTGTR, ECMERRCTLR and + ECMERRFATALR registers to inform the control domain of the fatal error. */ + + /* Set bit 29 of ECMERRTGTR7 to 0 and bit 29 of ECMERRCTLR7 to 1. + (RT-SRAM ecc 2-bit error) */ + ecc_tmp = mem_read32(ECMERRTGTR7); + ecc_tmp |= (1U << 29U) ; + ecm_write(ECMERRTGTR7, ecc_tmp); + + ecc_tmp = mem_read32(ECMERRCTLR7); + ecc_tmp |= (1U << 29U); + ecm_write(ECMERRCTLR7, ecc_tmp); + + /* Set bit 19 of ECMERRTGTR7 to 0 and bit 19 of ECMERRCTLR7 to 1. + (RT-SRAM ecc 2-bit error (for ICUMX)) */ + ecc_tmp = mem_read32(ECMERRTGTR7); + ecc_tmp |= (1U << 19U); + ecm_write(ECMERRTGTR7, ecc_tmp); + + ecc_tmp = mem_read32(ECMERRCTLR7); + ecc_tmp |= (1U << 19U); + ecm_write(ECMERRCTLR7, ecc_tmp); + + /* Set bit 29 and 19 of ECMERRFATALR7 to 1. (Notification of fatal error) */ + ecc_tmp = mem_read32(ECMERRFATALR7); + ecc_tmp |= ((1U << 29U) | (1U << 19U)); + ecm_write(ECMERRFATALR7, ecc_tmp); + + /* (2) Set the corresponding bits of the ECMERRTGTR and ECMERRCTLR registers to + notify the correctable error to software. */ + + /* Set bit 30 of ECMERRTGTR7 to 1 and bit 30 of ECMERRCTLR7 to 1. + (RT-SRAM ecc 1-bit error) */ + ecc_tmp = mem_read32(ECMERRTGTR7); + ecc_tmp |= (1U << 30U); + ecm_write(ECMERRTGTR7, ecc_tmp); + + ecc_tmp = mem_read32(ECMERRCTLR7); + ecc_tmp |= (1U << 30U); + ecm_write(ECMERRCTLR7, ecc_tmp); + + /* Set bit 20 of ECMERRTGTR7 to 1 and bit 20 of ECMERRCTLR7 to 1. + (RT-SRAM ecc 1-bit error (for ICUMX)) */ + ecc_tmp = mem_read32(ECMERRTGTR7); + ecc_tmp |= (1U << 20U); + ecm_write(ECMERRTGTR7, ecc_tmp); + + ecc_tmp = mem_read32(ECMERRCTLR7); + ecc_tmp |= (1U << 20U); + ecm_write(ECMERRCTLR7, ecc_tmp); + + /* Lock the ECM registers */ + ecm_lock(); +} + +void edc_axi_enable(void) +{ + uint32_t edc_tmp; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + /* (1) Set the corresponding bits of the ECMERRTGTR, ECMERRCTLR + and ECMERRFATALR registers to inform the control domain of the fatal error. */ + + /* Set bit 10 - bit 6 of ECMERRTGTR7 to all 0 and bit 10 - bit 6 of + ECMERRCTLR7 to 1. (Error of AXI-Bus ECM of each hierarchy) */ + edc_tmp = mem_read32(ECMERRTGTR7); + edc_tmp &= ~(0x1fU << 6U); + ecm_write(ECMERRTGTR7, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR7); + edc_tmp |= (0x1fU << 6U); + ecm_write(ECMERRCTLR7, edc_tmp); + + /* Set bit 23 - bit 16 of ECMERRTGTR39 to all 0 and bit 23 - bit 16 of + ECMERRCTLR39 to 1. (Error of AXI-Bus ECM of each hierarchy) */ + edc_tmp = mem_read32(ECMERRTGTR39); + edc_tmp &= ~(0xffU << 16U); + ecm_write(ECMERRTGTR39, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR39); + edc_tmp |= (0xffU << 6U); + ecm_write(ECMERRCTLR39, edc_tmp); + + /* Set bit 26 of ECMERRTGTR1 to 0 and bit 26 of + ECMERRCTLR1 to 1. (CCI bus EDC error) */ + edc_tmp = mem_read32(ECMERRTGTR1); + edc_tmp &= ~(0x1U << 26U); + ecm_write(ECMERRTGTR1, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR1); + edc_tmp |= (0x1U << 26U); + ecm_write(ECMERRCTLR1, edc_tmp); + + /* Set bit 10 - bit 6 of ECMERRFATALR7 to 1. + (Notification of fatal error) */ + edc_tmp = mem_read32(ECMERRFATALR7); + edc_tmp |= (0x1fU << 6U); + ecm_write(ECMERRFATALR7, edc_tmp); + + /* Set bit 23 - bit 16 of ECMERRFATALR39 to 1. + (Notification of fatal error) */ + edc_tmp = mem_read32(ECMERRFATALR39); + edc_tmp |= (0xffU << 16U); + ecm_write(ECMERRFATALR39, edc_tmp); + + /* Set bit 26 of ECMERRFATALR1 to 1. + (Notification of fatal error) */ + edc_tmp = mem_read32(ECMERRFATALR1); + edc_tmp |= (0x1U << 26U); + ecm_write(ECMERRFATALR1, edc_tmp); + + /* Lock the ECM registers */ + ecm_lock(); +} + +void edc_vram_enable(void) +{ + uint32_t edc_tmp; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + /* (1) Set the corresponding bits of the ECMERRTGTR, ECMERRCTLR and + ECMERRFATALR registers to inform the control domain of the fatal error. */ + + /* Set bit 19 of ECMERRTGTR17 to 0 and bit 19 of ECMERRCTLR17 to 1. + (RT-VRAM edc 1-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR17); + edc_tmp &= ~(0x1U << 19U); + ecm_write(ECMERRTGTR17, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR17); + edc_tmp |= (0x1U << 19U); + ecm_write(ECMERRCTLR17, edc_tmp); + + /* Set bit 18 of ECMERRTGTR17 to 0 and bit 18 of ECMERRCTLR17 to 1. + (RT-VRAM edc multi-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR17); + edc_tmp &= ~(0x1U << 18U); + ecm_write(ECMERRTGTR17, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR17); + edc_tmp |= (0x1U << 18U); + ecm_write(ECMERRCTLR17, edc_tmp); + + /* Set bit 19, 18 of ECMERRFATALR17 to 1. (Notification of fatal error) */ + edc_tmp = mem_read32(ECMERRFATALR17); + edc_tmp |= (0x3U << 18U); + ecm_write(ECMERRFATALR17, edc_tmp); + + /* Set bit 0 of EDC_CFG to 1. (EDC Error Control) */ + edc_tmp = mem_read32(EDC_CFG); + edc_tmp |= (0x1U << 0U); + ecm_write(EDC_CFG, edc_tmp); + + /* Lock the ECM registers */ + ecm_lock(); +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h new file mode 100644 index 00000000..2bbf663e --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/ecc_enable_s4.h @@ -0,0 +1,104 @@ +/******************************************************************************* + * Copyright (c) 2022 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECC driver header + ******************************************************************************/ + +#ifndef ECC_PROTECT +#define ECC_PROTECT +#include "remap_register.h" +#if(__RH850__) + #include "mem_io.h" + #include "log.h" + #define ECM_BASE (BASE_ECC_ADDR) + #define DBSC_BASE (BASE_DBSC_ADDR) +#else + #include + #include + #define ECM_BASE (0xE6250000U) + #define DBSC_BASE (0xE6790000U) +#endif/* __RH850__ */ + +#define RTVRAM_REG_BASE (0xFFEC0000U) + +void enable_ecc(void); +void ecc_rtsram_enable(void); +void edc_axi_enable(void); +void edc_vram_enable(void); + +#define DBSC_DBACEN (DBSC_BASE + 0x0200U) + +#define ECMWACNTR (ECM_BASE + 0x0A04U) +#define ECMWPCNTR (ECM_BASE + 0x0A00U) +#define ECMERRTGTR0 (ECM_BASE + 0x0200U) +#define ECMERRCTLR0 (ECM_BASE + 0x0000U) +#define ECMERRTGTR1 (ECM_BASE + 0x0200U + 0x4U * 1U) +#define ECMERRCTLR1 (ECM_BASE + 0x0000U + 0x4U * 1U) +#define ECMERRTGTR7 (ECM_BASE + 0x0200U + 0x4U * 7U) +#define ECMERRCTLR7 (ECM_BASE + 0x0000U + 0x4U * 7U) +#define ECMERRTGTR17 (ECM_BASE + 0x0200U + 0x4U * 17U) +#define ECMERRCTLR17 (ECM_BASE + 0x0000U + 0x4U * 17U) +#define ECMERRTGTR39 (ECM_BASE + 0x0200U + 0x4U * 39U) +#define ECMERRCTLR39 (ECM_BASE + 0x0000U + 0x4U * 39U) +#define ECMERRFATALR0 (ECM_BASE + 0x0600U) +#define ECMERRFATALR1 (ECM_BASE + 0x0600U + 0x4U * 1U) +#define ECMERRFATALR7 (ECM_BASE + 0x0600U + 0x4U * 7U) +#define ECMERRFATALR17 (ECM_BASE + 0x0600U + 0x4U * 17U) +#define ECMERRFATALR39 (ECM_BASE + 0x0600U + 0x4U * 39U) + +#define DBFSCONF00A (DBSC_BASE + 0x7640U) +#define DBFSCONF01A (DBSC_BASE + 0x7644U) +#define DBFSCONF05A (DBSC_BASE + 0x7654U) +#define DBFSCTRL01A (DBSC_BASE + 0x7604U) +#define DBFSSTAT01A (DBSC_BASE + 0x7684U) +#define DBFSSTAT00A (DBSC_BASE + 0x7680U) +#define DBFSINTENB02A (DBSC_BASE + 0x7088U) +#define DBFSINTENB04A (DBSC_BASE + 0x7090U) + +#define DBFSDRAMECCAREA00 (DBSC_BASE + 0x7450U) +#define DBFSDRAMECCAREA01 (DBSC_BASE + 0x7454U) +#define DBFSCONFAXI0 (DBSC_BASE + 0x7400U) + +#define EDC_CFG (RTVRAM_REG_BASE + 0x4110U) + +/********************* Set by the user *********************/ +/* The row address of ECC Protection Area Size for memory rank 0/1 */ +#define ECC_PROT_SIZE0 (0x2000U) +#define ECC_PROT_SIZE1 (0x2000U) + +/* Start and End row address of ECC Protection area for rank0 */ +#define START_ECC_INIT_AREA0 (0x00000000U) +#define END_ECC_INIT_AREA0 (0x00001FFFU) + +/* Start and End row address of ECC Protection area for rank1 */ +#define START_ECC_INIT_AREA1 (0x00000000U) +#define END_ECC_INIT_AREA1 (0x00001FFFU) +/*********** Other settings cannot be changed ***************/ + +#endif/* ECC_PROTECT */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h new file mode 100644 index 00000000..599ceedf --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/s4/lpddr4x/init_dram_tbl_s4.h @@ -0,0 +1,615 @@ +/******************************************************************************* + * Copyright (c) 2021-2022 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +#define DDR_PHY_SLICE_REGSET_OFS_S4 0x1000 +#define DDR_PHY_ADR_V_REGSET_OFS_S4 0x1200 +#define DDR_PHY_ADR_G_REGSET_OFS_S4 0x1300 +#define DDR_PI_REGSET_OFS_S4 0x0800 + +#define DDR_PHY_SLICE_REGSET_SIZE_S4 0x100 +#define DDR_PHY_ADR_V_REGSET_SIZE_S4 0x80 +#define DDR_PHY_ADR_G_REGSET_SIZE_S4 0x100 +#define DDR_PI_REGSET_SIZE_S4 0x100 + +#define DDR_PHY_SLICE_REGSET_NUM_S4 140 +#define DDR_PHY_ADR_V_REGSET_NUM_S4 54 +#define DDR_PHY_ADR_G_REGSET_NUM_S4 143 +#define DDR_PI_REGSET_NUM_S4 223 + +static const uint32_t DDR_PHY_SLICE_REGSET_S4[DDR_PHY_SLICE_REGSET_NUM_S4] = { +/*1000*/ 0x000004F0, +/*1001*/ 0x00000000, +/*1002*/ 0x00030200, +/*1003*/ 0x00000000, +/*1004*/ 0x00000000, +/*1005*/ 0x01030000, +/*1006*/ 0x00010000, +/*1007*/ 0x01030004, +/*1008*/ 0x00000000, +/*1009*/ 0x00000000, +/*100a*/ 0x00000000, +/*100b*/ 0x01000001, +/*100c*/ 0x00000200, +/*100d*/ 0x000800C0, +/*100e*/ 0x06010190, +/*100f*/ 0x00030030, +/*1010*/ 0x00000000, +/*1011*/ 0x00000000, +/*1012*/ 0x55555A3C, +/*1013*/ 0x00005555, +/*1014*/ 0x0000B5B5, +/*1015*/ 0x00004A4A, +/*1016*/ 0x00005656, +/*1017*/ 0x0000A9A9, +/*1018*/ 0x0000A9A9, +/*1019*/ 0x0000B5B5, +/*101a*/ 0x00000000, +/*101b*/ 0x00000000, +/*101c*/ 0x2A000000, +/*101d*/ 0x00000808, +/*101e*/ 0x04000000, +/*101f*/ 0x00000408, +/*1020*/ 0x10600000, +/*1021*/ 0x0C008006, +/*1022*/ 0x00000000, +/*1023*/ 0x00000000, +/*1024*/ 0x55AA55AA, +/*1025*/ 0x33CC33CC, +/*1026*/ 0x0FF00FF0, +/*1027*/ 0x0F0FF0F0, +/*1028*/ 0x00008E38, +/*1029*/ 0x01000100, +/*102a*/ 0x00800180, +/*102b*/ 0x00000001, +/*102c*/ 0x00000000, +/*102d*/ 0x00000000, +/*102e*/ 0x00000000, +/*102f*/ 0x00000000, +/*1030*/ 0x00000000, +/*1031*/ 0x00000000, +/*1032*/ 0x00000000, +/*1033*/ 0x00000000, +/*1034*/ 0x00000000, +/*1035*/ 0x00000000, +/*1036*/ 0x00000000, +/*1037*/ 0x00000000, +/*1038*/ 0x00000000, +/*1039*/ 0x00000000, +/*103a*/ 0x00000000, +/*103b*/ 0x00000000, +/*103c*/ 0x00000000, +/*103d*/ 0x00000000, +/*103e*/ 0x00000000, +/*103f*/ 0x00000000, +/*1040*/ 0x00000000, +/*1041*/ 0x00000000, +/*1042*/ 0x00000104, +/*1043*/ 0x00000120, +/*1044*/ 0x00000000, +/*1045*/ 0x00000000, +/*1046*/ 0x00000000, +/*1047*/ 0x00000000, +/*1048*/ 0x00000000, +/*1049*/ 0x00000000, +/*104a*/ 0x00000000, +/*104b*/ 0x00000000, +/*104c*/ 0x07FF0000, +/*104d*/ 0x00800800, +/*104e*/ 0x00081020, +/*104f*/ 0x04010000, +/*1050*/ 0x00000000, +/*1051*/ 0x00000000, +/*1052*/ 0x00000000, +/*1053*/ 0x00000000, +/*1054*/ 0x01CC0C01, +/*1055*/ 0x2003CC0C, +/*1056*/ 0x20000139, +/*1057*/ 0x07FF0200, +/*1058*/ 0x0100DD01, +/*1059*/ 0x00000103, +/*105a*/ 0x00000000, +/*105b*/ 0x00000000, +/*105c*/ 0x00060000, +/*105d*/ 0x00A000A0, +/*105e*/ 0x00A000A0, +/*105f*/ 0x00A000A0, +/*1060*/ 0x00A000A0, +/*1061*/ 0x000500A0, +/*1062*/ 0x51517042, +/*1063*/ 0x31C08000, +/*1064*/ 0x09AD0064, +/*1065*/ 0x00C0C001, +/*1066*/ 0x0E0C0101, +/*1067*/ 0x10001000, +/*1068*/ 0x0C073E42, +/*1069*/ 0x0F0C3708, +/*106a*/ 0x01C00190, +/*106b*/ 0x04000420, +/*106c*/ 0x00000322, +/*106d*/ 0x0A0000D0, +/*106e*/ 0x00030200, +/*106f*/ 0x02800000, +/*1070*/ 0x80800000, +/*1071*/ 0x000E0010, +/*1072*/ 0x76543210, +/*1073*/ 0x00000008, +/*1074*/ 0x02800280, +/*1075*/ 0x02800280, +/*1076*/ 0x02800280, +/*1077*/ 0x02800280, +/*1078*/ 0x00000280, +/*1079*/ 0x0000A000, +/*107a*/ 0x00A000A0, +/*107b*/ 0x00A000A0, +/*107c*/ 0x00A000A0, +/*107d*/ 0x00A000A0, +/*107e*/ 0x00A000A0, +/*107f*/ 0x00A000A0, +/*1080*/ 0x00A000A0, +/*1081*/ 0x00A000A0, +/*1082*/ 0x01C200A0, +/*1083*/ 0x01A00005, +/*1084*/ 0x00000000, +/*1085*/ 0x00000000, +/*1086*/ 0x00080200, +/*1087*/ 0x00000000, +/*1088*/ 0x20202020, +/*1089*/ 0x20202020, +/*108a*/ 0x01012020, +/*108b*/ 0x00000000 +}; + +static const uint32_t DDR_PHY_ADR_V_REGSET_S4[DDR_PHY_ADR_V_REGSET_NUM_S4] = { +/*1200*/ 0x00000000, +/*1201*/ 0x00000000, +/*1202*/ 0x00000000, +/*1203*/ 0x00000000, +/*1204*/ 0x00000000, +/*1205*/ 0x00000100, +/*1206*/ 0x00000200, +/*1207*/ 0x00000000, +/*1208*/ 0x00000000, +/*1209*/ 0x00000000, +/*120a*/ 0x00000000, +/*120b*/ 0x00800200, +/*120c*/ 0x00000080, +/*120d*/ 0x00DCBA98, +/*120e*/ 0x01000000, +/*120f*/ 0x00200003, +/*1210*/ 0x00000000, +/*1211*/ 0x00000000, +/*1212*/ 0x00000000, +/*1213*/ 0x00000000, +/*1214*/ 0x00000000, +/*1215*/ 0x00000000, +/*1216*/ 0x00000000, +/*1217*/ 0x0000002A, +/*1218*/ 0x00000015, +/*1219*/ 0x00000015, +/*121a*/ 0x0000002A, +/*121b*/ 0x00000033, +/*121c*/ 0x0000000C, +/*121d*/ 0x0000000C, +/*121e*/ 0x00000033, +/*121f*/ 0x00543210, +/*1220*/ 0x003F0000, +/*1221*/ 0x0000013F, +/*1222*/ 0x20202003, +/*1223*/ 0x00202020, +/*1224*/ 0x20008008, +/*1225*/ 0x00000810, +/*1226*/ 0x00000F00, +/*1227*/ 0x00000000, +/*1228*/ 0x00000000, +/*1229*/ 0x00000000, +/*122a*/ 0x000605CC, +/*122b*/ 0x00030000, +/*122c*/ 0x00000300, +/*122d*/ 0x00000300, +/*122e*/ 0x00000300, +/*122f*/ 0x00000300, +/*1230*/ 0x00000300, +/*1231*/ 0x42080010, +/*1232*/ 0x0000803E, +/*1233*/ 0x00000008, +/*1234*/ 0x01000001, +/*1235*/ 0x00008000 +}; + +static const uint32_t DDR_PHY_ADR_G_REGSET_S4[DDR_PHY_ADR_G_REGSET_NUM_S4] = { +/*1300*/ 0x00000000, +/*1301*/ 0x00000100, +/*1302*/ 0x00000000, +/*1303*/ 0x00000000, +/*1304*/ 0x00050000, +/*1305*/ 0x04000000, +/*1306*/ 0x00000020, +/*1307*/ 0x00000000, +/*1308*/ 0x00000000, +/*1309*/ 0x00000000, +/*130a*/ 0x00000000, +/*130b*/ 0x00002001, +/*130c*/ 0x00004003, +/*130d*/ 0x00010028, +/*130e*/ 0x01010100, +/*130f*/ 0x00800800, +/*1310*/ 0x08102000, +/*1311*/ 0x00000000, +/*1312*/ 0x00000000, +/*1313*/ 0x00010E06, +/*1314*/ 0x00000000, +/*1315*/ 0x00000000, +/*1316*/ 0x00000000, +/*1317*/ 0x00000000, +/*1318*/ 0x00040000, +/*1319*/ 0x00000000, +/*131a*/ 0x00000000, +/*131b*/ 0x00000064, +/*131c*/ 0x00000000, +/*131d*/ 0x00000100, +/*131e*/ 0x00000200, +/*131f*/ 0x80012000, +/*1320*/ 0x00041B42, +/*1321*/ 0x05000000, +/*1322*/ 0x00000000, +/*1323*/ 0x00000000, +/*1324*/ 0x00000000, +/*1325*/ 0x01000000, +/*1326*/ 0x01070501, +/*1327*/ 0x00000054, +/*1328*/ 0x00004410, +/*1329*/ 0x00004410, +/*132a*/ 0x00004410, +/*132b*/ 0x00004410, +/*132c*/ 0x00004410, +/*132d*/ 0x00004410, +/*132e*/ 0x00004410, +/*132f*/ 0x00004410, +/*1330*/ 0x00004410, +/*1331*/ 0x00000000, +/*1332*/ 0x00000000, +/*1333*/ 0x00000000, +/*1334*/ 0x00060000, +/*1335*/ 0x00000000, +/*1336*/ 0x00000090, +/*1337*/ 0x0000A25A, +/*1338*/ 0x00000008, +/*1339*/ 0x00000000, +/*133a*/ 0x00000000, +/*133b*/ 0x00000000, +/*133c*/ 0x00000000, +/*133d*/ 0x00000000, +/*133e*/ 0x03000000, +/*133f*/ 0x00000000, +/*1340*/ 0x00000000, +/*1341*/ 0x00000000, +/*1342*/ 0x04102000, +/*1343*/ 0x00041020, +/*1344*/ 0x00C98C98, +/*1345*/ 0x3F400000, +/*1346*/ 0x3F3F1F3F, +/*1347*/ 0x0000001F, +/*1348*/ 0x00000000, +/*1349*/ 0x00000000, +/*134a*/ 0x00000000, +/*134b*/ 0x00010000, +/*134c*/ 0x00000000, +/*134d*/ 0x00000000, +/*134e*/ 0x00000000, +/*134f*/ 0x00000100, +/*1350*/ 0x00000000, +/*1351*/ 0x00000000, +/*1352*/ 0x00040700, +/*1353*/ 0x00000000, +/*1354*/ 0x00000000, +/*1355*/ 0x00000000, +/*1356*/ 0x00000002, +/*1357*/ 0x00000100, +/*1358*/ 0x00000000, +/*1359*/ 0x00000000, +/*135a*/ 0x00001F00, +/*135b*/ 0x00000000, +/*135c*/ 0x00000000, +/*135d*/ 0x00080000, +/*135e*/ 0x000007FF, +/*135f*/ 0x00000000, +/*1360*/ 0x00000000, +/*1361*/ 0x00000000, +/*1362*/ 0x00000000, +/*1363*/ 0x00000000, +/*1364*/ 0x000FFFFF, +/*1365*/ 0x000FFFFF, +/*1366*/ 0x0000FFFF, +/*1367*/ 0xFFFFFFF0, +/*1368*/ 0x030FFFFF, +/*1369*/ 0x01FFFFFF, +/*136a*/ 0x0000FFFF, +/*136b*/ 0x00000000, +/*136c*/ 0x00000000, +/*136d*/ 0x00000000, +/*136e*/ 0x00000000, +/*136f*/ 0x00000000, +/*1370*/ 0x00000006, +/*1371*/ 0x00000000, +/*1372*/ 0x00001142, +/*1373*/ 0x08010600, +/*1374*/ 0x00000080, +/*1375*/ 0x03000300, +/*1376*/ 0x03000300, +/*1377*/ 0x00000300, +/*1378*/ 0x00000300, +/*1379*/ 0x00000300, +/*137a*/ 0x00000300, +/*137b*/ 0x00000005, +/*137c*/ 0x0004BFCC, +/*137d*/ 0x0000010C, +/*137e*/ 0x0000027F, +/*137f*/ 0x00000000, +/*1380*/ 0x0000027F, +/*1381*/ 0x00000000, +/*1382*/ 0x00127F00, +/*1383*/ 0x0089FF00, +/*1384*/ 0x00827FCC, +/*1385*/ 0x00000000, +/*1386*/ 0x00127F80, +/*1387*/ 0x01980000, +/*1388*/ 0x00127F80, +/*1389*/ 0x01980000, +/*138a*/ 0x00127F00, +/*138b*/ 0x01980000, +/*138c*/ 0x00127F00, +/*138d*/ 0x01980000, +/*138e*/ 0x20040006 +}; + +static const uint32_t DDR_PI_REGSET_S4[DDR_PI_REGSET_NUM_S4] = { +/*0800*/ 0x00000B00, +/*0801*/ 0x00000000, +/*0802*/ 0x00000000, +/*0803*/ 0x00000101, +/*0804*/ 0x00640000, +/*0805*/ 0x00000001, +/*0806*/ 0x00000000, +/*0807*/ 0x00000000, +/*0808*/ 0x00000000, +/*0809*/ 0x00000000, +/*080a*/ 0x00000003, +/*080b*/ 0x00010100, +/*080c*/ 0x08000003, +/*080d*/ 0x00000103, +/*080e*/ 0x00000000, +/*080f*/ 0x00000000, +/*0810*/ 0x00000000, +/*0811*/ 0x00000000, +/*0812*/ 0x00000000, +/*0813*/ 0x00000000, +/*0814*/ 0x0A000000, +/*0815*/ 0x00000028, +/*0816*/ 0x00000100, +/*0817*/ 0x00320003, +/*0818*/ 0x00000000, +/*0819*/ 0x00000000, +/*081a*/ 0x01010102, +/*081b*/ 0x00000000, +/*081c*/ 0x55555A3C, +/*081d*/ 0x00000055, +/*081e*/ 0x000000B5, +/*081f*/ 0x0000004A, +/*0820*/ 0x00000056, +/*0821*/ 0x000000A9, +/*0822*/ 0x000000A9, +/*0823*/ 0x000000B5, +/*0824*/ 0x01000000, +/*0825*/ 0x00010000, +/*0826*/ 0x00030300, +/*0827*/ 0x0000001A, +/*0828*/ 0x000007D0, +/*0829*/ 0x00000300, +/*082a*/ 0x00000000, +/*082b*/ 0x00000000, +/*082c*/ 0x01080000, +/*082d*/ 0x00010101, +/*082e*/ 0x00000000, +/*082f*/ 0x00030000, +/*0830*/ 0x03000100, +/*0831*/ 0x00000017, +/*0832*/ 0x00000000, +/*0833*/ 0x00000000, +/*0834*/ 0x00000000, +/*0835*/ 0x0A0A140A, +/*0836*/ 0x10020300, +/*0837*/ 0x00020805, +/*0838*/ 0x00000404, +/*0839*/ 0x00000000, +/*083a*/ 0x00000000, +/*083b*/ 0x01000101, +/*083c*/ 0x00020203, +/*083d*/ 0x00340000, +/*083e*/ 0x00000000, +/*083f*/ 0x00000000, +/*0840*/ 0x01000000, +/*0841*/ 0x00000000, +/*0842*/ 0x00000800, +/*0843*/ 0x00020002, +/*0844*/ 0x00010001, +/*0845*/ 0x00010000, +/*0846*/ 0x00020002, +/*0847*/ 0x00000002, +/*0848*/ 0x00000000, +/*0849*/ 0x00000000, +/*084a*/ 0x00000000, +/*084b*/ 0x00000000, +/*084c*/ 0x00000000, +/*084d*/ 0x00000000, +/*084e*/ 0x00000000, +/*084f*/ 0x00000000, +/*0850*/ 0x00100400, +/*0851*/ 0x08010100, +/*0852*/ 0x08000000, +/*0853*/ 0x00000100, +/*0854*/ 0x00000000, +/*0855*/ 0x0000AA00, +/*0856*/ 0x00000000, +/*0857*/ 0x00010000, +/*0858*/ 0x00000000, +/*0859*/ 0x00000000, +/*085a*/ 0x00000000, +/*085b*/ 0x00000000, +/*085c*/ 0x00000000, +/*085d*/ 0x00000000, +/*085e*/ 0x00000000, +/*085f*/ 0x00000000, +/*0860*/ 0x00000000, +/*0861*/ 0x00000000, +/*0862*/ 0x00000000, +/*0863*/ 0x00000000, +/*0864*/ 0x00000000, +/*0865*/ 0x00000000, +/*0866*/ 0x00000000, +/*0867*/ 0x00000000, +/*0868*/ 0x00000000, +/*0869*/ 0x00000000, +/*086a*/ 0x00000000, +/*086b*/ 0x00000000, +/*086c*/ 0x00000000, +/*086d*/ 0x00000000, +/*086e*/ 0x00000000, +/*086f*/ 0x00000000, +/*0870*/ 0x00000000, +/*0871*/ 0x00000000, +/*0872*/ 0x00000000, +/*0873*/ 0x00000000, +/*0874*/ 0x00000000, +/*0875*/ 0x00000000, +/*0876*/ 0x00000000, +/*0877*/ 0x00000002, +/*0878*/ 0x01010001, +/*0879*/ 0x00010200, +/*087a*/ 0x04000103, +/*087b*/ 0x01050001, +/*087c*/ 0x00010600, +/*087d*/ 0x00000107, +/*087e*/ 0x00000000, +/*087f*/ 0x00000000, +/*0880*/ 0x00000100, +/*0881*/ 0x00000000, +/*0882*/ 0x00000000, +/*0883*/ 0x00000000, +/*0884*/ 0x00040100, +/*0885*/ 0x00000000, +/*0886*/ 0x00000000, +/*0887*/ 0x01000000, +/*0888*/ 0x00002B2B, +/*0889*/ 0x00000034, +/*088a*/ 0x0000006C, +/*088b*/ 0x120C046C, +/*088c*/ 0x00481248, +/*088d*/ 0x00000006, +/*088e*/ 0x00000046, +/*088f*/ 0x00000256, +/*0890*/ 0x00002073, +/*0891*/ 0x00000256, +/*0892*/ 0x04002073, +/*0893*/ 0x00000404, +/*0894*/ 0x00002A00, +/*0895*/ 0x002A002A, +/*0896*/ 0x01000100, +/*0897*/ 0x00000100, +/*0898*/ 0x00000000, +/*0899*/ 0x00000000, +/*089a*/ 0x00010000, +/*089b*/ 0x00010100, +/*089c*/ 0x00010100, +/*089d*/ 0x15040100, +/*089e*/ 0x0E0E0215, +/*089f*/ 0x00040402, +/*08a0*/ 0x000C0034, +/*08a1*/ 0x00210049, +/*08a2*/ 0x00210049, +/*08a3*/ 0x01000001, +/*08a4*/ 0x00040005, +/*08a5*/ 0x00040216, +/*08a6*/ 0x01000216, +/*08a7*/ 0x00060006, +/*08a8*/ 0x02170100, +/*08a9*/ 0x01000217, +/*08aa*/ 0x02170217, +/*08ab*/ 0x11111111, +/*08ac*/ 0x00001111, +/*08ad*/ 0x0A070600, +/*08ae*/ 0x1F130A0D, +/*08af*/ 0x1F130A14, +/*08b0*/ 0x0000C014, +/*08b1*/ 0x00C01000, +/*08b2*/ 0x00C01000, +/*08b3*/ 0x00021000, +/*08b4*/ 0x00240005, +/*08b5*/ 0x00240216, +/*08b6*/ 0x003E0216, +/*08b7*/ 0x1609003A, +/*08b8*/ 0x00000007, +/*08b9*/ 0x003A003E, +/*08ba*/ 0x00071609, +/*08bb*/ 0x00003E00, +/*08bc*/ 0x1609003A, +/*08bd*/ 0x08000007, +/*08be*/ 0x04010404, +/*08bf*/ 0x01030277, +/*08c0*/ 0x0A0A0320, +/*08c1*/ 0x18272D10, +/*08c2*/ 0x5A752F28, +/*08c3*/ 0x1E202008, +/*08c4*/ 0x272D1016, +/*08c5*/ 0x752F2818, +/*08c6*/ 0x2020085A, +/*08c7*/ 0x0000161E, +/*08c8*/ 0x0000008C, +/*08c9*/ 0x00000578, +/*08ca*/ 0x000040E6, +/*08cb*/ 0x000288FC, +/*08cc*/ 0x000040E6, +/*08cd*/ 0x000288FC, +/*08ce*/ 0x02660006, +/*08cf*/ 0x04040266, +/*08d0*/ 0xC83CC804, +/*08d1*/ 0x0000003C, +/*08d2*/ 0x00040000, +/*08d3*/ 0x0F1166F1, +/*08d4*/ 0x3F740006, +/*08d5*/ 0x0F1166F1, +/*08d6*/ 0x3F740006, +/*08d7*/ 0x0F1166F1, +/*08d8*/ 0x00040006, +/*08d9*/ 0x0F1166F1, +/*08da*/ 0x3F74002E, +/*08db*/ 0x0F1166F1, +/*08dc*/ 0x3F74002E, +/*08dd*/ 0x0F1166F1, +/*08de*/ 0x0000002E +}; + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h new file mode 100644 index 00000000..8cdb901f --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h @@ -0,0 +1,302 @@ +/******************************************************************************* + * Copyright (c) 2015-2022 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +#if defined(__RH850G3K__) +#include "remap_register.h" +#endif + +#define RCAR_DDR_VERSION "rev.0.08rc7" +#define DRAM_CH_CNT 0x04 +#define SLICE_CNT 0x02 +#define CS_CNT 0x02 + +/* for pll setting */ +#define CLK_DIV(a, diva, b, divb) (((a) * (divb)) / ((b) * (diva))) +#define CLK_MUL(a, diva, b, divb) (((a) * (b)) / ((diva) * (divb))) + +/* for ddr density setting */ +#define DBMEMCONF_REG(d3, row, BG, bank, col, dw) (((d3) << 30) | ((row) << 24) | ((BG) << 20) | ((bank) << 16) | ((col) << 8) | (dw)) +#define DBMEMCONF_REGD(density) (DBMEMCONF_REG((density) % 2, ((density) + 1) / 2 + (28 - 2 - 2 - 10 - 1), 2, 2, 10, 1)) /* 16bit */ +#define DBMEMCONF_VAL(ch,cs) (DBMEMCONF_REGD(DBMEMCONF_DENS(ch, cs))) + +/* system registers : CPG */ +#define CPG_FRQCRD_KICK_BIT (1U << 31) +#define CPG_PLL3CR0_KICK_BIT (1U << 31) + +#define CPG_PLLECR_PLL3E_BIT (1U << 3) +#define CPG_PLLECR_PLL3ST_BIT (1U << 11) + +#if defined(__RH850G3K__) +#define CPG_BASE (BASE_CPG_ADDR) +#else +#define CPG_BASE (0xE6150000U) +#endif +#define CPG_CPGWPR (CPG_BASE + 0x0000U) +#define CPG_CPGWPCR (CPG_BASE + 0x0004U) +#define CPG_FRQCRA (CPG_BASE + 0x0800U) +#define CPG_FRQCRB (CPG_BASE + 0x0804U) +#define CPG_FRQCRC (CPG_BASE + 0x0808U) +#define CPG_FRQCRD0 (CPG_BASE + 0x080CU) +#define CPG_PLLECR (CPG_BASE + 0x0820U) +#define CPG_PLL3CR0 (CPG_BASE + 0x083CU) +#define CPG_PLL3CR1 (CPG_BASE + 0x08C0U) +#define CPG_FSRCHKCLRR4 (CPG_BASE + 0x0590U) +#define CPG_FSRCHKSETR4 (CPG_BASE + 0x0510U) +#define CPG_FSRCHKRA4 (CPG_BASE + 0x0410U) +#define CPG_SRCR4 (CPG_BASE + 0x2C10U) +#define CPG_SRSTCLR4 (CPG_BASE + 0x2C90U) + +#define CPG_PLL3FBCKMCSR (CPG_BASE + 0x0C60U) +#define CPG_PLL3FBCKMECR (CPG_BASE + 0x0C64U) +#define CPG_PLL3FBCKMLCH (CPG_BASE + 0x0C68U) +#define CPG_PLL3FBCKMLCL (CPG_BASE + 0x0C6CU) +#define CPG_PLL3FBCKMCNT (CPG_BASE + 0x0C70U) +#define CPG_PLL3FBCKMCNTE (CPG_BASE + 0x0C74U) + +#if defined(__RH850G3K__) +#define RST_BASE (BASE_RESET_ADDR) +#else +#define RST_BASE (0xE6160000U) +#endif +#define RST_MODEMR0 (RST_BASE + 0x0000U) +#define RST_MODEMR1 (RST_BASE + 0x0004U) + +/* Product Register */ +#define PRR (0xFFF00044U) +#define PRR_PRODUCT_MASK (0x00007F00U) +#define PRR_CUT_MASK (0x000000FFU) + +#define PRR_PRODUCT_V4H (0x00005C00U) /* R-Car V4H */ + +#define PRR_PRODUCT_10 (0x00000000U) /* ver 1.0 */ +#define PRR_PRODUCT_20 (0x00000010U) /* ver 2.0 */ + +/* DBSC registers */ +#if defined(__RH850G3K__) +#define DBSC_D_BASE (BASE_DBSC_ADDR + 0x14000U) /* forV4H DBSC0 clk_dbsc region DBSC1_D_BASE = 0xE67A8000U */ +#define DBSC_A_BASE (BASE_DBSC_ADDR) /* forV4H DBSC0 clk_axim region DBSC1_A_BASE = 0xE6798000U */ +#else +#define DBSC_D_BASE (0xE67A4000U) /* forV4H DBSC0 clk_dbsc region DBSC1_D_BASE = 0xE67A8000U */ +#define DBSC_A_BASE (0xE6790000U) /* forV4H DBSC0 clk_axim region DBSC1_A_BASE = 0xE6798000U */ +#endif + +#define DBSC_DBSYSCONF0 (DBSC_A_BASE + 0x0000U) +#define DBSC_DBSYSCONF1 (DBSC_D_BASE + 0x0000U) +#define DBSC_DBSYSCONF1A (DBSC_A_BASE + 0x0004U) +#define DBSC_DBSYSCONF2 (DBSC_D_BASE + 0x0004U) +#define DBSC_DBPHYCONF0 (DBSC_D_BASE + 0x0008U) +#define DBSC_DBSYSCONF2A (DBSC_A_BASE + 0x0008U) +#define DBSC_DBMEMKIND (DBSC_D_BASE + 0x0020U) +#define DBSC_DBMEMKINDA (DBSC_A_BASE + 0x0020U) + +#define DBSC_DBMEMCONF(ch,cs) (DBSC_D_BASE + 0x0030U + 0x10U * (ch) + 0x04U * (cs)) +#define DBSC_DBMEMCONF_0_0 (DBSC_D_BASE + 0x0030U) +#define DBSC_DBMEMCONF_0_1 (DBSC_D_BASE + 0x0034U) +#define DBSC_DBMEMCONF_0_2 (DBSC_D_BASE + 0x0038U) +#define DBSC_DBMEMCONF_0_3 (DBSC_D_BASE + 0x003CU) +#define DBSC_DBMEMCONF_1_0 (DBSC_D_BASE + 0x0040U) +#define DBSC_DBMEMCONF_1_1 (DBSC_D_BASE + 0x0044U) +#define DBSC_DBMEMCONF_1_2 (DBSC_D_BASE + 0x0048U) +#define DBSC_DBMEMCONF_1_3 (DBSC_D_BASE + 0x004CU) +#define DBSC_DBMEMCONF_2_0 (DBSC_D_BASE + 0x0050U) +#define DBSC_DBMEMCONF_2_1 (DBSC_D_BASE + 0x0054U) +#define DBSC_DBMEMCONF_2_2 (DBSC_D_BASE + 0x0058U) +#define DBSC_DBMEMCONF_2_3 (DBSC_D_BASE + 0x005CU) +#define DBSC_DBMEMCONF_3_0 (DBSC_D_BASE + 0x0060U) +#define DBSC_DBMEMCONF_3_1 (DBSC_D_BASE + 0x0064U) +#define DBSC_DBMEMCONF_3_2 (DBSC_D_BASE + 0x0068U) +#define DBSC_DBMEMCONF_3_3 (DBSC_D_BASE + 0x006CU) + +#define DBSC_DBMEMCONFA(ch,cs) (DBSC_A_BASE + 0x0030U + 0x10U * (ch) + 0x04U * (cs)) +#define DBSC_DBMEMCONF_0_0A (DBSC_A_BASE + 0x0030U) +#define DBSC_DBMEMCONF_0_1A (DBSC_A_BASE + 0x0034U) +#define DBSC_DBMEMCONF_0_2A (DBSC_A_BASE + 0x0038U) +#define DBSC_DBMEMCONF_0_3A (DBSC_A_BASE + 0x003CU) +#define DBSC_DBMEMCONF_1_0A (DBSC_A_BASE + 0x0040U) +#define DBSC_DBMEMCONF_1_1A (DBSC_A_BASE + 0x0044U) +#define DBSC_DBMEMCONF_1_2A (DBSC_A_BASE + 0x0048U) +#define DBSC_DBMEMCONF_1_3A (DBSC_A_BASE + 0x004CU) +#define DBSC_DBMEMCONF_2_0A (DBSC_A_BASE + 0x0050U) +#define DBSC_DBMEMCONF_2_1A (DBSC_A_BASE + 0x0054U) +#define DBSC_DBMEMCONF_2_2A (DBSC_A_BASE + 0x0058U) +#define DBSC_DBMEMCONF_2_3A (DBSC_A_BASE + 0x005CU) +#define DBSC_DBMEMCONF_3_0A (DBSC_A_BASE + 0x0060U) +#define DBSC_DBMEMCONF_3_1A (DBSC_A_BASE + 0x0064U) +#define DBSC_DBMEMCONF_3_2A (DBSC_A_BASE + 0x0068U) +#define DBSC_DBMEMCONF_3_3A (DBSC_A_BASE + 0x006CU) + +#define DBSC_DBSYSCNT0 (DBSC_D_BASE + 0x0100U) +#define DBSC_DBSYSCNT0A (DBSC_A_BASE + 0x0100U) + +#define DBSC_DBACEN (DBSC_A_BASE + 0x0200U) +#define DBSC_DBRFEN (DBSC_D_BASE + 0x0204U) +#define DBSC_DBCMD (DBSC_D_BASE + 0x0208U) +#define DBSC_DBWAIT (DBSC_D_BASE + 0x0210U) + +#define DBSC_DBTR(x) (DBSC_D_BASE + 0x0300U + 0x04U * (x)) +#define DBSC_DBTR0 (DBSC_D_BASE + 0x0300U) +#define DBSC_DBTR1 (DBSC_D_BASE + 0x0304U) +#define DBSC_DBTR2 (DBSC_D_BASE + 0x0308U) +#define DBSC_DBTR3 (DBSC_D_BASE + 0x030CU) +#define DBSC_DBTR4 (DBSC_D_BASE + 0x0310U) +#define DBSC_DBTR5 (DBSC_D_BASE + 0x0314U) +#define DBSC_DBTR6 (DBSC_D_BASE + 0x0318U) +#define DBSC_DBTR7 (DBSC_D_BASE + 0x031CU) +#define DBSC_DBTR8 (DBSC_D_BASE + 0x0320U) +#define DBSC_DBTR9 (DBSC_D_BASE + 0x0324U) +#define DBSC_DBTR10 (DBSC_D_BASE + 0x0328U) +#define DBSC_DBTR11 (DBSC_D_BASE + 0x032CU) +#define DBSC_DBTR12 (DBSC_D_BASE + 0x0330U) +#define DBSC_DBTR13 (DBSC_D_BASE + 0x0334U) +#define DBSC_DBTR14 (DBSC_D_BASE + 0x0338U) +#define DBSC_DBTR15 (DBSC_D_BASE + 0x033CU) +#define DBSC_DBTR16 (DBSC_D_BASE + 0x0340U) +#define DBSC_DBTR17 (DBSC_D_BASE + 0x0344U) +#define DBSC_DBTR18 (DBSC_D_BASE + 0x0348U) +#define DBSC_DBTR19 (DBSC_D_BASE + 0x034CU) +#define DBSC_DBTR20 (DBSC_D_BASE + 0x0350U) +#define DBSC_DBTR21 (DBSC_D_BASE + 0x0354U) +#define DBSC_DBTR22 (DBSC_D_BASE + 0x0358U) +#define DBSC_DBTR23 (DBSC_D_BASE + 0x035CU) +#define DBSC_DBTR24 (DBSC_D_BASE + 0x0360U) +#define DBSC_DBTR25 (DBSC_D_BASE + 0x0364U) +#define DBSC_DBTR26 (DBSC_D_BASE + 0x0368U) +#define DBSC_DBTR27 (DBSC_D_BASE + 0x036CU) +#define DBSC_DBTR28 (DBSC_D_BASE + 0x0370U) +#define DBSC_DBTR29 (DBSC_D_BASE + 0x0374U) +#define DBSC_DBTR30 (DBSC_D_BASE + 0x0378U) +#define DBSC_DBTR31 (DBSC_D_BASE + 0x037CU) +#define DBSC_DBTR32 (DBSC_D_BASE + 0x0380U) +#define DBSC_DBTR33 (DBSC_D_BASE + 0x0384U) +#define DBSC_DBTR34 (DBSC_D_BASE + 0x0388U) +#define DBSC_DBTR35 (DBSC_D_BASE + 0x038CU) +#define DBSC_DBTR36 (DBSC_D_BASE + 0x0390U) +#define DBSC_DBTR37 (DBSC_D_BASE + 0x0394U) + +#define DBSC_DBBL (DBSC_D_BASE + 0x0400U) +#define DBSC_DBBLA (DBSC_A_BASE + 0x0400U) + +#define DBSC_DBRFCNF1 (DBSC_D_BASE + 0x0414U) +#define DBSC_DBRFCNF2 (DBSC_D_BASE + 0x0418U) + +#define DBSC_DBCALCNF (DBSC_D_BASE + 0x0424U) + +#define DBSC_DBRNK(x) (DBSC_D_BASE + 0x0430U + 0x04U * (x)) +#define DBSC_DBRNK2 (DBSC_D_BASE + 0x0438U) +#define DBSC_DBRNK3 (DBSC_D_BASE + 0x043CU) +#define DBSC_DBRNK4 (DBSC_D_BASE + 0x0440U) +#define DBSC_DBRNK5 (DBSC_D_BASE + 0x0444U) + +#define DBSC_DBDBICNT (DBSC_D_BASE + 0x0518U) +#define DBSC_DBDFIPMSTRCNF (DBSC_D_BASE + 0x0520U) +#define DBSC_DBDFICUPDCNF (DBSC_D_BASE + 0x0540U) + +#define DBSC_DBDFISTAT(ch) (DBSC_D_BASE + 0x0600U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBDFISTAT_0 (DBSC_D_BASE + 0x0600U) +#define DBSC_DBDFISTAT_1 (DBSC_D_BASE + 0x0640U) +#define DBSC_DBDFISTAT_2 (DBSC_D_BASE + 0x0680U) +#define DBSC_DBDFISTAT_3 (DBSC_D_BASE + 0x06C0U) + +#define DBSC_DBDFICNT(ch) (DBSC_D_BASE + 0x0604U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBDFICNT_0 (DBSC_D_BASE + 0x0604U) +#define DBSC_DBDFICNT_1 (DBSC_D_BASE + 0x0644U) +#define DBSC_DBDFICNT_2 (DBSC_D_BASE + 0x0684U) +#define DBSC_DBDFICNT_3 (DBSC_D_BASE + 0x06C4U) + +#define DBSC_DBPDCNT0_0 (DBSC_D_BASE + 0x0610U) +#define DBSC_DBPDCNT0_1 (DBSC_D_BASE + 0x0614U) +#define DBSC_DBPDCNT0_2 (DBSC_D_BASE + 0x0618U) +#define DBSC_DBPDCNT0_3 (DBSC_D_BASE + 0x061CU) + +#define DBSC_DBPDCNT1_0 (DBSC_D_BASE + 0x0650U) +#define DBSC_DBPDCNT1_1 (DBSC_D_BASE + 0x0654U) +#define DBSC_DBPDCNT1_2 (DBSC_D_BASE + 0x0658U) +#define DBSC_DBPDCNT1_3 (DBSC_D_BASE + 0x065CU) + +#define DBSC_DBPDCNT2(ch) (DBSC_D_BASE + 0x0618U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDCNT2_0 (DBSC_D_BASE + 0x0690U) +#define DBSC_DBPDCNT2_1 (DBSC_D_BASE + 0x0694U) +#define DBSC_DBPDCNT2_2 (DBSC_D_BASE + 0x0698U) +#define DBSC_DBPDCNT2_3 (DBSC_D_BASE + 0x069CU) + +#define DBSC_DBPDCNT3_0 (DBSC_D_BASE + 0x06D0U) +#define DBSC_DBPDCNT3_1 (DBSC_D_BASE + 0x06D4U) +#define DBSC_DBPDCNT3_2 (DBSC_D_BASE + 0x06D8U) +#define DBSC_DBPDCNT3_3 (DBSC_D_BASE + 0x06DCU) + +#define DBSC_DBPDLK(ch) (DBSC_D_BASE + 0x0620U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDLK_0 (DBSC_D_BASE + 0x0620U) +#define DBSC_DBPDLK_1 (DBSC_D_BASE + 0x0660U) +#define DBSC_DBPDLK_2 (DBSC_D_BASE + 0x06a0U) +#define DBSC_DBPDLK_3 (DBSC_D_BASE + 0x06e0U) + +#define DBSC_DBPDRGA(ch) (DBSC_D_BASE + 0x0624U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDRGA_0 (DBSC_D_BASE + 0x0624U) +#define DBSC_DBPDRGA_1 (DBSC_D_BASE + 0x0664U) +#define DBSC_DBPDRGA_2 (DBSC_D_BASE + 0x06A4U) +#define DBSC_DBPDRGA_3 (DBSC_D_BASE + 0x06E4U) + +#define DBSC_DBPDRGD(ch) (DBSC_D_BASE + 0x0628U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDRGD_0 (DBSC_D_BASE + 0x0628U) +#define DBSC_DBPDRGD_1 (DBSC_D_BASE + 0x0668U) +#define DBSC_DBPDRGD_2 (DBSC_D_BASE + 0x06A8U) +#define DBSC_DBPDRGD_3 (DBSC_D_BASE + 0x06E8U) + +#define DBSC_DBPDSTAT0(ch) (DBSC_D_BASE + 0x0630U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDSTAT0_0 (DBSC_D_BASE + 0x0630U) +#define DBSC_DBPDSTAT1_0 (DBSC_D_BASE + 0x0670U) + +#define DBSC_DBPDSTAT1(ch) (DBSC_D_BASE + 0x0634U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDSTAT0_1 (DBSC_D_BASE + 0x0634U) +#define DBSC_DBPDSTA1T_1 (DBSC_D_BASE + 0x0674U) + +#define DBSC_DBCAM0CTRL0 (DBSC_A_BASE + 0x0940U) + +#define DBSC_DBCAMSTAT0(x) (DBSC_A_BASE + 0x0980U + 0x4000U *(x & 0x02U) + 0x10U * (x & 0x01U)) +#define DBSC_DBCAM0STAT0 (DBSC_A_BASE + 0x0980U) +#define DBSC_DBCAM1STAT0 (DBSC_A_BASE + 0x0990U) +#define DBSC_DBCAM2STAT0 (DBSC_A_BASE + 0x09A0U) +#define DBSC_DBCAM3STAT0 (DBSC_A_BASE + 0x09B0U) + +#define DBSC_DBCAMSTAT1(x) (DBSC_A_BASE + 0x0984U + 0x4000U *(x & 0x02U) + 0x10U * (x & 0x01U)) +#define DBSC_DBCAM0STAT1 (DBSC_A_BASE + 0x0984U) +#define DBSC_DBCAM1STAT1 (DBSC_A_BASE + 0x0994U) +#define DBSC_DBCAM2STAT1 (DBSC_A_BASE + 0x09A4U) +#define DBSC_DBCAM3STAT1 (DBSC_A_BASE + 0x09B4U) + +#define DBSC_DBBCAMDIS (DBSC_A_BASE + 0x09FCU) + +#define DBSC_DBSCHRW1 (DBSC_A_BASE + 0x1024U) + +#define DBSC_DBSCHTR0 (DBSC_A_BASE + 0x1030U) + +#define DBSC_DBSCHFCTST01(x) (DBSC_A_BASE + 0x1040U + 0x04U * (x)) +#define DBSC_DBSCHFCTST0 (DBSC_A_BASE + 0x1040U) +#define DBSC_DBSCHFCTST1 (DBSC_A_BASE + 0x1044U) + +#define DBSC_DBSCHQOS(x,y) (DBSC_A_BASE + 0x1100U + 0x10U * (x) + 0x04U * (y)) diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c new file mode 100644 index 00000000..fe88dd50 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c @@ -0,0 +1,531 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* Copyright 2025 Renesas Electronics Corporation All rights reserved. +*******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECM initialize function + ******************************************************************************/ +/****************************************************************************** + * @file ecm_enable_v4h.c + * - Version : 0.01 + * @brief ECM setting. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 29.01.2025 0.01 First Release + *****************************************************************************/ + +#include +#include "ecm_enable_v4h.h" + +#if (ECM_ERROR_ENABLE == 1) +#include "log.h" +#endif /* ECM_ERROR_ENABLE == 1 */ +#if ((ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1)) +#include "ecc_enable_v4h.h" +#include "mem_io.h" +#endif /* (ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1) */ + +#if (ECM_ERROR_ENABLE == 1) +#define TYPE1_ECM_REG_MAX (13U) +#define TYPE2_ECM_REG_MAX (22U) +#define TYPE3_ECM_CTLREG_MAX (1U) +#define TYPE3_ECM_TGTREG_MAX (2U) + +typedef struct{ + uint32_t phys_addr; /* Physical address of ECM registers. */ + uint32_t value; /* Setting value of ECM registers. */ +} ECM_ERROR_TABLE; +#endif /* ECM_ERROR_ENABLE == 1 */ + +#if ((ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1)) +void ecm_unlock(void) +{ + mem_write32(ECMWPCNTR, 0xACCE0001U); +} + +void ecm_write(uint32_t adr, uint32_t val) +{ + mem_write32(ECMWACNTR, ((0xACCEU << 16U) | (adr & 0xffffU))); + mem_write32(adr, val); +} + +void ecm_lock(void) +{ + mem_write32(ECMWPCNTR, 0xACCE0000U); +} +#endif /* (ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1) */ + +#if (ECM_ERROR_ENABLE == 1) +void ecm_init_setting(void) +{ + uint32_t reg; + uint32_t loop; + + const ECM_ERROR_TABLE ecmerrctlr_type1_tbl[TYPE1_ECM_REG_MAX] = { + [0] = {0xFD850000U, 0x00381000U}, /* ECMERRCTLR0 */ + [1] = {0xFD850004U, 0xA400C000U}, /* ECMERRCTLR1 */ + /* Skip ECMERRCTLR2 setting */ + /* Skip ECMERRCTLR3 setting */ + /* Skip ECMERRCTLR4 setting */ + /* Skip ECMERRCTLR5 setting */ + [2] = {0xFD850018U, 0xCC000000U}, /* ECMERRCTLR6 */ + [3] = {0xFD85001CU, 0x0C000000U}, /* ECMERRCTLR7 */ + /* Skip ECMERRCTLR8 setting */ + /* Skip ECMERRCTLR9 setting */ + /* Skip ECMERRCTLR10 setting */ + /* Skip ECMERRCTLR11 setting */ + /* Skip ECMERRCTLR12 setting */ + /* Skip ECMERRCTLR13 setting */ + /* Skip ECMERRCTLR14 setting */ + /* Skip ECMERRCTLR15 setting */ + /* Skip ECMERRCTLR16 setting */ + [4] = {0xFD850044U, 0x2D000000U}, /* ECMERRCTLR17 */ + [5] = {0xFD850048U, 0x0EC0003FU}, /* ECMERRCTLR18 */ + [6] = {0xFD85004CU, 0x00FFFF08U}, /* ECMERRCTLR19 */ + [7] = {0xFD850050U, 0x0000001EU}, /* ECMERRCTLR20 */ + [8] = {0xFD850054U, 0x9F800000U}, /* ECMERRCTLR21 */ + /* Skip ECMERRCTLR22 setting */ + /* Skip ECMERRCTLR23 setting */ + /* Skip ECMERRCTLR24 setting */ + /* Skip ECMERRCTLR25 setting */ + /* Skip ECMERRCTLR26 setting */ + /* Skip ECMERRCTLR27 setting */ + /* Skip ECMERRCTLR28 setting */ + /* Skip ECMERRCTLR29 setting */ + /* Skip ECMERRCTLR30 setting */ + /* Skip ECMERRCTLR31 setting */ + /* Skip ECMERRCTLR32 setting */ + /* Skip ECMERRCTLR33 setting */ + /* Skip ECMERRCTLR34 setting */ + [9] = {0xFD85008CU, 0x300003C0U}, /* ECMERRCTLR35 */ + /* Skip ECMERRCTLR36 setting */ + /* Skip ECMERRCTLR37 setting */ + [10] = {0xFD850098U, 0x33300054U}, /* ECMERRCTLR38 */ + /* Skip ECMERRCTLR39 setting */ + /* Skip ECMERRCTLR40 setting */ + [11] = {0xFD8500A4U, 0x01000880U}, /* ECMERRCTLR41 */ + [12] = {0xFD8500A8U, 0x00040020U}, /* ECMERRCTLR42 */ + }; + + const ECM_ERROR_TABLE ecmerrtgtr_type1_tbl[TYPE1_ECM_REG_MAX] = { + [0] = {0xFD850200U, 0x00381000U}, /* ECMERRTGTR0 */ + [1] = {0xFD850204U, 0xA400C000U}, /* ECMERRTGTR1 */ + /* Skip ECMERRTGTR2 setting */ + /* Skip ECMERRTGTR3 setting */ + /* Skip ECMERRTGTR4 setting */ + /* Skip ECMERRTGTR5 setting */ + [2] = {0xFD850218U, 0xCC000000U}, /* ECMERRTGTR6 */ + [3] = {0xFD85021CU, 0x0C000000U}, /* ECMERRTGTR7 */ + /* Skip ECMERRTGTR8 setting */ + /* Skip ECMERRTGTR9 setting */ + /* Skip ECMERRTGTR10 setting */ + /* Skip ECMERRTGTR11 setting */ + /* Skip ECMERRTGTR12 setting */ + /* Skip ECMERRTGTR13 setting */ + /* Skip ECMERRTGTR14 setting */ + /* Skip ECMERRTGTR15 setting */ + /* Skip ECMERRTGTR16 setting */ + [4] = {0xFD850244U, 0x2D000000U}, /* ECMERRTGTR17 */ + [5] = {0xFD850248U, 0x0EC0003FU}, /* ECMERRTGTR18 */ + [6] = {0xFD85024CU, 0x00FFFF08U}, /* ECMERRTGTR19 */ + [7] = {0xFD850250U, 0x0000001EU}, /* ECMERRTGTR20 */ + [8] = {0xFD850254U, 0x9F800000U}, /* ECMERRTGTR21 */ + /* Skip ECMERRTGTR22 setting */ + /* Skip ECMERRTGTR23 setting */ + /* Skip ECMERRTGTR24 setting */ + /* Skip ECMERRTGTR25 setting */ + /* Skip ECMERRTGTR26 setting */ + /* Skip ECMERRTGTR27 setting */ + /* Skip ECMERRTGTR28 setting */ + /* Skip ECMERRTGTR29 setting */ + /* Skip ECMERRTGTR30 setting */ + /* Skip ECMERRTGTR31 setting */ + /* Skip ECMERRTGTR32 setting */ + /* Skip ECMERRTGTR33 setting */ + /* Skip ECMERRTGTR34 setting */ + [9] = {0xFD85028CU, 0x300003C0U}, /* ECMERRTGTR35 */ + /* Skip ECMERRTGTR36 setting */ + /* Skip ECMERRTGTR37 setting */ + [10] = {0xFD850298U, 0x33300054U}, /* ECMERRTGTR38 */ + /* Skip ECMERRTGTR39 setting */ + /* Skip ECMERRTGTR40 setting */ + [11] = {0xFD8502A4U, 0x01000880U}, /* ECMERRTGTR41 */ + [12] = {0xFD8502A8U, 0x00040020U}, /* ECMERRTGTR42 */ + }; + + const ECM_ERROR_TABLE ecmerrctlr_type2_tbl[TYPE2_ECM_REG_MAX] = { + [0] = {0xFD850000U, 0x4000000FU}, /* ECMERRCTLR0 */ + [1] = {0xFD850004U, 0x1C004000U}, /* ECMERRCTLR1 */ + [2] = {0xFD850008U, 0xFFFFFFFFU}, /* ECMERRCTLR2 */ + [3] = {0xFD85000CU, 0xFFFFFFFFU}, /* ECMERRCTLR3 */ + [4] = {0xFD850010U, 0xFFFFFFFFU}, /* ECMERRCTLR4 */ + [5] = {0xFD850014U, 0xC1FFFFFFU}, /* ECMERRCTLR5 */ + [6] = {0xFD850018U, 0x15000A80U}, /* ECMERRCTLR6 */ + [7] = {0xFD85001CU, 0x00803481U}, /* ECMERRCTLR7 */ + /* Skip ECMERRCTLR8 setting */ + /* Skip ECMERRCTLR9 setting */ + /* Skip ECMERRCTLR10 setting */ + /* Skip ECMERRCTLR11 setting */ + /* Skip ECMERRCTLR12 setting */ + /* Skip ECMERRCTLR13 setting */ + /* Skip ECMERRCTLR14 setting */ + /* Skip ECMERRCTLR15 setting */ + [8] = {0xFD850040U, 0x00003E9FU}, /* ECMERRCTLR16 */ + [9] = {0xFD850044U, 0x00938060U}, /* ECMERRCTLR17 */ + [10] = {0xFD850048U, 0x003C1FC0U}, /* ECMERRCTLR18 */ + [11] = {0xFD85004CU, 0xFF0000F0U}, /* ECMERRCTLR19 */ + [12] = {0xFD850050U, 0x02222220U}, /* ECMERRCTLR20 */ + [13] = {0xFD850054U, 0x0061BE0FU}, /* ECMERRCTLR21 */ + /* Skip ECMERRCTLR22 setting */ + /* Skip ECMERRCTLR23 setting */ + /* Skip ECMERRCTLR24 setting */ + /* Skip ECMERRCTLR25 setting */ + /* Skip ECMERRCTLR26 setting */ + /* Skip ECMERRCTLR27 setting */ + /* Skip ECMERRCTLR28 setting */ + /* Skip ECMERRCTLR29 setting */ + /* Skip ECMERRCTLR30 setting */ + /* Skip ECMERRCTLR31 setting */ + [14] = {0xFD850080U, 0x03E9043BU}, /* ECMERRCTLR32 */ + [15] = {0xFD850084U, 0x03E9043BU}, /* ECMERRCTLR33 */ + /* Skip ECMERRCTLR34 setting */ + [16] = {0xFD85008CU, 0xC3F00C00U}, /* ECMERRCTLR35 */ + [17] = {0xFD850090U, 0xFFFFFFFFU}, /* ECMERRCTLR36 */ + /* Skip ECMERRCTLR37 setting */ + [18] = {0xFD850098U, 0x00000002U}, /* ECMERRCTLR38 */ + /* Skip ECMERRCTLR39 setting */ + [19] = {0xFD8500A0U, 0x000067FEU}, /* ECMERRCTLR40 */ + [20] = {0xFD8500A4U, 0x20010000U}, /* ECMERRCTLR41 */ + [21] = {0xFD8500A8U, 0x00800400U}, /* ECMERRCTLR42 */ + }; + + const ECM_ERROR_TABLE ecmerrtgtr_type2_tbl[TYPE2_ECM_REG_MAX] = { + [0] = {0xFD850200U, 0x4000000FU}, /* ECMERRTGTR0 */ + [1] = {0xFD850204U, 0x1C004000U}, /* ECMERRTGTR1 */ + [2] = {0xFD850208U, 0xFFFFFFFFU}, /* ECMERRTGTR2 */ + [3] = {0xFD85020CU, 0xFFFFFFFFU}, /* ECMERRTGTR3 */ + [4] = {0xFD850210U, 0xFFFFFFFFU}, /* ECMERRTGTR4 */ + [5] = {0xFD850214U, 0xC1FFFFFFU}, /* ECMERRTGTR5 */ + [6] = {0xFD850218U, 0x15000A80U}, /* ECMERRTGTR6 */ + [7] = {0xFD85021CU, 0x00803481U}, /* ECMERRTGTR7 */ + /* Skip ECMERRTGTR8 setting */ + /* Skip ECMERRTGTR9 setting */ + /* Skip ECMERRTGTR10 setting */ + /* Skip ECMERRTGTR11 setting */ + /* Skip ECMERRTGTR12 setting */ + /* Skip ECMERRTGTR13 setting */ + /* Skip ECMERRTGTR14 setting */ + /* Skip ECMERRTGTR15 setting */ + [8] = {0xFD850240U, 0x00003E9FU}, /* ECMERRTGTR16 */ + [9] = {0xFD850244U, 0x00938060U}, /* ECMERRTGTR17 */ + [10] = {0xFD850248U, 0x003C1FC0U}, /* ECMERRTGTR18 */ + [11] = {0xFD85024CU, 0xFF0000F0U}, /* ECMERRTGTR19 */ + [12] = {0xFD850250U, 0x02222220U}, /* ECMERRTGTR20 */ + [13] = {0xFD850254U, 0x0061BE0FU}, /* ECMERRTGTR21 */ + /* Skip ECMERRTGTR22 setting */ + /* Skip ECMERRTGTR23 setting */ + /* Skip ECMERRTGTR24 setting */ + /* Skip ECMERRTGTR25 setting */ + /* Skip ECMERRTGTR26 setting */ + /* Skip ECMERRTGTR27 setting */ + /* Skip ECMERRTGTR28 setting */ + /* Skip ECMERRTGTR29 setting */ + /* Skip ECMERRTGTR30 setting */ + /* Skip ECMERRTGTR31 setting */ + [14] = {0xFD850280U, 0x03E9043BU}, /* ECMERRTGTR32 */ + [15] = {0xFD850284U, 0x03E9043BU}, /* ECMERRTGTR33 */ + /* Skip ECMERRTGTR34 setting */ + [16] = {0xFD85028CU, 0xC3F00C00U}, /* ECMERRTGTR35 */ + [17] = {0xFD850290U, 0xFFFFFFFFU}, /* ECMERRTGTR36 */ + /* Skip ECMERRTGTR37 setting */ + [18] = {0xFD850298U, 0x00000002U}, /* ECMERRTGTR38 */ + /* Skip ECMERRTGTR39 setting */ + [19] = {0xFD8502A0U, 0x000067FEU}, /* ECMERRTGTR40 */ + [20] = {0xFD8502A4U, 0x20010000U}, /* ECMERRTGTR41 */ + [21] = {0xFD8502A8U, 0x00800400U}, /* ECMERRTGTR42 */ + }; + + const ECM_ERROR_TABLE ecmerrctlr_type3_tbl[TYPE3_ECM_CTLREG_MAX] = { + /* Skip ECMERRCTLR0 setting */ + /* Skip ECMERRCTLR1 setting */ + /* Skip ECMERRCTLR2 setting */ + /* Skip ECMERRCTLR3 setting */ + /* Skip ECMERRCTLR4 setting */ + /* Skip ECMERRCTLR5 setting */ + /* Skip ECMERRCTLR6 setting */ + /* Skip ECMERRCTLR7 setting */ + /* Skip ECMERRCTLR8 setting */ + /* Skip ECMERRCTLR9 setting */ + /* Skip ECMERRCTLR10 setting */ + /* Skip ECMERRCTLR11 setting */ + /* Skip ECMERRCTLR12 setting */ + /* Skip ECMERRCTLR13 setting */ + /* Skip ECMERRCTLR14 setting */ + /* Skip ECMERRCTLR15 setting */ + [0] = {0xFD850040U, 0x3FFFC000U}, /* ECMERRCTLR16 */ + /* Skip ECMERRCTLR17 setting */ + /* Skip ECMERRCTLR18 setting */ + /* Skip ECMERRCTLR19 setting */ + /* Skip ECMERRCTLR20 setting */ + /* Skip ECMERRCTLR21 setting */ + /* Skip ECMERRCTLR22 setting */ + /* Skip ECMERRCTLR23 setting */ + /* Skip ECMERRCTLR24 setting */ + /* Skip ECMERRCTLR25 setting */ + /* Skip ECMERRCTLR26 setting */ + /* Skip ECMERRCTLR27 setting */ + /* Skip ECMERRCTLR28 setting */ + /* Skip ECMERRCTLR29 setting */ + /* Skip ECMERRCTLR30 setting */ + /* Skip ECMERRCTLR31 setting */ + /* Skip ECMERRCTLR32 setting */ + /* Skip ECMERRCTLR33 setting */ + /* Skip ECMERRCTLR34 setting */ + /* Skip ECMERRCTLR35 setting */ + /* Skip ECMERRCTLR36 setting */ + /* Skip ECMERRCTLR37 setting */ + /* Skip ECMERRCTLR38 setting */ + /* Skip ECMERRCTLR39 setting */ + /* Skip ECMERRCTLR40 setting */ + /* Skip ECMERRCTLR41 setting */ + /* Skip ECMERRCTLR42 setting */ + }; + + const ECM_ERROR_TABLE ecmerrtgtr_type3_tbl[TYPE3_ECM_TGTREG_MAX] = { + [0] = {0xFD850200U, 0x80000000U}, /* ECMERRTGTR0 */ + /* Skip ECMERRTGTR1 setting */ + /* Skip ECMERRTGTR2 setting */ + /* Skip ECMERRTGTR3 setting */ + /* Skip ECMERRTGTR4 setting */ + /* Skip ECMERRTGTR5 setting */ + /* Skip ECMERRTGTR6 setting */ + /* Skip ECMERRTGTR7 setting */ + /* Skip ECMERRTGTR8 setting */ + /* Skip ECMERRTGTR9 setting */ + /* Skip ECMERRTGTR10 setting */ + /* Skip ECMERRTGTR11 setting */ + /* Skip ECMERRTGTR12 setting */ + /* Skip ECMERRTGTR13 setting */ + /* Skip ECMERRTGTR14 setting */ + /* Skip ECMERRTGTR15 setting */ + [1] = {0xFD850240U, 0x3FFFC000U}, /* ECMERRTGTR16 */ + /* Skip ECMERRTGTR17 setting */ + /* Skip ECMERRTGTR18 setting */ + /* Skip ECMERRTGTR19 setting */ + /* Skip ECMERRTGTR20 setting */ + /* Skip ECMERRTGTR21 setting */ + /* Skip ECMERRTGTR22 setting */ + /* Skip ECMERRTGTR23 setting */ + /* Skip ECMERRTGTR24 setting */ + /* Skip ECMERRTGTR25 setting */ + /* Skip ECMERRTGTR26 setting */ + /* Skip ECMERRTGTR27 setting */ + /* Skip ECMERRTGTR28 setting */ + /* Skip ECMERRTGTR29 setting */ + /* Skip ECMERRTGTR30 setting */ + /* Skip ECMERRTGTR31 setting */ + /* Skip ECMERRTGTR32 setting */ + /* Skip ECMERRTGTR33 setting */ + /* Skip ECMERRTGTR34 setting */ + /* Skip ECMERRTGTR35 setting */ + /* Skip ECMERRTGTR36 setting */ + /* Skip ECMERRTGTR37 setting */ + /* Skip ECMERRTGTR38 setting */ + /* Skip ECMERRTGTR39 setting */ + /* Skip ECMERRTGTR40 setting */ + /* Skip ECMERRTGTR41 setting */ + /* Skip ECMERRTGTR42 setting */ + }; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + NOTICE("ECMERRCTLR and ECMERRTGTR register initial setting.\n"); + /* For the initial setting flow for Type-1, please refer to the following + * section in the "SAN(Safety Application Note)." + * Section 4.1.2.5 : (1) + * Section 4.1.4.5 : (1) + * Section 4.12.1.5 : (1) + * Section 4.13.1.5 : (1) + * Section 4.14.5 : (1) + * Section 4.16.5 : (1) + * Section 4.18.5 : (1) + * Section 4.2.7.5 : (1) + * Section 4.2.9.5 : (1) + * Section 4.23.5 : (1) + * Section 4.3.11.5 : (1) + * Section 4.3.12.5 : (1) + * Section 4.3.14.5 : (1) + * Section 4.3.19.5 : (1) + * Section 4.3.21.5 : (1) + * Section 4.4.14.5 : (1) + * Section 4.4.16.5 : (3) + * Section 4.4.18.5 : (1) + * Section 4.4.20.5 : (1) + * Section 4.4.3.5 : (1) + * Section 4.4.4.5 : (1) + * Section 4.4.6.5 : (1) + * Section 4.4.7.5 : (1) + * Section 4.4.9.5 : (1) + * Section 4.5.1.5 : (1) + * Section 4.7.1.5 : (1) + * Section 4.7.10.5 : (1) + * Section 4.7.3.5 : (1) + * Section 4.7.4.5 : (1) + * Section 4.7.7.5 : (1) + * Section 4.7.8.5 : (1) + * Section 5.6.5 : (1) + * Section 5.8.1.5 : (1) + */ + for (loop = 0U; loop < TYPE1_ECM_REG_MAX; loop++) + { + reg = mem_read32(ecmerrctlr_type1_tbl[loop].phys_addr); + reg |= (ecmerrctlr_type1_tbl[loop].value); + ecm_write(ecmerrctlr_type1_tbl[loop].phys_addr, reg); + + INFO("[Type-1]ECMERRCTLR[\t%d]\t(0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", + loop, + ecmerrctlr_type1_tbl[loop].phys_addr, + mem_read32(ecmerrctlr_type1_tbl[loop].phys_addr), + ecmerrctlr_type1_tbl[loop].value); + } + + for (loop = 0U; loop < TYPE1_ECM_REG_MAX; loop++) + { + reg = mem_read32(ecmerrtgtr_type1_tbl[loop].phys_addr); + reg &= ~(ecmerrtgtr_type1_tbl[loop].value); + ecm_write(ecmerrtgtr_type1_tbl[loop].phys_addr, reg); + + INFO("[Type-1]ECMERRTGTR[\t%d]\t(0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", + loop, + ecmerrtgtr_type1_tbl[loop].phys_addr, + mem_read32(ecmerrtgtr_type1_tbl[loop].phys_addr), + ecmerrtgtr_type1_tbl[loop].value); + } + + /* For the initial setting flow for Type-2, please refer to the following + * section in the "SAN(Safety Application Note)." + * Section 4.1.1.5 : (1) + * Section 4.12.2.5 : (1) + * Section 4.12.3.5 : (1) + * Section 4.15.5 : (1) + * Section 4.16.5 : (1) + * Section 4.2.1.5 : (1) + * Section 4.2.10.5 : (1) + * Section 4.2.12.5 : (1) + * Section 4.2.2.5 : (1) + * Section 4.2.4.5 : (1) + * Section 4.2.8.5 : (1) + * Section 4.3.1.5 : (1) + * Section 4.3.10.5 : (1) + * Section 4.3.11.5 : (1) + * Section 4.3.12.5 : (1) + * Section 4.3.13.5 : (1) + * Section 4.3.15.5 : (1) + * Section 4.3.16.5 : (1) + * Section 4.3.2.5 : (1) + * Section 4.3.5.5 : (1) + * Section 4.3.7.5 : (1) + * Section 4.3.8.5 : (1) + * Section 4.4.10.5 : (1) + * Section 4.4.12.5 : (8) + * Section 4.4.13.5 : (1) + * Section 4.4.15.5 : (1) + * Section 4.4.2.5 : (1) + * Section 4.5.3.5 : (1) + * Section 4.6.5 : (1) + * Section 4.7.2.5 : (1) + * Section 5.11.5 : (1) + * Section 5.12.5 : (1) + * Section 5.13.5 : (1) + * Section 5.4.5 : (1) + * Section 5.8.2.5 : (1) + */ + for (loop = 0U; loop < TYPE2_ECM_REG_MAX; loop++) + { + /* Initial Setting Type-2 for ECMERRCTLR registers */ + reg = mem_read32(ecmerrctlr_type2_tbl[loop].phys_addr); + reg |= (ecmerrctlr_type2_tbl[loop].value); + ecm_write(ecmerrctlr_type2_tbl[loop].phys_addr, reg); + + INFO("[Type-2]ECMERRCTLR[\t%d]\t(0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", + loop, + ecmerrctlr_type2_tbl[loop].phys_addr, + mem_read32(ecmerrctlr_type2_tbl[loop].phys_addr), + ecmerrctlr_type2_tbl[loop].value); + } + + for (loop = 0U; loop < TYPE2_ECM_REG_MAX; loop++) + { + /* Initial Setting Type-2 for ECMERRTGTR registers */ + reg = mem_read32(ecmerrtgtr_type2_tbl[loop].phys_addr); + reg &= ~(ecmerrtgtr_type2_tbl[loop].value); + ecm_write(ecmerrtgtr_type2_tbl[loop].phys_addr, reg); + + INFO("[Type-2]ECMERRTGTR[\t%d]\t(0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", + loop, + ecmerrtgtr_type2_tbl[loop].phys_addr, + mem_read32(ecmerrtgtr_type2_tbl[loop].phys_addr), + ecmerrtgtr_type2_tbl[loop].value); + } + + /* For the initial setting flow for Type-3, please refer to the following + * section in the "SAN(Safety Application Note)." + * Section 4.19.1.5 : (3) + * Section 6.2.5 : (12) + */ + for (loop = 0U; loop < TYPE3_ECM_CTLREG_MAX; loop++) + { + /* Initial Setting Type-3 for ECMERRCTLR registers */ + reg = mem_read32(ecmerrctlr_type3_tbl[loop].phys_addr); + reg |= (ecmerrctlr_type3_tbl[loop].value); + ecm_write(ecmerrctlr_type3_tbl[loop].phys_addr, reg); + + INFO("[Type-3]ECMERRCTLR[\t%d]\t(0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", + loop, + ecmerrctlr_type3_tbl[loop].phys_addr, + mem_read32(ecmerrctlr_type3_tbl[loop].phys_addr), + ecmerrctlr_type3_tbl[loop].value); + } + + for (loop = 0U; loop < TYPE3_ECM_TGTREG_MAX; loop++) + { + /* Initial Setting Type-3 for ECMERRTGTR registers */ + reg = mem_read32(ecmerrtgtr_type3_tbl[loop].phys_addr); + reg &= ~(ecmerrtgtr_type3_tbl[loop].value); + ecm_write(ecmerrtgtr_type3_tbl[loop].phys_addr, reg); + + INFO("[Type-3]ECMERRTGTR[\t%d]\t(0x%08x) =\t0x%08x \tsetting value = 0x%08x\n", + loop, + ecmerrtgtr_type3_tbl[loop].phys_addr, + mem_read32(ecmerrtgtr_type3_tbl[loop].phys_addr), + ecmerrtgtr_type3_tbl[loop].value); + } + + /* Lock the ECM registers */ + ecm_lock(); +} +/* End of function ecm_init_setting(void) */ +#endif /* ECM_ERROR_ENABLE == 1 */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h new file mode 100644 index 00000000..fa5a8a67 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h @@ -0,0 +1,42 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* Copyright 2025 Renesas Electronics Corporation All rights reserved. +*******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECM driver header + ******************************************************************************/ + +#ifndef ECM_ENABLE_V4H +#define ECM_ENABLE_V4H + +#if ((ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1)) +void ecm_unlock(void); +void ecm_write(uint32_t adr, uint32_t val); +void ecm_lock(void); +#endif /* (ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1) */ + +#if (ECM_ERROR_ENABLE == 1) +void ecm_init_setting(void); +#endif /* ECM_ERROR_ENABLE == 1 */ + +#endif/* ECM_ENABLE_V4H */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h new file mode 100644 index 00000000..8cdb901f --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h @@ -0,0 +1,302 @@ +/******************************************************************************* + * Copyright (c) 2015-2022 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +#if defined(__RH850G3K__) +#include "remap_register.h" +#endif + +#define RCAR_DDR_VERSION "rev.0.08rc7" +#define DRAM_CH_CNT 0x04 +#define SLICE_CNT 0x02 +#define CS_CNT 0x02 + +/* for pll setting */ +#define CLK_DIV(a, diva, b, divb) (((a) * (divb)) / ((b) * (diva))) +#define CLK_MUL(a, diva, b, divb) (((a) * (b)) / ((diva) * (divb))) + +/* for ddr density setting */ +#define DBMEMCONF_REG(d3, row, BG, bank, col, dw) (((d3) << 30) | ((row) << 24) | ((BG) << 20) | ((bank) << 16) | ((col) << 8) | (dw)) +#define DBMEMCONF_REGD(density) (DBMEMCONF_REG((density) % 2, ((density) + 1) / 2 + (28 - 2 - 2 - 10 - 1), 2, 2, 10, 1)) /* 16bit */ +#define DBMEMCONF_VAL(ch,cs) (DBMEMCONF_REGD(DBMEMCONF_DENS(ch, cs))) + +/* system registers : CPG */ +#define CPG_FRQCRD_KICK_BIT (1U << 31) +#define CPG_PLL3CR0_KICK_BIT (1U << 31) + +#define CPG_PLLECR_PLL3E_BIT (1U << 3) +#define CPG_PLLECR_PLL3ST_BIT (1U << 11) + +#if defined(__RH850G3K__) +#define CPG_BASE (BASE_CPG_ADDR) +#else +#define CPG_BASE (0xE6150000U) +#endif +#define CPG_CPGWPR (CPG_BASE + 0x0000U) +#define CPG_CPGWPCR (CPG_BASE + 0x0004U) +#define CPG_FRQCRA (CPG_BASE + 0x0800U) +#define CPG_FRQCRB (CPG_BASE + 0x0804U) +#define CPG_FRQCRC (CPG_BASE + 0x0808U) +#define CPG_FRQCRD0 (CPG_BASE + 0x080CU) +#define CPG_PLLECR (CPG_BASE + 0x0820U) +#define CPG_PLL3CR0 (CPG_BASE + 0x083CU) +#define CPG_PLL3CR1 (CPG_BASE + 0x08C0U) +#define CPG_FSRCHKCLRR4 (CPG_BASE + 0x0590U) +#define CPG_FSRCHKSETR4 (CPG_BASE + 0x0510U) +#define CPG_FSRCHKRA4 (CPG_BASE + 0x0410U) +#define CPG_SRCR4 (CPG_BASE + 0x2C10U) +#define CPG_SRSTCLR4 (CPG_BASE + 0x2C90U) + +#define CPG_PLL3FBCKMCSR (CPG_BASE + 0x0C60U) +#define CPG_PLL3FBCKMECR (CPG_BASE + 0x0C64U) +#define CPG_PLL3FBCKMLCH (CPG_BASE + 0x0C68U) +#define CPG_PLL3FBCKMLCL (CPG_BASE + 0x0C6CU) +#define CPG_PLL3FBCKMCNT (CPG_BASE + 0x0C70U) +#define CPG_PLL3FBCKMCNTE (CPG_BASE + 0x0C74U) + +#if defined(__RH850G3K__) +#define RST_BASE (BASE_RESET_ADDR) +#else +#define RST_BASE (0xE6160000U) +#endif +#define RST_MODEMR0 (RST_BASE + 0x0000U) +#define RST_MODEMR1 (RST_BASE + 0x0004U) + +/* Product Register */ +#define PRR (0xFFF00044U) +#define PRR_PRODUCT_MASK (0x00007F00U) +#define PRR_CUT_MASK (0x000000FFU) + +#define PRR_PRODUCT_V4H (0x00005C00U) /* R-Car V4H */ + +#define PRR_PRODUCT_10 (0x00000000U) /* ver 1.0 */ +#define PRR_PRODUCT_20 (0x00000010U) /* ver 2.0 */ + +/* DBSC registers */ +#if defined(__RH850G3K__) +#define DBSC_D_BASE (BASE_DBSC_ADDR + 0x14000U) /* forV4H DBSC0 clk_dbsc region DBSC1_D_BASE = 0xE67A8000U */ +#define DBSC_A_BASE (BASE_DBSC_ADDR) /* forV4H DBSC0 clk_axim region DBSC1_A_BASE = 0xE6798000U */ +#else +#define DBSC_D_BASE (0xE67A4000U) /* forV4H DBSC0 clk_dbsc region DBSC1_D_BASE = 0xE67A8000U */ +#define DBSC_A_BASE (0xE6790000U) /* forV4H DBSC0 clk_axim region DBSC1_A_BASE = 0xE6798000U */ +#endif + +#define DBSC_DBSYSCONF0 (DBSC_A_BASE + 0x0000U) +#define DBSC_DBSYSCONF1 (DBSC_D_BASE + 0x0000U) +#define DBSC_DBSYSCONF1A (DBSC_A_BASE + 0x0004U) +#define DBSC_DBSYSCONF2 (DBSC_D_BASE + 0x0004U) +#define DBSC_DBPHYCONF0 (DBSC_D_BASE + 0x0008U) +#define DBSC_DBSYSCONF2A (DBSC_A_BASE + 0x0008U) +#define DBSC_DBMEMKIND (DBSC_D_BASE + 0x0020U) +#define DBSC_DBMEMKINDA (DBSC_A_BASE + 0x0020U) + +#define DBSC_DBMEMCONF(ch,cs) (DBSC_D_BASE + 0x0030U + 0x10U * (ch) + 0x04U * (cs)) +#define DBSC_DBMEMCONF_0_0 (DBSC_D_BASE + 0x0030U) +#define DBSC_DBMEMCONF_0_1 (DBSC_D_BASE + 0x0034U) +#define DBSC_DBMEMCONF_0_2 (DBSC_D_BASE + 0x0038U) +#define DBSC_DBMEMCONF_0_3 (DBSC_D_BASE + 0x003CU) +#define DBSC_DBMEMCONF_1_0 (DBSC_D_BASE + 0x0040U) +#define DBSC_DBMEMCONF_1_1 (DBSC_D_BASE + 0x0044U) +#define DBSC_DBMEMCONF_1_2 (DBSC_D_BASE + 0x0048U) +#define DBSC_DBMEMCONF_1_3 (DBSC_D_BASE + 0x004CU) +#define DBSC_DBMEMCONF_2_0 (DBSC_D_BASE + 0x0050U) +#define DBSC_DBMEMCONF_2_1 (DBSC_D_BASE + 0x0054U) +#define DBSC_DBMEMCONF_2_2 (DBSC_D_BASE + 0x0058U) +#define DBSC_DBMEMCONF_2_3 (DBSC_D_BASE + 0x005CU) +#define DBSC_DBMEMCONF_3_0 (DBSC_D_BASE + 0x0060U) +#define DBSC_DBMEMCONF_3_1 (DBSC_D_BASE + 0x0064U) +#define DBSC_DBMEMCONF_3_2 (DBSC_D_BASE + 0x0068U) +#define DBSC_DBMEMCONF_3_3 (DBSC_D_BASE + 0x006CU) + +#define DBSC_DBMEMCONFA(ch,cs) (DBSC_A_BASE + 0x0030U + 0x10U * (ch) + 0x04U * (cs)) +#define DBSC_DBMEMCONF_0_0A (DBSC_A_BASE + 0x0030U) +#define DBSC_DBMEMCONF_0_1A (DBSC_A_BASE + 0x0034U) +#define DBSC_DBMEMCONF_0_2A (DBSC_A_BASE + 0x0038U) +#define DBSC_DBMEMCONF_0_3A (DBSC_A_BASE + 0x003CU) +#define DBSC_DBMEMCONF_1_0A (DBSC_A_BASE + 0x0040U) +#define DBSC_DBMEMCONF_1_1A (DBSC_A_BASE + 0x0044U) +#define DBSC_DBMEMCONF_1_2A (DBSC_A_BASE + 0x0048U) +#define DBSC_DBMEMCONF_1_3A (DBSC_A_BASE + 0x004CU) +#define DBSC_DBMEMCONF_2_0A (DBSC_A_BASE + 0x0050U) +#define DBSC_DBMEMCONF_2_1A (DBSC_A_BASE + 0x0054U) +#define DBSC_DBMEMCONF_2_2A (DBSC_A_BASE + 0x0058U) +#define DBSC_DBMEMCONF_2_3A (DBSC_A_BASE + 0x005CU) +#define DBSC_DBMEMCONF_3_0A (DBSC_A_BASE + 0x0060U) +#define DBSC_DBMEMCONF_3_1A (DBSC_A_BASE + 0x0064U) +#define DBSC_DBMEMCONF_3_2A (DBSC_A_BASE + 0x0068U) +#define DBSC_DBMEMCONF_3_3A (DBSC_A_BASE + 0x006CU) + +#define DBSC_DBSYSCNT0 (DBSC_D_BASE + 0x0100U) +#define DBSC_DBSYSCNT0A (DBSC_A_BASE + 0x0100U) + +#define DBSC_DBACEN (DBSC_A_BASE + 0x0200U) +#define DBSC_DBRFEN (DBSC_D_BASE + 0x0204U) +#define DBSC_DBCMD (DBSC_D_BASE + 0x0208U) +#define DBSC_DBWAIT (DBSC_D_BASE + 0x0210U) + +#define DBSC_DBTR(x) (DBSC_D_BASE + 0x0300U + 0x04U * (x)) +#define DBSC_DBTR0 (DBSC_D_BASE + 0x0300U) +#define DBSC_DBTR1 (DBSC_D_BASE + 0x0304U) +#define DBSC_DBTR2 (DBSC_D_BASE + 0x0308U) +#define DBSC_DBTR3 (DBSC_D_BASE + 0x030CU) +#define DBSC_DBTR4 (DBSC_D_BASE + 0x0310U) +#define DBSC_DBTR5 (DBSC_D_BASE + 0x0314U) +#define DBSC_DBTR6 (DBSC_D_BASE + 0x0318U) +#define DBSC_DBTR7 (DBSC_D_BASE + 0x031CU) +#define DBSC_DBTR8 (DBSC_D_BASE + 0x0320U) +#define DBSC_DBTR9 (DBSC_D_BASE + 0x0324U) +#define DBSC_DBTR10 (DBSC_D_BASE + 0x0328U) +#define DBSC_DBTR11 (DBSC_D_BASE + 0x032CU) +#define DBSC_DBTR12 (DBSC_D_BASE + 0x0330U) +#define DBSC_DBTR13 (DBSC_D_BASE + 0x0334U) +#define DBSC_DBTR14 (DBSC_D_BASE + 0x0338U) +#define DBSC_DBTR15 (DBSC_D_BASE + 0x033CU) +#define DBSC_DBTR16 (DBSC_D_BASE + 0x0340U) +#define DBSC_DBTR17 (DBSC_D_BASE + 0x0344U) +#define DBSC_DBTR18 (DBSC_D_BASE + 0x0348U) +#define DBSC_DBTR19 (DBSC_D_BASE + 0x034CU) +#define DBSC_DBTR20 (DBSC_D_BASE + 0x0350U) +#define DBSC_DBTR21 (DBSC_D_BASE + 0x0354U) +#define DBSC_DBTR22 (DBSC_D_BASE + 0x0358U) +#define DBSC_DBTR23 (DBSC_D_BASE + 0x035CU) +#define DBSC_DBTR24 (DBSC_D_BASE + 0x0360U) +#define DBSC_DBTR25 (DBSC_D_BASE + 0x0364U) +#define DBSC_DBTR26 (DBSC_D_BASE + 0x0368U) +#define DBSC_DBTR27 (DBSC_D_BASE + 0x036CU) +#define DBSC_DBTR28 (DBSC_D_BASE + 0x0370U) +#define DBSC_DBTR29 (DBSC_D_BASE + 0x0374U) +#define DBSC_DBTR30 (DBSC_D_BASE + 0x0378U) +#define DBSC_DBTR31 (DBSC_D_BASE + 0x037CU) +#define DBSC_DBTR32 (DBSC_D_BASE + 0x0380U) +#define DBSC_DBTR33 (DBSC_D_BASE + 0x0384U) +#define DBSC_DBTR34 (DBSC_D_BASE + 0x0388U) +#define DBSC_DBTR35 (DBSC_D_BASE + 0x038CU) +#define DBSC_DBTR36 (DBSC_D_BASE + 0x0390U) +#define DBSC_DBTR37 (DBSC_D_BASE + 0x0394U) + +#define DBSC_DBBL (DBSC_D_BASE + 0x0400U) +#define DBSC_DBBLA (DBSC_A_BASE + 0x0400U) + +#define DBSC_DBRFCNF1 (DBSC_D_BASE + 0x0414U) +#define DBSC_DBRFCNF2 (DBSC_D_BASE + 0x0418U) + +#define DBSC_DBCALCNF (DBSC_D_BASE + 0x0424U) + +#define DBSC_DBRNK(x) (DBSC_D_BASE + 0x0430U + 0x04U * (x)) +#define DBSC_DBRNK2 (DBSC_D_BASE + 0x0438U) +#define DBSC_DBRNK3 (DBSC_D_BASE + 0x043CU) +#define DBSC_DBRNK4 (DBSC_D_BASE + 0x0440U) +#define DBSC_DBRNK5 (DBSC_D_BASE + 0x0444U) + +#define DBSC_DBDBICNT (DBSC_D_BASE + 0x0518U) +#define DBSC_DBDFIPMSTRCNF (DBSC_D_BASE + 0x0520U) +#define DBSC_DBDFICUPDCNF (DBSC_D_BASE + 0x0540U) + +#define DBSC_DBDFISTAT(ch) (DBSC_D_BASE + 0x0600U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBDFISTAT_0 (DBSC_D_BASE + 0x0600U) +#define DBSC_DBDFISTAT_1 (DBSC_D_BASE + 0x0640U) +#define DBSC_DBDFISTAT_2 (DBSC_D_BASE + 0x0680U) +#define DBSC_DBDFISTAT_3 (DBSC_D_BASE + 0x06C0U) + +#define DBSC_DBDFICNT(ch) (DBSC_D_BASE + 0x0604U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBDFICNT_0 (DBSC_D_BASE + 0x0604U) +#define DBSC_DBDFICNT_1 (DBSC_D_BASE + 0x0644U) +#define DBSC_DBDFICNT_2 (DBSC_D_BASE + 0x0684U) +#define DBSC_DBDFICNT_3 (DBSC_D_BASE + 0x06C4U) + +#define DBSC_DBPDCNT0_0 (DBSC_D_BASE + 0x0610U) +#define DBSC_DBPDCNT0_1 (DBSC_D_BASE + 0x0614U) +#define DBSC_DBPDCNT0_2 (DBSC_D_BASE + 0x0618U) +#define DBSC_DBPDCNT0_3 (DBSC_D_BASE + 0x061CU) + +#define DBSC_DBPDCNT1_0 (DBSC_D_BASE + 0x0650U) +#define DBSC_DBPDCNT1_1 (DBSC_D_BASE + 0x0654U) +#define DBSC_DBPDCNT1_2 (DBSC_D_BASE + 0x0658U) +#define DBSC_DBPDCNT1_3 (DBSC_D_BASE + 0x065CU) + +#define DBSC_DBPDCNT2(ch) (DBSC_D_BASE + 0x0618U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDCNT2_0 (DBSC_D_BASE + 0x0690U) +#define DBSC_DBPDCNT2_1 (DBSC_D_BASE + 0x0694U) +#define DBSC_DBPDCNT2_2 (DBSC_D_BASE + 0x0698U) +#define DBSC_DBPDCNT2_3 (DBSC_D_BASE + 0x069CU) + +#define DBSC_DBPDCNT3_0 (DBSC_D_BASE + 0x06D0U) +#define DBSC_DBPDCNT3_1 (DBSC_D_BASE + 0x06D4U) +#define DBSC_DBPDCNT3_2 (DBSC_D_BASE + 0x06D8U) +#define DBSC_DBPDCNT3_3 (DBSC_D_BASE + 0x06DCU) + +#define DBSC_DBPDLK(ch) (DBSC_D_BASE + 0x0620U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDLK_0 (DBSC_D_BASE + 0x0620U) +#define DBSC_DBPDLK_1 (DBSC_D_BASE + 0x0660U) +#define DBSC_DBPDLK_2 (DBSC_D_BASE + 0x06a0U) +#define DBSC_DBPDLK_3 (DBSC_D_BASE + 0x06e0U) + +#define DBSC_DBPDRGA(ch) (DBSC_D_BASE + 0x0624U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDRGA_0 (DBSC_D_BASE + 0x0624U) +#define DBSC_DBPDRGA_1 (DBSC_D_BASE + 0x0664U) +#define DBSC_DBPDRGA_2 (DBSC_D_BASE + 0x06A4U) +#define DBSC_DBPDRGA_3 (DBSC_D_BASE + 0x06E4U) + +#define DBSC_DBPDRGD(ch) (DBSC_D_BASE + 0x0628U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDRGD_0 (DBSC_D_BASE + 0x0628U) +#define DBSC_DBPDRGD_1 (DBSC_D_BASE + 0x0668U) +#define DBSC_DBPDRGD_2 (DBSC_D_BASE + 0x06A8U) +#define DBSC_DBPDRGD_3 (DBSC_D_BASE + 0x06E8U) + +#define DBSC_DBPDSTAT0(ch) (DBSC_D_BASE + 0x0630U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDSTAT0_0 (DBSC_D_BASE + 0x0630U) +#define DBSC_DBPDSTAT1_0 (DBSC_D_BASE + 0x0670U) + +#define DBSC_DBPDSTAT1(ch) (DBSC_D_BASE + 0x0634U + 0x2000U * (ch & 0x02U) + 0x40U * (ch & 0x01U)) +#define DBSC_DBPDSTAT0_1 (DBSC_D_BASE + 0x0634U) +#define DBSC_DBPDSTA1T_1 (DBSC_D_BASE + 0x0674U) + +#define DBSC_DBCAM0CTRL0 (DBSC_A_BASE + 0x0940U) + +#define DBSC_DBCAMSTAT0(x) (DBSC_A_BASE + 0x0980U + 0x4000U *(x & 0x02U) + 0x10U * (x & 0x01U)) +#define DBSC_DBCAM0STAT0 (DBSC_A_BASE + 0x0980U) +#define DBSC_DBCAM1STAT0 (DBSC_A_BASE + 0x0990U) +#define DBSC_DBCAM2STAT0 (DBSC_A_BASE + 0x09A0U) +#define DBSC_DBCAM3STAT0 (DBSC_A_BASE + 0x09B0U) + +#define DBSC_DBCAMSTAT1(x) (DBSC_A_BASE + 0x0984U + 0x4000U *(x & 0x02U) + 0x10U * (x & 0x01U)) +#define DBSC_DBCAM0STAT1 (DBSC_A_BASE + 0x0984U) +#define DBSC_DBCAM1STAT1 (DBSC_A_BASE + 0x0994U) +#define DBSC_DBCAM2STAT1 (DBSC_A_BASE + 0x09A4U) +#define DBSC_DBCAM3STAT1 (DBSC_A_BASE + 0x09B4U) + +#define DBSC_DBBCAMDIS (DBSC_A_BASE + 0x09FCU) + +#define DBSC_DBSCHRW1 (DBSC_A_BASE + 0x1024U) + +#define DBSC_DBSCHTR0 (DBSC_A_BASE + 0x1030U) + +#define DBSC_DBSCHFCTST01(x) (DBSC_A_BASE + 0x1040U + 0x04U * (x)) +#define DBSC_DBSCHFCTST0 (DBSC_A_BASE + 0x1040U) +#define DBSC_DBSCHFCTST1 (DBSC_A_BASE + 0x1044U) + +#define DBSC_DBSCHQOS(x,y) (DBSC_A_BASE + 0x1100U + 0x10U * (x) + 0x04U * (y)) diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c new file mode 100644 index 00000000..dcfb84b2 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c @@ -0,0 +1,217 @@ +/******************************************************************************* + * Copyright (c) 2023-2024 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECC setting function + ******************************************************************************/ +/****************************************************************************** + * @file ecc_enable_v4m.c + * - Version : 0.03 + * @brief Enable setting process of ECC for DRAM. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 21.08.2023 0.01 First Release + * : 13.06.2024 0.02 Fix register setting for EDC_CFG, and revise + * : the ecm_lock()/ecm_unlock() process. + * : 07.04.2025 0.06 Remove unused functions. + *****************************************************************************/ + +#include +#include +#include +#include + +#if (ECM_ENABLE == 1) +#include "ecc_enable_v4m.h" +#include "v4m/lpddr5/boot_init_dram_regdef.h" +#include "ecm_enable_v4m.h" + +#define AXI_SICREMAP_NUM (5U) +#define RGID_BASE1 (0xFE600000U) +#define RGID_BASE2 (0xE7A00000U) +#define RGID_BASE3 (0xEB800000U) +#define RGID_BASE4 (0xFD800000U) +#define RGID_BASE5 (0xFEA00000U) + +#define FDT_COUNTER_MASK (0x0000FFFFU) + +static void axi_timeout_setting(void); + +void edc_axi_enable(void) +{ + uint32_t edc_tmp; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + /* (1) Set the corresponding bits of the ECMERRTGTR and ECMERRCTLR registers + to inform the external device of the error via the ERROROUT# pin. */ + + /* Set bit 11 - bit 2 of ECMERRTGTR7 to all 0 and bit 11 - bit 2 of + ECMERRCTLR7 to 1. (Error of AXI-Bus ECM of each hierarchy) */ + edc_tmp = mem_read32(ECMERRTGTR7); + edc_tmp &= ~(0x3FFU << 2U); + ecm_write(ECMERRTGTR7, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR7); + edc_tmp |= (0x3FFU << 2U); + ecm_write(ECMERRCTLR7, edc_tmp); + + /* Set bit 28 - bit 16 of ECMERRTGTR39 to all 0 and bit 28 - bit 16 of + ECMERRCTLR39 to 1. (Error of AXI-Bus ECM of each hierarchy) */ + edc_tmp = mem_read32(ECMERRTGTR39); + edc_tmp &= ~(0x1FFFU << 16U); + ecm_write(ECMERRTGTR39, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR39); + edc_tmp |= (0x1FFFU << 16U); + ecm_write(ECMERRCTLR39, edc_tmp); + + /* Set bit 26 of ECMERRTGTR1 to 0 and bit 26 of + ECMERRCTLR1 to 1. (CCI bus EDC error) */ + edc_tmp = mem_read32(ECMERRTGTR1); + edc_tmp &= ~(0x1U << 26U); + ecm_write(ECMERRTGTR1, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR1); + edc_tmp |= (0x1U << 26U); + ecm_write(ECMERRCTLR1, edc_tmp); + + axi_timeout_setting(); + + /* Lock the ECM registers */ + ecm_lock(); +} + +void edc_vram_enable(void) +{ + uint32_t edc_tmp; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + /* (1) Set the corresponding bits of the ECMERRTGTR and ECMERRCTLR registers + to inform the external device of the error via the ERROROUT# pin. */ + + /* Set bit 30 of ECMERRTGTR7 to 0 and bit 30 of ECMERRCTLR7 to 1. + (RT-VRAM edc 1-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR7); + edc_tmp &= ~(0x1U << 30U); + ecm_write(ECMERRTGTR7, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR7); + edc_tmp |= (0x1U << 30U); + ecm_write(ECMERRCTLR7, edc_tmp); + + /* Set bit 29 of ECMERRTGTR7 to 0 and bit 29 of ECMERRCTLR7 to 1. + (RT-VRAM edc multi-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR7); + edc_tmp &= ~(0x1U << 29U); + ecm_write(ECMERRTGTR7, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR7); + edc_tmp |= (0x1U << 29U); + ecm_write(ECMERRCTLR7, edc_tmp); + + /* Set bit 19 of ECMERRTGTR17 to 0 and bit 19 of ECMERRCTLR17 to 1. + (RT-VRAM edc 1-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR17); + edc_tmp &= ~(0x1U << 19U); + ecm_write(ECMERRTGTR17, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR17); + edc_tmp |= (0x1U << 19U); + ecm_write(ECMERRCTLR17, edc_tmp); + + /* Set bit 18 of ECMERRTGTR17 to 0 and bit 18 of ECMERRCTLR17 to 1. + (RT-VRAM edc multi-bit error) */ + edc_tmp = mem_read32(ECMERRTGTR17); + edc_tmp &= ~(0x1U << 18U); + ecm_write(ECMERRTGTR17, edc_tmp); + + edc_tmp = mem_read32(ECMERRCTLR17); + edc_tmp |= (0x1U << 18U); + ecm_write(ECMERRCTLR17, edc_tmp); + + /* Set bit 0 of EDC_CFG to 1. (EDC Error Control) */ + edc_tmp = mem_read32(EDC_CFG); + edc_tmp |= (0x1U << 0U); + mem_write32(EDC_CFG, edc_tmp); + + /* Lock the ECM registers */ + ecm_lock(); +} + +static void axi_timeout_setting(void) +{ + uint32_t reg; + uint32_t loop; + REMAP_TABLE axi_remap_tbl[AXI_SICREMAP_NUM] = { + {RGID_BASE1, 0U}, + {RGID_BASE2, 0U}, + {RGID_BASE3, 0U}, + {RGID_BASE4, 0U}, + {RGID_BASE5, 0U}, + }; + + /* Register of AXI Base */ + for (loop = 0U; loop < AXI_SICREMAP_NUM; loop++) + { + remap_register(axi_remap_tbl[loop].base_addr, &axi_remap_tbl[loop].rmp_addr); + } + + /* Set the COUNTER bits of the FDT_* registers for all safety-related modules to minimum value with 1ms or more. */ + for (loop = 0U; loop < FDT_REG_MAX; loop++) + { + reg = mem_read32(g_fdt_tbl[loop].reg_addr); + reg &= ~(FDT_COUNTER_MASK); + reg |= g_fdt_tbl[loop].value; + mem_write32(g_fdt_tbl[loop].reg_addr, reg); + + INFO("FDT[%d] =\t0x%08x \tsetting value = 0x%08x\n", loop, mem_read32(g_fdt_tbl[loop].reg_addr), g_fdt_tbl[loop].value); + } + + for(loop = 0U; loop < INTEN_REG_MAX; loop++) + { + /* Set access protection setting value of Region ID (AXI bus of Region ID register) */ + mem_write32(g_inten_tbl[loop].reg_addr, g_inten_tbl[loop].value); + + INFO("INTEN[%d] =\t0x%08x \tsetting value = 0x%08x\n", loop, mem_read32(g_inten_tbl[loop].reg_addr), g_inten_tbl[loop].value); + } + + /* Unregister of AXI Base */ + for (loop = 0U; loop < AXI_SICREMAP_NUM; loop++) + { + remap_unregister(axi_remap_tbl[loop].rmp_addr); + } + + wdt_restart(); +} +#endif /* ECM_ENABLE == 1 */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h new file mode 100644 index 00000000..8a04f4bc --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h @@ -0,0 +1,123 @@ +/******************************************************************************* + * Copyright (c) 2022-2024 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECC driver header + ******************************************************************************/ + +#ifndef ECC_PROTECT +#define ECC_PROTECT +#include "remap_register.h" +/* DBSC registers */ +#if defined(__RH850G3K__) +#include "mem_io.h" +#include "log.h" +#define DBSC_D_BASE (BASE_DBSC_ADDR + 0x14000U) /* forV4H DBSC0 clk_dbsc region DBSC1_D_BASE = 0xE67A8000U */ +#define DBSC_A_BASE (BASE_DBSC_ADDR) /* forV4H DBSC0 clk_axim region DBSC1_A_BASE = 0xE6798000U */ +#define ECM_BASE (BASE_ECC_ADDR) +#else +#include +#include +#define DBSC_D_BASE (0xE67A4000U) /* forV4H DBSC0 clk_dbsc region DBSC1_D_BASE = 0xE67A8000U */ +#define DBSC_A_BASE (0xE6790000U) /* forV4H DBSC0 clk_axim region DBSC1_A_BASE = 0xE6798000U */ +#define ECM_BASE (0xE6250000U) +#endif/* defined(__RH850G3K__) */ + +#define RTVRAM_REG_BASE (0xFFEC0000U) + +void edc_axi_enable(void); +void edc_vram_enable(void); + +#define DB0SYSCNT0 (DBSC_D_BASE + 0x0100U) +#define DB0SYSCNT0A (DBSC_A_BASE + 0x0100U) +#define DB1SYSCNT0 (DB0SYSCNT0 + 0x4000U) +#define DB1SYSCNT0A (DB0SYSCNT0A + 0x8000U) + +#define DBSC_DBACEN0 (DBSC_A_BASE + 0x0200U) +#define DBSC_DBACEN1 (DBSC_DBACEN0 + 0x8000U) + +#define ECMWACNTR (ECM_BASE + 0x0A04U) +#define ECMWPCNTR (ECM_BASE + 0x0A00U) +#define ECMERRTGTR0 (ECM_BASE + 0x0200U) +#define ECMERRCTLR0 (ECM_BASE + 0x0000U) +#define ECMERRTGTR1 (ECM_BASE + 0x0200U + 0x4U * 1U) +#define ECMERRCTLR1 (ECM_BASE + 0x0000U + 0x4U * 1U) +#define ECMERRTGTR7 (ECM_BASE + 0x0200U + 0x4U * 7U) +#define ECMERRCTLR7 (ECM_BASE + 0x0000U + 0x4U * 7U) +#define ECMERRTGTR17 (ECM_BASE + 0x0200U + 0x4U * 17U) +#define ECMERRCTLR17 (ECM_BASE + 0x0000U + 0x4U * 17U) +#define ECMERRTGTR39 (ECM_BASE + 0x0200U + 0x4U * 39U) +#define ECMERRCTLR39 (ECM_BASE + 0x0000U + 0x4U * 39U) +#define DB0FSCONF00A (DBSC_A_BASE + 0x7640U) +#define DB1FSCONF00A (DB0FSCONF00A + 0x8000U) +#define DB0FSCONF01A (DBSC_A_BASE + 0x7644U) +#define DB1FSCONF01A (DB0FSCONF01A + 0x8000U) +#define DB0FSCONF02A (DBSC_A_BASE + 0x7648U) +#define DB1FSCONF02A (DB0FSCONF02A + 0x8000U) +#define DB0FSCTRL01A (DBSC_A_BASE + 0x7604U) +#define DB1FSCTRL01A (DB0FSCTRL01A + 0x8000U) +#define DB0FSSTAT01A (DBSC_A_BASE + 0x7684U) +#define DB1FSSTAT01A (DB0FSSTAT01A + 0x8000U) +#define DB0FSSTAT00A (DBSC_A_BASE + 0x7680U) +#define DB1FSSTAT00A (DB0FSSTAT00A + 0x8000U) +#define DB0FSINTENB02A (DBSC_A_BASE + 0x7088U) +#define DB1FSINTENB02A (DB0FSINTENB02A + 0x8000U) +#define DB0FSINTENB04A (DBSC_A_BASE + 0x7090U) +#define DB1FSINTENB04A (DB0FSINTENB04A + 0x8000U) + +#define DB0FSDRAMECCAREA0 (DBSC_A_BASE + 0x7450U) +#define DB0FSDRAMECCAREA1 (DBSC_A_BASE + 0x7454U) +#define DB1FSDRAMECCAREA0 (DB0FSDRAMECCAREA0 + 0x8000U) +#define DB1FSDRAMECCAREA1 (DB0FSDRAMECCAREA1 + 0x8000U) + +#define DB0FSCONFAXI0 (DBSC_A_BASE + 0x7400U) +#define DB1FSCONFAXI0 (DB0FSCONFAXI0 + 0x8000U) + +#define EDC_CFG (RTVRAM_REG_BASE + 0x4110U) + +/********************* Set by the user *********************/ +/* The row address of ECC Protection Area Size for memory rank 0/1 of DBSC0/1 */ +#define ECC_PROT_SIZE00 (0x1000U) +#define ECC_PROT_SIZE01 (0x1000U) +#define ECC_PROT_SIZE10 (0x1000U) +#define ECC_PROT_SIZE11 (0x1000U) + +/* Start and End row address of ECC Protection area for rank0 of DBSC0/1 */ +#define START_ECC_INIT_AREA00 (0x00000000U) +#define START_ECC_INIT_AREA10 (0x00000000U) +#define END_ECC_INIT_AREA00 (0x00000FFFU) +#define END_ECC_INIT_AREA10 (0x00000FFFU) + +/* Start and End row address of ECC Protection area for rank1 of DBSC0/1 */ +#define START_ECC_INIT_AREA01 (0x00000000U) +#define START_ECC_INIT_AREA11 (0x00000000U) +#define END_ECC_INIT_AREA01 (0x00000FFFU) +#define END_ECC_INIT_AREA11 (0x00000FFFU) +/*********** Other settings cannot be changed ***************/ + +#endif/* ECC_PROTECT */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c new file mode 100644 index 00000000..4c615e41 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c @@ -0,0 +1,534 @@ +/******************************************************************************* + * Copyright (c) 2025 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECM initialize function + ******************************************************************************/ +/****************************************************************************** + * @file ecm_enable_v4m.c + * - Version : 0.01 + * @brief ECM setting. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 29.01.2025 0.01 First Release + *****************************************************************************/ + +#include +#include "ecm_enable_v4m.h" + +#if (ECM_ERROR_ENABLE == 1) +#include "log.h" +#endif /* ECM_ERROR_ENABLE == 1 */ +#if ((ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1)) +#include "ecc_enable_v4m.h" +#include "mem_io.h" +#endif /* (ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1) */ + +#if (ECM_ERROR_ENABLE == 1) +#define TYPE1_ECM_REG_MAX (14U) +#define TYPE2_ECM_REG_MAX (21U) +#define TYPE3_ECM_CTLREG_MAX (1U) +#define TYPE3_ECM_TGTREG_MAX (2U) + +typedef struct{ + uint32_t phys_addr; /* Physical address of ECM registers. */ + uint32_t value; /* Setting value of ECM registers. */ +} ECM_ERROR_TABLE; +#endif /* ECM_ERROR_ENABLE == 1 */ + +#if ((ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1)) +void ecm_unlock(void) +{ + mem_write32(ECMWPCNTR, 0xACCE0001U); +} + +void ecm_write(uint32_t adr, uint32_t val) +{ + mem_write32(ECMWACNTR, ((0xACCEU << 16U) | (adr & 0xffffU))); + mem_write32(adr, val); +} + +void ecm_lock(void) +{ + mem_write32(ECMWPCNTR, 0xACCE0000U); +} +#endif /* (ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1) */ + +#if (ECM_ERROR_ENABLE == 1) +void ecm_init_setting(void) +{ + uint32_t reg; + uint32_t loop; + + const ECM_ERROR_TABLE ecmerrctlr_type1_tbl[TYPE1_ECM_REG_MAX] = { + [0] = {0xFD850000U, 0x00381000U}, /* ECMERRCTLR0 */ + [1] = {0xFD850004U, 0xA400C000U}, /* ECMERRCTLR1 */ + /* Skip ECMERRCTLR2 setting */ + /* Skip ECMERRCTLR3 setting */ + /* Skip ECMERRCTLR4 setting */ + /* Skip ECMERRCTLR5 setting */ + [2] = {0xFD850018U, 0xCC000000U}, /* ECMERRCTLR6 */ + [3] = {0xFD85001CU, 0x08000000U}, /* ECMERRCTLR7 */ + /* Skip ECMERRCTLR8 setting */ + /* Skip ECMERRCTLR9 setting */ + /* Skip ECMERRCTLR10 setting */ + /* Skip ECMERRCTLR11 setting */ + /* Skip ECMERRCTLR12 setting */ + /* Skip ECMERRCTLR13 setting */ + /* Skip ECMERRCTLR14 setting */ + /* Skip ECMERRCTLR15 setting */ + /* Skip ECMERRCTLR16 setting */ + [4] = {0xFD850044U, 0x2D001000U}, /* ECMERRCTLR17 */ + [5] = {0xFD850048U, 0x0CC001FFU}, /* ECMERRCTLR18 */ + [6] = {0xFD85004CU, 0xFFF80000U}, /* ECMERRCTLR19 */ + [7] = {0xFD850050U, 0x0000001EU}, /* ECMERRCTLR20 */ + [8] = {0xFD850054U, 0x9F000000U}, /* ECMERRCTLR21 */ + /* Skip ECMERRCTLR22 setting */ + /* Skip ECMERRCTLR23 setting */ + /* Skip ECMERRCTLR24 setting */ + /* Skip ECMERRCTLR25 setting */ + /* Skip ECMERRCTLR26 setting */ + /* Skip ECMERRCTLR27 setting */ + /* Skip ECMERRCTLR28 setting */ + /* Skip ECMERRCTLR29 setting */ + /* Skip ECMERRCTLR30 setting */ + /* Skip ECMERRCTLR31 setting */ + [9] = {0xFD850080U, 0x10000000U}, /* ECMERRCTLR32 */ + [10] = {0xFD850084U, 0x10000000U}, /* ECMERRCTLR33 */ + /* Skip ECMERRCTLR34 setting */ + [11] = {0xFD85008CU, 0x20002280U}, /* ECMERRCTLR35 */ + /* Skip ECMERRCTLR36 setting */ + /* Skip ECMERRCTLR37 setting */ + [12] = {0xFD850098U, 0x33300054U}, /* ECMERRCTLR38 */ + /* Skip ECMERRCTLR39 setting */ + /* Skip ECMERRCTLR40 setting */ + [13] = {0xFD8500A4U, 0x01000880U}, /* ECMERRCTLR41 */ + /* Skip ECMERRCTLR42 setting */ + }; + + const ECM_ERROR_TABLE ecmerrtgtr_type1_tbl[TYPE1_ECM_REG_MAX] = { + [0] = {0xFD850200U, 0x00381000U}, /* ECMERRTGTR0 */ + [1] = {0xFD850204U, 0xA400C000U}, /* ECMERRTGTR1 */ + /* Skip ECMERRTGTR2 setting */ + /* Skip ECMERRTGTR3 setting */ + /* Skip ECMERRTGTR4 setting */ + /* Skip ECMERRTGTR5 setting */ + [2] = {0xFD850218U, 0xCC000000U}, /* ECMERRTGTR6 */ + [3] = {0xFD85021CU, 0x08000000U}, /* ECMERRTGTR7 */ + /* Skip ECMERRTGTR8 setting */ + /* Skip ECMERRTGTR9 setting */ + /* Skip ECMERRTGTR10 setting */ + /* Skip ECMERRTGTR11 setting */ + /* Skip ECMERRTGTR12 setting */ + /* Skip ECMERRTGTR13 setting */ + /* Skip ECMERRTGTR14 setting */ + /* Skip ECMERRTGTR15 setting */ + /* Skip ECMERRTGTR16 setting */ + [4] = {0xFD850244U, 0x2D001000U}, /* ECMERRTGTR17 */ + [5] = {0xFD850248U, 0x0CC001FFU}, /* ECMERRTGTR18 */ + [6] = {0xFD85024CU, 0xFFF80000U}, /* ECMERRTGTR19 */ + [7] = {0xFD850250U, 0x0000001EU}, /* ECMERRTGTR20 */ + [8] = {0xFD850254U, 0x9F000000U}, /* ECMERRTGTR21 */ + /* Skip ECMERRTGTR22 setting */ + /* Skip ECMERRTGTR23 setting */ + /* Skip ECMERRTGTR24 setting */ + /* Skip ECMERRTGTR25 setting */ + /* Skip ECMERRTGTR26 setting */ + /* Skip ECMERRTGTR27 setting */ + /* Skip ECMERRTGTR28 setting */ + /* Skip ECMERRTGTR29 setting */ + /* Skip ECMERRTGTR30 setting */ + /* Skip ECMERRTGTR31 setting */ + [9] = {0xFD850280U, 0x10000000U}, /* ECMERRTGTR32 */ + [10] = {0xFD850284U, 0x10000000U}, /* ECMERRTGTR33 */ + /* Skip ECMERRTGTR34 setting */ + [11] = {0xFD85028CU, 0x20002280U}, /* ECMERRTGTR35 */ + /* Skip ECMERRTGTR36 setting */ + /* Skip ECMERRTGTR37 setting */ + [12] = {0xFD850298U, 0x33300054U}, /* ECMERRTGTR38 */ + /* Skip ECMERRTGTR39 setting */ + /* Skip ECMERRTGTR40 setting */ + [13] = {0xFD8502A4U, 0x01000880U}, /* ECMERRTGTR41 */ + /* Skip ECMERRTGTR42 setting */ + }; + + const ECM_ERROR_TABLE ecmerrctlr_type2_tbl[TYPE2_ECM_REG_MAX] = { + [0] = {0xFD850000U, 0x40000003U}, /* ECMERRCTLR0 */ + [1] = {0xFD850004U, 0x04004000U}, /* ECMERRCTLR1 */ + [2] = {0xFD850008U, 0xFFFFFFFFU}, /* ECMERRCTLR2 */ + [3] = {0xFD85000CU, 0xFFFFFFFFU}, /* ECMERRCTLR3 */ + [4] = {0xFD850010U, 0xFFFFFFFFU}, /* ECMERRCTLR4 */ + [5] = {0xFD850014U, 0x81FFFFFFU}, /* ECMERRCTLR5 */ + [6] = {0xFD850018U, 0x15000A80U}, /* ECMERRCTLR6 */ + [7] = {0xFD85001CU, 0x00801481U}, /* ECMERRCTLR7 */ + /* Skip ECMERRCTLR8 setting */ + /* Skip ECMERRCTLR9 setting */ + /* Skip ECMERRCTLR10 setting */ + /* Skip ECMERRCTLR11 setting */ + /* Skip ECMERRCTLR12 setting */ + /* Skip ECMERRCTLR13 setting */ + /* Skip ECMERRCTLR14 setting */ + /* Skip ECMERRCTLR15 setting */ + [8] = {0xFD850040U, 0x00003E9FU}, /* ECMERRCTLR16 */ + [9] = {0xFD850044U, 0x00938060U}, /* ECMERRCTLR17 */ + [10] = {0xFD850048U, 0x00341600U}, /* ECMERRCTLR18 */ + [11] = {0xFD85004CU, 0x0007FF30U}, /* ECMERRCTLR19 */ + [12] = {0xFD850050U, 0x02200220U}, /* ECMERRCTLR20 */ + [13] = {0xFD850054U, 0x0061820FU}, /* ECMERRCTLR21 */ + /* Skip ECMERRCTLR22 setting */ + /* Skip ECMERRCTLR23 setting */ + /* Skip ECMERRCTLR24 setting */ + /* Skip ECMERRCTLR25 setting */ + /* Skip ECMERRCTLR26 setting */ + /* Skip ECMERRCTLR27 setting */ + /* Skip ECMERRCTLR28 setting */ + /* Skip ECMERRCTLR29 setting */ + /* Skip ECMERRCTLR30 setting */ + /* Skip ECMERRCTLR31 setting */ + [14] = {0xFD850080U, 0x03E9043BU}, /* ECMERRCTLR32 */ + [15] = {0xFD850084U, 0x03E9043BU}, /* ECMERRCTLR33 */ + /* Skip ECMERRCTLR34 setting */ + [16] = {0xFD85008CU, 0x83B00800U}, /* ECMERRCTLR35 */ + [17] = {0xFD850090U, 0xFFFFFFFFU}, /* ECMERRCTLR36 */ + /* Skip ECMERRCTLR37 setting */ + [18] = {0xFD850098U, 0x00000002U}, /* ECMERRCTLR38 */ + /* Skip ECMERRCTLR39 setting */ + [19] = {0xFD8500A0U, 0x0000601EU}, /* ECMERRCTLR40 */ + [20] = {0xFD8500A4U, 0x20010000U}, /* ECMERRCTLR41 */ + /* Skip ECMERRCTLR42 setting */ + }; + + const ECM_ERROR_TABLE ecmerrtgtr_type2_tbl[TYPE2_ECM_REG_MAX] = { + [0] = {0xFD850200U, 0x40000003U}, /* ECMERRTGTR0 */ + [1] = {0xFD850204U, 0x04004000U}, /* ECMERRTGTR1 */ + [2] = {0xFD850208U, 0xFFFFFFFFU}, /* ECMERRTGTR2 */ + [3] = {0xFD85020CU, 0xFFFFFFFFU}, /* ECMERRTGTR3 */ + [4] = {0xFD850210U, 0xFFFFFFFFU}, /* ECMERRTGTR4 */ + [5] = {0xFD850214U, 0x81FFFFFFU}, /* ECMERRTGTR5 */ + [6] = {0xFD850218U, 0x15000A80U}, /* ECMERRTGTR6 */ + [7] = {0xFD85021CU, 0x00801481U}, /* ECMERRTGTR7 */ + /* Skip ECMERRTGTR8 setting */ + /* Skip ECMERRTGTR9 setting */ + /* Skip ECMERRTGTR10 setting */ + /* Skip ECMERRTGTR11 setting */ + /* Skip ECMERRTGTR12 setting */ + /* Skip ECMERRTGTR13 setting */ + /* Skip ECMERRTGTR14 setting */ + /* Skip ECMERRTGTR15 setting */ + [8] = {0xFD850240U, 0x00003E9FU}, /* ECMERRTGTR16 */ + [9] = {0xFD850244U, 0x00938060U}, /* ECMERRTGTR17 */ + [10] = {0xFD850248U, 0x00341600U}, /* ECMERRTGTR18 */ + [11] = {0xFD85024CU, 0x0007FF30U}, /* ECMERRTGTR19 */ + [12] = {0xFD850250U, 0x02200220U}, /* ECMERRTGTR20 */ + [13] = {0xFD850254U, 0x0061820FU}, /* ECMERRTGTR21 */ + /* Skip ECMERRTGTR22 setting */ + /* Skip ECMERRTGTR23 setting */ + /* Skip ECMERRTGTR24 setting */ + /* Skip ECMERRTGTR25 setting */ + /* Skip ECMERRTGTR26 setting */ + /* Skip ECMERRTGTR27 setting */ + /* Skip ECMERRTGTR28 setting */ + /* Skip ECMERRTGTR29 setting */ + /* Skip ECMERRTGTR30 setting */ + /* Skip ECMERRTGTR31 setting */ + [14] = {0xFD850280U, 0x03E9043BU}, /* ECMERRTGTR32 */ + [15] = {0xFD850284U, 0x03E9043BU}, /* ECMERRTGTR33 */ + /* Skip ECMERRTGTR34 setting */ + [16] = {0xFD85028CU, 0x83B00800U}, /* ECMERRTGTR35 */ + [17] = {0xFD850290U, 0xFFFFFFFFU}, /* ECMERRTGTR36 */ + /* Skip ECMERRTGTR37 setting */ + [18] = {0xFD850298U, 0x00000002U}, /* ECMERRTGTR38 */ + /* Skip ECMERRTGTR39 setting */ + [19] = {0xFD8502A0U, 0x0000601EU}, /* ECMERRTGTR40 */ + [20] = {0xFD8502A4U, 0x20010000U}, /* ECMERRTGTR41 */ + /* Skip ECMERRTGTR42 setting */ + }; + + const ECM_ERROR_TABLE ecmerrctlr_type3_tbl[TYPE3_ECM_CTLREG_MAX] = { + /* Skip ECMERRCTLR0 setting */ + /* Skip ECMERRCTLR1 setting */ + /* Skip ECMERRCTLR2 setting */ + /* Skip ECMERRCTLR3 setting */ + /* Skip ECMERRCTLR4 setting */ + /* Skip ECMERRCTLR5 setting */ + /* Skip ECMERRCTLR6 setting */ + /* Skip ECMERRCTLR7 setting */ + /* Skip ECMERRCTLR8 setting */ + /* Skip ECMERRCTLR9 setting */ + /* Skip ECMERRCTLR10 setting */ + /* Skip ECMERRCTLR11 setting */ + /* Skip ECMERRCTLR12 setting */ + /* Skip ECMERRCTLR13 setting */ + /* Skip ECMERRCTLR14 setting */ + /* Skip ECMERRCTLR15 setting */ + [0] = {0xFD850040U, 0x33F00000U}, /* ECMERRCTLR16 */ + /* Skip ECMERRCTLR17 setting */ + /* Skip ECMERRCTLR18 setting */ + /* Skip ECMERRCTLR19 setting */ + /* Skip ECMERRCTLR20 setting */ + /* Skip ECMERRCTLR21 setting */ + /* Skip ECMERRCTLR22 setting */ + /* Skip ECMERRCTLR23 setting */ + /* Skip ECMERRCTLR24 setting */ + /* Skip ECMERRCTLR25 setting */ + /* Skip ECMERRCTLR26 setting */ + /* Skip ECMERRCTLR27 setting */ + /* Skip ECMERRCTLR28 setting */ + /* Skip ECMERRCTLR29 setting */ + /* Skip ECMERRCTLR30 setting */ + /* Skip ECMERRCTLR31 setting */ + /* Skip ECMERRCTLR32 setting */ + /* Skip ECMERRCTLR33 setting */ + /* Skip ECMERRCTLR34 setting */ + /* Skip ECMERRCTLR35 setting */ + /* Skip ECMERRCTLR36 setting */ + /* Skip ECMERRCTLR37 setting */ + /* Skip ECMERRCTLR38 setting */ + /* Skip ECMERRCTLR39 setting */ + /* Skip ECMERRCTLR40 setting */ + /* Skip ECMERRCTLR41 setting */ + /* Skip ECMERRCTLR42 setting */ + }; + + const ECM_ERROR_TABLE ecmerrtgtr_type3_tbl[TYPE3_ECM_TGTREG_MAX] = { + [0] = {0xFD850200U, 0x80000000U}, /* ECMERRTGTR0 */ + /* Skip ECMERRTGTR1 setting */ + /* Skip ECMERRTGTR2 setting */ + /* Skip ECMERRTGTR3 setting */ + /* Skip ECMERRTGTR4 setting */ + /* Skip ECMERRTGTR5 setting */ + /* Skip ECMERRTGTR6 setting */ + /* Skip ECMERRTGTR7 setting */ + /* Skip ECMERRTGTR8 setting */ + /* Skip ECMERRTGTR9 setting */ + /* Skip ECMERRTGTR10 setting */ + /* Skip ECMERRTGTR11 setting */ + /* Skip ECMERRTGTR12 setting */ + /* Skip ECMERRTGTR13 setting */ + /* Skip ECMERRTGTR14 setting */ + /* Skip ECMERRTGTR15 setting */ + [1] = {0xFD850240U, 0x33F00000U}, /* ECMERRTGTR16 */ + /* Skip ECMERRTGTR17 setting */ + /* Skip ECMERRTGTR18 setting */ + /* Skip ECMERRTGTR19 setting */ + /* Skip ECMERRTGTR20 setting */ + /* Skip ECMERRTGTR21 setting */ + /* Skip ECMERRTGTR22 setting */ + /* Skip ECMERRTGTR23 setting */ + /* Skip ECMERRTGTR24 setting */ + /* Skip ECMERRTGTR25 setting */ + /* Skip ECMERRTGTR26 setting */ + /* Skip ECMERRTGTR27 setting */ + /* Skip ECMERRTGTR28 setting */ + /* Skip ECMERRTGTR29 setting */ + /* Skip ECMERRTGTR30 setting */ + /* Skip ECMERRTGTR31 setting */ + /* Skip ECMERRTGTR32 setting */ + /* Skip ECMERRTGTR33 setting */ + /* Skip ECMERRTGTR34 setting */ + /* Skip ECMERRTGTR35 setting */ + /* Skip ECMERRTGTR36 setting */ + /* Skip ECMERRTGTR37 setting */ + /* Skip ECMERRTGTR38 setting */ + /* Skip ECMERRTGTR39 setting */ + /* Skip ECMERRTGTR40 setting */ + /* Skip ECMERRTGTR41 setting */ + /* Skip ECMERRTGTR42 setting */ + }; + + /* Unlock the write protect of ECM registers */ + ecm_unlock(); + + NOTICE("ECMERRCTLR and ECMERRTGTR register initial setting.\n"); + /* For the initial setting flow for Type-1, please refer to the following + * section in the "SAN(Safety Application Note)." + * Section 4.1.2.5 : (1) + * Section 4.1.4.5 : (1) + * Section 4.12.1.5 : (1) + * Section 4.14.5 : (1) + * Section 4.2.7.5 : (1) + * Section 4.2.9.5 : (1) + * Section 4.23.5 : (1) + * Section 4.25.5 : (1) + * Section 4.3.14.5 : (1) + * Section 4.3.19.5 : (1) + * Section 4.3.21.5 : (1) + * Section 4.4.16.5 : (1) + * Section 4.4.18.5 : (1) + * Section 4.4.20.5 : (1) + * Section 4.4.3.5 : (1) + * Section 4.4.4.5 : (1) + * Section 4.4.6.5 : (1) + * Section 4.4.7.5 : (1) + * Section 4.4.9.5 : (1) + * Section 4.5.1.5 : (1) + * Section 4.7.1.5 : (1) + * Section 4.7.10.5 : (1) + * Section 4.7.3.5 : (1) + * Section 4.7.4.5 : (1) + * Section 4.7.7.5 : (1) + * Section 4.7.8.5 : (1) + * Section 5.8.1.5 : (1) + */ + for (loop = 0U; loop < TYPE1_ECM_REG_MAX; loop++) + { + /* Initial Setting Type-1 for ECMERRCTLR registers */ + reg = mem_read32(ecmerrctlr_type1_tbl[loop].phys_addr); + reg |= (ecmerrctlr_type1_tbl[loop].value); + ecm_write(ecmerrctlr_type1_tbl[loop].phys_addr, reg); + + INFO("[Type-1]ECMERRCTLR[\t%d]\t(0x%x) =\t0x%x \tsetting value = 0x%x\n", + loop, + ecmerrctlr_type1_tbl[loop].phys_addr, + mem_read32(ecmerrctlr_type1_tbl[loop].phys_addr), + ecmerrctlr_type1_tbl[loop].value); + } + + for (loop = 0U; loop < TYPE1_ECM_REG_MAX; loop++) + { + /* Initial Setting Type-1 for ECMERRTGTR registers */ + reg = mem_read32(ecmerrtgtr_type1_tbl[loop].phys_addr); + reg &= ~(ecmerrtgtr_type1_tbl[loop].value); + ecm_write(ecmerrtgtr_type1_tbl[loop].phys_addr, reg); + + INFO("[Type-1]ECMERRTGTR[\t%d]\t(0x%x) =\t0x%x \tsetting value = 0x%x\n", + loop, + ecmerrtgtr_type1_tbl[loop].phys_addr, + mem_read32(ecmerrtgtr_type1_tbl[loop].phys_addr), + ecmerrtgtr_type1_tbl[loop].value); + } + + /* For the initial setting flow for Type-2, please refer to the following + * section in the "SAN(Safety Application Note)." + * Section 4.1.1.5 : (1) + * Section 4.12.2.5 : (1) + * Section 4.12.3.5 : (1) + * Section 4.15.5 : (1) + * Section 4.16.5 : (1) + * Section 4.18.5 : (1) + * Section 4.2.1.5 : (1) + * Section 4.2.10.5 : (1) + * Section 4.2.12.5 : (1) + * Section 4.2.2.5 : (1) + * Section 4.2.4.5 : (1) + * Section 4.2.8.5 : (1) + * Section 4.3.1.5 : (1) + * Section 4.3.10.5 : (1) + * Section 4.3.11.5 : (1) + * Section 4.3.12.5 : (1) + * Section 4.3.13.5 : (1) + * Section 4.3.15.5 : (1) + * Section 4.3.16.5 : (1) + * Section 4.3.2.5 : (1) + * Section 4.3.5.5 : (1) + * Section 4.3.7.5 : (1) + * Section 4.3.8.5 : (1) + * Section 4.4.10.5 : (1) + * Section 4.4.12.5 : (6) + * Section 4.4.13.5 : (1) + * Section 4.4.14.5 : (1) + * Section 4.4.15.5 : (1) + * Section 4.4.2.5 : (1) + * Section 4.5.3.5 : (1) + * Section 4.6.5 : (1) + * Section 4.7.2.5 : (1) + * Section 5.11.5 : (1) + * Section 5.12.5 : (1) + * Section 5.13.5 : (1) + * Section 5.4.5 : (1) + * Section 5.6.5 : (1) + * Section 5.8.2.5 : (1) + */ + for (loop = 0U; loop < TYPE2_ECM_REG_MAX; loop++) + { + /* Initial Setting Type-2 for ECMERRCTLR registers */ + reg = mem_read32(ecmerrctlr_type2_tbl[loop].phys_addr); + reg |= (ecmerrctlr_type2_tbl[loop].value); + ecm_write(ecmerrctlr_type2_tbl[loop].phys_addr, reg); + + INFO("[Type-2]ECMERRCTLR[\t%d]\t(0x%x) =\t0x%x \tsetting value = 0x%x\n", + loop, + ecmerrctlr_type2_tbl[loop].phys_addr, + mem_read32(ecmerrctlr_type2_tbl[loop].phys_addr), + ecmerrctlr_type2_tbl[loop].value); + } + + for (loop = 0U; loop < TYPE2_ECM_REG_MAX; loop++) + { + /* Initial Setting Type-2 for ECMERRTGTR registers */ + reg = mem_read32(ecmerrtgtr_type2_tbl[loop].phys_addr); + reg &= ~(ecmerrtgtr_type2_tbl[loop].value); + ecm_write(ecmerrtgtr_type2_tbl[loop].phys_addr, reg); + + INFO("[Type-2]ECMERRTGTR[\t%d]\t(0x%x) =\t0x%x \tsetting value = 0x%x\n", + loop, + ecmerrtgtr_type2_tbl[loop].phys_addr, + mem_read32(ecmerrtgtr_type2_tbl[loop].phys_addr), + ecmerrtgtr_type2_tbl[loop].value); + } + + /* For the initial setting flow for Type-3, please refer to the following + * section in the "SAN(Safety Application Note)." + * Section 4.19.1.5 : (3) + * Section 6.2.5 : (12) + */ + for (loop = 0U; loop < TYPE3_ECM_CTLREG_MAX; loop++) + { + /* Initial Setting Type-3 for ECMERRCTLR registers */ + reg = mem_read32(ecmerrctlr_type3_tbl[loop].phys_addr); + reg |= (ecmerrctlr_type3_tbl[loop].value); + ecm_write(ecmerrctlr_type3_tbl[loop].phys_addr, reg); + + INFO("[Type-3]ECMERRCTLR[\t%d]\t(0x%x) =\t0x%x \tsetting value = 0x%x\n", + loop, + ecmerrctlr_type3_tbl[loop].phys_addr, + mem_read32(ecmerrctlr_type3_tbl[loop].phys_addr), + ecmerrctlr_type3_tbl[loop].value); + } + + for (loop = 0U; loop < TYPE3_ECM_TGTREG_MAX; loop++) + { + /* Initial Setting Type-3 for ECMERRTGTR registers */ + reg = mem_read32(ecmerrtgtr_type3_tbl[loop].phys_addr); + reg &= ~(ecmerrtgtr_type3_tbl[loop].value); + ecm_write(ecmerrtgtr_type3_tbl[loop].phys_addr, reg); + + INFO("[Type-3]ECMERRTGTR[\t%d]\t(0x%x) =\t0x%x \tsetting value = 0x%x\n", + loop, + ecmerrtgtr_type3_tbl[loop].phys_addr, + mem_read32(ecmerrtgtr_type3_tbl[loop].phys_addr), + ecmerrtgtr_type3_tbl[loop].value); + } + + /* Lock the ECM registers */ + ecm_lock(); +} +/* End of function ecm_init_setting(void) */ +#endif /* ECM_ERROR_ENABLE == 1 */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h new file mode 100644 index 00000000..2c2f80bb --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h @@ -0,0 +1,47 @@ +/******************************************************************************* + * Copyright (c) 2025 Renesas Electronics Corporation. All rights reserved. + * + * RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY + * + * This software is provided as reference/sample code under the license + * agreement between Renesas Electronics Corporation and licensee (the + * "License Agreement") and shall be treated as specified in the License + * Agreement. + * These instructions, statements, and software are the confidential + * information of Renesas Electronics Corporation. They must be used and + * modified solely for the purpose for which it was furnished by Renesas + * Electronics Corporation. All or part of these instructions, statements and + * software must not be reproduced nor disclosed to any third party in any + * form, unless permitted by the License Agreement. + * + * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, + * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED. + * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + ******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECM driver header + ******************************************************************************/ + +#ifndef ECM_ENABLE_V4M +#define ECM_ENABLE_V4M + +#if ((ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1)) +void ecm_unlock(void); +void ecm_write(uint32_t adr, uint32_t val); +void ecm_lock(void); +#endif /* (ECM_ERROR_ENABLE == 1) || (ECM_ENABLE == 1) */ + +#if (ECM_ERROR_ENABLE == 1) +void ecm_init_setting(void); +#endif /* ECM_ERROR_ENABLE == 1 */ + +#endif/* ECM_ENABLE_V4M */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/dma/dma.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/dma/dma.c new file mode 100644 index 00000000..a9d6e775 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/dma/dma.c @@ -0,0 +1,182 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : DMA driver + ******************************************************************************/ +/****************************************************************************** + * @file dma.c + * - Version : 0.07 + * @brief DMA driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 30.09.2021 0.02 Change function name load_start and + * load_end function. + * : 15.10.2021 0.03 modified to not use CHCLR. + * : 06.01.2022 0.04 Add exception handling for ICUMX_WDTA. + * : 02.02.2022 0.05 Add MFIS Lock/Unlock. + * : 22.06.2022 0.06 Replace address align check to function. + * : Remove some defines. + * : 20.12.2022 0.07 Add mask when writing to TCR register. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define DMOR_INIT (uint16_t)(0x0301U) +#define DMOR_HW_INIT (uint16_t)(0x0000U) +#define TCR_CNT_SHIFT (6U) +#define TCR_UPPER8BIT_MASK (0x00FFFFFFU) +#define CHCR_TRN_MODE (0x00105409U) +#define CHCR_TE_BIT (0x00000002U) +#define TE_FLAG (0x00000000U) +#define CHCR_CAE_BIT (0x80000000U) +#define CHCR_CAE_BIT_NOERROR (0x00000000U) +#define CHCR_CAIE_BIT (0x40000000U) +#define CHCR_DPM_BIT (0x30000000U) +#define CHCR_RPT_BIT (0x0F000000U) +#define CHCR_WAIT_BIT (0x00800000U) +#define CHCR_DPB_BIT (0x00400000U) +#define CHCR_DSE_BIT (0x00080000U) +#define CHCR_DSIE_BIT (0x00040000U) +#define CHCR_DM_BIT (0x0000C000U) +#define CHCR_SM_BIT (0x00003000U) +#define CHCR_RS_BIT (0x00000F00U) +#define CHCR_TS_BIT (0x00300018U) +#define CHCR_IE_BIT (0x00000004U) +#define CHCR_TE_BIT (0x00000002U) +#define CHCR_DE_BIT (0x00000001U) +#define CHCR_CONF_MASK (CHCR_TS_BIT | CHCR_DM_BIT | CHCR_SM_BIT | CHCR_RS_BIT | CHCR_DE_BIT) +#define CHCR_DESCRIPTOR_CONF_MASK (CHCR_DPM_BIT | CHCR_RPT_BIT | CHCR_WAIT_BIT | CHCR_DPB_BIT) +#define CHCR_INTERRUPT_MASK (CHCR_CAIE_BIT | CHCR_DSIE_BIT | CHCR_IE_BIT) +#define CHCR_FLAG_MASK (CHCR_CAE_BIT | CHCR_DSE_BIT | CHCR_TE_BIT) +#define CHCR_ALL_BIT_MASK (CHCR_CONF_MASK | CHCR_DESCRIPTOR_CONF_MASK | CHCR_INTERRUPT_MASK | CHCR_FLAG_MASK) +#define DAR_HW_INIT (0x00000000U) +#define SAR_HW_INIT (0x00000000U) +#define TCR_HW_INIT (0x00000000U) + +/* fraction mask for 256-byte units */ +#define FRACTION_MASK_256_BYTE (0x000000FFU) + +void dma_init(void) +{ + uint32_t reg; + + /* DMA operation */ + mem_write16(RTDMA_DMOR, DMOR_INIT); + /* DMA secure control register */ + reg = mem_read32(RTDMA_DMSEC); + reg |= ((uint32_t)1U << DMACH); + mem_write32(RTDMA_DMSEC, reg); + + reg = mem_read32(dma_get_rtdma_chcr_addr(DMACH)); + reg &= ~(CHCR_ALL_BIT_MASK); + mem_write32(dma_get_rtdma_chcr_addr(DMACH), reg); +} +/* End of function dma_init(void) */ + +void dma_trans_start(uint32_t dst, uint32_t src, uint32_t len) +{ + uint32_t reg; + + /* dst and src must be 64-byte boundary. */ + dma_address_align_check(dst, src); + + /* round up 256 byte alignment */ + len += FRACTION_MASK_256_BYTE; + len &= (~(uint32_t)(FRACTION_MASK_256_BYTE)); + + /* DMA destination address */ + mem_write32(dma_get_rtdma_dar_addr(DMACH), dst); + /* DMA source address */ + mem_write32(dma_get_rtdma_sar_addr(DMACH), src); + /* DMA 64bytes-unit transfer count */ + mem_write32(dma_get_rtdma_tcr_addr(DMACH), ((len >> TCR_CNT_SHIFT) & TCR_UPPER8BIT_MASK)); + /* Lock to avoid conflict with RPC */ + mfis_lock(); + /* DMA channel control */ + reg = mem_read32(dma_get_rtdma_chcr_addr(DMACH)); + reg |= CHCR_TRN_MODE; + mem_write32(dma_get_rtdma_chcr_addr(DMACH), reg); +} +/* End of function dma_trans_start(uint32_t dst, uint32_t src, uint32_t len) */ + +void dma_trans_end_check(void) +{ + uint32_t reg; + + /* Check end of DMA transfer. */ + do + { + wdt_restart(); + reg = mem_read32(dma_get_rtdma_chcr_addr(DMACH)); + /* Check error of DMA transfer */ + if ((reg & CHCR_CAE_BIT) != CHCR_CAE_BIT_NOERROR) + { + ERROR("DMA - Channel Address Error\n"); + panic; + } + } while ((reg & CHCR_TE_BIT) == TE_FLAG); + + reg = mem_read32(dma_get_rtdma_chcr_addr(DMACH)); + reg &= ~(CHCR_ALL_BIT_MASK); + mem_write32(dma_get_rtdma_chcr_addr(DMACH), reg); + + rpc_end_state_check(); + /* Unlock to avoid conflict with RPC */ + mfis_unlock(); +} +/* End of function dma_trans_end_check(void) */ + +void dma_release(void) +{ + uint32_t reg; + + /* DMA channel control */ + reg = mem_read32(dma_get_rtdma_chcr_addr(DMACH)); + reg &= ~(CHCR_ALL_BIT_MASK); + mem_write32(dma_get_rtdma_chcr_addr(DMACH), reg); + + /* DMA destination address */ + mem_write32(dma_get_rtdma_dar_addr(DMACH), DAR_HW_INIT); + /* DMA source address */ + mem_write32(dma_get_rtdma_sar_addr(DMACH), SAR_HW_INIT); + /* DMA 64bytes-unit transfer count */ + mem_write32(dma_get_rtdma_tcr_addr(DMACH), TCR_HW_INIT); + + reg = mem_read32(RTDMA_DMSEC); + reg &= (~((uint32_t)1U << DMACH)); + mem_write32(RTDMA_DMSEC, reg); + + /* DMA operation */ + mem_write16(RTDMA_DMOR, DMOR_HW_INIT); +} +/* End of function dma_release(void) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c new file mode 100644 index 00000000..92e5d0ae --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_boot.c @@ -0,0 +1,249 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC boot + ******************************************************************************/ +/****************************************************************************** + * @file emmc_boot.c + * - Version : 0.07 + * @brief eMMC initialze interface. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 30.09.2021 0.01 First Release + * : 22.10.2021 0.02 Remove unnecessary code + * : 22.12.2021 0.03 Support static analysis + * : 06.01.2022 0.04 Add WWDT timer reset function + * : 06.04.2022 0.05 Fix Set SDCLK to 200MHz + * : 23.05.2022 0.06 Integration of S4 and V4H + * : 24.06.2024 0.07 Add process that set SDHI_D1.8/3.3V to 1.8V. + *****************************************************************************/ + +#include "emmc_boot.h" +#include "mem_io.h" +#include "log.h" +#include "rom_api.h" +#include "image_load_emmc.h" +#include "emmc_hal.h" +#include "emmc_std.h" +#include "emmc_multiboot.h" +#include "emmc_def.h" +#include "emmc_config.h" +#if (RCAR_LSI == RCAR_V4M) /* Gray Hawk */ +#include "i2c.h" +#include "remap.h" +#endif /* (RCAR_LSI == RCAR_V4M) */ + +/************************************************************************************************/ +/* Definitions */ +/************************************************************************************************/ + + +/************************************************************************************************/ +/* Unions */ +/************************************************************************************************/ + + +/************************************************************************************************/ +/* Structs */ +/************************************************************************************************/ + + +/************************************************************************************************/ +/* Globals */ +/************************************************************************************************/ + +/************************************************************************************************/ +/* Macros */ +/************************************************************************************************/ + +/************************************************************************************************/ +/* Prototypes */ +/************************************************************************************************/ +static void power_on_mmc(void); +static void set_sd_clock(void); +static void init_mmc_pin_function(void); +#if (RCAR_LSI == RCAR_V4M) /* Gray Hawk */ +static void sdhi_random_address_read_pmic(uint32_t sl_add, uint32_t access_add, uint32_t *rd_buf); +static void sdhi_page_write_pmic(uint32_t sl_add, uint32_t access_add, uint32_t *wr_buf); +static void pmic_set_sdhi_vdd18(void); +#endif /* (RCAR_LSI == RCAR_V4M) */ + +void emmc_initialize( void ) +{ +#if (RCAR_LSI == RCAR_V4M) /* Gray Hawk */ + /* Register I2C base address(physical:0xE6600000) to SIC REMAP14 for V4M. */ + set_sicremap_fcpr(); + pmic_set_sdhi_vdd18(); +#endif /* (RCAR_LSI == RCAR_V4M) */ + + /***************************************************************** + PFC setting + *****************************************************************/ + init_mmc_pin_function(); + + /***************************************************************** + CPG setting + *****************************************************************/ + power_on_mmc(); + set_sd_clock(); + +#if (RCAR_SA9_TYPE == EMMC_BOOT) + EMMC_ERROR_CODE result; + /* eMMC driver initialize */ + (void)emmc_init(); /* Normal clock mode */ + + /* Card power on */ + (void)emmc_memcard_power(TRUE); + + /* Card mount */ + result = emmc_mount(); + + if (result != EMMC_SUCCESS) + { + NOTICE("eMMC initialize error!!\n"); + panic; + } +#endif /* (RCAR_SA9_TYPE == EMMC_BOOT) */ +} /* End of function emmc_initialize( void ) */ + +/************************************************************************************************/ +/* Func power_on_mmc */ +/************************************************************************************************/ +static void power_on_mmc(void) +{ + uint32_t reg; + uint32_t tmp_val; + + tmp_val = CPG_MSTPCR_SDHI; + + reg = mem_read32(CPG_MSTPCR7D0); + if ((reg & tmp_val) != 0x0U) + { + reg &= ~(tmp_val); + cpg_reg_write(CPG_MSTPCR7D0, CPG_MSTPSR7D0, reg); + } + + do + { + reg = mem_read32(CPG_MSTPCR7D0); + } + while ((reg & tmp_val) != 0x0U); /* wait tmp_val=0 */ +} /* End of function power_on_mmc(void) */ + +/************************************************************************************************/ +/* Func set_sd_clock */ +/************************************************************************************************/ +static void set_sd_clock(void) +{ + uint32_t reg; + + reg = mem_read32(CPG_SD0CKCR0); + reg &= (~(CPG_SD0CKCR0_STP0HCK | CPG_SD0CKCR0_SDSRCFC_MASK | CPG_SD0CKCR0_SD0FC_MASK)); + reg |= CPG_SD0CKCR0_200MHZ; + cpg_reg_write(CPG_SD0CKCR0, CPG_SD0CKCR0, reg); /* Stop SDnH clock & SDn=200MHz */ +} /* End of function set_sd_clock(void) */ + +/************************************************************************************************/ +/* Func init_mmc_pin_function */ +/************************************************************************************************/ +static void init_mmc_pin_function(void) +{ + uint32_t reg; + + reg = mem_read32(PFC_POC_MMC_RW); + reg &= (~(PFC_POC_MMC_MASK)); + reg |= PFC_POC_MMC_VAL; + pfc_reg_write(PFC_POC_MMC_RW, reg); +} /* End of function init_mmc_pin_function(void) */ + +#if (RCAR_LSI == RCAR_V4M) /* Gray Hawk */ +static void sdhi_random_address_read_pmic(uint32_t sl_add, uint32_t access_add, uint32_t *rd_buf) +{ + uint32_t data; + + /* for PMIC_RAA271005 */ + data = (access_add & 0x300U) >> 8U; + i2c3_write(sl_add, 0x00U, data); /* Bank Set */ + + i2c3_read(sl_add, (access_add & 0x0FFU), rd_buf); +} +/* End of function sdhi_random_address_read_pmic(uint32_t sl_add, uint32_t access_add, uint32_t *rd_buf) */ + +static void sdhi_page_write_pmic(uint32_t sl_add, uint32_t access_add, uint32_t *wr_buf) +{ + uint32_t data; + + /* for PMIC_RAA271005 */ + data = (access_add & 0x300U) >> 8U; + i2c3_write(sl_add, 0x00U, data); /* Bank Set */ + + i2c3_read(sl_add, (access_add & 0x0FFU), wr_buf); +} +/* End of function sdhi_page_write_pmic(uint32_t sl_add, uint32_t access_add, uint32_t *wr_buf) */ + +static void pmic_set_sdhi_vdd18(void) +{ + /* In case of Gray Hawk board, change SDHI_18/33 voltage. */ + uint32_t slv_addr = 0xA8U; /* for PMIC-RAA271005: "reg 0xA8 0xA9 prot 0xAA 0xAB" */ + uint32_t data; + + /* Init I2C */ + i2c3_init(); + + /* Setting 1.8V to SDHI_D1.8/3.3V(VDDQ18_33_SDHI) on PMIC-RAA271005 */ + data = 0x1U; + i2c3_write(slv_addr, 0x00U, data); /* Write IO_PAGE. Chenge BANK1 */ + + i2c3_read(slv_addr, 0x3BU, &data); + if ((data & 0x0CU) != 0x0U) + { + data &= ~(0x0CU); + i2c3_write(slv_addr, 0x3BU, data); + } + + sdhi_random_address_read_pmic(slv_addr, 0x02U, &data); + if ((data & 0xF0U) == 0xB0U) + { + // RAA271005 rev.B only + data = 0x1U; + sdhi_page_write_pmic(slv_addr, 0x00U, &data); /* Write IO_PAGE. Chenge BANK1 */ + + sdhi_random_address_read_pmic(slv_addr, 0x3BU, &data); /* Read FLT_CTRL1 */ + + data &= 0xF3U; /* LDO1 Fault remove */ + sdhi_page_write_pmic(slv_addr, 0x3BU, &data); /* Write FLT_CTRL1 */ + + data = 0x0U; + sdhi_page_write_pmic(slv_addr, 0x00U, &data); /* Write IO_PAGE. Chenge BANK0 */ + } + + data = 0x75U; /* LDO voltage 1.8V Value */ + i2c3_write(slv_addr, 0xBAU, data); + sdhi_random_address_read_pmic(slv_addr, 0xBAU, &data); +} +/* End of function pmic_set_sdhi_vdd18(void) */ +#endif /* (RCAR_LSI == RCAR_V4M) */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c new file mode 100644 index 00000000..c2455b35 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_cmd.c @@ -0,0 +1,580 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC CMD driver + ******************************************************************************/ +/****************************************************************************** + * @file emmc_cmd.c + * - Version : 0.04 + * @brief control of CMD in SDHI. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 22.02.2022 0.01 First Release + * : 22.10.2021 0.02 Remove unnecessary code + * : 22.12.2021 0.03 Support static analysis + * : 06.01.2022 0.04 Modify SDHI access from DMA to PIO. + *****************************************************************************/ + +#include "emmc_config.h" +#include "emmc_hal.h" +#include "emmc_std.h" +#include "emmc_registers.h" +#include "emmc_def.h" +#include "micro_wait.h" +#include "log.h" +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ +static void emmc_read_response(uint32_t *response); +static void emmc_little_to_big(uint8_t *p, uint32_t value); +static void emmc_data_transfer_dma(void); +static EMMC_ERROR_CODE emmc_response_check(const uint32_t *response, uint32_t error_mask); +static void emmc_softreset(void); +static void emmc_WaitCmd2Cmd_8Cycle(void); + +/* ********************************* CODE ********************************** */ + +/* execute MMC command. + * + * - Pre-conditions:
+ * * Clock to memory card IF is enabled. + * - Post-conditions:
+ * Requested command is executed successfully + * + * param[in] error_mask Errors to be checked (error values; HAL_MEMCARD_ERRORS) + * param[in,out] *response Response from the card (virtual address) + * return eMMC error code. + */ +EMMC_ERROR_CODE emmc_exec_cmd(uint32_t error_mask, uint32_t *response) +{ + EMMC_ERROR_CODE rtn_code = EMMC_ERR; + HAL_MEMCARD_RESPONSE_TYPE response_type; + HAL_MEMCARD_COMMAND_TYPE cmd_type; + EMMC_INT_STATE state; + + /* parameter check */ + if (response == NULL) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_PARAM); + return EMMC_ERR_PARAM; + } + + /* state check */ + if (mmc_drv_obj.clock_enable != TRUE) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_STATE); + return EMMC_ERR_STATE; + } + + if (mmc_drv_obj.state_machine_blocking == TRUE) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR); + return EMMC_ERR; + } + + state = ESTATE_BEGIN; + response_type = (HAL_MEMCARD_RESPONSE_TYPE)(uintptr_t)((uint32_t)(mmc_drv_obj.cmd_info.cmd) & (uint32_t)HAL_MEMCARD_RESPONSE_TYPE_MASK); + cmd_type = (HAL_MEMCARD_COMMAND_TYPE)(uintptr_t)((uint32_t)(mmc_drv_obj.cmd_info.cmd) & (uint32_t)HAL_MEMCARD_COMMAND_TYPE_MASK); + + /* state machine */ + while ((mmc_drv_obj.force_terminate != TRUE) && (state != ESTATE_END)) { + /* The interrupt factor flag is observed. */ + (void)emmc_interrupt(); + + /* wait interrupt */ + if (mmc_drv_obj.state_machine_blocking == TRUE) { + continue; + } + + switch (state) { + case ESTATE_BEGIN: + /* Busy check */ + if ((mmc_drv_obj.error_info.info2 & SD_INFO2_CBSY) != 0U) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_CARD_BUSY); + return EMMC_ERR_CARD_BUSY; + } + + /* clear register */ + mem_write32(SD_INFO1, 0x00000000U); + mem_write32(SD_INFO2, SD_INFO2_CLEAR); + mem_write32(SD_INFO1_MASK, SD_INFO1_INFO0); + mem_write32(SD_INFO2_MASK, ( SD_INFO2_ALL_ERR | SD_INFO2_CLEAR )); + + /* fallthrough */ + + case ESTATE_ISSUE_CMD: + /* ARG */ + mem_write32(SD_ARG, mmc_drv_obj.cmd_info.arg); + /* issue cmd */ + mem_write32(SD_CMD, mmc_drv_obj.cmd_info.hw); + /* Set driver flag */ + mmc_drv_obj.state_machine_blocking = TRUE; + + if (response_type == HAL_MEMCARD_RESPONSE_NONE) { + state = ESTATE_NON_RESP_CMD; + } else { + state = ESTATE_RCV_RESP; + } + + break; + + case ESTATE_NON_RESP_CMD: + /* interrupt disable */ + mem_write32(SD_INFO1_MASK, 0x00000000U); + mem_write32(SD_INFO2_MASK, SD_INFO2_CLEAR); + + /* check interrupt */ + if ((mmc_drv_obj.int_event2 & SD_INFO2_ALL_ERR) != 0U) { + /* error interrupt */ + rtn_code = EMMC_ERR_INFO2; + state = ESTATE_ERROR; + } else if ((mmc_drv_obj.int_event1 & SD_INFO1_INFO0) == 0U) { + /* not receive expected interrupt */ + rtn_code = EMMC_ERR_RESPONSE; + state = ESTATE_ERROR; + } else { + emmc_WaitCmd2Cmd_8Cycle(); + state = ESTATE_END; + } + break; + + case ESTATE_RCV_RESP: + /* interrupt disable */ + mem_write32(SD_INFO1_MASK, 0x00000000U); + mem_write32(SD_INFO2_MASK, SD_INFO2_CLEAR); + + /* check interrupt */ + if ((mmc_drv_obj.int_event2 & SD_INFO2_ALL_ERR) != 0U) { + /* error interrupt */ + rtn_code = EMMC_ERR_INFO2; + state = ESTATE_ERROR; + break; + } else if ((mmc_drv_obj.int_event1 & SD_INFO1_INFO0) == 0U) { + /* not receive expected interrupt */ + rtn_code = EMMC_ERR_RESPONSE; + state = ESTATE_ERROR; + break; + } else { + /* nop */ + } + + /* read response */ + emmc_read_response(response); + + /* check response */ + rtn_code = emmc_response_check(response, error_mask); + if (rtn_code != EMMC_SUCCESS) { + state = ESTATE_ERROR; + break; + } + + if (response_type == HAL_MEMCARD_RESPONSE_R1b) { + /* R1b */ + mem_write32(SD_INFO2_MASK, ( SD_INFO2_ALL_ERR | SD_INFO2_CLEAR )); + state = ESTATE_RCV_RESPONSE_BUSY; + } else { + state = ESTATE_CHECK_RESPONSE_COMPLETE; + } + break; + + case ESTATE_RCV_RESPONSE_BUSY: + /* check interrupt */ + if ((mmc_drv_obj.int_event2 & SD_INFO2_ALL_ERR) != 0U) { + /* error interrupt */ + rtn_code = EMMC_ERR_INFO2; + state = ESTATE_ERROR; + break; + } + /* DAT0 not Busy */ + if ((SD_INFO2_DAT0 & mmc_drv_obj.error_info.info2) != 0U) { + state = ESTATE_CHECK_RESPONSE_COMPLETE; + break; + } + break; + + case ESTATE_CHECK_RESPONSE_COMPLETE: + if (cmd_type >= HAL_MEMCARD_COMMAND_TYPE_ADTC_WRITE) { + state = ESTATE_DATA_TRANSFER; + } else { + emmc_WaitCmd2Cmd_8Cycle(); + state = ESTATE_END; + } + break; + + case ESTATE_DATA_TRANSFER: + /* ADTC command */ + mmc_drv_obj.during_transfer = TRUE; + mmc_drv_obj.state_machine_blocking = TRUE; + + if (mmc_drv_obj.transfer_mode == HAL_MEMCARD_DMA) { + /* DMA */ + emmc_data_transfer_dma(); + } else { + /* PIO */ + /* interrupt enable (FIFO read/write enable) */ + if (mmc_drv_obj.cmd_info.dir == HAL_MEMCARD_WRITE) { + mem_write32(SD_INFO2_MASK, ( SD_INFO2_BWE | SD_INFO2_ALL_ERR | SD_INFO2_CLEAR )); + } else { + mem_write32(SD_INFO2_MASK, ( SD_INFO2_BRE | SD_INFO2_ALL_ERR | SD_INFO2_CLEAR )); + } + } + state = ESTATE_DATA_TRANSFER_COMPLETE; + break; + + case ESTATE_DATA_TRANSFER_COMPLETE: + /* check interrupt */ + if ((mmc_drv_obj.int_event2 & SD_INFO2_ALL_ERR) != 0U) { + /* error interrupt */ + rtn_code = EMMC_ERR_INFO2; + state = ESTATE_TRANSFER_ERROR; + break; + } else { + /* success. nothing to do. */ + } + + /* DMAC error ? */ + if (mmc_drv_obj.dma_error_flag == TRUE) { + /* Error occurred in DMAC driver. */ + rtn_code = EMMC_ERR_FROM_DMAC_TRANSFER; + state = ESTATE_TRANSFER_ERROR; + } else if (mmc_drv_obj.during_dma_transfer == TRUE) { + /* DMAC not finished. unknown error */ + rtn_code = EMMC_ERR; + state = ESTATE_TRANSFER_ERROR; + } else { + mem_write32(SD_INFO1_MASK, SD_INFO1_INFO2); + mem_write32(SD_INFO2_MASK, ( SD_INFO2_ALL_ERR | SD_INFO2_CLEAR )); + + mmc_drv_obj.state_machine_blocking = TRUE; + + state = ESTATE_ACCESS_END; + } + break; + + case ESTATE_ACCESS_END: + + /* clear flag */ + if (HAL_MEMCARD_DMA == mmc_drv_obj.transfer_mode) { + mem_write32(CC_EXT_MODE, CC_EXT_MODE_CLEAR); /* W (CC_EXT_MODE, H'0000_1010) SD_BUF DMA transfer disabled */ + mem_write32(SD_STOP, 0x00000000U); + mmc_drv_obj.during_dma_transfer = FALSE; + } + + mem_write32(SD_INFO1_MASK, 0x00000000U); + mem_write32(SD_INFO2_MASK, SD_INFO2_CLEAR); + mem_write32(SD_INFO1, 0x00000000U); + mem_write32(SD_INFO2, SD_INFO2_CLEAR); + + if ((mmc_drv_obj.int_event1 & SD_INFO1_INFO2) != 0U) { + emmc_WaitCmd2Cmd_8Cycle(); + state = ESTATE_END; + } else { + state = ESTATE_ERROR; + } + break; + + case ESTATE_TRANSFER_ERROR: + /* The error occurred in the Data transfer. */ + if (HAL_MEMCARD_DMA == mmc_drv_obj.transfer_mode) { + mem_write32(CC_EXT_MODE, CC_EXT_MODE_CLEAR); /* W (CC_EXT_MODE, H'0000_1010) SD_BUF DMA transfer disabled */ + mem_write32(SD_STOP, 0x00000000U); + mmc_drv_obj.during_dma_transfer = FALSE; + } + /* fallthrough */ + + case ESTATE_ERROR: + emmc_softreset(); + ERROR("%s:0x%08x\n",__func__,rtn_code); + return rtn_code; + + default: + state = ESTATE_END; + break; + } /* switch (state) */ + } /* while ( (mmc_drv_obj.force_terminate != TRUE) && (state != ESTATE_END) ) */ + + /* force terminate */ + if (mmc_drv_obj.force_terminate == TRUE) { + /* timeout timer is expired. Or, PIO data transfer error. */ + /* Timeout occurred in the DMA transfer. */ + if (mmc_drv_obj.during_dma_transfer == TRUE) { + mmc_drv_obj.during_dma_transfer = FALSE; + } + emmc_softreset(); + + return EMMC_ERR_FORCE_TERMINATE; /* error information has already been written. */ + } + + /* success */ + mmc_drv_obj.during_transfer = FALSE; + + return EMMC_SUCCESS; +} + +/** host controller softrest. + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * . + * + * param None. + * return None. + */ +static void emmc_softreset(void) +{ + int32_t loop = 10000; + int32_t retry = 1000; + + /* flag clear */ + mmc_drv_obj.during_transfer = FALSE; + mmc_drv_obj.during_dma_transfer = FALSE; + mmc_drv_obj.state_machine_blocking = FALSE; + mmc_drv_obj.force_terminate = FALSE; + mmc_drv_obj.dma_error_flag = FALSE; + + /* during operation ? */ + if ((mem_read32(SD_INFO2) & SD_INFO2_CBSY) != 0U) { + /* wait CMDSEQ = 0 */ + while (loop > 0) { + if ((mem_read32(SD_INFO2) & SD_INFO2_CBSY) == 0U) { + break; /* ready */ + } + + loop--; + if ((loop == 0) && (retry > 0)) { + micro_wait(1000U); /* wait 1ms */ + loop = 10000; + retry--; + } + } + } + + /* reset */ + mem_write32(SOFT_RST, ( mem_read32(SOFT_RST) & (~SOFT_RST_SDRST) )); /* Soft reset */ + mem_write32(SOFT_RST, ( mem_read32(SOFT_RST) | SOFT_RST_SDRST )); /* Soft reset released */ + + /* initialize */ + mem_write32(SD_INFO1, 0x00000000U); + mem_write32(SD_INFO2, SD_INFO2_CLEAR); + mem_write32(SD_INFO1_MASK, 0x00000000U); /* all interrupt disable */ + mem_write32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* all interrupt disable */ + +} + +/** read response + * + * - Pre-conditions:
+ * Called from emmc_exec_cmd(). + * - Post-conditions:
+ * . + * + * param[in,out] *response Response from the card + * return None. + */ +static void emmc_read_response(uint32_t *response) +{ + + uint8_t *p = NULL; + + if (response == NULL) { + return; + } + + /* read response */ + if (mmc_drv_obj.response_length == EMMC_MAX_RESPONSE_LENGTH) { + /* CSD or CID */ + p = (uint8_t *)(response); + emmc_little_to_big(p, ((mem_read32(SD_RSP76) << 8U) | (mem_read32(SD_RSP54) >> 24U))); /* [127:96] */ + emmc_little_to_big(p + 4U, ((mem_read32(SD_RSP54) << 8U) | (mem_read32(SD_RSP32) >> 24U))); /* [95:64] */ + emmc_little_to_big(p + 8U, ((mem_read32(SD_RSP32) << 8U) | (mem_read32(SD_RSP10) >> 24U))); /* [63:32] */ + emmc_little_to_big(p + 12U, (mem_read32(SD_RSP10) << 8U)); /* [31:0] */ + } else { + *response = mem_read32(SD_RSP10); /* [39:8] */ + } +} + +/** response check + * + * - Pre-conditions:
+ * Called from emmc_exec_cmd(). + * - Post-conditions:
+ * . + * + * param[in] *response Response from the card + * param[in] error_mask Errors to be checked (for R1/R1b response) + * return error code. + */ +static EMMC_ERROR_CODE emmc_response_check(const uint32_t *response, uint32_t error_mask) +{ + + HAL_MEMCARD_RESPONSE_TYPE response_type = (HAL_MEMCARD_RESPONSE_TYPE)(uintptr_t)((uint32_t)(mmc_drv_obj.cmd_info.cmd) + & (uint32_t)HAL_MEMCARD_RESPONSE_TYPE_MASK); + + if (response == NULL) { + return EMMC_ERR_PARAM; + } + + if (response_type == HAL_MEMCARD_RESPONSE_NONE) { + return EMMC_SUCCESS; + } + + /* response check */ + if (response_type <= HAL_MEMCARD_RESPONSE_R1b) { + /* R1 or R1b */ + mmc_drv_obj.current_state = (EMMC_R1_STATE)((*response & EMMC_R1_STATE_MASK) >> EMMC_R1_STATE_SHIFT); + if ((*response & error_mask) != 0U) { + return EMMC_ERR_CARD_STATUS_BIT; + } + } else if (response_type == HAL_MEMCARD_RESPONSE_R4) { + /* R4 */ + if ((*response & EMMC_R4_STATUS) != 0U) { + return EMMC_ERR_CARD_STATUS_BIT; + } + } else { + ; /* nothing to do. other type does not have status bit */ + } + + return EMMC_SUCCESS; +} + +/** brief converts endian from little to big + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * . + * + * param[in,out] p destination buffer address. + * param[in] value convert data.(little) + * return None. + */ +static void emmc_little_to_big(uint8_t *p, uint32_t value) +{ + if (p == NULL) { + return; + } + + p[0] = (uint8_t)(value >> 24U); + p[1] = (uint8_t)(value >> 16U); + p[2] = (uint8_t)(value >> 8U); + p[3] = (uint8_t)value; +} + +/** data transfer with DMA. + * + * - Pre-conditions:
+ * Called from emmc_exec_cmd(). + * - Post-conditions:
+ * . + * + * return error code. + */ +static void emmc_data_transfer_dma(void) +{ + mmc_drv_obj.during_dma_transfer = TRUE; + mmc_drv_obj.dma_error_flag = FALSE; + + mem_write32(SD_INFO1_MASK, 0x00000000U); + mem_write32(SD_INFO2_MASK, ( SD_INFO2_ALL_ERR | SD_INFO2_CLEAR )); + + /* DMAC setting */ + if (mmc_drv_obj.cmd_info.dir == HAL_MEMCARD_WRITE) { + /* transfer complete interrupt enable */ + mem_write32(DM_CM_INFO1_MASK, ( DM_CM_INFO_MASK_CLEAR | DM_CM_INFO_CH0_ENABLE )); + mem_write32(DM_CM_INFO2_MASK, ( DM_CM_INFO_MASK_CLEAR | DM_CM_INFO_CH0_ENABLE )); + /* BUFF --> FIFO */ + mem_write32(DM_CM_DTRAN_MODE, ( DM_CM_DTRAN_MODE_CH0 | DM_CM_DTRAN_MODE_BIT_WIDTH )); /* CH0(downstream), 64-bit width */ + } else { + /* transfer complete interrupt enable */ + mem_write32(DM_CM_INFO1_MASK, ( DM_CM_INFO_MASK_CLEAR | DM_CM_INFO_CH1_ENABLE )); + mem_write32(DM_CM_INFO2_MASK, ( DM_CM_INFO_MASK_CLEAR | DM_CM_INFO_CH1_ENABLE )); + /* FIFO --> BUFF */ + mem_write32(DM_CM_DTRAN_MODE, ( DM_CM_DTRAN_MODE_CH1 | DM_CM_DTRAN_MODE_BIT_WIDTH )); /* CH0(downstream), 64-bit width */ + } + mem_write32(DM_DTRAN_ADDR, ( ( (uintptr_t)mmc_drv_obj.buff_address_virtual & DM_DTRAN_ADDR_WRITE_MASK ) )); /* Set address */ + + mem_write32(DM_CM_DTRAN_CTRL, DM_CM_DTRAN_CTRL_START); /* DMAC Start */ +} + +/** wait cmd-cmd 8cycle + * + * - Pre-conditions:
+ * + * - Post-conditions:
+ * . + * + * return None. + */ +static void emmc_WaitCmd2Cmd_8Cycle(void) +{ + uint32_t dataL, wait = 0U; + + dataL = mem_read32(SD_CLK_CTRL); + dataL &= 0x000000FFU; + + switch (dataL) { + case 0xFFU: /* 1/1 10 us wait ( 1/200MHz)*8= 0.04 us(min) */ + wait = 10U; + break; + case 0x00U: /* 1/2 10 us wait ( 2/200MHz)*8= 0.08 us(min) */ + wait = 10U; + break; + case 0x01U: /* 1/4 10 us wait ( 4/200MHz)*8= 0.16 us(min) */ + wait = 10U; + break; + case 0x02U: /* 1/8 10 us wait ( 8/200MHz)*8= 0.32 us(min) */ + wait = 10U; + break; + case 0x04U: /* 1/16 10 us wait ( 16/200MHz)*8= 0.64 us(min) */ + wait = 10U; + break; + case 0x08U: /* 1/32 10 us wait ( 32/200MHz)*8= 1.28 us(min) */ + wait = 10U; + break; + case 0x10U: /* 1/64 10 us wait ( 64/200MHz)*8= 2.56 us(min) */ + wait = 10U; + break; + case 0x20U: /* 1/128 10 us wait (128/200MHz)*8= 5.12 us(min) */ + wait = 10U; + break; + case 0x40U: /* 1/256 20 us wait (256/200MHz)*8= 10.24 us(min) */ + wait = 20U; + break; + case 0x80U: /* 1/512 30 us wait (512/200MHz)*8= 20.48 us(min) */ + wait = 30U; + break; + default: + /* nop */ + break; + } + micro_wait(wait); + +} + +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c new file mode 100644 index 00000000..46ed5ca7 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_init.c @@ -0,0 +1,311 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC initialze + ******************************************************************************/ +/****************************************************************************** + * @file emmc_init.c + * - Version : 0.05 + * @brief initialize of SDHI driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 22.02.2022 0.01 First Release + * : 22.10.2021 0.02 Remove unnecessary code + * : 22.12.2021 0.03 Support static analysis + * : 06.01.2022 0.04 Modify SDHI access from DMA to PIO. + * : 06.04/2022 0.05 Del SDnH clock & SDn=200MHz(Duplicate settings) + *****************************************************************************/ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include "emmc_config.h" +#include "emmc_hal.h" +#include "emmc_std.h" +#include "emmc_registers.h" +#include "emmc_def.h" + +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ +st_mmc_base mmc_drv_obj; + +/* ************************** FUNCTION PROTOTYPES ************************** */ +static void emmc_drv_init(void); +static EMMC_ERROR_CODE emmc_dev_init(void); +static EMMC_ERROR_CODE emmc_dev_finalize(void); +static void emmc_memset(void *buff, uint8_t data, uint32_t cnt); +static EMMC_ERROR_CODE emmc_reset_controller(void); +static void emmc_driver_config(void); +static void emmc_set_data_timeout(uint32_t data_timeout); + +/* ********************************* CODE ********************************** */ + +/** brief eMMC initialize. + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * . + * + * retval EMMC_SUCCESS successful. + * retval EMMC_ERR error from interrupt API. + */ +EMMC_ERROR_CODE emmc_init(void) +{ + /* initialize H/W */ + (void)emmc_reset_controller(); + + /* Configuration */ + emmc_driver_config(); + + return EMMC_SUCCESS; +} + +/** terminate emmc driver + * + * EMMC H/W and S/W resource is released. + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * . + * + * return None. + */ +EMMC_ERROR_CODE emmc_terminate(void) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + + /* H/W finalize */ + result = emmc_dev_finalize(); + + /* driver finalize */ + emmc_memset((uint8_t *)(&mmc_drv_obj), 0U, sizeof(st_mmc_base)); /* clear global variable */ + + return result; +} + +/** Function executes full reset to MMC host controller without taking power out from the memory card. + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * Reset MMC host controller without taking power out from the memory card. + * Memory card preserves its state. + * + * return None + */ +static EMMC_ERROR_CODE emmc_reset_controller(void) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + + /* initialize mmc driver */ + emmc_drv_init(); + + mmc_drv_obj.base_address = MMC0_SD_BASE; + + /* initialize H/W */ + result = emmc_dev_init(); + + mmc_drv_obj.initialize = TRUE; + + return result; + +} + +/** Configuration eMMC driver + * + * - Pre-conditions:
+ * initialized eMMC driver. + * - Post-conditions:
+ * . + * + * return None + */ +static void emmc_driver_config(void) +{ + /* Read/Write data timeout */ + emmc_set_data_timeout(EMMC_RW_DATA_TIMEOUT); +} + +/** Sets data timeout + * + * Sets the data timeout value for read and write operations. + * + * - Pre-conditions:
+ * initialized eMMC driver. + * + * - Post-conditions:
+ * After this function is called, the timeout value is set according to argument. + * + * param[in] time_out The desired timeout value in milliseconds. + * return None + */ +static void emmc_set_data_timeout(uint32_t data_timeout) +{ + mmc_drv_obj.data_timeout = data_timeout; +} + +/** eMMC driver initialize. (software) + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * . + * + * return None. + */ +static void emmc_drv_init(void) +{ + /* initialize */ + emmc_memset((uint8_t *)(&mmc_drv_obj), 0U, sizeof(st_mmc_base)); + + mmc_drv_obj.data_timeout = EMMC_RW_DATA_TIMEOUT; + + mmc_drv_obj.bus_width = HAL_MEMCARD_DATA_WIDTH_1_BIT; +} + +/** eMMC driver initialize. (H/W) + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * . + * + * return None. + */ +static EMMC_ERROR_CODE emmc_dev_init(void) +{ + + /* MMCIF initialize */ + mem_write32(SD_INFO1, 0x00000000U); /* all interrupt clear */ + mem_write32(SD_INFO2, SD_INFO2_CLEAR); /* all interrupt clear */ + mem_write32(SD_INFO1_MASK, 0x00000000U); /* all interrupt disable */ + mem_write32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* all interrupt disable */ + + mem_write32(HOST_MODE, 0x00000000U); /* SD_BUF access width = 64-bit */ + mem_write32(SD_OPTION, 0x0000C0EEU); /* Bus width = 1bit, timeout=MAX */ + mem_write32(SD_CLK_CTRL, 0x00000000U); /* Automatic Control=Disable, Clock Output=Disable */ + + return EMMC_SUCCESS; +} + +/** EMMC H/W finalize + * + * EMMC Host and Card hardware resource is released. + * + * - Pre-conditions:
+ * . + * + * - Post-conditions:
+ * . + * return None. + */ +static EMMC_ERROR_CODE emmc_dev_finalize(void) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + + /* MMC power off + * the power supply of eMMC device is always turning on. + * RST_n : Hi --> Low level. + */ + result = emmc_memcard_power(FALSE); + + mem_write32(SD_INFO1, 0x00000000U); + mem_write32(SD_INFO2, 0x00000800U); + mem_write32(DM_CM_INFO1, 0x00000000U); + mem_write32(DM_CM_INFO2, 0x00000000U); + + mem_write32(SD_CLK_CTRL, 0x00000020U); + mem_write32(CC_EXT_MODE, 0x00000000U); + mem_write32(SD_STOP, 0x00000000U); + mem_write32(SD_SECCNT, 0x00000000U); + mem_write32(DM_CM_DTRAN_MODE, 0x00000000U); + mem_write32(DM_DTRAN_ADDR, 0x00000000U); + mem_write32(SD_OPTION, 0x00000000U); + mem_write32(DM_CM_DTRAN_CTRL, 0x00000000U); + + return result; +} + +/** Set power to memory card IF. + * This function control Vcc and Vccq and RST_n. + * + * attention + * CPU cannot control Vcc&Vccq. + * The power supply of eMMC device is always turning on. + * + * param[in] mode TRUE = power on, FALSE = power off + * + * retval EMMC_SUCCESS powering succeeded + * retval EMMC_ERR_CARD_POWER powering failed + */ +EMMC_ERROR_CODE emmc_memcard_power(uint32_t mode) +{ + if (mode == TRUE) { + /* power on (Vcc&Vccq is always power on) */ + mmc_drv_obj.card_power_enable = TRUE; + } else { + /* power off (Vcc&Vccq is always power on) */ + mmc_drv_obj.card_power_enable = FALSE; + mmc_drv_obj.mount = FALSE; + mmc_drv_obj.selected = FALSE; + } + + return EMMC_SUCCESS; +} + +/** memset(). no use C standard library. + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * . + * + * param[in,out] buff pointer to buffer (virtual) + * param[in] data fill data. + * param[in] cnt fill size (number of bytes) + * return None. + */ +static void emmc_memset(void *buff, uint8_t data, uint32_t cnt) +{ + uint8_t *tmp = NULL; + tmp = (uint8_t *)buff; + + if (buff == NULL) { + return; + } + + while (cnt > 0U) { + *tmp = data; + tmp++; + cnt--; + } +} + +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c new file mode 100644 index 00000000..e1d344d5 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_interrupt.c @@ -0,0 +1,227 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC interrupt + ******************************************************************************/ +/****************************************************************************** + * @file emmc_interrupt.c + * - Version : 0.04 + * @brief state check of SDHI. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 22.02.2022 0.01 First Release + * : 22.10.2021 0.02 Remove unnecessary code + * : 22.12.2021 0.03 Support static analysis + * : 06.01.2022 0.04 Modify SDHI access from DMA to PIO. + *****************************************************************************/ + +#include "emmc_config.h" +#include "emmc_hal.h" +#include "emmc_std.h" +#include "emmc_registers.h" +#include "emmc_def.h" +#include "log.h" +#include +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ +static EMMC_ERROR_CODE emmc_trans_sector(uint32_t *buff_address_virtual); + + +/* ********************************* CODE ********************************** */ + + + +/** emmc driver interrupt service routine. + * + * - Pre-conditions:
+ * Must be block emmc driver state machine. + * - Post-conditions:
+ * unblocking emmc driver state machine. + * + * retval INT_SUCCESS + */ +uint32_t emmc_interrupt(void) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + + /* SD_INFO */ + mmc_drv_obj.error_info.info1 = mem_read32(SD_INFO1); + mmc_drv_obj.error_info.info2 = mem_read32(SD_INFO2); + + /* SD_INFO EVENT */ + mmc_drv_obj.int_event1 = mmc_drv_obj.error_info.info1 & mem_read32(SD_INFO1_MASK); + mmc_drv_obj.int_event2 = mmc_drv_obj.error_info.info2 & mem_read32(SD_INFO2_MASK); + + /* ERR_STS */ + mmc_drv_obj.error_info.status1 = mem_read32(SD_ERR_STS1); + mmc_drv_obj.error_info.status2 = mem_read32(SD_ERR_STS2); + + /* DM_CM_INFO */ + mmc_drv_obj.error_info.dm_info1 = mem_read32(DM_CM_INFO1); + mmc_drv_obj.error_info.dm_info2 = mem_read32(DM_CM_INFO2); + + /* DM_CM_INFO EVENT */ + mmc_drv_obj.dm_event1 = mmc_drv_obj.error_info.dm_info1 & mem_read32(DM_CM_INFO1_MASK); + mmc_drv_obj.dm_event2 = mmc_drv_obj.error_info.dm_info2 & mem_read32(DM_CM_INFO2_MASK); + + /* ERR SD_INFO2 */ + if ((SD_INFO2_ALL_ERR & mmc_drv_obj.int_event2) != 0U) { + mem_write32(SD_INFO1_MASK, 0x00000000U); /* interrupt disable */ + mem_write32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* interrupt disable */ + mem_write32(SD_INFO1, 0x00000000U); /* interrupt clear */ + mem_write32(SD_INFO2, SD_INFO2_CLEAR); /* interrupt clear */ + mmc_drv_obj.state_machine_blocking = FALSE; + } + + /* PIO Transfer */ + /* BWE/BRE */ + else if ((( SD_INFO2_BWE | SD_INFO2_BRE) & mmc_drv_obj.int_event2) != 0U) { + /* BWE */ + if (( SD_INFO2_BWE & mmc_drv_obj.int_event2) != 0U) { + mem_write32(SD_INFO2, (mem_read32(SD_INFO2) & ~SD_INFO2_BWE)); /* interrupt clear */ + } + /* BRE */ + else { + mem_write32(SD_INFO2, (mem_read32(SD_INFO2) & ~SD_INFO2_BRE)); /* interrupt clear */ + } + + result = emmc_trans_sector((uint32_t *)mmc_drv_obj.buff_address_virtual); /* sector R/W */ + mmc_drv_obj.buff_address_virtual += EMMC_BLOCK_LENGTH; + mmc_drv_obj.remain_size -= EMMC_BLOCK_LENGTH; + + if (result != EMMC_SUCCESS) { + /* data transfer error */ + ERROR("%s:0x%08x\n",__func__, result); + + /* Panic */ + mem_write32(SD_INFO1_MASK, 0x00000000U); /* interrupt disable */ + mem_write32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* interrupt disable */ + mem_write32(SD_INFO1, 0x00000000U); /* interrupt clear */ + mem_write32(SD_INFO2, SD_INFO2_CLEAR); /* interrupt clear */ + mmc_drv_obj.force_terminate = TRUE; + } else { + mmc_drv_obj.during_transfer = FALSE; + } + mmc_drv_obj.state_machine_blocking = FALSE; + } + + /* DMA_TRANSFER */ + /* DM_CM_INFO1: DMA-ch0 transfer complete or error occured */ + else if ((DM_CM_INFO_DTRANEND0 & mmc_drv_obj.dm_event1) != 0U) { + mem_write32(DM_CM_INFO1, 0x00000000U); + mem_write32(DM_CM_INFO2, 0x00000000U); + mem_write32(SD_INFO2, (mem_read32(SD_INFO2) & ~SD_INFO2_BWE)); /* interrupt clear */ + /* DM_CM_INFO2: DMA-ch0 error occured */ + if (( DM_CM_INFO_DTRANEND0 & mmc_drv_obj.dm_event2) != 0U) { + mmc_drv_obj.dma_error_flag = TRUE; + } else { + mmc_drv_obj.during_dma_transfer = FALSE; + mmc_drv_obj.during_transfer = FALSE; + } + mmc_drv_obj.state_machine_blocking = FALSE; /* wait next interrupt */ + } + /* DM_CM_INFO1: DMA-ch1 transfer complete or error occured */ + else if ((DM_CM_INFO_DTRANEND1 & mmc_drv_obj.dm_event1) != 0U) { + mem_write32(DM_CM_INFO1, 0x00000000U); + mem_write32(DM_CM_INFO2, 0x00000000U); + mem_write32(SD_INFO2, (mem_read32(SD_INFO2) & ~SD_INFO2_BRE)); /* interrupt clear */ + /* DM_CM_INFO2: DMA-ch1 error occured */ + if (( DM_CM_INFO_DTRANEND1 & mmc_drv_obj.dm_event2) != 0U) { + mmc_drv_obj.dma_error_flag = TRUE; + } else { + mmc_drv_obj.during_dma_transfer = FALSE; + mmc_drv_obj.during_transfer = FALSE; + } + mmc_drv_obj.state_machine_blocking = FALSE; /* wait next interrupt */ + } + + /* Response end */ + else if ((SD_INFO1_INFO0 & mmc_drv_obj.int_event1) != 0U) { + mem_write32(SD_INFO1, (mem_read32(SD_INFO1) & ~SD_INFO1_INFO0)); /* interrupt clear */ + mmc_drv_obj.state_machine_blocking = FALSE; + } + /* Access end */ + else if ((SD_INFO1_INFO2 & mmc_drv_obj.int_event1) != 0U) { + mem_write32(SD_INFO1, (mem_read32(SD_INFO1) & ~SD_INFO1_INFO2)); /* interrupt clear */ + mmc_drv_obj.state_machine_blocking = FALSE; + } else { + /* nothing to do. */ + } + + return 0U; +} + +/** Data transfer function with PIO (Single sector). + * + * - Pre-conditions:
+ * Called from interrupt service. + * - Post-conditions:
+ * . + * + * param[in,out] buff_address_virtual Dest/Src buffer address(virtual). + * retval EMMC_SUCCESS successful. + * retval EMMC_ERR_PARAM parameter error. + * retval EMMC_ERR_STATE state error. + */ +static EMMC_ERROR_CODE emmc_trans_sector(uint32_t *buff_address_virtual) +{ + uint32_t length, i; + uint64_t *bufPtrLL; + + if (buff_address_virtual == NULL) { + return EMMC_ERR_PARAM; + } + + if ((mmc_drv_obj.during_transfer != TRUE) || (mmc_drv_obj.remain_size == 0U)) { + return EMMC_ERR_STATE; + } + + bufPtrLL = (uint64_t*)buff_address_virtual; + length = mmc_drv_obj.remain_size; + + /* data transefer */ + for (i = 0U; i < (length >> 3U); i++) { + /* Write */ + if (mmc_drv_obj.cmd_info.dir == HAL_MEMCARD_WRITE) { + mem_write64(SD_BUF0, *bufPtrLL); /* buffer --> FIFO */ + } + /* Read */ + else { + *bufPtrLL = mem_read64(SD_BUF0); /* FIFO --> buffer */ + } + bufPtrLL++; + } + + return EMMC_SUCCESS; +} + +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c new file mode 100644 index 00000000..ba0a0f9f --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_mount.c @@ -0,0 +1,767 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC Mount + ******************************************************************************/ +/****************************************************************************** + * @file emmc_mount.c + * - Version : 0.04 + * @brief initialize of condition. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 22.02.2022 0.01 First Release + * : 22.10.2021 0.02 Remove unnecessary code + * : 22.12.2021 0.03 Support static analysis + * : 06.01.2022 0.04 Modify SDHI access from DMA to PIO. + *****************************************************************************/ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include "emmc_config.h" +#include "emmc_hal.h" +#include "emmc_std.h" +#include "emmc_registers.h" +#include "emmc_def.h" +#include +#include "micro_wait.h" +#include "remap.h" +#include "log.h" + +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ +static EMMC_ERROR_CODE emmc_clock_ctrl(uint32_t mode); +static EMMC_ERROR_CODE emmc_card_init(void); +static EMMC_ERROR_CODE emmc_high_speed(void); +static EMMC_ERROR_CODE emmc_bus_width(uint32_t width); +static uint32_t emmc_set_timeout_register_value(uint32_t freq); +static void set_sd_clk(uint32_t clkDiv); +static uint32_t emmc_calc_tran_speed(uint32_t* freq); + +/* ********************************* CODE ********************************** */ + +/** eMMC mount operation. + * + * Sequence is the following. + * 1) Bus initialization (emmc_card_init()) + * 2) Switching to high speed mode. (emmc_high_speed()) + * 3) Changing the data bus width. (emmc_bus_width()) + * + * - Pre-conditions:
+ * eMMC driver is initialized. The power supply of MMC IF must be turning on. + * - Post-conditions:
+ * MMC card state changes to transfer state. + * + * return eMMC error code. + */ +EMMC_ERROR_CODE emmc_mount(void) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + + /* state check */ + if ((mmc_drv_obj.initialize != TRUE) || (mmc_drv_obj.card_power_enable != TRUE) + || ((mem_read32(SD_INFO2) & SD_INFO2_CBSY) != 0U)) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_STATE); + return EMMC_ERR_STATE; + } + + /* initialize card (IDLE state --> Transfer state) */ + result = emmc_card_init(); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + (void)emmc_clock_ctrl(FALSE); + return result; + } + + /* Switching high speed mode */ + result = emmc_high_speed(); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + (void)emmc_clock_ctrl(FALSE); + return result; + } + + /* Changing the data bus width */ + result = emmc_bus_width(8U); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + (void)emmc_clock_ctrl(FALSE); + return result; + } + + /* mount complete */ + mmc_drv_obj.mount = TRUE; + + return EMMC_SUCCESS; +} + +/** Bus initialization function + * + * - Pre-conditions:
+ * eMMC driver is initialized. The power supply of MMC IF must be turning on. + * - Post-conditions:
+ * MMC card state changes to transfer state. + * + * retval EMMC_SUCCESS successful. + * return eMMC error code. + * attention upper layer must be check pre-conditions. + */ +static EMMC_ERROR_CODE emmc_card_init(void) +{ + int32_t retry; + uint32_t freq = MMC_400KHZ; /* 390KHz */ + EMMC_ERROR_CODE result = EMMC_ERR; + uint32_t resultCalc = 0U; + + /* state check */ + if ((mmc_drv_obj.initialize != TRUE) || (mmc_drv_obj.card_power_enable != TRUE) + || ((mem_read32(SD_INFO2) & SD_INFO2_CBSY) != 0U)) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_STATE); + return EMMC_ERR_STATE; + } + + /* clock on (force change) */ + mmc_drv_obj.current_freq = 0U; + mmc_drv_obj.max_freq = MMC_20MHZ; /* MMC_20MHZ = MMC_12MHZ = 12.187MHz */ + result = emmc_set_request_mmc_clock(&freq); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return EMMC_ERR; + } + + micro_wait(1000U); /* wait 1ms */ + + /* CMD0, arg=0x00000000 */ + result = emmc_send_idle_cmd (0x00000000U); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + micro_wait(200U); /* wait 74clock 390kHz(189.74us)*/ + + /* CMD1 */ + emmc_make_nontrans_cmd(CMD1_SEND_OP_COND, EMMC_HOST_OCR_VALUE); + for (retry = 300; retry > 0; retry--) { + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + if ((mmc_drv_obj.r3_ocr & EMMC_OCR_STATUS_BIT) != 0U) { + break; /* card is ready. exit loop */ + } + micro_wait(1000U); /* wait 1ms */ + } + + if (retry == 0) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_TIMEOUT); + return EMMC_ERR_TIMEOUT; + } + + if ((mmc_drv_obj.r3_ocr & EMMC_OCR_ACCESS_MODE_MASK) != EMMC_OCR_ACCESS_MODE_SECT) { + /* unknown value */ + ERROR("%s:0x%08x\n",__func__,EMMC_ERR); + return EMMC_ERR; + } + + /* CMD2 */ + emmc_make_nontrans_cmd(CMD2_ALL_SEND_CID_MMC, 0x00000000U); + mmc_drv_obj.response = (uint32_t *)(&mmc_drv_obj.cid_data[0U]); /* use CID special buffer */ + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + /* CMD3 */ + emmc_make_nontrans_cmd(CMD3_SET_RELATIVE_ADDR, EMMC_RCA << 16U); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + /* CMD9 : CSD */ + emmc_make_nontrans_cmd(CMD9_SEND_CSD, EMMC_RCA << 16U); + mmc_drv_obj.response = (uint32_t *)(&mmc_drv_obj.csd_data[0U]); /* use CSD special buffer */ + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + /* card version check */ + if (EMMC_CSD_SPEC_VARS() < 4U) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_ILLEGAL_CARD); + return EMMC_ERR_ILLEGAL_CARD; + } + + /* CMD7 (select card) */ + emmc_make_nontrans_cmd(CMD7_SELECT_CARD, EMMC_RCA << 16U); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + mmc_drv_obj.selected = TRUE; + + /* card speed check */ + resultCalc = emmc_calc_tran_speed(&freq); /* Card spec is calculated from TRAN_SPEED(CSD). */ + if (resultCalc == 0U) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_ILLEGAL_CARD); + return EMMC_ERR_ILLEGAL_CARD; + } + mmc_drv_obj.max_freq = freq; /* max frequency (card spec) */ + + result = emmc_set_request_mmc_clock(&freq); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return EMMC_ERR; + } + + /* set read/write timeout */ + mmc_drv_obj.data_timeout = emmc_set_timeout_register_value(freq); + mem_write32(SD_OPTION, ((mem_read32(SD_OPTION) & ~(SD_OPTION_TIMEOUT_CNT_MASK)) | mmc_drv_obj.data_timeout)); + + /* SET_BLOCKLEN:512byte */ + /* CMD16 */ + emmc_make_nontrans_cmd(CMD16_SET_BLOCKLEN, EMMC_BLOCK_LENGTH); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + /* Transfer Data Length */ + mem_write32(SD_SIZE, EMMC_BLOCK_LENGTH); + + /* CMD8 : EXT_CSD */ + emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000U, (uint32_t *)(&mmc_drv_obj.ext_csd_data[0U]), + EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ, HAL_MEMCARD_NOT_DMA); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + /* CMD12 is not send. + * If BUS initialization is failed, user must be execute Bus initialization again. + * Bus initialization is start CMD0(soft reset command). + */ + ERROR("%s\n",__func__); + return result; + } + + return EMMC_SUCCESS; +} + +/** Switching to high-speed mode + * + * - Pre-conditions:
+ * Executing Bus initializatin by emmc_card_init(). + * EXT_CSD data must be stored in mmc_drv_obj.ext_csd_data[]. + * + * - Post-conditions:
+ * Change the clock frequency to 26MHz or 52MHz. + * + * retval EMMC_SUCCESS successful or aleady switching. + * retval EMMC_ERR_STATE state error. + * retval EMMC_ERR unknown error. + * return emmc error code. + */ +static EMMC_ERROR_CODE emmc_high_speed(void) +{ + uint32_t freq; /**< High speed mode clock frequency */ + EMMC_ERROR_CODE result = EMMC_ERR; + uint8_t cardType; + + /* state check */ + if (mmc_drv_obj.selected != TRUE) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_STATE); + return EMMC_ERR_STATE; + } + + /* max frequency */ + cardType = (uint8_t)mmc_drv_obj.ext_csd_data[EMMC_EXT_CSD_CARD_TYPE]; + if ((cardType & EMMC_EXT_CSD_CARD_TYPE_52MHZ) != 0U) { + freq = MMC_52MHZ; + } else if ((cardType & EMMC_EXT_CSD_CARD_TYPE_26MHZ) != 0U) { + freq = MMC_26MHZ; + } else { + freq = MMC_20MHZ; + } + + /* Hi-Speed-mode selction */ + if (( MMC_52MHZ == freq) || ( MMC_26MHZ == freq)) { + /* CMD6 */ + emmc_make_nontrans_cmd(CMD6_SWITCH, EMMC_SWITCH_HS_TIMING); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + } + + /* set mmc clock */ + mmc_drv_obj.max_freq = freq; + result = emmc_set_request_mmc_clock(&freq); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return EMMC_ERR; + } + + /* set read/write timeout */ + mmc_drv_obj.data_timeout = emmc_set_timeout_register_value(freq); + mem_write32(SD_OPTION, ((mem_read32(SD_OPTION) & ~(SD_OPTION_TIMEOUT_CNT_MASK)) | mmc_drv_obj.data_timeout)); + + /* CMD13 */ + emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16U); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK_WITHOUT_CRC, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + ERROR("%s\n",__func__); + return result; + } + + return EMMC_SUCCESS; +} + +/** Changing the data bus width + * + * if chinging the data bus width failed, card is reset by CMD0. + * Please do Bus initialization over again. + * + * - Pre-conditions:
+ * Executing Bus initializatin by emmc_card_init(). + * + * - Post-conditions:
+ * Change the data bus width to 8bit or 4bit. + * mmc_drv_obj.ext_csd_data is updated. + * + * param[in] width bus width (8 or 4) + * retval EMMC_SUCCESS successful. + * retval EMMC_ERR_PARAM parameter error + * retval EMMC_ERR_STATE state error. + * + */ +static EMMC_ERROR_CODE emmc_bus_width(uint32_t width) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + + /* parameter check */ + if ((width != 8U) && (width != 4U) && (width != 1U)) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_PARAM); + return EMMC_ERR_PARAM; + } + + /* state check */ + if (mmc_drv_obj.selected != TRUE) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_STATE); + return EMMC_ERR_STATE; + } + + mmc_drv_obj.bus_width = (HAL_MEMCARD_DATA_WIDTH)(width >> 2U); /* 2 = 8bit, 1 = 4bit, 0 =1bit */ + + /* CMD6 */ + emmc_make_nontrans_cmd(CMD6_SWITCH, ( EMMC_SWITCH_BUS_WIDTH_1 | ((uint32_t)(mmc_drv_obj.bus_width) << 8U))); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + /* occurred error */ + mmc_drv_obj.bus_width = HAL_MEMCARD_DATA_WIDTH_1_BIT; + goto EXIT; + } + + switch (mmc_drv_obj.bus_width) { + case HAL_MEMCARD_DATA_WIDTH_1_BIT: + mem_write32(SD_OPTION, ((mem_read32(SD_OPTION) & ~(SD_OPTION_WIDTH|SD_OPTION_WIDTH8)) | SD_OPTION_WIDTH )); + break; + case HAL_MEMCARD_DATA_WIDTH_4_BIT: + mem_write32(SD_OPTION, (mem_read32(SD_OPTION) & ~(SD_OPTION_WIDTH|SD_OPTION_WIDTH8))); + break; + case HAL_MEMCARD_DATA_WIDTH_8_BIT: + default: + mem_write32(SD_OPTION, ((mem_read32(SD_OPTION) & ~(SD_OPTION_WIDTH|SD_OPTION_WIDTH8)) | SD_OPTION_WIDTH8 )); + break; + } + + /* CMD13 */ + emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16U); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + goto EXIT; + } + + /* CMD8 : EXT_CSD */ + emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000U, (uint32_t *)(&mmc_drv_obj.ext_csd_data[0U]), + EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ, HAL_MEMCARD_NOT_DMA); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + goto EXIT; + } + + return EMMC_SUCCESS; + +EXIT: + ERROR("%s:0x%08x\n",__func__,result); + return result; +} + +/** select access partition + * + * This function write the EXT_CSD register(PARTITION_ACCESS: PARTITION_CONFIG[2:0]). + * + * - Pre-conditions:
+ * MMC card is mounted. + * + * - Post-conditions:
+ * selected partition can access. + * + * param[in] id user selects partitions to access. + * retval EMMC_SUCCESS successful. + * retval EMMC_ERR_STATE state error. + * retval EMMC_ERR_PARAM parameter error. + * return emmc error code. + */ +EMMC_ERROR_CODE emmc_select_partition(EMMC_PARTITION_ID id) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + uint32_t partition; + uint32_t partition_config; + + /* state check */ + if (mmc_drv_obj.mount != TRUE) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_STATE); + return EMMC_ERR_STATE; + } + + /* id has PARTITION_ACCESS(Bit[2:0]) */ + if ((uint32_t)((uint32_t)id & ~(uint32_t)PARTITION_ID_MASK) != 0U) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_PARAM); + return EMMC_ERR_PARAM; + } + + /* EXT_CSD[179] value */ + partition_config = (uint32_t)mmc_drv_obj.ext_csd_data[EMMC_EXT_CSD_PARTITION_CONFIG]; + if ((partition_config & (uint32_t)PARTITION_ID_MASK) == (uint32_t)id) { + result = EMMC_SUCCESS; + } else { + + partition_config = ((partition_config & (~(uint32_t)PARTITION_ID_MASK)) | (uint32_t)id); + partition = EMMC_SWITCH_PARTITION_CONFIG | (partition_config << 8U); + + result = emmc_set_ext_csd(partition); + } + + return result; +} + +/** set EXT CSD data + * + * - Pre-conditions:
+ * MMC card is mounted. + * + * - Post-conditions:
+ * mmc_drv_obj.ext_csd_data[] is updated. + * + * param[in] arg argument of CMD6 + * return emmc error code. + */ +EMMC_ERROR_CODE emmc_set_ext_csd(uint32_t arg) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + + /* CMD6 */ + emmc_make_nontrans_cmd(CMD6_SWITCH, arg); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + return result; + } + + /* CMD13 */ + emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16U); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + return result; + } + + /* CMD8 : EXT_CSD */ + emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000, (uint32_t *)(&mmc_drv_obj.ext_csd_data[0U]), + EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ, HAL_MEMCARD_NOT_DMA); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + return result; + } + return EMMC_SUCCESS; +} + +/** set request MMC clock frequency. + * + * Function returns EMMC_SUCCESS if clock is already running in the desired frequency. + * EMMC_ERR is returned if the HW doesn't support requested clock frequency. + * If matching frequence cannot be set the closest frequence below should be selected. + * For example if 50MHz is requested, but HW supports only 48MHz then 48MHz should be returned in the freq parameter. + * + * - Pre-conditions:
+ * initialized eMMC driver with emmc_init(). + * Memory card and MMCSDIO host controller needs to be powered up beforehand. + * + * - Post-conditions:
+ * Desired clock frequency is set to memory card IF. + * + * param[in] freq frequency [Hz] + * retval EMMC_SUCCESS successful. + * retval EMMC_ERR_STATE state error. + * retval EMMC_ERR busy + */ +EMMC_ERROR_CODE emmc_set_request_mmc_clock(const uint32_t *freq) +{ + /* parameter check */ + if (freq == NULL) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_PARAM); + return EMMC_ERR_PARAM; + } + + /* state check */ + if ((mmc_drv_obj.initialize != TRUE) || (mmc_drv_obj.card_power_enable != TRUE)) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_STATE); + return EMMC_ERR_STATE; + } + + /* clock is already running in the desired frequency. */ + if ((mmc_drv_obj.clock_enable == TRUE) && (mmc_drv_obj.current_freq == *freq)) { + return EMMC_SUCCESS; + } + + /* busy check */ + if ((mem_read32(SD_INFO2) & SD_INFO2_CBSY) != 0U) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_CARD_BUSY); + return EMMC_ERR; + } + + set_sd_clk(*freq); + mmc_drv_obj.clock_enable = FALSE; + + return emmc_clock_ctrl(TRUE); /* clock on */ +} + +/** set sd clock. + * + * - Pre-conditions:
+ * CSD data must be stored in mmc_drv_obj.csd_data[]. + * + * - Post-conditions:
+ * set mmc clock. + * + * param[in] clkDiv request freq + * return None. + */ +static void set_sd_clk(uint32_t clkDiv) +{ + uint32_t dataL; + + dataL = (mem_read32(SD_CLK_CTRL) & (~SD_CLK_CTRL_CLKDIV_MASK)); + + switch (clkDiv) { + case 1U: /* 1/1 */ + dataL |= 0x000000FFU; + break; + case 2U: /* 1/2 */ + dataL |= 0x00000000U; + break; + case 4U: /* 1/4 */ + dataL |= 0x00000001U; + break; + case 8U: /* 1/8 */ + dataL |= 0x00000002U; + break; + case 16U: /* 1/16 */ + dataL |= 0x00000004U; + break; + case 32U:/* 1/32 */ + dataL |= 0x00000008U; + break; + case 64U:/* 1/64 */ + dataL |= 0x00000010U; + break; + case 128U:/* 1/128 */ + dataL |= 0x00000020U; + break; + case 256U: /* 1/256 */ + dataL |= 0x00000040U; + break; + case 512U:/* 1/512 */ + dataL |= 0x00000080U; + break; + default: + /* nop */ + break; + } + + mem_write32(SD_CLK_CTRL, dataL); + mmc_drv_obj.current_freq = (uint32_t)clkDiv; +} + + +/** Enable/Disable MMC clock + * + * - Pre-conditions:
+ * Before enabling the clock for the first time the desired clock frequency must be set with + * emmc_set_clock_freq(). + * Berore setting mmc_drv_obj.data_timeout with emmc_set_data_timeout(). + * + * - Post-conditions:
+ * After this function is called, clock to memory card IF is on/off. + * + * param[in] mode TRUE = clock on, FALSE = clock off + * retval EMMC_SUCCESS succeeded + * retval EMMC_ERR Busy + */ +static EMMC_ERROR_CODE emmc_clock_ctrl(uint32_t mode) +{ + uint32_t value; + + /* busy check */ + if ((mem_read32(SD_INFO2) & SD_INFO2_CBSY) != 0U) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_CARD_BUSY); + return EMMC_ERR; + } + + if (mode == TRUE) { + /* clock ON */ + value = ((mem_read32(SD_CLK_CTRL) | MMC_SD_CLK_START) & SD_CLK_WRITE_MASK); + mem_write32(SD_CLK_CTRL, value); /* on */ + mmc_drv_obj.clock_enable = TRUE; + } else { + /* clock OFF */ + value = ((mem_read32(SD_CLK_CTRL) & MMC_SD_CLK_STOP) & SD_CLK_WRITE_MASK); + mem_write32(SD_CLK_CTRL, value); /* off */ + mmc_drv_obj.clock_enable = FALSE; + } + + return EMMC_SUCCESS; +} + +/** Calculate Card support frequency. + * TRAN_SPEED defines the clock frequency when not in high speed mode. + * + * - Pre-conditions:
+ * CSD data must be stored in mmc_drv_obj.csd_data[]. + * + * - Post-conditions:
+ * None. + * return Frquency[Hz] + */ +static uint32_t emmc_calc_tran_speed(uint32_t* freq) +{ + const uint32_t unit[8U] = {10000U, 100000U, 1000000U, 10000000U, 0U, 0U, 0U, 0U}; /**< frequency unit (1/10) */ + const uint32_t mult[16U] = {0U, 10U, 12U, 13U, 15U, 20U, 26U, 30U, 35U, 40U, 45U, 52U, 55U, 60U, 70U, 80U}; /**< multiple factor (x10) */ + uint32_t maxFreq = 0U; + uint32_t result = 0U; + uint32_t tran_speed = EMMC_CSD_TRAN_SPEED(); + + /* tran_speed = 0x32 + * unit[tran_speed&0x7] = uint[0x2] = 1000000 + * mult[(tran_speed&0x78)>>3] = mult[0x30>>3] = mult[6] = 26 + * 1000000 * 26 = 26000000 (26MHz) + */ + + maxFreq = unit[tran_speed & EMMC_TRANSPEED_FREQ_UNIT_MASK] + * mult[(tran_speed & EMMC_TRANSPEED_MULT_MASK) >> EMMC_TRANSPEED_MULT_SHIFT]; + + if (maxFreq == 0U) { + result = 0U; + } else if ( MMC_FREQ_52MHZ <= maxFreq) { + *freq = MMC_52MHZ; + result = 1U; + } else if ( MMC_FREQ_26MHZ <= maxFreq) { + *freq = MMC_26MHZ; + result = 1U; + } else if ( MMC_FREQ_20MHZ <= maxFreq) { + *freq = MMC_20MHZ; + result = 1U; + } else { + *freq = MMC_400KHZ; + result = 1U; + } + + return result; +} + +/** Calculate read/write timeout. + * + * - Pre-conditions:
+ * CSD data must be stored in mmc_drv_obj.csd_data[]. + * + * - Post-conditions:
+ * set mmc clock. + * + * param[in] freq Base clock Div + * return SD_OPTION Timeout Counter + */ +static uint32_t emmc_set_timeout_register_value(uint32_t freq) +{ + uint32_t timeoutCnt = 0U; /* SD_OPTION - Timeout Counter */ + + switch (freq) { + case 1U:/* SDCLK * 2^27 */ + timeoutCnt = 0xE0U; + break; + case 2U:/* SDCLK * 2^27 */ + timeoutCnt = 0xE0U; + break; + case 4U:/* SDCLK * 2^26 */ + timeoutCnt = 0xD0U; + break; + case 8U:/* SDCLK * 2^25 */ + timeoutCnt = 0xC0U; + break; + case 16U:/* SDCLK * 2^24 */ + timeoutCnt = 0xB0U; + break; + case 32U:/* SDCLK * 2^23 */ + timeoutCnt = 0xA0U; + break; + case 64U:/* SDCLK * 2^22 */ + timeoutCnt = 0x90U; + break; + case 128U:/* SDCLK * 2^21 */ + timeoutCnt = 0x80U; + break; + case 256U:/* SDCLK * 2^20 */ + timeoutCnt = 0x70U; + break; + case 512U:/* SDCLK * 2^19 */ + timeoutCnt = 0x60U; + break; + default: + /* nop */ + break; + } + + return timeoutCnt; +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c new file mode 100644 index 00000000..4f01c824 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_multiboot.c @@ -0,0 +1,95 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC multi boot + ******************************************************************************/ +/****************************************************************************** + * @file emmc_multiboot.c + * - Version : 0.04 + * @brief data access interface to emmc. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 22.02.2022 0.01 First Release + * : 22.10.2021 0.02 Remove unnecessary code + * : 22.12.2021 0.03 Support static analysis + * : 06.01.2022 0.04 Modify SDHI access from DMA to PIO. + *****************************************************************************/ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include "emmc_config.h" +#include "emmc_hal.h" +#include "emmc_std.h" +#include "emmc_def.h" +#include "emmc_multiboot.h" +#include "rom_api.h" +#include "types.h" + + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ +uint32_t emmc_check_result(uint32_t result); + +/* ********************************* CODE ********************************** */ + + +#if defined(__RH850__) +uint32_t emmc_trans_data(uint32_t next_bootPartition, uintptr_t sourceSct, uintptr_t targetAd, uint32_t sectorSize) +{ + EMMC_ERROR_CODE result; + uint32_t rtn_val = EMMC_DEV_ERR; + + /* Partition select */ + result = emmc_select_partition((EMMC_PARTITION_ID)next_bootPartition); + + if (result == EMMC_SUCCESS) { + result = emmc_read_sector((uint32_t *)targetAd, sourceSct, sectorSize, LOADIMAGE_FLAGS_DMA_ENABLE); + } + + /* EMMC_ERROR_CODE -> ROM_XX */ + rtn_val = emmc_check_result((uint32_t)result); + + return rtn_val; +} +#endif /* #if defined(__RH850__) */ +uint32_t emmc_check_result(uint32_t result) +{ + uint32_t ret = EMMC_DEV_ERR_FAULT_INJECTION; + + if (result == EMMC_SUCCESS) { + ret = EMMC_DEV_OK; + } else if (result == EMMC_ERR) { + ret = EMMC_DEV_ERR; + } else { /* other */ + ret = EMMC_DEV_ERR_HW; + } + + return ret; +} +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c new file mode 100644 index 00000000..0145bd77 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_read.c @@ -0,0 +1,204 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC Read data access driver + ******************************************************************************/ +/****************************************************************************** + * @file emmc_read.c + * - Version : 0.04 + * @brief read data access function to emmc. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 22.02.2022 0.01 First Release + * : 22.10.2021 0.02 Remove unnecessary code + * : 22.12.2021 0.03 Support static analysis + * : 06.01.2022 0.04 Modify SDHI access from DMA to PIO. + *****************************************************************************/ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ +#include "emmc_config.h" +#include "emmc_hal.h" +#include "emmc_std.h" +#include "emmc_registers.h" +#include "emmc_def.h" +#include "log.h" +#include + +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + +#define EMMC_RW_SECTOR_COUNT_MAX 0x0000ffffUL + +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ + +static EMMC_ERROR_CODE emmc_multiple_block_read (uint32_t *buff_address_virtual, uint32_t sector_number, uint32_t count, HAL_MEMCARD_DATA_TRANSFER_MODE transfer_mode); + +static inline uint32_t get_min_value(uint32_t a, uint32_t b) +{ + uint32_t ret = a; + + if(b < a) + { + ret = b; + } + + return ret; +} + +/* ********************************* CODE ********************************** */ + +/** function of read sector + * + * This function always use block read. + * Single block read is not used. + * + * - Pre-conditions:
+ * MMC card is mounted. + * + * - Post-conditions:
+ * . + * + * param[in,out] buff_address_virtual virtual address of read data buffer. + * param[in] sector_number data address for MMC device (sector number). + * param[in] count number of sector. + * param[in] transfermode Mode of data transfer, DMA or not DMA. + */ +EMMC_ERROR_CODE emmc_read_sector(uint32_t *buff_address_virtual, uint32_t sector_number, uint32_t count, + uint32_t feature_flags) +{ + uint32_t trans_count; + uint32_t remain; + EMMC_ERROR_CODE result = EMMC_ERR; + HAL_MEMCARD_DATA_TRANSFER_MODE transfermode; + + /* parameter check */ + if (count == 0U) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_PARAM); + return EMMC_ERR_PARAM; + } + + /* state check */ + if (mmc_drv_obj.mount != TRUE) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_STATE); + return EMMC_ERR_STATE; + } + + /* DMA? */ + if ((feature_flags & LOADIMAGE_FLAGS_DMA_ENABLE) != 0U) { + transfermode = HAL_MEMCARD_DMA; + } else { + transfermode = HAL_MEMCARD_NOT_DMA; + } + + remain = count; + while (remain != 0U) { + trans_count = get_min_value(remain, EMMC_RW_SECTOR_COUNT_MAX); + result = emmc_multiple_block_read(buff_address_virtual, sector_number, trans_count, transfermode); + if (result != EMMC_SUCCESS) { + return result; + } + + buff_address_virtual += (EMMC_BLOCK_LENGTH_DW * trans_count); + sector_number += trans_count; + remain -= trans_count; + wdt_restart(); + } + + return EMMC_SUCCESS; +} + +/** multiple block read + * + * Multiple block read with pre-defined block count. + * + * - Pre-conditions:
+ * MMC card is mounted. + * + * - Post-conditions:
+ * . + * + * param[in,out] buff_address_virtual virtual address of read data buffer. + * param[in] sector_number data address for MMC device (sector number). + * param[in] count number of sector. (0x1 - 0xffff) + * param[in] transfer_mode Mode of data transfer, DMA or not DMA. + */ +static EMMC_ERROR_CODE emmc_multiple_block_read(uint32_t *buff_address_virtual, uint32_t sector_number, uint32_t count, + HAL_MEMCARD_DATA_TRANSFER_MODE transfer_mode) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + + /* parameter check */ + if ((count > EMMC_RW_SECTOR_COUNT_MAX) || (count == 0U) + || ((transfer_mode != HAL_MEMCARD_DMA) && (transfer_mode != HAL_MEMCARD_NOT_DMA))) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_PARAM); + return EMMC_ERR_PARAM; + } + + /* CMD23 */ + emmc_make_nontrans_cmd(CMD23_SET_BLOCK_COUNT, count); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + return result; + } + mem_write32(SD_SECCNT, count); + mem_write32(SD_STOP, 0x00000100U); + mem_write32(CC_EXT_MODE, (CC_EXT_MODE_CLEAR | CC_EXT_MODE_DMASDRW_ENABLE)); /* SD_BUF Read/Write DMA Transfer enable */ + + /* CMD18 */ + emmc_make_trans_cmd(CMD18_READ_MULTIPLE_BLOCK, sector_number, buff_address_virtual, count << EMMC_SECTOR_SIZE_SHIFT, + HAL_MEMCARD_READ, transfer_mode); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + return result; /* CMD18 error code */ + } + + /* CMD13 */ + emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16U); + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + return result; + } + + /* ready status check */ + if ((mmc_drv_obj.r1_card_status & EMMC_R1_READY) == 0U) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_CARD_BUSY); + return EMMC_ERR_CARD_BUSY; + } + + /* state check */ + if (mmc_drv_obj.current_state != EMMC_R1_STATE_TRAN) { + ERROR("%s:0x%08x\n",__func__,EMMC_ERR_CARD_STATE); + return EMMC_ERR_CARD_STATE; + } + + return EMMC_SUCCESS; +} + +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c new file mode 100644 index 00000000..11a66fe9 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/emmc/emmc_utility.c @@ -0,0 +1,301 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : eMMC Utility + ******************************************************************************/ +/****************************************************************************** + * @file emmc_utility.c + * - Version : 0.04 + * @brief Analysis of SDHI data. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 22.02.2022 0.01 First Release + * : 22.10.2021 0.02 Remove unnecessary code + * : 22.12.2021 0.03 Support static analysis + * : 06.01.2022 0.04 Modify SDHI access from DMA to PIO. + *****************************************************************************/ + +/* ************************ HEADER (INCLUDE) SECTION *********************** */ + +#include "emmc_config.h" +#include "emmc_hal.h" +#include "emmc_std.h" +#include "emmc_registers.h" +#include "emmc_def.h" +/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */ + +#define BUSY_SIGNAL (1U << 10U) + +static const uint32_t cmd_reg_hw[EMMC_CMD_MAX + 1U] = { + 0x00000000U, /* CMD0 */ + 0x00000701U, /* CMD1 */ + 0x00000002U, /* CMD2 */ + 0x00000003U, /* CMD3 */ + 0x00000004U, /* CMD4 */ + 0x00000505U, /* CMD5 */ + 0x00000406U, /* CMD6 */ + 0x00000007U, /* CMD7 */ + 0x00001C08U, /* CMD8 */ + 0x00000009U, /* CMD9 */ + 0x0000000AU, /* CMD10 */ + 0x00000000U, /* reserved */ + 0x0000000CU, /* CMD12 */ + 0x0000000DU, /* CMD13 */ + 0x00001C0EU, /* CMD14 */ + 0x0000000FU, /* CMD15 */ + 0x00000010U, /* CMD16 */ + 0x00000011U, /* CMD17 */ + 0x00007C12U, /* CMD18 */ + 0x00000C13U, /* CMD19 */ + 0x00000000U, + 0x00001C15U, /* CMD21 */ + 0x00000000U, + 0x00000017U, /* CMD23 */ + 0x00000018U, /* CMD24 */ + 0x00006C19U, /* CMD25 */ + 0x00000C1AU, /* CMD26 */ + 0x0000001BU, /* CMD27 */ + 0x0000001CU, /* CMD28 */ + 0x0000001DU, /* CMD29 */ + 0x0000001EU, /* CMD30 */ + 0x00001C1FU, /* CMD31 */ + 0x00000000U, + 0x00000000U, + 0x00000000U, + 0x00000423U, /* CMD35 */ + 0x00000424U, /* CMD36 */ + 0x00000000U, + 0x00000026U, /* CMD38 */ + 0x00000427U, /* CMD39 */ + 0x00000428U, /* CMD40 : send cmd */ + 0x00000000U, + 0x0000002AU, /* CMD42 */ + 0x00000000U, + 0x00000000U, + 0x00000000U, + 0x00000000U, + 0x00000000U, + 0x00000000U, + 0x00000C31U, + 0x00000000U, + 0x00000000U, + 0x00000000U, + 0x00007C35U, + 0x00006C36U, + 0x00000037U, /* CMD55 */ + 0x00000038U, /* CMD56 : Read */ + 0x00000000U, + 0x00000000U, + 0x00000000U, + 0x00000000U +}; +/* ********************** STRUCTURES, TYPE DEFINITIONS ********************* */ + +/* ********************** DECLARATION OF EXTERNAL DATA ********************* */ + +/* ************************** FUNCTION PROTOTYPES ************************** */ + +/* ********************************* CODE ********************************** */ + +/** make non-transfer command data + * + * Response data buffer is automatically selected. + * + * - Pre-conditions:
+ * Clock to memory card IF is enabled. + * + * - Post-conditions:
+ * After this function is called, command can be executed. + * + * param[in] cmd command information. + * param[in] arg command argument + * return None. + */ +void emmc_make_nontrans_cmd(HAL_MEMCARD_COMMAND cmd, uint32_t arg) +{ + /* command information */ + mmc_drv_obj.cmd_info.cmd = cmd; + mmc_drv_obj.cmd_info.arg = arg; + mmc_drv_obj.cmd_info.dir = HAL_MEMCARD_READ; + mmc_drv_obj.cmd_info.hw = cmd_reg_hw[(uint32_t)cmd & HAL_MEMCARD_COMMAND_INDEX_MASK]; + + /* clear data transfer information */ + mmc_drv_obj.trans_size = 0U; + mmc_drv_obj.remain_size = 0U; + mmc_drv_obj.buff_address_virtual = NULL; + mmc_drv_obj.buff_address_physical = NULL; + + /* response information */ + mmc_drv_obj.response_length = 6U; + + switch ((HAL_MEMCARD_RESPONSE_TYPE)((uint32_t)(mmc_drv_obj.cmd_info.cmd) & (uint32_t)HAL_MEMCARD_RESPONSE_TYPE_MASK)) { + case HAL_MEMCARD_RESPONSE_NONE: + mmc_drv_obj.response = (uint32_t *)mmc_drv_obj.response_data; + mmc_drv_obj.response_length = 0U; + break; + case HAL_MEMCARD_RESPONSE_R1: + mmc_drv_obj.response = &mmc_drv_obj.r1_card_status; + break; + case HAL_MEMCARD_RESPONSE_R1b: + mmc_drv_obj.cmd_info.hw |= BUSY_SIGNAL; /* bit10 = R1 busy bit */ + mmc_drv_obj.response = &mmc_drv_obj.r1_card_status; + break; + case HAL_MEMCARD_RESPONSE_R2: + mmc_drv_obj.response = (uint32_t *)mmc_drv_obj.response_data; + mmc_drv_obj.response_length = 17U; + break; + case HAL_MEMCARD_RESPONSE_R3: + mmc_drv_obj.response = &mmc_drv_obj.r3_ocr; + break; + case HAL_MEMCARD_RESPONSE_R4: + mmc_drv_obj.response = &mmc_drv_obj.r4_resp; + break; + case HAL_MEMCARD_RESPONSE_R5: + mmc_drv_obj.response = &mmc_drv_obj.r5_resp; + break; + default: + mmc_drv_obj.response = (uint32_t *)mmc_drv_obj.response_data; + break; + } +} + +/** Making command information for data transfer command. + * + * - Pre-conditions:
+ * None. + * + * - Post-conditions:
+ * After this function is called, command can be executed. + * + * param[in] cmd command + * param[in] arg command argument + * param[in] buff_address_virtual Pointer to buffer where data is/will be stored. (virtual address) + * Client is responsible of allocation and deallocation of the buffer. + * param[in] len transfer length in bytes + * param[in] dir direction + * param[in] transfer_mode Mode of data transfer, DMA or not DMA. + * return None. + */ +void emmc_make_trans_cmd(HAL_MEMCARD_COMMAND cmd, uint32_t arg, uint32_t *buff_address_virtual, /* virtual address */ +uint32_t len, HAL_MEMCARD_OPERATION dir, HAL_MEMCARD_DATA_TRANSFER_MODE transfer_mode) +{ + emmc_make_nontrans_cmd(cmd, arg); /* update common information */ + + /* for data transfer command */ + mmc_drv_obj.cmd_info.dir = dir; + mmc_drv_obj.buff_address_virtual = buff_address_virtual; + mmc_drv_obj.buff_address_physical = buff_address_virtual; + mmc_drv_obj.trans_size = len; + mmc_drv_obj.remain_size = len; + mmc_drv_obj.transfer_mode = transfer_mode; +} + +/** Send idle command. + * Function execute CMD0. + * + * - Pre-conditions:
+ * Clock to MMC I/F enabled. + * + * - Post-conditions:
+ * Card reset to idle or pre-idle state. + * + * param[in] arg CMD0 argument. + * return error code + */ +EMMC_ERROR_CODE emmc_send_idle_cmd(uint32_t arg) +{ + EMMC_ERROR_CODE result = EMMC_ERR; + uint32_t freq; + + /* initialize state */ + mmc_drv_obj.mount = FALSE; + mmc_drv_obj.selected = FALSE; + mmc_drv_obj.during_transfer = FALSE; + mmc_drv_obj.during_dma_transfer = FALSE; + mmc_drv_obj.dma_error_flag = FALSE; + mmc_drv_obj.force_terminate = FALSE; + mmc_drv_obj.state_machine_blocking = FALSE; + + mmc_drv_obj.bus_width = HAL_MEMCARD_DATA_WIDTH_1_BIT; + mmc_drv_obj.max_freq = MMC_20MHZ; /* 20MHz */ + mmc_drv_obj.current_state = EMMC_R1_STATE_IDLE; + + /* CMD0 (MMC clock is current frequency. if Data transfer mode, 20MHz or higher.) */ + emmc_make_nontrans_cmd(CMD0_GO_IDLE_STATE, arg); /* CMD0 */ + result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); + if (result != EMMC_SUCCESS) { + return result; + } + + /* change MMC clock(400KHz) */ + freq = MMC_400KHZ; + result = emmc_set_request_mmc_clock(&freq); + if (result != EMMC_SUCCESS) { + return result; + } + + return EMMC_SUCCESS; +} + +/** get bit field data for 16bytes data(CSD register). + * + * - Pre-conditions:
+ * . + * - Post-conditions:
+ * . + * + * param[in] data 16bytes data. + * param[in] top bit number(top). 128>top + * param[in] bottom bit number(bottom). (0<=bottom<=top) + * return bit field. + */ +uint32_t emmc_bit_field(const uint8_t *data, uint32_t top, uint32_t bottom) +{ + uint32_t value; + + uint32_t index_top = (uint32_t)(15U - (top >> 3U)); + uint32_t index_bottom = (uint32_t)(15U - (bottom >> 3U)); + + if (index_top == index_bottom) { + value = data[index_top]; + } else if ((index_top + 1U) == index_bottom) { + value = (uint32_t)(((uint32_t)data[index_top] << 8U) | data[index_bottom]); + } else if ((index_top + 2U) == index_bottom) { + value = (uint32_t)( + ((uint32_t)data[index_top] << 16U) | ((uint32_t)data[index_top + 1U] << 8U) | data[index_top + 2U]); + } else { + value = (uint32_t)( + ((uint32_t)data[index_top] << 24U) | ((uint32_t)data[index_top + 1U] << 16U) + | ((uint32_t)data[index_top + 2U] << 8U) | data[index_top + 3U]); + } + + value = ((value >> (bottom & 0x07U)) & ((1U << ((top - bottom) + 1U)) - 1U)); + + return value; +} + +/* ******************************** END ************************************ */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c new file mode 100644 index 00000000..8c960102 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c @@ -0,0 +1,79 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : FCPR initialize + ******************************************************************************/ + /****************************************************************************** + * @file fcpr.c + * - Version : 0.04 + * @brief Initial setting process of FCPR. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.10.2022 0.01 First Release + * : 22.11.2022 0.02 Defenition Remap address + * : 14.06.2023 0.03 Update the setting process for FCPR. + * : 21.08.2023 0.04 Add support for V4M. + *****************************************************************************/ + +#include +#include +#include +#include +#include + +#define CPG_MSTPCR_FCPR (((uint32_t)1U) << 17U) + +void fcpr_init(void) +{ + /* Register FPCR base address to SIC REMAP14 for V4M. */ + /* There are no problems for V4H because same value had set for V4H in BootROM. */ + set_sicremap_fcpr(); + +#if (SET_FCPR_PARAM == FCPR_ENABLE) + uint32_t reg; + + /* Enables supply of the clock signal */ + reg = mem_read32(CPG_MSTPCR28D0); + /* If supply of clock to FCPR is stopped */ + if (FALSE != (CPG_MSTPCR_FCPR & reg)) + { + /* Supply of clock to FCPR is start */ + reg &= ~(CPG_MSTPCR_FCPR); + mem_write32(CPG_MSTPCR28D0, reg); + } + + /* Set value to FCPR_CMP_CTRL */ + mem_write32(FCPR_CMP_CTRL, COMPRESSION_ENABLE); + /* Set value to FCPR_CMP_SPACE */ + mem_write32(FCPR_CMP_SPACE, 0x00000000U); + /* Set value to FCPR_CMP_STADR */ + mem_write32(FCPR_CMP_STADR, COMPRESSION_START_ADDR); + /* Set value to FCPR_CMP_EDADR */ + mem_write32(FCPR_CMP_EDADR, COMPRESSION_END_ADDR); + +#endif /* SET_FCPR_PARAM == FCPR_ENABLE */ +} +/* End of function fcpr_init(void) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/i2c/i2c.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/i2c/i2c.c new file mode 100644 index 00000000..005642a1 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/i2c/i2c.c @@ -0,0 +1,408 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : I2C driver + ******************************************************************************/ +/****************************************************************************** + * @file i2c.c + * - Version : 0.02 + * @brief I2C driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 16.11.2023 0.01 First Release + * : 24.06.2024 0.02 Remove pre-process branch of i2c3_read(). + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Setting value for PFC */ +#define IP0SR4_SDA3 (0xF0000000U) /* bit[31:28] */ +#define IP0SR4_SCL3 (0x0F000000U) /* bit[27:24] */ +#define GPSR4_SDA3 (0x00000080U) /* bit7 */ +#define GPSR4_SCL3 (0x00000040U) /* bit6 */ +#define MODSEL4_SDA3 (0x00000080U) /* bit7 */ +#define MODSEL4_SCL3 (0x00000040U) /* bit6 */ +#define PUEN4_SDA3 (0x00000080U) /* bit7 */ +#define PUEN4_SCL3 (0x00000040U) /* bit6 */ + +static void i2c3_init_pin_function(void); + +void i2c3_init(void) +{ + /* + * Module Standby setting for I2C3 is not nessesary + * because H/W initial value is 'Enables supply of the clock signal'. + */ + + /* PFC setting for I2C3. */ + i2c3_init_pin_function(); + + /* CDFD=0, HLSE=0, SME=0 */ + mem_write32((uintptr_t)I2C3_ICCCR2, 0x00000000U); + /* SCGD=H'3, CDF=H'6 */ + mem_write32((uintptr_t)I2C3_ICCCR, (SET_SCGD | SET_CDF)); + + mem_write32((uintptr_t)I2C3_ICSCR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICSSR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICSIER, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICSAR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE)); + mem_write32((uintptr_t)I2C3_ICMSR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMIER, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMAR, 0x00000000U); +} +/* End of function i2c3_init(void) */ + +static void i2c3_init_pin_function(void) +{ + uint32_t data; + + /* SDA3, SCL3 -> 0 */ + data = mem_read32((uintptr_t)PFC_IP0SR4_RW); + data &= ~(IP0SR4_SDA3 | IP0SR4_SCL3); + pfc_reg_write(PFC_IP0SR4_RW, data); + + /* SDA3, SCL3 -> 1 */ + data = mem_read32((uintptr_t)PFC_GPSR4_RW); + data |= (GPSR4_SDA3 | GPSR4_SCL3); + pfc_reg_write(PFC_GPSR4_RW, data); + + /* Select SDA3 and SCL3 to I2C mode */ + data = mem_read32((uintptr_t)PFC_MODSEL4_RW); + data |= (MODSEL4_SDA3 | MODSEL4_SCL3); + pfc_reg_write(PFC_MODSEL4_RW, data); + + /* SDA3, SCL3 -> 0 */ + data = mem_read32((uintptr_t)PFC_PUEN4_RW); + data &= ~(PUEN4_SDA3 | PUEN4_SCL3); + pfc_reg_write(PFC_PUEN4_RW, data); +} +/* End of function i2c3_init_pin_function(void) */ + +void i2c3_write(uint32_t slaveAdd, uint32_t regAdd, uint32_t setData) +{ + uint32_t data; + uint32_t err_count = 0U; + uint32_t status; + + while(true) + { + data = mem_read32((uintptr_t)I2C3_ICMCR); + data &= (FLAG_FSCL | FLAG_FSDA); + if(data == FLAG_FSCL) + { + break; + } + } + + status = I2C_NG; + while(I2C_NG == status) + { + /* Set MDBS and MIE (initialize) */ + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE)); + /* Set slave address */ + slaveAdd &= ~FLG_RW; /* write mode */ + mem_write32((uintptr_t)I2C3_ICMAR, slaveAdd); + /* Set register address */ + mem_write32((uintptr_t)I2C3_ICTXD, regAdd); + + while(true) + { + data = mem_read32((uintptr_t)I2C3_ICMCR); + data &= (FLAG_FSCL | FLAG_FSDA); + if(data == FLAG_FSCL) + { + break; + } + } + + /* Set MDBS, MIE and ESG */ + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_ESG)); /* start condition */ + + /* MDE(master data empty) & MAT(master address transmitted */ + status = i2c3_err_check(FLAG_MDE, FLAG_MAT, (FLAG_MNR|FLAG_MAL)); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("1:I2C data write error\n"); + panic; + } + } + } + + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE)); + + status = I2C_NG; + while(I2C_NG == status) + { + /* MDE and MAT clear */ + data = mem_read32((uintptr_t)I2C3_ICMSR); + data &= (FLAG_MNR | FLAG_MAL | FLAG_MST | FLAG_MDT | FLAG_MDR); + mem_write32((uintptr_t)I2C3_ICMSR, data); + /* MDE(master data empty) & MDT(master data transmitted) */ + status = i2c3_err_check(FLAG_MDE, FLAG_MDT, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("2:I2C data write error\n"); + panic; + } + } + } + + status = I2C_NG; + while(I2C_NG == status) + { + /* send voltage */ + mem_write32((uintptr_t)I2C3_ICTXD, setData); + /* MDE and MAT clear */ + data = mem_read32((uintptr_t)I2C3_ICMSR); + data &= (FLAG_MNR | FLAG_MAL | FLAG_MST | FLAG_MDR | FLAG_MAT); + mem_write32((uintptr_t)I2C3_ICMSR, data); + /* MDE(master data empty) & MDT(master data transmitted) */ + status = i2c3_err_check(FLAG_MDE, FLAG_MDT, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("3:I2C data write error\n"); + panic; + } + } + } + + /* Set MDBS, MIE and FSB */ + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_FSB)); /* stop condition */ + mem_write32((uintptr_t)I2C3_ICMSR, 0x00000000U); /* MST(master stop transmitted) clear */ + + while(true) + { + data = mem_read32((uintptr_t)I2C3_ICMSR); + if((data & FLAG_MST) != 0U) /* MST(master stop transmitted) */ + { + break; + } + } + + mem_write32((uintptr_t)I2C3_ICMSR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE)); + +} +/* End of function i2c3_write(uint32_t slaveAdd, uint32_t regAdd, uint32_t setData) */ + +void i2c3_read(uint32_t slaveAdd, uint32_t regAdd, uint32_t *revData) +{ + uint32_t data; + uint32_t err_count = 0; + uint32_t status; + + while(true) + { + data = mem_read32((uintptr_t)I2C3_ICMCR); + data &= (FLAG_FSCL | FLAG_FSDA); + if(data == FLAG_FSCL) + { + break; + } + } + + status = I2C_NG; + while(I2C_NG == status) + { + /* Set MDBS and MIE (initialize) */ + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE)); + /* Set slave address */ + slaveAdd &= ~FLG_RW; /* write mode */ + mem_write32((uintptr_t)I2C3_ICMAR, slaveAdd); + /* Set register address */ + mem_write32((uintptr_t)I2C3_ICTXD, regAdd); + + while(true) + { + data = mem_read32((uintptr_t)I2C3_ICMCR); + data &= (FLAG_FSCL | FLAG_FSDA); + if(data == FLAG_FSCL) + { + break; + } + } + + /* Set MDBS, MIE and ESG */ + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_ESG)); /* start condition */ + + /* MDE(master data empty) & MAT(master address transmitted */ + status = i2c3_err_check(FLAG_MDE, FLAG_MAT, (FLAG_MNR|FLAG_MAL)); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("1:I2C data read error\n"); + panic; + } + } + } + + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE)); + + status = I2C_NG; + while(I2C_NG == status) + { + /* MDE and MAT clear */ + data = mem_read32((uintptr_t)I2C3_ICMSR); + data &= 0x000000F6U; + mem_write32((uintptr_t)I2C3_ICMSR, data); + /* MDE(master data empty) */ + status = i2c3_err_check(FLAG_MDE, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("2:I2C data read error\n"); + panic; + } + } + } + + status = I2C_NG; + while(I2C_NG == status) + { + /* Set slave address */ + slaveAdd |= FLG_RW; /* read mode */ + mem_write32((uintptr_t)I2C3_ICMAR, slaveAdd); + /* Set MDBS, MIE and ESG */ + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_ESG)); /* start condition */ + mem_write32((uintptr_t)I2C3_ICMSR, 0x00000000U); + + /* MDR(master data recieved) & MAT(master address transmitted) */ + status = i2c3_err_check(FLAG_MDR, FLAG_MAT, (FLAG_MNR|FLAG_MAL)); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("3:I2C data read error\n"); + panic; + } + } + } + + status = I2C_NG; + while(I2C_NG == status) + { + /* Set MDBS, MIE and FSB */ + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE | FLAG_FSB)); /* stop condition */ + /* MDE and MAT clear */ + data = mem_read32((uintptr_t)I2C3_ICMSR); + data &= 0x000000FCU; + mem_write32((uintptr_t)I2C3_ICMSR, data); + status = i2c3_err_check(FLAG_MDR, FLAG_NONE, FLAG_MNR); + if(I2C_NG == status) + { + err_count++; + if(err_count > ERR_MAX) + { + ERROR("4:I2C data read error\n"); + panic; + } + } + if(I2C_OK == status) + { + *revData = mem_read32((uintptr_t)I2C3_ICRXD) & 0x000000FFU; + } + mem_write32((uintptr_t)I2C3_ICMSR, 0x00000000U); /* MST(master stop transmitted) clear */ + } + + while(true) + { + data = mem_read32((uintptr_t)I2C3_ICMSR); + if((data & FLAG_MST) != 0U) + { + break; + } + } + + mem_write32((uintptr_t)I2C3_ICMSR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMCR, (FLAG_MDBS | FLAG_MIE)); +} +/* End of function i2c3_read(uint32_t slaveAdd, uint32_t regAdd, uint32_t *revData) */ + +uint32_t i2c3_err_check(uint32_t first, uint32_t second, uint32_t error) +{ + uint32_t data; + uint32_t status = I2C_OK; + + while(true) + { + data = mem_read32((uintptr_t)I2C3_ICMSR); + if((data & first) != 0U) + { + if((second == FLAG_NONE) || ((data & second) != 0U)) + { + status = I2C_OK; + break; + } + } + if((data & error) != 0U) + { + mem_write32((uintptr_t)I2C3_ICMSR, ~error); + status = I2C_NG; + break; + } + } + return status; +} +/* End of function i2c3_err_check(uint32_t first, uint32_t second, uint32_t error) */ + +void i2c3_release(void) +{ + mem_write32((uintptr_t)I2C3_ICCCR2, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICCCR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICSCR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICSSR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICSIER, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICSAR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMCR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMSR, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMIER, 0x00000000U); + mem_write32((uintptr_t)I2C3_ICMAR, 0x00000000U); +} +/* End of function i2c3_release(void) */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ip_control.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ip_control.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ip_control.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/ip_control.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/mfis/mfis.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/mfis/mfis.c new file mode 100644 index 00000000..9f133cc7 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/mfis/mfis.c @@ -0,0 +1,82 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : MFIS driver + ******************************************************************************/ +/****************************************************************************** + * @file mfis.c + * - Version : 0.01 + * @brief Initial setting process of MFIS. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 02.04.2022 0.01 First Release + *****************************************************************************/ + +#include +#include +#include +#include +#include + +#define MFIS_CODE_VALID (0xACCE0000U) +#define MFISWPCNTR_ENABLE (0U) /* 1' b0: Enable write protection */ + +#define MFISLCKR_LCK_BIT ((uint32_t)1U << 0U) +#define MFISLCKR_UNLOCK (0U) + +void mfis_init(void) +{ + /* Write Protection Control Register */ + /* Enable write protection setting */ + mem_write32(MFIS_WPCNTR, (uint32_t)(MFIS_CODE_VALID + MFISWPCNTR_ENABLE)); + + /* IPL considers the situation that mutex of MFIS is not released, release it. */ + mfis_unlock(); +} +/* End of function mfis_init(void) */ + +void mfis_lock(void) +{ + /* MFIS Lock Register [j] (MFISLCKR[j]) */ + /* bit in LCK != 0? */ + while((mem_read32(MFIS_LCKR) & MFISLCKR_LCK_BIT) != MFISLCKR_UNLOCK) + { + micro_wait(10U); /* 10us */ + } + /* this bit is automatically set to "1" */ +} +/* End of function mfis_lock(void) */ + +void mfis_unlock(void) +{ + /* Write Access Control Register */ + /* MFISLCKR[j] Register address setting */ + mem_write32(MFIS_WACNTR, (uint32_t)(MFIS_CODE_VALID + MFISLCKR_ADDRESS)); + + /* MFIS Lock Register [j] (MFISLCKR[j]) */ + mem_write32(MFIS_LCKR, (uint32_t)MFISLCKR_UNLOCK); +} +/* End of function mfis_unlock(void) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/qos/qos.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/qos/qos.c new file mode 100644 index 00000000..fd0674d4 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/qos/qos.c @@ -0,0 +1,413 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : QoS initialize function + ******************************************************************************/ +/****************************************************************************** + * @file qos.c + * - Version : 0.04 + * @brief Initial setting process of QoS. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 23.05.2022 0.02 Integration of S4 and V4H + * Update QoS setting rev.0.02 (for S4) + * Update QoS setting rev.0.03 (for V4H) + * : 20.01.2023 0.03 Add DBSC W/A 1,2,3 (OTLINT-5579) + * : 21.08.2023 0.04 Add support for V4M. + *****************************************************************************/ + +#include +#if defined(__RH850G3K__) +#include +#include +#include +#else +#include +#endif +#include +#include +#include + +#if (RCAR_LSI == RCAR_S4) +#define RCAR_QOS_VERSION "base_v6.1" +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#define RCAR_QOS_VERSION "base_v6.1" +#endif /* RCAR_LSI == RCAR_S4 */ + +#define RCAR_DRAM_SPLIT_DISABLE (0U) +#define RCAR_DRAM_SPLIT_ENABLE (1U) +#define RCAR_REWT_TRAINING_DISABLE (0U) +#define RCAR_REWT_TRAINING_ENABLE (1U) + +#if defined(__RH850G3K__) +#define AXMM_BASE (BASE_AXMM_ADDR) +#else +#define AXMM_BASE (0xE6780000U) +#endif +#define AXMM_MMCR (AXMM_BASE + 0x4300U) +#define AXMM_ADSPLCR0 (AXMM_BASE + 0x4008U) +#define AXMM_ADSPLCR1 (AXMM_BASE + 0x400CU) +#define AXMM_ADSPLCR2 (AXMM_BASE + 0x4010U) +#define AXMM_ADSPLCR3 (AXMM_BASE + 0x4014U) + + +#if (RCAR_LSI == RCAR_S4) +#if defined(__RH850G3K__) +#define DBSC_BASE (BASE_DBSC_ADDR) +#else +#define DBSC_BASE (0xE6790000U) +#endif + +#define DBSC_CH_NUM (1U) /* Number of DBSCx */ +#define DBSC_A_CH_OFFSET (0U) /* 1ch only (for S4)*/ +#define DBSC_D_CH_OFFSET (0U) /* 1ch only (for S4)*/ + +#define DBSC_SYSCNT0 (DBSC_BASE + 0x0100U) +#define DBSC_SYSCNT0A (DBSC_BASE + 0x0108U) +#define DBSC_DBBUS0CNF2 (DBSC_BASE + 0x0808U) +#define DBSC_DBCAM0CNF1 (DBSC_BASE + 0x0904U) +#define DBSC_DBCAM0CNF2 (DBSC_BASE + 0x0908U) +#define DBSC_DBCAM0CNF3 (DBSC_BASE + 0x090CU) +#define DBSC_DBCAMDIS (DBSC_BASE + 0x09FCU) +#define DBSC_DBSCHCNT0 (DBSC_BASE + 0x1000U) +#define DBSC_DBSCHSZ0 (DBSC_BASE + 0x1010U) +#define DBSC_DBSCHRW0 (DBSC_BASE + 0x1020U) +#define DBSC_DBSCHQOS_0_0 (DBSC_BASE + 0x1030U) +#define DBSC_DBSCHQOS_0_1 (DBSC_BASE + 0x1034U) +#define DBSC_DBSCHQOS_0_2 (DBSC_BASE + 0x1038U) +#define DBSC_DBSCHQOS_0_3 (DBSC_BASE + 0x103CU) +#define DBSC_DBSCHQOS_4_0 (DBSC_BASE + 0x1070U) +#define DBSC_DBSCHQOS_4_1 (DBSC_BASE + 0x1074U) +#define DBSC_DBSCHQOS_4_2 (DBSC_BASE + 0x1078U) +#define DBSC_DBSCHQOS_4_3 (DBSC_BASE + 0x107CU) +#define DBSC_DBSCHQOS_9_0 (DBSC_BASE + 0x10C0U) +#define DBSC_DBSCHQOS_9_1 (DBSC_BASE + 0x10C4U) +#define DBSC_DBSCHQOS_9_2 (DBSC_BASE + 0x10C8U) +#define DBSC_DBSCHQOS_9_3 (DBSC_BASE + 0x10CCU) +#define DBSC_DBSCHQOS_12_0 (DBSC_BASE + 0x10F0U) +#define DBSC_DBSCHQOS_12_1 (DBSC_BASE + 0x10F4U) +#define DBSC_DBSCHQOS_12_2 (DBSC_BASE + 0x10F8U) +#define DBSC_DBSCHQOS_12_3 (DBSC_BASE + 0x10FCU) +#define DBSC_DBSCHQOS_13_0 (DBSC_BASE + 0x1100U) +#define DBSC_DBSCHQOS_13_1 (DBSC_BASE + 0x1104U) +#define DBSC_DBSCHQOS_13_2 (DBSC_BASE + 0x1108U) +#define DBSC_DBSCHQOS_13_3 (DBSC_BASE + 0x110CU) +#define DBSC_DBSCHQOS_14_0 (DBSC_BASE + 0x1110U) +#define DBSC_DBSCHQOS_14_1 (DBSC_BASE + 0x1114U) +#define DBSC_DBSCHQOS_14_2 (DBSC_BASE + 0x1118U) +#define DBSC_DBSCHQOS_14_3 (DBSC_BASE + 0x111CU) +#define DBSC_DBSCHQOS_15_0 (DBSC_BASE + 0x1120U) +#define DBSC_DBSCHQOS_15_1 (DBSC_BASE + 0x1124U) +#define DBSC_DBSCHQOS_15_2 (DBSC_BASE + 0x1128U) +#define DBSC_DBSCHQOS_15_3 (DBSC_BASE + 0x112CU) +#define DBSC_SCFCTST2 (DBSC_BASE + 0x170CU) +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +#if defined(__RH850G3K__) +#define DBSC_D_BASE (BASE_DBSC_ADDR + 0x14000U) +#define DBSC_A_BASE (BASE_DBSC_ADDR) +#else +#define DBSC_D_BASE (0xE67A4000U) +#define DBSC_A_BASE (0xE6790000U) +#endif + +#define DBSC_CH_NUM (2U) /* ch number of DBSCx */ +#define DBSC_A_CH_OFFSET (0x8000U) +#define DBSC_D_CH_OFFSET (0x4000U) + +#define DBSC_SYSCNT0 (DBSC_D_BASE + 0x0100U) +#define DBSC_SYSCNT0A (DBSC_A_BASE + 0x0100U) +#define DBSC_DBBUS0CNF2 (DBSC_A_BASE + 0x0808U) +#define DBSC_DBCAM0CNF1 (DBSC_A_BASE + 0x0904U) +#define DBSC_DBCAM0CNF2 (DBSC_A_BASE + 0x0908U) +#define DBSC_DBCAMDIS (DBSC_A_BASE + 0x09FCU) +#define DBSC_DBCAM0CNF3 (DBSC_A_BASE + 0x090CU) +#define DBSC_DBSCHCNT0 (DBSC_A_BASE + 0x1000U) +#define DBSC_DBSCHSZ0 (DBSC_A_BASE + 0x1010U) +#define DBSC_DBSCHRW0 (DBSC_A_BASE + 0x1020U) +#define DBSC_DBSCHQOS_0_0 (DBSC_A_BASE + 0x1100U) +#define DBSC_DBSCHQOS_0_1 (DBSC_A_BASE + 0x1104U) +#define DBSC_DBSCHQOS_0_2 (DBSC_A_BASE + 0x1108U) +#define DBSC_DBSCHQOS_0_3 (DBSC_A_BASE + 0x110CU) +#define DBSC_DBSCHQOS_4_0 (DBSC_A_BASE + 0x1140U) +#define DBSC_DBSCHQOS_4_1 (DBSC_A_BASE + 0x1144U) +#define DBSC_DBSCHQOS_4_2 (DBSC_A_BASE + 0x1148U) +#define DBSC_DBSCHQOS_4_3 (DBSC_A_BASE + 0x114CU) +#define DBSC_DBSCHQOS_9_0 (DBSC_A_BASE + 0x1190U) +#define DBSC_DBSCHQOS_9_1 (DBSC_A_BASE + 0x1194U) +#define DBSC_DBSCHQOS_9_2 (DBSC_A_BASE + 0x1198U) +#define DBSC_DBSCHQOS_9_3 (DBSC_A_BASE + 0x119CU) +#define DBSC_DBSCHQOS_12_0 (DBSC_A_BASE + 0x11C0U) +#define DBSC_DBSCHQOS_12_1 (DBSC_A_BASE + 0x11C4U) +#define DBSC_DBSCHQOS_12_2 (DBSC_A_BASE + 0x11C8U) +#define DBSC_DBSCHQOS_12_3 (DBSC_A_BASE + 0x11CCU) +#define DBSC_DBSCHQOS_13_0 (DBSC_A_BASE + 0x11D0U) +#define DBSC_DBSCHQOS_13_1 (DBSC_A_BASE + 0x11D4U) +#define DBSC_DBSCHQOS_13_2 (DBSC_A_BASE + 0x11D8U) +#define DBSC_DBSCHQOS_13_3 (DBSC_A_BASE + 0x11DCU) +#define DBSC_DBSCHQOS_14_0 (DBSC_A_BASE + 0x11E0U) +#define DBSC_DBSCHQOS_14_1 (DBSC_A_BASE + 0x11E4U) +#define DBSC_DBSCHQOS_14_2 (DBSC_A_BASE + 0x11E8U) +#define DBSC_DBSCHQOS_14_3 (DBSC_A_BASE + 0x11ECU) +#define DBSC_DBSCHQOS_15_0 (DBSC_A_BASE + 0x11F0U) +#define DBSC_DBSCHQOS_15_1 (DBSC_A_BASE + 0x11F4U) +#define DBSC_DBSCHQOS_15_2 (DBSC_A_BASE + 0x11F8U) +#define DBSC_DBSCHQOS_15_3 (DBSC_A_BASE + 0x11FCU) +#define DBSC_SCFCTST2 (DBSC_A_BASE + 0x1048U) +#endif /* RCAR_LSI == RCAR_S4 */ + +#if defined(__RH850G3K__) +#define QOS_BASE (BASE_QOS_ADDR) +#else +#define QOS_BASE (0xE67E0000U) +#endif +#define QOS_FIX_QOS_BANK0 (QOS_BASE + 0x00000000U) +#define QOS_FIX_QOS_BANK1 (QOS_BASE + 0x00001000U) +#define QOS_BE_QOS_BANK0 (QOS_BASE + 0x00002000U) +#define QOS_BE_QOS_BANK1 (QOS_BASE + 0x00003000U) +#define QOS_SL_INIT (QOS_BASE + 0x00008000U) +#define QOS_REF_ARS (QOS_BASE + 0x00008004U) +#define QOS_STATQC (QOS_BASE + 0x00008008U) +#define QOS_REF_ENBL (QOS_BASE + 0x00008044U) +#define QOS_BWG (QOS_BASE + 0x0000804CU) +#if RCAR_PERIODIC_WRITE_TRAINING != RCAR_REWT_TRAINING_DISABLE +#define QOSWT_FIX_QOS_BANK0 (QOS_BASE + 0x00000800U) +#define QOSWT_FIX_QOS_BANK1 (QOS_BASE + 0x00001800U) +#define QOSWT_BE_QOS_BANK0 (QOS_BASE + 0x00002800U) +#define QOSWT_BE_QOS_BANK1 (QOS_BASE + 0x00003800U) +#define QOSWT_WTEN (QOS_BASE + 0x00008030U) +#define QOSWT_WTREF (QOS_BASE + 0x00008034U) +#define QOSWT_WTSET0 (QOS_BASE + 0x00008038U) +#define QOSWT_WTSET1 (QOS_BASE + 0x0000803CU) +#endif /* RCAR_PERIODIC_WRITE_TRAINING != RCAR_REWT_TRAINING_DISABLE */ + +#define QOS_RAS (QOS_BASE + 0x00010000U) +#define QOS_RAEN (QOS_BASE + 0x00010018U) +#define QOS_DANN_LOW (QOS_BASE + 0x00010030U) +#define QOS_DANN_HIGH (QOS_BASE + 0x00010034U) +#define QOS_DANT (QOS_BASE + 0x00010038U) +#define QOS_EMS_LOW (QOS_BASE + 0x00010040U) +#define QOS_EMS_HIGH (QOS_BASE + 0x00010044U) +#define QOS_FSS (QOS_BASE + 0x00010048U) +#define QOS_INSFC (QOS_BASE + 0x00010050U) +#define QOS_EARLYR (QOS_BASE + 0x00010060U) +#define QOS_RACNT0 (QOS_BASE + 0x00010080U) +#define QOS_STATGEN0 (QOS_BASE + 0x00010088U) + +#define CCI_BASE (BASE_CCI_ADDR) +#define CCIQOS00 (CCI_BASE + 0xC020U) +#define CCIQOS01 (CCI_BASE + 0xC024U) +#define CCIQOS10 (CCI_BASE + 0xD000U) +#define CCIQOS11 (CCI_BASE + 0xD004U) +#if (RCAR_LSI == RCAR_S4) +#define CCIQOS12 (CCI_BASE + 0xD008U) +#define CCIQOS13 (CCI_BASE + 0xD00CU) +#endif + +static void dbsc_setting(void) +{ + for(uint32_t loop = 0; loop < DBSC_CH_NUM; loop++) + { + /* DBSC CAM, Scheduling Setting */ + mem_write32((DBSC_SYSCNT0 + (DBSC_D_CH_OFFSET * loop)), 0x00001234U); + mem_write32((DBSC_SYSCNT0A + (DBSC_A_CH_OFFSET * loop)), 0x00001234U); + mem_write32((DBSC_DBCAM0CNF1 + (DBSC_A_CH_OFFSET * loop)), 0x00104214U); /* dbcam0cnf1 */ + mem_write32((DBSC_DBCAM0CNF2 + (DBSC_A_CH_OFFSET * loop)), 0x000001C4U); /* dbcam0cnf2 */ + mem_write32((DBSC_DBCAM0CNF3 + (DBSC_A_CH_OFFSET * loop)), 0x00000003U); /* dbcam0cnf3 */ + +#if (RCAR_LSI == RCAR_S4) + #if (WA_OTLINT5579 == 1 && ECC_ENABLE == 1) + mem_write32((DBSC_DBCAMDIS + (DBSC_A_CH_OFFSET * loop)), 0x00000002U); /* OTLINT-5579: V4H DBSC W/A-1,2 */ + #else + mem_write32((DBSC_DBCAMDIS + (DBSC_A_CH_OFFSET * loop)), 0x00000000U); + #endif +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + #if (WA_OTLINT5579 == 1 && ECC_ENABLE == 1) + mem_write32((DBSC_DBCAMDIS + (DBSC_A_CH_OFFSET * loop)), 0x00000013U); /* OTLINT-5579: V4H DBSC W/A-1,2,3 */ + #elif (WA_OTLINT5579 == 1 && ECC_ENABLE == 0) + mem_write32((DBSC_DBCAMDIS + (DBSC_A_CH_OFFSET * loop)), 0x00000011U); /* OTLINT-5579: V4H DBSC W/A-3 */ + #else + mem_write32((DBSC_DBCAMDIS + (DBSC_A_CH_OFFSET * loop)), 0x00000010U); + #endif +#endif + + mem_write32((DBSC_DBSCHCNT0 + (DBSC_A_CH_OFFSET * loop)), 0x000F0037U); /* dbschcnt0 */ + mem_write32((DBSC_DBSCHSZ0 + (DBSC_A_CH_OFFSET * loop)), 0x00000001U); /* dbschsz0 */ + mem_write32((DBSC_DBSCHRW0 + (DBSC_A_CH_OFFSET * loop)), 0xF7311111U); /* dbschrw0 */ + mem_write32((DBSC_SCFCTST2 + (DBSC_A_CH_OFFSET * loop)), 0x111F1FFFU); + +#if (((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) && WA_OTLINT5579 == 1) + mem_write32((DBSC_DBBUS0CNF2 + (DBSC_A_CH_OFFSET * loop)), 0x00000007U); /* OTLINT-5579: V4H DBSC WA3 */ +#else + mem_write32((DBSC_DBBUS0CNF2 + (DBSC_A_CH_OFFSET * loop)), 0x00000003U); /* S4, V4H w/o DBSC WA3 */ +#endif + + /* DBSC QoS Setting */ + mem_write32((DBSC_DBSCHQOS_0_0 + (DBSC_A_CH_OFFSET * loop)), 0x0000FFFFU); + mem_write32((DBSC_DBSCHQOS_0_1 + (DBSC_A_CH_OFFSET * loop)), 0x00000480U); + mem_write32((DBSC_DBSCHQOS_0_2 + (DBSC_A_CH_OFFSET * loop)), 0x00000300U); + mem_write32((DBSC_DBSCHQOS_0_3 + (DBSC_A_CH_OFFSET * loop)), 0x00000180U); + mem_write32((DBSC_DBSCHQOS_4_0 + (DBSC_A_CH_OFFSET * loop)), 0x00000600U); + mem_write32((DBSC_DBSCHQOS_4_1 + (DBSC_A_CH_OFFSET * loop)), 0x00000480U); + mem_write32((DBSC_DBSCHQOS_4_2 + (DBSC_A_CH_OFFSET * loop)), 0x00000300U); + mem_write32((DBSC_DBSCHQOS_4_3 + (DBSC_A_CH_OFFSET * loop)), 0x00000180U); + mem_write32((DBSC_DBSCHQOS_9_0 + (DBSC_A_CH_OFFSET * loop)), 0x00000400U); + mem_write32((DBSC_DBSCHQOS_9_1 + (DBSC_A_CH_OFFSET * loop)), 0x00000300U); + mem_write32((DBSC_DBSCHQOS_9_2 + (DBSC_A_CH_OFFSET * loop)), 0x00000200U); + mem_write32((DBSC_DBSCHQOS_9_3 + (DBSC_A_CH_OFFSET * loop)), 0x00000100U); + mem_write32((DBSC_DBSCHQOS_12_0 + (DBSC_A_CH_OFFSET * loop)), 0x00000040U); + mem_write32((DBSC_DBSCHQOS_12_1 + (DBSC_A_CH_OFFSET * loop)), 0x00000030U); + mem_write32((DBSC_DBSCHQOS_12_2 + (DBSC_A_CH_OFFSET * loop)), 0x00000020U); + mem_write32((DBSC_DBSCHQOS_12_3 + (DBSC_A_CH_OFFSET * loop)), 0x00000010U); + mem_write32((DBSC_DBSCHQOS_13_0 + (DBSC_A_CH_OFFSET * loop)), 0x00000300U); + mem_write32((DBSC_DBSCHQOS_13_1 + (DBSC_A_CH_OFFSET * loop)), 0x00000240U); + mem_write32((DBSC_DBSCHQOS_13_2 + (DBSC_A_CH_OFFSET * loop)), 0x00000180U); + mem_write32((DBSC_DBSCHQOS_13_3 + (DBSC_A_CH_OFFSET * loop)), 0x000000C0U); + mem_write32((DBSC_DBSCHQOS_14_0 + (DBSC_A_CH_OFFSET * loop)), 0x00000200U); + mem_write32((DBSC_DBSCHQOS_14_1 + (DBSC_A_CH_OFFSET * loop)), 0x00000180U); + mem_write32((DBSC_DBSCHQOS_14_2 + (DBSC_A_CH_OFFSET * loop)), 0x00000100U); + mem_write32((DBSC_DBSCHQOS_14_3 + (DBSC_A_CH_OFFSET * loop)), 0x00000080U); + mem_write32((DBSC_DBSCHQOS_15_0 + (DBSC_A_CH_OFFSET * loop)), 0x00000100U); + mem_write32((DBSC_DBSCHQOS_15_1 + (DBSC_A_CH_OFFSET * loop)), 0x000000C0U); + mem_write32((DBSC_DBSCHQOS_15_2 + (DBSC_A_CH_OFFSET * loop)), 0x00000080U); + mem_write32((DBSC_DBSCHQOS_15_3 + (DBSC_A_CH_OFFSET * loop)), 0x00000040U); + + mem_write32((DBSC_SYSCNT0 + (DBSC_D_CH_OFFSET * loop)), 0x00000000U); + mem_write32((DBSC_SYSCNT0A + (DBSC_A_CH_OFFSET * loop)), 0x00000000U); + } +} +/* End of function dbsc_setting(void) */ + +void qos_init(void) +{ + uint32_t i; + + /* Setting the register of DBSC4 for QoS initialize */ + dbsc_setting(); + + NOTICE("QoS setting(%s)\n", RCAR_QOS_VERSION); + NOTICE("DRAM refresh interval 1.91 usec\n"); + +#if RCAR_PERIODIC_WRITE_TRAINING != RCAR_REWT_TRAINING_DISABLE + NOTICE("Periodic Write DQ Training\n"); +#endif /* RCAR_PERIODIC_WRITE_TRAINING != RCAR_REWT_TRAINING_DISABLE */ + +#if (RCAR_LSI == RCAR_S4) + /* Resource Alloc setting */ + mem_write32(QOS_RAS, 0x00000028U); + mem_write32(QOS_DANN_LOW, 0x02020201U); + mem_write32(QOS_DANN_HIGH, 0x04040200U); + mem_write32(QOS_DANT, 0x00181004U); + mem_write32(QOS_EMS_LOW, 0x00000000U); + mem_write32(QOS_EMS_HIGH, 0x00000000U); + mem_write32(QOS_FSS, 0x0000000AU); + mem_write32(QOS_INSFC, 0x030F0001U); + mem_write32(QOS_EARLYR, 0x00000000U); + mem_write32(QOS_RACNT0, 0x00050003U); + mem_write32(QOS_STATGEN0, 0x00000000U); + + /* QoS MSTAT setting */ + mem_write32(QOS_SL_INIT, 0x00050100U); + mem_write32(QOS_REF_ARS, 0x00FB0000U); + mem_write32(QOS_REF_ENBL, 0x00000012U); + mem_write32(QOS_BWG, 0x00000002U); + mem_write32(AXMM_MMCR, 0x00010000U); + + mem_write32(CCIQOS00, 0x08000000); + mem_write32(CCIQOS01, 0x08000000); + mem_write32(CCIQOS10, 0x00000001); + mem_write32(CCIQOS11, 0x00000001); + mem_write32(CCIQOS12, 0x00000001); + mem_write32(CCIQOS13, 0x00000001); +#elif ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) + #if (RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_ENABLE) + /* Address Split 2ch */ + mem_write32(AXMM_ADSPLCR0, 0x00000000U); + mem_write32(AXMM_ADSPLCR1, 0x00FF1B0CU); + mem_write32(AXMM_ADSPLCR2, 0x00000000U); + mem_write32(AXMM_ADSPLCR3, 0x00000000U); +#endif + + mem_write32(CCIQOS00, 0x08000000); + mem_write32(CCIQOS01, 0x08000000); + mem_write32(CCIQOS10, 0x00000000); + mem_write32(CCIQOS11, 0x00000000); + + /* Resource Alloc setting */ + mem_write32(QOS_RAS, 0x00000040U); + mem_write32(QOS_DANN_LOW, 0x02020201U); + mem_write32(QOS_DANN_HIGH, 0x04040200U); + mem_write32(QOS_DANT, 0x00181008U); + mem_write32(QOS_EMS_LOW, 0x00000000U); + mem_write32(QOS_EMS_HIGH, 0x00000000U); + mem_write32(QOS_FSS, 0x0000000AU); + mem_write32(QOS_INSFC, 0x030F0001U); + mem_write32(QOS_EARLYR, 0x00000000U); + mem_write32(QOS_RACNT0, 0x00050003U); + mem_write32(QOS_STATGEN0, 0x00000000U); + + /* QoS MSTAT setting */ + mem_write32(QOS_SL_INIT, 0x00050100U); + mem_write32(QOS_REF_ARS, 0x00FB0000U); + mem_write32(QOS_REF_ENBL, 0x00000012U); + mem_write32(QOS_BWG, 0x00000004U); + #if (((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) && WA_OTLINT5579 == 1) + mem_write32(AXMM_MMCR, 0x00000000U); /* OTLINT-5579: V4H DBSC WA3 */ + #else + mem_write32(AXMM_MMCR, 0x00010000U); + #endif + +#endif /* RCAR_LSI == RCAR_S4 */ + + for (i = 0U; i < QOS_TBL_MAX; i++) + { + mem_write64((QOS_FIX_QOS_BANK0 + (i * 8U)), g_qosbw_tbl[i].fix); + mem_write64((QOS_FIX_QOS_BANK1 + (i * 8U)), g_qosbw_tbl[i].fix); + mem_write64((QOS_BE_QOS_BANK0 + (i * 8U)), g_qosbw_tbl[i].be); + mem_write64((QOS_BE_QOS_BANK1 + (i * 8U)), g_qosbw_tbl[i].be); + } + +#if RCAR_PERIODIC_WRITE_TRAINING != RCAR_REWT_TRAINING_DISABLE + for (i = 0U; i < QOS_TBL_MAX; i++) + { + mem_write64((QOSWT_FIX_QOS_BANK0 + (i * 8U)), g_qoswt_tbl[i].fix); + mem_write64((QOSWT_FIX_QOS_BANK1 + (i * 8U)), g_qoswt_tbl[i].fix); + mem_write64((QOSWT_BE_QOS_BANK0 + (i * 8U)), g_qoswt_tbl[i].be); + mem_write64((QOSWT_BE_QOS_BANK1 + (i * 8U)), g_qoswt_tbl[i].be); + } +#endif /* RCAR_PERIODIC_WRITE_TRAINING != RCAR_REWT_TRAINING_DISABLE */ + + /* QoS SRAM setting */ + mem_write32(QOS_RAEN, 0x00000001U); +#if RCAR_PERIODIC_WRITE_TRAINING != RCAR_REWT_TRAINING_DISABLE + mem_write32(QOSWT_WTREF, 0x02080208U); + mem_write32(QOSWT_WTSET0, 0x14A6050BU); + mem_write32(QOSWT_WTSET1, 0x14A6050BU); + mem_write32(QOSWT_WTEN, 0x00000001U); +#endif /* RCAR_PERIODIC_WRITE_TRAINING != RCAR_REWT_TRAINING_DISABLE */ + mem_write32(QOS_STATQC, 0x00000101U); +} +/* End of function qos_init(void) */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rpc/rpc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rpc/rpc.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rpc/rpc.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rpc/rpc.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c new file mode 100644 index 00000000..291d6392 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/rtvram/rtvram.c @@ -0,0 +1,77 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : RT-VRAM driver + ******************************************************************************/ +/****************************************************************************** + * @file RTVRAM.c + * - Version : 0.03 + * @brief RT-VRAM driver. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 17.11.2021 0.01 First Release + * : 03.12.2021 0.02 remove Cache flush. + * : 06.01.2022 0.03 Static analysis support + *****************************************************************************/ + +#include +#include +#include +#include +#include + +#define RTVRAM_VBUF_CFG_CACHE_MODE_8WAY (1U << 8U) +#define RTVRAM_VBUF_CFG_VBUF_SIZE_28M (6U << 0U) + +#define RTVRAM_EXT_MODE_EXT (1U << 0U) + +#define RTVRAM_VBUF_NUM (7U) + +#define RTVRAM_EXTEND_ENABLE (1U) + +void rtvram_extendmode(void) +{ +#if (RTVRAM_EXTEND == RTVRAM_EXTEND_ENABLE) + uint32_t reg; + uint32_t loop; + + /* Set each 4MB from the top of SDRAM as the buffer area of RT-VRAM. */ + for(loop = 0; loop < RTVRAM_VBUF_NUM; loop++) + { + mem_write32(get_vbuf_baddr_addr(loop), (uint32_t)((SDRAM_40BIT_ADDR_TOP + (RTVRAM_VBUF_AREA_SIZE * loop)) >> 16U)); + } + + reg = mem_read32(RTVRAM_VBUF_CFG); + reg |= (RTVRAM_VBUF_CFG_CACHE_MODE_8WAY | RTVRAM_VBUF_CFG_VBUF_SIZE_28M); /* Cache Mode: 8-way, VBF size: 28M */ + mem_write32(RTVRAM_VBUF_CFG, reg); + + /* Set at the end */ + mem_write32(RTVRAM_EXT_MODE, RTVRAM_EXT_MODE_EXT); /* Change from Compatible Mode to Extended Mode */ + + syncm(); +#endif +} +/* End of function rtvram_extendmode(void) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/sysc/sysc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/sysc/sysc.c new file mode 100644 index 00000000..29a3f1b6 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/sysc/sysc.c @@ -0,0 +1,109 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* Copyright 2023-2024 Renesas Electronics Corporation All rights reserved. +*******************************************************************************/ + + + +/******************************************************************************* + * DESCRIPTION : System Controller function + ******************************************************************************/ +/****************************************************************************** + * @file sysc.c + * - Version : 0.04 + * @brief + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 29.09.2023 0.01 First Release + * : 13.11.2023 0.02 Add software reset + * : 16.11.2023 0.03 Add APSREG initialization process. + * : 22.10.2024 0.04 Update the C4 power domain setting process. +*****************************************************************************/ +#include "mem_io.h" +#include "sysc.h" +#include "cpg_register.h" +#include "log.h" +#include "cpu_on.h" +#include "ap_system_core_register.h" + +/* + * V4M turns on C4 power before starting CA + * V4M HWM:SYSC:Operation:Power Control of Non Arm CPU Modules + */ +#if (RCAR_LSI == RCAR_V4M) +void sysc_c4_power_on(void) +{ + uint32_t reg; + + /* + * Need to execute APSREG initialization before C4 power on according to + * R-Car V4M Series User's Manual '5.4.3 Register Initialization Before C4 power on'. + */ + reg = mem_read32(ap_core_get_ap_cluster_n_aux0_addr(0U)); + reg |= AP_CORE_APSREG_AP_CLUSTER_N_AUX0_INIT; + mem_write32(ap_core_get_ap_cluster_n_aux0_addr(0U), reg); + + reg = mem_read32(AP_CORE_APSREG_CCI500_AUX); + reg |= AP_CORE_APSREG_CCI500_AUX_ACTDIS; + mem_write32(AP_CORE_APSREG_CCI500_AUX, reg); + + /* 1.Write the set value in SYSCIER0 and SYSCIMR0 */ + reg = mem_read32(SYSC_SYSCIER0); + mem_write32(SYSC_SYSCIER0, reg | SYSCIER0_PDR31); + reg = mem_read32(SYSC_SYSCIMR0); + mem_write32(SYSC_SYSCIMR0, reg | SYSCIMR0_PDR31); + + /* 2.Confirm that SYSCSR.BUSY[1] becomes 1.*/ + while (true) + { + reg = mem_read32(SYSC_SYSCSR); + if (SYSCSR_BUSY1 == (reg & SYSCSR_BUSY1)) + { + break; + } + } + + /* 3.Write the reset value in SRCR11 and SESTCLR11 */ + reg = mem_read32(CPG_SRCR11); + mem_write32(CPG_SRCR11, reg | CPGSRCR_PDR11); + mem_write32(CPG_SRSTCLR11, CPGSRCR_PDR11); + + /* 4.Write the set value in PDRONCR31 */ + mem_write32(SYSC_PDRONCR31, PDRONCR31_PWRON); + + /* 5.Confirm that SYSCISCR0.PDR[31] becomes 1.*/ + while (true) + { + reg = mem_read32(SYSC_SYSCISCR0); + if (SYSCISCR0_PDR31 == (reg & SYSCISCR0_PDR31)) + { + break; + } + } + + /* 6.Clear the bit31(PDR[31]) in SYSCISCR0 to 0. */ + mem_write32(SYSC_SYSCISCR0, SYSCISCR0_PDR31); +} +/* End of function sysc_c4_power_on(void) */ +#endif /* RCAR_LSI == RCAR_V4M */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/wdt/wdt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/wdt/wdt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/wdt/wdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/ip/wdt/wdt.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/icumx_loader_v4m.ld diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader.S new file mode 100644 index 00000000..e824f243 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader.S @@ -0,0 +1,168 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader start code + ******************************************************************************/ + + .global code_start + .global _loader_main + .global ___ghsend_RT_stack /* RT-SRAM stack Logical end address */ + .global ___ghs_set_stack_chk_guard + + BOOTROM_CODE_START_ADDRESS .set 0x01104000 /* Boot ROM start address */ + BOOTROM_CODE_END_ADDRESS .set 0x0112CFFC /* Boot ROM end address */ + SICREMAP_WINDOW_AREA_START_ADDRESS .set 0xFC000000 /* Remap 0 start address */ + SICREMAP_WINDOW_AREA_END_ADDRESS .set 0xFEBFFFFC /* SIC area end address */ + ICU_REGISTER_AREA_START_ADDRESS .set 0xFEDE0000 /* ICUMXB register area start address */ + ICU_REGISTER_AREA_END_ADDRESS .set 0xFFFEFFFC /* ICUMXB register area end address */ + + MPAT_SX_SR_ENABLE .set 0x000000E8 /* SV mode Read/Execution enable */ + MPAT_SW_SR_ENABLE .set 0x000000D8 /* SV mode Read/Writer enable */ + MPRC_E3_TO_E0_ENABLE .set 0x0000000F /* E0,E1,E2,E3 enable */ + MPM_SVP_MPE_ENABLE .set 0x00000003 /* SV mode protect enable, MPU enable */ + MPAT_ALL_DISABLE .set 0x00000040 + MPM_ALL_DISABLE .set 0x00000000 + + .section ".reset", "ax" + .align 2 + + +code_start: +/* ; initialize registers */ + mov r0, r1 + mov r0, r2 + mov r0, r3 + mov r0, r4 + mov r0, r5 + mov r0, r6 + mov r0, r7 + mov r0, r8 + mov r0, r9 + mov r0, r10 + mov r0, r11 + mov r0, r12 + mov r0, r13 + mov r0, r14 + mov r0, r15 + mov r0, r16 + mov r0, r17 + mov r0, r18 + mov r0, r19 + mov r0, r20 + mov r0, r21 + mov r0, r22 + mov r0, r23 + mov r0, r24 + mov r0, r25 + mov r0, r26 + mov r0, r27 + mov r0, r28 + mov r0, r29 + ldsr r0, 0, 0 + ldsr r0, 16, 0 + +/* set global pointer * + mov ___ghsbegin_sdabase, gp +/* set stack pointer */ + mov ___ghsend_RT_stack, sp + +/* MPU Disable */ + stsr 0, r6 ,5 + andi 0xFFFE, r6, r6 + ldsr r6, 0, 5 + SYNCM + +/* MPU setting */ + mov BOOTROM_CODE_START_ADDRESS, r12 /* MPLA0 */ + ldsr r12, 0, 6 + mov BOOTROM_CODE_END_ADDRESS, r12 /* MPUA0 */ + ldsr r12, 1, 6 + mov ___ghsbegin_reset, r12 /* MPLA1 */ + ldsr r12, 4, 6 + mov ___ghsend_rom_end, r12 /* MPUA1 */ + ldsr r12, 5, 6 + mov SICREMAP_WINDOW_AREA_START_ADDRESS, r12 /* MPLA2 */ + ldsr r12, 8, 6 + mov SICREMAP_WINDOW_AREA_END_ADDRESS, r12 /* MPUA2 */ + ldsr r12, 9, 6 + mov ICU_REGISTER_AREA_START_ADDRESS, r12 /* MPLA3 */ + ldsr r12, 12, 6 + mov ICU_REGISTER_AREA_END_ADDRESS, r12 /* MPUA3 */ + ldsr r12, 13, 6 + mov MPAT_SX_SR_ENABLE, r12 /* MPAT0 */ + ldsr r12, 2, 6 + mov MPAT_SX_SR_ENABLE, r12 /* MPAT1 */ + ldsr r12, 6, 6 + mov MPAT_SW_SR_ENABLE, r12 /* MPAT2 */ + ldsr r12, 10, 6 + mov MPAT_SW_SR_ENABLE, r12 /* MPAT3 */ + ldsr r12, 14, 6 + mov MPRC_E3_TO_E0_ENABLE, r12 /* MPRC */ + ldsr r12, 1, 5 + mov MPM_SVP_MPE_ENABLE, r12 /* MPM */ + ldsr r12, 0, 5 + SYNCM + +/* BSS clear */ + mov ___ghsbegin_bss, r6 + mov ___ghsend_bss, r7 + mov r0, r1 +loop_clear: + st.dw r0, 0[r6] + addi 8, r6, r6 + cmp r7, r6 + bl loop_clear + +/* Set canary before jump another function. */ +/* Don't call functions before calling __ghs_set_stack_chk_guard. */ + jarl ___ghs_set_stack_chk_guard, lp + + mov _loader_main, r2 + jarl [r2], lp + +/* Release MPU setting */ + mov MPM_ALL_DISABLE, r12 + ldsr r12, 0, 5 /* MPM */ + ldsr zero, 1, 5 /* MPRC */ + mov MPAT_ALL_DISABLE, r12 + ldsr r12, 2, 6 /* MPAT0 */ + ldsr r12, 6, 6 /* MPAT1 */ + ldsr r12, 10, 6 /* MPAT2 */ + ldsr r12, 14, 6 /* MPAT3 */ + ldsr zero, 0, 6 /* MPLA0 */ + ldsr zero, 1, 6 /* MPUA0 */ + ldsr zero, 4, 6 /* MPLA1 */ + ldsr zero, 5, 6 /* MPUA1 */ + ldsr zero, 8, 6 /* MPLA2 */ + ldsr zero, 9, 6 /* MPUA2 */ + ldsr zero, 12, 6 /* MPLA3 */ + ldsr zero, 13, 6 /* MPUA3 */ + SYNCM + + jmp [r10] + nop + halt + + .section ".padding" + .align 4 diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_common.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_s4.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_s4.c new file mode 100644 index 00000000..2d556af4 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_s4.c @@ -0,0 +1,490 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader main function + ******************************************************************************/ +/****************************************************************************** + * @file loader_main.c + * - Version : 0.15 + * @brief 1. IP initialization. + * 2. DMA transfer the binary image from Flash to RAM. + * 3. Authentication of the transferred image. + * 4. Boot CR and CA core. + * 5. Release of used resources. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 28.07.2021 0.01 First Release + * : 03.09.2021 0.02 Modify macro definition name. + * Add process to call rpc_release function. + * : 30.09.2021 0.03 Support of eMMC boot. + * : 15.10.2021 0.04 Modified the MCU boot sequence. + * remove include of Flash/eMMC. + * : 03.12.2021 0.05 Add RT-VRAM extend mode. + * : CA IPL boot support + * : 06.01.2022 0.06 Support for two-stage boot of G4MH + * : Add the Reset mask release process for RWDT. + * : Add exception handling for ICUMX_WDTA. + * : 20.01.2022 0.07 Capture DDR rev.0.02rc11 + * Add ICUMX name unification. + * : 28.02.2022 0.08 Modify the process of setting the parameters + * used by BL31 in IPL. + * : 14.04.2022 0.09 Fixed Set SDCLK to 200MHz. + * : 23.05.2022 0.10 Integration of S4 and V4H + * Renamed from loader_main.c to loader_main_s4.c. + * : 04.07.2022 0.11 Change loading Control Domain process to + * calling load_main_for_mcu() function. + * : 05.08.2022 0.12 Add authentication of software minimum + * version table. + * : 30.09.2022 0.13 Modify pre-process pranch in load_main_for_mcu + * function. + * Modify authentication process of software + * minimum version. + * : 12.01.2023 0.14 Modified argument to fixed + * when calls smoni_set_param() function. + * Modified processing sequence for Access + * protection. + * : 04.04.2023 0.15 Removed stdio.h. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Provided code */ +#include "../ip/ddr/boot_init_dram.h" +# if (ECC_ENABLE == 1) + #include "../ip/ddr/s4/lpddr4x/ecc_enable_s4.h" +# endif + +#define CA_IPL (0U) +#define BL31 (1U) + +#define WDTRSTCR_RWDT_RSTMSK ((uint32_t)1U << 0U) +#define WDTRSTCR_PASSWORD (0xA55A0000U) + +/* flag of set BL31 parameter*/ +#define CA_APP_SET_PARAM_ENABLE (1U) +/* Calculation set address for BL31 parameter */ +#define SMONI_IPL_PARAM_OFFSET (0x00022200U) +#define SMONI_EP_INFO_OFFSET (SMONI_IPL_PARAM_OFFSET + 0x0030U) +#define OPTEE_EP_INFO_OFFSET (SMONI_IPL_PARAM_OFFSET + 0x0088U) +#define BL31_KIND_BOOT_ADDR (SMONI_IPL_PARAM_OFFSET + 0x0D00U) +/* KIND BOOT flag*/ +#define BL31_COLD_BOOT (0x0000000000000000U) +#define BL31_WARM_BOOT (0x0000000000000001U) +#define SMONI_KIND_BOOT_PARAM (0xFFFFFFFFFFFFFFFFU) +/* Program top address of Secure Monitor(BL31), OP-TEE and u-boot. */ +#define SMONI_PHYS_TOP_ADDR (0x46400000U) +#define OPTEE_PHYS_TOP_ADDR (0x44100000U) +#define UBOOT_PHYS_TOP_ADDR (0x50000000U) + +/* struct */ +typedef struct{ + uint8_t uctype; + uint8_t ucversion; + uint16_t ussize; + uint32_t uiattr; + uint32_t psecmonimageinfo_low; + uint32_t psecmonimageinfo_high; + uint32_t psecoptepinfo_low; + uint32_t psecoptepinfo_high; + uint32_t psecoptimageinfo_low; + uint32_t psecoptimageinfo_high; + uint32_t pnonsecepinfo_low; + uint32_t pnonsecepinfo_high; + uint32_t pnonsecimageinfo_low; + uint32_t pnonsecimageinfo_high; +}st_smoni_iplparams_t; + +typedef struct{ + uint8_t uctype; + uint8_t ucversion; + uint16_t ussize; + uint32_t uiattr; + uint32_t ulpc_low; + uint32_t ulpc_high; + uint32_t ulspsr_low; + uint32_t ulspsr_high; + uint32_t ularg0_low; + uint32_t ularg0_high; + uint32_t ularg1_low; + uint32_t ularg1_high; + uint32_t ularg2_low; + uint32_t ularg2_high; + uint32_t ularg3_low; + uint32_t ularg3_high; + uint32_t ularg4_low; + uint32_t ularg4_high; + uint32_t ularg5_low; + uint32_t ularg5_high; + uint32_t ularg6_low; + uint32_t ularg6_high; + uint32_t ularg7_low; + uint32_t ularg7_high; +}st_smoni_entrypointinfo_t; + +static void load_main_for_mcu(const LOAD_INFO *li, uint32_t is_verify); +static void smoni_set_param(uint32_t smoni_entry_point, + uint32_t tee_entry_point, + uint32_t uboot_entry_point); + +static void load_main_for_mcu(const LOAD_INFO *li); + +#if ((CR_SECURE_DEBUG == SECURE_DEBUG_ENABLE) || (ADD_HOTPLUG_MAGIC == ADD_MAGIC_NUMBER)) +#define HOTPLUG_MAGIC_NUM (0x853F912EU) +#else +#define HOTPLUG_MAGIC_NUM (0x00000000U) +#endif +__attribute__ ((section (".cr_hot_plug_magic"))) const uint32_t magic_num[4] = {0x00000000U, 0x00000000U, + 0x00000000U, HOTPLUG_MAGIC_NUM}; + +uint32_t loader_main(void) +{ + uint32_t reg; /* store register value */ + int32_t result; /* store result of ddr_init() */ + uint32_t is_verify = SECURE_BOOT; + uint32_t boot_ca_id; + uint32_t auth_count = 0U; + __attribute__((__unused__)) uint32_t loop = 0U; + __attribute__((__unused__)) uint32_t ca_load_num; /* number of load for Optional CA program */ + LOAD_INFO li[MAX_PLACED] = {0U}; + + +/***************************************************************************** + * Initialize Hardware + *****************************************************************************/ + /* IP initialize */ + ip_init(); + + /* Unmask the detection of RWDT overflow */ + reg = mem_read32(RST_WDTRSTCR); + reg &= ~WDTRSTCR_RWDT_RSTMSK; + reg |= WDTRSTCR_PASSWORD; + mem_write32(RST_WDTRSTCR, reg); + +# if (ECC_ENABLE == 1) +/***************************************************************************** + * ECC and EDC Initialize + *****************************************************************************/ + ecc_rtsram_enable(); + edc_axi_enable(); + edc_vram_enable(); +#endif + +/***************************************************************************** + * Work Around for APMU + *****************************************************************************/ + wa_setting_apmu(); + +/***************************************************************************** + * Output boot message + *****************************************************************************/ + is_verify =print_boot_msg(); + +/***************************************************************************** + * Setting Access protection + *****************************************************************************/ + /* Region ID access protection */ + rgid_protection(); + ram_protection(); + + /* Change the Region ID (Master) of the Module used for data transfer to a temporary setting. */ + set_master_rgid_4_tfr_mod(); + +/***************************************************************************** + * Load Certficate from QSPI + *****************************************************************************/ + /* Load content certificate */ + ca_load_num = load_content_cert(); + + /* Get load information */ + load_init(li); + +/***************************************************************************** + * Authenticate Software minimum version table + *****************************************************************************/ + auth_min_ver_tbl(is_verify, li); + +/***************************************************************************** + * Load Control Domain + *****************************************************************************/ + load_main_for_mcu(li, is_verify); + +/***************************************************************************** + * DDR Initialization + *****************************************************************************/ + + /* DDR initialize */ + result = InitDram(); + if (INITDRAM_OK != result) + { + ERROR("Failed to DRAM initialize (%d).\n", result); + panic; + } + +#if (ECC_ENABLE == 1) + /* ECC Protection */ + enable_ecc(); +#endif /* ECC_ENABLE */ + + /* QoS configuration */ + qos_init(); + + /* RT-VRAM Extend mode */ + rtvram_extendmode(); + +/***************************************************************************** + * Load RTOS from Flash + *****************************************************************************/ + /* Start loading RTOS image from Flash into SDRAM */ + load_image(&li[RTOS_ID]); + + /* finish loading RTOS */ + load_end(); + + +/***************************************************************************** + * Load Cx IPL from Flash + *****************************************************************************/ +#if (CA_LOAD_TYPE == CA_IPL) + /* Start loading Cx IPL image from Flash into SDRAM */ + load_image(&li[CA_PROGRAM_ID]); + + /* Authenticate of RTOS */ + rom_secureboot(is_verify, &li[RTOS_ID]); + + /* boot CR */ + arm_cpu_on(RCAR_PWR_TARGET_CR, li[RTOS_ID].boot_addr); + + /* The CA image to boot is CA IPL. */ + boot_ca_id = CA_PROGRAM_ID; + + /* finish loading Cx IPL */ + load_end(); +#elif (CA_LOAD_TYPE == BL31) + /* Authenticate of RTOS */ + rom_secureboot(is_verify, &li[RTOS_ID]); + + /* boot CR */ + arm_cpu_on(RCAR_PWR_TARGET_CR, li[RTOS_ID].boot_addr); + + /* The CA image to boot is CA prgram#1. */ + boot_ca_id = CA_OPTIONAL_ID; + +/***************************************************************************** + * Load CA Program#1--#8 from Flash + *****************************************************************************/ + /* Start loading CA Program#n image from Flash into SDRAM */ + for (loop = 0U; loop < ca_load_num; loop++) + { + /* Loading start */ + load_image(&li[boot_ca_id + loop]); + + /* Authenticate of CA Program#n-1 */ + if (loop != 0U) + { + rom_secureboot(is_verify, &li[boot_ca_id + loop - 1U]); + auth_count++; + } + + /* finish loading CA Program#n */ + load_end(); + } +#endif /* (CA_LOAD_TYPE == CA_IPL) */ +/***************************************************************************** + * Load Secure Firmware from Flash + *****************************************************************************/ + /* Start loading Secure FW image from Flash into SDRAM */ + load_image(&li[SECURE_FW_ID]); + + /* Authenticate of Cx IPL or CA Program#n */ + rom_secureboot(is_verify, &li[boot_ca_id + auth_count]); + + /* Set Secure Monitor parameter */ + smoni_set_param(SMONI_PHYS_TOP_ADDR, /* BL31 */ + OPTEE_PHYS_TOP_ADDR, /* OP-TEE */ + UBOOT_PHYS_TOP_ADDR); /* U-Boot */ + + /* boot CA */ + arm_cpu_on(RCAR_PWR_TARGET_CA, li[boot_ca_id].boot_addr); + + /* finish loading Secure Firmware */ + load_end(); + + /* load_secure data(for ICUMXB) */ + load_securedata(SECURE_FW_ID); + + /* Authenticate of Secure Firmware */ + rom_secureboot(is_verify, &li[SECURE_FW_ID]); + + /* finish loading secure data */ + load_end(); + + /* Finally Protection setting */ + ram_protection_final(); + rgid_protection_final(); + +#if (ECC_ENABLE == 1) + /* Notice the ecc enable */ + NOTICE("Enabled ECC and EDC for RT-SRAM, AXI, VRAM, SDRAM. \n"); +# endif + NOTICE("Load finish.\n"); + ip_release(); + + return remap_get_remap_addr(li[SECURE_FW_ID].boot_addr); +} +/* End of function loader_main(void) */ + +static void load_main_for_mcu(const LOAD_INFO *li, uint32_t is_verify) +{ +#if (BOOT_MCU != 0U) + mcu_load_main(li, is_verify); +#endif /* (BOOT_MCU != 0U) */ +} +/* End of function load_main_for_mcu(const LOAD_INFO *li, uint32_t is_verify) */ + +static void smoni_set_param(uint32_t smoni_entry_point, + uint32_t tee_entry_point, + uint32_t uboot_entry_point) +{ +#if (SET_CA_PARAM == CA_APP_SET_PARAM_ENABLE) + uint32_t mapped_addr; + st_smoni_iplparams_t *smoni_ipl_param; + st_smoni_entrypointinfo_t *smoni_ep_info; + st_smoni_entrypointinfo_t *optee_ep_info; + + remap_register(smoni_entry_point, &mapped_addr); + + /* set struct address */ + smoni_ipl_param = (st_smoni_iplparams_t *) + (mapped_addr + SMONI_IPL_PARAM_OFFSET); + smoni_ep_info = (st_smoni_entrypointinfo_t *) + (mapped_addr + SMONI_EP_INFO_OFFSET); + optee_ep_info = (st_smoni_entrypointinfo_t *) + (mapped_addr + OPTEE_EP_INFO_OFFSET); + + + + /* set parameter */ + smoni_ipl_param->uctype = 0x03U; + smoni_ipl_param->ucversion = 0x01U; + smoni_ipl_param->ussize = 0x0030U; + smoni_ipl_param->uiattr = 0x00000000U; + smoni_ipl_param->psecmonimageinfo_low = 0x00000000U; + smoni_ipl_param->psecmonimageinfo_high = 0x00000000U; + smoni_ipl_param->psecoptepinfo_low = 0x00000000U; + smoni_ipl_param->psecoptepinfo_high = 0x00000000U; + smoni_ipl_param->psecoptimageinfo_low = 0x00000000U; + smoni_ipl_param->psecoptimageinfo_high = 0x00000000U; + smoni_ipl_param->pnonsecepinfo_low = + remap_get_phys_addr((uint32_t)smoni_ep_info); + smoni_ipl_param->pnonsecepinfo_high = 0x00000000U; + smoni_ipl_param->pnonsecimageinfo_low = 0x00000000U; + smoni_ipl_param->pnonsecimageinfo_high = 0x00000000U; + + smoni_ep_info->uctype = 0x01U; + smoni_ep_info->ucversion = 0x01U; + smoni_ep_info->ussize = 0x0058U; /* structure size */ + smoni_ep_info->uiattr = 0x00000001U; /* SECURE */ + smoni_ep_info->ulpc_low = uboot_entry_point; + smoni_ep_info->ulpc_high = 0x00000000U; + /* SPSR_EL3.E[9] = b1 (BigEndian) * + * .A[8] = b1 (DataAbort MASK) * + * .I[7] = b1 (IRQ MASK) * + * .F[6] = b1 (FIQ MASK) * + * .M[4] = b0 (AArcch64) * + * .M[3:1] = b0101 (EL1h) */ + smoni_ep_info->ulspsr_low = 0x000003C5U; + smoni_ep_info->ulspsr_high = 0x00000000U; + smoni_ep_info->ularg0_low = 0x00000000U; + smoni_ep_info->ularg0_high = 0x00000000U; + smoni_ep_info->ularg1_low = 0x00000000U; + smoni_ep_info->ularg1_high = 0x00000000U; + smoni_ep_info->ularg2_low = 0x00000000U; + smoni_ep_info->ularg2_high = 0x00000000U; + smoni_ep_info->ularg3_low = 0x00000000U; + smoni_ep_info->ularg3_high = 0x00000000U; + smoni_ep_info->ularg4_low = 0x00000000U; + smoni_ep_info->ularg4_high = 0x00000000U; + smoni_ep_info->ularg5_low = 0x00000000U; + smoni_ep_info->ularg5_high = 0x00000000U; + smoni_ep_info->ularg6_low = 0x00000000U; + smoni_ep_info->ularg6_high = 0x00000000U; + smoni_ep_info->ularg7_low = 0x00000000U; + smoni_ep_info->ularg7_high = 0x00000000U; + + optee_ep_info->uctype = 0x01U; + optee_ep_info->ucversion = 0x02U; + optee_ep_info->ussize = 0x0058U; + optee_ep_info->uiattr = 0x00000008U; + optee_ep_info->ulpc_low = tee_entry_point; + optee_ep_info->ulpc_high = 0x00000000U; + optee_ep_info->ulspsr_low = 0x000003C5U; + optee_ep_info->ulspsr_high = 0x00000000U; + optee_ep_info->ularg0_low = 0x00000000U; + optee_ep_info->ularg0_high = 0x00000000U; + optee_ep_info->ularg1_low = 0x00000000U; + optee_ep_info->ularg1_high = 0x00000000U; + optee_ep_info->ularg2_low = 0x00000000U; + optee_ep_info->ularg2_high = 0x00000000U; + optee_ep_info->ularg3_low = 0x00000000U; + optee_ep_info->ularg3_high = 0x00000000U; + optee_ep_info->ularg4_low = 0x00000000U; + optee_ep_info->ularg4_high = 0x00000000U; + optee_ep_info->ularg5_low = 0x00000000U; + optee_ep_info->ularg5_high = 0x00000000U; + optee_ep_info->ularg6_low = 0x00000000U; + optee_ep_info->ularg6_high = 0x00000000U; + optee_ep_info->ularg7_low = 0x00000000U; + optee_ep_info->ularg7_high = 0x00000000U; + + mapped_addr += BL31_KIND_BOOT_ADDR; + mem_write32((mapped_addr), (uint32_t)((uint64_t)BL31_COLD_BOOT & 0xFFFFFFFFU)); + mem_write32(((mapped_addr) + 0x4U), + (uint32_t)(((uint64_t)BL31_COLD_BOOT >> 32U) & 0xFFFFFFFFU)); + + remap_unregister(mapped_addr); +#endif /* (SET_CA_PARAM == CA_APP_SET_PARAM_ENABLE) */ +} +/* End of function smoni_set_param(uint32_t smoni_entry_point) */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4h.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4m.c new file mode 100644 index 00000000..af1ac9c7 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/loader/loader_main_v4m.c @@ -0,0 +1,269 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader main function for V4M + ******************************************************************************/ +/****************************************************************************** + * @file loader_main_v4m.c + * - Version : 0.04 + * @brief 1. IP initialization. + * 2. DMA transfer the binary image from Flash to RAM. + * 3. Authentication of the transferred image. + * 4. Boot CR and CA core. + * 5. Release of used resources. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 21.08.2023 0.01 First Release + * : 14.11.2023 0.02 Fixed file header path of ECC. + * : 16.11.2023 0.03 Added avs_low_power_mode_setting function + * calling. + * : 07.04.2025 0.04 Added ecm_init_setting function calling. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "rcar_def.h" +#if (ECM_ERROR_ENABLE == 1) +#include "../ip/ddr/v4m/lpddr5/ecm_enable_v4m.h" +#endif /* ECM_ERROR_ENABLE == 1 */ + +/* Provided code */ +#include "../ip/ddr/boot_init_dram.h" +#include "../ip/ddr/v4m/lpddr5/ecc_enable_v4m.h" +#include + +#define ICISTP_BASE (BASE_ICISTP_ADDR) +#define ICISTPSTPER000 (ICISTP_BASE + 0x30300U) + +#define EDC_BASE (BASE_ECM_ADDR) +#define EDCSTRT20 (EDC_BASE + 0x80C0U) +#define TIDSTRT20 (EDC_BASE + 0x81C0U) + +/* SYSC register */ +#define SYSC_BASE (BASE_SYSC_ADDR) +#define SYSC_SYSCSR (SYSC_BASE + 0x0000U) /* SYSC Status Register */ +#define SYSC_SYSCISCR1 (SYSC_BASE + 0x0814U) /* Interrupt Status/Clear Register1 */ +#define SYSC_SYSCIER1 (SYSC_BASE + 0x0824U) /* Interrupt Enable Register1 */ +#define SYSC_SYSCIMR1 (SYSC_BASE + 0x0834U) /* Interrupt MASK Register1 */ + +/* Power Domain Register */ +#define SYSC_PDR41 (0x0A40U) /* A1CNN0 */ +#define SYSC_PDR42 (0x0A80U) /* A2CN0 */ +#define SYSC_PDR43 (0x0AC0U) /* A3IR */ +#define SYSC_PDRSR (SYSC_BASE + 0x1000U) /* Base address of Power Domain Status Register */ +#define SYSC_PDRSR41 (SYSC_PDRSR + (SYSC_PDR41)) +#define SYSC_PDRSR42 (SYSC_PDRSR + (SYSC_PDR42)) +#define SYSC_PDRSR43 (SYSC_PDRSR + (SYSC_PDR43)) +#define SYSC_PDRONCR (SYSC_BASE + 0x1004U) /* Base address of Power Domain Power-ON Control Register */ +#define SYSC_PDRONCR41 (SYSC_PDRONCR + (SYSC_PDR41)) +#define SYSC_PDRONCR42 (SYSC_PDRONCR + (SYSC_PDR42)) +#define SYSC_PDRONCR43 (SYSC_PDRONCR + (SYSC_PDR43)) + +#define PDR_MAX (3U) /* Number of PDR's to be set */ +#define SYSC_BIT_PDR41 (0x00000200U) /* SYSC register target PDR41 bit */ +#define SYSC_BIT_PDR42 (0x00000400U) /* SYSC register target PDR42 bit */ +#define SYSC_BIT_PDR43 (0x00000800U) /* SYSC register target PDR43 bit */ + +#define SYSCSR_BUSY_MASK (0x00000003U) /* SYSC Power On or Power Off seaquence status */ +#define SYSCSR_NOT_BUSY (0x00000003U) /* Not processing */ + +#define SYSC_PDRSR_PWR_MASK (0x00001111U) /* PDR Power On / Off Status MASK */ +#define SYSC_PDRSR_PWROFF (0x00000001U) /* PDR Power OFF Status */ +#define SYSC_PDRONCR_PWRON (0x00000001U) /* PDR Power On request */ +#define SYSC_PDR_PWR_PROC (0x00000000U) /* PDR Power On or Poweer off processing */ + +#define RGID_SET_RGID_FIN_FLG_ADDR (0xFD95EFFCU) /* 0xE635EFFC:Remap 12 */ +#define RGID_SET_RGID_FIN_FLG_VAL (0x64U) + + +#if (ADD_HOTPLUG_MAGIC == ADD_MAGIC_NUMBER) +#define HOTPLUG_MAGIC_NUM (0x853F912EU) +#else +#define HOTPLUG_MAGIC_NUM (0x00000000U) +#endif +__attribute__ ((section (".cr_hot_plug_magic"))) const uint32_t magic_num[4] = {0x00000000U, 0x00000000U, + 0x00000000U, HOTPLUG_MAGIC_NUM}; + +uint32_t loader_main(void) +{ + uint32_t boot_ca_id; + uint32_t auth_count = 0U; + uint32_t boot_cpu; + uint32_t tmp; + __attribute__((__unused__)) uint32_t loop = 0U; + __attribute__((__unused__)) uint32_t ca_load_num; /* number of load for Optional CA program */ + LOAD_INFO li[MAX_PLACED] = {0U}; + + +/***************************************************************************** + * Initialize Hardware + *****************************************************************************/ + /* IP initialize */ + ip_init(); + +#if (ECM_ERROR_ENABLE == 1) + ecm_init_setting(); +#endif /* ECM_ERROR_ENABLE == 1 */ + +#if (ECM_ENABLE == 1) +/***************************************************************************** + * ECC and EDC Initialize + *****************************************************************************/ + edc_axi_enable(); + edc_vram_enable(); +#endif + +/***************************************************************************** + * Work Around for APMU + *****************************************************************************/ + wa_setting_apmu(); + +/***************************************************************************** + * Output boot message + *****************************************************************************/ + print_boot_msg(); + +/***************************************************************************** + * Low Power Mode setting for V4M + *****************************************************************************/ + avs_low_power_mode_setting(); + +/***************************************************************************** + * WA for V4M + *****************************************************************************/ + /* WA OTLINT-5556 increased latency: APMU FRSTCTRL bit[29] disable */ + tmp = mem_read32(BASE_APMU_ADDR + 0x68U); + tmp = tmp & ~(1U << 29U); + mem_write32((BASE_APMU_ADDR + 0x68U), tmp); + +/***************************************************************************** + * Setting Access protection + *****************************************************************************/ + /* Region ID access protection */ + rgid_protection(); + ram_protection(); + + /* Change the Region ID (Master) of the Module used for data transfer to a temporary setting. */ + set_master_rgid_4_tfr_mod(); + +/***************************************************************************** + * Load Certficate from QSPI + *****************************************************************************/ + /* Load content certificate */ + ca_load_num = load_content_cert(); + + /* Get load information */ + load_init(li); + + /* verify the each content certs before Image load */ + preload_verify_cntcert(li); + +/***************************************************************************** + * Authenticate Software minimum version table + *****************************************************************************/ + auth_min_ver_tbl(li); + +/***************************************************************************** + * Load Cx IPL from Flash + *****************************************************************************/ + /* Start loading Cx IPL image from Flash into SDRAM */ + load_image(&li[CA_PROGRAM_ID]); + + /* The CA image to boot is CA IPL. */ + boot_ca_id = CA_PROGRAM_ID; + + /* boot CPU is CR */ + boot_cpu = RCAR_PWR_TARGET_CR; + + /* finish loading Cx IPL */ + load_end(); +/***************************************************************************** + * Load Secure Firmware from Flash + *****************************************************************************/ + /* Start loading Secure FW image from Flash into SDRAM */ + load_image(&li[SECURE_FW_ID]); + + /* Authenticate of CA Program#n */ + rom_secureboot(&li[boot_ca_id + auth_count]); + + /* SystemRAM has an undefined initial value, clear the address of + * the SystemRAM that is going to store set finish flag of RGID. */ + mem_write8(RGID_SET_RGID_FIN_FLG_ADDR, 0xFFU); + + /* Before Boot CPU, Set the division ratio for CPU operating frequency */ + adj_cr_variant_freq(); + + /* boot CA */ + arm_cpu_on(boot_cpu, li[boot_ca_id].boot_addr); + + /* finish loading Secure Firmware */ + load_end(); + + /* load_secure data(for ICUMXB) */ + load_securedata(SECURE_FW_ID); + + /* Authenticate of Secure Firmware */ + rom_secureboot(&li[SECURE_FW_ID]); + + /* finish loading secure data */ + load_end(); + + /* Finally Protection setting */ + rgid_protection_final(); + + /* set RGID setting finish flag. + * because polling from CX 2nd IPL. */ + mem_write8(RGID_SET_RGID_FIN_FLG_ADDR, RGID_SET_RGID_FIN_FLG_VAL); + +#if (ECM_ENABLE == 1) + /* Notice the ecc enable */ + NOTICE("Enabled EDC for AXI-Bus, RT-VRAM. \n"); +#endif + NOTICE("Load finish.\n"); + ip_release(); + + return get_cfremap_addr(li[SECURE_FW_ID].boot_addr); +} +/* End of function loader_main(void) */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.c new file mode 100644 index 00000000..bc3c0a25 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.c @@ -0,0 +1,228 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Control ECC and Address parity check for CodeSRAM + ******************************************************************************/ + /****************************************************************************** + * @file codesram_ecc.c + * - Version : 0.01 + * @brief 1. Enable / Disable ECC and Address parity check for CodeSRAM. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 19.01.2023 0.01 First Release + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#define CSRM_ECCCTL_EMCA_EN_MOD (0x00004000U) +#define CSRM_ECCCTL_APERR (0x00001000U) +#define CSRM_ECCCTL_ECERVF (0x00000040U) +#define CSRM_ECCCTL_EC1ECP (0x00000020U) +#define CSRM_ECCCTL_ECER2F (0x00000004U) +#define CSRM_ECCCTL_ECER1F (0x00000002U) + +#define CSRM_APCTL_APCEN (0x00000001U) +#define CSRM_NO_ERROR (0x00000000U) + +#define CODESRAM_BUS_NUM_SHIFT (20U) + +void disable_codesram_ecc_parity(uint32_t boot_addr, uint32_t size) +{ + uint32_t loop; + uint32_t bus_num; + uint32_t set_num; + uint32_t reg; + + /* Code-SRAMn ECC Control Register */ + const uint32_t eccctl_reg[MCU_CSRM_MAX] = { MCU_CSRM0ECCCTL, + MCU_CSRM1ECCCTL, + MCU_CSRM2ECCCTL, + MCU_CSRM3ECCCTL, + MCU_CSRM4ECCCTL, + MCU_CSRM5ECCCTL}; + + /* Code-SRAMn Address Parity Control Register */ + const uint32_t apctl_reg[MCU_CSRM_MAX] = { MCU_CSRM0APCTL, + MCU_CSRM1APCTL, + MCU_CSRM2APCTL, + MCU_CSRM3APCTL, + MCU_CSRM4APCTL, + MCU_CSRM5APCTL}; + + /* Calculate the area used by Code SRAM. */ + bus_num = ((boot_addr & CODESRAM_BUS_NUM_MASK) >> CODESRAM_BUS_NUM_SHIFT); + set_num = ((size & CODESRAM_BUS_NUM_MASK) >> CODESRAM_BUS_NUM_SHIFT); + + for (loop = 0U; loop < set_num; loop++) + { + /* Disable ECC error detection and error correction for CodeSRAM. */ + reg = mem_read32(eccctl_reg[bus_num + loop]); + reg &= ~(CSRM_ECCCTL_ECERVF); + reg |= CSRM_ECCCTL_EMCA_EN_MOD; + reg |= CSRM_ECCCTL_EC1ECP; + mem_write32(eccctl_reg[bus_num + loop], reg); + /* Disable Address parity check for CodeSRAM. */ + reg = mem_read32(apctl_reg[bus_num + loop]); + reg &= ~(CSRM_APCTL_APCEN); + mem_write32(apctl_reg[bus_num + loop], reg); + } +} +/* End of function disable_codesram_ecc_parity */ + +void enable_codesram_ecc_parity(uint32_t boot_addr, uint32_t size) +{ + uint32_t loop; + uint32_t bus_num; + uint32_t set_num; + uint32_t reg; + + /* Code-SRAMn ECC Control Register */ + const uint32_t eccctl_reg[MCU_CSRM_MAX] = { MCU_CSRM0ECCCTL, + MCU_CSRM1ECCCTL, + MCU_CSRM2ECCCTL, + MCU_CSRM3ECCCTL, + MCU_CSRM4ECCCTL, + MCU_CSRM5ECCCTL}; + + /* Code-SRAMn Address Parity Control Register */ + const uint32_t apctl_reg[MCU_CSRM_MAX] = { MCU_CSRM0APCTL, + MCU_CSRM1APCTL, + MCU_CSRM2APCTL, + MCU_CSRM3APCTL, + MCU_CSRM4APCTL, + MCU_CSRM5APCTL}; + + /* Calculate the area used by Code SRAM. */ + bus_num = ((boot_addr & CODESRAM_BUS_NUM_MASK) >> CODESRAM_BUS_NUM_SHIFT); + set_num = ((size & CODESRAM_BUS_NUM_MASK) >> CODESRAM_BUS_NUM_SHIFT); + + for (loop = 0U; loop < set_num; loop++) + { + /* Enable ECC error detection and error correction for CodeSRAM. */ + reg = mem_read32(eccctl_reg[bus_num + loop]); + reg &= ~(CSRM_ECCCTL_EC1ECP); + reg |= CSRM_ECCCTL_ECERVF; + reg |= CSRM_ECCCTL_EMCA_EN_MOD; + mem_write32(eccctl_reg[bus_num + loop], reg); + /* Enable Address parity check for CodeSRAM. */ + reg = mem_read32(apctl_reg[bus_num + loop]); + reg |= CSRM_APCTL_APCEN; + mem_write32(apctl_reg[bus_num + loop], reg); + } +} +/* End of function enable_codesram_ecc_parity */ + +void chk_codesram_ecc_parity(uint32_t boot_addr, uint32_t size) +{ + uint32_t loop; + uint32_t bus_num; + uint32_t set_num; + uint32_t reg; + uint32_t err_chk; + + /* Code-SRAMn ECC Control Register */ + const uint32_t eccctl_reg[MCU_CSRM_MAX] = { MCU_CSRM0ECCCTL, + MCU_CSRM1ECCCTL, + MCU_CSRM2ECCCTL, + MCU_CSRM3ECCCTL, + MCU_CSRM4ECCCTL, + MCU_CSRM5ECCCTL}; + + /* Calculate the area used by Code SRAM. */ + bus_num = ((boot_addr & CODESRAM_BUS_NUM_MASK) >> CODESRAM_BUS_NUM_SHIFT); + set_num = ((size & CODESRAM_BUS_NUM_MASK) >> CODESRAM_BUS_NUM_SHIFT); + + /* Check ECC error and Address parity error for CodeSRAM. */ + for (loop = 0U; loop < set_num; loop++) + { + reg = mem_read32(eccctl_reg[bus_num + loop]); + err_chk = reg; + err_chk &= (CSRM_ECCCTL_ECER2F | CSRM_ECCCTL_ECER1F); + if(err_chk != CSRM_NO_ERROR) + { + /* ECC error occurred. */ + ERROR("CodeSRAM ECC error detected !!\n"); + panic; + } + err_chk = reg; + err_chk &= CSRM_ECCCTL_APERR; + if(err_chk != CSRM_NO_ERROR) + { + /* Address parity error occurred. */ + ERROR("CodeSRAM Address parity error detected !!\n"); + panic; + } + } +} +/* End of function chk_codesram_ecc_parity */ + +void initialize_codesram_ecc_parity(uint32_t boot_addr, uint32_t size) +{ + uint32_t loop; + uint32_t bus_num; + uint32_t set_num; + uint32_t reg; + + /* Code-SRAMn ECC Control Register */ + const uint32_t eccctl_reg[MCU_CSRM_MAX] = { MCU_CSRM0ECCCTL, + MCU_CSRM1ECCCTL, + MCU_CSRM2ECCCTL, + MCU_CSRM3ECCCTL, + MCU_CSRM4ECCCTL, + MCU_CSRM5ECCCTL}; + + /* Code-SRAMn Address Parity Control Register */ + const uint32_t apctl_reg[MCU_CSRM_MAX] = { MCU_CSRM0APCTL, + MCU_CSRM1APCTL, + MCU_CSRM2APCTL, + MCU_CSRM3APCTL, + MCU_CSRM4APCTL, + MCU_CSRM5APCTL}; + + /* Calculate the area used by Code SRAM. */ + bus_num = ((boot_addr & CODESRAM_BUS_NUM_MASK) >> CODESRAM_BUS_NUM_SHIFT); + set_num = ((size & CODESRAM_BUS_NUM_MASK) >> CODESRAM_BUS_NUM_SHIFT); + + for (loop = 0U; loop < set_num; loop++) + { + /* Initialize ECC error detection and error correction setting for CodeSRAM. */ + reg = mem_read32(eccctl_reg[bus_num + loop]); + reg &= ~(CSRM_ECCCTL_EC1ECP | CSRM_ECCCTL_ECERVF); + reg |= CSRM_ECCCTL_EMCA_EN_MOD; + mem_write32(eccctl_reg[bus_num + loop], reg); + /* Initialize Address parity check setting for CodeSRAM. */ + reg = mem_read32(apctl_reg[bus_num + loop]); + reg |= CSRM_APCTL_APCEN; + mem_write32(apctl_reg[bus_num + loop], reg); + } +} +/* End of function initialize_codesram_ecc_parity */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.h new file mode 100644 index 00000000..7cb662f8 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/codesram_ecc.h @@ -0,0 +1,39 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : ECC and Address parity check for CodeSRAM header + ******************************************************************************/ + +#ifndef CODESRAM_ECC_H__ +#define CODESRAM_ECC_H__ + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ +void disable_codesram_ecc_parity(uint32_t boot_addr, uint32_t size); +void enable_codesram_ecc_parity(uint32_t boot_addr, uint32_t size); +void chk_codesram_ecc_parity(uint32_t boot_addr, uint32_t size); +void initialize_codesram_ecc_parity(uint32_t boot_addr, uint32_t size); + +#endif /* CODESRAM_ECC_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c new file mode 100644 index 00000000..93a5b563 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.c @@ -0,0 +1,300 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : MCU power management driver + ******************************************************************************/ + /****************************************************************************** + * @file cpu_on.c + * - Version : 0.02 + * @brief 1. Boot process of MCU CPU core. + * 2. Set Option Byte to OPBT. + * 3. Disable the Bus Guard. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 21.06.2022 0.01 First Release + * : 02.02.2023 0.02 Moved definitions to header file. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +/* MCU */ +#define MCU_OPBT_MAX (12U) +#define MCU_ICUM_OPBT_MAX (7U) +#define MCU_PBG_MAX (7U) +#define MCU_HBG_MAX (9U) +#define LOCAL_FLASH_BUS_MODE (0x12B9B0A1U) + +#define MCU_RESET_READY (0x00000001U) +#define MCU_RCT_RUNNING (0x00000001U) + +#define CODESRAM_ROUND_MASK (0x000FFFFFU) + +#define OPBT_EMPTY_VALUE (0xFFFFFFFFU) + +static void csrm_n_csifcode_protect(uint32_t bit_shift); + +void mcu_cpu_on(uint32_t target) +{ + uint32_t boot_ctrl = 0U; + uint32_t ret; + + if(MCU_PWR_TARGET_G4MH == target) + { +#if ((BOOT_MCU & MCU_BOOT_G4MH) != 0U) + boot_ctrl = MCU_G4MH_BOOT_CTLR; +#endif /* ((BOOT_MCU & MCU_BOOT_G4MH) != 0U) */ + } + else if(MCU_PWR_TARGET_ICUMH == target) + { +#if ((BOOT_MCU & MCU_BOOT_ICUMH) != 0U) + boot_ctrl = MCU_ICUMH_BOOT_CTLR; +#endif /* ((BOOT_MCU & MCU_BOOT_ICUMH) != 0) */ + } + else + { + /* No Process */ + } + + /* Execute the reset process of MCU core. * + * If the register address is not set in "A", * + * exit the function without executing anything. */ + if(boot_ctrl != 0U) + { + /* Release write protection of SCDS0 */ + mem_write32(MCUAXI_PBG_ERRSLV_PBGKCPROT, MCU_HBG_REL_CODE); + + /* MCU core reset */ + ret = mem_read32(boot_ctrl); + ret |= MCU_RESET_READY; + mem_write32(boot_ctrl, ret); + ret = mem_read32(MCU_OPBT_CTRL); + ret |= MCU_RESET_READY; + mem_write32(MCU_OPBT_CTRL, ret); + + /* Wait until the MCU status is set to start. */ + do + { + ret = mem_read32(MCU_OPBT_STAT); + ret &= MCU_RCT_RUNNING; + } while (ret != MCU_RCT_RUNNING); + + /* write protection of SCDS0 */ + mem_write32(MCUAXI_PBG_ERRSLV_PBGKCPROT, MCU_HBG_PROT_CODE); + } +} +/* End of function mcu_cpu_on(uint32_t target) */ + +void mcu_set_opbt(void) +{ + uint32_t loop; + const uint32_t opbt_reg[MCU_OPBT_MAX] = + { MCU_RESET_VECTOR_PE0, + MCU_RESET_VECTOR_PE1, + MCU_OPBT0, + MCU_OPBT1, + MCU_OPBT2, + MCU_OPBT3, + MCU_OPBT4, + MCU_OPBT6, + MCU_OPBT7, + MCU_OPBT8, + MCU_OPBT9, + MCU_OPBT96 + }; + + uint32_t opbt_val[MCU_OPBT_MAX] = + { 0x00000400U, + 0x00000400U, + 0x3D810010U, + 0x00700000U, + 0x707FFFFFU, + 0x00000000U, + 0x0C0C0C0FU, + 0x00000F00U, + 0x00000FFFU, + 0x02000000U, + 0x03000300U, + 0x00000000U + }; + + for (loop = 0U; loop < MCU_OPBT_MAX; loop++) + { + mem_write32(opbt_reg[loop], opbt_val[loop]); + opbt_val[loop] = OPBT_EMPTY_VALUE; + } +} +/* End of function mcu_set_opbt(uint32_t g4mh_addr) */ + +void mcu_set_icum_opbt(void) +{ + uint32_t loop; + const uint32_t opbt_reg[MCU_ICUM_OPBT_MAX] = + { MCU_ICUM_OPBT0, + MCU_ICUM_OPBT1, + MCU_ICUM_OPBT2, + MCU_ICUM_OPBT4, + MCU_ICUM_OPBT5, + MCU_ICUM_OPBT6, + MCU_ICUM_OPBT7 + }; + +#if (BOOT_MCU == MCU_BOOT_G4MH_ICUMH) + uint32_t opbt_val[MCU_ICUM_OPBT_MAX] = + { 0x0FFFFFFFU, + 0x00500000U, + 0x00500000U, + 0xFFFFFFEFU, + 0x00600000U, + 0xFFFFFFFFU, + 0xFFFFFFFFU + }; +#else + uint32_t opbt_val[MCU_ICUM_OPBT_MAX] = + { OPBT_EMPTY_VALUE, + OPBT_EMPTY_VALUE, + OPBT_EMPTY_VALUE, + OPBT_EMPTY_VALUE, + OPBT_EMPTY_VALUE, + OPBT_EMPTY_VALUE, + OPBT_EMPTY_VALUE + }; +#endif + + for (loop = 0U; loop < MCU_ICUM_OPBT_MAX; loop++) + { + mem_write32(opbt_reg[loop], opbt_val[loop]); + opbt_val[loop] = OPBT_EMPTY_VALUE; + } +} +/* End of function mcu_set_icum_opbt(uint32_t icumh_addr) */ + +void mcu_set_hbg(void) +{ + uint32_t loop; + const uint32_t pbg_reg[MCU_PBG_MAX][2U] = + { /* register address setting value */ + {MCUAXI_PBG_PBGPROT0_0, 0x00000000U}, + {MCUAXI_PBG_PBGPROT0_1, 0x00000000U}, + {MCUAXI_PBG_PBGPROT0_2, 0x00000000U}, + {MCUAXI_PBG_PBGPROT0_3, 0x00000000U}, + {MCUAXI_PBG_PBGPROT0_4, 0x00000000U}, + {MCUAXI_PBG_PBGPROT0_5, 0x00000000U}, + {MCUAXI_PBG_PBGPROT0_6, 0x00000000U} + }; + + const uint32_t hbg_reg[MCU_HBG_MAX][2U] = + { /* register address setting value */ + {MCU_HBG_CS0_HBGPROT0, 0x00000000U}, + {MCU_HBG_CS1_HBGPROT0, 0x00000000U}, + {MCU_HBG_CS2_HBGPROT0, 0x00000000U}, + {MCU_HBG_CS3_HBGPROT0, 0x00000000U}, + {MCU_HBG_CS4_HBGPROT0, 0x00000000U}, + {MCU_HBG_CS5_HBGPROT0, 0x00000000U}, + {MCU_HBG_DS_HBGPROT0, 0x00000000U}, + {MCU_HBG_SOCM_HBGPROT0, 0x00000000U}, + {MCU_HBG_SOCS_HBGPROT0, 0x00000000U} + }; + + const uint32_t hbg_prot_reg[MCU_HBG_MAX] = + { + MCU_HBGSLVER_CS0_HBGKCPROT, + MCU_HBGSLVER_CS1_HBGKCPROT, + MCU_HBGSLVER_CS2_HBGKCPROT, + MCU_HBGSLVER_CS3_HBGKCPROT, + MCU_HBGSLVER_CS4_HBGKCPROT, + MCU_HBGSLVER_CS5_HBGKCPROT, + MCU_HBGSLVER_DS_HBGKCPROT, + MCU_HBGSLVER_SOCM_HBGKCPROT, + MCU_HBGSLVER_SOCS_HBGKCPROT + }; + + /* Release write protection of SCDS0 */ + mem_write32(MCUAXI_PBG_ERRSLV_PBGKCPROT, MCU_HBG_REL_CODE); + + /* Set PBG register */ + for (loop = 0U; loop < MCU_PBG_MAX; loop++) + { + mem_write32(pbg_reg[loop][0U], pbg_reg[loop][1U]); + } + + /* write protection of SCDS0 */ + mem_write32(MCUAXI_PBG_ERRSLV_PBGKCPROT, MCU_HBG_PROT_CODE); + + /* Set HBG register */ + for (loop = 0U; loop < MCU_HBG_MAX; loop++) + { + hbg_reg_write(hbg_prot_reg[loop], hbg_reg[loop][0U], hbg_reg[loop][1U]); + } +} +/* End of function mcu_set_hbg(void) */ + +void mcu_set_csrm(uint32_t boot_addr, uint32_t size) +{ + uint32_t loop; + uint32_t bus_num; + uint32_t set_num; + const uint32_t csrm_reg[MCU_CSRM_MAX] = + { MCU_CSRM0CSIFCODE, + MCU_CSRM1CSIFCODE, + MCU_CSRM2CSIFCODE, + MCU_CSRM3CSIFCODE, + MCU_CSRM4CSIFCODE, + MCU_CSRM5CSIFCODE, + }; + + /* Calculate the area used by Code SRAM. */ + bus_num = ((boot_addr & CODESRAM_BUS_NUM_MASK) >> 20U); + set_num = ((size & CODESRAM_BUS_NUM_MASK) >> 20U); + + /* Set CSRM register */ + for (loop = 0U; loop < set_num; loop++) + { + mem_write32(csrm_reg[bus_num + loop], LOCAL_FLASH_BUS_MODE); + + /* Write protection of CSRMnCSIFCODE registers */ + csrm_n_csifcode_protect((bus_num + loop)); + } +} +/* End of function mcu_set_csrm(void) */ + +void hbg_reg_write(uint32_t prot_reg_addr, uint32_t reg_addr, uint32_t val) +{ + mem_write32(prot_reg_addr, MCU_HBG_REL_CODE); + mem_write32(reg_addr, val); + mem_write32(prot_reg_addr, MCU_HBG_PROT_CODE); +} +/* End of function hbg_reg_write(uint32_t prot_reg_addr, uint32_t reg_addr, uint32_t val) */ + +static void csrm_n_csifcode_protect(uint32_t bit_shift) +{ + /* Control CSIFCODE_LOCK to protect writing to CSRMnCSIFCODE during product mass production. */ +} +/* End of function csrm_n_csifcode_protect(uint32_t bit_shift) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h new file mode 100644 index 00000000..ac40f444 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/cpu_on_for_mcu.h @@ -0,0 +1,62 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : MCU power management driver header + ******************************************************************************/ + +#ifndef CPU_ON_FOR_MCU_H__ +#define CPU_ON_FOR_MCU_H__ + +#define MCU_PWR_TARGET_G4MH (0U) +#define MCU_PWR_TARGET_ICUMH (1U) + +#define MCU_BOOT_NONE (0U) +#define MCU_BOOT_G4MH (1U) +#define MCU_BOOT_ICUMH (2U) +#define MCU_BOOT_G4MH_ICUMH (3U) + +#define MCU_HBG_REL_CODE (0xA5A5A501U) +#define MCU_HBG_PROT_CODE (0xA5A5A500U) + +#define G4MH_PRG_1_BOOT_ADDR (0x10000000U) +#define G4MH_PRG_1_SIZE (0x00100000U) +#define G4MH_PRG_2_BOOT_ADDR (0x10100000U) +#define G4MH_PRG_2_SIZE (0x00400000U) +#define ICUMH_PRG_BOOT_ADDR (0x10500000U) +#define ICUMH_PRG_SIZE (0x00100000U) + +#define MCU_CSRM_MAX (6U) +#define CODESRAM_BUS_NUM_MASK (0x00700000U) + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ +void mcu_cpu_on(uint32_t target); +void mcu_set_opbt(void); +void mcu_set_icum_opbt(void); +void mcu_set_hbg(void); +void mcu_set_csrm(uint32_t boot_addr, uint32_t size); +void hbg_reg_write(uint32_t prot_reg_addr, uint32_t reg_addr, uint32_t val); + +#endif /* CPU_ON_FOR_MCU_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c new file mode 100644 index 00000000..5ea17a4c --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.c @@ -0,0 +1,117 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load function for MCU + ******************************************************************************/ +/****************************************************************************** + * @file image_load_for_mcu.c + * - Version : 0.01 + * @brief Loading image driver for MCU. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 04.07.2022 0.01 First Release + *****************************************************************************/ + +/* indelude */ +#include +#include +#include +#include +#include +#if (RCAR_SA9_TYPE == FLASH_BOOT) +#include +#elif (RCAR_SA9_TYPE == EMMC_BOOT) +#include +#endif /* (RCAR_SA9_TYPE == FLASH_BOOT) */ + +void image_load_for_mcu(const LOAD_INFO *li, uint32_t is_verify) +{ + uint32_t aes_flg = MCU_IMG_NOT_ENCRYPTED; + + if (is_verify != NORMAL_BOOT) + { + /* A flag whether MCU image is encrypted */ + aes_flg = get_aes_flg_in_cert(li -> cnt_cert_addr); + } + + if(aes_flg == MCU_IMG_NOT_ENCRYPTED) + { + /* Transfer by SDMAC on ICUMX */ + icu_sdmac_trans_start(li); + } + else + { + /* Transfer by AES driver on ICUMX */ + mcu_img_decrypt(li); + } +} +/* End of function image_load_for_mcu(const LOAD_INFO *li) */ + +void load_end_for_mcu(const LOAD_INFO *li, uint32_t is_verify) +{ + uint32_t aes_flg = MCU_IMG_NOT_ENCRYPTED; + + if (is_verify != NORMAL_BOOT) + { + /* A flag whether MCU image is encrypted */ + aes_flg = get_aes_flg_in_cert(li -> cnt_cert_addr); + } + + if(aes_flg == MCU_IMG_NOT_ENCRYPTED) + { + icu_sdmac_trans_end(); + } + else + { + mcu_img_decrypt_end(li); + } +} +/* End of function load_end_for_mcu(const LOAD_INFO *li) */ + +void load_image_info_print(const LOAD_INFO *li) +{ +#if (RCAR_SA9_TYPE == FLASH_BOOT) + load_image_info_print_for_flash(li); +#elif (RCAR_SA9_TYPE == EMMC_BOOT) + load_image_info_print_for_emmc(li); +#endif /* (RCAR_SA9_TYPE == FLASH_BOOT) */ +} +/* End of function load_image_info_print(const LOAD_INFO *li) */ + +void load_securedata_for_mcu(void) +{ + LOAD_INFO tmp_li; + + tmp_li.image_size = SECUREDATA_SIZE; + tmp_li.src_addr = RTVRAM_BASE; + tmp_li.boot_addr = DATA_SRAM_BASE; +#if (RCAR_SA9_TYPE == EMMC_BOOT) + tmp_li.part_num = EMMC_PARTITION_1; +#endif + /* */ + icu_sdmac_trans_start(&tmp_li); + icu_sdmac_trans_end(); +}/* End of function load_securedata(uint32_t target_id) */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h new file mode 100644 index 00000000..1511f64b --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/image_load_for_mcu.h @@ -0,0 +1,67 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load function for MCU header + ******************************************************************************/ + +#ifndef IMAGE_LOAD_FOR_MCU_H__ +#define IMAGE_LOAD_FOR_MCU_H__ + +#include +#include +#include +#if (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) +#include +#include +#include +#include +#endif /* (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) */ + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ + +void image_load_for_mcu(const LOAD_INFO *li, uint32_t is_verify); +void load_end_for_mcu(const LOAD_INFO *li, uint32_t is_verify); +void load_image_info_print(const LOAD_INFO *li); +void load_securedata_for_mcu(void); + +/* Inline function */ +static inline uint32_t get_aes_flg_in_cert(uint32_t cert_addr) +{ +#if (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) + uint32_t aes_flg; + uint32_t val; + + val = mem_read32(cert_addr + CERT_INFO_FLG_OFFSET); + aes_flg = ((val >> CERT_FLAG_ENCRYPTION_USED_BIT_LOCATION) & 0x1U); + + return aes_flg; +#else + return MCU_IMG_NOT_ENCRYPTED; +#endif /* (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) */ +} +/* End of function get_aes_flg_in_cert(uint32_t cert_addr) */ + +#endif /* IMAGE_LOAD_FOR_MCU_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c new file mode 100644 index 00000000..48dc21bd --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.c @@ -0,0 +1,456 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Loader main for MCU + ******************************************************************************/ + /****************************************************************************** + * @file loader_main_mcu.c + * - Version : 0.03 + * @brief 1. Loading G4MH(1st) image including integrity check. + * 2. Loading ICUMH image including integrity check. + * 3. Loading G4MH(2nd) image including integrity check. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 22.06.2022 0.01 First Release + * : 05.08.2022 0.02 Add sw_version_check function call to + * : mcu_img_verify function. + * : 19.01.2023 0.03 Add ECC and Address parity check for CodeSRAM. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) +#include +#endif /* (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) */ +#include +#include +#include + +#define ICUMH_OPBT_OFFSET (0x200U) + +#define MCU_TRANSFER_UNIT (0x00040000U) /* 256KiB */ +#define RTVRAM_TMP_G4MH_TOP_A (0xE2080000U) +#define RTVRAM_TMP_G4MH_TOP_B (0xE20C0000U) + +#define GREG120_CODE (0x5AA5A55AU) +#define G4MH_LOAD_FIN_CODE (0x0000001EU) + +/* Prototype */ +static void load_g4mh_1st(const LOAD_INFO *li, uint32_t is_verify); +static void load_icumh(const LOAD_INFO *li, uint32_t is_verify); +static void load_g4mh_2nd(const LOAD_INFO *li, uint32_t is_verify); +static void w_load_even(const LOAD_INFO *li, LOAD_INFO *tmp_li, uint32_t count, uint32_t is_verify); +static void w_load_odd(const LOAD_INFO *li, LOAD_INFO *tmp_li, uint32_t count, uint32_t is_verify); +static void mcu_key_cert_check(LOAD_INFO *li, uint32_t is_verify); +static void mcu_cnt_cert_check(const LOAD_INFO *li, uint32_t is_verify); +static void mcu_img_verify(const LOAD_INFO *li, uint32_t is_verify); + + +static void load_g4mh_1st(const LOAD_INFO *li, uint32_t is_verify) +{ + LOAD_INFO tmp_li = {0U}; + + /* Copy li to tmporary structure. (Because original li members are required later.) */ + (void)memcpy((void *)&tmp_li, li, sizeof(LOAD_INFO)); + /* Change boot_addr to RTVRAM_BASE. */ + tmp_li.boot_addr = RTVRAM_BASE; + + /* Output image info. */ + load_image_info_print(li); + + /* Check load information. */ + check_load_area(li); + + /* Release write protection of SCDS0. */ + mem_write32(MCUAXI_PBG_ERRSLV_PBGKCPROT, MCU_HBG_REL_CODE); + mem_write32(MCU_GREG120, 0x00000000U); + + /* Set G4MH Option Byte. */ + mcu_set_opbt(); + /* Set ICUMH Option Byte. */ + mcu_set_icum_opbt(); + + mem_write32(MCU_GREG120, GREG120_CODE); + micro_wait(10U); + + /* Write protection of SCDS0. */ + mem_write32(MCUAXI_PBG_ERRSLV_PBGKCPROT, MCU_HBG_PROT_CODE); + + /* Load G4MH(1st) image from external flash to RT-VRAM. */ + load_start(&tmp_li); + + /* Verify Key Certificate. */ + mcu_key_cert_check(&tmp_li, is_verify); + + /* Disable bus guard of MCU. */ + mcu_set_hbg(); + + /* Finish loading G4MH(1st) image from external flash to RT-VRAM. */ + load_end(); + + /* Change src_addr from external flash to RT-VRAM. */ + tmp_li.src_addr = tmp_li.boot_addr; + /* Change boot_addr from RT-VRAM to CodeSRAM. */ + tmp_li.boot_addr = li->boot_addr; + + /* Disable ECC error and Address parity error check for CodeSRAM. */ + disable_codesram_ecc_parity(G4MH_PRG_1_BOOT_ADDR, G4MH_PRG_1_SIZE); + + /* Load G4MH(1st) image from RT-VRAM to CodeSRAM. */ + image_load_for_mcu(&tmp_li, is_verify); + + /* Verify Content Certificate */ + mcu_cnt_cert_check(&tmp_li, is_verify); + + /* Finish loading G4MH(1st) image from RT-VRAM to CodeSRAM. */ + load_end_for_mcu(&tmp_li, is_verify); + + /* Enable ECC error and Address parity error check for CodeSRAM. */ + enable_codesram_ecc_parity(G4MH_PRG_1_BOOT_ADDR, G4MH_PRG_1_SIZE); + + /* Verify G4MH(1st) image. */ + mcu_img_verify(&tmp_li, is_verify); + + /* Check ECC error and Address parity error detection for CodeSRAM. */ + chk_codesram_ecc_parity(G4MH_PRG_1_BOOT_ADDR, G4MH_PRG_1_SIZE); + + /* Reset CSRM registers that related CodeSRAM ECC to H/W initial value. */ + initialize_codesram_ecc_parity(G4MH_PRG_1_BOOT_ADDR, G4MH_PRG_1_SIZE); + + + /* Change Bus mode of CodeSRAM to the Local Flash Bus mode. */ + mcu_set_csrm(G4MH_PRG_1_BOOT_ADDR, G4MH_PRG_1_SIZE); + + /* Boot G4MH */ + mcu_cpu_on(MCU_PWR_TARGET_G4MH); +} +/* End of function load_g4mh_1st(const LOAD_INFO *li) */ + +static void load_icumh(const LOAD_INFO *li, uint32_t is_verify) +{ +#if (BOOT_MCU == MCU_BOOT_G4MH_ICUMH) + LOAD_INFO tmp_li = {0U}; + + /* Copy li to tmporary structure. (Because original li members are required later.) */ + (void)memcpy((void *)&tmp_li, li, sizeof(LOAD_INFO)); + /* Change boot_addr to RTVRAM_BASE. */ + tmp_li.boot_addr = RTVRAM_BASE; + + /* Output image info. */ + load_image_info_print(li); + + /* Check load information. */ + check_load_area(li); + + /* Load ICUMH image from external flash to RT-VRAM. */ + load_start(&tmp_li); + + /* Verify Key Certificate. */ + mcu_key_cert_check(&tmp_li, is_verify); + + /* Finish loading ICUMH image from external flash to RT-VRAM. */ + load_end(); + + /* Change src_addr from external flash to RT-VRAM. */ + tmp_li.src_addr = tmp_li.boot_addr; + /* Change boot_addr from RT-VRAM to CodeSRAM. */ + tmp_li.boot_addr = li->boot_addr; + + /* Disable ECC error and Address parity error check for CodeSRAM. */ + disable_codesram_ecc_parity(ICUMH_PRG_BOOT_ADDR, ICUMH_PRG_SIZE); + + /* Load ICUMH image from RT-VRAM to CodeSRAM. */ + image_load_for_mcu(&tmp_li, is_verify); + + /* Verify Content Certificate */ + mcu_cnt_cert_check(&tmp_li, is_verify); + + /* Finish loading ICUMH image from RT-VRAM to CodeSRAM. */ + load_end_for_mcu(&tmp_li, is_verify); + + /* Load Secure data from external flash to RT-VRAM */ + load_securedata(ICUMH_PROGRAM_ID); + + /* Enable ECC error and Address parity error check for CodeSRAM. */ + enable_codesram_ecc_parity(ICUMH_PRG_BOOT_ADDR, ICUMH_PRG_SIZE); + + /* Verify ICUMH image. */ + mcu_img_verify(&tmp_li, is_verify); + + /* Finish loading Secure data from external flash to RT-VRAM. */ + load_end(); + + /* Check ECC error and Address parity error detection for CodeSRAM. */ + chk_codesram_ecc_parity(ICUMH_PRG_BOOT_ADDR, ICUMH_PRG_SIZE); + + /* Reset CSRM registers that related CodeSRAM ECC to H/W initial value. */ + initialize_codesram_ecc_parity(ICUMH_PRG_BOOT_ADDR, ICUMH_PRG_SIZE); + + /* Load Secure data from RT-VRAM to Data-SRAM. */ + load_securedata_for_mcu(); + + /* Change Bus mode of CodeSRAM to the Local Flash Bus mode. */ + mcu_set_csrm(ICUMH_PRG_BOOT_ADDR, ICUMH_PRG_SIZE); + + /* Boot ICUMH */ + mcu_cpu_on(MCU_PWR_TARGET_ICUMH); +#endif /* (BOOT_MCU == MCU_BOOT_G4MH_ICUMH) */ +} +/* End of function load_icumh(const LOAD_INFO *li) */ + +static void load_g4mh_2nd(const LOAD_INFO *li, uint32_t is_verify) +{ + uint32_t count = 0U; + uint32_t dst_size = li->image_size; + uint32_t even_or_odd = 0U; + LOAD_INFO tmp_li = {0U}; + void (*p_w_load_func[])(const LOAD_INFO *li, LOAD_INFO *tmp_li, uint32_t count, uint32_t is_verify) + = {w_load_even, w_load_odd}; + + /* Copy li to tmporary structure. (Because original li members are required later.) */ + (void)memcpy((void *)&tmp_li, li, sizeof(LOAD_INFO)); + + /* A transfer unit is 256KiB. */ + tmp_li.image_size = MCU_TRANSFER_UNIT; + /* Change boot_addr to 0xE2080000. */ + tmp_li.boot_addr = RTVRAM_TMP_G4MH_TOP_A; + + /* Output image info. */ + load_image_info_print(li); + + /* Check load information. */ + check_load_area(li); + + /* Load image from external flash to RT-VRAM. */ + load_start(&tmp_li); + + /* Verify Key Certificate. */ + mcu_key_cert_check(&tmp_li, is_verify); + + /* Finish loading image from external flash to RT-VRAM. */ + load_end(); + + /* Disable ECC error and Address parity error check for CodeSRAM. */ + disable_codesram_ecc_parity(G4MH_PRG_2_BOOT_ADDR, G4MH_PRG_2_SIZE); + + if (dst_size <= tmp_li.image_size) + { + /* If image size is less than 256KiB. */ + tmp_li.image_size = dst_size; + mcu_cnt_cert_check(li, is_verify); + } + else /* If image size is larger than 256KiB. */ + { + /* dst_size - 256KiB */ + dst_size -= tmp_li.image_size; + + if (dst_size < tmp_li.image_size) + { + /* If remaining image size is less than 256KiB. */ + count++; + even_or_odd = count; + tmp_li.image_size = dst_size; + dst_size = 0U; + } + else /* If remaining image size is still larger than 256KiB. */ + { + count++; + even_or_odd = count; + dst_size -= tmp_li.image_size; + } + /* Load image(#count) from external flash to RT-VRAM. * + * Load image(#count-1) from RT-VRAM to CodeSRAM. */ + p_w_load_func[even_or_odd](li, &tmp_li, count, is_verify); + + /* Verify Content Certificate */ + mcu_cnt_cert_check(&tmp_li, is_verify); + + /* Finish loading image(#count) from external flash to RT-VRAM. */ + load_end(); + /* Finish loading image(#count-1) from RT-VRAM to CodeSRAM. */ + load_end_for_mcu(&tmp_li, is_verify); + + /* Load remaining image. */ + while (dst_size != 0U) + { + if (dst_size < tmp_li.image_size) + { + /* If remaining image size is less than 256KiB. */ + count++; + even_or_odd = count % 2U; + tmp_li.image_size = dst_size; + dst_size = 0U; + } + else /* If remaining image size is still larger than 256KiB. */ + { + count++; + even_or_odd = count % 2U; + dst_size -= tmp_li.image_size; + } + /* Load image(#count) from external flash to RT-VRAM. * + * Load image(#count-1) from RT-VRAM to CodeSRAM. (with decryption) */ + p_w_load_func[even_or_odd](li, &tmp_li, count, is_verify); + /* Finish loading image(#count) from external flash to RT-VRAM. */ + load_end(); + /* Finish loading image(#count-1) from RT-VRAM to CodeSRAM. */ + load_end_for_mcu(&tmp_li, is_verify); + } + } + tmp_li.src_addr = (RTVRAM_TMP_G4MH_TOP_A + (even_or_odd * MCU_TRANSFER_UNIT)); + tmp_li.boot_addr = (li->boot_addr + (MCU_TRANSFER_UNIT * (count))); + + /* Load image from RT-VRAM to CodeSRAM (with decryption). */ + image_load_for_mcu(&tmp_li, is_verify); + + /* Finish loading image(bottom) from RT-VRAM to CodeSRAM. */ + load_end_for_mcu(&tmp_li); + + /* Enable ECC error and Address parity error check for CodeSRAM. */ + enable_codesram_ecc_parity(G4MH_PRG_2_BOOT_ADDR, G4MH_PRG_2_SIZE); + + /* Verify G4MH(2nd) image. */ + mcu_img_verify(li, is_verify); + + /* Check ECC error and Address parity error detection for CodeSRAM. */ + chk_codesram_ecc_parity(G4MH_PRG_2_BOOT_ADDR, G4MH_PRG_2_SIZE); + + /* Reset CSRM registers that related CodeSRAM ECC to H/W initial value. */ + initialize_codesram_ecc_parity(G4MH_PRG_2_BOOT_ADDR, G4MH_PRG_2_SIZE); + + /* Change Bus mode of CodeSRAM to the Local Flash Bus mode. */ + mcu_set_csrm(G4MH_PRG_2_BOOT_ADDR, G4MH_PRG_2_SIZE); + + /* Release write protection of SCDS0. */ + mem_write32(MCUAXI_PBG_ERRSLV_PBGKCPROT, MCU_HBG_REL_CODE); + mem_write32(MCU_BOOT_STAT, G4MH_LOAD_FIN_CODE); + /* Write protection of SCDS0. */ + mem_write32(MCUAXI_PBG_ERRSLV_PBGKCPROT, MCU_HBG_PROT_CODE); + + hbg_reg_write(MCU_HBGSLVER_PFS_HBGKCPROT, MCU_HBG_PFS_HBGPROT0, 0x00000000U); +} +/* End of function load_g4mh_2nd(const LOAD_INFO *li) */ + +static void w_load_even(const LOAD_INFO *li, LOAD_INFO *tmp_li, uint32_t count, uint32_t is_verify) +{ + tmp_li->src_addr = (li->src_addr + (MCU_TRANSFER_UNIT * count)); + tmp_li->boot_addr = RTVRAM_TMP_G4MH_TOP_A; + + /* Load image(#count) from external flash to RT-VRAM. */ + load_start(tmp_li); + + tmp_li->src_addr = RTVRAM_TMP_G4MH_TOP_B; + tmp_li->boot_addr = (li->boot_addr + (MCU_TRANSFER_UNIT * (count - 1U))); + + /* Load image(#count-1) from RT-VRAM to CodeSRAM. (with decryption) */ + image_load_for_mcu(tmp_li, is_verify); +} +/* End of function w_load_even(const LOAD_INFO *li, LOAD_INFO *tmp_li, uint32_t count) */ + +static void w_load_odd(const LOAD_INFO *li, LOAD_INFO *tmp_li, uint32_t count, uint32_t is_verify) +{ + tmp_li->src_addr = (li->src_addr + (MCU_TRANSFER_UNIT * count)); + tmp_li->boot_addr = RTVRAM_TMP_G4MH_TOP_B; + + /* Load image(#count) from external flash to RT-VRAM. */ + load_start(tmp_li); + + tmp_li->src_addr = RTVRAM_TMP_G4MH_TOP_A; + tmp_li->boot_addr = (li->boot_addr + (MCU_TRANSFER_UNIT * (count - 1U))); + + /* Load image(#count-1) from RT-VRAM to CodeSRAM. (with decryption) */ + image_load_for_mcu(tmp_li, is_verify); +} +/* End of function w_load_even(const LOAD_INFO *li, LOAD_INFO *tmp_li, uint32_t count) */ + +static void mcu_key_cert_check(LOAD_INFO *li, uint32_t is_verify) +{ +#if (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) + if (is_verify != NORMAL_BOOT) + { + r_mcu_key_cert_check_api(li); + } +#endif /* (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) */ +} +/* End of function mcu_key_cert_check(LOAD_INFO *li, uint32_t is_verify). */ + +static void mcu_cnt_cert_check(const LOAD_INFO *li, uint32_t is_verify) +{ +#if (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) + if (is_verify != NORMAL_BOOT) + { + r_mcu_cnt_cert_check_api(li); + } +#endif /* (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) */ +} +/* End of function mcu_key_cert_check(const LOAD_INFO *li, uint32_t is_verify) */ + +void mcu_img_decrypt(const LOAD_INFO *li) +{ +#if (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) + r_mcu_img_decrypt_api(li); +#endif /* (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) */ +} +/* End of function mcu_img_decrypt(const LOAD_INFO *li, uint32_t is_verify) */ + +void mcu_img_decrypt_end(const LOAD_INFO *li) +{ + /* Argument li is not used but compliant to MISRA Rule 2.2. */ +#if (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) + r_mcu_img_decrypt_end(); +#endif /* (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) */ +} +/* End of function mcu_img_decrypt_end(const LOAD_INFO *li) */ + +static void mcu_img_verify(const LOAD_INFO *li, uint32_t is_verify) +{ +#if (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) + if (is_verify != NORMAL_BOOT) + { + r_mcu_img_verify_api(li); + sw_version_check(li); + } +#endif /* (MCU_SECURE_BOOT == MCU_SEC_BOOT_ENABLE) */ +} +/* End of function mcu_img_verify(const LOAD_INFO *li, uint32_t is_verify) */ + +void mcu_load_main(const LOAD_INFO *li, uint32_t is_verify) +{ + load_g4mh_1st(&li[G4MH_PROGRAM_ID], is_verify); /* Load G4MH(1st) image. */ + load_icumh(&li[ICUMH_PROGRAM_ID], is_verify); /* Load ICUMH image. */ + load_g4mh_2nd(&li[G4MH_PROGRAM_ID + 1U], is_verify); /* Load G4MH(2nd) image. */ +} +/* End of function mcu_load_main(const LOAD_INFO *li, uint32_t is_verify) */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h new file mode 100644 index 00000000..5cf989b3 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/loader_main_mcu.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : MCU Secure Boot Main header + ******************************************************************************/ + +#ifndef LOADER_MAIN_MCU_H__ +#define LOADER_MAIN_MCU_H__ + +#include +#include + +#define MCU_SEC_BOOT_ENABLE (1U) +#define MCU_IMG_NOT_ENCRYPTED (0U) + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ + +void mcu_img_decrypt(const LOAD_INFO *li); +void mcu_img_decrypt_end(const LOAD_INFO *li); +void mcu_load_main(const LOAD_INFO *li, uint32_t is_verify); + +#endif /* LOADER_MAIN_MCU_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.c new file mode 100644 index 00000000..2ff451f7 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.c @@ -0,0 +1,110 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load function by SDMAC on ICUMX + ******************************************************************************/ +/****************************************************************************** + * @file sdmac.c + * - Version : 0.01 + * @brief Driver of SCMAC on ICUMX. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 21.06.2022 0.01 First Release + *****************************************************************************/ + +/* indelude */ +#include +#include +#include +#include +#include +#include + +void icu_sdmac_trans_start(const LOAD_INFO *li) +{ + uint16_t reg; + uint32_t len = li->image_size; + + /* src_addr and boot_addr must be 64-byte boundary. */ + dma_address_align_check(li->boot_addr, li->src_addr); + + /* If len is not 64-byte boundary, */ + /* round up len to 64-byte boundary. */ + len += SDMAC_FRACTION_MASK_64_BYTE; + len &= ~(SDMAC_FRACTION_MASK_64_BYTE); + + /* Clear channel 0 registers */ + mem_write32(ICUMX_DMACHRST, ICUMX_DMACHRST_CLR_CH0); + /* Clear flags */ + mem_write32(ICUMX_DMACHFCR_0, ICUMX_DMACHFCR_INIT); + /* Round-robin mode / Enable DMA transfer */ + mem_write16(ICUMX_DMAOR, ICUMX_DMAOR_INIT); + + /* DMA Transfer mode * + * Slow speed mode : Normal mode * + * Priority setting : Disable * + * Transfer Request source : Auto Request * + * Destination Address mode : Fixed * + * Source address mode : Incremented * + * DMA destination transaction size : 64byte * + * DMA source transaction size : 64byte */ + mem_write32(ICUMX_DMATMR_0, ICUMX_DMATMR_0_INIT); + + /* Set destination address */ + mem_write32(ICUMX_DMADAR_0, li->boot_addr); + /* Set source address */ + mem_write32(ICUMX_DMASAR_0, li->src_addr); + /* Set transfer size */ + mem_write32(ICUMX_DMATSR_0, len); + reg = mem_read16(ICUMX_DMACHCR_0); + /* Enable channel address error notification / Enable DMA */ + reg |= ICUMX_DMACHCR_0_START; + mem_write16(ICUMX_DMACHCR_0, reg); +} +/* End of function icu_sdmac_trans_start(LOAD_INFO *li) */ + +void icu_sdmac_trans_end(void) +{ + uint32_t reg; + + wdt_restart(); + /* Check end of DMA transfer. */ + do + { + reg = mem_read32(ICUMX_DMACHSTA_0); + /* Check error of DMA transfer */ + if ((reg & ICUMX_DMACHSTA_CAE) != DMACHSTA_CAE_BIT_NOERROR) + { + ERROR("SDMAC on ICUMX - Channel Address Error\n"); + panic; + } + } while ((reg & ICUMX_DMACHSTA_TE) != DMACHSTA_TE_END_DMA); + + /* Clear flags */ + mem_write32(ICUMX_DMACHFCR_0, ICUMX_DMACHFCR_INIT); +} +/* End of function icu_sdmac_trans_end(void) */ + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.h new file mode 100644 index 00000000..0f241c4b --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac.h @@ -0,0 +1,99 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Image load function by SDMAC on ICUMX header + ******************************************************************************/ + +#ifndef SDMAC_H__ +#define SDMAC_H__ + +#include +#include + +/* Prototype */ +void icu_sdmac_trans_start(const LOAD_INFO *li); +void icu_sdmac_trans_end(void); + +/* Definitions */ +#define ICUMX_DMACHRST_CLR_CH0 (0x00000001U) +#define ICUMX_DMACHRST_CLR_CH1 (0x00000002U) +#define ICUMX_DMACHRST_CLR_CH2 (0x00000004U) + +#define ICUMX_DMACHFCR_CAEC (0x00000008U) +#define ICUMX_DMACHFCR_TEC (0x00000002U) +#define ICUMX_DMACHFCR_DEC (0x00000001U) +#define ICUMX_DMACHFCR_INIT (ICUMX_DMACHFCR_CAEC | ICUMX_DMACHFCR_TEC | ICUMX_DMACHFCR_DEC) + +#define ICUMX_DMAOR_PR_ROUND_ROBIN (0x0300U) +#define ICUMX_DMAOR_DME_ENABLE (0x0001U) +#define ICUMX_DMAOR_INIT (ICUMX_DMAOR_PR_ROUND_ROBIN | ICUMX_DMAOR_DME_ENABLE) + +#define ICUMX_DMATMR_SLM_NORMAL (0x00000000U) +#define ICUMX_DMATMR_PRI_DISABLE (0x00000000U) +#define ICUMX_DMATMR_TRS_AT_REQ (0x00000000U) +#define ICUMX_DMATMR_TRS_HARD_REQ (0x00001000U) +#define ICUMX_DMATMR_DM_INC (0x00000400U) +#define ICUMX_DMATMR_SM_INC (0x00000100U) +#define ICUMX_DMATMR_DTS_64B (0x00000060U) +#define ICUMX_DMATMR_STS_64B (0x00000006U) +#define ICUMX_DMATMR_0_INIT (ICUMX_DMATMR_SLM_NORMAL | ICUMX_DMATMR_PRI_DISABLE | ICUMX_DMATMR_TRS_AT_REQ \ + | ICUMX_DMATMR_DM_INC | ICUMX_DMATMR_SM_INC | ICUMX_DMATMR_DTS_64B \ + | ICUMX_DMATMR_STS_64B) +#define ICUMX_DMATMR_1_INIT (ICUMX_DMATMR_SLM_NORMAL | ICUMX_DMATMR_PRI_DISABLE \ + | ICUMX_DMATMR_TRS_HARD_REQ | ICUMX_DMATMR_SM_INC | ICUMX_DMATMR_DTS_64B \ + | ICUMX_DMATMR_STS_64B) +#define ICUMX_DMATMR_2_INIT (ICUMX_DMATMR_SLM_NORMAL | ICUMX_DMATMR_PRI_DISABLE \ + | ICUMX_DMATMR_TRS_HARD_REQ | ICUMX_DMATMR_DM_INC | ICUMX_DMATMR_DTS_64B \ + | ICUMX_DMATMR_STS_64B) + +#define ICUMX_DMACHCR_CAEE_ENABLE (0x0010U) +#define ICUMX_DMACHCR_CAIE_ENABLE (0x0008U) +#define ICUMX_DMACHCR_IE_ENABLE (0x0002U) +#define ICUMX_DMACHCR_DE_ENABLE (0x0001U) +#define ICUMX_DMACHCR_0_START (ICUMX_DMACHCR_CAEE_ENABLE | ICUMX_DMACHCR_DE_ENABLE) +#define ICUMX_DMACHCR_1_START (ICUMX_DMACHCR_CAEE_ENABLE | ICUMX_DMACHCR_CAIE_ENABLE \ + | ICUMX_DMACHCR_DE_ENABLE) +#define ICUMX_DMACHCR_2_START (ICUMX_DMACHCR_CAEE_ENABLE | ICUMX_DMACHCR_CAIE_ENABLE \ + | ICUMX_DMACHCR_IE_ENABLE | ICUMX_DMACHCR_DE_ENABLE) + +#define ICUMX_DMACHSTA_CAE (0x00000008U) +#define ICUMX_DMACHSTA_TE (0x00000002U) +#define DMACHSTA_CAE_BIT_NOERROR (0x00000000U) +#define DMACHSTA_TE_END_DMA (0x00000002U) + +#define ICUMX_DMARS_TC_1 (0x00010000U) +#define ICUMX_DMARS_TL_TMR_DTS (0x00001000U) +#define ICUMX_DMARS_TL_TMR_STS (0x00000000U) +#define ICUMX_DMARS_FPT_DE_IS_1 (0x00000000U) +#define ICUMX_DMARS_PLE_ENABLE (0x00000400U) +#define ICUMX_DMARS_PLE_DISABLE (0x00000000U) +#define ICUMX_DMARS_RS_FOR_CH2 (0x00000001U) +#define ICUMX_DMARS_1_INIT (ICUMX_DMARS_TC_1 | ICUMX_DMARS_TL_TMR_DTS | ICUMX_DMARS_FPT_DE_IS_1 \ + | ICUMX_DMARS_PLE_ENABLE) +#define ICUMX_DMARS_2_INIT (ICUMX_DMARS_TC_1 | ICUMX_DMARS_TL_TMR_STS | ICUMX_DMARS_FPT_DE_IS_1 \ + | ICUMX_DMARS_PLE_DISABLE | ICUMX_DMARS_RS_FOR_CH2) + +#define SDMAC_FRACTION_MASK_64_BYTE (0x3FU) + +#endif /* SDMAC_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac_register.h new file mode 100644 index 00000000..69be66a8 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/mcu/sdmac_register.h @@ -0,0 +1,77 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Registers of SDMAC on ICUMX + ******************************************************************************/ + +#ifndef SDMAC_REGISTER_H__ +#define SDMAC_REGISTER_H__ + +/* SDMAC on ICUMX base address */ +#define ICUMX_SDMAC_BASE (0xFF600000U) + +/* Channel offset address */ +#define ICUMX_SDMAC_CH0 (0x80U * 0U) +#define ICUMX_SDMAC_CH1 (0x80U * 1U) +#define ICUMX_SDMAC_CH2 (0x80U * 2U) + +/* SDMAC Interrupt Status Register */ +#define ICUMX_DMAISTA (ICUMX_SDMAC_BASE + 0x0020U) +/* SDMAC Operation Register */ +#define ICUMX_DMAOR (ICUMX_SDMAC_BASE + 0x0060U) +/* SDMAC Channel Reset Register */ +#define ICUMX_DMACHRST (ICUMX_SDMAC_BASE + 0x0080U) +/* SDMAC Source Address Register */ +#define ICUMX_DMASAR_0 (ICUMX_SDMAC_BASE + 0x2000U + ICUMX_SDMAC_CH0) +#define ICUMX_DMASAR_1 (ICUMX_SDMAC_BASE + 0x2000U + ICUMX_SDMAC_CH1) +#define ICUMX_DMASAR_2 (ICUMX_SDMAC_BASE + 0x2000U + ICUMX_SDMAC_CH2) +/* SDMAC Destination Address Register */ +#define ICUMX_DMADAR_0 (ICUMX_SDMAC_BASE + 0x2004U + ICUMX_SDMAC_CH0) +#define ICUMX_DMADAR_1 (ICUMX_SDMAC_BASE + 0x2004U + ICUMX_SDMAC_CH1) +#define ICUMX_DMADAR_2 (ICUMX_SDMAC_BASE + 0x2004U + ICUMX_SDMAC_CH2) +/* SDMAC Transfer Size Register */ +#define ICUMX_DMATSR_0 (ICUMX_SDMAC_BASE + 0x2008U + ICUMX_SDMAC_CH0) +#define ICUMX_DMATSR_1 (ICUMX_SDMAC_BASE + 0x2008U + ICUMX_SDMAC_CH1) +#define ICUMX_DMATSR_2 (ICUMX_SDMAC_BASE + 0x2008U + ICUMX_SDMAC_CH2) +/* SDMAC Transfer Mode Register */ +#define ICUMX_DMATMR_0 (ICUMX_SDMAC_BASE + 0x2010U + ICUMX_SDMAC_CH0) +#define ICUMX_DMATMR_1 (ICUMX_SDMAC_BASE + 0x2010U + ICUMX_SDMAC_CH1) +#define ICUMX_DMATMR_2 (ICUMX_SDMAC_BASE + 0x2010U + ICUMX_SDMAC_CH2) +/* SDMAC Channel Control Register */ +#define ICUMX_DMACHCR_0 (ICUMX_SDMAC_BASE + 0x2014U + ICUMX_SDMAC_CH0) +#define ICUMX_DMACHCR_1 (ICUMX_SDMAC_BASE + 0x2014U + ICUMX_SDMAC_CH1) +#define ICUMX_DMACHCR_2 (ICUMX_SDMAC_BASE + 0x2014U + ICUMX_SDMAC_CH2) +/* SDMAC Channel Status Register */ +#define ICUMX_DMACHSTA_0 (ICUMX_SDMAC_BASE + 0x2018U + ICUMX_SDMAC_CH0) +#define ICUMX_DMACHSTA_1 (ICUMX_SDMAC_BASE + 0x2018U + ICUMX_SDMAC_CH1) +#define ICUMX_DMACHSTA_2 (ICUMX_SDMAC_BASE + 0x2018U + ICUMX_SDMAC_CH2) +/* SDMAC Channel Flag Clear Register */ +#define ICUMX_DMACHFCR_0 (ICUMX_SDMAC_BASE + 0x201CU + ICUMX_SDMAC_CH0) +#define ICUMX_DMACHFCR_1 (ICUMX_SDMAC_BASE + 0x201CU + ICUMX_SDMAC_CH1) +#define ICUMX_DMACHFCR_2 (ICUMX_SDMAC_BASE + 0x201CU + ICUMX_SDMAC_CH2) +/* SDMAC Resource Select Register */ +#define ICUMX_DMARS_1 (ICUMX_SDMAC_BASE + 0x2040U + ICUMX_SDMAC_CH1) +#define ICUMX_DMARS_2 (ICUMX_SDMAC_BASE + 0x2040U + ICUMX_SDMAC_CH2) + +#endif /* SDMAC_REGISTER_H__ */ diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/ram_protection.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/ram_protection.c new file mode 100644 index 00000000..1a4fec50 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/ram_protection.c @@ -0,0 +1,271 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : memory protection function + ******************************************************************************/ + /****************************************************************************** + * @file ram_protection.c + * - Version : 0.03 + * @brief Access protection setting of memory. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 19.12.2022 0.01 First Release + * : 11.01.2024 0.02 Added icu_remove_write_access function. + * : 19.01.2024 0.03 Updated debug log. + * : 31.01.2024 0.04 Fixed the error in SECDIVn register + * setting value for ram_protect_init_4_rtsram() + * and ram_protect_init_4_rtvram. + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Value for calculating the offset address to set in SECDIVD. */ +#define RTSRAM_SECDIVD_SUBVALUE (0xE0000000U) /* RT-VRAM0 Base address */ +#define RTVRAM_SECDIVD_SUBVALUE (0xE2000000U) /* RT-VRAM1 Base address */ + +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) +static void ram_protect_init_4_rtsram(void); +static void ram_protect_init_4_rtvram(const RTRAM_PROTECTION_STRUCTUR *cnf_tbl); +static void ram_protect_init_4_sysram(void); +static void ram_protect_init_4_dram(void); +#endif /* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ + +void ram_protection(void) +{ +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) + /* RT-SRAM */ + NOTICE("RT-SRAM Protection setting...\n"); + ram_protect_init_4_rtsram(); + NOTICE("finish!\n"); + + /* RT-VRAM */ + NOTICE("RT-VRAM Protection setting...\n"); + ram_protect_init_4_rtvram(g_rtvram1_protection_table_1); + NOTICE("finish!\n"); + + /* System RAM */ + NOTICE("System RAM Protection setting...\n"); + ram_protect_init_4_sysram(); + NOTICE("finish!\n"); + + /* DRAM */ + NOTICE("DRAM Protection setting...\n"); + ram_protect_init_4_dram(); + NOTICE("finish!\n"); +#endif /* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ +} +/* End of function ram_protection(void) */ + +#if (RCAR_LSI == RCAR_S4) +void ram_protection_final(void) +{ +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) + NOTICE("RT-VRAM Protection setting(finally)...\n"); + ram_protect_init_4_rtvram(g_rtvram1_protection_table_2); + NOTICE("finish!\n"); +#endif /* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ +} +/* End of function ram_protection_final(void) */ +#endif /* #if (RCAR_LSI == RCAR_S4) */ + +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) +static void ram_protect_init_4_rtsram(void) +{ + uint32_t loop; + uint32_t val; + uint32_t set_val; + uint32_t addr; + + /* set division point for RT-SRAM */ + for (loop = 0U; loop < (RAM_PROTECTION_MAX - 1U); ++loop) + { + addr = get_rtsram_secdivd_addr(loop); + val = mem_read32(addr); + val &= ~(RTSRAM_SECDIVD_DIVADDR_MASK); + set_val = g_rtsram_protection_table[loop + 1U].addr - RTSRAM_SECDIVD_SUBVALUE; + val |= ((set_val & RTSRAM_ADDR_OFFSET_MASK) >> 12U); + mem_write32(addr, val); + INFO("SECDIVD[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + } + + /* Set division area protection register for RT-SRAM */ + for (loop = 0U; loop < RAM_PROTECTION_MAX; ++loop) + { + /* Read Access Configuration */ + addr = get_rtsram_secctrrd_addr(loop); + val = mem_read32(addr); + val &= ~(RTSRAM_SECCTRRD_SECGRP_MASK | RTSRAM_SECCTRRD_SAFGRP_MASK); + val |= g_rtsram_protection_table[loop].setting_value.read_val; + mem_write32(addr, val); + INFO("SECCTRRD[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + /* Write Access Configuration */ + addr = get_rtsram_secctrwd_addr(loop); + val = mem_read32(addr); + val &= ~(RTSRAM_SECCTRWD_SECGRP_MASK | RTSRAM_SECCTRWD_SAFGRP_MASK); + val |= g_rtsram_protection_table[loop].setting_value.write_val; + mem_write32(addr, val); + INFO("SECCTRWD[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + } +} +/* End of function ram_protect_init_4_rtsram(void) */ + +static void ram_protect_init_4_rtvram(const RTRAM_PROTECTION_STRUCTUR *cnf_tbl) +{ + uint32_t loop; + uint32_t val; + uint32_t set_val; + uint32_t addr; + + /* set division point for RT-VRAM1 */ + for (loop = 0U; loop < (RAM_PROTECTION_MAX - 1U); ++loop) + { + addr = get_rtvram_secdivd_addr(loop); + val = mem_read32(addr); + val &= ~(RTVRAM_SECDIVD_DIVADDR_MASK); + set_val = cnf_tbl[loop + 1U].addr - RTVRAM_SECDIVD_SUBVALUE; + val |= ((set_val & RTVRAM_ADDR_MASK) >> 12U); + mem_write32(addr, val); + INFO("SECDIVD[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + } + + /* Set division area protection register for RT-VRAM1 */ + for (loop = 0U; loop < RAM_PROTECTION_MAX; ++loop) + { + /* Read Access Configuration */ + addr = get_rtvram_secctrrd_addr(loop); + val = mem_read32(addr); + val &= ~(RTVRAM_SECCTRRD_SECGRP_MASK | RTVRAM_SECCTRRD_SAFGRP_MASK); + val |= cnf_tbl[loop].setting_value.read_val; + mem_write32(addr, val); + INFO("SECCTRRD[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + /* Write Access Configuration */ + addr = get_rtvram_secctrwd_addr(loop); + val = mem_read32(addr); + val &= ~(RTVRAM_SECCTRWD_SECGRP_MASK | RTVRAM_SECCTRWD_SAFGRP_MASK); + val |= cnf_tbl[loop].setting_value.write_val; + mem_write32(addr, val); + INFO("SECCTRWD[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + } +} +/* End of function ram_protect_init_4_rtvram(const RTRAM_PROTECTION_STRUCTUR *cnf_tbl) */ + + +static void ram_protect_init_4_sysram(void) +{ + uint32_t loop; + uint32_t val; + uint32_t addr; + + /* set division point for SystemRAM */ + for (loop = 0U; loop < (RAM_PROTECTION_MAX - 1U); ++loop) + { + addr = get_sptdivcr_addr(loop); + val = mem_read32(addr); + val &= ~(AXMM_SPTDIVCR_DIVADDR_MASK); + val |= ((g_system_ram_protection_table[loop + 1U].addr & SYSTEM_RAM_ADDR_MASK) >> 12U); + mem_write32(addr, val); + INFO("SPTDIVCR[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + } + + /* Set division area protection register for RT-VRAM */ + for (loop = 0U; loop < RAM_PROTECTION_MAX; ++loop) + { + /* Read / Write Access Configuration */ + addr = get_sptrgncr_addr(loop); + val = g_system_ram_protection_table[loop].setting_value.rw_val; + mem_write32(addr, val); + INFO("SPTRGNCR[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + /* Secure setting */ + addr = get_sptseccr_addr(loop); + val = mem_read32(addr); + val &= ~(AXMM_SPTSECCR_SECGRP_MASK | AXMM_SPTSECCR_SECGWP_MASK); + val |= g_system_ram_protection_table[loop].setting_value.sec_val; + mem_write32(addr, val); + INFO("SPTSECCR[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + } +} +/* End of function ram_protect_init_4_sysram(void) */ + + +static void ram_protect_init_4_dram(void) +{ + uint32_t loop; + uint32_t val; + uint32_t addr; + + /* set division point for SDRAM */ + for (loop = 0U; loop < (DRAM_PROTECTION_MAX - 1U); ++loop) + { + addr = get_dptdivcr_addr(loop); + val = mem_read32(addr); + val &= ~(AXMM_DPTDIVCR_DIVADDR_MASK); + val |= ((g_dram_protection_table[loop + 1U].addr & SDRAM_ADDR_MASK) >> 16U); + mem_write32(addr, val); + INFO("DPTDIVCR[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + } + + /* Set division area protection register for RT-VRAM */ + for (loop = 0U; loop < DRAM_PROTECTION_MAX; ++loop) + { + /* Read / Write Access Configuration */ + addr = get_dptrgncr_addr(loop); + val = g_dram_protection_table[loop].setting_value.rw_val; + mem_write32(addr, val); + INFO("DPTRGNCR[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + /* Secure setting */ + addr = get_dptseccr_addr(loop); + val = mem_read32(addr); + val &= ~(AXMM_DPTSECCR_SECGRP_MASK | AXMM_DPTSECCR_SECGWP_MASK); + val |= g_dram_protection_table[loop].setting_value.sec_val; + mem_write32(addr, val); + INFO("DPTSECCR[%d](0x%08x)\t = 0x%08x\n", loop, addr, mem_read32(addr)); + } +} +/* End of function ram_protect_init_4_dram(void) */ +#endif /* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ + +void icu_remove_write_access(void) +{ +#if (ACC_PROT_ENABLE == PROTECTION_ENABLE) + uint32_t reg; + uint32_t addr; + + addr = get_sptrgncr_addr(SYSTEM_RAM_CX_2ND_IPL); + reg = mem_read32(addr); + reg |= REGIONID0_WRITE_PRIVILEGE; /* Remove write privilege to System RAM Area0 from RGID0(ICUMX). */ + mem_write32(addr, reg); +#endif /* #if (ACC_PROT_ENABLE == PROTECTION_ENABLE) */ +} +/* End of function icu_remove_write_access(void) */ + diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/region_id.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/region_id.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/region_id.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/region_id.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/stack_protect.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/stack_protect.c new file mode 100644 index 00000000..21a6493b --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/protect/stack_protect.c @@ -0,0 +1,86 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : Stack protect function + ******************************************************************************/ + /****************************************************************************** + * @file stack_protect.c + * - Version : 0.01 + * @brief Check for Stack Smashing Attacks. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 31.01.2023 0.01 First Release + *****************************************************************************/ + +#include +#include + +/* Specify fixed canary value as reference implementation. */ +#define CANARY_VAL (0xB9DFF6A0U) + +#define STACK_PROTECT_ENABLE (1U) + +/* Save canary to __stack_chk_guard. */ +extern uintptr_t __stack_chk_guard; +__attribute__((section(".canary"))) uintptr_t __stack_chk_guard; + +/* Prototype */ +extern void __ghs_set_stack_chk_guard(void); +#if (STACK_PROTECT == STACK_PROTECT_ENABLE) +extern void __stack_chk_fail(void); +static inline uintptr_t *__ghs_get_stack_chk_guard_address(void); +#endif + +void __ghs_set_stack_chk_guard(void) +{ +#if (STACK_PROTECT == STACK_PROTECT_ENABLE) + /* Initialize the stack canary before any code that may require a stack canary. */ + /* So don't add valiables larger than 8-bytes to this function. */ + /* Don't call function that uses stack canaries from this function. */ + /* If customize CANARY_VAL to random value, don't allow the function */ + /* to be inlined or this function may require a canary. */ + + *__ghs_get_stack_chk_guard_address() = (uintptr_t)CANARY_VAL; + +#endif +} +/* End of function __ghs_set_stack_chk_guard(void) */ + +#if (STACK_PROTECT == STACK_PROTECT_ENABLE) +static inline uintptr_t *__ghs_get_stack_chk_guard_address(void) +{ + /* Don't modify this function. */ + return &__stack_chk_guard; +} +/* End of function __ghs_get_stack_chk_guard_address(void) */ + +void __stack_chk_fail(void) +{ + ERROR("Stack smashing detected\n"); + panic; +} +/* End of function __stack_chk_fail(void) */ +#endif /* (STACK_PROTECT == STACK_PROTECT_ENABLE) */ diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/remap/remap.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/remap/remap.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/remap/remap.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/remap/remap.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/rom_api/rom_api.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/rom_api/rom_api.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/rom_api/rom_api.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/rom_api/rom_api.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c new file mode 100644 index 00000000..94e16186 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.c @@ -0,0 +1,289 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : dummy flash data for sector 9(0x240000) + ******************************************************************************/ + +#include + +#define FLASH_BOOT (0U) +#define EMMC_BOOT (1U) +#define CA_IPL (0U) +#define BL31 (1U) + +/* CA program load num */ +#define CA_IMAGE_NUM (0x00000003U) +/* Source address on flash for Secure FW */ +#define SECURE_FW_SRC_ADDRESS (0x00280000U) +/* Source address on flash for RTOS */ +#define RTOS_SRC_ADDRESS (0x00500000U) +/* Source address on flash for ICUMH program */ +#define ICUMH_PROG_SRC_ADDRESS (0x00380000U) +/* Source address on flash for G4MH program (1st) */ +#define G4MH_PROG_SRC_ADDRESS (0x00900000U) +/* Source address on flash for G4MH program (2nd) */ +#define G4MH_PROG_02_SRC_ADDRESS (0x00A00000U) +#if (CA_LOAD_TYPE == CA_IPL) +/* Source address on flash for CX IPL */ +#define CX_IPL_SRC_ADDRESS (0x00480000U) +#else +/* Reserved */ +#define CX_IPL_SRC_ADDRESS (0x00000000U) +#endif +/* ----------- customized ----------- */ +/* Source address on flash for BL31 */ +#define CA_PROG_01_SRC_ADDRESS (0x00E00000U) +/* Source address on flash for OP-TEE */ +#define CA_PROG_02_SRC_ADDRESS (0x00E80000U) +/* Source address on flash for U-Boot */ +#define CA_PROG_03_SRC_ADDRESS (0x00F80000U) +/* Reserved */ +#define CA_PROG_04_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_05_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_06_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_07_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_08_SRC_ADDRESS (0x00000000U) +/* ----------- customized ----------- */ + +#if (RCAR_SA9_TYPE == FLASH_BOOT) +#define SECURE_FW_PARTITION (0x00000000U) +#define RTOS_PARTITION (0x00000000U) +#define ICUMH_PROG_PARTITION (0x00000000U) +#define G4MH_PROG_PARTITION (0x00000000U) +#define G4MH_PROG_02_PARTITION (0x00000000U) +#define CX_IPL_PARTITION (0x00000000U) + #if (CA_LOAD_TYPE == CA_IPL) +#define CA_PROG_01_PARTITION (0x00000001U) +#define CA_PROG_02_PARTITION (0x00000001U) +#define CA_PROG_03_PARTITION (0x00000001U) +#define CA_PROG_04_PARTITION (0x00000000U) +#define CA_PROG_05_PARTITION (0x00000000U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) + #else /* #if (CA_LOAD_TYPE == CA_IPL) */ +#define CA_PROG_01_PARTITION (0x00000000U) +#define CA_PROG_02_PARTITION (0x00000000U) +#define CA_PROG_03_PARTITION (0x00000000U) +#define CA_PROG_04_PARTITION (0x00000000U) +#define CA_PROG_05_PARTITION (0x00000000U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) + #endif /* #if (CA_LOAD_TYPE == CA_IPL) */ +#else /* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ +#define SECURE_FW_PARTITION (0x00000001U) +#define RTOS_PARTITION (0x00000001U) +#define ICUMH_PROG_PARTITION (0x00000001U) +#define G4MH_PROG_PARTITION (0x00000001U) +#define G4MH_PROG_02_PARTITION (0x00000001U) +#define CX_IPL_PARTITION (0x00000001U) +#define CA_PROG_01_PARTITION (0x00000001U) +#define CA_PROG_02_PARTITION (0x00000001U) +#define CA_PROG_03_PARTITION (0x00000001U) +#define CA_PROG_04_PARTITION (0x00000000U) +#define CA_PROG_05_PARTITION (0x00000000U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) +#endif /* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ + +#if (RCAR_SA9_TYPE != EMMC_BOOT) +/* Test data for QSPI DDR mode */ +#define QSPI_TESTDATA (0x5A5AA5A5U) +#else +#define QSPI_TESTDATA (0x00000000U) +#endif /* (RCAR_SA9_TYPE == FLASH_BOOT) */ + +/* Destination address for Secure FW */ +#define SECURE_FW_ADDRESS (0xEB240000U) +#define SECURE_FW_ADDRESSH (0x00000000U) +/* Destination size for Secure FW */ +#define SECURE_FW_DST_SIZE (0x00028000U) /* 640KiB / 4 */ +/* Destination address for RTOS */ +#define RTOS_ADDRESS (0xE2100000U) +#define RTOS_ADDRESSH (0x00000000U) +/* Destination size for RTOS */ +#define RTOS_DST_SIZE (0x00100000U) /* 4MiB / 4 */ +/* Destination address for ICUMH program */ +#define ICUMH_PROG_ADDRESS (0x10500000U) +#define ICUMH_PROG_ADDRESSH (0x00000000U) +/* Destination size for ICUMH program */ +#define ICUMH_PROG_DST_SIZE (0x00040000U) /* 1MiB / 4 */ +/* Destination address for G4MH program (1st) */ +#define G4MH_PROG_ADDRESS (0x10000000U) +#define G4MH_PROG_ADDRESSH (0x00000000U) +/* Destination size for G4MH program (1st) */ +#define G4MH_PROG_DST_SIZE (0x00040000U) /* 1MiB / 4 */ +/* Destination address for G4MH program (2nd) */ +#define G4MH_PROG_02_ADDRESS (0x10100000U) +#define G4MH_PROG_02_ADDRESSH (0x00000000U) +/* Destination size for G4MH program (2nd) */ +#define G4MH_PROG_02_DST_SIZE (0x00040000U) /* 1MiB / 4 */ +#if (CA_LOAD_TYPE == CA_IPL) +/* Destination address for CA Loader */ +#define CX_IPL_ADDRESS (0xE6300000U) +#define CX_UPL_ADDRESSH (0x00000000U) +/* Destination size for CA Loader */ +#define CX_IPL_SIZE (0x0000C000U) /* 192KiB / 4 */ +#else /* (CA_LOAD_TYPE == CA_IPL) */ +/* CX IPL Reserved */ +#define CX_IPL_ADDRESS (0x00000000U) +#define CX_UPL_ADDRESSH (0x00000000U) +#define CX_IPL_SIZE (0x00000000U) +#endif /* (CA_LOAD_TYPE == CA_IPL) */ +/* ----------- customized ----------- */ +/* Destination address for BL31 */ +#define CA_PROG_01_ADDRESS (0x46400000U) +#define CA_PROG_01_ADDRESSH (0x00000000U) +#define CA_PROG_01_SIZE (0x00008800U) /* 136KiB / 4 */ +/* Destination address for OP-TEE */ +#define CA_PROG_02_ADDRESS (0x44100000U) +#define CA_PROG_02_ADDRESSH (0x00000000U) +#define CA_PROG_02_SIZE (0x00040000U) /* 1MiB / 4 */ +/* Destination address for U-Boot */ +#define CA_PROG_03_ADDRESS (0x50000000U) +#define CA_PROG_03_ADDRESSH (0x00000000U) +#define CA_PROG_03_SIZE (0x00080000U) /* 2MiB / 4 */ +/* Reserved */ +#define CA_PROG_04_ADDRESS (0x00000000U) +#define CA_PROG_04_ADDRESSH (0x00000000U) +#define CA_PROG_04_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_05_ADDRESS (0x00000000U) +#define CA_PROG_05_ADDRESSH (0x00000000U) +#define CA_PROG_05_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_06_ADDRESS (0x00000000U) +#define CA_PROG_06_ADDRESSH (0x00000000U) +#define CA_PROG_06_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_07_ADDRESS (0x00000000U) +#define CA_PROG_07_ADDRESSH (0x00000000U) +#define CA_PROG_07_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_08_ADDRESS (0x00000000U) +#define CA_PROG_08_ADDRESSH (0x00000000U) +#define CA_PROG_08_SIZE (0x00000000U) +/* ----------- customized ----------- */ + +/* sa9 */ +__attribute__ ((section (".sa9_top"))) const uint32_t top_cert[1024 / 4] = { + [0x0000 / 4] = CA_IMAGE_NUM, + [0x0008 / 4] = SECURE_FW_SRC_ADDRESS, + [0x0010 / 4] = SECURE_FW_PARTITION, + [0x0018 / 4] = RTOS_SRC_ADDRESS, + [0x0020 / 4] = RTOS_PARTITION, + [0x0028 / 4] = CX_IPL_SRC_ADDRESS, + [0x0030 / 4] = CX_IPL_PARTITION, + [0x0038 / 4] = ICUMH_PROG_SRC_ADDRESS, + [0x0040 / 4] = ICUMH_PROG_PARTITION, + [0x0048 / 4] = G4MH_PROG_SRC_ADDRESS, + [0x0050 / 4] = G4MH_PROG_PARTITION, + [0x0058 / 4] = G4MH_PROG_02_SRC_ADDRESS, + [0x0060 / 4] = G4MH_PROG_02_PARTITION, + [0x0068 / 4] = CA_PROG_01_SRC_ADDRESS, + [0x0070 / 4] = CA_PROG_01_PARTITION, + [0x0078 / 4] = CA_PROG_02_SRC_ADDRESS, + [0x0080 / 4] = CA_PROG_02_PARTITION, + [0x0088 / 4] = CA_PROG_03_SRC_ADDRESS, + [0x0090 / 4] = CA_PROG_03_PARTITION, + [0x0098 / 4] = CA_PROG_04_SRC_ADDRESS, + [0x00A0 / 4] = CA_PROG_04_PARTITION, + [0x00A8 / 4] = CA_PROG_05_SRC_ADDRESS, + [0x00B0 / 4] = CA_PROG_05_PARTITION, + [0x00B8 / 4] = CA_PROG_06_SRC_ADDRESS, + [0x00C0 / 4] = CA_PROG_06_PARTITION, + [0x00C8 / 4] = CA_PROG_07_SRC_ADDRESS, + [0x00D0 / 4] = CA_PROG_07_PARTITION, + [0x00D8 / 4] = CA_PROG_08_SRC_ADDRESS, + [0x00E0 / 4] = CA_PROG_08_PARTITION, +}; +__attribute__ ((section (".qspi_test_data"))) const uint32_t test_data[1] = { + QSPI_TESTDATA +}; +__attribute__ ((section (".sa9_firm"))) const uint32_t firm_cert[2048 / 4] = { + [0x0154 / 4] = SECURE_FW_ADDRESS, + [0x0264 / 4] = SECURE_FW_DST_SIZE, +}; +__attribute__ ((section (".sa9_rtos"))) const uint32_t rtos_cert[2048 / 4] = { + [0x0154 / 4] = RTOS_ADDRESS, + [0x0264 / 4] = RTOS_DST_SIZE, +}; +__attribute__ ((section (".sa9_cx_ipl"))) const uint32_t cx_ipl_cert[2048 / 4] = { + [0x0154 / 4] = CX_IPL_ADDRESS, + [0x0264 / 4] = CX_IPL_SIZE, +}; +__attribute__ ((section (".sa9_ca_01"))) const uint32_t ca_01_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_01_ADDRESS, + [0x0264 / 4] = CA_PROG_01_SIZE, +}; + +__attribute__ ((section (".sa9_ca_02"))) const uint32_t ca_02_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_02_ADDRESS, + [0x0264 / 4] = CA_PROG_02_SIZE, +}; +__attribute__ ((section (".sa9_ca_03"))) const uint32_t ca_03_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_03_ADDRESS, + [0x0264 / 4] = CA_PROG_03_SIZE, +}; +__attribute__ ((section (".sa9_ca_04"))) const uint32_t ca_04_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_04_ADDRESS, + [0x0264 / 4] = CA_PROG_04_SIZE, +}; +__attribute__ ((section (".sa9_ca_05"))) const uint32_t ca_05_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_05_ADDRESS, + [0x0264 / 4] = CA_PROG_05_SIZE, +}; +__attribute__ ((section (".sa9_ca_06"))) const uint32_t ca_06_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_06_ADDRESS, + [0x0264 / 4] = CA_PROG_06_SIZE, +}; +__attribute__ ((section (".sa9_ca_07"))) const uint32_t ca_07_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_07_ADDRESS, + [0x0264 / 4] = CA_PROG_07_SIZE, +}; +__attribute__ ((section (".sa9_ca_08"))) const uint32_t ca_08_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_08_ADDRESS, + [0x0264 / 4] = CA_PROG_08_SIZE, +}; +__attribute__ ((section (".sa9_icumh"))) const uint32_t icumh_cert[2048 / 4] = { + [0x0154 / 4] = ICUMH_PROG_ADDRESS, + [0x0264 / 4] = ICUMH_PROG_DST_SIZE, +}; +__attribute__ ((section (".sa9_g4mh"))) const uint32_t g4mh_cert[2048 / 4] = { + [0x0154 / 4] = G4MH_PROG_ADDRESS, + [0x0264 / 4] = G4MH_PROG_DST_SIZE, +}; +__attribute__ ((section (".sa9_g4mh_02"))) const uint32_t g4mh_02_cert[2048 / 4] = { + [0x0154 / 4] = G4MH_PROG_02_ADDRESS, + [0x0264 / 4] = G4MH_PROG_02_DST_SIZE, +}; + +/* TFMV key(8KB) + NTFMV key(8KB) + minimum version table(4KB) */ +__attribute__ ((section (".reserved"))) const uint32_t reserved[20480 / 4] = {0}; diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld new file mode 100644 index 00000000..ce24d184 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/s4/sa9.ld @@ -0,0 +1,66 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : dummy flash data for sector 9(0x240000) linker directive + ******************************************************************************/ +DEFAULTS { + dummy_addr = 0xEB230000 + + dummy_size = 64K +} +MEMORY +{ + rt_sram : ORIGIN = dummy_addr, LENGTH = dummy_size +} +SECTIONS +{ +// +// Dummy Certificate +// + _start = dummy_addr; + .sa9_top ALIGN(1024) : > rt_sram /* Offset 0x00240000 */ + .qspi_test_data ALIGN(1024) : > . /* Offset 0x00240400 */ + .reserved ALIGN(4096) : > . + .sa9_firm ALIGN(1024) : > . /* Offset 0x00246000 */ + .sa9_rtos ALIGN(1024) : > . /* Offset 0x00246800 */ + .sa9_cx_ipl ALIGN(1024) : > . /* Offset 0x00247000 */ + .sa9_icumh ALIGN(1024) : > . /* Offset 0x00247800 */ + .sa9_g4mh ALIGN(1024) : > . /* Offset 0x00248000 */ + .sa9_g4mh_02 ALIGN(1024) : > . /* Offset 0x00248800 */ + .sa9_ca_01 ALIGN(1024) : > . /* Offset 0x00249000 */ + .sa9_ca_02 ALIGN(1024) : > . /* Offset 0x00249800 */ + .sa9_ca_03 ALIGN(1024) : > . /* Offset 0x0024A000 */ + .sa9_ca_04 ALIGN(1024) : > . /* Offset 0x0024A800 */ + .sa9_ca_05 ALIGN(1024) : > . /* Offset 0x0024B000 */ + .sa9_ca_06 ALIGN(1024) : > . /* Offset 0x0024B800 */ + .sa9_ca_07 ALIGN(1024) : > . /* Offset 0x0024C000 */ + .sa9_ca_08 ALIGN(1024) : > . /* Offset 0x0024C800 */ + + + .sdata : > . + .tdata : > . + .rosdata ALIGN(4) : > . + .sdabase ALIGN(4) : > . + .secinfo ALIGN(4) : > . +} diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/sa0.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.c diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld new file mode 100644 index 00000000..dbf3dc7f --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4h/sa9.ld @@ -0,0 +1,67 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2021-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : dummy flash data for sector 9(0x240000) linker directive + ******************************************************************************/ +DEFAULTS { + dummy_addr = 0xEB230000 + + dummy_size = 64K + +} +MEMORY +{ + rt_sram : ORIGIN = dummy_addr, LENGTH = dummy_size +} +SECTIONS +{ +// +// Dummy Certificate +// + _start = dummy_addr; + .sa9_top ALIGN(1024) : > rt_sram /* Offset 0x00240000 */ + .qspi_test_data ALIGN(1024) : > . /* Offset 0x00240400 */ + .reserved ALIGN(4096) : > . + .sa9_firm ALIGN(1024) : > . /* Offset 0x00246000 */ + .sa9_rtos ALIGN(1024) : > . /* Offset 0x00246800 */ + .sa9_cx_ipl ALIGN(1024) : > . /* Offset 0x00247000 */ + .reserved2 ALIGN(1024) : > . + .sa9_ca_01 ALIGN(1024) : > . /* Offset 0x00249000 */ + .sa9_ca_02 ALIGN(1024) : > . /* Offset 0x00249800 */ + .sa9_ca_03 ALIGN(1024) : > . /* Offset 0x0024A000 */ + .sa9_ca_04 ALIGN(1024) : > . /* Offset 0x0024A800 */ + .sa9_ca_05 ALIGN(1024) : > . /* Offset 0x0024B000 */ + .sa9_ca_06 ALIGN(1024) : > . /* Offset 0x0024B800 */ + .sa9_ca_07 ALIGN(1024) : > . /* Offset 0x0024C000 */ + .sa9_ca_08 ALIGN(1024) : > . /* Offset 0x0024C800 */ + /* 0x0024D000 - 0x0024DFFF is area for TFMV/NTFMV minimum version table certificate */ + .sa9_rtos_01 ALIGN(1024) PAD(4096) : > . /* Offset 0x0024E000 */ + .sa9_rtos_02 ALIGN(1024) : > . /* Offset 0x0024E800 */ + + .sdata : > . + .tdata : > . + .rosdata ALIGN(4) : > . + .sdabase ALIGN(4) : > . + .secinfo ALIGN(4) : > . +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c new file mode 100644 index 00000000..2aa9e4ee --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.c @@ -0,0 +1,316 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2025 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : dummy flash data for sector 9(0x240000) + ******************************************************************************/ + +#include +#include + +#define FLASH_BOOT (0U) +#define EMMC_BOOT (1U) +#define CA_IPL (0U) +#define BL31 (1U) + +#define RTOS_LOAD_NUM_1 (1U) +#define RTOS_LOAD_NUM_3 (3U) + +/* CA program load num */ +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +#define CA_IMAGE_NUM (0x00000002U) +#else +#define CA_IMAGE_NUM (0x00000003U) +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +/* Source address on flash for Secure FW */ +#define SECURE_FW_SRC_ADDRESS (0x00280000U) +/* Source address on flash for RTOS#0 */ +#define RTOS_SRC_ADDRESS (0x00000000U) +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +/* Source address on eMMC for RTOS#1 */ +#define RTOS1_SRC_ADDRESS (0x01000000U) +/* Source address on eMMC for RTOS#2 */ +#define RTOS2_SRC_ADDRESS (0x01200000U) +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +#if (CA_LOAD_TYPE == CA_IPL) +/* Source address on flash for CX IPL */ +#define CX_IPL_SRC_ADDRESS (0x00480000U) +#else +/* Reserved */ +#define CX_IPL_SRC_ADDRESS (0x00000000U) +#endif +/* ----------- customized ----------- */ +/* Source address on flash for BL31 */ +#define CA_PROG_01_SRC_ADDRESS (0x01400000U) +/* Source address on flash for U-Boot */ +#define CA_PROG_02_SRC_ADDRESS (0x01580000U) +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +/* Reserved */ +#define CA_PROG_03_SRC_ADDRESS (0x00000000U) +#else +/* Source address on flash for OP-TEE */ +#define CA_PROG_03_SRC_ADDRESS (0x01480000U) +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +/* Reserved */ +#define CA_PROG_04_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_05_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_06_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_07_SRC_ADDRESS (0x00000000U) +/* Reserved */ +#define CA_PROG_08_SRC_ADDRESS (0x00000000U) +/* ----------- customized ----------- */ + +#if (RCAR_SA9_TYPE == FLASH_BOOT) +#define SECURE_FW_PARTITION (0x00000000U) +#define CX_IPL_PARTITION (0x00000000U) + #if (CA_LOAD_TYPE == CA_IPL) +#define RTOS_PARTITION (0x00000001U) +#define CA_PROG_01_PARTITION (0x00000001U) +#define CA_PROG_02_PARTITION (0x00000001U) + #if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +#define CA_PROG_03_PARTITION (0x00000000U) + #else +#define CA_PROG_03_PARTITION (0x00000001U) + #endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +#define CA_PROG_04_PARTITION (0x00000000U) +#define CA_PROG_05_PARTITION (0x00000000U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) + #if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +#define RTOS1_PARTITION (0x00000001U) +#define RTOS2_PARTITION (0x00000001U) + #endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + #else /* #if (CA_LOAD_TYPE == CA_IPL) */ +#define RTOS_PARTITION (0x00000000U) +#define CA_PROG_01_PARTITION (0x00000000U) +#define CA_PROG_02_PARTITION (0x00000000U) +#define CA_PROG_03_PARTITION (0x00000000U) +#define CA_PROG_04_PARTITION (0x00000000U) +#define CA_PROG_05_PARTITION (0x00000000U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) + #endif /* #if (CA_LOAD_TYPE == CA_IPL) */ +#else /* #if (RCAR_SA9_TYPE == FLASH_BOOT) */ +#define SECURE_FW_PARTITION (0x00000001U) +#define RTOS_PARTITION (0x00000001U) +#define CX_IPL_PARTITION (0x00000001U) +#define CA_PROG_01_PARTITION (0x00000001U) +#define CA_PROG_02_PARTITION (0x00000001U) + #if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +#define CA_PROG_03_PARTITION (0x00000000U) + #else +#define CA_PROG_03_PARTITION (0x00000001U) + #endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +#define CA_PROG_04_PARTITION (0x00000000U) +#define CA_PROG_05_PARTITION (0x00000000U) +#define CA_PROG_06_PARTITION (0x00000000U) +#define CA_PROG_07_PARTITION (0x00000000U) +#define CA_PROG_08_PARTITION (0x00000000U) +#endif + +#if (RCAR_SA9_TYPE != EMMC_BOOT) +/* Test data for QSPI DDR mode */ +#define QSPI_TESTDATA (0x5A5AA5A5U) +#else +#define QSPI_TESTDATA (0x00000000U) +#endif /* (RCAR_SA9_TYPE == FLASH_BOOT) */ + +/* Destination address for Secure FW */ +#define SECURE_FW_ADDRESS (0xEB240000U) +#define SECURE_FW_ADDRESSH (0x00000000U) +/* Destination size for Secure FW */ +#define SECURE_FW_DST_SIZE (0x00028000U) /* 640KiB / 4 */ +/* Destination address for RTOS#0 */ +#define RTOS_ADDRESS (0xE2100000U) +#define RTOS_ADDRESSH (0x00000000U) +/* Destination size for RTOS#0 */ +#define RTOS_DST_SIZE (0x00400000U) /* 16MiB / 4 */ +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +/* Destination address for RTOS#1 */ +#define RTOS1_ADDRESS (0xE3100000U) +#define RTOS1_ADDRESSH (0x00000000U) +/* Destination size for RTOS#1 */ +#define RTOS1_DST_SIZE (0x00080000U) /* 2MiB / 4 */ +/* Destination address for RTOS#2 */ +#define RTOS2_ADDRESS (0xE2000000U) +#define RTOS2_ADDRESSH (0x00000000U) +/* Destination size for RTOS#2 */ +#define RTOS2_DST_SIZE (0x00004000U) /* 64KiB / 4 */ +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +#if (CA_LOAD_TYPE == CA_IPL) +/* Destination address for CA Loader */ +#define CX_IPL_ADDRESS (0xE6300000U) +#define CX_UPL_ADDRESSH (0x00000000U) +/* Destination size for CA Loader */ +#define CX_IPL_SIZE (0x0000C000U) /* 192KiB / 4 */ +#else +/* CX IPL Reserved */ +#define CX_IPL_ADDRESS (0x00000000U) +#define CX_UPL_ADDRESSH (0x00000000U) +#define CX_IPL_SIZE (0x00000000U) +#endif +/* ----------- customized ----------- */ +/* Destination address for BL31 */ +#define CA_PROG_01_ADDRESS (0x46400000U) +#define CA_PROG_01_ADDRESSH (0x00000000U) +#define CA_PROG_01_SIZE (0x00008800U) /* 136KiB / 4 */ +/* Destination address for U-Boot */ +#define CA_PROG_02_ADDRESS (0x50000000U) +#define CA_PROG_02_ADDRESSH (0x00000000U) +#define CA_PROG_02_SIZE (0x00080000U) /* 2MiB / 4 */ +#if (OPTEE_LOAD_ENABLE == OPTEE_DISABLE) +/* Reserved */ +#define CA_PROG_03_ADDRESS (0x00000000U) +#define CA_PROG_03_ADDRESSH (0x00000000U) +#define CA_PROG_03_SIZE (0x00000000U) +#else +/* Destination address for OP-TEE */ +#define CA_PROG_03_ADDRESS (0x44100000U) +#define CA_PROG_03_ADDRESSH (0x00000000U) +#define CA_PROG_03_SIZE (0x00040000U) /* 1MiB / 4 */ +#endif /* OPTEE_LOAD_ENABLE == OPTEE_DISABLE */ +/* Reserved */ +#define CA_PROG_04_ADDRESS (0x00000000U) +#define CA_PROG_04_ADDRESSH (0x00000000U) +#define CA_PROG_04_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_05_ADDRESS (0x00000000U) +#define CA_PROG_05_ADDRESSH (0x00000000U) +#define CA_PROG_05_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_06_ADDRESS (0x00000000U) +#define CA_PROG_06_ADDRESSH (0x00000000U) +#define CA_PROG_06_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_07_ADDRESS (0x00000000U) +#define CA_PROG_07_ADDRESSH (0x00000000U) +#define CA_PROG_07_SIZE (0x00000000U) +/* Reserved */ +#define CA_PROG_08_ADDRESS (0x00000000U) +#define CA_PROG_08_ADDRESSH (0x00000000U) +#define CA_PROG_08_SIZE (0x00000000U) +/* ----------- customized ----------- */ + +/* sa9 */ +__attribute__ ((section (".sa9_top"))) const uint32_t top_cert[1024 / 4] = { + [0x0000 / 4] = CA_IMAGE_NUM, + [0x0008 / 4] = SECURE_FW_SRC_ADDRESS, + [0x0010 / 4] = SECURE_FW_PARTITION, + [0x0018 / 4] = RTOS_SRC_ADDRESS, + [0x0020 / 4] = RTOS_PARTITION, + [0x0028 / 4] = CX_IPL_SRC_ADDRESS, + [0x0030 / 4] = CX_IPL_PARTITION, + [0x0068 / 4] = CA_PROG_01_SRC_ADDRESS, + [0x0070 / 4] = CA_PROG_01_PARTITION, + [0x0078 / 4] = CA_PROG_02_SRC_ADDRESS, + [0x0080 / 4] = CA_PROG_02_PARTITION, + [0x0088 / 4] = CA_PROG_03_SRC_ADDRESS, + [0x0090 / 4] = CA_PROG_03_PARTITION, + [0x0098 / 4] = CA_PROG_04_SRC_ADDRESS, + [0x00A0 / 4] = CA_PROG_04_PARTITION, + [0x00A8 / 4] = CA_PROG_05_SRC_ADDRESS, + [0x00B0 / 4] = CA_PROG_05_PARTITION, + [0x00B8 / 4] = CA_PROG_06_SRC_ADDRESS, + [0x00C0 / 4] = CA_PROG_06_PARTITION, + [0x00C8 / 4] = CA_PROG_07_SRC_ADDRESS, + [0x00D0 / 4] = CA_PROG_07_PARTITION, + [0x00D8 / 4] = CA_PROG_08_SRC_ADDRESS, + [0x00E0 / 4] = CA_PROG_08_PARTITION, +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) + [0x0108 / 4] = RTOS1_SRC_ADDRESS, + [0x0110 / 4] = RTOS1_PARTITION, + [0x0118 / 4] = RTOS2_SRC_ADDRESS, + [0x0120 / 4] = RTOS2_PARTITION, +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ +}; +__attribute__ ((section (".qspi_test_data"))) const uint32_t test_data[1] = { + QSPI_TESTDATA +}; +__attribute__ ((section (".sa9_firm"))) const uint32_t firm_cert[2048 / 4] = { + [0x0154 / 4] = SECURE_FW_ADDRESS, + [0x0264 / 4] = SECURE_FW_DST_SIZE, +}; +__attribute__ ((section (".sa9_rtos"))) const uint32_t rtos_cert[2048 / 4] = { + [0x0154 / 4] = RTOS_ADDRESS, + [0x0264 / 4] = RTOS_DST_SIZE, +}; +__attribute__ ((section (".sa9_cx_ipl"))) const uint32_t cx_ipl_cert[2048 / 4] = { + [0x0154 / 4] = CX_IPL_ADDRESS, + [0x0264 / 4] = CX_IPL_SIZE, +}; +__attribute__ ((section (".sa9_ca_01"))) const uint32_t ca_01_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_01_ADDRESS, + [0x0264 / 4] = CA_PROG_01_SIZE, +}; + +__attribute__ ((section (".sa9_ca_02"))) const uint32_t ca_02_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_02_ADDRESS, + [0x0264 / 4] = CA_PROG_02_SIZE, +}; +__attribute__ ((section (".sa9_ca_03"))) const uint32_t ca_03_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_03_ADDRESS, + [0x0264 / 4] = CA_PROG_03_SIZE, +}; +__attribute__ ((section (".sa9_ca_04"))) const uint32_t ca_04_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_04_ADDRESS, + [0x0264 / 4] = CA_PROG_04_SIZE, +}; +__attribute__ ((section (".sa9_ca_05"))) const uint32_t ca_05_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_05_ADDRESS, + [0x0264 / 4] = CA_PROG_05_SIZE, +}; +__attribute__ ((section (".sa9_ca_06"))) const uint32_t ca_06_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_06_ADDRESS, + [0x0264 / 4] = CA_PROG_06_SIZE, +}; +__attribute__ ((section (".sa9_ca_07"))) const uint32_t ca_07_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_07_ADDRESS, + [0x0264 / 4] = CA_PROG_07_SIZE, +}; +__attribute__ ((section (".sa9_ca_08"))) const uint32_t ca_08_cert[2048 / 4] = { + [0x0154 / 4] = CA_PROG_08_ADDRESS, + [0x0264 / 4] = CA_PROG_08_SIZE, +}; + +#if (RTOS_LOAD_NUM == RTOS_LOAD_NUM_3) +__attribute__ ((section (".sa9_rtos_01"))) const uint32_t rtos1_cert[2048 / 4] = { + [0x0154 / 4] = RTOS1_ADDRESS, + [0x0264 / 4] = RTOS1_DST_SIZE, +}; +__attribute__ ((section (".sa9_rtos_02"))) const uint32_t rtos2_cert[2048 / 4] = { + [0x0154 / 4] = RTOS2_ADDRESS, + [0x0264 / 4] = RTOS2_DST_SIZE, +}; +#endif /* RTOS_LOAD_NUM == RTOS_LOAD_NUM_3 */ + +/* TFMV key(8KB) + NTFMV key(8KB) + minimum version table(4KB) */ +__attribute__ ((section (".reserved"))) const uint32_t reserved[20480 / 4] = {0}; +/* G4MH cert * 2 + ICUMH Cert */ +__attribute__ ((section (".reserved2"))) const uint32_t reserved2[6144 / 4] = {0}; diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld new file mode 100644 index 00000000..11c8421e --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/dummy_create/v4m/sa9.ld @@ -0,0 +1,68 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2023-2024 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : dummy flash data for sector 9(0x240000) linker directive + ******************************************************************************/ +DEFAULTS { + dummy_addr = 0xEB230000 + + dummy_size = 64K + +} +MEMORY +{ + rt_sram : ORIGIN = dummy_addr, LENGTH = dummy_size +} +SECTIONS +{ +// +// Dummy Certificate +// + _start = dummy_addr; + .sa9_top ALIGN(1024) : > rt_sram /* Offset 0x00240000 */ + .qspi_test_data ALIGN(1024) : > . /* Offset 0x00240400 */ + .reserved ALIGN(4096) : > . + .sa9_firm ALIGN(1024) : > . /* Offset 0x00246000 */ + .sa9_rtos ALIGN(1024) : > . /* Offset 0x00246800 */ + .sa9_cx_ipl ALIGN(1024) : > . /* Offset 0x00247000 */ + .reserved2 ALIGN(1024) : > . + .sa9_ca_01 ALIGN(1024) : > . /* Offset 0x00249000 */ + .sa9_ca_02 ALIGN(1024) : > . /* Offset 0x00249800 */ + .sa9_ca_03 ALIGN(1024) : > . /* Offset 0x0024A000 */ + .sa9_ca_04 ALIGN(1024) : > . /* Offset 0x0024A800 */ + .sa9_ca_05 ALIGN(1024) : > . /* Offset 0x0024B000 */ + .sa9_ca_06 ALIGN(1024) : > . /* Offset 0x0024B800 */ + .sa9_ca_07 ALIGN(1024) : > . /* Offset 0x0024C000 */ + .sa9_ca_08 ALIGN(1024) : > . /* Offset 0x0024C800 */ + /* 0x0024D000 - 0x0024DFFF is area for TFMV/NTFMV minimum version table certificate */ + .sa9_rtos_01 ALIGN(1024) PAD(4096) : > . /* Offset 0x0024E000 */ + .sa9_rtos_02 ALIGN(1024) : > . /* Offset 0x0024E800 */ + + + .sdata : > . + .tdata : > . + .rosdata ALIGN(4) : > . + .sdabase ALIGN(4) : > . + .secinfo ALIGN(4) : > . +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c new file mode 100644 index 00000000..4f50da64 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.c @@ -0,0 +1,111 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022-2023 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : NTFMV Software minimum version table + ******************************************************************************/ +/****************************************************************************** + * @file ntfmv_ver_tbl.c + * - Version : 0.02 + * @brief NTFMV Software minimum version table. + * This is sample source code. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 05.08.2022 0.01 First Release + * : 21.08.2023 0.02 Add support for V4M. + *****************************************************************************/ + +#include + +#if ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) +/* Minimum software version of U-Boot(V4H) */ +#define CA_PROG_02_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_02_SW_VERSION (0x00000000U) +#define CA_PROG_02_VER_OFFSET (0x00000000U) +#else /* ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) */ +/* Reserved */ +#define CA_PROG_02_CHECK_FLAG (0x00000000U) +#define CA_PROG_02_SW_VERSION (0x00000000U) +#define CA_PROG_02_VER_OFFSET (0x00000000U) +#endif /* ((RCAR_LSI == RCAR_V4H) || (RCAR_LSI == RCAR_V4M)) */ + +/* Minimum software version of U-Boot(S4) */ +#define CA_PROG_03_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_03_SW_VERSION (0x00000000U) +#define CA_PROG_03_VER_OFFSET (0x00000000U) + +/* Reserved */ +#define CA_PROG_04_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_04_SW_VERSION (0x00000000U) +#define CA_PROG_04_VER_OFFSET (0x00000000U) + +/* Reserved */ +#define CA_PROG_05_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_05_SW_VERSION (0x00000000U) +#define CA_PROG_05_VER_OFFSET (0x00000000U) + +/* Reserved */ +#define CA_PROG_06_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_06_SW_VERSION (0x00000000U) +#define CA_PROG_06_VER_OFFSET (0x00000000U) + +/* Reserved */ +#define CA_PROG_07_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_07_SW_VERSION (0x00000000U) +#define CA_PROG_07_VER_OFFSET (0x00000000U) + +/* Reserved */ +#define CA_PROG_08_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_08_SW_VERSION (0x00000000U) +#define CA_PROG_08_VER_OFFSET (0x00000000U) + +/* For 16-byte boundary */ +#define RESERVED_FOR_PADDING (0x00000000U) + +__attribute__ ((section (".ntfmv_tbl_top"))) const uint32_t ntfmv_ver_tbl[] = { + [0x0000 / 4] = CA_PROG_02_CHECK_FLAG, + [0x0004 / 4] = CA_PROG_02_SW_VERSION, + [0x0008 / 4] = CA_PROG_02_VER_OFFSET, + [0x0010 / 4] = CA_PROG_03_CHECK_FLAG, + [0x0014 / 4] = CA_PROG_03_SW_VERSION, + [0x0018 / 4] = CA_PROG_03_VER_OFFSET, + [0x0020 / 4] = CA_PROG_04_CHECK_FLAG, + [0x0024 / 4] = CA_PROG_04_SW_VERSION, + [0x0028 / 4] = CA_PROG_04_VER_OFFSET, + [0x0030 / 4] = CA_PROG_05_CHECK_FLAG, + [0x0034 / 4] = CA_PROG_05_SW_VERSION, + [0x0038 / 4] = CA_PROG_05_VER_OFFSET, + [0x0040 / 4] = CA_PROG_06_CHECK_FLAG, + [0x0044 / 4] = CA_PROG_06_SW_VERSION, + [0x0048 / 4] = CA_PROG_06_VER_OFFSET, + [0x0050 / 4] = CA_PROG_07_CHECK_FLAG, + [0x0054 / 4] = CA_PROG_07_SW_VERSION, + [0x0058 / 4] = CA_PROG_07_VER_OFFSET, + [0x0060 / 4] = CA_PROG_08_CHECK_FLAG, + [0x0064 / 4] = CA_PROG_08_SW_VERSION, + [0x0068 / 4] = CA_PROG_08_VER_OFFSET, + [0x006C / 4] = RESERVED_FOR_PADDING, /* Adjust to 16-byte boundary */ +}; + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld new file mode 100644 index 00000000..b6b3d77b --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/ntfmv_ver_tbl.ld @@ -0,0 +1,60 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : linker directive for NTFMV Software minimum version table + ******************************************************************************/ +/****************************************************************************** + * @file ntfmv_ver_tbl.ld + * - Version : 0.01 + * @brief linker directive for NTFMV Software minimum version table. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 05.08.2022 0.01 First Release + *****************************************************************************/ + +DEFAULTS { + tbl_base_addr = 0xEB235800 + + tbl_size = 2K +} +MEMORY +{ + rt_sram : ORIGIN = tbl_base_addr, LENGTH = tbl_size +} +SECTIONS +{ +// +// NTFMV Software minimum version table +// + _start = tbl_base_addr; + .ntfmv_tbl_top ALIGN(1024) : > rt_sram + + .sdata : > . + .tdata : > . + .rosdata ALIGN(4) : > . + .sdabase ALIGN(4) : > . + .secinfo ALIGN(4) : > . +} diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c new file mode 100644 index 00000000..699a004f --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.c @@ -0,0 +1,141 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : TFMV Software minimum version table + ******************************************************************************/ +/****************************************************************************** + * @file tfmv_ver_tbl.c + * - Version : 0.01 + * @brief TFMV Software minimum version table. + * This is sample source code. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 05.08.2022 0.01 First Release + *****************************************************************************/ + +#include + +#define CA_IPL (0U) + +/* Minimum software version of Secure FW */ +#define SECURE_FW_CHECK_FLAG (0x00000001U) /* 0:disable other:enable */ +#define SECURE_FW_SW_VERSION (0x00000001U) +#define SECURE_FW_VER_OFFSET (0x00000400U) + +/* Minimum software version of RTOS */ +#define RTOS_SW_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define RTOS_SW_SW_VERSION (0x00000000U) +#define RTOS_SW_VER_OFFSET (0x00000000U) + +#if (CA_LOAD_TYPE == CA_IPL) +/* Minimum software version of CX 2nd IPL */ +#define CX_2ND_IPL_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CX_2ND_IPL_SW_VERSION (0x00000000U) +#define CX_2ND_IPL_VER_OFFSET (0x00000000U) +#else /* (CA_LOAD_TYPE == CA_IPL) */ +/* Reserved */ +#define CX_2ND_IPL_CHECK_FLAG (0x00000000U) +#define CX_2ND_IPL_SW_VERSION (0x00000000U) +#define CX_2ND_IPL_VER_OFFSET (0x00000000U) +#endif /* (CA_LOAD_TYPE == CA_IPL) */ + +#if (RCAR_LSI == RCAR_S4) +/* Minimum software version of ICUMH program */ +#define ICUMH_PROG_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define ICUMH_PROG_SW_VERSION (0x00000000U) +#define ICUMH_PROG_VER_OFFSET (0x00000000U) + +/* Minimum software version of G4MH program(1st) */ +#define G4MH_PROG_01_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define G4MH_PROG_01_SW_VERSION (0x00000000U) +#define G4MH_PROG_01_VER_OFFSET (0x00000000U) + +/* Minimum software version of G4MH program(2nd) */ +#define G4MH_PROG_02_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define G4MH_PROG_02_SW_VERSION (0x00000000U) +#define G4MH_PROG_02_VER_OFFSET (0x00000000U) + +#else /* (RCAR_LSI == RCAR_S4) */ +/* Reserved */ +#define ICUMH_PROG_CHECK_FLAG (0x00000000U) +#define ICUMH_PROG_SW_VERSION (0x00000000U) +#define ICUMH_PROG_VER_OFFSET (0x00000000U) +#define G4MH_PROG_01_CHECK_FLAG (0x00000000U) +#define G4MH_PROG_01_SW_VERSION (0x00000000U) +#define G4MH_PROG_01_VER_OFFSET (0x00000000U) +#define G4MH_PROG_02_CHECK_FLAG (0x00000000U) +#define G4MH_PROG_02_SW_VERSION (0x00000000U) +#define G4MH_PROG_02_VER_OFFSET (0x00000000U) +#endif /* (RCAR_LSI == RCAR_S4) */ + +/* Minimum software version of BL31 */ +#define CA_PROG_01_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_01_SW_VERSION (0x00000000U) +#define CA_PROG_01_VER_OFFSET (0x00000000U) + +#if (RCAR_LSI == RCAR_S4) +/* Minimum software version of OP-TEE */ +#define CA_PROG_02_CHECK_FLAG (0x00000000U) /* 0:disable other:enable */ +#define CA_PROG_02_SW_VERSION (0x00000000U) +#define CA_PROG_02_VER_OFFSET (0x00000000U) +#else /* (RCAR_LSI == RCAR_S4) */ +/* Reserved */ +#define CA_PROG_02_CHECK_FLAG (0x00000000U) +#define CA_PROG_02_SW_VERSION (0x00000000U) +#define CA_PROG_02_VER_OFFSET (0x00000000U) +#endif /* (RCAR_LSI == RCAR_S4) */ + +/* For 16-byte boundary */ +#define RESERVED_FOR_PADDING (0x00000000U) + +__attribute__ ((section (".tfmv_tbl_top"))) const uint32_t tfmv_ver_tbl[] = { + [0x0000 / 4] = SECURE_FW_CHECK_FLAG, + [0x0004 / 4] = SECURE_FW_SW_VERSION, + [0x0008 / 4] = SECURE_FW_VER_OFFSET, + [0x0010 / 4] = RTOS_SW_CHECK_FLAG, + [0x0014 / 4] = RTOS_SW_SW_VERSION, + [0x0018 / 4] = RTOS_SW_VER_OFFSET, + [0x0020 / 4] = CX_2ND_IPL_CHECK_FLAG, + [0x0024 / 4] = CX_2ND_IPL_SW_VERSION, + [0x0028 / 4] = CX_2ND_IPL_VER_OFFSET, + [0x0030 / 4] = ICUMH_PROG_CHECK_FLAG, + [0x0034 / 4] = ICUMH_PROG_SW_VERSION, + [0x0038 / 4] = ICUMH_PROG_VER_OFFSET, + [0x0040 / 4] = G4MH_PROG_01_CHECK_FLAG, + [0x0044 / 4] = G4MH_PROG_01_SW_VERSION, + [0x0048 / 4] = G4MH_PROG_01_VER_OFFSET, + [0x0050 / 4] = G4MH_PROG_02_CHECK_FLAG, + [0x0054 / 4] = G4MH_PROG_02_SW_VERSION, + [0x0058 / 4] = G4MH_PROG_02_VER_OFFSET, + [0x0060 / 4] = CA_PROG_01_CHECK_FLAG, + [0x0064 / 4] = CA_PROG_01_SW_VERSION, + [0x0068 / 4] = CA_PROG_01_VER_OFFSET, + [0x0070 / 4] = CA_PROG_02_CHECK_FLAG, + [0x0074 / 4] = CA_PROG_02_SW_VERSION, + [0x0078 / 4] = CA_PROG_02_VER_OFFSET, + [0x007C / 4] = RESERVED_FOR_PADDING, /* Adjust to 16-byte boundary */ +}; + diff --git a/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld new file mode 100644 index 00000000..b371a602 --- /dev/null +++ b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/Gen4_ICUMX_Loader/tools/sw_min_ver_tbl/tfmv_ver_tbl.ld @@ -0,0 +1,60 @@ +/******************************************************************************* + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only + * intended for use with Renesas products. No other uses are authorized. This + * software is owned by Renesas Electronics Corporation and is protected under + * all applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT + * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE + * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. + * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS + * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE + * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR + * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE + * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software + * and to discontinue the availability of this software. By using this software, + * you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * Copyright 2022 Renesas Electronics Corporation All rights reserved. + *******************************************************************************/ + +/******************************************************************************* + * DESCRIPTION : linker directive for TFMV Software minimum version table + ******************************************************************************/ +/****************************************************************************** + * @file tfmv_ver_tbl.ld + * - Version : 0.01 + * @brief linker directive for TFMV Software minimum version table. + * . + *****************************************************************************/ +/****************************************************************************** + * History : DD.MM.YYYY Version Description + * : 05.08.2022 0.01 First Release + *****************************************************************************/ + +DEFAULTS { + tbl_base_addr = 0xEB235000 + + tbl_size = 2K +} +MEMORY +{ + rt_sram : ORIGIN = tbl_base_addr, LENGTH = tbl_size +} +SECTIONS +{ +// +// TFMV Software minimum version table +// + _start = tbl_base_addr; + .tfmv_tbl_top ALIGN(1024) : > rt_sram + + .sdata : > . + .tdata : > . + .rosdata ALIGN(4) : > . + .sdabase ALIGN(4) : > . + .secinfo ALIGN(4) : > . +} diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/Makefile b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/Makefile similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/Makefile rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/Makefile diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4h.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/cnf_tbl_v4m.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4h.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cnf_tbl/rgidcnf_tbl_v4m.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/common/log/log.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/common/log/log.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/common/log/log.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/common/log/log.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/common/log/scif.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/common/log/scif.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/common/log/scif.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/common/log/scif.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/common/string.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/common/string.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/common/string.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/common/string.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/common/timer/generic_timer.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/common/timer/generic_timer.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/common/timer/generic_timer.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/common/timer/generic_timer.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cpu_on/cpu_on.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cpu_on/cpu_on.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/cpu_on/cpu_on.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/cpu_on/cpu_on.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/image_load/image_load.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/image_load/image_load.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/image_load/image_load.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/image_load/image_load.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/access_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/access_protection.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/access_protection.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/access_protection.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/axmm_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/axmm_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/axmm_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/axmm_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/cnf_tbl.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/cnf_tbl.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/cnf_tbl.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/cnf_tbl.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/cpu_on.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/cpu_on.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/cpu_on.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/cpu_on.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_boot.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_boot.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_boot.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_boot.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_config.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_def.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_hal.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_hal.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_hal.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_hal.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_multiboot.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_multiboot.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_multiboot.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_multiboot.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_registers.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_registers.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_registers.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_registers.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_std.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_std.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_std.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/emmc_std.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/gic.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/gic.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/gic.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/gic.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/hscif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/hscif_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/hscif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/hscif_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/image_load.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/image_load.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/image_load.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/image_load.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/image_load_emmc.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/image_load_emmc.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/image_load_emmc.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/image_load_emmc.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/inline_asm.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/inline_asm.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/inline_asm.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/inline_asm.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/interrupt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/interrupt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/interrupt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/interrupt.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/ip_control.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/ip_control.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/ip_control.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/ip_control.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_main.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_main.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_main.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_main.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_main_common.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_main_common.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_main_common.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_main_common.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_mmu_table.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_mmu_table.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_mmu_table.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/loader_mmu_table.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/log.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/log.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/log.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/log.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/mem_io.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/mem_io.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/mem_io.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/mem_io.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/qos.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/qos.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/qos.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/qos.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/ram_protection.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/ram_protection.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/ram_protection.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/ram_protection.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rcar_def.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rcar_def.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rcar_def.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rcar_def.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rcar_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rcar_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rcar_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rcar_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rst_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rst_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rst_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rst_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rtvram.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rtvram.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rtvram.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rtvram.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rtvram_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rtvram_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/rtvram_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/rtvram_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/scif.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/scif.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/scif.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/scif.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/scif_register.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/scif_register.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/scif_register.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/scif_register.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/secure_boot.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/secure_boot.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/secure_boot.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/secure_boot.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/string.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/string.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/string.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/string.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/swdt.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/swdt.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/swdt.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/swdt.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/timer.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/timer.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/timer.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/timer.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/types.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/types.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/include/types.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/include/types.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/boot_init_dram.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/boot_init_dram.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/boot_init_dram.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/boot_init_dram.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/ddr.mk b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/ddr.mk similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/ddr.mk rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/ddr.mk diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/dram_sub_func.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_config.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ddr_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecc_enable_v4h.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/ecm_enable_v4h.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4h/lpddr5/init_dram_tbl_v4h_lp5.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_config.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/boot_init_dram_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ddr_regdef.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecc_enable_v4m.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/ecm_enable_v4m.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ddr/v4m/lpddr5/init_dram_tbl_v4m_lp5.h diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_boot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_boot.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_cmd.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_cmd.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_cmd.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_cmd.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_init.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_init.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_init.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_init.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_interrupt.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_mount.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_mount.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_mount.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_mount.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_multiboot.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_read.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_read.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_read.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_read.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_utility.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_utility.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_utility.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/emmc/emmc_utility.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/interrupt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/interrupt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/interrupt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/interrupt.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ip_control.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ip_control.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ip_control.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/ip_control.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/qos/qos.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/qos/qos.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/qos/qos.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/qos/qos.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/rtvram/rtvram.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/rtvram/rtvram.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/rtvram/rtvram.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/rtvram/rtvram.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/swdt/swdt.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/swdt/swdt.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/ip/swdt/swdt.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/ip/swdt/swdt.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/asm_macros.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/asm_macros.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/asm_macros.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/asm_macros.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_exceptions.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_exceptions.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_exceptions.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_exceptions.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main_common.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main_common.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main_common.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_main_common.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_mmu_table.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_mmu_table.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_mmu_table.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_mmu_table.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_s4.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4h.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.ld b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.ld similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.ld rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/loader_v4m.ld diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/stack.S b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/stack.S similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/loader/stack.S rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/loader/stack.S diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/protect/region_id/region_id.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/protect/region_id/region_id.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/protect/region_id/region_id.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/protect/region_id/region_id.c diff --git a/Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/secure/secure_boot.c b/Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/secure/secure_boot.c similarity index 100% rename from Src/0_Tool/IPL/SDK/v4h/src/V4H_Cx_Loader/secure/secure_boot.c rename to Src/0_Tool/Gen4_R-Car_IPL/SDK/v4h/src/V4H_Cx_Loader/secure/secure_boot.c