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woody
2026-06-23 08:41:48 +09:00
parent cf777cfc19
commit f11ba8a3e6
39 changed files with 1987 additions and 1500 deletions
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3
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/DaVinci_Project/Config/ECUC/MCAL_19_4_0.ecuc.arxml
View File

@@ -16,6 +16,9 @@
<ECUC-MODULE-CONFIGURATION-VALUES-REF-CONDITIONAL>
<ECUC-MODULE-CONFIGURATION-VALUES-REF DEST="ECUC-MODULE-CONFIGURATION-VALUES">/ActiveEcuC/Port</ECUC-MODULE-CONFIGURATION-VALUES-REF>
</ECUC-MODULE-CONFIGURATION-VALUES-REF-CONDITIONAL>
<ECUC-MODULE-CONFIGURATION-VALUES-REF-CONDITIONAL>
<ECUC-MODULE-CONFIGURATION-VALUES-REF DEST="ECUC-MODULE-CONFIGURATION-VALUES">/ActiveEcuC/CddIic</ECUC-MODULE-CONFIGURATION-VALUES-REF>
</ECUC-MODULE-CONFIGURATION-VALUES-REF-CONDITIONAL>
</ECUC-VALUES>
</ECUC-VALUE-COLLECTION>
</ELEMENTS>

42
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/DaVinci_Project/MCAL_19_4_0.a5134225.silent.dcusr
View File

@@ -26,10 +26,38 @@
<Setting Value="false" Name="nattable.ROW_HEADER.columnWidth.distributeRemainingSpace"/>
</Settings>
<Settings Name="com.vector.cfg.gui.danglingreference.view.DanglingReferencesView"/>
<Settings Name="com.vector.cfg.gui.gce.internal.GCETable.Renesas.EcucDefs_CddIic.Cdd.CddIicChannel">
<Setting Value="0,1,2,3,4,5,6," Name="nattable.BODY.columnIndexOrder"/>
<Setting Value="0" Name="nattable.BODY.columnWidth.defaultMinSize"/>
<Setting Value="false" Name="nattable.BODY.columnWidth.distributeRemainingSpace"/>
<Setting Value="0:20,1:130,2:110,3:167,4:189,5:117,6:154," Name="nattable.BODY.columnWidth.sizes"/>
<Setting Value="0" Name="nattable.COLUMN_HEADER.columnWidth.defaultMinSize"/>
<Setting Value="false" Name="nattable.COLUMN_HEADER.columnWidth.distributeRemainingSpace"/>
<Setting Value="0" Name="nattable.CORNER.columnWidth.defaultMinSize"/>
<Setting Value="false" Name="nattable.CORNER.columnWidth.distributeRemainingSpace"/>
<Setting Value="0" Name="nattable.ROW_HEADER.columnWidth.defaultMinSize"/>
<Setting Value="false" Name="nattable.ROW_HEADER.columnWidth.distributeRemainingSpace"/>
<Setting Value="ASC" Name="nattable.sortDirections"/>
<Setting Value="1" Name="nattable.sortIndexes"/>
</Settings>
<Settings Name="com.vector.cfg.gui.gce.internal.GCETable.Renesas.EcucDefs_CddIic.Cdd.CddIicSlave">
<Setting Value="0,1,2,3,4,5,6,7,8,9,10,11,12," Name="nattable.BODY.columnIndexOrder"/>
<Setting Value="0" Name="nattable.BODY.columnWidth.defaultMinSize"/>
<Setting Value="false" Name="nattable.BODY.columnWidth.distributeRemainingSpace"/>
<Setting Value="0:20,1:104,2:166,3:142,4:171,5:118,6:161,7:101,8:115,9:137,10:133,11:127,12:97," Name="nattable.BODY.columnWidth.sizes"/>
<Setting Value="0" Name="nattable.COLUMN_HEADER.columnWidth.defaultMinSize"/>
<Setting Value="false" Name="nattable.COLUMN_HEADER.columnWidth.distributeRemainingSpace"/>
<Setting Value="0" Name="nattable.CORNER.columnWidth.defaultMinSize"/>
<Setting Value="false" Name="nattable.CORNER.columnWidth.distributeRemainingSpace"/>
<Setting Value="0" Name="nattable.ROW_HEADER.columnWidth.defaultMinSize"/>
<Setting Value="false" Name="nattable.ROW_HEADER.columnWidth.distributeRemainingSpace"/>
<Setting Value="ASC" Name="nattable.sortDirections"/>
<Setting Value="1" Name="nattable.sortIndexes"/>
</Settings>
</Settings>
<Settings Name="com.vector.cfg.consistency.internal.executer.BackgroundValidationExecuter">
<Setting Value="273" Name="InitialBackgroundValidationExecutionTimeMs"/>
<Setting Value="rO0ABXNyABFqYXZhLnV0aWwuSGFzaE1hcAUH2sHDFmDRAwACRgAKbG9hZEZhY3RvckkACXRocmVz&#xA;aG9sZHhwP0AAAAAAAAB3CAAAABAAAAAAeA==" Name="ValidationRuleExecutionTimes"/>
<Setting Value="555" Name="InitialBackgroundValidationExecutionTimeMs"/>
<Setting Value="rO0ABXNyABFqYXZhLnV0aWwuSGFzaE1hcAUH2sHDFmDRAwACRgAKbG9hZEZhY3RvckkACXRocmVz&#xA;aG9sZHhwP0AAAAAAABh3CAAAACAAAAAOdAA9Y29tLnZlY3Rvci5jZmcudmFsaWRhdGlvbi5iYXNp&#xA;Y3J1bGVzLm1zci5pbXBsLkRlZmluaXRpb25DaGVja3NyAA5qYXZhLmxhbmcuTG9uZzuL5JDMjyPf&#xA;AgABSgAFdmFsdWV4cgAQamF2YS5sYW5nLk51bWJlcoaslR0LlOCLAgAAeHAAAAAAAgAAAHQANWNv&#xA;bS52ZWN0b3IuY2ZnLmRvbS5pby51aS52YWxpZGF0aW9ucy5EaW8uRGlvQ2hhbm5lbElkc3EAfgAD&#xA;AAAAAAgAAAB0AEtjb20udmVjdG9yLmNmZy52YWxpZGF0aW9uLmJhc2ljcnVsZXMubXNyLmltcGwu&#xA;bnVtZXJpY2FsY2hlY2suTnVtZXJpY2FsQ2hlY2tzcQB+AAMAAAAAAQAAAHQAPGNvbS52ZWN0b3Iu&#xA;Y2ZnLmRvbS5iYXNlLnVpLmRldC52YWxpZGF0aW9uLkRldEFjdGl2YXRpb25DaGVja3NxAH4AAwAA&#xA;AAAMAAAAdABVY29tLnZlY3Rvci5jZmcudmFsaWRhdGlvbi5iYXNpY3J1bGVzLm1zci5pbXBsLm11&#xA;bHRpcGxpY2l0eS5NdWx0aXBsaWNpdHlDaGVja0NvbnRhaW5lcnNxAH4AAwAAAAADAAAAdAA+Y29t&#xA;LnZlY3Rvci5jZmcuZG9tLmlvLnVpLnZhbGlkYXRpb25zLlBvcnQuUG9ydE51bWJlck9mUG9ydFBp&#xA;bnNzcQB+AAMAAAAABwAAAHQAPmNvbS52ZWN0b3IuY2ZnLmRvbS5pby51aS52YWxpZGF0aW9ucy5E&#xA;aW8uRGlvQ2hhbm5lbEdyb3VwT2Zmc2V0c3EAfgADAAAAAAcAAAB0AExjb20udmVjdG9yLmNmZy52&#xA;YWxpZGF0aW9uLmJhc2ljcnVsZXMubXNyLmltcGwucmVmZXJlbmNlY2hlY2suUmVmZXJlbmNlQ2hl&#xA;Y2syc3EAfgADAAAAAA4AAAB0AEtjb20udmVjdG9yLmNmZy52YWxpZGF0aW9uLmJhc2ljcnVsZXMu&#xA;bXNyLmltcGwuYmFzZXZhbHVlY2hlY2suQmFzZVZhbHVlQ2hlY2tzcQB+AAMAAAAAAwAAAHQAVWNv&#xA;bS52ZWN0b3IuY2ZnLnZhbGlkYXRpb24uYmFzaWNydWxlcy5tc3IuaW1wbC5tdWx0aXBsaWNpdHku&#xA;TXVsdGlwbGljaXR5Q2hlY2tQYXJhbWV0ZXJzcQB+AAMAAAAADgAAAHQAMmNvbS52ZWN0b3IuY2Zn&#xA;LmRvbS5pby51aS52YWxpZGF0aW9ucy5EaW8uRGlvUG9ydElkc3EAfgADAAAAAAgAAAB0AFBjb20u&#xA;dmVjdG9yLmNmZy52YWxpZGF0aW9uLmJhc2ljcnVsZXMubXNyLmltcGwuT3B0aW9uYWxTeW1ib2xp&#xA;Y05hbWVWYWx1ZVZhbGlkYXRvcnNxAH4AAwAAAAACAAAAdAA/Y29tLnZlY3Rvci5jZmcudmFsaWRh&#xA;dGlvbi5iYXNpY3J1bGVzLm1zci5pbXBsLk1vZHVsZVZhcmlhbnRFbnVtc3EAfgADAAAAAAMAAAB0&#xA;AE9jb20udmVjdG9yLmNmZy52YWxpZGF0aW9uLmJhc2ljcnVsZXMubXNyLmltcGwuVW5pcXVlU3lt&#xA;Ym9saWNOYW1lVmFsdWVWYWxpZGF0aW9uc3EAfgADAAAAAAQAAAB4" Name="ValidationRuleExecutionTimes"/>
</Settings>
<Settings Name="com.vector.cfg.gui.moduleimport.history">
<Settings Name="1781578218454">
@@ -58,5 +86,15 @@
<Setting Value="C:\Work\Src\Gen4_R-Car_MCAL\2_Trunk\V4H\MCAL-v4h_19.4.0.D_release\rel\modules\dio\sample_application\V4H\19_11\config\App_DIO_V4H_Sample.arxml" Name="filePath"/>
</Settings>
</Settings>
<Settings Name="1782104027719">
<Settings Name="0">
<Settings Name="0">
<Setting Value="true" Name="active"/>
<Setting Value="/ActiveEcuC/CddIic" Name="ecucPath"/>
<Setting Value="Add" Name="importMode"/>
</Settings>
<Setting Value="C:\Work\Src\Gen4_R-Car_MCAL\2_Trunk\V4H\MCAL-v4h_19.4.0.D_release\rel\modules\cddiic\sample_application\V4H\19_11\config\App_CDD_IIC_V4H_Sample.arxml" Name="filePath"/>
</Settings>
</Settings>
</Settings>
</Settings>

3
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/DaVinci_Project/MCAL_19_4_0.dpa
View File

@@ -58,6 +58,9 @@
<Splitter File=".\Config\ECUC\MCAL_19_4_0_Port_Port_ecuc.arxml">
<Module Name="Port"/>
</Splitter>
<Splitter File=".\Config\ECUC\MCAL_19_4_0_Cdd_CddIic_ecuc.arxml">
<Module Name="CddIic"/>
</Splitter>
<OwnFolderForEachSplitter>false</OwnFolderForEachSplitter>
<OwnFileForEachInstance>true</OwnFileForEachInstance>
</EcucSplitter>

2
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/common/generic/stubs/19_11/Dem/include/Dem_Cfg.h
View File

@@ -172,6 +172,8 @@
(Dem_EventIdType)2
#define DemConf_DemEventParameter_CDDIIC_E_INTERRUPT_CONTROLLER_FAILURE \
(Dem_EventIdType)3
#define DemConf_DemEventParameter_CDDIIC_E_WAIT_TIMEOUT \
(Dem_EventIdType)4
/* CDD THS DEM error handlers */
#define DemConf_DemEventParameter_CDD_THS_E_WRITEVERIFY_FAILURE \

74
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/common/generic/stubs/19_11/Dem/xml/Dem_CDD_Iic.arxml
View File

@@ -235,6 +235,80 @@
</ECUC-CONTAINER-VALUE>
</SUB-CONTAINERS>
</ECUC-CONTAINER-VALUE>
<ECUC-CONTAINER-VALUE UUID="8d468cd3-c60a-4604-9d2d-f4d83702bf36">
<SHORT-NAME>CDDIIC_E_WAIT_TIMEOUT</SHORT-NAME>
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter</DEFINITION-REF>
<PARAMETER-VALUES>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventAvailable</DEFINITION-REF>
<VALUE>false</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventId</DEFINITION-REF>
<VALUE>4</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-TEXTUAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventKind</DEFINITION-REF>
<VALUE>DEM_EVENT_KIND_BSW</VALUE>
</ECUC-TEXTUAL-PARAM-VALUE>
</PARAMETER-VALUES>
<SUB-CONTAINERS>
<ECUC-CONTAINER-VALUE UUID="5a9f44c6-ed31-4521-a627-4ce1a3acc356">
<SHORT-NAME>DemEventClass</SHORT-NAME>
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass</DEFINITION-REF>
<PARAMETER-VALUES>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemAgingAllowed</DEFINITION-REF>
<VALUE>false</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemConsiderPtoStatus</DEFINITION-REF>
<VALUE>false</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemEventPriority</DEFINITION-REF>
<VALUE>1</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemFFPrestorageSupported</DEFINITION-REF>
<VALUE>false</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
</PARAMETER-VALUES>
<REFERENCE-VALUES>
<ECUC-REFERENCE-VALUE>
<DEFINITION-REF DEST="ECUC-REFERENCE-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemOperationCycleRef</DEFINITION-REF>
<VALUE-REF DEST="ECUC-CONTAINER-VALUE">/ActiveEcuC/Dem/DemGeneral/DemOperationCycle</VALUE-REF>
</ECUC-REFERENCE-VALUE>
</REFERENCE-VALUES>
<SUB-CONTAINERS>
<ECUC-CONTAINER-VALUE UUID="2684c91b-7b1d-43fd-a6e2-a05fe6ad90bc">
<SHORT-NAME>DemDebounceAlgorithmClass</SHORT-NAME>
<DEFINITION-REF DEST="ECUC-CHOICE-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemDebounceAlgorithmClass</DEFINITION-REF>
<SUB-CONTAINERS>
<ECUC-CONTAINER-VALUE UUID="54182721-3af0-4731-9d95-9d38579c15c8">
<SHORT-NAME>DemDebounceTimeBase</SHORT-NAME>
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemDebounceAlgorithmClass/DemDebounceTimeBase</DEFINITION-REF>
<PARAMETER-VALUES>
<ECUC-TEXTUAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemDebounceAlgorithmClass/DemDebounceTimeBase/DemDebounceBehavior</DEFINITION-REF>
<VALUE>DEM_DEBOUNCE_RESET</VALUE>
</ECUC-TEXTUAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemDebounceAlgorithmClass/DemDebounceTimeBase/DemDebounceTimeFailedThreshold</DEFINITION-REF>
<VALUE>1</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter/DemEventClass/DemDebounceAlgorithmClass/DemDebounceTimeBase/DemDebounceTimePassedThreshold</DEFINITION-REF>
<VALUE>1</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
</PARAMETER-VALUES>
</ECUC-CONTAINER-VALUE>
</SUB-CONTAINERS>
</ECUC-CONTAINER-VALUE>
</SUB-CONTAINERS>
</ECUC-CONTAINER-VALUE>
</SUB-CONTAINERS>
</ECUC-CONTAINER-VALUE>
</SUB-CONTAINERS>
</ECUC-CONTAINER-VALUE>
<ECUC-CONTAINER-VALUE UUID="b863d1fb-c421-4c49-8f2f-03f102398595">

54
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/definition/19_11/V4H/R1911_CDD_IIC_V4H.arxml
View File

@@ -6,7 +6,7 @@
********************************************************************************
** COPYRIGHT **
********************************************************************************
** (c) 2021 - 2025 Renesas Electronics Corporation. All rights reserved. **
** (c) 2021 - 2026 Renesas Electronics Corporation. All rights reserved. **
********************************************************************************
** Purpose: **
** Provides the definition of the containers, sub-containers and parameters **
@@ -53,6 +53,8 @@
********************************************************************************
** Revision Control History **
********************************************************************************
** V1.0.14: 27-May-2026, Add CDDIIC_E_WAIT_TIMEOUT, CddIicWaitResetTime **
** parameter **
** V1.0.13: 26-Dec-2025, Update SYSBOLIC-NAME-VALUE and Post-Build Variant **
** Value for container CddGeneral, CddIicChannel, **
** CddIicSlave. **
@@ -150,6 +152,29 @@
<MAX>0</MAX>
<MIN>0</MIN>
</ECUC-INTEGER-PARAM-DEF>
<!-- PARAMETER DEFINITION: CddIicChannelId -->
<ECUC-INTEGER-PARAM-DEF UUID="ECUC:ed8e970c-7c7d-4132-9040-fe0c96022571">
<SHORT-NAME>CddIicWaitResetTime</SHORT-NAME>
<DESC>
<L-2 L="EN">This parameter specifies the Identifier tick of CDD IIC wait for .</L-2>
</DESC>
<RELATED-TRACE-ITEM-REF BASE="ArTrace" DEST="TRACEABLE">AR_RS_0113_FR_0013/AR_RS_0113_FR_0014/SWS_BSW_00116/SWS_BSW_00126/AR_RS_0113_FR_0062</RELATED-TRACE-ITEM-REF>
<LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
<UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
<SCOPE>LOCAL</SCOPE>
<ORIGIN>Renesas</ORIGIN>
<POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
<VALUE-CONFIG-CLASSES>
<ECUC-VALUE-CONFIGURATION-CLASS>
<CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
<CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
</ECUC-VALUE-CONFIGURATION-CLASS>
</VALUE-CONFIG-CLASSES>
<SYMBOLIC-NAME-VALUE>true</SYMBOLIC-NAME-VALUE>
<DEFAULT-VALUE>1000000</DEFAULT-VALUE>
<MAX>4294967295</MAX>
<MIN>0</MIN>
</ECUC-INTEGER-PARAM-DEF>
<!-- PARAMETER DEFINITION: CddIicDevErrorDetect -->
<ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:872a7525-18c5-4057-b7b5-da30dd48607b">
<SHORT-NAME>CddIicDevErrorDetect</SHORT-NAME>
@@ -1139,6 +1164,33 @@
<REQUIRES-SYMBOLIC-NAME-VALUE>true</REQUIRES-SYMBOLIC-NAME-VALUE>
<DESTINATION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter</DESTINATION-REF>
</ECUC-REFERENCE-DEF>
<!-- Reference Definition: CDDIIC_E_WRITE_VERIFY -->
<ECUC-REFERENCE-DEF UUID="ECUC:5420fc30-ee29-4c55-9434-6da00d643e85">
<SHORT-NAME>CDDIIC_E_WAIT_TIMEOUT</SHORT-NAME>
<DESC>
<L-2 L="EN">This parameter specifies reference to DEM Event to be report when CDD IIC fails reset HW.</L-2>
</DESC>
<RELATED-TRACE-ITEM-REF BASE="ArTrace" DEST="TRACEABLE">AR_RS_0113_FR_0011</RELATED-TRACE-ITEM-REF>
<LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
<UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
<MULTIPLICITY-CONFIG-CLASSES>
<ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
<CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
<CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
</ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
</MULTIPLICITY-CONFIG-CLASSES>
<ORIGIN>Renesas</ORIGIN>
<POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
<POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
<VALUE-CONFIG-CLASSES>
<ECUC-VALUE-CONFIGURATION-CLASS>
<CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
<CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
</ECUC-VALUE-CONFIGURATION-CLASS>
</VALUE-CONFIG-CLASSES>
<REQUIRES-SYMBOLIC-NAME-VALUE>true</REQUIRES-SYMBOLIC-NAME-VALUE>
<DESTINATION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter</DESTINATION-REF>
</ECUC-REFERENCE-DEF>
<!-- Reference Definition: CDDIIC_E_NON_ACKNOWLEDGEMENT -->
<ECUC-REFERENCE-DEF UUID="ECUC:cbcb673d-5362-4a96-b806-5a03cdda68e6">
<SHORT-NAME>CDDIIC_E_NON_ACKNOWLEDGEMENT</SHORT-NAME>

2
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/description/V4H/R1911_CDD_IIC_V4H_BSWMD.arxml
View File

@@ -152,7 +152,7 @@
</MEMORY-SECTION>
</MEMORY-SECTIONS>
</RESOURCE-CONSUMPTION>
<SW-VERSION>1.1.0</SW-VERSION>
<SW-VERSION>1.1.1</SW-VERSION>
<VENDOR-ID>59</VENDOR-ID>
<AR-RELEASE-VERSION>4.5.0</AR-RELEASE-VERSION>
<BEHAVIOR-REF DEST="BSW-INTERNAL-BEHAVIOR">/Renesas/BswModuleDescriptions_CddIic/CddIic/CddIicInternalBehavior_0</BEHAVIOR-REF>

2
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/description/V4H/R1911_CDD_IIC_V4H_SWCD.arxml
View File

@@ -1238,7 +1238,7 @@
<RESOURCE-CONSUMPTION UUID="c4eb1182-c360-4fde-be3c-b165927cb634">
<SHORT-NAME>Resources</SHORT-NAME>
</RESOURCE-CONSUMPTION>
<SW-VERSION>2.0.0</SW-VERSION>
<SW-VERSION>1.1.1</SW-VERSION>
<VENDOR-ID>59</VENDOR-ID>
<BEHAVIOR-REF DEST="SWC-INTERNAL-BEHAVIOR">/Renesas/SwcDescription/CddIic/IB_CDDIic</BEHAVIOR-REF>
</SWC-IMPLEMENTATION>

5
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/generator/V4H/R1911_CDD_IIC_V4H_BSWMDT.arxml
View File

@@ -6,7 +6,7 @@
********************************************************************************
** COPYRIGHT **
********************************************************************************
** (c) 2021-2025 Renesas Electronics Corporation. All rights reserved. **
** (c) 2021-2026 Renesas Electronics Corporation. All rights reserved. **
********************************************************************************
** Purpose: **
** Provides the BSW module description of IIC Complex Device Driver **
@@ -53,6 +53,7 @@
********************************************************************************
** Revision Control History **
********************************************************************************
** V1.1.1: 14-May-2026 Increase software version to 1.1.1 **
** V1.1.0: 26-Dec-2025 Increase software version to 1.1.0 **
** Add function CddIic_ChnReadDMA (n = 0...6) **
** V1.0.12: 15-Mar-2023 Increase software version 1.0.12 **
@@ -152,7 +153,7 @@
</MEMORY-SECTION>
</MEMORY-SECTIONS>
</RESOURCE-CONSUMPTION>
<SW-VERSION>1.1.0</SW-VERSION>
<SW-VERSION>1.1.1</SW-VERSION>
<VENDOR-ID>59</VENDOR-ID>
<AR-RELEASE-VERSION>4.5.0</AR-RELEASE-VERSION>
<BEHAVIOR-REF DEST="BSW-INTERNAL-BEHAVIOR">/Renesas/BswModuleDescriptions_CddIic/CddIic/CddIicInternalBehavior_0</BEHAVIOR-REF>

5
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/include/CDD_Iic.h
View File

@@ -4,7 +4,7 @@
/*============================================================================*/
/* COPYRIGHT */
/*============================================================================*/
/* Copyright(c) 2021 - 2025 Renesas Electronics Corporation */
/* Copyright(c) 2021 - 2026 Renesas Electronics Corporation */
/*============================================================================*/
/* Purpose: */
/* Provision of external declaration of APIs and Service IDs. */
@@ -49,6 +49,7 @@
/* Devices: R-Car V4H */
/*============================================================================*/
/*
* 1.1.1 14-May-2026 Update File Copyright, add software version
* 1.1.0 26-Dec-2025 Update File Copyright, add software version
* in header of file.
* 1.0.13 25-Aug-2025 Update software version
@@ -121,7 +122,7 @@
/* Software version information */
#define CDDIIC_SW_MAJOR_VERSION 1U
#define CDDIIC_SW_MINOR_VERSION 1U
#define CDDIIC_SW_PATCH_VERSION 0U
#define CDDIIC_SW_PATCH_VERSION 1U
/*******************************************************************************
** MISRA C Rule Violations **

2
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/include/CDD_Iic_PBTypes.h
View File

@@ -417,6 +417,8 @@ typedef struct STag_CddIic_ChannelConfigType
extern CONST(CddIic_ChannelConfigType, CDDIIC_CONST) \
CddIic_GaaChannelConfig[CDDIIC_TOTAL_CHANNELS_CONFIG];
extern CONST(uint8, CDDIIC_CONST) \
CddIic_GaaSwHwChMapping[CDDIIC_TOTAL_CHANNELS_CONFIG];
#if (CDDIIC_TOTAL_SLAVES_CONFIG != CDDIIC_ZERO_SLAVE_CONFIG)

1
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/include/CDD_Iic_Ram.h
View File

@@ -136,6 +136,7 @@
typedef enum ETag_CddIic_ChStaType
{
CDDIIC_CH_IDLE,
CDDIIC_CH_AL_RESET,
CDDIIC_CH_CONFIGURE,
CDDIIC_CH_SENDING,
CDDIIC_CH_RECEIVING

9
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/include/CDD_Iic_Types.h
View File

@@ -162,6 +162,7 @@
#define CDDIIC_ZERO_32 0x00000000UL
#define CDDIIC_ZERO_8 (uint8) 0x00U
#define CDDIIC_ONE_32 0x00000001UL
#define CDDIIC_EIGHTTEEN_32 0x00000012UL
#define CDDIIC_TWO_32 0x00000002UL
#define CDDIIC_THREE_32 0x00000003UL
#define CDDIIC_TWENTY_32 0x00000014UL
@@ -176,7 +177,15 @@
#define CDDIIC_MDEE_BIT 0x00000008UL
#define CDDIIC_MNRE_BIT 0x00000040UL
#define CDDIIC_MSTE_BIT 0x00000010UL
#define CDDIIC_ICMSR_FULL_FLAG_MASK 0x0000007FUL
#define MSTPCR5_IIC (uint32) (0xE6152D14UL)
#define MSTPSR_IIC (uint32) (0xE6152E14UL)
#define CPGWPR_IIC (uint32) (0xE6150000UL)
#define SRCR5_IIC (uint32) 0xE6152C14UL
/* Software reset clearing register 5 */
#define SRSTCLR_IIC (uint32) 0xE6152C94UL
/* Slave control/interrupt bit definition */
#define CDDIIC_SIE_BIT 0x00000004UL
#define CDDIIC_GCAE_BIT 0x00000002UL

18
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/include/IIC/CDD_Iic_Internal.h
View File

@@ -191,6 +191,24 @@ extern FUNC(Std_ReturnType , CDDIIC_CODE_SLOW) CddIic_ClockConfiguration
);
/* END Msg(2:3432)-1 */
/* MISRA Violation: START Msg(2:3432)-1 */
extern FUNC(Std_ReturnType , CDDIIC_CODE_SLOW) CddIic_HwReset
(
VAR(CddIic_ChannelType, AUTOMATIC) LddChannel,
VAR (uint8, AUTOMATIC) LucServiceId,
VAR (uint32,AUTOMATIC) LuldelayTime
);
/* END Msg(2:3432)-1 */
/* MISRA Violation: START Msg(2:3432)-1 */
extern FUNC(void, CDDIIC_CODE_SLOW) CddIic_HWClearStatusOneWrite
(
P2VAR(uint32, AUTOMATIC, REGSPACE) LpRegAdress,
VAR(uint32, AUTOMATIC) LulStatusMask
);
/* END Msg(2:3432)-1 */
/* MISRA Violation: START Msg(2:3432)-1 */
extern FUNC(Std_ReturnType, CDDIIC_CODE_SLOW) CddIic_ReadDMA
(

64
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/sample_application/V4H/19_11/config/App_CDD_IIC_V4H_Sample.arxml
View File

@@ -57,6 +57,10 @@
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicVersionCheckExternalModules</DEFINITION-REF>
<VALUE>true</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicWaitResetTime</DEFINITION-REF>
<VALUE>50000</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
</PARAMETER-VALUES>
</ECUC-CONTAINER-VALUE>
<ECUC-CONTAINER-VALUE UUID="3cf5c4f6-3df7-4eb1-93bf-4d457d65006e">
@@ -226,7 +230,7 @@
</PARAMETER-VALUES>
</ECUC-CONTAINER-VALUE>
<ECUC-CONTAINER-VALUE UUID="c663003f-c4bc-4380-b1e0-714403090cc9">
<SHORT-NAME>CddIicSlave</SHORT-NAME>
<SHORT-NAME>CddIicSlave0_PMIC_Regulation</SHORT-NAME>
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave</DEFINITION-REF>
<PARAMETER-VALUES>
<ECUC-NUMERICAL-PARAM-VALUE>
@@ -239,15 +243,15 @@
</ECUC-TEXTUAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSclHighPeriod</DEFINITION-REF>
<VALUE>1.17</VALUE>
<VALUE>0.6</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSclLowPeriod</DEFINITION-REF>
<VALUE>1.3</VALUE>
<VALUE>0.5</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicClockFrequency</DEFINITION-REF>
<VALUE>900000</VALUE>
<VALUE>500000</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicRisingTime</DEFINITION-REF>
@@ -263,7 +267,57 @@
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSlaveAddress</DEFINITION-REF>
<VALUE>61</VALUE>
<VALUE>84</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-TEXTUAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicAddressModeSelect</DEFINITION-REF>
<VALUE>SEVEN_BIT_ADDR</VALUE>
</ECUC-TEXTUAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicFirstBitSetupCycle</DEFINITION-REF>
<VALUE>15</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
</PARAMETER-VALUES>
</ECUC-CONTAINER-VALUE>
<ECUC-CONTAINER-VALUE UUID="2002b1a9-8cce-4123-b5cb-04187f2da15f">
<SHORT-NAME>CddIicSlave1_PMIC_Protection</SHORT-NAME>
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave</DEFINITION-REF>
<PARAMETER-VALUES>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSlaveID</DEFINITION-REF>
<VALUE>1</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-TEXTUAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicClockModeSelection</DEFINITION-REF>
<VALUE>FIXED_DUTY</VALUE>
</ECUC-TEXTUAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSclHighPeriod</DEFINITION-REF>
<VALUE>0.6</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSclLowPeriod</DEFINITION-REF>
<VALUE>0.5</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicClockFrequency</DEFINITION-REF>
<VALUE>500000</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicRisingTime</DEFINITION-REF>
<VALUE>3</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicFallingTime</DEFINITION-REF>
<VALUE>3</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-FLOAT-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicIntDelay</DEFINITION-REF>
<VALUE>50</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-NUMERICAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSlaveAddress</DEFINITION-REF>
<VALUE>85</VALUE>
</ECUC-NUMERICAL-PARAM-VALUE>
<ECUC-TEXTUAL-PARAM-VALUE>
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicAddressModeSelect</DEFINITION-REF>

1
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/sample_application/V4H/include/arm/App_CDD_IIC_V4H_Sample.h
View File

@@ -104,7 +104,6 @@ extern void Tmu_Start(void);
extern void main_enable_cache(void);
extern void CddIccom_disable_CPG_protection(void);
extern void Dma_Init(void);
extern void IIC_Reset(void);
#endif /* APP_IIC_DEVICE_SAMPLE_H */
/*******************************************************************************

11
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/sample_application/V4H/src/arm/App_CDD_IIC_V4H_Sample.c
View File

@@ -222,17 +222,6 @@ void Interrupt_Init(void)
cpuirq_enable();
}
void IIC_Reset(void)
{
uint32 val;
val = 0x00000000UL;
val |= (uint32)(CDDIIC_HW_CH0_RESET | CDDIIC_HW_CH1_RESET);
CPGWPR = ~val;
SRCR5 = val;
while(!((uint32)(CDDIIC_HW_CH0_RESET | CDDIIC_HW_CH1_RESET) & SRCR5));
CPGWPR = ~val;
SRSTCLR5 = val;
}
void Dma_Init(void)

4
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/sample_application/src/App_CDD_IIC_Common_Sample.c
View File

@@ -203,7 +203,7 @@ int main (void)
/* No action required */
}
}
IIC_Reset();
#if(CDDIIC_CH1_INTERFACE == CDDIIC_SLAVE_INTERFACE)
/* Initiate slave channel */
CddIic_Ch1SlaveInit(LucSlaveAddress, &LstSlaveInterface);
@@ -243,7 +243,7 @@ int main (void)
/* Rcv buffer for slave channel */
LucRxBuffer[LulCnt] = 0x00;
}
IIC_Reset();
#if(CDDIIC_CH1_INTERFACE == CDDIIC_SLAVE_INTERFACE)
/* Initiate slave channel */
CddIic_Ch1SlaveInit(LucSlaveAddress, &LstSlaveInterface);

359
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/src/CDD_Iic.c
View File

@@ -4,7 +4,7 @@
/*============================================================================*/
/* COPYRIGHT */
/*============================================================================*/
/* Copyright(c) 2021 - 2025 Renesas Electronics Corporation */
/* Copyright(c) 2021 - 2026 Renesas Electronics Corporation */
/*============================================================================*/
/* Purpose: */
/* This file contains API function implementation of CDD IIC */
@@ -48,6 +48,11 @@
/* Devices: R-Car V4H */
/*============================================================================*/
/*
* 1.0.15 14-May-2026 Add function CddIic_HwReset to API:
* CddIic_ChnReadDma, CddIic_ChnRead,
* CddIic_ChnWriteRead, CddIic_ChnWrite,
* CddIic_ChnSlaveInit (n = 0...6), Add precondition
* for CddIic_ChnnoticeCallBack (n = 0...6)
* 1.0.14 07-Jan-2026 Add CddIic_ChnReadDma (n = 0...6)
* 1.0.13 26-Dec-2025 Update File Copyright, add software version
* in header of file.
@@ -494,10 +499,13 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch0Write
/* END Msg(1:1503)-6 */
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH0, LpSlaveConfig, \
CDDIIC_CH0WRITE_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH0,CDDIIC_CH0WRITE_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH0, LpSlaveConfig, \
CDDIIC_CH0WRITE_SID);
}
if (RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_Write(CDDIIC_CH0, LpData, LulSndByteNumber, \
@@ -563,8 +571,13 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch0Read
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH0, LpSlaveConfig, \
CDDIIC_CH0READ_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH0,CDDIIC_CH0READ_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH0, LpSlaveConfig, \
CDDIIC_CH0READ_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -635,8 +648,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch0ReadDMA
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH0, LpSlaveConfig, \
CDDIIC_CH0READDMA_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH0,CDDIIC_CH0READDMA_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH0, LpSlaveConfig, \
CDDIIC_CH0READDMA_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -720,9 +739,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch0WriteRead
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
/* Clock configuration */
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH0, LpSlaveConfig, \
CDDIIC_CH0WRITEREAD_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH0,CDDIIC_CH0WRITEREAD_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH0, LpSlaveConfig, \
CDDIIC_CH0WRITEREAD_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -801,8 +825,12 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch0SlaveInit
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH0, LucSlaveOwnAdress, \
LpSlaveInterface);
LddRetVal = CddIic_HwReset(CDDIIC_CH0,CDDIIC_CH0SLAVEINIT_SID + CDDIIC_CH0, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH0, LucSlaveOwnAdress, \
LpSlaveInterface);
}
return LddRetVal;
@@ -845,6 +873,7 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch0SlaveInit
** Reference ID : CDDIIC_DUD_ACT_003
**
*******************************************************************************/
#if (CDDIIC_CH0_NOTIFICATION == STD_ON)
#define CddIic_START_SEC_CODE
/* MISRA Violation: START Msg(4:5087)-3 */
#include "CddIic_MemMap.h"
@@ -869,6 +898,7 @@ FUNC(void, CddIic_CODE) CddIic_Ch0NoticeCallBack
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-3 */
#endif
#endif
/*******************************************************************************
** Function Name : CddIic_Ch1Write
**
@@ -919,8 +949,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch1Write
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH1, LpSlaveConfig, \
CDDIIC_CH1WRITE_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH1,CDDIIC_CH1WRITE_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH1, LpSlaveConfig, \
CDDIIC_CH1WRITE_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -986,9 +1022,12 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch1Read
/* END Msg(1:1503)-6 */
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH1, LpSlaveConfig, \
CDDIIC_CH1READ_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH1,CDDIIC_CH1READ_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH1, LpSlaveConfig, \
CDDIIC_CH1READ_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1058,8 +1097,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch1ReadDMA
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH1, LpSlaveConfig, \
CDDIIC_CH1READDMA_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH1,CDDIIC_CH1READDMA_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH1, LpSlaveConfig, \
CDDIIC_CH1READDMA_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1142,9 +1187,13 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch1WriteRead
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
/* Clock configuration */
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH1, LpSlaveConfig, \
CDDIIC_CH1WRITEREAD_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH1,CDDIIC_CH1WRITEREAD_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH1, LpSlaveConfig, \
CDDIIC_CH1WRITEREAD_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1225,8 +1274,12 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch1SlaveInit
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH1, LucSlaveOwnAdress,\
LpSlaveInterface);
LddRetVal = CddIic_HwReset(CDDIIC_CH1,CDDIIC_CH0SLAVEINIT_SID + CDDIIC_CH1, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH1, LucSlaveOwnAdress, \
LpSlaveInterface);
}
return LddRetVal;
@@ -1269,6 +1322,7 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch1SlaveInit
** Reference ID : CDDIIC_DUD_ACT_003
**
*******************************************************************************/
#if (CDDIIC_CH1_NOTIFICATION == STD_ON)
#define CddIic_START_SEC_CODE
/* MISRA Violation: START Msg(4:5087)-3 */
#include "CddIic_MemMap.h"
@@ -1294,6 +1348,7 @@ FUNC(void, CddIic_CODE) CddIic_Ch1NoticeCallBack
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-3 */
#endif
#endif
/*******************************************************************************
** Function Name : CddIic_Ch2Write
**
@@ -1343,8 +1398,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch2Write
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH2, LpSlaveConfig, \
CDDIIC_CH2WRITE_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH2,CDDIIC_CH2WRITE_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH2, LpSlaveConfig, \
CDDIIC_CH2WRITE_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1412,8 +1473,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch2Read
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH2, LpSlaveConfig, \
CDDIIC_CH2READ_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH2,CDDIIC_CH2READ_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH2, LpSlaveConfig, \
CDDIIC_CH2READ_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1484,8 +1551,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch2ReadDMA
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH2, LpSlaveConfig, \
CDDIIC_CH2READDMA_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH2,CDDIIC_CH2READDMA_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH2, LpSlaveConfig, \
CDDIIC_CH2READDMA_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1568,9 +1641,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch2WriteRead
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
/* Clock configuration */
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH2, LpSlaveConfig, \
CDDIIC_CH2WRITEREAD_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH2,CDDIIC_CH2WRITEREAD_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH2, LpSlaveConfig, \
CDDIIC_CH2WRITEREAD_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1648,8 +1726,12 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch2SlaveInit
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH2, LucSlaveOwnAdress,\
LpSlaveInterface);
LddRetVal = CddIic_HwReset(CDDIIC_CH2,CDDIIC_CH0SLAVEINIT_SID + CDDIIC_CH2, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH2, LucSlaveOwnAdress, \
LpSlaveInterface);
}
return LddRetVal;
@@ -1691,6 +1773,7 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch2SlaveInit
** Reference ID : CDDIIC_DUD_ACT_003
**
*******************************************************************************/
#if (CDDIIC_CH2_NOTIFICATION == STD_ON)
#define CddIic_START_SEC_CODE
/* MISRA Violation: START Msg(4:5087)-3 */
#include "CddIic_MemMap.h"
@@ -1716,6 +1799,7 @@ FUNC(void, CddIic_CODE) CddIic_Ch2NoticeCallBack
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-3 */
#endif
#endif
/*******************************************************************************
** Function Name : CddIic_Ch3Write
**
@@ -1765,8 +1849,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch3Write
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH3, LpSlaveConfig, \
CDDIIC_CH3WRITE_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH3,CDDIIC_CH3WRITE_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH3, LpSlaveConfig, \
CDDIIC_CH3WRITE_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1833,8 +1923,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch3Read
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH3, LpSlaveConfig, \
CDDIIC_CH3READ_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH3,CDDIIC_CH3READ_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH3, LpSlaveConfig, \
CDDIIC_CH3READ_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1905,8 +2001,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch3ReadDMA
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH3, LpSlaveConfig, \
CDDIIC_CH3READDMA_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH3,CDDIIC_CH3READDMA_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH3, LpSlaveConfig, \
CDDIIC_CH3READDMA_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -1989,9 +2091,13 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch3WriteRead
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
/* Clock configuration */
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH3, LpSlaveConfig, \
CDDIIC_CH3WRITEREAD_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH3,CDDIIC_CH3WRITEREAD_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH3, LpSlaveConfig, \
CDDIIC_CH3WRITEREAD_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2072,8 +2178,12 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch3SlaveInit
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH3, LucSlaveOwnAdress,\
LpSlaveInterface);
LddRetVal = CddIic_HwReset(CDDIIC_CH3,CDDIIC_CH0SLAVEINIT_SID + CDDIIC_CH3, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH3, LucSlaveOwnAdress, \
LpSlaveInterface);
}
return LddRetVal;
@@ -2116,6 +2226,7 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch3SlaveInit
** Reference ID : CDDIIC_DUD_ACT_003
**
*******************************************************************************/
#if (CDDIIC_CH3_NOTIFICATION == STD_ON)
#define CddIic_START_SEC_CODE
/* MISRA Violation: START Msg(4:5087)-3 */
#include "CddIic_MemMap.h"
@@ -2141,6 +2252,7 @@ FUNC(void, CddIic_CODE) CddIic_Ch3NoticeCallBack
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-3 */
#endif
#endif
/*******************************************************************************
** Function Name : CddIic_Ch4Write
**
@@ -2190,8 +2302,14 @@ FUNC(Std_ReturnType , CDDIIC_CODE_SLOW) CddIic_Ch4Write
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH4, LpSlaveConfig, \
CDDIIC_CH4WRITE_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH4,CDDIIC_CH4WRITE_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH4, LpSlaveConfig, \
CDDIIC_CH4WRITE_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2258,8 +2376,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch4Read
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH4, LpSlaveConfig, \
CDDIIC_CH4READ_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH4,CDDIIC_CH4READ_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH4, LpSlaveConfig, \
CDDIIC_CH4READ_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2329,8 +2453,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch4ReadDMA
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH4, LpSlaveConfig, \
CDDIIC_CH4READDMA_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH4,CDDIIC_CH4READDMA_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH4, LpSlaveConfig, \
CDDIIC_CH4READDMA_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2412,9 +2542,13 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch4WriteRead
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
/* Clock configuration */
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH4, LpSlaveConfig, \
CDDIIC_CH4WRITEREAD_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH4,CDDIIC_CH4WRITEREAD_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH4, LpSlaveConfig, \
CDDIIC_CH4WRITEREAD_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2495,8 +2629,12 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch4SlaveInit
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH4, LucSlaveOwnAdress,\
LpSlaveInterface);
LddRetVal = CddIic_HwReset(CDDIIC_CH4,CDDIIC_CH0SLAVEINIT_SID + CDDIIC_CH4, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH4, LucSlaveOwnAdress, \
LpSlaveInterface);
}
return LddRetVal;
@@ -2539,6 +2677,7 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch4SlaveInit
** Reference ID : CDDIIC_DUD_ACT_003
**
*******************************************************************************/
#if (CDDIIC_CH4_NOTIFICATION == STD_ON)
#define CddIic_START_SEC_CODE
/* MISRA Violation: START Msg(4:5087)-3 */
#include "CddIic_MemMap.h"
@@ -2564,6 +2703,7 @@ FUNC(void, CddIic_CODE) CddIic_Ch4NoticeCallBack
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-3 */
#endif
#endif
/*******************************************************************************
** Function Name : CddIic_Ch5Write
@@ -2614,8 +2754,14 @@ FUNC(Std_ReturnType , CDDIIC_CODE_SLOW) CddIic_Ch5Write
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH5, LpSlaveConfig, \
CDDIIC_CH5WRITE_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH5,CDDIIC_CH5WRITE_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH5, LpSlaveConfig, \
CDDIIC_CH5WRITE_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2683,8 +2829,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch5Read
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH5, LpSlaveConfig, \
CDDIIC_CH5READ_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH5,CDDIIC_CH5READ_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH5, LpSlaveConfig, \
CDDIIC_CH5READ_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2754,8 +2906,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch5ReadDMA
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH5, LpSlaveConfig, \
CDDIIC_CH5READDMA_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH5,CDDIIC_CH5READDMA_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH5, LpSlaveConfig, \
CDDIIC_CH5READDMA_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2837,9 +2995,13 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch5WriteRead
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
/* Clock configuration */
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH5, LpSlaveConfig, \
CDDIIC_CH5WRITEREAD_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH5,CDDIIC_CH5WRITEREAD_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH5, LpSlaveConfig, \
CDDIIC_CH5WRITEREAD_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -2917,9 +3079,12 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch5SlaveInit
)
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH5, LucSlaveOwnAdress,\
LpSlaveInterface);
LddRetVal = CddIic_HwReset(CDDIIC_CH5,CDDIIC_CH0SLAVEINIT_SID + CDDIIC_CH5, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH5, LucSlaveOwnAdress,\
LpSlaveInterface);
}
return LddRetVal;
@@ -2961,6 +3126,7 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch5SlaveInit
** Reference ID : CDDIIC_DUD_ACT_003
**
*******************************************************************************/
#if (CDDIIC_CH5_NOTIFICATION == STD_ON)
#define CddIic_START_SEC_CODE
/* MISRA Violation: START Msg(4:5087)-3 */
#include "CddIic_MemMap.h"
@@ -2986,6 +3152,7 @@ FUNC(void, CddIic_CODE) CddIic_Ch5NoticeCallBack
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-3 */
#endif
#endif
/*******************************************************************************
@@ -3033,8 +3200,14 @@ FUNC(Std_ReturnType , CDDIIC_CODE_SLOW) CddIic_Ch6Write
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH6, LpSlaveConfig, \
CDDIIC_CH6WRITE_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH6,CDDIIC_CH6WRITE_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH6, LpSlaveConfig, \
CDDIIC_CH6WRITE_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -3096,8 +3269,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch6Read
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH6, LpSlaveConfig, \
CDDIIC_CH6READ_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH6,CDDIIC_CH6READ_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH6, LpSlaveConfig, \
CDDIIC_CH6READ_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -3165,8 +3344,14 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch6ReadDMA
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH6, LpSlaveConfig, \
CDDIIC_CH6READDMA_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH6,CDDIIC_CH6READDMA_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH6, LpSlaveConfig, \
CDDIIC_CH6READDMA_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -3244,9 +3429,13 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch6WriteRead
CddIic_WriteType LstWriteConfig;
CddIic_ReadType LstReadConfig;
/* Clock configuration */
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH6, LpSlaveConfig, \
CDDIIC_CH6WRITEREAD_SID);
LddRetVal = CddIic_HwReset(CDDIIC_CH6,CDDIIC_CH6WRITEREAD_SID, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_ClockConfiguration(CDDIIC_CH6, LpSlaveConfig, \
CDDIIC_CH6WRITEREAD_SID);
}
if (RTE_E_OK == LddRetVal)
{
@@ -3319,8 +3508,12 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch6SlaveInit
{
Std_ReturnType LddRetVal;
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH6, LucSlaveOwnAdress,\
LpSlaveInterface);
LddRetVal = CddIic_HwReset(CDDIIC_CH6,CDDIIC_CH0SLAVEINIT_SID + CDDIIC_CH6, CDDIIC_WAIT_RESET_TIME);
if(RTE_E_OK == LddRetVal)
{
LddRetVal = CddIic_SlaveConfiguration(CDDIIC_CH6, LucSlaveOwnAdress, \
LpSlaveInterface);
}
return LddRetVal;
@@ -3360,6 +3553,7 @@ FUNC(Std_ReturnType , CddIic_CODE) CddIic_Ch6SlaveInit
** Reference ID : CDDIIC_DUD_ACT_003
**
*******************************************************************************/
#if (CDDIIC_CH6_NOTIFICATION == STD_ON)
#define CddIic_START_SEC_CODE
#include "CddIic_MemMap.h"
@@ -3375,6 +3569,7 @@ FUNC(void, CddIic_CODE) CddIic_Ch6NoticeCallBack
#define CddIic_STOP_SEC_CODE
#include "CddIic_MemMap.h"
#endif
#endif
/*******************************************************************************
** End of File **

60
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/src/IIC/CDD_Iic_HalDriver.c
View File

@@ -48,6 +48,7 @@
/* Devices: R-Car V4H */
/*============================================================================*/
/*
* 1.0.14 14-May-2026 Add function CddIic_HWClearStatusOneWrite
* 1.0.13 26-Dec-2025 Update File Copyright, add software version
* in header of file.
* 1.0.12 15-Mar-2023 Update error message of mismatch for revision
@@ -928,6 +929,65 @@ FUNC(void, CDDIIC_CODE_SLOW) CddIic_HWClearStatus
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-6 */
/*******************************************************************************
** Function Name : CddIic_HWClearStatusOneWrite
**
** Service ID : NA
**
** Description : This sub-routine clear the interrupt status
**
** Sync/Async : Synchronous
**
** Reentrancy : Non-Reentrant
**
** Input Parameters : LddChannel, LulStatusMask
**
** InOut Parameters : None
**
** Output Parameters : None
**
** Return parameter : None
**
** Preconditions : None
**
** Global Variables Used : CddIic_GpChannelConfig
**
** Functions Invoked : None
**
** Registers Used : None
**
** Reference ID : CDDIIC_DUD_ACT_040
** Reference ID : CDDIIC_DUD_ACT_040_REG001
**
*******************************************************************************/
#define CDDIIC_START_SEC_CODE_SLOW
/* MISRA Violation: START Msg(4:5087)-6 */
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-6 */
/* MISRA Violation: START Msg(1:1532)-9 */
/* MISRA Violation: START Msg(2:3432)-10 */
/* MISRA Violation: START Msg(2:3673)-11 */
FUNC(void, CDDIIC_CODE_SLOW) CddIic_HWClearStatusOneWrite
(
P2VAR(uint32, AUTOMATIC, REGSPACE) LpRegAdress,
VAR(uint32, AUTOMATIC) LulStatusMask
)
/* END Msg(2:3673)-11 */
/* END Msg(2:3432)-10 */
/* END Msg(1:1532)-9 */
{
/* MISRA Violation: START Msg(2:2814)-3 */
*(volatile uint32 *) LpRegAdress = ~LulStatusMask & CDDIIC_ICMSR_FULL_FLAG_MASK;
/* END Msg(2:2814)-3 */
}
#define CDDIIC_STOP_SEC_CODE_SLOW
/* MISRA Violation: START Msg(4:5087)-6 */
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-6 */
/*******************************************************************************
** Function Name : CddIic_HWDmaInit
**

272
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/src/IIC/CDD_Iic_Internal.c
View File

@@ -48,6 +48,8 @@
/* Devices: R-Car V4H */
/*============================================================================*/
/*
* 1.0.15 14-May-2026 Update for CddIic_SlaveConfiguration,
* CddIic_ClockConfiguration, Add CddIic_HwReset
* 1.0.14 07-Jan-2026 Add function CddIic_ReadDMA
* Update CddIic_Read, CddIic_RxDmaConfig
* 1.0.13 26-Dec-2025 Update File Copyright, add software version
@@ -342,6 +344,59 @@
/* Reference : Look for START Msg(2:0306)-15 and */
/* END Msg(2:0306)-15 tags in the code. */
/******************************************************************************/
/* 16. QAC Warning: */
/* Message : (3:3416) Logical operation performed on expression with */
/* persistent side effects. */
/* Rule : CERTCCM EXP45, CWE-398, CWE-569, CWE-737 */
/* Justification : Logical operation accesses volatile object which is a */
/* register access. All register addresses are generated with */
/* volatile qualifier. There is no impact on the functionality*/
/* due to this conditional check for mode change. */
/* Verification : However, part of the code is verified manually and it is */
/* not having any impact. */
/* Reference : Look for START Msg(3:3416)-1 and */
/* END Msg(3:3416)-1 tags in the code. */
/******************************************************************************/
/* 17. MISRA C RULE VIOLATION: */
/* Message : (3:3415) Right hand operand of '&&' or '||' is an */
/* expression with persistent side effects */
/* Rule : MISRA C:2012 Rule-13.5, CERTCCM EXP02, CWE Rule CWE-398, */
/* CWE-768, CWE-569 */
/* Justification : Although it is a volatile object, it does not have direct */
/* access to the HW register, and there is no side effect */
/* Verification : However, part of the code is verified manually */
/* and it is not having any impact. */
/* Reference : Look for START Msg(3:3415)-19 and */
/* END Msg(3:3415)-19 tags in the code. */
/******************************************************************************/
/* 18. MISRA C RULE VIOLATION: */
/* Message : (3:3387): A full expression containing an increment (++) */
/* or decrement (--) operator should have no potential */
/* side effects other than that caused by the increment or */
/* decrement operator. */
/* Rule : MISRA C:2012 Rule-13.3 */
/* REFERENCE - ISO:C90-5.1.2.3 Program Execution */
/* Justification : An increment/decrement is created a side affect. */
/* In this case it's accessing a volatile object. */
/* This can be accepted. */
/* Verification : However, part of the code is verified manually and */
/* it is not having any impact. */
/* Reference : Look for START Msg(3:3387)-15 and */
/* END Msg(3:3387)-15 tags in the code. */
/******************************************************************************/
/* 19. QAC Warning: */
/* Message : (1:3384) Cannot identify wraparound guard for dependent */
/* unsigned arithmetic expression */
/* Rule : CERTCCM INT30 */
/* Justification : In order to effectively guard against overflow and */
/* wraparound at all stages, the expression should be split */
/* up into individual dynamic operations, with their own */
/* guards where applicable */
/* Verification : However, part of the code is verified manually */
/* and it is not having any impact. */
/* Reference : Look for START Msg(1:3384)-9 and */
/* END Msg(1:3384)-9 tags in the code. */
/******************************************************************************/
/*******************************************************************************
** Function Protorype **
*******************************************************************************/
@@ -373,6 +428,198 @@ static FUNC(void, CDDIIC_CODE_SLOW) CddIic_DmaSlaveConfig
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-4 */
/*******************************************************************************
** Function Name : CddIic_HwReset
**
** Service ID : N/A
**
** Description : This API performs HW reset for IIC Complex
** driver
**
** Sync/Async : Synchronous
**
** Reentrancy : Reentrant
**
** Input Parameters : LddChannel, LucServiceId
**
** InOut Parameters : None
**
** Output Parameters : None
**
** Return parameter : LddRetVal
**
** Preconditions : None
**
** Global Variables Used : None
**
** Functions Invoked : Det_ReportError, pEnterGlbProtect, pExitGlbProtect
**
** Registers Used : ICCCR, ICCCR2, ICFBSCR, ICMPR, ICLPR, ICHPR
**
** Reference ID : CDDIIC_DUD_ACT_009
** Reference ID : CDDIIC_DUD_ACT_009_ERR001
** Reference ID : CDDIIC_DUD_ACT_009_ERR002
** Reference ID : CDDIIC_DUD_ACT_009_GLB001
** Reference ID : CDDIIC_DUD_ACT_009_GLB002
** Reference ID : CDDIIC_DUD_ACT_009_GLB003
**
*******************************************************************************/
#define CDDIIC_START_SEC_CODE_SLOW
/* MISRA Violation: START Msg(4:5087)-4 */
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-4 */
/* MISRA Violation: START Msg(1:1532)-6 */
/* MISRA Violation: START Msg(1:1503)-11 */
/* MISRA Violation: START Msg(2:3432)-7 */
FUNC(Std_ReturnType , CDDIIC_CODE_SLOW) CddIic_HwReset
(
VAR(CddIic_ChannelType, AUTOMATIC) LddChannel,
VAR (uint8, AUTOMATIC) LucServiceId,
VAR (uint32,AUTOMATIC) LuldelayTime
)
/* END Msg(2:3432)-7 */
/* END Msg(1:1503)-11 */
/* END Msg(1:1532)-6 */
{
VAR(CddIic_ChStaType, AUTOMATIC) LenChSta;
VAR(Std_ReturnType, AUTOMATIC) LddRetVal;
VAR(uint8, AUTOMATIC) LddHWchannel;
volatile uint32 LusCount = LuldelayTime;
uint32 LddRegval;
uint32 LulRegVal = CDDIIC_ZERO_32;
/* Initialize local variables */
LddRetVal = E_OK;
/* END Msg(2:2982)-14 */
#if (CDDIIC_DEV_ERROR_DETECT == STD_ON)
/* Confirm whether driver has been initialized */
if (CDDIIC_INITIALIZED != CddIic_GblDriverStatus)
{
/* Report error to Det */
(void) Det_ReportError(CDDIIC_MODULE_ID, CDDIIC_INSTANCE_ID, \
LucServiceId, CDDIIC_E_UNINITIALIZED);
/* Return NOK error code */
LddRetVal = E_NOT_OK;
/* Confirm current channel is busy or not */
}
else
#endif
{
#if (CDDIIC_CRITICAL_SECTION_PROTECTION == STD_ON)
/* MISRA Violation: START Msg(2:2824)-2 */
/* MISRA Violation: START Msg(2:2814)-1 */
CddIic_GpChannelConfig[LddChannel].pEnterGlbProtect();
/* END Msg(2:2814)-1 */
/* END Msg(2:2824)-2 */
#endif
/* Get the current channel status */
/* MISRA Violation: START Msg(2:2824)-2 */
LenChSta = CddIic_GpChannelStatus[LddChannel].enChSta;
/* END Msg(2:2824)-2 */
/* If the current channel status is idle */
if (CDDIIC_CH_IDLE == LenChSta)
{
(void) LucServiceId;
LddHWchannel = CddIic_GaaSwHwChMapping[LddChannel];
LddRegval = (uint32)CDDIIC_ONE_32<<((uint32)(LddHWchannel)+ CDDIIC_EIGHTTEEN_32);
/* MISRA Violation: START Msg(2:0306)-1 */
/* MISRA Violation: START Msg(2:3432)-10 */
/* MISRA Violation: START Msg(1:3383)-12 */
CddIic_HWSetReg((P2VAR(uint32, AUTOMATIC, REGSPACE))CPGWPR_IIC, ~LddRegval);
/* END Msg(1:3383)-12 */
/* END Msg(2:3432)-10 */
/* END Msg(2:0306)-1 */
/* MISRA Violation: START Msg(2:0306)-1 */
/* MISRA Violation: START Msg(2:3432)-10 */
/* MISRA Violation: START Msg(1:3383)-12 */
CddIic_HWSetReg((P2VAR(uint32, AUTOMATIC, REGSPACE))SRCR5_IIC, LddRegval);
/* END Msg(1:3383)-12 */
/* END Msg(2:3432)-10 */
/* END Msg(2:0306)-1 */
/* MISRA Violation: START Msg(2:0306)-15 */
/* MISRA Violation: START Msg(2:3432)-7 */
/* MISRA Violation: START Msg(1:3383)-9 */
CddIic_HWGetReg((P2VAR(uint32, AUTOMATIC, REGSPACE))SRCR5_IIC, &LulRegVal);
/* END Msg(1:3383)-9 */
/* END Msg(2:3432)-7 */
/* END Msg(2:0306)-15 */
/* MISRA Violation: START Msg(3:3415)-19 */
/* MISRA Violation: START Msg(3:3416)-1 */
while ((((uint32)(LddRegval) & LulRegVal) != LddRegval) && (LusCount > (uint32)CDDIIC_ZERO_32))
/* END Msg(3:3415)-19 */
/* END Msg(2:3416)-1 */
{
/* MISRA-C Violation: START Msg(3:3387)-12 */
/* CERT-C Violation: START Msg(1:3384)-4 */
LusCount = LusCount - 1U;
/* END Msg(1:3384)-4 */
/* END Msg(3:3387)-12 */
/* MISRA Violation: START Msg(2:0306)-15 */
/* MISRA Violation: START Msg(2:3432)-7 */
/* MISRA Violation: START Msg(1:3383)-9 */
CddIic_HWGetReg((P2VAR(uint32, AUTOMATIC, REGSPACE))SRCR5_IIC, &LulRegVal);
/* END Msg(1:3383)-9 */
/* END Msg(2:3432)-7 */
/* END Msg(2:0306)-15 */
}
/* MISRA Violation: START Msg(2:0306)-15 */
/* MISRA Violation: START Msg(2:3432)-7 */
/* MISRA Violation: START Msg(1:3383)-9 */
CddIic_HWGetReg((P2VAR(uint32, AUTOMATIC, REGSPACE))SRCR5_IIC, &LulRegVal);
/* END Msg(1:3383)-9 */
/* END Msg(2:3432)-7 */
/* END Msg(2:0306)-15 */
if (((uint32)(LddRegval) & LulRegVal) != LddRegval)
/* END Msg(2:2814)-1 */
{
/* Report register write verify to DEM */
(void)Dem_SetEventStatus(CDDIIC_E_WAIT_TIMEOUT, DEM_EVENT_STATUS_FAILED);
/* Return the error code */
LddRetVal = E_NOT_OK;
}
/* MISRA Violation: START Msg(2:0306)-1 */
/* MISRA Violation: START Msg(2:3432)-10 */
/* MISRA Violation: START Msg(1:3383)-12 */
CddIic_HWSetReg((P2VAR(uint32, AUTOMATIC, REGSPACE))CPGWPR_IIC, ~LddRegval);
/* END Msg(1:3383)-12 */
/* END Msg(2:3432)-10 */
/* END Msg(2:0306)-1 */
/* MISRA Violation: START Msg(2:0306)-1 */
/* MISRA Violation: START Msg(2:3432)-10 */
/* MISRA Violation: START Msg(1:3383)-12 */
CddIic_HWSetReg((P2VAR(uint32, AUTOMATIC, REGSPACE))SRSTCLR_IIC, LddRegval);
/* END Msg(1:3383)-12 */
/* END Msg(2:3432)-10 */
/* END Msg(2:0306)-1 */
#if (CDDIIC_CRITICAL_SECTION_PROTECTION == STD_ON)
CddIic_GpChannelConfig[LddChannel].pExitGlbProtect();
#endif
if (CDDIIC_MASTER_IF == CddIic_GpChannelConfig[LddChannel].enInterface)
{
CddIic_GpChannelStatus[LddChannel].enChSta = CDDIIC_CH_AL_RESET;
}
}
else
{
LddRetVal = RTE_E_COM_BUSY;
#if (CDDIIC_CRITICAL_SECTION_PROTECTION == STD_ON)
CddIic_GpChannelConfig[LddChannel].pExitGlbProtect();
#endif
}
}
return LddRetVal;
}
#define CDDIIC_STOP_SEC_CODE_SLOW
/* MISRA Violation: START Msg(4:5087)-4 */
#include "CddIic_MemMap.h"
/* END Msg(4:5087)-4 */
/*******************************************************************************
** Function Name : CddIic_ClockConfiguration
**
@@ -445,19 +692,6 @@ FUNC(Std_ReturnType , CDDIIC_CODE_SLOW) CddIic_ClockConfiguration
/* END Msg(2:2982)-14 */
#if (CDDIIC_DEV_ERROR_DETECT == STD_ON)
/* Confirm whether driver has been initialized */
if (CDDIIC_INITIALIZED != CddIic_GblDriverStatus)
{
/* Report error to Det */
(void) Det_ReportError(CDDIIC_MODULE_ID, CDDIIC_INSTANCE_ID, \
LucServiceId, CDDIIC_E_UNINITIALIZED);
/* Return NOK error code */
LddRetVal = E_NOT_OK;
/* Confirm current channel is busy or not */
}
else
{
if (NULL_PTR == LpSlaveConfig)
{
@@ -487,7 +721,7 @@ FUNC(Std_ReturnType , CDDIIC_CODE_SLOW) CddIic_ClockConfiguration
LenChSta = CddIic_GpChannelStatus[LddChannel].enChSta;
/* END Msg(2:2824)-2 */
/* If the current channel status is idle */
if (CDDIIC_CH_IDLE == LenChSta)
if (CDDIIC_CH_AL_RESET == LenChSta)
{
CddIic_GpChannelStatus[LddChannel].enChSta = CDDIIC_CH_CONFIGURE;
#if (CDDIIC_CRITICAL_SECTION_PROTECTION == STD_ON)
@@ -2218,16 +2452,6 @@ FUNC(Std_ReturnType, CDDIIC_CODE_SLOW) CddIic_SlaveConfiguration
LddRetVal = RTE_E_OK;
#if (CDDIIC_DEV_ERROR_DETECT == STD_ON)
if (CDDIIC_INITIALIZED != CddIic_GblDriverStatus)
{
/* Report error to Det when driver is uninitialized */
(void) Det_ReportError(CDDIIC_MODULE_ID, CDDIIC_INSTANCE_ID, \
CDDIIC_CH0SLAVEINIT_SID + LddChannel, CDDIIC_E_UNINITIALIZED);
/* Return NOK error code */
LddRetVal = RTE_E_INVALID;
}
else
{
if (CDDIIC_MAX_7_BIT_ADDRESS < LucSlaveOwnAdress)
{

15
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/cddiic/src/IIC/CDD_Iic_Irq.c
View File

@@ -49,6 +49,7 @@
/* Devices: R-Car V4H */
/*============================================================================*/
/*
* 1.0.15 14-May-2026 Update function CddIic_MDE_ISR
* 1.0.14 07-Jan-2026 Update Function CddIic_MAT_ISR
* 1.0.13 26-Dec-2025 Update File Copyright, add software version
* in header of file.
@@ -1308,7 +1309,7 @@ static FUNC(void, CDDIIC_CODE_FAST) CddIic_MDE_ISR
/* Clear the status bit */
/* MISRA Violation: START Msg(2:2824)-4 */
CddIic_HWClearStatus(CddIic_GpChannelConfig[LddChannel].pICMSRnReg, \
CddIic_HWClearStatusOneWrite(CddIic_GpChannelConfig[LddChannel].pICMSRnReg, \
CDDIIC_MDE_STATUS_BIT);
/* END Msg(2:2824)-4 */
@@ -2127,6 +2128,18 @@ static FUNC(void, CDDIIC_CODE_FAST) CddIic_SSR_ISR
/* Clear reception global counter */
CddIic_GpChannelStatus[LddChannel].ulRcvByteReceieved = CDDIIC_ZERO_32;
// clear register value of ICSIER to avoid transfer for same address
LulRegVal = CDDIIC_ZERO_32 | CDDIIC_SARE_BIT | CDDIIC_SDRE_BIT | \
CDDIIC_SDEE_BIT | CDDIIC_SSRE_BIT;
CddIic_HWClearStatus(CddIic_GpChannelConfig[LddChannel].pICSIERnReg, \
LulRegVal);
// clear register value of ICSCR to avoid unexpected slave run
LulRegVal = CDDIIC_ZERO_32 | CDDIIC_SIE_BIT | CDDIIC_GCAE_BIT | \
CDDIIC_SDBS_BIT;
CddIic_HWClearStatus(CddIic_GpChannelConfig[LddChannel].pICSCRnReg, \
LulRegVal);
/* Proceed call back operation */
CddIic_CallBack(LddChannel, LddOperation, IIC_NOTICE_END, \
LulByteTransferred);

20
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/MCAL-v4h_19.4.0.D_release/rel/modules/woody/sample_application/src/App_Woody_Common_Sample.c
View File

@@ -8,23 +8,23 @@
int main(void)
{
uint32 i = 0;
Mcu_Init(Mcu_ModuleConfiguration);
// /* This API will initialize all the registers to the initial values */
Port_Init(PortConfigSet);
// /* Initialize SCIF module */
Scif_Init();
// /* Start program */
Console_Print("\r\nWoody PROGRAM START\r\n");
/* Print Start program */
Console_Print("\r\nWoody APP PROGRAM START\r\n");
/* Initialize MCU */
Mcu_Init(Mcu_ModuleConfiguration);
/* Initialize PORT */
Port_Init(PortConfigSet);
while (1)
{
Console_Print("\r\nWoody PROGRAM RUNNING\r\n");
for (i = 0; i < 10000000; i++);
}
Console_Print("\r\nWoody Send I2C\r\n");
}
return 0;
}

4
Src/Gen4_R-Car_MCAL/2_Trunk/V4H/Tr32_Script/EVB/Lauterbach/Woody_r_carv4h-cr52_sieve_smp_offchip_trace_sram.cmm
View File

@@ -91,8 +91,8 @@ Break
; --------------------------------------------------------------------------------
; Load demo program (uses internal RAM only)
; Data.LOAD.Elf "~~~~/sieve_ram_aarch32_arm_v8r_le.elf"
Data.LOAD.Elf C:\Work\Src\Gen4_R-Car_MCAL\2_Trunk\V4H\MCAL-v4h_19.4.0.D_release\rel\modules\woody\sample_application\V4H\obj\arm\App_WOODY_V4H_Sample.elf /nocode
;Data.LOAD.Elf C:\Work\Src\Gen4_R-Car_MCAL\2_Trunk\V4H\MCAL-v4h_19.4.0.D_release\rel\modules\woody\sample_application\V4H\obj\arm\App_WOODY_V4H_Sample.elf
;Data.LOAD.Elf C:\Work\Src\Gen4_R-Car_MCAL\2_Trunk\V4H\MCAL-v4h_19.4.0.D_release\rel\modules\woody\sample_application\V4H\obj\arm\App_WOODY_V4H_Sample.elf /nocode
Data.LOAD.Elf C:\Work\Src\Gen4_R-Car_MCAL\2_Trunk\V4H\MCAL-v4h_19.4.0.D_release\rel\modules\woody\sample_application\V4H\obj\arm\App_WOODY_V4H_Sample.elf
;CORE 1
;GOSUB EnableATCM "0xE4400000" // CR52_1 (Hypervisor MPU)