208 lines
5.5 KiB
ArmAsm
208 lines
5.5 KiB
ArmAsm
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2018-2022 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : Image load function
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******************************************************************************/
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/******************************************************************************
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* @file loader_exceptions.S
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* - Version : 0.02
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* @brief
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* .
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*****************************************************************************/
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/******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 02.08.2022 0.01 First Release
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* : 31.10.2022 0.02 License notation change.
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*****************************************************************************/
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#define SYNC_SP_EL0 (0x0U)
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#define IRQ_SP_EL0 (0x1U)
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#define FIQ_SP_EL0 (0x2U)
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#define SERROR_SP_EL0 (0x3U)
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#define SYNC_SP_ELX (0x4U)
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#define IRQ_SP_ELX (0x5U)
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#define FIQ_SP_ELX (0x6U)
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#define SERROR_SP_ELX (0x7U)
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#define SYNC_AARCH64 (0x8U)
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#define IRQ_AARCH64 (0x9U)
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#define FIQ_AARCH64 (0xAU)
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#define SERROR_AARCH64 (0xBU)
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#define SYNC_AARCH32 (0xCU)
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#define IRQ_AARCH32 (0xDU)
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#define FIQ_AARCH32 (0xEU)
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#define SERROR_AARCH32 (0xFU)
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.global loader_exceptions
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.global SyncSP0
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.global IrqSP0
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.global FiqSP0
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.global SErrorSP0
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.global SyncSPx
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.global IrqSPx
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.global FiqSPx
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.global SErrorSPx
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.global SyncA64
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.global IrqA64
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.global FiqA64
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.global SErrorA64
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.global SyncA32
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.global IrqA32
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.global FiqA32
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.global SErrorA32
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/* Pre macro for a vector */
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.macro bigin_vector label, section_name=.vectors
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.cfi_sections .debug_frame
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.section \section_name, "ax"
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.align 7, 0
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.type \label, %function
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.cfi_startproc
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\label:
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.endm
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/* Post macro for a vector */
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.macro end_vector label
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.cfi_endproc
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.fill \label + (32 * 4) - .
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.endm
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/*****************************************************************************/
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/* Exception Vector Table */
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/*****************************************************************************/
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.section .vectors, "ax"
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.align 11, 0
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loader_exceptions:
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/***********************/
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/* Current EL with SP0 */
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/***********************/
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bigin_vector SyncSP0
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mov x0, #SYNC_SP_EL0
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msr spsel, #0
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bl handler_error
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end_vector SyncSP0
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bigin_vector IrqSP0
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mov x0, #IRQ_SP_EL0
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msr spsel, #0
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bl handler_error
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end_vector IrqSP0
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bigin_vector FiqSP0
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mov x0, #FIQ_SP_EL0
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msr spsel, #0
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b handler_fiq
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end_vector FiqSP0
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bigin_vector SErrorSP0
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mov x0, #SERROR_SP_EL0
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msr spsel, #0
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bl handler_error
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end_vector SErrorSP0
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/***********************/
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/* Current EL with SPx */
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/***********************/
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bigin_vector SyncSPx
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mov x0, #SYNC_SP_ELX
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msr spsel, #0
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bl handler_error
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end_vector SyncSPx
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bigin_vector IrqSPx
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mov x0, #IRQ_SP_ELX
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msr spsel, #0
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bl handler_error
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end_vector IrqSPx
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bigin_vector FiqSPx
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mov x0, #FIQ_SP_ELX
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msr spsel, #0
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bl handler_error
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end_vector FiqSPx
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bigin_vector SErrorSPx
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mov x0, #SERROR_SP_ELX
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msr spsel, #0
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bl handler_error
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end_vector SErrorSPx
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/**************************/
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/* Lower EL using AArch64 */
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/**************************/
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bigin_vector SyncA64
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mov x0, #SYNC_AARCH64
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msr spsel, #0
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bl handler_error
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end_vector SyncA64
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bigin_vector IrqA64
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mov x0, #IRQ_AARCH64
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msr spsel, #0
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bl handler_error
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end_vector IrqA64
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bigin_vector FiqA64
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mov x0, #FIQ_AARCH64
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msr spsel, #0
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bl handler_error
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end_vector FiqA64
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bigin_vector SErrorA64
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mov x0, #SERROR_AARCH64
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msr spsel, #0
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bl handler_error
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end_vector SErrorA64
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/**************************/
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/* Lower EL using AArch32 */
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/**************************/
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bigin_vector SyncA32
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mov x0, #SYNC_AARCH32
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msr spsel, #0
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bl handler_error
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end_vector SyncA32
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bigin_vector IrqA32
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mov x0, #IRQ_AARCH32
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msr spsel, #0
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bl handler_error
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end_vector IrqA32
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bigin_vector FiqA32
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mov x0, #FIQ_AARCH32
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msr spsel, #0
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bl handler_error
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end_vector FiqA32
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bigin_vector SErrorA32
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mov x0, #SERROR_AARCH32
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msr spsel, #0
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bl handler_error
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end_vector SErrorA32
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