93 lines
3.5 KiB
C
93 lines
3.5 KiB
C
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2021-2024 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : RT-VRAM register header
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******************************************************************************/
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#ifndef RTVRAM_REGISTER_H__
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#define RTVRAM_REGISTER_H__
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#include <stdint.h>
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/* RT-VRAM register base address */
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#define RTVRAM_REG_BASE (0xFFEC0000U)
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#define RTVRAM_SECDIVD (RTVRAM_REG_BASE + 0x0000U)
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#define RTVRAM_SECCTRRD (RTVRAM_REG_BASE + 0x0040U)
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#define RTVRAM_SECCTRWD (RTVRAM_REG_BASE + 0x0340U)
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#define RTVRAM_EXT_MODE (RTVRAM_REG_BASE + 0x8500U)
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#define RTVRAM_VBUF_CFG (RTVRAM_REG_BASE + 0x6504U)
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#define RTVRAM_CACHE_FLUSH (RTVRAM_REG_BASE + 0x4530U)
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#define RTVRAM_VBUF_BADDR (RTVRAM_REG_BASE + 0xC580U)
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/* RT-VRAM0 register base address */
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#define RTVRAM0_REG_BASE (0xFFE90000U)
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/* RT-VRAM1 register base address */
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#define RTVRAM1_REG_BASE (0xFFEC0000U)
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#define RTVRAM0_SECDIVD (RTVRAM0_REG_BASE + 0x0000U)
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#define RTVRAM0_SECCTRRD (RTVRAM0_REG_BASE + 0x0040U)
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#define RTVRAM0_SECCTRWD (RTVRAM0_REG_BASE + 0x0340U)
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#define RTVRAM1_SECDIVD (RTVRAM1_REG_BASE + 0x0000U)
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#define RTVRAM1_SECCTRRD (RTVRAM1_REG_BASE + 0x0040U)
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#define RTVRAM1_SECCTRWD (RTVRAM1_REG_BASE + 0x0340U)
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static inline uint32_t get_rtvram0_secdivd_addr(uint32_t num)
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{
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return ((RTVRAM0_SECDIVD + (num * 4U)));
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}
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static inline uint32_t get_rtvram0_secctrrd_addr(uint32_t num)
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{
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return ((RTVRAM0_SECCTRRD + (num * 4U)));
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}
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static inline uint32_t get_rtvram0_secctrwd_addr(uint32_t num)
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{
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return ((RTVRAM0_SECCTRWD + (num * 4U)));
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}
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static inline uint32_t get_rtvram1_secdivd_addr(uint32_t num)
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{
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return ((RTVRAM1_SECDIVD + (num * 4U)));
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}
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static inline uint32_t get_rtvram1_secctrrd_addr(uint32_t num)
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{
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return ((RTVRAM1_SECCTRRD + (num * 4U)));
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}
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static inline uint32_t get_rtvram1_secctrwd_addr(uint32_t num)
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{
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return ((RTVRAM1_SECCTRWD + (num * 4U)));
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}
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static inline uint32_t get_vbuf_baddr_addr(uint32_t num)
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{
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return ((RTVRAM_VBUF_BADDR + (num * 4U)));
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}
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#endif /* RTVRAM_REGISTER_H__ */
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