Files
Tool/IPL/Customer/Mobis/V4H_Cx_Loader/Makefile
2025-12-24 17:21:08 +09:00

594 lines
18 KiB
Makefile

#*******************************************************************************
# DISCLAIMER
# This software is supplied by Renesas Electronics Corporation and is only
# intended for use with Renesas products. No other uses are authorized. This
# software is owned by Renesas Electronics Corporation and is protected under
# all applicable laws, including copyright laws.
# THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
# THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
# LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
# AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
# TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
# ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
# FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
# ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
# BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
# Renesas reserves the right, without notice, to make changes to this software
# and to discontinue the availability of this software. By using this software,
# you agree to the additional terms and conditions found by accessing the
# following link:
# http://www.renesas.com/disclaimer
# Copyright 2018-2025 Renesas Electronics Corporation All rights reserved.
#******************************************************************************/
# ******************************************************************************
# * DESCRIPTION : makefile for Loader
# ******************************************************************************
# ******************************************************************************
# * @file Makefile
# * - Version : 0.14
# * @brief
# * .
# ******************************************************************************
# ******************************************************************************
# * History : DD.MM.YYYY Version Description
# * : 02.02.2022 0.01 First Release
# * : 17.02.2022 0.02 Support AArch32
# * : 23.03.2022 0.03 Removed unnecessary functions
# * : 09.05.2022 0.04 Used the standard library
# * Renamed the image
# * Added make option "LSI"
# * Removed make option "AArch"
# * Changed to make common things common in LSI
# * : 17.06.2022 0.05 Support secure boot for S4
# * : 02.08.2022 0.06 Support WDT
# * : 07.11.2022 0.07 Support DDR initialization/QOS initialization processing
# * : 14.12.2022 0.08 Fixed make option "EMMC_TRANS_MODE"
# * Support MMU
# * : 15.12.2022 0.09 Support RegionID check
# * Fixed "LSI" default settings
# * : 04.04.2023 0.10 Fixed not used standerd library.
# * : 21.08.2023 0.11 Add support for V4M.
# * : 04.09.2023 0.12 Add C4 power domain setting.
# * : 19.12.2024 0.13 Add build option "RTOS_LOAD_NUM"
# * Add build option "ECM_ERROR_ENABLE"
# * and "ECMERRTGTR_INTC".
# * : 26.05.2025 0.14 Add build option "OPTEE_LOAD_ENABLE"
# ******************************************************************************
###################################################
# makefile
###################################################
define add_define
DEFINES += -D$(1)$(if $(value $(1)),=$(value $(1)),)
endef
INCLUDE_DIR = -Iinclude
OUTDIR := build
# LSI setting common define
RCAR_S4:=0
RCAR_V4H:=1
RCAR_V4M:=2
NORMAL:=0
SECURE:=1
HS400:=0
HS200:=1
HIGH_SPEED:=2
NO_HIGH_SPEED:=3
$(eval $(call add_define,RCAR_S4))
$(eval $(call add_define,RCAR_V4H))
$(eval $(call add_define,RCAR_V4M))
$(eval $(call add_define,NORMAL))
$(eval $(call add_define,SECURE))
$(eval $(call add_define,HS400))
$(eval $(call add_define,HS200))
$(eval $(call add_define,HIGH_SPEED))
$(eval $(call add_define,NO_HIGH_SPEED))
ifneq ("$(FORCE_115200)", "")
$(eval $(call add_define,FORCE_115200))
endif
$(eval $(call add_define,MOBIS_PRK3))
#/* Select LSI("S4" or "V4H" or "V4M")***********************
ifeq ("$(LSI)", "")
LSI = S4
endif
ifeq (${LSI},S4)
RCAR_LSI:=${RCAR_S4}
#output file name
FILE_NAME = ca55_loader
else ifeq (${LSI},V4H)
RCAR_LSI:=${RCAR_V4H}
#output file name
FILE_NAME = cr52_loader
else ifeq (${LSI},V4M)
RCAR_LSI:=${RCAR_V4M}
#output file name
FILE_NAME = cr52_loader
else
$(error "Error: ${LSI} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI))
ifndef BOOT_MODE
BOOT_MODE:=${NORMAL}
else
ifeq (${BOOT_MODE},NORMAL)
BOOT_MODE:=${NORMAL}
else ifeq (${BOOT_MODE},SECURE)
BOOT_MODE:=${SECURE}
ifeq (${LSI},S4)
$(eval $(call add_define,TARGET_CORTEX_A))
$(eval $(call add_define,TARGET_DEVICE_S4X))
$(eval $(call add_define,AARCH64))
else ifeq (${LSI},V4H)
$(eval $(call add_define,TARGET_DEVICE_V4H))
else ifeq (${LSI},V4M)
$(eval $(call add_define,TARGET_DEVICE_V4M))
endif
else
$(error "Error: ${BOOT_MODE} is not supported.")
endif
$(eval $(call add_define,BOOT_MODE))
endif
ifndef EMMC_TRANS_MODE
EMMC_TRANS_MODE:=${HS400}
else
ifeq (${EMMC_TRANS_MODE},HS400)
EMMC_TRANS_MODE:=${HS400}
else ifeq (${EMMC_TRANS_MODE},HS200)
EMMC_TRANS_MODE:=${HS200}
else ifeq (${EMMC_TRANS_MODE},HIGH_SPEED)
EMMC_TRANS_MODE:=${HIGH_SPEED}
else ifeq (${EMMC_TRANS_MODE},NO_HIGH_SPEED)
EMMC_TRANS_MODE:=${NO_HIGH_SPEED}
else
$(error "Error: ${EMMC_TRANS_MODE} is not supported.")
endif
$(eval $(call add_define,EMMC_TRANS_MODE))
endif
# Process RCAR_DRAM_SPLIT flag (V4H only)
ifeq (${LSI},V4H)
ifndef RCAR_DRAM_SPLIT
RCAR_DRAM_SPLIT := 1
$(eval $(call add_define,RCAR_DRAM_SPLIT))
else
ifeq (${RCAR_DRAM_SPLIT},0)
$(eval $(call add_define,RCAR_DRAM_SPLIT))
else ifeq (${RCAR_DRAM_SPLIT},1)
$(eval $(call add_define,RCAR_DRAM_SPLIT))
else
$(error "Error:RCAR_DRAM_SPLIT=${RCAR_DRAM_SPLIT} is not supported.")
endif
endif
else ifeq (${LSI},V4M)
ifndef RCAR_DRAM_SPLIT
RCAR_DRAM_SPLIT := 0
$(eval $(call add_define,RCAR_DRAM_SPLIT))
else
ifneq (${RCAR_DRAM_SPLIT},0)
$(error "Error:RCAR_DRAM_SPLIT=${RCAR_DRAM_SPLIT} is not supported.")
endif
endif
endif
# Process RCAR_PERIODIC_WRITE_TRAINING flag
ifeq ($(filter ${LSI},V4H V4M),${LSI})
ifndef RCAR_PERIODIC_WRITE_TRAINING
RCAR_PERIODIC_WRITE_TRAINING := 1
$(eval $(call add_define,RCAR_PERIODIC_WRITE_TRAINING))
else
ifeq (${RCAR_PERIODIC_WRITE_TRAINING},0)
$(eval $(call add_define,RCAR_PERIODIC_WRITE_TRAINING))
else ifeq (${RCAR_PERIODIC_WRITE_TRAINING},1)
$(eval $(call add_define,RCAR_PERIODIC_WRITE_TRAINING))
else
$(error "Error:RCAR_PERIODIC_WRITE_TRAINING=${RCAR_PERIODIC_WRITE_TRAINING} is not supported.")
endif
endif
endif
# Process RCAR_PERIODIC_READ_TRAINING flag
ifeq ($(filter ${LSI},V4H V4M),${LSI})
ifndef RCAR_PERIODIC_READ_TRAINING
RCAR_PERIODIC_READ_TRAINING := 1
$(eval $(call add_define,RCAR_PERIODIC_READ_TRAINING))
else
ifeq (${RCAR_PERIODIC_READ_TRAINING},0)
$(eval $(call add_define,RCAR_PERIODIC_READ_TRAINING))
else ifeq (${RCAR_PERIODIC_READ_TRAINING},1)
$(eval $(call add_define,RCAR_PERIODIC_READ_TRAINING))
else
$(error "Error:RCAR_PERIODIC_READ_TRAINING=${RCAR_PERIODIC_READ_TRAINING} is not supported.")
endif
endif
endif
# Process DBSC_REFINTS flag
ifeq ($(filter ${LSI},V4H V4M),${LSI})
ifndef DBSC_REFINTS
DBSC_REFINTS := 0
$(eval $(call add_define,DBSC_REFINTS))
else
ifeq (${DBSC_REFINTS},0)
$(eval $(call add_define,DBSC_REFINTS))
else ifeq (${DBSC_REFINTS},1)
$(eval $(call add_define,DBSC_REFINTS))
else
$(error "Error:DBSC_REFINTS=${DBSC_REFINTS} is not supported.")
endif
endif
endif
# Process RTVRAM_EXTEND flag
ifeq ($(filter ${LSI},V4H V4M),${LSI})
ifndef RTVRAM_EXTEND
RTVRAM_EXTEND := 1
$(eval $(call add_define,RTVRAM_EXTEND))
else
ifeq (${RTVRAM_EXTEND},0)
$(eval $(call add_define,RTVRAM_EXTEND))
else ifeq (${RTVRAM_EXTEND},1)
$(eval $(call add_define,RTVRAM_EXTEND))
else
$(error "Error:RTVRAM_EXTEND=${RTVRAM_EXTEND} is not supported.")
endif
endif
endif
# timing measurement
ifeq ("$(MEASURE_TIME)", "")
MEASURE_TIME = 0
else
$(eval $(call add_define,MEASURE_TIME))
# Set log level to Error, so we dont waste time with unnecessary prints
LOG_LEVEL := 1
OBJ_FILE += \
common/scmt_checkpoint.o \
common/timer/scmt.o
endif
# Process BL2_LOAD_ENABLE flag
ifeq (${LSI},V4H)
ifndef BL2_LOAD_ENABLE
BL2_LOAD_ENABLE := 1
$(eval $(call add_define,BL2_LOAD_ENABLE))
else
ifeq (${BL2_LOAD_ENABLE},0)
$(eval $(call add_define,BL2_LOAD_ENABLE))
else ifeq (${BL2_LOAD_ENABLE},1)
$(eval $(call add_define,BL2_LOAD_ENABLE))
else
$(error "Error:BL2_LOAD_ENABLE=${BL2_LOAD_ENABLE} is not supported.")
endif
endif
endif
# Process QNX_OS_LOAD_ENABLE flag
ifeq (${LSI},V4H)
ifndef QNX_OS_LOAD_ENABLE
QNX_OS_LOAD_ENABLE := 1
$(eval $(call add_define,QNX_OS_LOAD_ENABLE))
else
ifeq (${QNX_OS_LOAD_ENABLE},0)
$(eval $(call add_define,QNX_OS_LOAD_ENABLE))
else ifeq (${QNX_OS_LOAD_ENABLE},1)
$(eval $(call add_define,QNX_OS_LOAD_ENABLE))
else
$(error "Error:QNX_OS_LOAD_ENABLE=${QNX_OS_LOAD_ENABLE} is not supported.")
endif
endif
endif
# Process RTOS_LOAD_NUM flag
# 1:RTOS#0 only 3:RTOS#0,#1,#2
ifndef RTOS_LOAD_NUM
RTOS_LOAD_NUM := 1
$(eval $(call add_define,RTOS_LOAD_NUM))
else
ifeq (${RTOS_LOAD_NUM},1)
$(eval $(call add_define,RTOS_LOAD_NUM))
else ifeq (${RTOS_LOAD_NUM},3)
$(eval $(call add_define,RTOS_LOAD_NUM))
else
$(error "Error:RTOS_LOAD_NUM=${RTOS_LOAD_NUM} is not supported.")
endif
endif
# Process OPTEE_LOAD_ENABLE flag
ifeq ($(filter ${LSI},V4H V4M),${LSI})
ifndef OPTEE_LOAD_ENABLE
OPTEE_LOAD_ENABLE := 1
$(eval $(call add_define,OPTEE_LOAD_ENABLE))
else
ifeq (${OPTEE_LOAD_ENABLE},0)
$(eval $(call add_define,OPTEE_LOAD_ENABLE))
else ifeq (${OPTEE_LOAD_ENABLE},1)
$(eval $(call add_define,OPTEE_LOAD_ENABLE))
else
$(error "Error:OPTEE_LOAD_ENABLE=${OPTEE_LOAD_ENABLE} is not supported.")
endif
endif
endif
OUTPUT_FILE = $(FILE_NAME).elf
# object file name
OBJ_FILE += common/string.o \
common/log/log.o \
common/log/scif.o \
common/timer/generic_timer.o \
image_load/image_load.o \
ip/ip_control.o \
ip/emmc/emmc_boot.o \
ip/emmc/emmc_cmd.o \
ip/emmc/emmc_init.o \
ip/emmc/emmc_interrupt.o \
ip/emmc/emmc_mount.o \
ip/emmc/emmc_multiboot.o \
ip/emmc/emmc_read.o \
ip/emmc/emmc_utility.o \
loader/stack.o \
loader/loader_main.o \
ip/interrupt.o
ifeq (${BOOT_MODE},SECURE)
OBJ_FILE += secure/secure_boot.o \
secure/src/comm_drv/icum_d_comm_pe.o \
secure/src/icumif_lib/r_icumif.o \
secure/shared/src/mem_info_def.o \
secure/user_api/user_icumif_api.o
INCLUDE_DIR += -Isecure/src/comm_drv -Isecure/src/icumif_lib -Isecure/icumif -Isecure/include -Isecure/user_api -Isecure/shared/src
endif
ifeq (${LSI},S4)
OBJ_FILE += \
loader/loader_s4.o \
ip/swdt/swdt.o \
loader/loader_mmu_table.o \
loader/loader_exceptions.o
#linker script name
MEMORY_DEF = loader/loader_s4.ld
else ifeq (${LSI},V4H)
OBJ_FILE += \
cpu_on/cpu_on.o \
ip/qos/qos.o \
cnf_tbl/cnf_tbl_v4h.o \
ip/rtvram/rtvram.o \
loader/loader_v4h.o \
loader/loader_main_common.o \
protect/region_id/region_id.o \
cnf_tbl/rgidcnf_tbl_v4h.o \
ip/ddr/v4h/lpddr5/ecc_enable_v4h.o \
ip/ddr/v4h/lpddr5/ecm_enable_v4h.o
#linker script name
MEMORY_DEF = loader/loader_v4h.ld
INCLUDE_DIR += -Iip/ddr
else ifeq (${LSI},V4M)
OBJ_FILE += \
cpu_on/cpu_on.o \
ip/qos/qos.o \
cnf_tbl/cnf_tbl_v4m.o \
ip/rtvram/rtvram.o \
loader/loader_v4m.o \
loader/loader_main_common.o \
protect/region_id/region_id.o \
cnf_tbl/rgidcnf_tbl_v4m.o \
ip/ddr/v4m/lpddr5/ecc_enable_v4m.o \
ip/ddr/v4m/lpddr5/ecm_enable_v4m.o
#linker script name
MEMORY_DEF = loader/loader_v4m.ld
INCLUDE_DIR += -Iip/ddr
endif
###################################################
# Process access protection flag
# 0:Disable 1:Enable
ifndef ACC_PROT_ENABLE
ACC_PROT_ENABLE := 0
$(eval $(call add_define,ACC_PROT_ENABLE))
else
ifeq (${ACC_PROT_ENABLE},0)
$(eval $(call add_define,ACC_PROT_ENABLE))
else ifeq (${ACC_PROT_ENABLE},1)
$(eval $(call add_define,ACC_PROT_ENABLE))
else
$(error "Error:ACC_PROT_ENABLE=${ACC_PROT_ENABLE} is not supported.")
endif
endif
# Debug build
DEBUG:=0
# Process DEBUG flag
$(eval $(call assert_boolean,DEBUG))
$(eval $(call add_define,DEBUG))
ifeq (${DEBUG},0)
$(eval $(call add_define,NDEBUG))
else
CFLAGS += -g
ASFLAGS += -g -Wa,--gdwarf-2
endif
# booting performance check
ifeq ("$(BOOT_TIME_CHECK)", "")
BOOT_TIME_CHECK = 0
endif
$(eval $(call add_define,BOOT_TIME_CHECK))
ifneq (${BOOT_TIME_CHECK},0)
OBJ_FILE += ip/gpio/gpio.o
endif
# Process LOG_LEVEL
ifndef LOG_LEVEL
LOG_LEVEL := 2
endif
$(eval $(call add_define,LOG_LEVEL))
# Process ECC_ENABLE
ifeq ($(filter ${LSI},V4H V4M),${LSI})
ifndef ECC_ENABLE
ECC_ENABLE:= 0
$(eval $(call add_define,ECC_ENABLE))
else
ifeq (${ECC_ENABLE},0)
$(eval $(call add_define,ECC_ENABLE))
else ifeq (${ECC_ENABLE},1)
$(eval $(call add_define,ECC_ENABLE))
else
$(error "Error: ECC_ENABLE=${ECC_ENABLE} is not supported.")
endif
endif
endif
# Process ECM_ERROR_ENABLE flag
ifndef ECM_ERROR_ENABLE
ECM_ERROR_ENABLE := 1
$(eval $(call add_define,ECM_ERROR_ENABLE))
else
ifeq (${ECM_ERROR_ENABLE},0)
$(eval $(call add_define,ECM_ERROR_ENABLE))
else ifeq (${ECM_ERROR_ENABLE},1)
$(eval $(call add_define,ECM_ERROR_ENABLE))
else
$(error "Error:ECM_ERROR_ENABLE=${ECM_ERROR_ENABLE} is not supported.")
endif
endif
# Process ECMERRTGTR_INTC flag
ifndef ECMERRTGTR_INTC
ECMERRTGTR_INTC := 1
$(eval $(call add_define,ECMERRTGTR_INTC))
else
ifeq (${ECMERRTGTR_INTC},0)
$(eval $(call add_define,ECMERRTGTR_INTC))
else ifeq (${ECMERRTGTR_INTC},1)
$(eval $(call add_define,ECMERRTGTR_INTC))
else
$(error "Error:ECMERRTGTR_INTC=${ECMERRTGTR_INTC} is not supported.")
endif
endif
ifeq ($(filter ${LSI},V4H V4M),${LSI})
include ip/ddr/ddr.mk
endif
# Process DBSC HUNGUP WA
ifndef WA_OTLINT5579
WA_OTLINT5579:= 1
endif
$(eval $(call add_define,WA_OTLINT5579))
# Private Option for QoS and DBSC
RCAR_PERIODIC_TRAINING_SEPARATE_MODE:= 0
$(eval $(call add_define,RCAR_PERIODIC_TRAINING_SEPARATE_MODE))
###################################################
OUTDIR_REL := $(OUTDIR)/release
OUTDIR_OBJ := $(OUTDIR)/obj
OBJ_FILE := $(OBJ_FILE:%.o=$(OUTDIR_OBJ)/%.o)
CC = $(CROSS_COMPILE)gcc
CPP = ${CROSS_COMPILE}cpp
AS = ${CROSS_COMPILE}gcc
AR = ${CROSS_COMPILE}ar
LD = $(CROSS_COMPILE)ld
OC = ${CROSS_COMPILE}objcopy
OD = ${CROSS_COMPILE}objdump
ifeq (${LSI},S4)
ASFLAGS += -march=armv8.2-a
CFLAGS += -march=armv8.2-a \
-O0
else ifeq ($(filter ${LSI},V4H V4M),${LSI})
ASFLAGS += -march=armv8-r
CFLAGS += -march=armv8-r \
-O2
endif
ASFLAGS += -ffreestanding -Wa,--fatal-warnings \
-Wmissing-include-dirs \
-c -D__ASSEMBLY \
$(INCLUDE_DIR) $(DEFINES)
CFLAGS += -ffreestanding -Wall \
-Wmissing-include-dirs \
-std=c99 -c \
-D__CX_IPL__ \
$(INCLUDE_DIR) $(DEFINES)
#LDFLAGS = --fatal-warnings -O1 -nostdlib
LDFLAGS = --fatal-warnings -O1 -lm
BUILD_MESSAGE_TIMESTAMP ?= __TIME__", "__DATE__
LIBS = -L$(subst libc.a, ,$(shell $(CC) -print-file-name=libc.a 2> /dev/null)) -lc
LIBS += -L$(subst libgcc.a, ,$(shell $(CC) -print-libgcc-file-name 2> /dev/null)) -lgcc
###################################################
.SUFFIXES : .s .c .o
###################################################
# command
.PHONY: all
all: $(OUTPUT_FILE)
###################################################
# Linker
###################################################
$(OUTPUT_FILE) : $(MEMORY_DEF) $(OBJ_FILE)
@echo 'const char build_message[] = "Built : "$(BUILD_MESSAGE_TIMESTAMP);' | \
$(CC) $(CFLAGS) -xc - -o $(OUTDIR_OBJ)/build_message.o
@if [ ! -e "$(OUTDIR_REL)" ]; then mkdir "$(OUTDIR_REL)"; fi
$(V)$(LD) $(OBJ_FILE) $(OUTDIR_OBJ)/build_message.o \
-T $(MEMORY_DEF) \
-o $(OUTDIR_REL)/$(OUTPUT_FILE) \
$(LDFLAGS) \
-Map $(OUTDIR_REL)/$(FILE_NAME).map \
$(LIBS)
$(V)$(OC) -O srec --srec-forceS3 $(OUTDIR_REL)/$(OUTPUT_FILE) $(OUTDIR_REL)/$(FILE_NAME).srec
$(V)$(OC) -O binary $(OUTDIR_REL)/$(OUTPUT_FILE) $(OUTDIR_REL)/$(FILE_NAME).bin
$(V)$(OD) -dx $(OUTDIR_REL)/$(OUTPUT_FILE) > $(OUTDIR_REL)/$(FILE_NAME).dump
@chmod 644 $(OUTDIR_REL)/$(FILE_NAME).*
ifneq ("$(V)", "")
@echo "Build complete: $(OUTPUT_FILE)"
@echo "Output files:"
@echo " - $(OUTDIR_REL)/$(FILE_NAME).srec"
endif
###################################################
# Compile
###################################################
$(OUTDIR_OBJ)/%.o:%.c
@if [ ! -e `dirname $@` ]; then mkdir -p `dirname $@`; fi
$(V)$(CC) $(CFLAGS) -o $@ -c $<
$(OUTDIR_OBJ)/%.o:%.S
@if [ ! -e `dirname $@` ]; then mkdir -p `dirname $@`; fi
$(V)$(AS) $(ASFLAGS) -o $@ -c $<
.PHONY: clean
clean:
@rm -rf $(OUTDIR)