130 lines
3.8 KiB
Plaintext
130 lines
3.8 KiB
Plaintext
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2023 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : Loader linker directive
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******************************************************************************/
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/******************************************************************************
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* @file loader_v4m.ld
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* - Version : 0.01
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* @brief
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* .
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*****************************************************************************/
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/******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 21.08.2023 0.01 First Release
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*****************************************************************************/
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OUTPUT_FORMAT("elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(Startup)
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MEMORY {
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SYSRAM (rwxa): ORIGIN = 0xE6300000, LENGTH = 0x00030000
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CXIPLDATA (rwa): ORIGIN = 0xE6330000, LENGTH = 0x00003000
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CXIPLSTACK (rwa): ORIGIN = 0xE6333000, LENGTH = 0x00002000
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SHARED_RAM (rwa): ORIGIN = 0x41C00000, LENGTH = 0x0000C000
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SHARED_SDRAM (rwa): ORIGIN = 0x41E00000, LENGTH = 0x00200000
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}
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SECTIONS
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{
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.loader_start : {
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__RO_START__ = .;
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build/obj/loader/loader_v4m.o(.text*)
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. = NEXT(1024);
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*(.vectors)
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. = ALIGN(4096);
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} > SYSRAM
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.loader_ro : {
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*(.text*)
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*(.rodata*)
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. = ALIGN(8);
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__CONST_START__ = .;
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. = ALIGN(16);
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*(.qoswt_tbl)
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. = ALIGN(8);
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*(.qosbw_tbl)
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. = ALIGN(8);
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*(.constdata.CONFIG_DATA)
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. = ALIGN(8);
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*(.rgid_w_tbl)
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. = ALIGN(8);
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*(.rgid_r_tbl)
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. = ALIGN(8);
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*(.rgid_m_tbl)
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. = ALIGN(8);
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*(.rgid_sec_tbl)
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. = ALIGN(8);
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*(.rgid_axi_tbl)
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__RO_END_UNALIGNED__ = .;
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. = NEXT(4096);
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__RO_END__ = .;
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__DATA_COPY_START__ = .;
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} > SYSRAM
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.data : {
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__DATA_START__ = .;
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*(.data*)
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. = NEXT(16);
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__DATA_END__ = .;
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} > CXIPLDATA AT > SYSRAM
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__DATA_SIZE__ = SIZEOF(.data);
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stacks (NOLOAD) : ALIGN(16) {
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__STACKS_START__ = .;
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KEEP(*(Cx_loader_stack))
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__STACKS_END__ = .;
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} > CXIPLSTACK
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.bss.SHARED_TOP : {
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__SHARED_TOP_START__ = .;
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*(.bss.SHARED_TOP)
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*(.bss.SHARED_LCS)
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*(.bss.SHARED_CMAC)
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*(.bss.SHARED_HASH)
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. = NEXT(0x00200000);
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__SHARED__END__ = .;
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} > SHARED_SDRAM
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.SHARED_RAM : {
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__FWRAM_START__ = .;
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. += 0;
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. = NEXT(0x0000C000);
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__FWRAM_END__ = .;
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} > SHARED_RAM
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.bss : ALIGN(16) {
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__BSS_START__ = .;
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*(SORT_BY_ALIGNMENT(.bss*))
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*(COMMON)
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__BSS_END__ = .;
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} > CXIPLDATA
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__BSS_SIZE__ = SIZEOF(.bss);
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}
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