100 lines
5.4 KiB
C
100 lines
5.4 KiB
C
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2022 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : Image load function by SDMAC on ICUMX header
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******************************************************************************/
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#ifndef SDMAC_H__
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#define SDMAC_H__
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#include <sdmac_register.h>
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#include <image_load.h>
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/* Prototype */
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void icu_sdmac_trans_start(const LOAD_INFO *li);
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void icu_sdmac_trans_end(void);
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/* Definitions */
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#define ICUMX_DMACHRST_CLR_CH0 (0x00000001U)
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#define ICUMX_DMACHRST_CLR_CH1 (0x00000002U)
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#define ICUMX_DMACHRST_CLR_CH2 (0x00000004U)
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#define ICUMX_DMACHFCR_CAEC (0x00000008U)
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#define ICUMX_DMACHFCR_TEC (0x00000002U)
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#define ICUMX_DMACHFCR_DEC (0x00000001U)
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#define ICUMX_DMACHFCR_INIT (ICUMX_DMACHFCR_CAEC | ICUMX_DMACHFCR_TEC | ICUMX_DMACHFCR_DEC)
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#define ICUMX_DMAOR_PR_ROUND_ROBIN (0x0300U)
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#define ICUMX_DMAOR_DME_ENABLE (0x0001U)
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#define ICUMX_DMAOR_INIT (ICUMX_DMAOR_PR_ROUND_ROBIN | ICUMX_DMAOR_DME_ENABLE)
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#define ICUMX_DMATMR_SLM_NORMAL (0x00000000U)
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#define ICUMX_DMATMR_PRI_DISABLE (0x00000000U)
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#define ICUMX_DMATMR_TRS_AT_REQ (0x00000000U)
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#define ICUMX_DMATMR_TRS_HARD_REQ (0x00001000U)
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#define ICUMX_DMATMR_DM_INC (0x00000400U)
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#define ICUMX_DMATMR_SM_INC (0x00000100U)
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#define ICUMX_DMATMR_DTS_64B (0x00000060U)
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#define ICUMX_DMATMR_STS_64B (0x00000006U)
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#define ICUMX_DMATMR_0_INIT (ICUMX_DMATMR_SLM_NORMAL | ICUMX_DMATMR_PRI_DISABLE | ICUMX_DMATMR_TRS_AT_REQ \
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| ICUMX_DMATMR_DM_INC | ICUMX_DMATMR_SM_INC | ICUMX_DMATMR_DTS_64B \
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| ICUMX_DMATMR_STS_64B)
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#define ICUMX_DMATMR_1_INIT (ICUMX_DMATMR_SLM_NORMAL | ICUMX_DMATMR_PRI_DISABLE \
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| ICUMX_DMATMR_TRS_HARD_REQ | ICUMX_DMATMR_SM_INC | ICUMX_DMATMR_DTS_64B \
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| ICUMX_DMATMR_STS_64B)
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#define ICUMX_DMATMR_2_INIT (ICUMX_DMATMR_SLM_NORMAL | ICUMX_DMATMR_PRI_DISABLE \
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| ICUMX_DMATMR_TRS_HARD_REQ | ICUMX_DMATMR_DM_INC | ICUMX_DMATMR_DTS_64B \
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| ICUMX_DMATMR_STS_64B)
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#define ICUMX_DMACHCR_CAEE_ENABLE (0x0010U)
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#define ICUMX_DMACHCR_CAIE_ENABLE (0x0008U)
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#define ICUMX_DMACHCR_IE_ENABLE (0x0002U)
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#define ICUMX_DMACHCR_DE_ENABLE (0x0001U)
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#define ICUMX_DMACHCR_0_START (ICUMX_DMACHCR_CAEE_ENABLE | ICUMX_DMACHCR_DE_ENABLE)
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#define ICUMX_DMACHCR_1_START (ICUMX_DMACHCR_CAEE_ENABLE | ICUMX_DMACHCR_CAIE_ENABLE \
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| ICUMX_DMACHCR_DE_ENABLE)
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#define ICUMX_DMACHCR_2_START (ICUMX_DMACHCR_CAEE_ENABLE | ICUMX_DMACHCR_CAIE_ENABLE \
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| ICUMX_DMACHCR_IE_ENABLE | ICUMX_DMACHCR_DE_ENABLE)
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#define ICUMX_DMACHSTA_CAE (0x00000008U)
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#define ICUMX_DMACHSTA_TE (0x00000002U)
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#define DMACHSTA_CAE_BIT_NOERROR (0x00000000U)
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#define DMACHSTA_TE_END_DMA (0x00000002U)
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#define ICUMX_DMARS_TC_1 (0x00010000U)
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#define ICUMX_DMARS_TL_TMR_DTS (0x00001000U)
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#define ICUMX_DMARS_TL_TMR_STS (0x00000000U)
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#define ICUMX_DMARS_FPT_DE_IS_1 (0x00000000U)
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#define ICUMX_DMARS_PLE_ENABLE (0x00000400U)
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#define ICUMX_DMARS_PLE_DISABLE (0x00000000U)
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#define ICUMX_DMARS_RS_FOR_CH2 (0x00000001U)
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#define ICUMX_DMARS_1_INIT (ICUMX_DMARS_TC_1 | ICUMX_DMARS_TL_TMR_DTS | ICUMX_DMARS_FPT_DE_IS_1 \
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| ICUMX_DMARS_PLE_ENABLE)
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#define ICUMX_DMARS_2_INIT (ICUMX_DMARS_TC_1 | ICUMX_DMARS_TL_TMR_STS | ICUMX_DMARS_FPT_DE_IS_1 \
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| ICUMX_DMARS_PLE_DISABLE | ICUMX_DMARS_RS_FOR_CH2)
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#define SDMAC_FRACTION_MASK_64_BYTE (0x3FU)
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#endif /* SDMAC_H__ */
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