110 lines
4.2 KiB
C
110 lines
4.2 KiB
C
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2023-2024 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : System Controller function
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******************************************************************************/
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/******************************************************************************
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* @file sysc.c
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* - Version : 0.04
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* @brief
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* .
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*****************************************************************************/
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/******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 29.09.2023 0.01 First Release
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* : 13.11.2023 0.02 Add software reset
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* : 16.11.2023 0.03 Add APSREG initialization process.
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* : 22.10.2024 0.04 Update the C4 power domain setting process.
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*****************************************************************************/
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#include "mem_io.h"
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#include "sysc.h"
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#include "cpg_register.h"
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#include "log.h"
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#include "cpu_on.h"
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#include "ap_system_core_register.h"
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/*
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* V4M turns on C4 power before starting CA
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* V4M HWM:SYSC:Operation:Power Control of Non Arm CPU Modules
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*/
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#if (RCAR_LSI == RCAR_V4M)
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void sysc_c4_power_on(void)
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{
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uint32_t reg;
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/*
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* Need to execute APSREG initialization before C4 power on according to
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* R-Car V4M Series User's Manual '5.4.3 Register Initialization Before C4 power on'.
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*/
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reg = mem_read32(ap_core_get_ap_cluster_n_aux0_addr(0U));
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reg |= AP_CORE_APSREG_AP_CLUSTER_N_AUX0_INIT;
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mem_write32(ap_core_get_ap_cluster_n_aux0_addr(0U), reg);
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reg = mem_read32(AP_CORE_APSREG_CCI500_AUX);
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reg |= AP_CORE_APSREG_CCI500_AUX_ACTDIS;
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mem_write32(AP_CORE_APSREG_CCI500_AUX, reg);
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/* 1.Write the set value in SYSCIER0 and SYSCIMR0 */
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reg = mem_read32(SYSC_SYSCIER0);
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mem_write32(SYSC_SYSCIER0, reg | SYSCIER0_PDR31);
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reg = mem_read32(SYSC_SYSCIMR0);
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mem_write32(SYSC_SYSCIMR0, reg | SYSCIMR0_PDR31);
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/* 2.Confirm that SYSCSR.BUSY[1] becomes 1.*/
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while (true)
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{
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reg = mem_read32(SYSC_SYSCSR);
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if (SYSCSR_BUSY1 == (reg & SYSCSR_BUSY1))
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{
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break;
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}
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}
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/* 3.Write the reset value in SRCR11 and SESTCLR11 */
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reg = mem_read32(CPG_SRCR11);
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mem_write32(CPG_SRCR11, reg | CPGSRCR_PDR11);
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mem_write32(CPG_SRSTCLR11, CPGSRCR_PDR11);
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/* 4.Write the set value in PDRONCR31 */
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mem_write32(SYSC_PDRONCR31, PDRONCR31_PWRON);
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/* 5.Confirm that SYSCISCR0.PDR[31] becomes 1.*/
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while (true)
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{
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reg = mem_read32(SYSC_SYSCISCR0);
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if (SYSCISCR0_PDR31 == (reg & SYSCISCR0_PDR31))
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{
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break;
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}
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}
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/* 6.Clear the bit31(PDR[31]) in SYSCISCR0 to 0. */
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mem_write32(SYSC_SYSCISCR0, SYSCISCR0_PDR31);
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}
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/* End of function sysc_c4_power_on(void) */
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#endif /* RCAR_LSI == RCAR_V4M */
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