63 lines
1.0 KiB
Modula-2
63 lines
1.0 KiB
Modula-2
MEMORY {
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RAM (rwxa): ORIGIN = 0x41D00000, LENGTH = 0x000F8000
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MMU_CPU0 : ORIGIN = 0x41DF8000, LENGTH = 16K
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SHARED_RAM (rwa): ORIGIN = 0x41C00000, LENGTH = 0x0000C000
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SHARED_SDRAM (rwa): ORIGIN = 0x41E00000, LENGTH = 0x00200000
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}
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SECTIONS
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{
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.text : {
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__RO_START__ = .;
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*(.text*)
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*(.rodata*)
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. = NEXT(64);
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__RO_END__ = .;
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} > RAM
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.data : {
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__DATA_START__ = .;
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*(.data)
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. = NEXT(64);
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__DATA_END__ = .;
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} > RAM
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__DATA_SIZE__ = SIZEOF(.data);
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.bss.SHARED_TOP : {
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__SHARED_TOP_START__ = .;
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*(.bss.SHARED_TOP)
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*(.bss.SHARED_LCS)
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*(.bss.SHARED_CMAC)
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*(.bss.SHARED_HASH)
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. = NEXT(0x00200000);
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__SHARED__END__ = .;
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} > SHARED_SDRAM
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.SHARED_RAM : {
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__FWRAM_START__ = .;
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. += 0;
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. = NEXT(0x0000C000);
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__FWRAM_END__ = .;
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} > SHARED_RAM
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.bss : {
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__BSS_START__ = .;
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*(.bss)
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*(COMMON)
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. = NEXT(64);
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__BSS_END__ = .;
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} > RAM
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stacks (NOLOAD) : ALIGN(64) {
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__STACKS_START__ = .;
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KEEP(*(writer_stack))
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__STACKS_END__ = .;
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} > RAM
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__BSS_SIZE__ = SIZEOF(.bss);
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}
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MMU_BASE_CPU0 = ORIGIN(MMU_CPU0);
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