diff --git b/V4H_Cx_Loader/secure/icumif/renesas_types.h a/V4H_Cx_Loader/secure/icumif/renesas_types.h index 4c63220..5d28109 100644 --- b/V4H_Cx_Loader/secure/icumif/renesas_types.h +++ a/V4H_Cx_Loader/secure/icumif/renesas_types.h @@ -18,28 +18,7 @@ #if !defined (R_TYPEDEFS_H) #define R_TYPEDEFS_H -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -typedef signed char int8_t; -typedef unsigned char uint8_t; -typedef signed short int16_t; -typedef unsigned short uint16_t; -typedef signed int int32_t; -typedef unsigned int uint32_t; -typedef signed long long int64_t; -typedef unsigned long long uint64_t; -typedef unsigned long uintptr_t; - -#define bool _Bool -#define false (0) -#define true (1) - -#define NULL ((void*)0) - -#ifdef __cplusplus -} -#endif /* __cplusplus */ +#include +#include #endif /* R_TYPEDEFS_H */ diff --git b/V4H_Cx_Loader/secure/shared/src/mem_info_def.c a/V4H_Cx_Loader/secure/shared/src/mem_info_def.c index dea5c7b..34ccc7e 100644 --- b/V4H_Cx_Loader/secure/shared/src/mem_info_def.c +++ a/V4H_Cx_Loader/secure/shared/src/mem_info_def.c @@ -25,8 +25,8 @@ #define ICUM_SHAREDMEMORY_1_SIZE (2097152u -1152u) #define ICUM_SHAREDMEMORY_2_ADDR (0x41E00000u) #define ICUM_SHAREDMEMORY_2_SIZE (2097152u) -#define ICUM_SHAREDMEMORY_3_ADDR (0xE2100000u) -#define ICUM_SHAREDMEMORY_3_SIZE (1048576u) +#define ICUM_SHAREDMEMORY_3_ADDR (0xEB231000u) +#define ICUM_SHAREDMEMORY_3_SIZE (0xD000u) #define ICUM_EXPORT_DATA_ADDR (0x41C20000u) #define ICUM_EXPORT_DATA_SIZE (114688u) #define ICUM_DATA_WORKAREA_ADDR (0xEB2E0000u) @@ -172,42 +172,9 @@ const uint32_t memory_information[ICUM_MEMORY_CONFIG_NUM] __attribute__((aligned /*******************************************************************************/ /*******************************************************************************/ -/* ISD request & response queue */ +/* Communication buffer between host and ICU-M */ /*******************************************************************************/ -uint32_t ICUM_QUEUE[ICUM_SERVICEQUEUE_1_SIZE/sizeof(uint32_t)] __attribute__((aligned(32), section(".bss.SHARED_TOP"))); - -/*******************************************************************************/ -/* Output buffer */ -/*******************************************************************************/ -uint8_t strbin[20096] __attribute__((aligned(32), section(".bss.SHARED_TOP"))); - -/*******************************************************************************/ -/* Big buffers for tests */ -/*******************************************************************************/ -uint8_t BIG_BUFFER[4][SIZE_OF_BIG_BUFFER] __attribute__((aligned(256), section(".bss.SHARED_TOP"))); - -/*******************************************************************************/ -/* Communication buffer between host and ICU-M */ -/*******************************************************************************/ -uint8_t ISD_BUFFER[SIZE_OF_ISD_BUFFER] __attribute__((aligned(32), section(".bss.SHARED_TOP"))); - -/*******************************************************************************/ -/* Output buffer */ -/*******************************************************************************/ -uint8_t COM_BUFFER[SIZE_OF_COM_BUFFER] __attribute__((aligned(32), section(".bss.SHARED_TOP"))); - -/*******************************************************************************/ -/* Big buffers ( 256 Byte aligned ) for tests */ -/*******************************************************************************/ -uint8_t DMAC_BUFFE[1][SIZE_OF_BIG_BUFFER] __attribute__((aligned(256), section(".bss.SHARED_TOP"))); -uint8_t DMAC_BUFFE_2[1][SIZE_OF_BIG_BUF2] __attribute__((aligned(256), section(".bss.SHARED_TOP"))); - -/*******************************************************************************/ -/* Big buffers on SDRAM for tests */ -/*******************************************************************************/ -uint8_t BIG_BUF_SD[3][SIZE_OF_BIG_BUFFER] __attribute__((aligned(32), section(".bss.SDRAM"))); - -/*******************************************************************************/ -/* Communication buffer on SDRAM between host and ICU-M */ -/*******************************************************************************/ -uint8_t ISD_BUF_SD[SIZE_OF_ISD_BUFFER] __attribute__((aligned(32), section(".bss.SDRAM"))); +uint8_t ISD_BUFFER[SIZE_OF_ISD_BUFFER] __attribute__((aligned(64), section(".bss.SHARED_TOP"))); +uint8_t LCS_BUFFER[SIZE_OF_LCS_BUFFER] __attribute__((aligned(64), section(".bss.SHARED_LCS"))); +uint8_t CMAC_BUFFER[SIZE_OF_CMAC_BUFFER] __attribute__((aligned(64), section(".bss.SHARED_CMAC"))); +uint8_t HASH_BUFFER[SIZE_OF_HASH_BUFFER] __attribute__((aligned(64), section(".bss.SHARED_HASH"))); diff --git b/V4H_Cx_Loader/secure/shared/src/shared.h a/V4H_Cx_Loader/secure/shared/src/shared.h index b4dec66..5c71428 100644 --- b/V4H_Cx_Loader/secure/shared/src/shared.h +++ a/V4H_Cx_Loader/secure/shared/src/shared.h @@ -29,23 +29,13 @@ /********************************************************************************** * Global external references ***********************************************************************************/ -/** ISD request & response queue */ -extern uint32_t ICUM_QUEUE[]; -/** Big buffers for tests */ -extern uint8_t BIG_BUFFER[][SIZE_OF_BIG_BUFFER]; -/** Communication buffer between host and ICU-M */ -extern uint8_t ISD_BUFFER[SIZE_OF_ISD_BUFFER]; -/** Extended communication buffer */ -extern uint8_t COM_BUFFER[SIZE_OF_COM_BUFFER]; - -extern uint8_t DMAC_BUFFE[][SIZE_OF_BIG_BUFFER]; -extern uint8_t DMAC_BUFFE_2[][SIZE_OF_BIG_BUF2]; - -extern uint8_t BIG_BUF_SD[][SIZE_OF_BIG_BUFFER]; -extern uint8_t ISD_BUF_SD[SIZE_OF_ISD_BUFFER]; - -#if defined(TARGET_DEVICE_S4X) || defined(TARGET_DEVICE_V4H) -extern uint16_t notification_from_cr52[9]; -#endif +#define SIZE_OF_LCS_BUFFER (4U) +#define SIZE_OF_CMAC_BUFFER (16U) +#define SIZE_OF_HASH_BUFFER (32U * 2U) + +extern uint8_t ISD_BUFFER[SIZE_OF_ISD_BUFFER]; +extern uint8_t LCS_BUFFER[SIZE_OF_LCS_BUFFER]; +extern uint8_t CMAC_BUFFER[SIZE_OF_CMAC_BUFFER]; +extern uint8_t HASH_BUFFER[SIZE_OF_HASH_BUFFER]; #endif /* SHARED_H */ diff --git b/V4H_Cx_Loader/secure/user_api/user_icumif_api.c a/V4H_Cx_Loader/secure/user_api/user_icumif_api.c index 4501e8a..a875a20 100644 --- b/V4H_Cx_Loader/secure/user_api/user_icumif_api.c +++ a/V4H_Cx_Loader/secure/user_api/user_icumif_api.c @@ -43,90 +43,12 @@ extern void inv_dcache_range(uintptr_t addr, uint32_t size); void USER_ICUMIF_FlushDCache(uint32_t addr, uint32_t size) { - uint32_t cache_line_addr; - uint32_t flush_size; - uint32_t limit_size; - -#if defined(TARGET_CORTEX_A) && defined(AARCH64) - unsigned long prog_status_reg_64; - __asm volatile ("mrs %[result], DAIF" : [result] "=r" (prog_status_reg_64)); - __asm ("msr DAIFSet, #0x3"); -#else - uint32_t prog_status_reg_32; - __asm volatile ("mrs %[result], CPSR" : [result] "=r" (prog_status_reg_32)); - __asm ("cpsid if"); -#endif - - if (D_CACHE_LIMIT_ADDR > addr) - { - cache_line_addr = addr & D_CACHE_LINE_ADDR_MASK; - flush_size = size + (addr - cache_line_addr); - - /* round to the limit size */ - limit_size = D_CACHE_LIMIT_ADDR - cache_line_addr; - if (flush_size > limit_size) - { - flush_size = limit_size; - } - - flush_dcache_range((uintptr_t)cache_line_addr, flush_size); - } - -#if defined(TARGET_CORTEX_A) && defined(AARCH64) - if (CR52_CPSR_IRQ_DISABLE_STATUS != (prog_status_reg_64 & CR52_CPSR_IRQ_DISABLE_STATUS)) - { - __asm ("msr DAIFClr, #0x3"); - } -#else - if (CR52_CPSR_IRQ_DISABLE_STATUS != (prog_status_reg_32 & CR52_CPSR_IRQ_DISABLE_STATUS)) - { - __asm ("cpsie if"); - } -#endif + /* do nothing */ } void USER_ICUMIF_InvalidateDCache(uint32_t addr, uint32_t size) { - uint32_t cache_line_addr; - uint32_t invalidate_size; - uint32_t limit_size; - -#if defined(TARGET_CORTEX_A) && defined(AARCH64) - unsigned long prog_status_reg_64; - __asm volatile ("mrs %[result], DAIF" : [result] "=r" (prog_status_reg_64)); - __asm ("msr DAIFSet, #0x3"); -#else - uint32_t prog_status_reg_32; - __asm volatile ("mrs %[result], CPSR" : [result] "=r" (prog_status_reg_32)); - __asm ("cpsid if"); -#endif - - if (D_CACHE_LIMIT_ADDR > addr) - { - cache_line_addr = addr & D_CACHE_LINE_ADDR_MASK; - invalidate_size = size + (addr - cache_line_addr); - - /* round to the limit size */ - limit_size = D_CACHE_LIMIT_ADDR - cache_line_addr; - if (invalidate_size > limit_size) - { - invalidate_size = limit_size; - } - - inv_dcache_range(cache_line_addr, invalidate_size); - } - -#if defined(TARGET_CORTEX_A) && defined(AARCH64) - if (CR52_CPSR_IRQ_DISABLE_STATUS != (prog_status_reg_64 & CR52_CPSR_IRQ_DISABLE_STATUS)) - { - __asm ("msr DAIFClr, #0x3"); - } -#else - if (CR52_CPSR_IRQ_DISABLE_STATUS != (prog_status_reg_32 & CR52_CPSR_IRQ_DISABLE_STATUS)) - { - __asm ("cpsie if"); - } -#endif + /* do nothing */ } uint32_t USER_ICUMIF_GetMyPEID(void) @@ -179,4 +101,3 @@ void USER_ICUMIF_Sync(void) { USER_ICUMIF_SYNC(); } -