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/*******************************************************************************
 * DESCRIPTION   : MFIS driver
 ******************************************************************************/
/******************************************************************************
 * @file          mfis.c
 * - Version      : 0.01
 * @brief         Initial setting process of MFIS.
 * .
 *****************************************************************************/
/******************************************************************************
 * History : DD.MM.YYYY Version  Description
 *         : 02.04.2022 0.01     First Release
 *****************************************************************************/

#include <stdint.h>
#include <mem_io.h>
#include <micro_wait.h>
#include <mfis.h>
#include <mfis_register.h>

#define MFIS_CODE_VALID    (0xACCE0000U)
#define MFISWPCNTR_ENABLE  (0U)    /* 1' b0: Enable write protection */

#define MFISLCKR_LCK_BIT   ((uint32_t)1U << 0U)
#define MFISLCKR_UNLOCK    (0U)

void mfis_init(void)
{
    /* Write Protection Control Register */
	/* Enable write protection setting */
    mem_write32(MFIS_WPCNTR, (uint32_t)(MFIS_CODE_VALID + MFISWPCNTR_ENABLE));

    /* IPL considers the situation that mutex of MFIS is not released, release it. */
    mfis_unlock();
}
/* End of function mfis_init(void) */

void mfis_lock(void)
{
    /* MFIS Lock Register [j] (MFISLCKR[j]) */
    /* bit in LCK != 0? */
    while((mem_read32(MFIS_LCKR) & MFISLCKR_LCK_BIT) != MFISLCKR_UNLOCK)
    {
        micro_wait(10U); /* 10us */
    }
    /* this bit is automatically set to "1" */
}
/* End of function mfis_lock(void) */

void mfis_unlock(void)
{
    /* Write Access Control Register */
	/* MFISLCKR[j] Register address setting */
    mem_write32(MFIS_WACNTR, (uint32_t)(MFIS_CODE_VALID + MFISLCKR_ADDRESS));

    /* MFIS Lock Register [j] (MFISLCKR[j]) */
    mem_write32(MFIS_LCKR, (uint32_t)MFISLCKR_UNLOCK);
}
/* End of function mfis_unlock(void) */