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/*******************************************************************************
 * DESCRIPTION   : Interrupt controler driver
 ******************************************************************************/
/******************************************************************************
 * @file          intc.c
 * - Version      : 0.02
 * @brief         Interrupt controler driver.
 * .
 *****************************************************************************/
/******************************************************************************
 * History : DD.MM.YYYY Version  Description
 *         : 06.01.2022 0.01     First Release
 *         : 05,04.2023 0.02     Remove string.h
 *****************************************************************************/
#include <v800_ghs.h>
#include <stdint.h>
#include <mem_io.h>
#include <rst_register.h>
#include <intc.h>
#include <log.h>
#include <cpu.h>
#include <intc.h>

#define INTC_EI_MAX		(64U)
#define INTC_EI_ID_MASK	(0xFFU)

#define ICUMX_IC_MK_BIT	(0x0080U)	/* Interrupt request mask */
#define ICUMX_IC_TB_BIT	(0x0040U)	/* Vector table selection system */
#define ICUMX_IC_PRIORITY_MASK	(0x0007U)

#define INT_FLG_ENABLE	(0x10U)
#define INT_FLG_DISABLE	(0x00U)

#define EXCEPTION_SOURCE_CODE_BIT	(0x1000U)


typedef struct {
	INT_HANDLER	handler;
	uint32_t	arg;
	uint32_t	flg;
} INTC_HDR_TBL;

static INTC_HDR_TBL	s_intc_tbl[INTC_EI_MAX];

void intc_set_interrupt(uint32_t int_no, uint32_t level, INT_HANDLER cb)
{
	uint16_t reg;
	__DI();

	/* check Exception Source code */
	if (INTC_EI_MAX <= int_no)
	{
		ERROR("Undefined Exception Source code error.(0x%x)\n", int_no);
		panic;
	}

	/* set interrupt handler */
	s_intc_tbl[int_no].handler = cb;
	s_intc_tbl[int_no].flg = INT_FLG_ENABLE;

	/* the interrupt enable */
	reg = mem_read16(get_icumx_ic_addr(int_no));
	reg &= (~(ICUMX_IC_MK_BIT) | ICUMX_IC_PRIORITY_MASK);
	reg |= (ICUMX_IC_TB_BIT | (level & ICUMX_IC_PRIORITY_MASK));
	mem_write16(get_icumx_ic_addr(int_no), reg);

	__EI();
}
/* End of function intc_set_interrupt(uint32_t int_no, uint32_t level, INT_HANDLER cb) */


void intc_disable_interrupt(uint32_t int_no)
{
	uint16_t reg;
	__DI();

	/* check Exception Source code */
	if (INTC_EI_MAX <= int_no)
	{
		ERROR("Undefined Exception Source code error.(0x%x)\n", int_no);
		panic;
	}

	/* check interrupt enable flag */
	if (INT_FLG_DISABLE == (s_intc_tbl[int_no].flg & INT_FLG_ENABLE))
	{
		ERROR("Execption disabled.(0x%x)\n", int_no);
		panic;
	}

	/* the interrupt disable */
	s_intc_tbl[int_no].flg &= ~INT_FLG_ENABLE;
	reg = mem_read16(get_icumx_ic_addr(int_no));
	reg &= ~(ICUMX_IC_TB_BIT);
	reg |= ICUMX_IC_MK_BIT;
	mem_write16(get_icumx_ic_addr(int_no), reg);

	__EI();
}
/* End of function intc_disable_interrupt(uint32_t int_no) */

#pragma ghs interrupt(nonreentrant)
void intc_handler(void)
{
	uint32_t reg;
	uint32_t int_no;
	reg = __STSR(EIIC);

	/* check Exception Source code */
	if ((reg & EXCEPTION_SOURCE_CODE_BIT) == 0U)
	{
		ERROR("Undefined Exception Source code error.(0x%x)\n", reg);
		panic;
	}
	int_no = reg & INTC_EI_ID_MASK;
	if (INTC_EI_MAX <= int_no)
	{
		ERROR("Undefined Exception Source code error.(0x%x)\n", int_no);
		panic;
	}

	/* check interrupt enable flag */
	if (INT_FLG_DISABLE == (s_intc_tbl[int_no].flg & INT_FLG_ENABLE))
	{
		ERROR("Execption disabled.(0x%x)\n", int_no);
		panic;
	}

	/* execute interrupt handler */
	s_intc_tbl[int_no].handler(int_no, s_intc_tbl[int_no].arg);
}
/* End of function intc_handler(void) */