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/*******************************************************************************
 * DESCRIPTION   : SCIF register header
 ******************************************************************************/


#ifndef SCIF_REGISTER_H_
#define SCIF_REGISTER_H_

#include <remap_register.h>

/* SCIF base address */
/* S4:0xE6C50000(CH3), V4H:0xE6E60000(CH0) */
#define SCIF_BASE   (BASE_SCIF_ADDR)

#define SCIF_SCSMR  (SCIF_BASE + 0x0000U)   /*  16  Serial mode register */
#define SCIF_SCBRR  (SCIF_BASE + 0x0004U)   /*  8   Bit rate register */
#define SCIF_SCSCR  (SCIF_BASE + 0x0008U)   /*  16  Serial control register */
#define SCIF_SCFTDR (SCIF_BASE + 0x000CU)   /*  8   Transmit FIFO data register */
#define SCIF_SCFSR  (SCIF_BASE + 0x0010U)   /*  16  Serial status register */
#define SCIF_SCFCR  (SCIF_BASE + 0x0018U)   /*  16  FIFO control register */
#define SCIF_SCLSR  (SCIF_BASE + 0x0024U)   /*  16  Line status register */
#define SCIF_CKS    (SCIF_BASE + 0x0034U)   /*  16  Clock Select register */

#endif /* SCIF_REGISTER_H_ */