/******************************************************************************* * DISCLAIMER * This software is supplied by Renesas Electronics Corporation and is only * intended for use with Renesas products. No other uses are authorized. This * software is owned by Renesas Electronics Corporation and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this software * and to discontinue the availability of this software. By using this software, * you agree to the additional terms and conditions found by accessing the * following link: * http://www.renesas.com/disclaimer * Copyright 2018-2022 Renesas Electronics Corporation All rights reserved. *******************************************************************************/ /******************************************************************************* * DESCRIPTION : Image load function ******************************************************************************/ /****************************************************************************** * @file loader_exceptions.S * - Version : 0.02 * @brief * . *****************************************************************************/ /****************************************************************************** * History : DD.MM.YYYY Version Description * : 02.08.2022 0.01 First Release * : 31.10.2022 0.02 License notation change. *****************************************************************************/ #define SYNC_SP_EL0 (0x0U) #define IRQ_SP_EL0 (0x1U) #define FIQ_SP_EL0 (0x2U) #define SERROR_SP_EL0 (0x3U) #define SYNC_SP_ELX (0x4U) #define IRQ_SP_ELX (0x5U) #define FIQ_SP_ELX (0x6U) #define SERROR_SP_ELX (0x7U) #define SYNC_AARCH64 (0x8U) #define IRQ_AARCH64 (0x9U) #define FIQ_AARCH64 (0xAU) #define SERROR_AARCH64 (0xBU) #define SYNC_AARCH32 (0xCU) #define IRQ_AARCH32 (0xDU) #define FIQ_AARCH32 (0xEU) #define SERROR_AARCH32 (0xFU) .global loader_exceptions .global SyncSP0 .global IrqSP0 .global FiqSP0 .global SErrorSP0 .global SyncSPx .global IrqSPx .global FiqSPx .global SErrorSPx .global SyncA64 .global IrqA64 .global FiqA64 .global SErrorA64 .global SyncA32 .global IrqA32 .global FiqA32 .global SErrorA32 /* Pre macro for a vector */ .macro bigin_vector label, section_name=.vectors .cfi_sections .debug_frame .section \section_name, "ax" .align 7, 0 .type \label, %function .cfi_startproc \label: .endm /* Post macro for a vector */ .macro end_vector label .cfi_endproc .fill \label + (32 * 4) - . .endm /*****************************************************************************/ /* Exception Vector Table */ /*****************************************************************************/ .section .vectors, "ax" .align 11, 0 loader_exceptions: /***********************/ /* Current EL with SP0 */ /***********************/ bigin_vector SyncSP0 mov x0, #SYNC_SP_EL0 msr spsel, #0 bl handler_error end_vector SyncSP0 bigin_vector IrqSP0 mov x0, #IRQ_SP_EL0 msr spsel, #0 bl handler_error end_vector IrqSP0 bigin_vector FiqSP0 mov x0, #FIQ_SP_EL0 msr spsel, #0 b handler_fiq end_vector FiqSP0 bigin_vector SErrorSP0 mov x0, #SERROR_SP_EL0 msr spsel, #0 bl handler_error end_vector SErrorSP0 /***********************/ /* Current EL with SPx */ /***********************/ bigin_vector SyncSPx mov x0, #SYNC_SP_ELX msr spsel, #0 bl handler_error end_vector SyncSPx bigin_vector IrqSPx mov x0, #IRQ_SP_ELX msr spsel, #0 bl handler_error end_vector IrqSPx bigin_vector FiqSPx mov x0, #FIQ_SP_ELX msr spsel, #0 bl handler_error end_vector FiqSPx bigin_vector SErrorSPx mov x0, #SERROR_SP_ELX msr spsel, #0 bl handler_error end_vector SErrorSPx /**************************/ /* Lower EL using AArch64 */ /**************************/ bigin_vector SyncA64 mov x0, #SYNC_AARCH64 msr spsel, #0 bl handler_error end_vector SyncA64 bigin_vector IrqA64 mov x0, #IRQ_AARCH64 msr spsel, #0 bl handler_error end_vector IrqA64 bigin_vector FiqA64 mov x0, #FIQ_AARCH64 msr spsel, #0 bl handler_error end_vector FiqA64 bigin_vector SErrorA64 mov x0, #SERROR_AARCH64 msr spsel, #0 bl handler_error end_vector SErrorA64 /**************************/ /* Lower EL using AArch32 */ /**************************/ bigin_vector SyncA32 mov x0, #SYNC_AARCH32 msr spsel, #0 bl handler_error end_vector SyncA32 bigin_vector IrqA32 mov x0, #IRQ_AARCH32 msr spsel, #0 bl handler_error end_vector IrqA32 bigin_vector FiqA32 mov x0, #FIQ_AARCH32 msr spsel, #0 bl handler_error end_vector FiqA32 bigin_vector SErrorA32 mov x0, #SERROR_AARCH32 msr spsel, #0 bl handler_error end_vector SErrorA32