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/*******************************************************************************
 * DESCRIPTION   : Watchdog Timer function
 ******************************************************************************/
/******************************************************************************
 * @file          swdt.c
 * - Version      : 0.02
 * @brief
 * .
 *****************************************************************************/
/******************************************************************************
 * History : DD.MM.YYYY Version  Description
 *         : 12.08.2022 0.01     First Release
 *         : 31.10.2022 0.02     License notation change.
*****************************************************************************/
#include "mem_io.h"
#include "rcar_def.h"
#include "rcar_register.h"
#include "swdt.h"
#include "gic.h"
#include "log.h"
#include "ip_control.h"

void swdt_init(void)
{
    uint32_t sr;
    uint32_t reg;
    uint32_t val;
    uint32_t chk_data;

    /* 1. Clear the TME bit in SWTCSRA to 0 to temporarily stop counting. */
    reg = mem_read32(SWDT_WTCSRA) & WTCSRA_TME;
    if (WTCSRA_TME == reg)
    {
        mem_write32(SWDT_WTCSRA, WTCSRA_UPPER_BYTE);
    }

    /* 2.Write the set value in SWTCNT */
    /* OSCCLK check */
    reg = mem_read32(RST_MODEMR0);
    chk_data = reg & CHECK_MD13_MD14;

    val = WTCNT_UPPER_BYTE;

	if (MD14_MD13_TYPE_0 == chk_data)
    {
        val |= SWDTCNT_133330HZ;
    }
    else if(MD14_MD13_TYPE_1 == chk_data)
    {
        val |= SWDTCNT_131570HZ;
    }
    else if(MD14_MD13_TYPE_3 == chk_data)
    {
        val |= SWDTCNT_131570HZ;
    }
    else
    {
        ERROR("MODEMR ERROR value = 0x%x\n", chk_data);
        panic;
    }

    mem_write32(SWDT_WTCNT, val);

    /* 3. Clear the bit4(WOVF) in SWTCSRA to 0. */
    mem_write32(SWDT_WTCSRA, WTCSRA_UPPER_BYTE | WTCSRA_WOVFE | WTCSRA_CKS0_OSCCLK);

    /* 5.Confirm that SWTCSRA.WRFLG becomes 0.*/
    while (true)
    {
        if ((mem_read32(SWDT_WTCSRA) & WTCSRA_WRFLG) == 0U)
        {
            break;
        }
    }

    /* 6. Start the counting by setting the TME bit in SWTCSRA to 1. */
    sr = mem_read32(SWDT_WTCSRA) & WTCSRA_MASK_ALL;

    mem_write32(SWDT_WTCSRA, (WTCSRA_UPPER_BYTE | sr | WTCSRA_TME));

}
/* End of function swdt_init(void) */

void swdt_release(void)
{

    mem_write32(SWDT_WTCSRA, WTCSRA_INIT_DATA);
    mem_write32(SWDT_WTCNT, WTCNT_INIT_DATA);
}
/* End of function swdt_release(void) */

void swdt_exec(void)
{
    ERROR("System Watchdog Timer overflow.\n");
    panic;
}
/* End of function swdt_exec(void) */