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/*******************************************************************************
 * DESCRIPTION   : Image load function by SDMAC on ICUMX
 ******************************************************************************/
/******************************************************************************
 * @file          sdmac.c
 * - Version      : 0.01
 * @brief         Driver of SCMAC on ICUMX.
 * .
 *****************************************************************************/
/******************************************************************************
 * History : DD.MM.YYYY Version  Description
 *         : 21.06.2022 0.01     First Release
 *****************************************************************************/

/* indelude */
#include <stdint.h>
#include <mem_io.h>
#include <log.h>
#include <dma.h>
#include <sdmac.h>
#include <wdt.h>

void icu_sdmac_trans_start(const LOAD_INFO *li)
{
    uint16_t reg;
    uint32_t len = li->image_size;

    /* src_addr and boot_addr must be 64-byte boundary. */
    dma_address_align_check(li->boot_addr, li->src_addr);

    /* If len is not 64-byte boundary,   */
    /* round up len to 64-byte boundary. */
    len += SDMAC_FRACTION_MASK_64_BYTE;
    len &= ~(SDMAC_FRACTION_MASK_64_BYTE);

    /* Clear channel 0 registers */
    mem_write32(ICUMX_DMACHRST, ICUMX_DMACHRST_CLR_CH0);
    /* Clear flags */
    mem_write32(ICUMX_DMACHFCR_0, ICUMX_DMACHFCR_INIT);
    /* Round-robin mode / Enable DMA transfer */
    mem_write16(ICUMX_DMAOR, ICUMX_DMAOR_INIT);

    /* DMA Transfer mode                                *
     * Slow speed mode                  : Normal mode   *
     * Priority setting                 : Disable       *
     * Transfer Request source          : Auto Request  *
     * Destination Address mode         : Fixed         *
     * Source address mode              : Incremented   *
     * DMA destination transaction size : 64byte        *
     * DMA source transaction size      : 64byte        */
    mem_write32(ICUMX_DMATMR_0, ICUMX_DMATMR_0_INIT);

    /* Set destination address */
    mem_write32(ICUMX_DMADAR_0, li->boot_addr);
    /* Set source address */
    mem_write32(ICUMX_DMASAR_0, li->src_addr);
    /* Set transfer size */
    mem_write32(ICUMX_DMATSR_0, len);
    reg = mem_read16(ICUMX_DMACHCR_0);
    /* Enable channel address error notification / Enable DMA */
    reg |= ICUMX_DMACHCR_0_START;
    mem_write16(ICUMX_DMACHCR_0, reg);
}
/* End of function icu_sdmac_trans_start(LOAD_INFO *li) */

void icu_sdmac_trans_end(void)
{
    uint32_t reg;

    wdt_restart();
    /* Check end of DMA transfer. */
    do
    {
        reg = mem_read32(ICUMX_DMACHSTA_0);
        /* Check error of DMA transfer */
        if ((reg & ICUMX_DMACHSTA_CAE) != DMACHSTA_CAE_BIT_NOERROR)
        {
            ERROR("SDMAC on ICUMX - Channel Address Error\n");
            panic;
        }
    } while ((reg & ICUMX_DMACHSTA_TE) != DMACHSTA_TE_END_DMA);

    /* Clear flags */
    mem_write32(ICUMX_DMACHFCR_0, ICUMX_DMACHFCR_INIT);
}
/* End of function icu_sdmac_trans_end(void) */