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/*******************************************************************************
 * DESCRIPTION   : swdt header
 ******************************************************************************/
/******************************************************************************
 * @file          swdt.h
 * - Version      : 0.02
 * @brief         
 * .
 *****************************************************************************/
/******************************************************************************
 * History : DD.MM.YYYY Version  Description
 *         : 12.08.2022 0.01     First Release
 *         : 31.10.2022 0.02     License notation change.
 *****************************************************************************/
#ifndef SWDT_H_
#define SWDT_H_

#include <stdint.h>
#include "mem_io.h"
#include "rst_register.h"

#define SWDT_BASE              (0xE6030000U)
#define SWDT_WTCNT             (SWDT_BASE + 0x0000U)
#define SWDT_WTCSRA            (SWDT_BASE + 0x0004U)
#define SWDT_WTCSRB            (SWDT_BASE + 0x0008U)

#define WTCNT_UPPER_BYTE       (0x5A5A0000U)
#define WTCSRA_UPPER_BYTE      (0xA5A5A500U)
#define WTCSRB_UPPER_BYTE      (0xA5A5A500U)
#define WTCNT_RESET_VALUE      (0xF488U)
#define WTCSRA_BIT_CKS         (0x0007U)
#define WTCSRB_BIT_CKS         (0x003FU)
#define SWDT_RSTMSK            (0U << 1U)
#define WTCSRA_WOVFE           (1U << 3U)
#define WTCSRA_WRFLG           (1U << 5U)
#define WTCSRA_TME             (1U << 7U)

#define WDTRSTCR_MASK_ALL      (0x0000FFFFU)
#define WTCSRA_MASK_ALL        (0x000000FFU)
#define WTCNT_INIT_DATA        (WTCNT_UPPER_BYTE + WTCNT_RESET_VALUE)
#define WTCSRA_INIT_DATA       (WTCSRA_UPPER_BYTE + 0x0FU)
#define WTCSRB_INIT_DATA       (WTCSRB_UPPER_BYTE + 0x21U)

/* CKS0 setting */
#define OSCCLK_32              (32U)          /* 011:OSCCLK/32 */
#define WTCSRA_CKS0_OSCCLK     (0x00000003U)

/* WDT Timeout Setting */
/* OSCCLK */
#define OSCCLK_133330HZ        (133330U)      /* MD13=0 MD14=0*/
#define OSCCLK_131570HZ        (131570U)      /* MD13=H MD14=L*/

/* clock */
/* (micro sec / (Hz / RPhi) */
#define CLK_133330HZ           ((uint32_t)((1U * 1000U * 1000U) \
                               / (OSCCLK_133330HZ / OSCCLK_32)))
#define CLK_131570HZ           ((uint32_t)((1U * 1000U * 1000U) \
                               / (OSCCLK_131570HZ / OSCCLK_32)))

#define SWDT_COUNT_SEC         (10U)           /* set param(1--10sec) */

/* SWDT over flow sec need count*/
#define SWDT_COUNT_133330HZ    ((uint32_t)((SWDT_COUNT_SEC * 1000U * 1000U) \
                               / CLK_133330HZ))
#define SWDT_COUNT_131570HZ    ((uint32_t)((SWDT_COUNT_SEC * 1000U * 1000U) \
                               / CLK_131570HZ))

#define SWDTCNT_133330HZ       (0x10000U - SWDT_COUNT_133330HZ)
#define SWDTCNT_131570HZ       (0x10000U - SWDT_COUNT_131570HZ)

#define MD14_MD13_TYPE_0       (0x00000000U)   /* MD14=0 MD13=0 */
#define MD14_MD13_TYPE_1       (0x00002000U)   /* MD14=0 MD13=1 */
#define MD14_MD13_TYPE_3       (0x00006000U)   /* MD14=1 MD13=1 */
#define CHECK_MD13_MD14        (0x00006000U)

/* Prototype */
void swdt_init(void);
void swdt_exec(void);
void swdt_release(void);
#endif /* SWDT_H_ */
