/*******************************************************************************
 * Copyright (c) 2018-2021 Renesas Electronics Corporation. All rights reserved.
 *
 *     RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY
 *
 * This software is provided as reference/sample code under the license
 * agreement between Renesas Electronics Corporation and licensee (the
 * "License Agreement") and shall be treated as specified in the License
 * Agreement.
 * These instructions, statements, and software are the confidential
 * information of Renesas Electronics Corporation. They must be used and
 * modified solely for the purpose for which it was furnished by Renesas
 * Electronics Corporation. All or part of these instructions, statements and
 * software must not be reproduced nor disclosed to any third party in any
 * form, unless permitted by the License Agreement.
 *
 * THIS SOFTWARE IS PROVIDED BY RENESAS ELEOCTRONICS CORPORATION "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
 * SATISFACTORY QUALITY, ACCURACY, TITLE AND NON-INFRINGEMENT ARE DISCLAIMED.
 * IN NO EVENT SHALL RENESAS ELECTRONICS CORPORATION BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 ******************************************************************************/

/*******************************************************************************
 * DESCRIPTION   : MFIS register header
 ******************************************************************************/

#ifndef MFIS_REGISTER_H_
#define MFIS_REGISTER_H_

#include <remap_register.h>

/* MFIS */
#define MFIS_BASE   (BASE_MFIS_ADDR)

#define MFIS_MFIERRCTLR0        (MFIS_BASE + 0x0200U)
#define MFIS_MFIERRCTLR1        (MFIS_BASE + 0x0204U)
#define MFIS_MFIERRCTLR2        (MFIS_BASE + 0x0208U)
#define MFIS_MFIERRCTLR3        (MFIS_BASE + 0x020CU)
#define MFIS_MFIERRCTLR4        (MFIS_BASE + 0x0210U)
#define MFIS_MFIERRCTLR5        (MFIS_BASE + 0x0214U)
#define MFIS_MFIERRCTLR6        (MFIS_BASE + 0x0218U)
#define MFIS_MFIERRCTLR7        (MFIS_BASE + 0x0260U)
#define MFIS_MFIERRCTLR8        (MFIS_BASE + 0x026CU)
#define MFIS_MFIERRCTLR9        (MFIS_BASE + 0x0804U)
#define MFIS_MFIERRCTLR10       (MFIS_BASE + 0x0808U)
#define MFIS_MFIERRCTLR11       (MFIS_BASE + 0x080CU)
#define MFIS_MFIERRCTLR12       (MFIS_BASE + 0x0908U)
#define MFIS_MFIERRCTLR13       (MFIS_BASE + 0x0918U)

#define MFIS_MFIERRTGTR0        (MFIS_BASE + 0x0280U)
#define MFIS_MFIERRTGTR1        (MFIS_BASE + 0x0284U)
#define MFIS_MFIERRTGTR2        (MFIS_BASE + 0x0288U)
#define MFIS_MFIERRTGTR3        (MFIS_BASE + 0x028CU)
#define MFIS_MFIERRTGTR4        (MFIS_BASE + 0x0290U)
#define MFIS_MFIERRTGTR5        (MFIS_BASE + 0x0294U)
#define MFIS_MFIERRTGTR6        (MFIS_BASE + 0x025CU)
#define MFIS_MFIERRTGTR7        (MFIS_BASE + 0x0268U)
#define MFIS_MFIERRTGTR8        (MFIS_BASE + 0x0274U)
#define MFIS_MFIERRTGTR9        (MFIS_BASE + 0x081CU)
#define MFIS_MFIERRTGTR10       (MFIS_BASE + 0x0820U)
#define MFIS_MFIERRTGTR11       (MFIS_BASE + 0x0824U)
#define MFIS_MFIERRTGTR12       (MFIS_BASE + 0x0910U)
#define MFIS_MFIERRTGTR13       (MFIS_BASE + 0x0920U)

#define MFIS_MFISBTSTSR         (MFIS_BASE + 0x0604U)
#define MFIS_MFIEXTRQMSKCNTR    (MFIS_BASE + 0x08A0U)
#define MFIS_MFISWPCNTR         (MFIS_BASE + 0x0900U)
#define MFIS_MFISWACNTR         (MFIS_BASE + 0x0904U)

#endif /* MFIS_REGISTER_H_ */
