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/*******************************************************************************
 * DESCRIPTION   : EDC's control function
 ******************************************************************************/
/******************************************************************************
 * @file          edcinten.c
 * - Version      : 0.01
 * @brief         Initial setting controller.
 * .
 *****************************************************************************/
/******************************************************************************
 * History : DD.MM.YYYY Version  Description
 *         : 18.08.2021 0.01     First Release
 *****************************************************************************/
#include <edcinten.h>
#include <axi_register.h>
#include <mem_io.h>
#include <log.h>

/* define */
#define EDC_BIT_24              (((uint32_t)1U) << 24U)
#define EDC_BIT_0               (((uint32_t)1U) << 0U)
#define EDC_EDCINTEN0_VALID_ALL (0xFC04EFFFU)
#define EDC_EDCINTEN1_VALID_ALL (0xFDFBE000U)
#define EDC_EDCINTEN2_VALID_ALL (0xDFFFFFFCU)
#define EDC_EDCINTEN3_VALID_ALL (0x7C57FFBFU)
#define EDC_EDCINTEN5_VALID_ALL (0xFFFFFFFFU)
#define EDC_EDCINTEN6_VALID_ALL (0xC0FE3BF1U)
#define EDC_EDCINTEN7_VALID_ALL (0x000007FFU)


void edc_init(void)
{
    uint32_t reg;

    /* 4.3.16 EDC for RT-SRAM AXI Interface */
    reg = mem_read32(EDCINTEN5);
    reg |= (uint32_t)EDC_BIT_24;
    mem_write32(EDCINTEN5, reg);

    /* 4.3.23 EDC for RT-SRAM */
    reg = mem_read32(EDC_CFG);
    reg |= (uint32_t)EDC_BIT_0;
    mem_write32(EDC_CFG, reg);

    /* 4.3.4 EDC for AXI-bus */
    reg = mem_read32(EDCINTEN0);
    reg |= (uint32_t)EDC_EDCINTEN0_VALID_ALL;
    mem_write32(EDCINTEN0, reg);
    reg = mem_read32(EDCINTEN1);
    reg |= (uint32_t)EDC_EDCINTEN1_VALID_ALL;
    mem_write32(EDCINTEN1, reg);
    reg = mem_read32(EDCINTEN2);
    reg |= (uint32_t)EDC_EDCINTEN2_VALID_ALL;
    mem_write32(EDCINTEN2, reg);
    reg = mem_read32(EDCINTEN3);
    reg |= (uint32_t)EDC_EDCINTEN3_VALID_ALL;
    mem_write32(EDCINTEN3, reg);
    reg = mem_read32(EDCINTEN5);
    reg |= (uint32_t)EDC_EDCINTEN5_VALID_ALL;
    mem_write32(EDCINTEN5, reg);
    reg = mem_read32(EDCINTEN6);
    reg |= (uint32_t)EDC_EDCINTEN6_VALID_ALL;
    mem_write32(EDCINTEN6, reg);
    reg = mem_read32(EDCINTEN7);
    reg |= (uint32_t)EDC_EDCINTEN7_VALID_ALL;
    mem_write32(EDCINTEN7, reg);

}
/* End of function edc_init(void) */
