diff --git a/2_Branches/HKL_V4M/Arxml/Customer_Board/Can.arxml b/2_Branches/HKL_V4M/Arxml/Customer_Board/Can.arxml new file mode 100644 index 0000000..02ec211 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/Customer_Board/Can.arxml @@ -0,0 +1,1655 @@ + + + + + Can + + + Can + /Renesas/EcucDefs_Can/Can + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Can/Can_Impl + + + CanConfigSet + /Renesas/EcucDefs_Can/Can/CanConfigSet + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanControllerPclkClock + /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD2Clk + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanControllerPplClock + /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk + + + + + ACAN1 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanBusoffProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerActivation + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaseAddress + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerId + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerInterfaceMode + CAN_FD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerSelection + RSCANFD01 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableCanCanFDGateway + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableTransmitHistoryInterrupt + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayBRSBit + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayForwardingFormat + CLASSICAL_CAN_FORMAT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanRxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupFunctionalityAPI + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupSupport + 0 + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerDefaultBaudrate + /Can/Can/CanConfigSet/ACAN1/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanCpuClockRef + /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + + + CanControllerBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRate + 500.0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRateConfigID + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg1 + 63 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg2 + 16 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSyncJumpWidth + 2 + + + + + CanControllerFdBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerFdBaudRate + 2000.0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg1 + 14 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg2 + 5 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSyncJumpWidth + 2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerTxBitRateSwitch + 1 + + + + + + + + + ACAN2 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanBusoffProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerActivation + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaseAddress + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerId + 2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerInterfaceMode + CAN_FD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerSelection + RSCANFD03 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableCanCanFDGateway + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableTransmitHistoryInterrupt + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayBRSBit + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayForwardingFormat + CLASSICAL_CAN_FORMAT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanRxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupFunctionalityAPI + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupSupport + 0 + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerDefaultBaudrate + /Can/Can/CanConfigSet/ACAN2/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanCpuClockRef + /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + + + CanControllerBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRate + 500.0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRateConfigID + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg1 + 63 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg2 + 16 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSyncJumpWidth + 2 + + + + + CanControllerFdBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerFdBaudRate + 2000.0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg1 + 14 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg2 + 5 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSyncJumpWidth + 2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerTxBitRateSwitch + 1 + + + + + + + + + HL_Klemove + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanBusoffProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerActivation + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaseAddress + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerId + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerInterfaceMode + CAN_FD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerSelection + RSCANFD00 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableCanCanFDGateway + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableTransmitHistoryInterrupt + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayBRSBit + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayForwardingFormat + CLASSICAL_CAN_FORMAT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanRxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTransmitHistoryInterruptSrcSel + EACH_MESSAGE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupFunctionalityAPI + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupSupport + 0 + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerDefaultBaudrate + /Can/Can/CanConfigSet/HL_Klemove/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanCpuClockRef + /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + + + CanControllerBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRate + 500.0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRateConfigID + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg1 + 63 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg2 + 16 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSyncJumpWidth + 2 + + + + + CanControllerFdBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerFdBaudRate + 2000.0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg1 + 14 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg2 + 5 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSyncJumpWidth + 2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerTxBitRateSwitch + 1 + + + + + + + + + RCAN + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanBusoffProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerActivation + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaseAddress + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerId + 3 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerInterfaceMode + CAN_FD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerSelection + RSCANFD02 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableCanCanFDGateway + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableTransmitHistoryInterrupt + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayBRSBit + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayForwardingFormat + CLASSICAL_CAN_FORMAT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanRxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupFunctionalityAPI + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupSupport + 0 + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerDefaultBaudrate + /Can/Can/CanConfigSet/RCAN/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanCpuClockRef + /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + + + CanControllerBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRate + 500.0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRateConfigID + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg1 + 63 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg2 + 16 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSyncJumpWidth + 2 + + + + + CanControllerFdBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerFdBaudRate + 2000.0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg1 + 14 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg2 + 5 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSyncJumpWidth + 2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerTxBitRateSwitch + 1 + + + + + + + + + CCHOHGroup1_0 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 352 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + CCHOHGroup1_1 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 480 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + CCHOHGroup1_2 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 3 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 689 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + ECAN_TX_165 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + FULL + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 10 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + ECAN_TX_16A + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + FULL + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 14 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + ECAN_TX_170 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + FULL + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 9 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + ECAN_TX_D2 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + FULL + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 8 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + HOH_0_ACAN1 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 4 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/ACAN1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + EXTENDED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + HOH_0_ACAN2 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 5 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/ACAN2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + EXTENDED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + HOH_0_HL_Klemove + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + HOH_0_RCAN + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 6 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/RCAN + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + EXTENDED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + HOH_4_ACAN1 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 11 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/ACAN1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + EXTENDED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + HOH_4_ACAN2 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 12 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/ACAN2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + EXTENDED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + HOH_4_HL_Klemove + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 7 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/HL_Klemove + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + EXTENDED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + HOH_4_RCAN + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 13 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /Can/Can/CanConfigSet/RCAN + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + EXTENDED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + + + + + + + CanDemEventParameterRefs + /Renesas/EcucDefs_Can/Can/CanDemEventParameterRefs + + + /Renesas/EcucDefs_Can/Can/CanDemEventParameterRefs/CAN_E_TIMEOUT_FAILURE + /Dem/Dem/DemConfigSet/CAN_E_TIMEOUT_FAILURE + + + + + CanGeneral + /Renesas/EcucDefs_Can/Can/CanGeneral + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanAlreadyInitDetCheck + 1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanCriticalSectionProtection + 1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanDevErrorDetect + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanDeviceName + V4M + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanEccErrorCorrect + 1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanEnableClkImmediateValue + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanIndex + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanIsrCategory + CAT1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionBusoffPeriod + 0.02 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionModePeriod + 0.02 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMultiplexedTransmission + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanPublicIcomSupport + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanRamTestApi + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanSelfTestApi + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanTimeoutDuration + 0.001 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanUnintendedInterruptCheck + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanVersionCheckExternalModules + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanVersionInfoApi + 0 + + + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanOsCounterRef + /Os/Os/HwCounter + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanSupportTTCANRef + + + + + CanMainFunctionRWPeriods + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionRWPeriods/CanMainFunctionPeriod + 0.02 + + + + + + + CanGlobalConfiguration + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanClockSourceSelect + CLKC + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanEnableDLCCheck + 0 + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanHardwareUnitSelect + RSCANFD0 + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanIntervalTimerPrescalerSet + 16 + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanMirrorFunctionSupport + 0 + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanPayloadOverflowModeSelect + DISCARD + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanRxBufferPayloadLength + PAYLOAD_8 + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanTransmitPrioritySelect + DEPEND_ON_ID + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/Customer_Board/Port.arxml b/2_Branches/HKL_V4M/Arxml/Customer_Board/Port.arxml new file mode 100644 index 0000000..244eb4d --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/Customer_Board/Port.arxml @@ -0,0 +1,114 @@ + + + + + Port + + + Port + /Renesas/EcucDefs_Port/Port + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Port/Port_Impl + + + PortConfigSet + /Renesas/EcucDefs_Port/Port/PortConfigSet + + + PortFilterGroupConfig + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig + + + + + PortDemEventParameterRefs + /Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs + + + /Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_FUSE_MONITORING_FAILURE + /Dem/Dem/DemConfigSet/PORT_E_FUSE_MONITORING_FAILURE + + + /Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_GET_CONTROL_FAILURE + /Dem/Dem/DemConfigSet/PORT_E_GET_CONTROL_FAILURE + + + /Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_UNINTENDED_MODULE_STOP_FAILURE + /Dem/Dem/DemConfigSet/PORT_E_UNINTENDED_MODULE_STOP_FAILURE + + + + + PortGeneral + /Renesas/EcucDefs_Port/Port/PortGeneral + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortCriticalSectionProtection + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortDevErrorDetect + 1 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortDeviceName + V4M + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveControl + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveSelection + MFISLCKR0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveTimeout + 256410 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortFUSEMonitoringApi + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortMaxMode + 5 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinDefaultDirectionApi + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinDirectionApi + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinModeApi + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortSetToDioAltModeApi + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortUnintendedModuleStopCheck + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortVersionCheckExternalModules + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortVersionInfoApi + 0 + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_CAN_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_CAN_V4M_Sample.arxml new file mode 100644 index 0000000..5f4d899 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_CAN_V4M_Sample.arxml @@ -0,0 +1,975 @@ + + + + + ActiveEcuC + + + Can + + + + false + + + + /Renesas/EcucDefs_Can/Can + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Can/Can_Impl + + + CanConfigSet0 + /Renesas/EcucDefs_Can/Can/CanConfigSet + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanControllerPplClockImmediateValue + 80000000 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanControllerPclkClockImmediateValue + 133333333 + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanControllerPclkClock + /ActiveEcuC/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD2Clk + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanControllerPplClock + /ActiveEcuC/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk + + + + + CanController0 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanBusoffProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerActivation + true + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerId + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanRxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTxProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupSupport + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableTransmitHistoryInterrupt + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerSelection + RSCANFD00 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerInterfaceMode + CAN_FD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableCanCanFDGateway + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayForwardingFormat + CLASSICAL_CAN_FORMAT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayBRSBit + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaseAddress + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupFunctionalityAPI + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTransmitHistoryInterruptSrcSel + EACH_MESSAGE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerDefaultBaudrate + + + DV:UserDefined + + + /ActiveEcuC/Can/CanConfigSet0/CanController0/CanControllerBaudrateConfig0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanCpuClockRef + /EcucDefs/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + + + CanControllerBaudrateConfig0 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRate + 250 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRateConfigID + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg1 + 13 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg2 + 6 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSyncJumpWidth + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerPropSeg + 0 + + + + + CanControllerFdBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerFdBaudRate + 250 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg1 + 13 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg2 + 6 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSyncJumpWidth + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerTxBitRateSwitch + true + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSspOffset + 0 + + + + + + + CanControllerBaudrateConfig1 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRate + 500 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRateConfigID + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg1 + 13 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg2 + 6 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSyncJumpWidth + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerPropSeg + 0 + + + + + + + CanHardwareObject1 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + TRANSMIT_RECEIVE_FIFO_MODE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + + + DV:UserDefined + + + /ActiveEcuC/Can/CanConfigSet0/CanController1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + + + DV:UserDefined + + + /ActiveEcuC/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 104 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 2047 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + + + CanTxRxFIFOConfiguration + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanTxRxFIFOConfiguration + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanTxRxFIFOConfiguration/CanTxRxFIFOBufferDepth + BUFFER_4 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanTxRxFIFOConfiguration/CanTxRxFIFOPayloadLength + PAYLOAD_8 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanTxRxFIFOConfiguration/CanTxRxFIFOInterruptRatioSel + FIFO_4_BY_8 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanTxRxFIFOConfiguration/CanTxRxFIFOInterruptSrcSel + EACH_MESSAGE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanTxRxFIFOConfiguration/CanEnableTxRxFIFOInterrupt + true + + + + + + + CanController1 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanBusoffProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerActivation + true + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerId + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanRxProcessing + INTERRUPT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTxProcessing + INTERRUPT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupFunctionalityAPI + true + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupProcessing + POLLING + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupSupport + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableTransmitHistoryInterrupt + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerSelection + RSCANFD01 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerInterfaceMode + CAN_FD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanEnableCanCanFDGateway + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayForwardingFormat + CLASSICAL_CAN_FORMAT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanFDGatewayBRSBit + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaseAddress + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanTransmitHistoryInterruptSrcSel + EACH_MESSAGE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerDefaultBaudrate + + + DV:UserDefined + + + /ActiveEcuC/Can/CanConfigSet0/CanController1/CanControllerBaudrateConfig0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanCpuClockRef + /EcucDefs/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanWakeupSourceRef + /ActiveEcuC/EcuM/EcuMConfiguration/EcuMCommonConfiguration/EcuMWakeupSource_001 + + + + + CanControllerBaudrateConfig0 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRate + 250 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRateConfigID + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg1 + 13 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg2 + 6 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSyncJumpWidth + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerPropSeg + 0 + + + + + CanControllerBaudrateConfig1 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRate + 500 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerBaudRateConfigID + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg1 + 13 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSeg2 + 6 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerSyncJumpWidth + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerPropSeg + 0 + + + + + CanControllerFdBaudrateConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerFdBaudRate + 500 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerPropSeg + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg1 + 13 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSeg2 + 6 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSyncJumpWidth + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerTxBitRateSwitch + true + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanController/CanControllerBaudrateConfig/CanControllerFdBaudrateConfig/CanControllerSspOffset + 0 + + + + + + + + + CanHardwareObject0 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + RECEIVE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /ActiveEcuC/Can/CanConfigSet0/CanController0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /ActiveEcuC/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHwFilter + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 256 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 2047 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + + + CanHwFilter_001 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterCode + 257 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterMask + 2047 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterReceiveIdType + STANDARD + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterSourceNode + FROM_OTHER_NODE + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwFilter/CanHwFilterDLCCheckValue + 0 + + + + + + + CanHardwareObject2 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + MIXED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /ActiveEcuC/Can/CanConfigSet0/CanController0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /ActiveEcuC/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanHardwareObject3 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHandleType + BASIC + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanHwObjectCount + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanIdType + MIXED + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectId + 3 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanObjectType + TRANSMIT + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMemoryMode + BUFFER_MODE + + + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanControllerRef + /ActiveEcuC/Can/CanConfigSet0/CanController1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanHardwareObject/CanMainFunctionRWPeriodRef + /ActiveEcuC/Can/CanGeneral/CanMainFunctionRWPeriods + + + + + CanIcom + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom + + + CanIcomConfig + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomConfigId + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeOnBusOff + true + + + + + CanIcomWakeupCauses + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses + + + CanIcomRxMessage + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomMessageId + 273 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomPayloadLengthError + true + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomPayloadLengthValue + PAYLOAD_0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomCounterValue + 2 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomMessageIdMask + 2047 + + + + + CanIcomRxMessage_001 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomMessageId + 274 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomPayloadLengthError + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomPayloadLengthValue + PAYLOAD_8 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomCounterValue + 1 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomMessageIdMask + 2047 + + + + + CanIcomRxMessage_002 + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomMessageId + 0 + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomPayloadLengthError + false + + + /Renesas/EcucDefs_Can/Can/CanConfigSet/CanIcom/CanIcomConfig/CanIcomWakeupCauses/CanIcomRxMessage/CanIcomPayloadLengthValue + PAYLOAD_0 + + + + + + + + + + + + + CanGeneral + /Renesas/EcucDefs_Can/Can/CanGeneral + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanIndex + 0 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionModePeriod + 1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMultiplexedTransmission + false + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanPublicIcomSupport + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanTimeoutDuration + 1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanVersionInfoApi + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanCriticalSectionProtection + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanDeviceName + V4M + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanIsrCategory + CAT1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanEnableClkImmediateValue + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanSetBaudrateApi + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanLPduReceiveCalloutFunction + UserCalloutFunction + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanDevErrorDetect + false + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionBusoffPeriod + 1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionWakeupPeriod + 1 + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanSelfTestApi + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanUnintendedInterruptCheck + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanRamTestApi + true + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanEccErrorCorrect + true + + + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanOsCounterRef + /ActiveEcuC/Os/OsCounter + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanSupportTTCANRef + /Renesas/EcucDefs_CanIf/CanIf/CanIfPrivateCfg + + + + + CanMainFunctionRWPeriods + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionRWPeriods + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanMainFunctionRWPeriods/CanMainFunctionPeriod + 1 + + + + + CanIcomGeneral + /Renesas/EcucDefs_Can/Can/CanGeneral/CanIcomGeneral + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanIcomGeneral/CanIcomVariant + CAN_ICOM_VARIANT_NONE + + + /Renesas/EcucDefs_Can/Can/CanGeneral/CanIcomGeneral/CanIcomCalloutFunction + Can_IcomCallOut + + + + + + + CanGlobalConfiguration + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanHardwareUnitSelect + RSCANFD0 + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanClockSourceSelect + CLKC + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanIntervalTimerPrescalerSet + 8 + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanMirrorFunctionSupport + false + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanEnableDLCCheck + true + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanTransmitPrioritySelect + DEPEND_ON_ID + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanPayloadOverflowModeSelect + DISCARD + + + /Renesas/EcucDefs_Can/Can/CanGlobalConfiguration/CanRxBufferPayloadLength + PAYLOAD_8 + + + + + CanDemEventParameterRefs + /Renesas/EcucDefs_Can/Can/CanDemEventParameterRefs + + + /Renesas/EcucDefs_Can/Can/CanDemEventParameterRefs/CAN_E_TIMEOUT_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter + + + /Renesas/EcucDefs_Can/Can/CanDemEventParameterRefs/CAN_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001 + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_CRC_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_CRC_V4M_Sample.arxml new file mode 100644 index 0000000..b903e84 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_CRC_V4M_Sample.arxml @@ -0,0 +1,541 @@ + + + + + ActiveEcuC + + + Cdd + + + + false + + + + /Renesas/EcucDefs_CddCrc/Cdd + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_CddCrc/CddCrc_Impl + + + CddCrcDemEventParameterRefs + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcDemEventParameterRefs + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcDemEventParameterRefs/CDDCRC_E_WRITE_VERIFY + /ActiveEcuC/Dem/DemConfigSet/CDDCRC_E_WRITE_VERIFY + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcDemEventParameterRefs/CDDCRC_E_HARDWARE_ERROR + /ActiveEcuC/Dem/DemConfigSet/CDDCRC_E_HARDWARE_ERROR + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcDemEventParameterRefs/CDDCRC_E_UNINTENDED_MODULE_STOP_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDCRC_E_UNINTENDED_MODULE_STOP_FAILURE + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcDemEventParameterRefs/CDDCRC_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDCRC_E_INTERRUPT_CONTROLLER_FAILURE + + + + + CddCrcChannelConfiguration + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcChannelID + 0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcHWSelection + CRC0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaResultChannel + RT_DMAC01 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataOutChannel + RT_DMAC02 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataInChannel + RT_DMAC00 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaCommandChannel + RT_DMAC24 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCompareEndNotification + CompareEndNotiCh0 + + + + + CddCrcCRCModule + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInBitSwapMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInByteSwapMode + CDDCRC_BYTESWAP_0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInXorValMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutBitSwapMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutByteSwapMode + CDDCRC_BYTESWAP_0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutXorValMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcPoly + CDDCRC_POLY_32_ETH + + + + + + + CddCrcChannelConfiguration_001 + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcChannelID + 1 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcHWSelection + KCRC0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaResultChannel + RT_DMAC05 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataInChannel + RT_DMAC03 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataOutChannel + RT_DMAC04 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaCommandChannel + RT_DMAC25 + + + + + CddCrcKCRCModule + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcInReflectMode + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcOutReflectMode + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcPoly + CDDCRC_POLY_16_CCITT + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcShiftMode + CDDCRC_KCRC_MSB_SHIFT + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcXorVal + 65535 + + + + + + + CddCrcChannelConfiguration_002 + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcChannelID + 2 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcHWSelection + AES_ACC0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaResultChannel + RT_DMAC08 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataInChannel + RT_DMAC06 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataOutChannel + RT_DMAC07 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaCommandChannel + RT_DMAC26 + + + + + CddGeneral + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcVersionInfoApi + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcDevErrorDetect + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcDeviceName + V4M + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcRegisterWriteVerify + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcVersionCheckExternalModules + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcCriticalSectionProtection + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddInstanceId + 0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcEdcErrorDetect + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcUnintendedInterruptCheck + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddGeneral/CddCrcUnintendedModuleStopCheck + true + + + + + CddCrcChannelConfiguration_003 + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcChannelID + 3 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcHWSelection + AES_ACC1 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaResultChannel + RT_DMAC11 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataInChannel + RT_DMAC09 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataOutChannel + RT_DMAC10 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaCommandChannel + RT_DMAC27 + + + + + CddCrcChannelConfiguration_004 + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcChannelID + 4 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcHWSelection + CRC1 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaResultChannel + RT_DMAC14 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataInChannel + RT_DMAC12 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataOutChannel + RT_DMAC13 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaCommandChannel + RT_DMAC28 + + + + + CddCrcCRCModule + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInBitSwapMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInByteSwapMode + CDDCRC_BYTESWAP_0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInXorValMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutBitSwapMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutByteSwapMode + CDDCRC_BYTESWAP_1 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutXorValMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcPoly + CDDCRC_POLY_16_CCITT + + + + + + + CddCrcChannelConfiguration_005 + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcChannelID + 5 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcHWSelection + CRC2 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaResultChannel + RT_DMAC17 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataInChannel + RT_DMAC15 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataOutChannel + RT_DMAC16 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaCommandChannel + RT_DMAC29 + + + + + CddCrcCRCModule + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInBitSwapMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInByteSwapMode + CDDCRC_BYTESWAP_0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInXorValMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutBitSwapMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutByteSwapMode + CDDCRC_BYTESWAP_0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutXorValMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcPoly + CDDCRC_POLY_17_1685B + + + + + + + CddCrcChannelConfiguration_006 + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcChannelID + 6 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcHWSelection + CRC3 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaResultChannel + RT_DMAC20 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataInChannel + RT_DMAC18 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataOutChannel + RT_DMAC19 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaCommandChannel + RT_DMAC30 + + + + + CddCrcCRCModule + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInBitSwapMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInByteSwapMode + CDDCRC_BYTESWAP_0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcInXorValMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutBitSwapMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutByteSwapMode + CDDCRC_BYTESWAP_0 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcOutXorValMode + false + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcCRCModule/CddCrcPoly + CDDCRC_POLY_21_102899 + + + + + + + CddCrcChannelConfiguration_007 + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcChannelID + 7 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcHWSelection + KCRC1 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaResultChannel + RT_DMAC23 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataInChannel + RT_DMAC21 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaDataOutChannel + RT_DMAC22 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcDmaCommandChannel + RT_DMAC31 + + + + + CddCrcKCRCModule + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcInReflectMode + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcOutReflectMode + true + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcPoly + CDDCRC_POLY_32_1EDC6F41 + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcShiftMode + CDDCRC_KCRC_LSB_SHIFT + + + /Renesas/EcucDefs_CddCrc/Cdd/CddCrcChannelConfiguration/CddCrcKCRCModule/CddCrcXorVal + 4294967295 + + + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_EMM_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_EMM_V4M_Sample.arxml new file mode 100644 index 0000000..fac282c --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_EMM_V4M_Sample.arxml @@ -0,0 +1,10261 @@ + + + + + ActiveEcuC + + + Cdd + + + + false + + + + /Renesas/EcucDefs_CddEmm/Cdd + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_CddEmm/CddEmm_Impl + + + CddGeneral + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddInstanceId + 0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmDevErrorDetect + false + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmDeviceName + V4M + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmVersionCheckExternalModules + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmCriticalSectionProtection + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmWriteVerifyCheck + WV_RUNTIME + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmUnintendedInterruptCheck + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmVersionInfoApi + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddGeneral/CddEmmPseudoErrorApi + true + + + + + CddEmmDomain0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmAddressToSaveErrorStatus + 1342177280 + + + + + CddEmmBit0DBSC5DFIDomainDCLSErrDbs0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit0DBSC5DFIDomainDCLSErrDbs0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit0DBSC5DFIDomainDCLSErrDbs0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit0DBSC5DFIDomainDCLSErrDbs0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1DBSC5AXIDomainDCLSErrDbs0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit1DBSC5AXIDomainDCLSErrDbs0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit1DBSC5AXIDomainDCLSErrDbs0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit1DBSC5AXIDomainDCLSErrDbs0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12SYSCIsolationCellErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit12SYSCIsolationCellErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit12SYSCIsolationCellErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit12SYSCIsolationCellErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13FusesmRedundantComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit13FusesmRedundantComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit13FusesmRedundantComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit13FusesmRedundantComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14FSFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit14FSFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit14FSFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit14FSFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15FSTimeOutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit15FSTimeOutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit15FSTimeOutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit15FSTimeOutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16FSScanAXIbusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit16FSScanAXIbusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit16FSScanAXIbusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit16FSScanAXIbusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17ICUMXWdtOverFlowErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit17ICUMXWdtOverFlowErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit17ICUMXWdtOverFlowErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit17ICUMXWdtOverFlowErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18ICUMXBusAesOusideDmacEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit18ICUMXBusAesOusideDmacEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit18ICUMXBusAesOusideDmacEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit18ICUMXBusAesOusideDmacEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19ICUMXAesDmaLockstepErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit19ICUMXAesDmaLockstepErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit19ICUMXAesDmaLockstepErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit19ICUMXAesDmaLockstepErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20APSysGenericCounterOperationErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit20APSysGenericCounterOperationErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit20APSysGenericCounterOperationErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit20APSysGenericCounterOperationErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21APSysGenericCounterComparisonErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit21APSysGenericCounterComparisonErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit21APSysGenericCounterComparisonErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit21APSysGenericCounterComparisonErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22SYSCWriteAcessProtectionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit22SYSCWriteAcessProtectionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit22SYSCWriteAcessProtectionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit22SYSCWriteAcessProtectionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23SYSCHWRedundantErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit23SYSCHWRedundantErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit23SYSCHWRedundantErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit23SYSCHWRedundantErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24BootROMMultiBitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit24BootROMMultiBitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit24BootROMMultiBitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit24BootROMMultiBitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25BootROMSingleBitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit25BootROMSingleBitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit25BootROMSingleBitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit25BootROMSingleBitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26BootROMMultiBitErr2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit26BootROMMultiBitErr2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit26BootROMMultiBitErr2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit26BootROMMultiBitErr2/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27BootROMSingleBitErr2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit27BootROMSingleBitErr2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit27BootROMSingleBitErr2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit27BootROMSingleBitErr2/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28BootROMAccessICUMXErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit28BootROMAccessICUMXErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit28BootROMAccessICUMXErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit28BootROMAccessICUMXErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29CPGIllegalAccessErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit29CPGIllegalAccessErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit29CPGIllegalAccessErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit29CPGIllegalAccessErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30CPGFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit30CPGFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit30CPGFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit30CPGFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31WriteProtectFailerReset + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit31WriteProtectFailerReset + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit31WriteProtectFailerReset/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain0/CddEmmBit31WriteProtectFailerReset/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmAddressToSaveErrorStatus + 1342177284 + + + + + CddEmmBit14AXCCAXIProtocolWRACKErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit14AXCCAXIProtocolWRACKErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit14AXCCAXIProtocolWRACKErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit14AXCCAXIProtocolWRACKErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15AXCCMasterInterfaceErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit15AXCCMasterInterfaceErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit15AXCCMasterInterfaceErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit15AXCCMasterInterfaceErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19WWDTch6CountErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit19WWDTch6CountErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit19WWDTch6CountErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit19WWDTch6CountErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20WWDTch5CountErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit20WWDTch5CountErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit20WWDTch5CountErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit20WWDTch5CountErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21WWDTch4CountErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit21WWDTch4CountErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit21WWDTch4CountErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit21WWDTch4CountErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22WWDTch3CountErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit22WWDTch3CountErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit22WWDTch3CountErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit22WWDTch3CountErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23WWDTch2CountErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit23WWDTch2CountErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit23WWDTch2CountErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit23WWDTch2CountErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24WWDTch1CountErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit24WWDTch1CountErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit24WWDTch1CountErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit24WWDTch1CountErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25WWDTch0CountErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit25WWDTch0CountErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit25WWDTch0CountErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit25WWDTch0CountErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26AXCCAXIDetfixIDproErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit26AXCCAXIDetfixIDproErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit26AXCCAXIDetfixIDproErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit26AXCCAXIDetfixIDproErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29AXCCDCLSCompare0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit29AXCCDCLSCompare0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit29AXCCDCLSCompare0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit29AXCCDCLSCompare0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31AXCCDCLSCompare1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit31AXCCDCLSCompare1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit31AXCCDCLSCompare1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain1/CddEmmBit31AXCCDCLSCompare1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmAddressToSaveErrorStatus + 1342177288 + + + + + CddEmmBit0INTCtpWDTmonitorIMNTRSR0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit0INTCtpWDTmonitorIMNTRSR0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit0INTCtpWDTmonitorIMNTRSR0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit0INTCtpWDTmonitorIMNTRSR0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1INTCtpWDTmonitorIMNTRSR1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit1INTCtpWDTmonitorIMNTRSR1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit1INTCtpWDTmonitorIMNTRSR1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit1INTCtpWDTmonitorIMNTRSR1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2INTCtpWDTmonitorIMNTRSR2Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit2INTCtpWDTmonitorIMNTRSR2Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit2INTCtpWDTmonitorIMNTRSR2Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit2INTCtpWDTmonitorIMNTRSR2Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3INTCtpWDTmonitorIMNTRSR3Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit3INTCtpWDTmonitorIMNTRSR3Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit3INTCtpWDTmonitorIMNTRSR3Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit3INTCtpWDTmonitorIMNTRSR3Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4INTCtpWDTmonitorIMNTRSR4Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit4INTCtpWDTmonitorIMNTRSR4Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit4INTCtpWDTmonitorIMNTRSR4Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit4INTCtpWDTmonitorIMNTRSR4Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5INTCtpWDTmonitorIMNTRSR5Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit5INTCtpWDTmonitorIMNTRSR5Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit5INTCtpWDTmonitorIMNTRSR5Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit5INTCtpWDTmonitorIMNTRSR5Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6INTCtpWDTmonitorIMNTRSR6Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit6INTCtpWDTmonitorIMNTRSR6Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit6INTCtpWDTmonitorIMNTRSR6Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit6INTCtpWDTmonitorIMNTRSR6Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7INTCtpWDTmonitorIMNTRSR7Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit7INTCtpWDTmonitorIMNTRSR7Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit7INTCtpWDTmonitorIMNTRSR7Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit7INTCtpWDTmonitorIMNTRSR7Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8INTCtpWDTmonitorIMNTRSR8Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit8INTCtpWDTmonitorIMNTRSR8Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit8INTCtpWDTmonitorIMNTRSR8Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit8INTCtpWDTmonitorIMNTRSR8Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9INTCtpWDTmonitorIMNTRSR9Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit9INTCtpWDTmonitorIMNTRSR9Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit9INTCtpWDTmonitorIMNTRSR9Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit9INTCtpWDTmonitorIMNTRSR9Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10INTCtpWDTmonitorIMNTRSR10Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit10INTCtpWDTmonitorIMNTRSR10Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit10INTCtpWDTmonitorIMNTRSR10Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit10INTCtpWDTmonitorIMNTRSR10Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11INTCtpWDTmonitorIMNTRSR11Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit11INTCtpWDTmonitorIMNTRSR11Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit11INTCtpWDTmonitorIMNTRSR11Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit11INTCtpWDTmonitorIMNTRSR11Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12INTCtpWDTmonitorIMNTRSR12Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit12INTCtpWDTmonitorIMNTRSR12Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit12INTCtpWDTmonitorIMNTRSR12Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit12INTCtpWDTmonitorIMNTRSR12Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13INTCtpWDTmonitorIMNTRSR13Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit13INTCtpWDTmonitorIMNTRSR13Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit13INTCtpWDTmonitorIMNTRSR13Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit13INTCtpWDTmonitorIMNTRSR13Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14INTCtpWDTmonitorIMNTRSR14Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit14INTCtpWDTmonitorIMNTRSR14Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit14INTCtpWDTmonitorIMNTRSR14Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit14INTCtpWDTmonitorIMNTRSR14Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15INTCtpWDTmonitorIMNTRSR15Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit15INTCtpWDTmonitorIMNTRSR15Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit15INTCtpWDTmonitorIMNTRSR15Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit15INTCtpWDTmonitorIMNTRSR15Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16INTCtpWDTmonitorIMNTRSR16Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit16INTCtpWDTmonitorIMNTRSR16Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit16INTCtpWDTmonitorIMNTRSR16Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit16INTCtpWDTmonitorIMNTRSR16Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17INTCtpWDTmonitorIMNTRSR17Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit17INTCtpWDTmonitorIMNTRSR17Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit17INTCtpWDTmonitorIMNTRSR17Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit17INTCtpWDTmonitorIMNTRSR17Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18INTCtpWDTmonitorIMNTRSR18Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit18INTCtpWDTmonitorIMNTRSR18Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit18INTCtpWDTmonitorIMNTRSR18Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit18INTCtpWDTmonitorIMNTRSR18Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19INTCtpWDTmonitorIMNTRSR19Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit19INTCtpWDTmonitorIMNTRSR19Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit19INTCtpWDTmonitorIMNTRSR19Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit19INTCtpWDTmonitorIMNTRSR19Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20INTCtpWDTmonitorIMNTRSR20Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit20INTCtpWDTmonitorIMNTRSR20Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit20INTCtpWDTmonitorIMNTRSR20Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit20INTCtpWDTmonitorIMNTRSR20Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21INTCtpWDTmonitorIMNTRSR21Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit21INTCtpWDTmonitorIMNTRSR21Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit21INTCtpWDTmonitorIMNTRSR21Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit21INTCtpWDTmonitorIMNTRSR21Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22INTCtpWDTmonitorIMNTRSR22Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit22INTCtpWDTmonitorIMNTRSR22Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit22INTCtpWDTmonitorIMNTRSR22Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit22INTCtpWDTmonitorIMNTRSR22Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23INTCtpWDTmonitorIMNTRSR23Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit23INTCtpWDTmonitorIMNTRSR23Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit23INTCtpWDTmonitorIMNTRSR23Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit23INTCtpWDTmonitorIMNTRSR23Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24INTCtpWDTmonitorIMNTRSR24Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit24INTCtpWDTmonitorIMNTRSR24Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit24INTCtpWDTmonitorIMNTRSR24Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit24INTCtpWDTmonitorIMNTRSR24Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25INTCtpWDTmonitorIMNTRSR25Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit25INTCtpWDTmonitorIMNTRSR25Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit25INTCtpWDTmonitorIMNTRSR25Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit25INTCtpWDTmonitorIMNTRSR25Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26INTCtpWDTmonitorIMNTRSR26Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit26INTCtpWDTmonitorIMNTRSR26Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit26INTCtpWDTmonitorIMNTRSR26Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit26INTCtpWDTmonitorIMNTRSR26Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27INTCtpWDTmonitorIMNTRSR27Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit27INTCtpWDTmonitorIMNTRSR27Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit27INTCtpWDTmonitorIMNTRSR27Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit27INTCtpWDTmonitorIMNTRSR27Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28INTCtpWDTmonitorIMNTRSR28Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit28INTCtpWDTmonitorIMNTRSR28Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit28INTCtpWDTmonitorIMNTRSR28Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit28INTCtpWDTmonitorIMNTRSR28Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29INTCtpWDTmonitorIMNTRSR29Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit29INTCtpWDTmonitorIMNTRSR29Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit29INTCtpWDTmonitorIMNTRSR29Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit29INTCtpWDTmonitorIMNTRSR29Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30INTCtpWDTmonitorIMNTRSR30Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit30INTCtpWDTmonitorIMNTRSR30Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit30INTCtpWDTmonitorIMNTRSR30Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit30INTCtpWDTmonitorIMNTRSR30Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31INTCtpWDTmonitorIMNTRSR31Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit31INTCtpWDTmonitorIMNTRSR31Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit31INTCtpWDTmonitorIMNTRSR31Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain2/CddEmmBit31INTCtpWDTmonitorIMNTRSR31Err/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmAddressToSaveErrorStatus + 1342177292 + + + + + CddEmmBit0INTCtpWDTmonitorIMNTRSR32Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit0INTCtpWDTmonitorIMNTRSR32Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit0INTCtpWDTmonitorIMNTRSR32Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit0INTCtpWDTmonitorIMNTRSR32Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1INTCtpWDTmonitorIMNTRSR33Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit1INTCtpWDTmonitorIMNTRSR33Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit1INTCtpWDTmonitorIMNTRSR33Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit1INTCtpWDTmonitorIMNTRSR33Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2INTCtpWDTmonitorIMNTRSR34Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit2INTCtpWDTmonitorIMNTRSR34Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit2INTCtpWDTmonitorIMNTRSR34Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit2INTCtpWDTmonitorIMNTRSR34Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3INTCtpWDTmonitorIMNTRSR35Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit3INTCtpWDTmonitorIMNTRSR35Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit3INTCtpWDTmonitorIMNTRSR35Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit3INTCtpWDTmonitorIMNTRSR35Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4INTCtpWDTmonitorIMNTRSR36Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit4INTCtpWDTmonitorIMNTRSR36Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit4INTCtpWDTmonitorIMNTRSR36Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit4INTCtpWDTmonitorIMNTRSR36Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5INTCtpWDTmonitorIMNTRSR37Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit5INTCtpWDTmonitorIMNTRSR37Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit5INTCtpWDTmonitorIMNTRSR37Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit5INTCtpWDTmonitorIMNTRSR37Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6INTCtpWDTmonitorIMNTRSR38Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit6INTCtpWDTmonitorIMNTRSR38Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit6INTCtpWDTmonitorIMNTRSR38Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit6INTCtpWDTmonitorIMNTRSR38Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7INTCtpWDTmonitorIMNTRSR39Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit7INTCtpWDTmonitorIMNTRSR39Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit7INTCtpWDTmonitorIMNTRSR39Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit7INTCtpWDTmonitorIMNTRSR39Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8INTCtpWDTmonitorIMNTRSR40Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit8INTCtpWDTmonitorIMNTRSR40Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit8INTCtpWDTmonitorIMNTRSR40Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit8INTCtpWDTmonitorIMNTRSR40Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9INTCtpWDTmonitorIMNTRSR41Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit9INTCtpWDTmonitorIMNTRSR41Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit9INTCtpWDTmonitorIMNTRSR41Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit9INTCtpWDTmonitorIMNTRSR41Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10INTCtpWDTmonitorIMNTRSR42Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit10INTCtpWDTmonitorIMNTRSR42Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit10INTCtpWDTmonitorIMNTRSR42Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit10INTCtpWDTmonitorIMNTRSR42Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11INTCtpWDTmonitorIMNTRSR43Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit11INTCtpWDTmonitorIMNTRSR43Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit11INTCtpWDTmonitorIMNTRSR43Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit11INTCtpWDTmonitorIMNTRSR43Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12INTCtpWDTmonitorIMNTRSR44Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit12INTCtpWDTmonitorIMNTRSR44Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit12INTCtpWDTmonitorIMNTRSR44Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit12INTCtpWDTmonitorIMNTRSR44Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13INTCtpWDTmonitorIMNTRSR45Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit13INTCtpWDTmonitorIMNTRSR45Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit13INTCtpWDTmonitorIMNTRSR45Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit13INTCtpWDTmonitorIMNTRSR45Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14INTCtpWDTmonitorIMNTRSR46Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit14INTCtpWDTmonitorIMNTRSR46Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit14INTCtpWDTmonitorIMNTRSR46Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit14INTCtpWDTmonitorIMNTRSR46Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15INTCtpWDTmonitorIMNTRSR47Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit15INTCtpWDTmonitorIMNTRSR47Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit15INTCtpWDTmonitorIMNTRSR47Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit15INTCtpWDTmonitorIMNTRSR47Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16INTCtpWDTmonitorIMNTRSR48Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit16INTCtpWDTmonitorIMNTRSR48Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit16INTCtpWDTmonitorIMNTRSR48Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit16INTCtpWDTmonitorIMNTRSR48Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17INTCtpWDTmonitorIMNTRSR49Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit17INTCtpWDTmonitorIMNTRSR49Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit17INTCtpWDTmonitorIMNTRSR49Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit17INTCtpWDTmonitorIMNTRSR49Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18INTCtpWDTmonitorIMNTRSR50Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit18INTCtpWDTmonitorIMNTRSR50Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit18INTCtpWDTmonitorIMNTRSR50Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit18INTCtpWDTmonitorIMNTRSR50Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19INTCtpWDTmonitorIMNTRSR51Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit19INTCtpWDTmonitorIMNTRSR51Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit19INTCtpWDTmonitorIMNTRSR51Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit19INTCtpWDTmonitorIMNTRSR51Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20INTCtpWDTmonitorIMNTRSR52Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit20INTCtpWDTmonitorIMNTRSR52Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit20INTCtpWDTmonitorIMNTRSR52Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit20INTCtpWDTmonitorIMNTRSR52Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21INTCtpWDTmonitorIMNTRSR53Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit21INTCtpWDTmonitorIMNTRSR53Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit21INTCtpWDTmonitorIMNTRSR53Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit21INTCtpWDTmonitorIMNTRSR53Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22INTCtpWDTmonitorIMNTRSR54Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit22INTCtpWDTmonitorIMNTRSR54Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit22INTCtpWDTmonitorIMNTRSR54Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit22INTCtpWDTmonitorIMNTRSR54Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23INTCtpWDTmonitorIMNTRSR55Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit23INTCtpWDTmonitorIMNTRSR55Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit23INTCtpWDTmonitorIMNTRSR55Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit23INTCtpWDTmonitorIMNTRSR55Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24INTCtpWDTmonitorIMNTRSR56Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit24INTCtpWDTmonitorIMNTRSR56Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit24INTCtpWDTmonitorIMNTRSR56Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit24INTCtpWDTmonitorIMNTRSR56Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25INTCtpWDTmonitorIMNTRSR57Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit25INTCtpWDTmonitorIMNTRSR57Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit25INTCtpWDTmonitorIMNTRSR57Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit25INTCtpWDTmonitorIMNTRSR57Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26INTCtpWDTmonitorIMNTRSR58Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit26INTCtpWDTmonitorIMNTRSR58Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit26INTCtpWDTmonitorIMNTRSR58Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit26INTCtpWDTmonitorIMNTRSR58Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27INTCtpWDTmonitorIMNTRSR59Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit27INTCtpWDTmonitorIMNTRSR59Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit27INTCtpWDTmonitorIMNTRSR59Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit27INTCtpWDTmonitorIMNTRSR59Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28INTCtpWDTmonitorIMNTRSR60Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit28INTCtpWDTmonitorIMNTRSR60Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit28INTCtpWDTmonitorIMNTRSR60Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit28INTCtpWDTmonitorIMNTRSR60Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29INTCtpWDTmonitorIMNTRSR61Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit29INTCtpWDTmonitorIMNTRSR61Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit29INTCtpWDTmonitorIMNTRSR61Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit29INTCtpWDTmonitorIMNTRSR61Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30INTCtpWDTmonitorIMNTRSR62Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit30INTCtpWDTmonitorIMNTRSR62Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit30INTCtpWDTmonitorIMNTRSR62Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit30INTCtpWDTmonitorIMNTRSR62Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31INTCtpWDTmonitorIMNTRSR63Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit31INTCtpWDTmonitorIMNTRSR63Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit31INTCtpWDTmonitorIMNTRSR63Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain3/CddEmmBit31INTCtpWDTmonitorIMNTRSR63Err/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain4 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmAddressToSaveErrorStatus + 1342177296 + + + + + CddEmmBit0INTCtpWDTmonitorIMNTRSR64Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit0INTCtpWDTmonitorIMNTRSR64Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit0INTCtpWDTmonitorIMNTRSR64Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit0INTCtpWDTmonitorIMNTRSR64Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1INTCtpWDTmonitorIMNTRSR65Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit1INTCtpWDTmonitorIMNTRSR65Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit1INTCtpWDTmonitorIMNTRSR65Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit1INTCtpWDTmonitorIMNTRSR65Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2INTCtpWDTmonitorIMNTRSR66Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit2INTCtpWDTmonitorIMNTRSR66Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit2INTCtpWDTmonitorIMNTRSR66Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit2INTCtpWDTmonitorIMNTRSR66Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3INTCtpWDTmonitorIMNTRSR67Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit3INTCtpWDTmonitorIMNTRSR67Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit3INTCtpWDTmonitorIMNTRSR67Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit3INTCtpWDTmonitorIMNTRSR67Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4INTCtpWDTmonitorIMNTRSR68Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit4INTCtpWDTmonitorIMNTRSR68Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit4INTCtpWDTmonitorIMNTRSR68Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit4INTCtpWDTmonitorIMNTRSR68Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5INTCtpWDTmonitorIMNTRSR69Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit5INTCtpWDTmonitorIMNTRSR69Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit5INTCtpWDTmonitorIMNTRSR69Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit5INTCtpWDTmonitorIMNTRSR69Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6INTCtpWDTmonitorIMNTRSR70Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit6INTCtpWDTmonitorIMNTRSR70Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit6INTCtpWDTmonitorIMNTRSR70Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit6INTCtpWDTmonitorIMNTRSR70Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7INTCtpWDTmonitorIMNTRSR71Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit7INTCtpWDTmonitorIMNTRSR71Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit7INTCtpWDTmonitorIMNTRSR71Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit7INTCtpWDTmonitorIMNTRSR71Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8INTCtpWDTmonitorIMNTRSR72Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit8INTCtpWDTmonitorIMNTRSR72Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit8INTCtpWDTmonitorIMNTRSR72Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit8INTCtpWDTmonitorIMNTRSR72Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9INTCtpWDTmonitorIMNTRSR73Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit9INTCtpWDTmonitorIMNTRSR73Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit9INTCtpWDTmonitorIMNTRSR73Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit9INTCtpWDTmonitorIMNTRSR73Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10INTCtpWDTmonitorIMNTRSR74Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit10INTCtpWDTmonitorIMNTRSR74Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit10INTCtpWDTmonitorIMNTRSR74Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit10INTCtpWDTmonitorIMNTRSR74Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11INTCtpWDTmonitorIMNTRSR75Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit11INTCtpWDTmonitorIMNTRSR75Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit11INTCtpWDTmonitorIMNTRSR75Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit11INTCtpWDTmonitorIMNTRSR75Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12INTCtpWDTmonitorIMNTRSR76Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit12INTCtpWDTmonitorIMNTRSR76Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit12INTCtpWDTmonitorIMNTRSR76Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit12INTCtpWDTmonitorIMNTRSR76Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13INTCtpWDTmonitorIMNTRSR77Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit13INTCtpWDTmonitorIMNTRSR77Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit13INTCtpWDTmonitorIMNTRSR77Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit13INTCtpWDTmonitorIMNTRSR77Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14INTCtpWDTmonitorIMNTRSR78Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit14INTCtpWDTmonitorIMNTRSR78Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit14INTCtpWDTmonitorIMNTRSR78Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit14INTCtpWDTmonitorIMNTRSR78Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15INTCtpWDTmonitorIMNTRSR79Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit15INTCtpWDTmonitorIMNTRSR79Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit15INTCtpWDTmonitorIMNTRSR79Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit15INTCtpWDTmonitorIMNTRSR79Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16INTCtpWDTmonitorIMNTRSR80Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit16INTCtpWDTmonitorIMNTRSR80Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit16INTCtpWDTmonitorIMNTRSR80Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit16INTCtpWDTmonitorIMNTRSR80Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17INTCtpWDTmonitorIMNTRSR81Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit17INTCtpWDTmonitorIMNTRSR81Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit17INTCtpWDTmonitorIMNTRSR81Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit17INTCtpWDTmonitorIMNTRSR81Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18INTCtpWDTmonitorIMNTRSR82Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit18INTCtpWDTmonitorIMNTRSR82Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit18INTCtpWDTmonitorIMNTRSR82Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit18INTCtpWDTmonitorIMNTRSR82Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19INTCtpWDTmonitorIMNTRSR83Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit19INTCtpWDTmonitorIMNTRSR83Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit19INTCtpWDTmonitorIMNTRSR83Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit19INTCtpWDTmonitorIMNTRSR83Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20INTCtpWDTmonitorIMNTRSR84Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit20INTCtpWDTmonitorIMNTRSR84Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit20INTCtpWDTmonitorIMNTRSR84Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit20INTCtpWDTmonitorIMNTRSR84Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21INTCtpWDTmonitorIMNTRSR85Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit21INTCtpWDTmonitorIMNTRSR85Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit21INTCtpWDTmonitorIMNTRSR85Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit21INTCtpWDTmonitorIMNTRSR85Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22INTCtpWDTmonitorIMNTRSR86Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit22INTCtpWDTmonitorIMNTRSR86Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit22INTCtpWDTmonitorIMNTRSR86Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit22INTCtpWDTmonitorIMNTRSR86Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23INTCtpWDTmonitorIMNTRSR87Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit23INTCtpWDTmonitorIMNTRSR87Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit23INTCtpWDTmonitorIMNTRSR87Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit23INTCtpWDTmonitorIMNTRSR87Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24INTCtpWDTmonitorIMNTRSR88Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit24INTCtpWDTmonitorIMNTRSR88Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit24INTCtpWDTmonitorIMNTRSR88Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit24INTCtpWDTmonitorIMNTRSR88Err/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit25INTCtpWDTmonitorIMNTRSR89Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit25INTCtpWDTmonitorIMNTRSR89Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit25INTCtpWDTmonitorIMNTRSR89Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit25INTCtpWDTmonitorIMNTRSR89Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26INTCtpWDTmonitorIMNTRSR90Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit26INTCtpWDTmonitorIMNTRSR90Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit26INTCtpWDTmonitorIMNTRSR90Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit26INTCtpWDTmonitorIMNTRSR90Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27INTCtpWDTmonitorIMNTRSR91Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit27INTCtpWDTmonitorIMNTRSR91Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit27INTCtpWDTmonitorIMNTRSR91Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit27INTCtpWDTmonitorIMNTRSR91Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28INTCtpWDTmonitorIMNTRSR92Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit28INTCtpWDTmonitorIMNTRSR92Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit28INTCtpWDTmonitorIMNTRSR92Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit28INTCtpWDTmonitorIMNTRSR92Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29INTCtpWDTmonitorIMNTRSR93Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit29INTCtpWDTmonitorIMNTRSR93Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit29INTCtpWDTmonitorIMNTRSR93Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit29INTCtpWDTmonitorIMNTRSR93Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30INTCtpWDTmonitorIMNTRSR94Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit30INTCtpWDTmonitorIMNTRSR94Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit30INTCtpWDTmonitorIMNTRSR94Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit30INTCtpWDTmonitorIMNTRSR94Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31INTCtpWDTmonitorIMNTRSR95Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit31INTCtpWDTmonitorIMNTRSR95Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit31INTCtpWDTmonitorIMNTRSR95Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain4/CddEmmBit31INTCtpWDTmonitorIMNTRSR95Err/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain5 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmAddressToSaveErrorStatus + 1342177300 + + + + + CddEmmBit0INTCtpWDTmonitorIMNTRSR96Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit0INTCtpWDTmonitorIMNTRSR96Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit0INTCtpWDTmonitorIMNTRSR96Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit0INTCtpWDTmonitorIMNTRSR96Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1INTCtpWDTmonitorIMNTRSR97Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit1INTCtpWDTmonitorIMNTRSR97Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit1INTCtpWDTmonitorIMNTRSR97Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit1INTCtpWDTmonitorIMNTRSR97Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2INTCtpWDTmonitorIMNTRSR98Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit2INTCtpWDTmonitorIMNTRSR98Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit2INTCtpWDTmonitorIMNTRSR98Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit2INTCtpWDTmonitorIMNTRSR98Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3INTCtpWDTmonitorIMNTRSR99Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit3INTCtpWDTmonitorIMNTRSR99Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit3INTCtpWDTmonitorIMNTRSR99Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit3INTCtpWDTmonitorIMNTRSR99Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4INTCtpWDTmonitorIMNTRSR100Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit4INTCtpWDTmonitorIMNTRSR100Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit4INTCtpWDTmonitorIMNTRSR100Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit4INTCtpWDTmonitorIMNTRSR100Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5INTCtpWDTmonitorIMNTRSR101Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit5INTCtpWDTmonitorIMNTRSR101Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit5INTCtpWDTmonitorIMNTRSR101Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit5INTCtpWDTmonitorIMNTRSR101Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6INTCtpWDTmonitorIMNTRSR102Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit6INTCtpWDTmonitorIMNTRSR102Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit6INTCtpWDTmonitorIMNTRSR102Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit6INTCtpWDTmonitorIMNTRSR102Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7INTCtpWDTmonitorIMNTRSR103Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit7INTCtpWDTmonitorIMNTRSR103Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit7INTCtpWDTmonitorIMNTRSR103Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit7INTCtpWDTmonitorIMNTRSR103Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8INTCtpWDTmonitorIMNTRSR104Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit8INTCtpWDTmonitorIMNTRSR104Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit8INTCtpWDTmonitorIMNTRSR104Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit8INTCtpWDTmonitorIMNTRSR104Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9INTCtpWDTmonitorIMNTRSR105Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit9INTCtpWDTmonitorIMNTRSR105Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit9INTCtpWDTmonitorIMNTRSR105Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit9INTCtpWDTmonitorIMNTRSR105Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10INTCtpWDTmonitorIMNTRSR106Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit10INTCtpWDTmonitorIMNTRSR106Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit10INTCtpWDTmonitorIMNTRSR106Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit10INTCtpWDTmonitorIMNTRSR106Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11INTCtpWDTmonitorIMNTRSR107Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit11INTCtpWDTmonitorIMNTRSR107Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit11INTCtpWDTmonitorIMNTRSR107Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit11INTCtpWDTmonitorIMNTRSR107Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12INTCtpWDTmonitorIMNTRSR108Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit12INTCtpWDTmonitorIMNTRSR108Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit12INTCtpWDTmonitorIMNTRSR108Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit12INTCtpWDTmonitorIMNTRSR108Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13INTCtpWDTmonitorIMNTRSR109Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit13INTCtpWDTmonitorIMNTRSR109Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit13INTCtpWDTmonitorIMNTRSR109Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit13INTCtpWDTmonitorIMNTRSR109Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14INTCtpWDTmonitorIMNTRSR110Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit14INTCtpWDTmonitorIMNTRSR110Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit14INTCtpWDTmonitorIMNTRSR110Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit14INTCtpWDTmonitorIMNTRSR110Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15INTCtpWDTmonitorIMNTRSR111Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit15INTCtpWDTmonitorIMNTRSR111Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit15INTCtpWDTmonitorIMNTRSR111Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit15INTCtpWDTmonitorIMNTRSR111Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16INTCtpWDTmonitorIMNTRSR112Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit16INTCtpWDTmonitorIMNTRSR112Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit16INTCtpWDTmonitorIMNTRSR112Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit16INTCtpWDTmonitorIMNTRSR112Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17INTCtpWDTmonitorIMNTRSR113Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit17INTCtpWDTmonitorIMNTRSR113Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit17INTCtpWDTmonitorIMNTRSR113Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit17INTCtpWDTmonitorIMNTRSR113Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18INTCtpWDTmonitorIMNTRSR114Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit18INTCtpWDTmonitorIMNTRSR114Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit18INTCtpWDTmonitorIMNTRSR114Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit18INTCtpWDTmonitorIMNTRSR114Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19INTCtpWDTmonitorIMNTRSR115Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit19INTCtpWDTmonitorIMNTRSR115Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit19INTCtpWDTmonitorIMNTRSR115Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit19INTCtpWDTmonitorIMNTRSR115Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20INTCtpWDTmonitorIMNTRSR116Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit20INTCtpWDTmonitorIMNTRSR116Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit20INTCtpWDTmonitorIMNTRSR116Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit20INTCtpWDTmonitorIMNTRSR116Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21INTCtpWDTmonitorIMNTRSR117Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit21INTCtpWDTmonitorIMNTRSR117Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit21INTCtpWDTmonitorIMNTRSR117Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit21INTCtpWDTmonitorIMNTRSR117Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22INTCtpWDTmonitorIMNTRSR118Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit22INTCtpWDTmonitorIMNTRSR118Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit22INTCtpWDTmonitorIMNTRSR118Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit22INTCtpWDTmonitorIMNTRSR118Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23INTCtpWDTmonitorIMNTRSR119Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit23INTCtpWDTmonitorIMNTRSR119Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit23INTCtpWDTmonitorIMNTRSR119Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit23INTCtpWDTmonitorIMNTRSR119Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24INTCtpWDTmonitorIMNTRSR120Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit24INTCtpWDTmonitorIMNTRSR120Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit24INTCtpWDTmonitorIMNTRSR120Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit24INTCtpWDTmonitorIMNTRSR120Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25RTCore0EL1controlledMemoryAccessErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit25RTCore0EL1controlledMemoryAccessErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit25RTCore0EL1controlledMemoryAccessErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit25RTCore0EL1controlledMemoryAccessErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26RTCoreProcessorLivelockErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit26RTCoreProcessorLivelockErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit26RTCoreProcessorLivelockErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit26RTCoreProcessorLivelockErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27RTCore0SWRunInEL2UnlockTESTR1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit27RTCore0SWRunInEL2UnlockTESTR1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit27RTCore0SWRunInEL2UnlockTESTR1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit27RTCore0SWRunInEL2UnlockTESTR1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31INTCtpEDCAXI4stream0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit31INTCtpEDCAXI4stream0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit31INTCtpEDCAXI4stream0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain5/CddEmmBit31INTCtpEDCAXI4stream0/CddEmmErrorSignalTarget + INTC + + + + + + + CddEmmDomain6 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmAddressToSaveErrorStatus + 1342177304 + + + + + CddEmmBit7VIPInternalDOFErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit7VIPInternalDOFErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit7VIPInternalDOFErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit7VIPInternalDOFErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9VIPInternalSMPSErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit9VIPInternalSMPSErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit9VIPInternalSMPSErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit9VIPInternalSMPSErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11VIPInternalSMPOErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit11VIPInternalSMPOErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit11VIPInternalSMPOErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit11VIPInternalSMPOErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit24IMPX7SRAMEDCErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit24IMPX7SRAMEDCErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit24IMPX7SRAMEDCErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit24IMPX7SRAMEDCErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25IMPX7SRAMECCErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit25IMPX7SRAMECCErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit25IMPX7SRAMECCErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit25IMPX7SRAMECCErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26IMPX7BusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit26IMPX7BusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit26IMPX7BusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit26IMPX7BusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27IMPX7ScratchpadMemoryDCLSErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit27IMPX7ScratchpadMemoryDCLSErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit27IMPX7ScratchpadMemoryDCLSErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit27IMPX7ScratchpadMemoryDCLSErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28APMUCortexR52Core0ResetControlErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit28APMUCortexR52Core0ResetControlErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit28APMUCortexR52Core0ResetControlErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit28APMUCortexR52Core0ResetControlErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29APMUAccessProtectErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit29APMUAccessProtectErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit29APMUAccessProtectErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit29APMUAccessProtectErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30APMUDCLSErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit30APMUDCLSErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit30APMUDCLSErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit30APMUDCLSErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31MFISCheckerCoreComparisonErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit31MFISCheckerCoreComparisonErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit31MFISCheckerCoreComparisonErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain6/CddEmmBit31MFISCheckerCoreComparisonErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain7 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmAddressToSaveErrorStatus + 1342177308 + + + + + CddEmmBit0INTCapFaultHandlingInterrupt + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit0INTCapFaultHandlingInterrupt + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit0INTCapFaultHandlingInterrupt/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit0INTCapFaultHandlingInterrupt/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1INTCapErrorHandlingInterrupt + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit1INTCapErrorHandlingInterrupt + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit1INTCapErrorHandlingInterrupt/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit1INTCapErrorHandlingInterrupt/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2AXIBusECMVIP0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit2AXIBusECMVIP0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit2AXIBusECMVIP0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit2AXIBusECMVIP0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3AXIBusECMVIO0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit3AXIBusECMVIO0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit3AXIBusECMVIO0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit3AXIBusECMVIO0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4AXIBusECMVC0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit4AXIBusECMVC0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit4AXIBusECMVC0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit4AXIBusECMVC0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5AXIBusECM3DG + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit5AXIBusECM3DG + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit5AXIBusECM3DG/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit5AXIBusECM3DG/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6AXIBusECMTOP0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit6AXIBusECMTOP0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit6AXIBusECMTOP0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit6AXIBusECMTOP0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7AXIBusECMRT0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit7AXIBusECMRT0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit7AXIBusECMRT0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit7AXIBusECMRT0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8AXIBusECMHSC + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit8AXIBusECMHSC + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit8AXIBusECMHSC/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit8AXIBusECMHSC/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9AXIBusECMPER00 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit9AXIBusECMPER00 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit9AXIBusECMPER00/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit9AXIBusECMPER00/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10AXIBusECMMM + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit10AXIBusECMMM + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit10AXIBusECMMM/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit10AXIBusECMMM/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11AXIBusECMIMP + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit11AXIBusECMIMP + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit11AXIBusECMIMP/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit11AXIBusECMIMP/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12VSP2VSPX0InternalSRAMEDCWDTErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit12VSP2VSPX0InternalSRAMEDCWDTErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit12VSP2VSPX0InternalSRAMEDCWDTErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit12VSP2VSPX0InternalSRAMEDCWDTErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19RTVRAM0SafetyAccessProtectionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit19RTVRAM0SafetyAccessProtectionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit19RTVRAM0SafetyAccessProtectionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit19RTVRAM0SafetyAccessProtectionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20RTVRAM0SecureAccessProtectionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit20RTVRAM0SecureAccessProtectionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit20RTVRAM0SecureAccessProtectionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit20RTVRAM0SecureAccessProtectionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23RTVRAM0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit23RTVRAM0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit23RTVRAM0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit23RTVRAM0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27INTCapCA76Core0RequestOrderErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit27INTCapCA76Core0RequestOrderErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit27INTCapCA76Core0RequestOrderErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit27INTCapCA76Core0RequestOrderErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29RTVRAM0EdcMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit29RTVRAM0EdcMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit29RTVRAM0EdcMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit29RTVRAM0EdcMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30RTVRAM0Edc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit30RTVRAM0Edc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit30RTVRAM0Edc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain7/CddEmmBit30RTVRAM0Edc1bitErr/CddEmmErrorSignalTarget + INTC + + + + + + + CddEmmDomain8 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmAddressToSaveErrorStatus + 1342177312 + + + + + CddEmmBit21DSItxlink0EdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit21DSItxlink0EdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit21DSItxlink0EdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit21DSItxlink0EdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23AXCCTransactionOrderCheckMI1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit23AXCCTransactionOrderCheckMI1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit23AXCCTransactionOrderCheckMI1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit23AXCCTransactionOrderCheckMI1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29VSP2VSPD0DISCOMUnmatchedWdtErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit29VSP2VSPD0DISCOMUnmatchedWdtErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit29VSP2VSPD0DISCOMUnmatchedWdtErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit29VSP2VSPD0DISCOMUnmatchedWdtErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30VSP2VSPD0DISCOMFrozenErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit30VSP2VSPD0DISCOMFrozenErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit30VSP2VSPD0DISCOMFrozenErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain8/CddEmmBit30VSP2VSPD0DISCOMFrozenErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain9 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmAddressToSaveErrorStatus + 1342177316 + + + + + CddEmmBit24ECMSwGenID0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit24ECMSwGenID0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit24ECMSwGenID0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit24ECMSwGenID0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25ECMSwGenID1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit25ECMSwGenID1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit25ECMSwGenID1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit25ECMSwGenID1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26ECMSwGenID2Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit26ECMSwGenID2Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit26ECMSwGenID2Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit26ECMSwGenID2Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27ECMSwGenID3Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit27ECMSwGenID3Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit27ECMSwGenID3Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit27ECMSwGenID3Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28ECMSwGenID4Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit28ECMSwGenID4Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit28ECMSwGenID4Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit28ECMSwGenID4Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29ECMSwGenID5Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit29ECMSwGenID5Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit29ECMSwGenID5Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit29ECMSwGenID5Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30ECMSwGenID6Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit30ECMSwGenID6Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit30ECMSwGenID6Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit30ECMSwGenID6Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31ECMSwGenID7Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit31ECMSwGenID7Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit31ECMSwGenID7Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain9/CddEmmBit31ECMSwGenID7Err/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain10 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmAddressToSaveErrorStatus + 1342177320 + + + + + CddEmmBit2RTVRAMRTVRAM0Edc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit2RTVRAMRTVRAM0Edc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit2RTVRAMRTVRAM0Edc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit2RTVRAMRTVRAM0Edc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit2RTVRAMRTVRAM0Edc1bitErr/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit3RTVRAMRTVRAM0EdcMulbitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit3RTVRAMRTVRAM0EdcMulbitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit3RTVRAMRTVRAM0EdcMulbitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit3RTVRAMRTVRAM0EdcMulbitErr/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit3RTVRAMRTVRAM0EdcMulbitErr/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit6RTCore0TCMCorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit6RTCore0TCMCorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit6RTCore0TCMCorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit6RTCore0TCMCorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit6RTCore0TCMCorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit8RTCore0InstructionCacheErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit8RTCore0InstructionCacheErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit8RTCore0InstructionCacheErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit8RTCore0InstructionCacheErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit8RTCore0InstructionCacheErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit10RTCore0DataCacheErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit10RTCore0DataCacheErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit10RTCore0DataCacheErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit10RTCore0DataCacheErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit10RTCore0DataCacheErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit12RTCore0AXISICorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit12RTCore0AXISICorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit12RTCore0AXISICorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit12RTCore0AXISICorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit12RTCore0AXISICorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit14RTCore0AXIMICorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit14RTCore0AXIMICorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit14RTCore0AXIMICorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit14RTCore0AXIMICorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit14RTCore0AXIMICorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit16RTCore0ErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit16RTCore0ErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit16RTCore0ErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit16RTCore0ErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit16RTCore0ErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit18RTVRAM1Edc1bitCountupErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit18RTVRAM1Edc1bitCountupErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit18RTVRAM1Edc1bitCountupErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit18RTVRAM1Edc1bitCountupErr/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit18RTVRAM1Edc1bitCountupErr/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit19RTVRAM1EdcMulbitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit19RTVRAM1EdcMulbitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit19RTVRAM1EdcMulbitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit19RTVRAM1EdcMulbitErr/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit19RTVRAM1EdcMulbitErr/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit20IPMMUmmTLBRAMEdc1bitCountupErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit20IPMMUmmTLBRAMEdc1bitCountupErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit20IPMMUmmTLBRAMEdc1bitCountupErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit20IPMMUmmTLBRAMEdc1bitCountupErr/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit20IPMMUmmTLBRAMEdc1bitCountupErr/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit21IPMMUmmTLBRAMEdcMultibitCountupErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit21IPMMUmmTLBRAMEdcMultibitCountupErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit21IPMMUmmTLBRAMEdcMultibitCountupErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit21IPMMUmmTLBRAMEdcMultibitCountupErr/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit21IPMMUmmTLBRAMEdcMultibitCountupErr/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit22RTCore1AXIMICorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit22RTCore1AXIMICorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit22RTCore1AXIMICorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit22RTCore1AXIMICorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit22RTCore1AXIMICorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit24RTCore1AXISICorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit24RTCore1AXISICorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit24RTCore1AXISICorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit24RTCore1AXISICorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit24RTCore1AXISICorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit26RTCore1DataCacheErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit26RTCore1DataCacheErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit26RTCore1DataCacheErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit26RTCore1DataCacheErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit26RTCore1DataCacheErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit28RTCore1InstructionCacheErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit28RTCore1InstructionCacheErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit28RTCore1InstructionCacheErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit28RTCore1InstructionCacheErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit28RTCore1InstructionCacheErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit30RTCore1ErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit30RTCore1ErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit30RTCore1ErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit30RTCore1ErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain10/CddEmmBit30RTCore1ErrCounter/CddEmmErrorMaxCount + 1 + + + + + + + CddEmmDomain11 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmAddressToSaveErrorStatus + 1342177324 + + + + + CddEmmBit0RTCore1TCMCorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit0RTCore1TCMCorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit0RTCore1TCMCorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit0RTCore1TCMCorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit0RTCore1TCMCorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit2RTCore2AXIMICorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit2RTCore2AXIMICorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit2RTCore2AXIMICorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit2RTCore2AXIMICorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit2RTCore2AXIMICorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit4RTCore2AXISICorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit4RTCore2AXISICorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit4RTCore2AXISICorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit4RTCore2AXISICorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit4RTCore2AXISICorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit6RTCore2DataCacheErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit6RTCore2DataCacheErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit6RTCore2DataCacheErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit6RTCore2DataCacheErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit6RTCore2DataCacheErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit8RTCore2InstructionCacheErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit8RTCore2InstructionCacheErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit8RTCore2InstructionCacheErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit8RTCore2InstructionCacheErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit8RTCore2InstructionCacheErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit10RTCore2ErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit10RTCore2ErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit10RTCore2ErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit10RTCore2ErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit10RTCore2ErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit12RTCore2TCMCorrectableErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit12RTCore2TCMCorrectableErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit12RTCore2TCMCorrectableErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit12RTCore2TCMCorrectableErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit12RTCore2TCMCorrectableErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit18APSysCA76Core3L1IL1DL2MmuCorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit18APSysCA76Core3L1IL1DL2MmuCorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit18APSysCA76Core3L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit18APSysCA76Core3L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit18APSysCA76Core3L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit19APSysCA76Core3L1IL1DL2MmuUncorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit19APSysCA76Core3L1IL1DL2MmuUncorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit19APSysCA76Core3L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit19APSysCA76Core3L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit19APSysCA76Core3L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit20APSysCA76Core2L1IL1DL2MmuCorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit20APSysCA76Core2L1IL1DL2MmuCorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit20APSysCA76Core2L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit20APSysCA76Core2L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit20APSysCA76Core2L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit24APSysCA76Core1L1IL1DL2MmuCorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit24APSysCA76Core1L1IL1DL2MmuCorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit24APSysCA76Core1L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit24APSysCA76Core1L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit24APSysCA76Core1L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit25APSysCA76Core1L1IL1DL2MmuUncorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit25APSysCA76Core1L1IL1DL2MmuUncorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit25APSysCA76Core1L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit25APSysCA76Core1L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit25APSysCA76Core1L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit26APSysCA76Core0L1IL1DL2MmuCorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit26APSysCA76Core0L1IL1DL2MmuCorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit26APSysCA76Core0L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit26APSysCA76Core0L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit26APSysCA76Core0L1IL1DL2MmuCorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit27APSysCA76Core0L1IL1DL2MmuUncorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit27APSysCA76Core0L1IL1DL2MmuUncorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit27APSysCA76Core0L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit27APSysCA76Core0L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit27APSysCA76Core0L1IL1DL2MmuUncorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit28APSysL3Cl0correctedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit28APSysL3Cl0correctedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit28APSysL3Cl0correctedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit28APSysL3Cl0correctedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit28APSysL3Cl0correctedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit29APSysL3Cl0UncorrectedErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit29APSysL3Cl0UncorrectedErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit29APSysL3Cl0UncorrectedErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit29APSysL3Cl0UncorrectedErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit29APSysL3Cl0UncorrectedErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit30CANFDRAMEcc1bitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit30CANFDRAMEcc1bitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit30CANFDRAMEcc1bitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit30CANFDRAMEcc1bitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit30CANFDRAMEcc1bitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit31CANFDRAMEcc2bitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit31CANFDRAMEcc2bitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit31CANFDRAMEcc2bitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit31CANFDRAMEcc2bitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain11/CddEmmBit31CANFDRAMEcc2bitErrCounter/CddEmmErrorMaxCount + 1 + + + + + + + CddEmmDomain12 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmAddressToSaveErrorStatus + 1342177328 + + + + + CddEmmBit0FLEXRAYTBF2InterruptNotificationEccErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit0FLEXRAYTBF2InterruptNotificationEccErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit0FLEXRAYTBF2InterruptNotificationEccErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit0FLEXRAYTBF2InterruptNotificationEccErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit0FLEXRAYTBF2InterruptNotificationEccErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit1FLEXRAYTBF2InterruptNotificationEdcErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit1FLEXRAYTBF2InterruptNotificationEdcErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit1FLEXRAYTBF2InterruptNotificationEdcErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit1FLEXRAYTBF2InterruptNotificationEdcErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit1FLEXRAYTBF2InterruptNotificationEdcErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit2FLEXRAYTBF1InterruptNotificationEccErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit2FLEXRAYTBF1InterruptNotificationEccErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit2FLEXRAYTBF1InterruptNotificationEccErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit2FLEXRAYTBF1InterruptNotificationEccErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit2FLEXRAYTBF1InterruptNotificationEccErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit3FLEXRAYTBF1InterruptNotificationEdcErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit3FLEXRAYTBF1InterruptNotificationEdcErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit3FLEXRAYTBF1InterruptNotificationEdcErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit3FLEXRAYTBF1InterruptNotificationEdcErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit3FLEXRAYTBF1InterruptNotificationEdcErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit4FLEXRAYMBFInterruptNotificationEccErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit4FLEXRAYMBFInterruptNotificationEccErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit4FLEXRAYMBFInterruptNotificationEccErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit4FLEXRAYMBFInterruptNotificationEccErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit4FLEXRAYMBFInterruptNotificationEccErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit5FLEXRAYMBFInterruptNotificationEdcErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit5FLEXRAYMBFInterruptNotificationEdcErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit5FLEXRAYMBFInterruptNotificationEdcErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit5FLEXRAYMBFInterruptNotificationEdcErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit5FLEXRAYMBFInterruptNotificationEdcErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit6EtherAVB2TXRAMEcc1bitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit6EtherAVB2TXRAMEcc1bitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit6EtherAVB2TXRAMEcc1bitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit6EtherAVB2TXRAMEcc1bitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit6EtherAVB2TXRAMEcc1bitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit7EtherAVB2TXRAMEccMultibitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit7EtherAVB2TXRAMEccMultibitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit7EtherAVB2TXRAMEccMultibitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit7EtherAVB2TXRAMEccMultibitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit7EtherAVB2TXRAMEccMultibitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit8EtherAVB2RXRAMEcc1bitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit8EtherAVB2RXRAMEcc1bitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit8EtherAVB2RXRAMEcc1bitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit8EtherAVB2RXRAMEcc1bitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit8EtherAVB2RXRAMEcc1bitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit9EtherAVB2RXRAMEccMultibitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit9EtherAVB2RXRAMEccMultibitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit9EtherAVB2RXRAMEccMultibitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit9EtherAVB2RXRAMEccMultibitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit9EtherAVB2RXRAMEccMultibitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit10EtherAVB1TXRAMEcc1bitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit10EtherAVB1TXRAMEcc1bitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit10EtherAVB1TXRAMEcc1bitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit10EtherAVB1TXRAMEcc1bitErrCounter/CddEmmErrorSignalTarget + INTC + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit10EtherAVB1TXRAMEcc1bitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit11EtherAVB1TXRAMEccMultibitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit11EtherAVB1TXRAMEccMultibitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit11EtherAVB1TXRAMEccMultibitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit11EtherAVB1TXRAMEccMultibitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit11EtherAVB1TXRAMEccMultibitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit12EtherAVB1RXRAMEcc1bitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit12EtherAVB1RXRAMEcc1bitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit12EtherAVB1RXRAMEcc1bitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit12EtherAVB1RXRAMEcc1bitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit12EtherAVB1RXRAMEcc1bitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit13EtherAVB1RXRAMEccMultibitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit13EtherAVB1RXRAMEccMultibitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit13EtherAVB1RXRAMEccMultibitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit13EtherAVB1RXRAMEccMultibitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit13EtherAVB1RXRAMEccMultibitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit14EtherAVB0TXRAMEcc1bitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit14EtherAVB0TXRAMEcc1bitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit14EtherAVB0TXRAMEcc1bitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit14EtherAVB0TXRAMEcc1bitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit14EtherAVB0TXRAMEcc1bitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit15EtherAVB0TXRAMEccMultibitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit15EtherAVB0TXRAMEccMultibitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit15EtherAVB0TXRAMEccMultibitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit15EtherAVB0TXRAMEccMultibitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit15EtherAVB0TXRAMEccMultibitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit16EtherAVB0RXRAMEcc1bitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit16EtherAVB0RXRAMEcc1bitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit16EtherAVB0RXRAMEcc1bitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit16EtherAVB0RXRAMEcc1bitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit16EtherAVB0RXRAMEcc1bitErrCounter/CddEmmErrorMaxCount + 1 + + + + + CddEmmBit17EtherAVB0RXRAMEccMultibitErrCounter + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit17EtherAVB0RXRAMEccMultibitErrCounter + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit17EtherAVB0RXRAMEccMultibitErrCounter/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit17EtherAVB0RXRAMEccMultibitErrCounter/CddEmmErrorSignalTarget + ERROROUT + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain12/CddEmmBit17EtherAVB0RXRAMEccMultibitErrCounter/CddEmmErrorMaxCount + 1 + + + + + + + CddEmmDomain16 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmAddressToSaveErrorStatus + 1342177332 + + + + + CddEmmBit0RTCore0EDCBtwRTCPUAXISlavebridgeErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit0RTCore0EDCBtwRTCPUAXISlavebridgeErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit0RTCore0EDCBtwRTCPUAXISlavebridgeErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit0RTCore0EDCBtwRTCPUAXISlavebridgeErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit1RTCore0TCMMemoriesFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit1RTCore0TCMMemoriesFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit1RTCore0TCMMemoriesFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit1RTCore0TCMMemoriesFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2RTCore0TCMCorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit2RTCore0TCMCorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit2RTCore0TCMCorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit2RTCore0TCMCorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3RTCore0EDCBtwRTCPUWritebufferErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit3RTCore0EDCBtwRTCPUWritebufferErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit3RTCore0EDCBtwRTCPUWritebufferErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit3RTCore0EDCBtwRTCPUWritebufferErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4RTCore0AXISILockstepComparator0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit4RTCore0AXISILockstepComparator0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit4RTCore0AXISILockstepComparator0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit4RTCore0AXISILockstepComparator0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5RTCore0InstructionCacheErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit5RTCore0InstructionCacheErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit5RTCore0InstructionCacheErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit5RTCore0InstructionCacheErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6RTCore0DataCacheErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit6RTCore0DataCacheErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit6RTCore0DataCacheErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit6RTCore0DataCacheErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7RTCore0AXISILockstepComparator1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit7RTCore0AXISILockstepComparator1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit7RTCore0AXISILockstepComparator1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit7RTCore0AXISILockstepComparator1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8RTCore0AXIMIDECERRSLVERRBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit8RTCore0AXIMIDECERRSLVERRBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit8RTCore0AXIMIDECERRSLVERRBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit8RTCore0AXIMIDECERRSLVERRBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9RTCore0AXISIFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit9RTCore0AXISIFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit9RTCore0AXISIFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit9RTCore0AXISIFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10RTCore0AXISICorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit10RTCore0AXISICorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit10RTCore0AXISICorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit10RTCore0AXISICorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11RTCore0AXIMIFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit11RTCore0AXIMIFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit11RTCore0AXIMIFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit11RTCore0AXIMIFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12RTCore0AXIMICorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit12RTCore0AXIMICorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit12RTCore0AXIMICorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit12RTCore0AXIMICorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13RTCore0NonSafetySwitchingComparator0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit13RTCore0NonSafetySwitchingComparator0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit13RTCore0NonSafetySwitchingComparator0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit13RTCore0NonSafetySwitchingComparator0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20THSTsc2TempExceedsThreshold3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit20THSTsc2TempExceedsThreshold3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit20THSTsc2TempExceedsThreshold3/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit20THSTsc2TempExceedsThreshold3/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21THSTsc2TempExceedsThreshold2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit21THSTsc2TempExceedsThreshold2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit21THSTsc2TempExceedsThreshold2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit21THSTsc2TempExceedsThreshold2/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22THSTsc2TempExceedsThreshold1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit22THSTsc2TempExceedsThreshold1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit22THSTsc2TempExceedsThreshold1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit22THSTsc2TempExceedsThreshold1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23THSTsc1TempExceedsThreshold3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit23THSTsc1TempExceedsThreshold3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit23THSTsc1TempExceedsThreshold3/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit23THSTsc1TempExceedsThreshold3/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24THSTsc1TempExceedsThreshold2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit24THSTsc1TempExceedsThreshold2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit24THSTsc1TempExceedsThreshold2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit24THSTsc1TempExceedsThreshold2/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25THSTsc1TempExceedsThreshold1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit25THSTsc1TempExceedsThreshold1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit25THSTsc1TempExceedsThreshold1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit25THSTsc1TempExceedsThreshold1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28THSTsc2DetectsFailure + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit28THSTsc2DetectsFailure + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit28THSTsc2DetectsFailure/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit28THSTsc2DetectsFailure/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29THSTsc1DetectsFailure + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit29THSTsc1DetectsFailure + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit29THSTsc1DetectsFailure/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain16/CddEmmBit29THSTsc1DetectsFailure/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain17 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmAddressToSaveErrorStatus + 1342177336 + + + + + CddEmmBit5RTCore0NonSafetySwitchingComparator1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit5RTCore0NonSafetySwitchingComparator1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit5RTCore0NonSafetySwitchingComparator1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit5RTCore0NonSafetySwitchingComparator1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6RTCore0AsynchronousTransferErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit6RTCore0AsynchronousTransferErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit6RTCore0AsynchronousTransferErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit6RTCore0AsynchronousTransferErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7RTCore0IllegalAxSIZEAxBURSTErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit7RTCore0IllegalAxSIZEAxBURSTErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit7RTCore0IllegalAxSIZEAxBURSTErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit7RTCore0IllegalAxSIZEAxBURSTErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10RTCore0FatalErrCannotRecorded + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit10RTCore0FatalErrCannotRecorded + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit10RTCore0FatalErrCannotRecorded/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit10RTCore0FatalErrCannotRecorded/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11RTCore0CorrectableNotRecordedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit11RTCore0CorrectableNotRecordedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit11RTCore0CorrectableNotRecordedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit11RTCore0CorrectableNotRecordedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12RTCore0ErrorPchannel + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit12RTCore0ErrorPchannel + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit12RTCore0ErrorPchannel/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit12RTCore0ErrorPchannel/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15RTVRAM0CRCErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit15RTVRAM0CRCErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit15RTVRAM0CRCErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit15RTVRAM0CRCErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16RTVRAM0CheckerCoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit16RTVRAM0CheckerCoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit16RTVRAM0CheckerCoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit16RTVRAM0CheckerCoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17RTVRAM1CheckerCoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit17RTVRAM1CheckerCoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit17RTVRAM1CheckerCoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit17RTVRAM1CheckerCoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18RTVRAM1EdcMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit18RTVRAM1EdcMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit18RTVRAM1EdcMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit18RTVRAM1EdcMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19RTVRAM1Edc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit19RTVRAM1Edc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit19RTVRAM1Edc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit19RTVRAM1Edc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20RTVRAM1CRCErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit20RTVRAM1CRCErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit20RTVRAM1CRCErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit20RTVRAM1CRCErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21RTVRAM1SafetyAccessProtectionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit21RTVRAM1SafetyAccessProtectionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit21RTVRAM1SafetyAccessProtectionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit21RTVRAM1SafetyAccessProtectionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22RTVRAM1SecureAccessProtectionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit22RTVRAM1SecureAccessProtectionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit22RTVRAM1SecureAccessProtectionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit22RTVRAM1SecureAccessProtectionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23RTVRAM1TimeOutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit23RTVRAM1TimeOutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit23RTVRAM1TimeOutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit23RTVRAM1TimeOutErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit24FCPRCInternaSRAMEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit24FCPRCInternaSRAMEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit24FCPRCInternaSRAMEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit24FCPRCInternaSRAMEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26FCPRSInternalSRAMEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit26FCPRSInternalSRAMEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit26FCPRSInternalSRAMEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit26FCPRSInternalSRAMEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27FCPRSDCLSErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit27FCPRSDCLSErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit27FCPRSDCLSErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit27FCPRSDCLSErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29VIPFCPRMInternalSRAMEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit29VIPFCPRMInternalSRAMEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit29VIPFCPRMInternalSRAMEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain17/CddEmmBit29VIPFCPRMInternalSRAMEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain18 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmAddressToSaveErrorStatus + 1342177340 + + + + + CddEmmBit0RFSOCFE0ErrCh7 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit0RFSOCFE0ErrCh7 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit0RFSOCFE0ErrCh7/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit0RFSOCFE0ErrCh7/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1RFSOCFE0ErrCh6 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit1RFSOCFE0ErrCh6 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit1RFSOCFE0ErrCh6/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit1RFSOCFE0ErrCh6/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2RFSOCFE0ErrCh5 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit2RFSOCFE0ErrCh5 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit2RFSOCFE0ErrCh5/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit2RFSOCFE0ErrCh5/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3RFSOCFE0ErrCh4 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit3RFSOCFE0ErrCh4 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit3RFSOCFE0ErrCh4/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit3RFSOCFE0ErrCh4/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4RFSOCFE0ErrCh3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit4RFSOCFE0ErrCh3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit4RFSOCFE0ErrCh3/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit4RFSOCFE0ErrCh3/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5RFSOCFE0ErrCh2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit5RFSOCFE0ErrCh2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit5RFSOCFE0ErrCh2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit5RFSOCFE0ErrCh2/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6RFSOCFE0ErrCh10 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit6RFSOCFE0ErrCh10 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit6RFSOCFE0ErrCh10/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit6RFSOCFE0ErrCh10/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7RFSOCFE0ErrCh1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit7RFSOCFE0ErrCh1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit7RFSOCFE0ErrCh1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit7RFSOCFE0ErrCh1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8RFSOCFE0ErrCh0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit8RFSOCFE0ErrCh0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit8RFSOCFE0ErrCh0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit8RFSOCFE0ErrCh0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9APMUCortexR52Core2ResetControlErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit9APMUCortexR52Core2ResetControlErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit9APMUCortexR52Core2ResetControlErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit9APMUCortexR52Core2ResetControlErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10APMUCortexR52Core1ResetControlErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit10APMUCortexR52Core1ResetControlErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit10APMUCortexR52Core1ResetControlErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit10APMUCortexR52Core1ResetControlErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12APMUCA76Cl0PowerControlErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit12APMUCA76Cl0PowerControlErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit12APMUCA76Cl0PowerControlErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit12APMUCA76Cl0PowerControlErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13iVCP1EInternalSRAMEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit13iVCP1EInternalSRAMEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit13iVCP1EInternalSRAMEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit13iVCP1EInternalSRAMEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18ISPChSelectorErrCh1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit18ISPChSelectorErrCh1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit18ISPChSelectorErrCh1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit18ISPChSelectorErrCh1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20ISPChSelectorErrCh0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit20ISPChSelectorErrCh0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit20ISPChSelectorErrCh0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit20ISPChSelectorErrCh0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21ISPCoreErrCh0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit21ISPCoreErrCh0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit21ISPCoreErrCh0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit21ISPCoreErrCh0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22IMRLX6Ch1EcmErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit22IMRLX6Ch1EcmErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit22IMRLX6Ch1EcmErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit22IMRLX6Ch1EcmErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit23IMRLX6Ch0EcmErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit23IMRLX6Ch0EcmErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit23IMRLX6Ch0EcmErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit23IMRLX6Ch0EcmErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26IMRLX6Ch3EcmErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit26IMRLX6Ch3EcmErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit26IMRLX6Ch3EcmErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit26IMRLX6Ch3EcmErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27IMRLX6Ch2EcmErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit27IMRLX6Ch2EcmErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit27IMRLX6Ch2EcmErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain18/CddEmmBit27IMRLX6Ch2EcmErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain19 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmAddressToSaveErrorStatus + 1342177344 + + + + + CddEmmBit0DMAC2SYSSecurityAccessErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit0DMAC2SYSSecurityAccessErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit0DMAC2SYSSecurityAccessErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit0DMAC2SYSSecurityAccessErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4DBSC5DFIDomaindclsECMErrDbs0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit4DBSC5DFIDomaindclsECMErrDbs0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit4DBSC5DFIDomaindclsECMErrDbs0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit4DBSC5DFIDomaindclsECMErrDbs0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5DBSC5AXIDomaindclsECMrrDbs0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit5DBSC5AXIDomaindclsECMrrDbs0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit5DBSC5AXIDomaindclsECMrrDbs0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit5DBSC5AXIDomaindclsECMrrDbs0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8RFSOTOEErrCh9 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit8RFSOTOEErrCh9 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit8RFSOTOEErrCh9/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit8RFSOTOEErrCh9/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9RFSOTOEErrCh8 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit9RFSOTOEErrCh8 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit9RFSOTOEErrCh8/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit9RFSOTOEErrCh8/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10RFSOTOEErrCh7 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit10RFSOTOEErrCh7 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit10RFSOTOEErrCh7/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit10RFSOTOEErrCh7/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit11RFSOTOEErrCh6 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit11RFSOTOEErrCh6 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit11RFSOTOEErrCh6/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit11RFSOTOEErrCh6/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12RFSOTOEErrCh5 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit12RFSOTOEErrCh5 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit12RFSOTOEErrCh5/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit12RFSOTOEErrCh5/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13RFSOTOEErrCh4 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit13RFSOTOEErrCh4 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit13RFSOTOEErrCh4/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit13RFSOTOEErrCh4/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14RFSOTOEErrCh3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit14RFSOTOEErrCh3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit14RFSOTOEErrCh3/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit14RFSOTOEErrCh3/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15RFSOTOEErrCh2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit15RFSOTOEErrCh2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit15RFSOTOEErrCh2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit15RFSOTOEErrCh2/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16RFSOTOEErrCh10 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit16RFSOTOEErrCh10 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit16RFSOTOEErrCh10/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit16RFSOTOEErrCh10/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17RFSOTOEErrCh1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit17RFSOTOEErrCh1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit17RFSOTOEErrCh1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit17RFSOTOEErrCh1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18RFSOTOEErrCh0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit18RFSOTOEErrCh0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit18RFSOTOEErrCh0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit18RFSOTOEErrCh0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19RFSOCFE1ErrCh9 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit19RFSOCFE1ErrCh9 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit19RFSOCFE1ErrCh9/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit19RFSOCFE1ErrCh9/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20RFSOCFE1ErrCh8 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit20RFSOCFE1ErrCh8 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit20RFSOCFE1ErrCh8/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit20RFSOCFE1ErrCh8/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21RFSOCFE1ErrCh7 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit21RFSOCFE1ErrCh7 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit21RFSOCFE1ErrCh7/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit21RFSOCFE1ErrCh7/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22RFSOCFE1ErrCh6 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit22RFSOCFE1ErrCh6 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit22RFSOCFE1ErrCh6/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit22RFSOCFE1ErrCh6/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23RFSOCFE1ErrCh5 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit23RFSOCFE1ErrCh5 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit23RFSOCFE1ErrCh5/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit23RFSOCFE1ErrCh5/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24RFSOCFE1ErrCh4 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit24RFSOCFE1ErrCh4 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit24RFSOCFE1ErrCh4/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit24RFSOCFE1ErrCh4/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25RFSOCFE1ErrCh3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit25RFSOCFE1ErrCh3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit25RFSOCFE1ErrCh3/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit25RFSOCFE1ErrCh3/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26RFSOCFE1ErrCh2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit26RFSOCFE1ErrCh2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit26RFSOCFE1ErrCh2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit26RFSOCFE1ErrCh2/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27RFSOCFE1ErrCh10 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit27RFSOCFE1ErrCh10 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit27RFSOCFE1ErrCh10/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit27RFSOCFE1ErrCh10/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28RFSOCFE1ErrCh1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit28RFSOCFE1ErrCh1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit28RFSOCFE1ErrCh1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit28RFSOCFE1ErrCh1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29RFSOCFE1ErrCh0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit29RFSOCFE1ErrCh0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit29RFSOCFE1ErrCh0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit29RFSOCFE1ErrCh0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30RFSOCFE0ErrCh9 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit30RFSOCFE0ErrCh9 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit30RFSOCFE0ErrCh9/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit30RFSOCFE0ErrCh9/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31RFSOCFE0ErrCh8 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit31RFSOCFE0ErrCh8 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit31RFSOCFE0ErrCh8/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain19/CddEmmBit31RFSOCFE0ErrCh8/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain20 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmAddressToSaveErrorStatus + 1342177348 + + + + + CddEmmBit1IPMMUirCoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit1IPMMUirCoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit1IPMMUirCoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit1IPMMUirCoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2IPMMUrt0CoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit2IPMMUrt0CoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit2IPMMUrt0CoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit2IPMMUrt0CoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3IPMMUmmoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit3IPMMUmmoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit3IPMMUmmoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit3IPMMUmmoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4IPMMUds0CoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit4IPMMUds0CoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit4IPMMUds0CoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit4IPMMUds0CoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5DMAC0RTFusaDCLSComparisonErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit5DMAC0RTFusaDCLSComparisonErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit5DMAC0RTFusaDCLSComparisonErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit5DMAC0RTFusaDCLSComparisonErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6DMAC0RTSecurityAccessErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit6DMAC0RTSecurityAccessErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit6DMAC0RTSecurityAccessErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit6DMAC0RTSecurityAccessErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit9DMAC1RTFusaDCLSComparisonErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit9DMAC1RTFusaDCLSComparisonErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit9DMAC1RTFusaDCLSComparisonErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit9DMAC1RTFusaDCLSComparisonErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10DMAC1RTSecurityAccessErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit10DMAC1RTSecurityAccessErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit10DMAC1RTSecurityAccessErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit10DMAC1RTSecurityAccessErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21DMAC1SYSFusaDCLSComparisonErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit21DMAC1SYSFusaDCLSComparisonErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit21DMAC1SYSFusaDCLSComparisonErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit21DMAC1SYSFusaDCLSComparisonErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22DMAC1SYSSecurityAccessErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit22DMAC1SYSSecurityAccessErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit22DMAC1SYSSecurityAccessErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit22DMAC1SYSSecurityAccessErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25DMAC2SYSFusaDCLSComparisonErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit25DMAC2SYSFusaDCLSComparisonErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit25DMAC2SYSFusaDCLSComparisonErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit25DMAC2SYSFusaDCLSComparisonErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26RTCore0LongHypervisorInterruptErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit26RTCore0LongHypervisorInterruptErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit26RTCore0LongHypervisorInterruptErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit26RTCore0LongHypervisorInterruptErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27RTCore0HypervisorModeFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit27RTCore0HypervisorModeFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit27RTCore0HypervisorModeFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit27RTCore0HypervisorModeFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28RTCore0EL2ControlledabortExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit28RTCore0EL2ControlledabortExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit28RTCore0EL2ControlledabortExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit28RTCore0EL2ControlledabortExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29RTCore0EL1ControlledAbortExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit29RTCore0EL1ControlledAbortExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit29RTCore0EL1ControlledAbortExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit29RTCore0EL1ControlledAbortExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30RTCore0UndefinedExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit30RTCore0UndefinedExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit30RTCore0UndefinedExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit30RTCore0UndefinedExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31RTCore0AXIMITimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit31RTCore0AXIMITimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit31RTCore0AXIMITimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain20/CddEmmBit31RTCore0AXIMITimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain21 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmAddressToSaveErrorStatus + 1342177352 + + + + + CddEmmBit0CPGPLLCBFUSAFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit0CPGPLLCBFUSAFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit0CPGPLLCBFUSAFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit0CPGPLLCBFUSAFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1CPGSlAccessBusFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit1CPGSlAccessBusFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit1CPGSlAccessBusFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit1CPGSlAccessBusFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2CPGRTckmcr52FreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit2CPGRTckmcr52FreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit2CPGRTckmcr52FreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit2CPGRTckmcr52FreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3CPGHSCFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit3CPGHSCFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit3CPGHSCFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit3CPGHSCFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9CPGMMFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit9CPGMMFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit9CPGMMFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit9CPGMMFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15CPGPeripheralFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit15CPGPeripheralFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit15CPGPeripheralFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit15CPGPeripheralFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16CPGRTckmrtFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit16CPGRTckmrtFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit16CPGRTckmrtFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit16CPGRTckmrtFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21IPMMUmmTLBRAMEdc1bitlErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit21IPMMUmmTLBRAMEdc1bitlErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit21IPMMUmmTLBRAMEdc1bitlErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit21IPMMUmmTLBRAMEdc1bitlErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22IPMMUmmTLBRAMEdcMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit22IPMMUmmTLBRAMEdcMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit22IPMMUmmTLBRAMEdcMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit22IPMMUmmTLBRAMEdcMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24IPMMUvip0CoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit24IPMMUvip0CoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit24IPMMUvip0CoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit24IPMMUvip0CoreComparitionErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit25IPMMUvi1CoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit25IPMMUvi1CoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit25IPMMUvi1CoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit25IPMMUvi1CoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26IPMMUvi0CoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit26IPMMUvi0CoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit26IPMMUvi0CoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit26IPMMUvi0CoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27IPMMUvcCoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit27IPMMUvcCoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit27IPMMUvcCoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit27IPMMUvcCoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28IPMMUrt1CoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit28IPMMUrt1CoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit28IPMMUrt1CoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit28IPMMUrt1CoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29IPMMU3dgCoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit29IPMMU3dgCoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit29IPMMU3dgCoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit29IPMMU3dgCoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31IPMMUhcCoreComparitionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit31IPMMUhcCoreComparitionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit31IPMMUhcCoreComparitionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain21/CddEmmBit31IPMMUhcCoreComparitionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain22 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain22 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain22/CddEmmAddressToSaveErrorStatus + 1342177356 + + + + + CddEmmBit28ICUMXclockmonitorErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain22/CddEmmBit28ICUMXclockmonitorErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain22/CddEmmBit28ICUMXclockmonitorErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain22/CddEmmBit28ICUMXclockmonitorErr/CddEmmErrorSignalTarget + INTC + + + + + + + CddEmmDomain23 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmAddressToSaveErrorStatus + 1342177360 + + + + + CddEmmBit3FSIRHierarchyCnn0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit3FSIRHierarchyCnn0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit3FSIRHierarchyCnn0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit3FSIRHierarchyCnn0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14FSIRHierarchyDSP0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit14FSIRHierarchyDSP0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit14FSIRHierarchyDSP0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit14FSIRHierarchyDSP0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15FSIRHierarchyDSP1TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit15FSIRHierarchyDSP1TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit15FSIRHierarchyDSP1TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit15FSIRHierarchyDSP1TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20FSIRHierarchyCNRAM0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit20FSIRHierarchyCNRAM0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit20FSIRHierarchyCNRAM0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit20FSIRHierarchyCNRAM0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23FSIRHierarchyIMPRAM0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit23FSIRHierarchyIMPRAM0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit23FSIRHierarchyIMPRAM0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit23FSIRHierarchyIMPRAM0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25FS3DGHierarchyRASCALTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit25FS3DGHierarchyRASCALTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit25FS3DGHierarchyRASCALTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit25FS3DGHierarchyRASCALTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26FS3DGHierarchyDUSTATimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit26FS3DGHierarchyDUSTATimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit26FS3DGHierarchyDUSTATimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit26FS3DGHierarchyDUSTATimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27FS3DGHierarchySLCSIDEKICKTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit27FS3DGHierarchySLCSIDEKICKTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit27FS3DGHierarchySLCSIDEKICKTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit27FS3DGHierarchySLCSIDEKICKTimeoutErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit28FS3DGHierarchyexceptRGXcoreTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit28FS3DGHierarchyexceptRGXcoreTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit28FS3DGHierarchyexceptRGXcoreTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit28FS3DGHierarchyexceptRGXcoreTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29FS3DGHierarchyXonstTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit29FS3DGHierarchyXonstTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit29FS3DGHierarchyXonstTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit29FS3DGHierarchyXonstTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30FSMMHierarchyDDRTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit30FSMMHierarchyDDRTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit30FSMMHierarchyDDRTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain23/CddEmmBit30FSMMHierarchyDDRTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain24 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmAddressToSaveErrorStatus + 1342177364 + + + + + CddEmmBit0FSVCHierarchyIMR1TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit0FSVCHierarchyIMR1TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit0FSVCHierarchyIMR1TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit0FSVCHierarchyIMR1TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3FSVCHierarchyIMS0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit3FSVCHierarchyIMS0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit3FSVCHierarchyIMS0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit3FSVCHierarchyIMS0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4FSVCHierarchyIMS1TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit4FSVCHierarchyIMS1TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit4FSVCHierarchyIMS1TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit4FSVCHierarchyIMS1TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6FSVIPHierarchyTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit6FSVIPHierarchyTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit6FSVIPHierarchyTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit6FSVIPHierarchyTimeoutErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit7FBPAPTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit7FBPAPTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit7FBPAPTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit7FBPAPTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9FSVIPHierarchyUMFL0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit9FSVIPHierarchyUMFL0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit9FSVIPHierarchyUMFL0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit9FSVIPHierarchyUMFL0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11FSVIPHierarchySMPS0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit11FSVIPHierarchySMPS0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit11FSVIPHierarchySMPS0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit11FSVIPHierarchySMPS0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15FSVIPHierarchySMPO0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit15FSVIPHierarchySMPO0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit15FSVIPHierarchySMPO0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit15FSVIPHierarchySMPO0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19FSIRHierarchyTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit19FSIRHierarchyTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit19FSIRHierarchyTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit19FSIRHierarchyTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20FSIRHierarchyA3IRBusWrapperTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit20FSIRHierarchyA3IRBusWrapperTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit20FSIRHierarchyA3IRBusWrapperTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit20FSIRHierarchyA3IRBusWrapperTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21FSIRHierarchyIMP0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit21FSIRHierarchyIMP0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit21FSIRHierarchyIMP0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit21FSIRHierarchyIMP0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22FSIRHierarchyIMP1TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit22FSIRHierarchyIMP1TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit22FSIRHierarchyIMP1TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit22FSIRHierarchyIMP1TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25FSIRHierarchyPSC0DMAC0RepeatTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit25FSIRHierarchyPSC0DMAC0RepeatTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit25FSIRHierarchyPSC0DMAC0RepeatTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit25FSIRHierarchyPSC0DMAC0RepeatTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26FSIRHierarchyDMAC2DMAC1RepeatTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit26FSIRHierarchyDMAC2DMAC1RepeatTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit26FSIRHierarchyDMAC2DMAC1RepeatTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit26FSIRHierarchyDMAC2DMAC1RepeatTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27FSIRHierarchyOCV0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit27FSIRHierarchyOCV0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit27FSIRHierarchyOCV0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit27FSIRHierarchyOCV0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28FSIRHierarchyOCV1TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit28FSIRHierarchyOCV1TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit28FSIRHierarchyOCV1TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit28FSIRHierarchyOCV1TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29FSIRHierarchyOCV2TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit29FSIRHierarchyOCV2TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit29FSIRHierarchyOCV2TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit29FSIRHierarchyOCV2TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30FSIRHierarchyOCV3TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit30FSIRHierarchyOCV3TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit30FSIRHierarchyOCV3TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain24/CddEmmBit30FSIRHierarchyOCV3TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain25 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmAddressToSaveErrorStatus + 1342177368 + + + + + CddEmmBit0FSTOPHierarchyTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit0FSTOPHierarchyTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit0FSTOPHierarchyTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit0FSTOPHierarchyTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1FSMMHierarchyTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit1FSMMHierarchyTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit1FSMMHierarchyTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit1FSMMHierarchyTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2FSMMHierarchyDBSC0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit2FSMMHierarchyDBSC0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit2FSMMHierarchyDBSC0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit2FSMMHierarchyDBSC0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4FSrtCPUHierarchyTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit4FSrtCPUHierarchyTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit4FSrtCPUHierarchyTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit4FSrtCPUHierarchyTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5FSrtCPUHierarchyCR52TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit5FSrtCPUHierarchyCR52TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit5FSrtCPUHierarchyCR52TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit5FSrtCPUHierarchyCR52TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7FSCPU0HierarchyC4TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit7FSCPU0HierarchyC4TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit7FSCPU0HierarchyC4TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit7FSCPU0HierarchyC4TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9FSCPU0HierarchyCl0L3CacheTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit9FSCPU0HierarchyCl0L3CacheTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit9FSCPU0HierarchyCl0L3CacheTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit9FSCPU0HierarchyCl0L3CacheTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11FSCPU0HierarchyCl0CPU0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit11FSCPU0HierarchyCl0CPU0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit11FSCPU0HierarchyCl0CPU0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit11FSCPU0HierarchyCl0CPU0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12FSCPU0HierarchyCl0CPU1TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit12FSCPU0HierarchyCl0CPU1TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit12FSCPU0HierarchyCl0CPU1TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit12FSCPU0HierarchyCl0CPU1TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13FSCPU0HierarchyCl0CPU2TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit13FSCPU0HierarchyCl0CPU2TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit13FSCPU0HierarchyCl0CPU2TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit13FSCPU0HierarchyCl0CPU2TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14FSCPU0HierarchyCl0CPU3TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit14FSCPU0HierarchyCl0CPU3TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit14FSCPU0HierarchyCl0CPU3TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit14FSCPU0HierarchyCl0CPU3TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23FSPeripheralDMACHierarchy0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit23FSPeripheralDMACHierarchy0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit23FSPeripheralDMACHierarchy0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit23FSPeripheralDMACHierarchy0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24FSHSpeedComHierarchyTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit24FSHSpeedComHierarchyTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit24FSHSpeedComHierarchyTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit24FSHSpeedComHierarchyTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25FSVIOHierarchyTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit25FSVIOHierarchyTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit25FSVIOHierarchyTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit25FSVIOHierarchyTimeoutErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit26FSVIOHierarchyISP0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit26FSVIOHierarchyISP0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit26FSVIOHierarchyISP0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit26FSVIOHierarchyISP0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30FSVCHierarchyTimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit30FSVCHierarchyTimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit30FSVCHierarchyTimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit30FSVCHierarchyTimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31FSVCHierarchyIMR0TimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit31FSVCHierarchyIMR0TimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit31FSVCHierarchyIMR0TimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain25/CddEmmBit31FSVCHierarchyIMR0TimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain26 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmAddressToSaveErrorStatus + 1342177372 + + + + + CddEmmBit3FSSIRHierarchyCnn0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit3FSSIRHierarchyCnn0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit3FSSIRHierarchyCnn0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit3FSSIRHierarchyCnn0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14FSFSIRHierarchyDSP0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit14FSFSIRHierarchyDSP0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit14FSFSIRHierarchyDSP0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit14FSFSIRHierarchyDSP0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15FSFSIRHierarchyDSP1FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit15FSFSIRHierarchyDSP1FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit15FSFSIRHierarchyDSP1FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit15FSFSIRHierarchyDSP1FailErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit20FSFSIRHierarchyCNRAM0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit20FSFSIRHierarchyCNRAM0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit20FSFSIRHierarchyCNRAM0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit20FSFSIRHierarchyCNRAM0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23FSFSIRHierarchyIMPRAM0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit23FSFSIRHierarchyIMPRAM0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit23FSFSIRHierarchyIMPRAM0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit23FSFSIRHierarchyIMPRAM0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25FSFS3DGHierarchyRASCALFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit25FSFS3DGHierarchyRASCALFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit25FSFS3DGHierarchyRASCALFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit25FSFS3DGHierarchyRASCALFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26FSFS3DGHierarchyDUSTAFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit26FSFS3DGHierarchyDUSTAFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit26FSFS3DGHierarchyDUSTAFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit26FSFS3DGHierarchyDUSTAFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27FSFS3DGHierarchySLCSIDEKICKFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit27FSFS3DGHierarchySLCSIDEKICKFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit27FSFS3DGHierarchySLCSIDEKICKFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit27FSFS3DGHierarchySLCSIDEKICKFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28FSFS3DGHierarchyexceptRGXcoreFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit28FSFS3DGHierarchyexceptRGXcoreFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit28FSFS3DGHierarchyexceptRGXcoreFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit28FSFS3DGHierarchyexceptRGXcoreFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29FSFS3DGHierarchyXonstFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit29FSFS3DGHierarchyXonstFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit29FSFS3DGHierarchyXonstFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit29FSFS3DGHierarchyXonstFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30FSFSMMHierarchyDDRFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit30FSFSMMHierarchyDDRFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit30FSFSMMHierarchyDDRFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain26/CddEmmBit30FSFSMMHierarchyDDRFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain27 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmAddressToSaveErrorStatus + 1342177376 + + + + + CddEmmBit0FSSVCHierarchyIMR1FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit0FSSVCHierarchyIMR1FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit0FSSVCHierarchyIMR1FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit0FSSVCHierarchyIMR1FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3FSSVCHierarchyIMS0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit3FSSVCHierarchyIMS0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit3FSSVCHierarchyIMS0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit3FSSVCHierarchyIMS0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4FSSVCHierarchyIMS1FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit4FSSVCHierarchyIMS1FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit4FSSVCHierarchyIMS1FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit4FSSVCHierarchyIMS1FailErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit6FSSVIPHierarchyFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit6FSSVIPHierarchyFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit6FSSVIPHierarchyFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit6FSSVIPHierarchyFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7FBPAPFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit7FBPAPFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit7FBPAPFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit7FBPAPFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9FSSVIPHierarchyUMFL0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit9FSSVIPHierarchyUMFL0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit9FSSVIPHierarchyUMFL0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit9FSSVIPHierarchyUMFL0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11FSFSVIPHierarchySMPS0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit11FSFSVIPHierarchySMPS0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit11FSFSVIPHierarchySMPS0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit11FSFSVIPHierarchySMPS0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15FSFSVIPHierarchySMPO0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit15FSFSVIPHierarchySMPO0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit15FSFSVIPHierarchySMPO0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit15FSFSVIPHierarchySMPO0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19FSFSIRHierarchyFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit19FSFSIRHierarchyFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit19FSFSIRHierarchyFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit19FSFSIRHierarchyFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20FSFSIRHierarchyA3IRBusWrapperFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit20FSFSIRHierarchyA3IRBusWrapperFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit20FSFSIRHierarchyA3IRBusWrapperFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit20FSFSIRHierarchyA3IRBusWrapperFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21FSFSIRHierarchyIMP0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit21FSFSIRHierarchyIMP0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit21FSFSIRHierarchyIMP0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit21FSFSIRHierarchyIMP0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22FSFSIRHierarchyIMP1FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit22FSFSIRHierarchyIMP1FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit22FSFSIRHierarchyIMP1FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit22FSFSIRHierarchyIMP1FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25FSFSIRHierarchyPSC0DMAC0RepeatFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit25FSFSIRHierarchyPSC0DMAC0RepeatFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit25FSFSIRHierarchyPSC0DMAC0RepeatFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit25FSFSIRHierarchyPSC0DMAC0RepeatFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26FSFSIRHierarchyDMAC2DMAC1RepeatFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit26FSFSIRHierarchyDMAC2DMAC1RepeatFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit26FSFSIRHierarchyDMAC2DMAC1RepeatFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit26FSFSIRHierarchyDMAC2DMAC1RepeatFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27FSFSIRHierarchyOCV0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit27FSFSIRHierarchyOCV0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit27FSFSIRHierarchyOCV0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit27FSFSIRHierarchyOCV0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28FSFSIRHierarchyOCV1FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit28FSFSIRHierarchyOCV1FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit28FSFSIRHierarchyOCV1FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit28FSFSIRHierarchyOCV1FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29FSFSIRHierarchyOCV2FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit29FSFSIRHierarchyOCV2FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit29FSFSIRHierarchyOCV2FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit29FSFSIRHierarchyOCV2FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30FSFSIRHierarchyOCV3FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit30FSFSIRHierarchyOCV3FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit30FSFSIRHierarchyOCV3FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain27/CddEmmBit30FSFSIRHierarchyOCV3FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain28 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmAddressToSaveErrorStatus + 1342177380 + + + + + CddEmmBit0FSFSTOPHierarchyFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit0FSFSTOPHierarchyFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit0FSFSTOPHierarchyFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit0FSFSTOPHierarchyFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1FSFSMMHierarchyFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit1FSFSMMHierarchyFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit1FSFSMMHierarchyFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit1FSFSMMHierarchyFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2FSFSMMHierarchyDBSC0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit2FSFSMMHierarchyDBSC0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit2FSFSMMHierarchyDBSC0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit2FSFSMMHierarchyDBSC0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4FSFSrtCPUHierarchyFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit4FSFSrtCPUHierarchyFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit4FSFSrtCPUHierarchyFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit4FSFSrtCPUHierarchyFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5FSFSrtCPUHierarchyCR52FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit5FSFSrtCPUHierarchyCR52FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit5FSFSrtCPUHierarchyCR52FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit5FSFSrtCPUHierarchyCR52FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7FSFSCPU0HierarchyC4FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit7FSFSCPU0HierarchyC4FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit7FSFSCPU0HierarchyC4FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit7FSFSCPU0HierarchyC4FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9FSFSCPU0HierarchyCl0L3CacheFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit9FSFSCPU0HierarchyCl0L3CacheFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit9FSFSCPU0HierarchyCl0L3CacheFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit9FSFSCPU0HierarchyCl0L3CacheFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11FSFSCPU0HierarchyCl0CPU0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit11FSFSCPU0HierarchyCl0CPU0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit11FSFSCPU0HierarchyCl0CPU0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit11FSFSCPU0HierarchyCl0CPU0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12FSFSCPU0HierarchyCl0CPU1FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit12FSFSCPU0HierarchyCl0CPU1FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit12FSFSCPU0HierarchyCl0CPU1FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit12FSFSCPU0HierarchyCl0CPU1FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13FSFSCPU0HierarchyCl0CPU2FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit13FSFSCPU0HierarchyCl0CPU2FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit13FSFSCPU0HierarchyCl0CPU2FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit13FSFSCPU0HierarchyCl0CPU2FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14FSFSCPU0HierarchyCl0CPU3FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit14FSFSCPU0HierarchyCl0CPU3FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit14FSFSCPU0HierarchyCl0CPU3FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit14FSFSCPU0HierarchyCl0CPU3FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23FSFSPeripheralDMACHierarchy0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit23FSFSPeripheralDMACHierarchy0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit23FSFSPeripheralDMACHierarchy0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit23FSFSPeripheralDMACHierarchy0FailErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit24FSFSHSpeedComHierarchyFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit24FSFSHSpeedComHierarchyFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit24FSFSHSpeedComHierarchyFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit24FSFSHSpeedComHierarchyFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25FSFSVIOHierarchyFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit25FSFSVIOHierarchyFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit25FSFSVIOHierarchyFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit25FSFSVIOHierarchyFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26FSFSVIOHierarchyISP0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit26FSFSVIOHierarchyISP0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit26FSFSVIOHierarchyISP0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit26FSFSVIOHierarchyISP0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30FSFSVCHierarchyFailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit30FSFSVCHierarchyFailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit30FSFSVCHierarchyFailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit30FSFSVCHierarchyFailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31FSFSVCHierarchyIMR0FailErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit31FSFSVCHierarchyIMR0FailErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit31FSFSVCHierarchyIMR0FailErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain28/CddEmmBit31FSFSVCHierarchyIMR0FailErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain29 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmAddressToSaveErrorStatus + 1342177384 + + + + + CddEmmBit3FSRHierarchyCnn0SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit3FSRHierarchyCnn0SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit3FSRHierarchyCnn0SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit3FSRHierarchyCnn0SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14FSIRHierarchyDSP0SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit14FSIRHierarchyDSP0SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit14FSIRHierarchyDSP0SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit14FSIRHierarchyDSP0SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15FSIRHierarchyDSP1SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit15FSIRHierarchyDSP1SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit15FSIRHierarchyDSP1SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit15FSIRHierarchyDSP1SCanAXibusErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit20FSIRHierarchyCNRAM0SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit20FSIRHierarchyCNRAM0SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit20FSIRHierarchyCNRAM0SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain29/CddEmmBit20FSIRHierarchyCNRAM0SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain30 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmAddressToSaveErrorStatus + 1342177388 + + + + + CddEmmBit0FSSVCHierarchyIMR1SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit0FSSVCHierarchyIMR1SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit0FSSVCHierarchyIMR1SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit0FSSVCHierarchyIMR1SCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3FSSVCHierarchyIMS0SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit3FSSVCHierarchyIMS0SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit3FSSVCHierarchyIMS0SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit3FSSVCHierarchyIMS0SCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4FSSVCHierarchyIMS1SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit4FSSVCHierarchyIMS1SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit4FSSVCHierarchyIMS1SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit4FSSVCHierarchyIMS1SCanAXiBusErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit7FBPAPSCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit7FBPAPSCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit7FBPAPSCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit7FBPAPSCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9FSSVIPHierarchyUMFL0SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit9FSSVIPHierarchyUMFL0SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit9FSSVIPHierarchyUMFL0SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit9FSSVIPHierarchyUMFL0SCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11FSFSVIPHierarchySMPS0SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit11FSFSVIPHierarchySMPS0SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit11FSFSVIPHierarchySMPS0SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit11FSFSVIPHierarchySMPS0SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15FSFSVIPHierarchySMPO0SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit15FSFSVIPHierarchySMPO0SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit15FSFSVIPHierarchySMPO0SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit15FSFSVIPHierarchySMPO0SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21FSIRHierarchyIMP0SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit21FSIRHierarchyIMP0SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit21FSIRHierarchyIMP0SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit21FSIRHierarchyIMP0SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22FSIRHierarchyIMP1SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit22FSIRHierarchyIMP1SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit22FSIRHierarchyIMP1SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit22FSIRHierarchyIMP1SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25FSIRHierarchyPSC0DMAC0RepeatSCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit25FSIRHierarchyPSC0DMAC0RepeatSCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit25FSIRHierarchyPSC0DMAC0RepeatSCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit25FSIRHierarchyPSC0DMAC0RepeatSCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26FSIRHierarchyDMAC2DMAC1RepeatSCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit26FSIRHierarchyDMAC2DMAC1RepeatSCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit26FSIRHierarchyDMAC2DMAC1RepeatSCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit26FSIRHierarchyDMAC2DMAC1RepeatSCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27FSIRHierarchyOCV0SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit27FSIRHierarchyOCV0SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit27FSIRHierarchyOCV0SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit27FSIRHierarchyOCV0SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28FSIRHierarchyOCV1SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit28FSIRHierarchyOCV1SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit28FSIRHierarchyOCV1SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit28FSIRHierarchyOCV1SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29FSIRHierarchyOCV2SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit29FSIRHierarchyOCV2SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit29FSIRHierarchyOCV2SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit29FSIRHierarchyOCV2SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30FSIRHierarchyOCV3SCanAXibusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit30FSIRHierarchyOCV3SCanAXibusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit30FSIRHierarchyOCV3SCanAXibusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain30/CddEmmBit30FSIRHierarchyOCV3SCanAXibusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain31 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmAddressToSaveErrorStatus + 1342177392 + + + + + CddEmmBit9FSFSCPU0HierarchyCl0L3CacheSCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit9FSFSCPU0HierarchyCl0L3CacheSCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit9FSFSCPU0HierarchyCl0L3CacheSCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit9FSFSCPU0HierarchyCl0L3CacheSCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11FSFSCPU0HierarchyCl0CPU0SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit11FSFSCPU0HierarchyCl0CPU0SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit11FSFSCPU0HierarchyCl0CPU0SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit11FSFSCPU0HierarchyCl0CPU0SCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12FSFSCPU0HierarchyCl0CPU1SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit12FSFSCPU0HierarchyCl0CPU1SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit12FSFSCPU0HierarchyCl0CPU1SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit12FSFSCPU0HierarchyCl0CPU1SCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13FSFSCPU0HierarchyCl0CPU2SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit13FSFSCPU0HierarchyCl0CPU2SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit13FSFSCPU0HierarchyCl0CPU2SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit13FSFSCPU0HierarchyCl0CPU2SCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14FSFSCPU0HierarchyCl0CPU3SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit14FSFSCPU0HierarchyCl0CPU3SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit14FSFSCPU0HierarchyCl0CPU3SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit14FSFSCPU0HierarchyCl0CPU3SCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26FSFSVIOHierarchyISP0SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit26FSFSVIOHierarchyISP0SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit26FSFSVIOHierarchyISP0SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit26FSFSVIOHierarchyISP0SCanAXiBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31FSFSVCHierarchyIMR0SCanAXiBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit31FSFSVCHierarchyIMR0SCanAXiBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit31FSFSVCHierarchyIMR0SCanAXiBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain31/CddEmmBit31FSFSVCHierarchyIMR0SCanAXiBusErr/CddEmmErrorSignalTarget + INTC + + + + + + + CddEmmDomain32 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmAddressToSaveErrorStatus + 1342177396 + + + + + CddEmmBit0RTCore1AXIMICorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit0RTCore1AXIMICorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit0RTCore1AXIMICorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit0RTCore1AXIMICorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1RTCore1AXIMIFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit1RTCore1AXIMIFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit1RTCore1AXIMIFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit1RTCore1AXIMIFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2RTCore1AXIMITimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit2RTCore1AXIMITimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit2RTCore1AXIMITimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit2RTCore1AXIMITimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3RTCore1AXISICorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit3RTCore1AXISICorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit3RTCore1AXISICorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit3RTCore1AXISICorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4RTCore1AXISIFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit4RTCore1AXISIFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit4RTCore1AXISIFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit4RTCore1AXISIFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5RTCore1AXISILockstepComparator1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit5RTCore1AXISILockstepComparator1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit5RTCore1AXISILockstepComparator1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit5RTCore1AXISILockstepComparator1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6RTCore1DataCacheErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit6RTCore1DataCacheErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit6RTCore1DataCacheErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit6RTCore1DataCacheErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7RTCore1EL1ControlledAbortExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit7RTCore1EL1ControlledAbortExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit7RTCore1EL1ControlledAbortExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit7RTCore1EL1ControlledAbortExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8RTCore1EL2ControlledabortExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit8RTCore1EL2ControlledabortExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit8RTCore1EL2ControlledabortExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit8RTCore1EL2ControlledabortExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9RTCore1SWRunInEL2UnlockTESTR1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit9RTCore1SWRunInEL2UnlockTESTR1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit9RTCore1SWRunInEL2UnlockTESTR1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit9RTCore1SWRunInEL2UnlockTESTR1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10RTCore1AsynchronousTransferErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit10RTCore1AsynchronousTransferErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit10RTCore1AsynchronousTransferErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit10RTCore1AsynchronousTransferErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11RTCore1InstructionCacheErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit11RTCore1InstructionCacheErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit11RTCore1InstructionCacheErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit11RTCore1InstructionCacheErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12RTCore1CorrectableNotRecordedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit12RTCore1CorrectableNotRecordedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit12RTCore1CorrectableNotRecordedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit12RTCore1CorrectableNotRecordedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13RTCore1FatalErrCannotRecorded + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit13RTCore1FatalErrCannotRecorded + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit13RTCore1FatalErrCannotRecorded/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit13RTCore1FatalErrCannotRecorded/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14RTCore1ProcessorLivelockErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit14RTCore1ProcessorLivelockErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit14RTCore1ProcessorLivelockErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit14RTCore1ProcessorLivelockErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15RTCore1LongHypervisorInterruptErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit15RTCore1LongHypervisorInterruptErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit15RTCore1LongHypervisorInterruptErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit15RTCore1LongHypervisorInterruptErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16RTCore1AXISILockstepComparator0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit16RTCore1AXISILockstepComparator0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit16RTCore1AXISILockstepComparator0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit16RTCore1AXISILockstepComparator0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17RTCore1HypervisorModeFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit17RTCore1HypervisorModeFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit17RTCore1HypervisorModeFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit17RTCore1HypervisorModeFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18RTCore1EL1controlledMemoryAccessErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit18RTCore1EL1controlledMemoryAccessErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit18RTCore1EL1controlledMemoryAccessErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit18RTCore1EL1controlledMemoryAccessErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19RTCore1EDCBtwRTCPUWritebufferErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit19RTCore1EDCBtwRTCPUWritebufferErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit19RTCore1EDCBtwRTCPUWritebufferErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit19RTCore1EDCBtwRTCPUWritebufferErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20RTCore1AXIMIDECERRSLVERRBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit20RTCore1AXIMIDECERRSLVERRBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit20RTCore1AXIMIDECERRSLVERRBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit20RTCore1AXIMIDECERRSLVERRBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21RTCore1NonSafetySwitchingComparator1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit21RTCore1NonSafetySwitchingComparator1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit21RTCore1NonSafetySwitchingComparator1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit21RTCore1NonSafetySwitchingComparator1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22RTCore1NonSafetySwitchingComparator0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit22RTCore1NonSafetySwitchingComparator0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit22RTCore1NonSafetySwitchingComparator0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit22RTCore1NonSafetySwitchingComparator0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23RTCore1TCMCorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit23RTCore1TCMCorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit23RTCore1TCMCorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit23RTCore1TCMCorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24RTCore1TCMMemoriesFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit24RTCore1TCMMemoriesFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit24RTCore1TCMMemoriesFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit24RTCore1TCMMemoriesFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25RTCore1EDCBtwRTCPUAXISlavebridgeErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit25RTCore1EDCBtwRTCPUAXISlavebridgeErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit25RTCore1EDCBtwRTCPUAXISlavebridgeErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit25RTCore1EDCBtwRTCPUAXISlavebridgeErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26RTCore1IllegalAxSIZEAxBURSTErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit26RTCore1IllegalAxSIZEAxBURSTErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit26RTCore1IllegalAxSIZEAxBURSTErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit26RTCore1IllegalAxSIZEAxBURSTErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27RTCore1UndefinedExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit27RTCore1UndefinedExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit27RTCore1UndefinedExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit27RTCore1UndefinedExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28RTCore1ErrorPChannel + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit28RTCore1ErrorPChannel + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit28RTCore1ErrorPChannel/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit28RTCore1ErrorPChannel/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30CSI21Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit30CSI21Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit30CSI21Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit30CSI21Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31CSI20Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit31CSI20Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit31CSI20Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain32/CddEmmBit31CSI20Err/CddEmmErrorSignalTarget + INTC + + + + + + + CddEmmDomain33 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmAddressToSaveErrorStatus + 1342177400 + + + + + CddEmmBit0RTCore2AXIMICorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit0RTCore2AXIMICorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit0RTCore2AXIMICorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit0RTCore2AXIMICorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1RTCore2AXIMIFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit1RTCore2AXIMIFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit1RTCore2AXIMIFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit1RTCore2AXIMIFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2RTCore2AXIMITimeoutErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit2RTCore2AXIMITimeoutErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit2RTCore2AXIMITimeoutErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit2RTCore2AXIMITimeoutErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3RTCore2AXISICorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit3RTCore2AXISICorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit3RTCore2AXISICorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit3RTCore2AXISICorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4RTCore2AXISIFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit4RTCore2AXISIFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit4RTCore2AXISIFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit4RTCore2AXISIFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5RTCore2AXISILockstepComparator1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit5RTCore2AXISILockstepComparator1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit5RTCore2AXISILockstepComparator1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit5RTCore2AXISILockstepComparator1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6RTCore2DataCacheErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit6RTCore2DataCacheErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit6RTCore2DataCacheErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit6RTCore2DataCacheErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit7RTCore2EL1ControlledAbortExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit7RTCore2EL1ControlledAbortExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit7RTCore2EL1ControlledAbortExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit7RTCore2EL1ControlledAbortExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8RTCore2EL2ControlledabortExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit8RTCore2EL2ControlledabortExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit8RTCore2EL2ControlledabortExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit8RTCore2EL2ControlledabortExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9RTCore2SWRunInEL2UnlockTESTR1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit9RTCore2SWRunInEL2UnlockTESTR1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit9RTCore2SWRunInEL2UnlockTESTR1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit9RTCore2SWRunInEL2UnlockTESTR1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10RTCore2AsynchronousTransferErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit10RTCore2AsynchronousTransferErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit10RTCore2AsynchronousTransferErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit10RTCore2AsynchronousTransferErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11RTCore2InstructionCacheErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit11RTCore2InstructionCacheErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit11RTCore2InstructionCacheErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit11RTCore2InstructionCacheErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12RTCore2CorrectableNotRecordedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit12RTCore2CorrectableNotRecordedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit12RTCore2CorrectableNotRecordedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit12RTCore2CorrectableNotRecordedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13RTCore2FatalErrCannotRecorded + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit13RTCore2FatalErrCannotRecorded + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit13RTCore2FatalErrCannotRecorded/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit13RTCore2FatalErrCannotRecorded/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14RTCore2ProcessorLivelockErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit14RTCore2ProcessorLivelockErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit14RTCore2ProcessorLivelockErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit14RTCore2ProcessorLivelockErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15RTCore2LongHypervisorInterruptErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit15RTCore2LongHypervisorInterruptErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit15RTCore2LongHypervisorInterruptErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit15RTCore2LongHypervisorInterruptErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16RTCore2AXISILockstepComparator0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit16RTCore2AXISILockstepComparator0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit16RTCore2AXISILockstepComparator0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit16RTCore2AXISILockstepComparator0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17RTCore2HypervisorModeFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit17RTCore2HypervisorModeFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit17RTCore2HypervisorModeFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit17RTCore2HypervisorModeFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18RTCore2EL1controlledMemoryAccessErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit18RTCore2EL1controlledMemoryAccessErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit18RTCore2EL1controlledMemoryAccessErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit18RTCore2EL1controlledMemoryAccessErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19RTCore2EDCBtwRTCPUWritebufferErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit19RTCore2EDCBtwRTCPUWritebufferErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit19RTCore2EDCBtwRTCPUWritebufferErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit19RTCore2EDCBtwRTCPUWritebufferErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20RTCore2AXIMIDECERRSLVERRBusErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit20RTCore2AXIMIDECERRSLVERRBusErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit20RTCore2AXIMIDECERRSLVERRBusErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit20RTCore2AXIMIDECERRSLVERRBusErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21RTCore2NonSafetySwitchingComparator1Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit21RTCore2NonSafetySwitchingComparator1Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit21RTCore2NonSafetySwitchingComparator1Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit21RTCore2NonSafetySwitchingComparator1Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22RTCore2NonSafetySwitchingComparator0Err + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit22RTCore2NonSafetySwitchingComparator0Err + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit22RTCore2NonSafetySwitchingComparator0Err/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit22RTCore2NonSafetySwitchingComparator0Err/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23RTCore2TCMCorrectableErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit23RTCore2TCMCorrectableErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit23RTCore2TCMCorrectableErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit23RTCore2TCMCorrectableErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24RTCore2TCMMemoriesFatalErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit24RTCore2TCMMemoriesFatalErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit24RTCore2TCMMemoriesFatalErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit24RTCore2TCMMemoriesFatalErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25RTCore2EDCBtwRTCPUAXISlavebridgeErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit25RTCore2EDCBtwRTCPUAXISlavebridgeErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit25RTCore2EDCBtwRTCPUAXISlavebridgeErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit25RTCore2EDCBtwRTCPUAXISlavebridgeErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26RTCore2IllegalAxSIZEAxBURSTErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit26RTCore2IllegalAxSIZEAxBURSTErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit26RTCore2IllegalAxSIZEAxBURSTErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit26RTCore2IllegalAxSIZEAxBURSTErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27RTCore2UndefinedExceptionErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit27RTCore2UndefinedExceptionErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit27RTCore2UndefinedExceptionErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit27RTCore2UndefinedExceptionErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28RTCore2ErrorPChannel + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit28RTCore2ErrorPChannel + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit28RTCore2ErrorPChannel/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain33/CddEmmBit28RTCore2ErrorPChannel/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain34 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmAddressToSaveErrorStatus + 1342177404 + + + + + CddEmmBit0PWMLoopbackFunctionErrch0 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit0PWMLoopbackFunctionErrch0 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit0PWMLoopbackFunctionErrch0/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit0PWMLoopbackFunctionErrch0/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1PWMLoopbackFunctionErrch1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit1PWMLoopbackFunctionErrch1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit1PWMLoopbackFunctionErrch1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit1PWMLoopbackFunctionErrch1/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit2PWMLoopbackFunctionErrch2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit2PWMLoopbackFunctionErrch2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit2PWMLoopbackFunctionErrch2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit2PWMLoopbackFunctionErrch2/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit3PWMLoopbackFunctionErrch3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit3PWMLoopbackFunctionErrch3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit3PWMLoopbackFunctionErrch3/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit3PWMLoopbackFunctionErrch3/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4PWMLoopbackFunctionErrch4 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit4PWMLoopbackFunctionErrch4 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit4PWMLoopbackFunctionErrch4/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain34/CddEmmBit4PWMLoopbackFunctionErrch4/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain35 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmAddressToSaveErrorStatus + 1342177408 + + + + + CddEmmBit7APSysApmuCA76Cl0PchProtocolInterfaceErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit7APSysApmuCA76Cl0PchProtocolInterfaceErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit7APSysApmuCA76Cl0PchProtocolInterfaceErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit7APSysApmuCA76Cl0PchProtocolInterfaceErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9APSysAXI4StreambusINTAPCA76Cl0RequestOrderErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit9APSysAXI4StreambusINTAPCA76Cl0RequestOrderErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit9APSysAXI4StreambusINTAPCA76Cl0RequestOrderErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit9APSysAXI4StreambusINTAPCA76Cl0RequestOrderErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11APSysAXI4StreambusINTAPCA76Cl0EdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit11APSysAXI4StreambusINTAPCA76Cl0EdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit11APSysAXI4StreambusINTAPCA76Cl0EdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit11APSysAXI4StreambusINTAPCA76Cl0EdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13APSysArmgcCA76Cl0CounterInterfeceErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit13APSysArmgcCA76Cl0CounterInterfeceErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit13APSysArmgcCA76Cl0CounterInterfeceErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit13APSysArmgcCA76Cl0CounterInterfeceErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14APSysCA76Core3L1IL1DL2MmuCorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit14APSysCA76Core3L1IL1DL2MmuCorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit14APSysCA76Core3L1IL1DL2MmuCorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit14APSysCA76Core3L1IL1DL2MmuCorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15APSysCA76Core2L1IL1DL2MmuCorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit15APSysCA76Core2L1IL1DL2MmuCorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit15APSysCA76Core2L1IL1DL2MmuCorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit15APSysCA76Core2L1IL1DL2MmuCorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17APSysCA76Core1L1IL1DL2MmuCorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit17APSysCA76Core1L1IL1DL2MmuCorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit17APSysCA76Core1L1IL1DL2MmuCorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit17APSysCA76Core1L1IL1DL2MmuCorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18APSysCA76Core0L1IL1DL2MmuCorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit18APSysCA76Core0L1IL1DL2MmuCorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit18APSysCA76Core0L1IL1DL2MmuCorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit18APSysCA76Core0L1IL1DL2MmuCorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19APSysL3Cl0correctedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit19APSysL3Cl0correctedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit19APSysL3Cl0correctedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit19APSysL3Cl0correctedErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit20APSysCA76Core3L1IL1DL2MmuUncorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit20APSysCA76Core3L1IL1DL2MmuUncorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit20APSysCA76Core3L1IL1DL2MmuUncorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit20APSysCA76Core3L1IL1DL2MmuUncorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit21APSysCA76Core2L1IL1DL2MmuUncorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23APSysCA76Core1L1IL1DL2MmuUncorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit23APSysCA76Core1L1IL1DL2MmuUncorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit23APSysCA76Core1L1IL1DL2MmuUncorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit23APSysCA76Core1L1IL1DL2MmuUncorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24APSysCA76Core0L1IL1DL2MmuUncorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit24APSysCA76Core0L1IL1DL2MmuUncorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit24APSysCA76Core0L1IL1DL2MmuUncorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit24APSysCA76Core0L1IL1DL2MmuUncorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25APSysL3Cl0UncorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit25APSysL3Cl0UncorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit25APSysL3Cl0UncorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit25APSysL3Cl0UncorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29APSysAcebusAXCCCA76Cl0RequestOrderErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit29APSysAcebusAXCCCA76Cl0RequestOrderErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit29APSysAcebusAXCCCA76Cl0RequestOrderErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit29APSysAcebusAXCCCA76Cl0RequestOrderErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31APSysAcebusAXCCCA76Cl0EdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit31APSysAcebusAXCCCA76Cl0EdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit31APSysAcebusAXCCCA76Cl0EdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain35/CddEmmBit31APSysAcebusAXCCCA76Cl0EdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain36 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmAddressToSaveErrorStatus + 1342177412 + + + + + CddEmmBit0VINCh15ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit0VINCh15ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit0VINCh15ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit0VINCh15ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1VINCh15ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit1VINCh15ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit1VINCh15ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit1VINCh15ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2VINCh14ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit2VINCh14ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit2VINCh14ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit2VINCh14ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3VINCh14ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit3VINCh14ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit3VINCh14ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit3VINCh14ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4VINCh13ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit4VINCh13ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit4VINCh13ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit4VINCh13ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5VINCh13ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit5VINCh13ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit5VINCh13ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit5VINCh13ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6VINCh12ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit6VINCh12ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit6VINCh12ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit6VINCh12ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7VINCh12ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit7VINCh12ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit7VINCh12ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit7VINCh12ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8VINCh11ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit8VINCh11ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit8VINCh11ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit8VINCh11ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9VINCh11ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit9VINCh11ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit9VINCh11ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit9VINCh11ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10VINCh10ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit10VINCh10ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit10VINCh10ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit10VINCh10ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11VINCh10ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit11VINCh10ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit11VINCh10ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit11VINCh10ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12VINCh9ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit12VINCh9ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit12VINCh9ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit12VINCh9ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13VINCh9ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit13VINCh9ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit13VINCh9ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit13VINCh9ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14VINCh8ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit14VINCh8ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit14VINCh8ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit14VINCh8ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit15VINCh8ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit15VINCh8ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit15VINCh8ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit15VINCh8ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit16VINCh7ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit16VINCh7ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit16VINCh7ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit16VINCh7ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17VINCh7ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit17VINCh7ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit17VINCh7ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit17VINCh7ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18VINCh6ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit18VINCh6ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit18VINCh6ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit18VINCh6ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19VINCh6ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit19VINCh6ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit19VINCh6ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit19VINCh6ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20VINCh5ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit20VINCh5ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit20VINCh5ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit20VINCh5ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21VINCh5ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit21VINCh5ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit21VINCh5ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit21VINCh5ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22VINCh4ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit22VINCh4ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit22VINCh4ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit22VINCh4ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23VINCh4ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit23VINCh4ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit23VINCh4ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit23VINCh4ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24VINCh3ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit24VINCh3ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit24VINCh3ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit24VINCh3ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25VINCh3ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit25VINCh3ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit25VINCh3ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit25VINCh3ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26VINCh2ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit26VINCh2ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit26VINCh2ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit26VINCh2ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27VINCh2ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit27VINCh2ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit27VINCh2ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit27VINCh2ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28VINCh1ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit28VINCh1ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit28VINCh1ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit28VINCh1ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29VINCh1ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit29VINCh1ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit29VINCh1ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit29VINCh1ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30VINCh0ModuleCombinedEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit30VINCh0ModuleCombinedEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit30VINCh0ModuleCombinedEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit30VINCh0ModuleCombinedEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31VINCh0ModuleCombinedSafetyErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit31VINCh0ModuleCombinedSafetyErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit31VINCh0ModuleCombinedSafetyErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain36/CddEmmBit31VINCh0ModuleCombinedSafetyErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain38 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmAddressToSaveErrorStatus + 1342177416 + + + + + CddEmmBit0CANFDRAMEcc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit0CANFDRAMEcc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit0CANFDRAMEcc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit0CANFDRAMEcc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1CANFDRAMEcc2bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit1CANFDRAMEcc2bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit1CANFDRAMEcc2bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit1CANFDRAMEcc2bitErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit2FLEXRAYTBF2InterruptNotificationEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit2FLEXRAYTBF2InterruptNotificationEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit2FLEXRAYTBF2InterruptNotificationEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit2FLEXRAYTBF2InterruptNotificationEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3FLEXRAYTBF2InterruptNotificationEccErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit3FLEXRAYTBF2InterruptNotificationEccErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit3FLEXRAYTBF2InterruptNotificationEccErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit3FLEXRAYTBF2InterruptNotificationEccErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4FLEXRAYTBF1InterruptNotificationEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit4FLEXRAYTBF1InterruptNotificationEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit4FLEXRAYTBF1InterruptNotificationEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit4FLEXRAYTBF1InterruptNotificationEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5FLEXRAYTBF1InterruptNotificationEccErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit5FLEXRAYTBF1InterruptNotificationEccErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit5FLEXRAYTBF1InterruptNotificationEccErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit5FLEXRAYTBF1InterruptNotificationEccErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6FLEXRAYMBFInterruptNotificationEdcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit6FLEXRAYMBFInterruptNotificationEdcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit6FLEXRAYMBFInterruptNotificationEdcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit6FLEXRAYMBFInterruptNotificationEdcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7FLEXRAYMBFInterruptNotificationEccErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit7FLEXRAYMBFInterruptNotificationEccErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit7FLEXRAYMBFInterruptNotificationEccErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit7FLEXRAYMBFInterruptNotificationEccErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20EtherAVB2TXRAMEccMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit20EtherAVB2TXRAMEccMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit20EtherAVB2TXRAMEccMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit20EtherAVB2TXRAMEccMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21EtherAVB2RXRAMEccMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit21EtherAVB2RXRAMEccMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit21EtherAVB2RXRAMEccMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit21EtherAVB2RXRAMEccMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22EtherAVB2TXRAMEcc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit22EtherAVB2TXRAMEcc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit22EtherAVB2TXRAMEcc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit22EtherAVB2TXRAMEcc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23EtherAVB2RXRAMEcc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit23EtherAVB2RXRAMEcc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit23EtherAVB2RXRAMEcc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit23EtherAVB2RXRAMEcc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24EtherAVB1TXRAMEccMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit24EtherAVB1TXRAMEccMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit24EtherAVB1TXRAMEccMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit24EtherAVB1TXRAMEccMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25EtherAVB1RXRAMEccMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit25EtherAVB1RXRAMEccMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit25EtherAVB1RXRAMEccMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit25EtherAVB1RXRAMEccMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit26EtherAVB1TXRAMEcc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit26EtherAVB1TXRAMEcc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit26EtherAVB1TXRAMEcc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit26EtherAVB1TXRAMEcc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27EtherAVB1RXRAMEcc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit27EtherAVB1RXRAMEcc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit27EtherAVB1RXRAMEcc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit27EtherAVB1RXRAMEcc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28EtherAVB0TXRAMEccMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit28EtherAVB0TXRAMEccMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit28EtherAVB0TXRAMEccMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit28EtherAVB0TXRAMEccMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29EtherAVB0RXRAMEccMultibitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit29EtherAVB0RXRAMEccMultibitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit29EtherAVB0RXRAMEccMultibitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit29EtherAVB0RXRAMEccMultibitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30EtherAVB0TXRAMEcc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit30EtherAVB0TXRAMEcc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit30EtherAVB0TXRAMEcc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit30EtherAVB0TXRAMEcc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31EtherAVB0RXRAMEcc1bitErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit31EtherAVB0RXRAMEcc1bitErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit31EtherAVB0RXRAMEcc1bitErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain38/CddEmmBit31EtherAVB0RXRAMEcc1bitErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain39 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmAddressToSaveErrorStatus + 1342177420 + + + + + CddEmmBit16AXIBusECMRT2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit16AXIBusECMRT2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit16AXIBusECMRT2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit16AXIBusECMRT2/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit17AXIBusECMRT1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit17AXIBusECMRT1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit17AXIBusECMRT1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit17AXIBusECMRT1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18AXIBusECMRT3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit18AXIBusECMRT3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit18AXIBusECMRT3/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit18AXIBusECMRT3/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19AXIBusECMTOP2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit19AXIBusECMTOP2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit19AXIBusECMTOP2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit19AXIBusECMTOP2/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20AXIBusECMPER01 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit20AXIBusECMPER01 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit20AXIBusECMPER01/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit20AXIBusECMPER01/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21AXIBusECMPER02 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit21AXIBusECMPER02 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit21AXIBusECMPER02/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit21AXIBusECMPER02/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22AXIBusECMPER03 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit22AXIBusECMPER03 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit22AXIBusECMPER03/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit22AXIBusECMPER03/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23AXIBusECMTOP1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit23AXIBusECMTOP1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit23AXIBusECMTOP1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit23AXIBusECMTOP1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24AXIBusECMTOP3 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit24AXIBusECMTOP3 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit24AXIBusECMTOP3/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit24AXIBusECMTOP3/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27AXIBusECMVIO1 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit27AXIBusECMVIO1 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit27AXIBusECMVIO1/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit27AXIBusECMVIO1/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit28AXIBusECMVIO2 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit28AXIBusECMVIO2 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit28AXIBusECMVIO2/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain39/CddEmmBit28AXIBusECMVIO2/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain40 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmAddressToSaveErrorStatus + 1342177424 + + + + + CddEmmBit1CPGCBFUSARTckmrtFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit1CPGCBFUSARTckmrtFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit1CPGCBFUSARTckmrtFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit1CPGCBFUSARTckmrtFreqErr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit2CPGCBFUSARTckmrtFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit2CPGCBFUSARTckmrtFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit2CPGCBFUSARTckmrtFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit2CPGCBFUSARTckmrtFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3CPGCBFUSAPeripheralFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit3CPGCBFUSAPeripheralFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit3CPGCBFUSAPeripheralFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit3CPGCBFUSAPeripheralFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4CPGCBFUSAHscFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit4CPGCBFUSAHscFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit4CPGCBFUSAHscFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit4CPGCBFUSAHscFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13CPGLCBFUSAMMFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit13CPGLCBFUSAMMFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit13CPGLCBFUSAMMFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit13CPGLCBFUSAMMFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14CPGLCBFUSASlAccessBusFreqErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit14CPGLCBFUSASlAccessBusFreqErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit14CPGLCBFUSASlAccessBusFreqErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain40/CddEmmBit14CPGLCBFUSASlAccessBusFreqErr/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain41 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmAddressToSaveErrorStatus + 1342177428 + + + + + CddEmmBit0PAPeccErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit0PAPeccErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit0PAPeccErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit0PAPeccErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit1PAPedcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit1PAPedcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit1PAPedcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit1PAPedcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3PAPSDMACedcErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit3PAPSDMACedcErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit3PAPSDMACedcErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit3PAPSDMACedcErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit4OTPFfDClsApbRedundantComparatorComparisonErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit4OTPFfDClsApbRedundantComparatorComparisonErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit4OTPFfDClsApbRedundantComparatorComparisonErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit4OTPFfDClsApbRedundantComparatorComparisonErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit5OTPEcc1bitCorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit5OTPEcc1bitCorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit5OTPEcc1bitCorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit5OTPEcc1bitCorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit6OTPEccMultibitUncorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit6OTPEccMultibitUncorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit6OTPEccMultibitUncorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit6OTPEccMultibitUncorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit7OTPTMRTripleModularRedundancy1bitCorrectedErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit7OTPTMRTripleModularRedundancy1bitCorrectedErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit7OTPTMRTripleModularRedundancy1bitCorrectedErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit7OTPTMRTripleModularRedundancy1bitCorrectedErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit8OTPRedundantComparatorComparisonErr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit8OTPRedundantComparatorComparisonErr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit8OTPRedundantComparatorComparisonErr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit8OTPRedundantComparatorComparisonErr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit9VDSPA3arbIntreqEcm + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit9VDSPA3arbIntreqEcm + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit9VDSPA3arbIntreqEcm/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit9VDSPA3arbIntreqEcm/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit10VDSP0ErrreqCorepmssUncorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit10VDSP0ErrreqCorepmssUncorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit10VDSP0ErrreqCorepmssUncorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit10VDSP0ErrreqCorepmssUncorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit11VDSP0ErrreqCorepmssCorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit11VDSP0ErrreqCorepmssCorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit11VDSP0ErrreqCorepmssCorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit11VDSP0ErrreqCorepmssCorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit12VDSP0ErrreqDmssUncorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit12VDSP0ErrreqDmssUncorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit12VDSP0ErrreqDmssUncorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit12VDSP0ErrreqDmssUncorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit13VDSP0ErrreqDmssCorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit13VDSP0ErrreqDmssCorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit13VDSP0ErrreqDmssCorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit13VDSP0ErrreqDmssCorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit14VDSP0ErrreqIrrecoverable + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit14VDSP0ErrreqIrrecoverable + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit14VDSP0ErrreqIrrecoverable/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit14VDSP0ErrreqIrrecoverable/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit16VDSP0ErrreqPreciseSafetyUncorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit16VDSP0ErrreqPreciseSafetyUncorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit16VDSP0ErrreqPreciseSafetyUncorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit16VDSP0ErrreqPreciseSafetyUncorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit17VDSP0ErrreqEppWdogViol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit17VDSP0ErrreqEppWdogViol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit17VDSP0ErrreqEppWdogViol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit17VDSP0ErrreqEppWdogViol/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit18VDSP0ErrreqIopWdogViol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit18VDSP0ErrreqIopWdogViol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit18VDSP0ErrreqIopWdogViol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit18VDSP0ErrreqIopWdogViol/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit19VDSP0ErrreqEdpWdogViol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit19VDSP0ErrreqEdpWdogViol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit19VDSP0ErrreqEdpWdogViol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit19VDSP0ErrreqEdpWdogViol/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit20VDSP0ErrreqAxim0WdogViol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit20VDSP0ErrreqAxim0WdogViol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit20VDSP0ErrreqAxim0WdogViol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit20VDSP0ErrreqAxim0WdogViol/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit21VDSP0ErrreqSysWdInt + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit21VDSP0ErrreqSysWdInt + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit21VDSP0ErrreqSysWdInt/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit21VDSP0ErrreqSysWdInt/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit22VDSP0ErrreqIcuWdogViol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit22VDSP0ErrreqIcuWdogViol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit22VDSP0ErrreqIcuWdogViol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit22VDSP0ErrreqIcuWdogViol/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit23VDSP1ErrreqCorepmssUncorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit23VDSP1ErrreqCorepmssUncorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit23VDSP1ErrreqCorepmssUncorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit23VDSP1ErrreqCorepmssUncorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit24VDSP1ErrreqCorepmssCorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit24VDSP1ErrreqCorepmssCorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit24VDSP1ErrreqCorepmssCorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit24VDSP1ErrreqCorepmssCorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit25VDSP1ErrreqDmssUncorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit25VDSP1ErrreqDmssUncorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit25VDSP1ErrreqDmssUncorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit25VDSP1ErrreqDmssUncorr/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit26VDSP1ErrreqDmssCorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit26VDSP1ErrreqDmssCorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit26VDSP1ErrreqDmssCorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit26VDSP1ErrreqDmssCorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit27VDSP1ErrreqIrrecoverable + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit27VDSP1ErrreqIrrecoverable + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit27VDSP1ErrreqIrrecoverable/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit27VDSP1ErrreqIrrecoverable/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit29VDSP1ErrreqPreciseSafetyUncorr + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit29VDSP1ErrreqPreciseSafetyUncorr + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit29VDSP1ErrreqPreciseSafetyUncorr/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit29VDSP1ErrreqPreciseSafetyUncorr/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit30VDSP1ErrreqEppWdogviol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit30VDSP1ErrreqEppWdogviol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit30VDSP1ErrreqEppWdogviol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit30VDSP1ErrreqEppWdogviol/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit31VDSP1ErrreqIopWdogviol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit31VDSP1ErrreqIopWdogviol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit31VDSP1ErrreqIopWdogviol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain41/CddEmmBit31VDSP1ErrreqIopWdogviol/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDomain42 + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42 + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmAddressToSaveErrorStatus + 1342177432 + + + + + CddEmmBit0VDSP1ErrreqEdpWdogViol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit0VDSP1ErrreqEdpWdogViol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit0VDSP1ErrreqEdpWdogViol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit0VDSP1ErrreqEdpWdogViol/CddEmmErrorSignalTarget + INTC + + + + + CddEmmBit1VDSP1ErrreqAxim0WdogViol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit1VDSP1ErrreqAxim0WdogViol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit1VDSP1ErrreqAxim0WdogViol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit1VDSP1ErrreqAxim0WdogViol/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit2VDSP1ErrreqSysWdInt + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit2VDSP1ErrreqSysWdInt + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit2VDSP1ErrreqSysWdInt/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit2VDSP1ErrreqSysWdInt/CddEmmErrorSignalTarget + ERROROUT + + + + + CddEmmBit3VDSP1ErrreqIcuWdogViol + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit3VDSP1ErrreqIcuWdogViol + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit3VDSP1ErrreqIcuWdogViol/CddEmmErrorSignalEnable + true + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDomain42/CddEmmBit3VDSP1ErrreqIcuWdogViol/CddEmmErrorSignalTarget + ERROROUT + + + + + + + CddEmmDemEventParameterRefs + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDemEventParameterRefs + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDemEventParameterRefs/CDDEMM_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDEMM_E_INTERRUPT_CONTROLLER_FAILURE + + + /Renesas/EcucDefs_CddEmm/Cdd/CddEmmDemEventParameterRefs/CDDEMM_E_WRITE_VERIFY_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDEMM_E_WRITE_VERIFY_FAILURE + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_ICCOM_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_ICCOM_V4M_Sample.arxml new file mode 100644 index 0000000..3756b10 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_ICCOM_V4M_Sample.arxml @@ -0,0 +1,249 @@ + + + + + ActiveEcuC + + + Cdd + + + + false + + + + /Renesas/EcucDefs_CddIccom/Cdd + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_CddIccom/CddIccom_Impl + + + CddGeneral + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddInstanceId + 0 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomVersionInfoApi + true + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomCriticalSectionProtection + true + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomDevErrorDetect + false + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomDeviceName + V4M + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomVersionCheckExternalModules + true + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomUnintendedInterruptCheck + true + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomCrNumber + 0 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddGeneral/CddIccomWriteVerifyCheck + true + + + + + CddIccomChannel_000 + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelId + 0 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelCtaAddress + 1207726080 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelCtaPartitionSize + 2048 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelMfisSelection + AP_MFIS0 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelTimeoutDuration + 0.5 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelNotification + CddIccom_Ch0NoticeCallback + + + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelTimeoutCounterRef + /ActiveEcuC/Os/OsCounter + + + + + CddIccomDemEventParameterRefs + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomDemEventParameterRefs + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomDemEventParameterRefs/CDDICCOM_E_FATAL + /ActiveEcuC/Dem/DemConfigSet/CDDICCOM_E_FATAL + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomDemEventParameterRefs/CDDICCOM_E_INIT_NEGOTIATION + /ActiveEcuC/Dem/DemConfigSet/CDDICCOM_E_INIT_NEGOTIATION + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomDemEventParameterRefs/CDDICCOM_E_TIMEOUT + /ActiveEcuC/Dem/DemConfigSet/CDDICCOM_E_TIMEOUT + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomDemEventParameterRefs/CDDICCOM_E_INVALID_ACK + /ActiveEcuC/Dem/DemConfigSet/CDDICCOM_E_INVALID_ACK + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomDemEventParameterRefs/CDDICCOM_E_WRITE_VERIFY_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDICCOM_E_WRITE_VERIFY_FAILURE + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomDemEventParameterRefs/CDDICCOM_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDICCOM_E_INTERRUPT_CONTROLLER_FAILURE + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomDemEventParameterRefs/CDDICCOM_E_DEINIT_NEGOTIATION + /ActiveEcuC/Dem/DemConfigSet/CDDICCOM_E_DEINIT_NEGOTIATION + + + + + CddIccomChannel_001 + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelId + 1 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelCtaAddress + 1207734272 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelCtaPartitionSize + 2048 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelMfisSelection + AP_MFIS1 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelTimeoutDuration + 0.5 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelNotification + CddIccom_Ch1NoticeCallback + + + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelTimeoutCounterRef + /ActiveEcuC/Os/OsCounter + + + + + CddIccomChannel_002 + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelId + 2 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelCtaAddress + 1207742464 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelCtaPartitionSize + 2048 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelMfisSelection + AP_MFIS2 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelTimeoutDuration + 0.5 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelNotification + CddIccom_Ch2NoticeCallback + + + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelTimeoutCounterRef + /ActiveEcuC/Os/OsCounter + + + + + CddIccomChannel_003 + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelId + 3 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelCtaAddress + 1207750656 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelCtaPartitionSize + 2048 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelMfisSelection + AP_MFIS3 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelTimeoutDuration + 0.5 + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelNotification + CddIccom_Ch3NoticeCallback + + + + + /Renesas/EcucDefs_CddIccom/Cdd/CddIccomChannel/CddIccomChannelTimeoutCounterRef + /ActiveEcuC/Os/OsCounter + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_IIC_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_IIC_V4M_Sample.arxml new file mode 100644 index 0000000..e111a13 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_IIC_V4M_Sample.arxml @@ -0,0 +1,239 @@ + + + + + ActiveEcuC + + + Cdd + + + + false + + + + /Renesas/EcucDefs_CddIic/Cdd + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_CddIic/CddIic_Impl + + + CddGeneral + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddInstanceId + 0 + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicDevErrorDetect + false + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicVersionInfoApi + true + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicDeviceName + V4M + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicRegisterWriteVerify + true + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicCriticalSectionProtection + true + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicUnintendedInterruptCheck + true + + + /Renesas/EcucDefs_CddIic/Cdd/CddGeneral/CddIicVersionCheckExternalModules + true + + + + + CddIicChannel + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicChannelId + 0 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicHwChannelSelect + IIC0 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicCommunicationInterface + MASTER_INTERFACE + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicDmaEnable + false + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicChannelNotification + CddIic_Ch0NoticeCallBack + + + + + CddIicDemEventParameterRefs + /Renesas/EcucDefs_CddIic/Cdd/CddIicDemEventParameterRefs + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicDemEventParameterRefs/CDDIIC_E_NON_ACKNOWLEDGEMENT + /ActiveEcuC/Dem/DemConfigSet/CDDIIC_E_NON_ACKNOWLEDGEMENT + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicDemEventParameterRefs/CDDIIC_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDIIC_E_INTERRUPT_CONTROLLER_FAILURE + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicDemEventParameterRefs/CDDIIC_E_WRITE_VERIFY + /ActiveEcuC/Dem/DemConfigSet/CDDIIC_E_REGISTER_WRITE_VERIFY + + + + + CddIicChannel_001 + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicChannelId + 1 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicHwChannelSelect + IIC1 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicCommunicationInterface + SLAVE_INTERFACE + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicDmaEnable + false + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicChannelNotification + CddIic_Ch1NoticeCallBack + + + + + CddIicChannel_002 + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicChannelId + 2 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicHwChannelSelect + IIC2 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicCommunicationInterface + MASTER_INTERFACE + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicDmaEnable + false + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicChannelNotification + CddIic_Ch2NoticeCallBack + + + + + CddIicChannel_003 + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicChannelId + 3 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicHwChannelSelect + IIC3 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicCommunicationInterface + MASTER_INTERFACE + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicDmaEnable + false + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicChannel/CddIicChannelNotification + CddIic_Ch3NoticeCallBack + + + + + CddIicSlave + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSlaveID + 0 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicClockModeSelection + FIXED_DUTY + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSclHighPeriod + 1.17 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSclLowPeriod + 1.3 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicClockFrequency + 900000 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicRisingTime + 3 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicFallingTime + 3 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicIntDelay + 50 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicSlaveAddress + 61 + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicAddressModeSelect + SEVEN_BIT_ADDR + + + /Renesas/EcucDefs_CddIic/Cdd/CddIicSlave/CddIicFirstBitSetupCycle + 15 + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_IPMMU_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_IPMMU_V4M_Sample.arxml new file mode 100644 index 0000000..53dd6c2 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_IPMMU_V4M_Sample.arxml @@ -0,0 +1,577 @@ + + + + + ActiveEcuC + + + Cdd + + + + false + + + + /Renesas/EcucDefs_CddIpmmu/Cdd + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_CddIpmmu/CddIpmmu_Impl + + + CddGeneral + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddInstanceId + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuDevErrorDetect + false + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuVersionInfoApi + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuDeviceName + V4M + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuUnintendedInterruptCheck + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuC4PowerDomainSupport + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuEdcErrorDetect + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuWriteVerifyCheck + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuCriticalSectionProtection + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddGeneral/CddIpmmuVersionCheckExternalModules + true + + + + + CddIpmmuDemEventParameterRefs + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuDemEventParameterRefs + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuDemEventParameterRefs/CDDIPMMU_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDIPMMU_E_INTERRUPT_CONTROLLER_FAILURE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuDemEventParameterRefs/CDDIPMMU_E_WRITE_VERIFY_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDIPMMU_E_WRITE_VERIFY_FAILURE + + + + + CddIpmmuTlb_000 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbId + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbSelection + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbBusDomain + CDD_IPMMU_RT1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbTranslationTable + PMB + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbAddressTranslationEnable + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbASID + 0 + + + + + CddIpmmuPmb_000 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbId + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbSelection + PMB1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbBusDomain + CDD_IPMMU_RT1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbVirtualPageNumber + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbPhysicalPageNumber + 230 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbUpperPhysicalPageNumber + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbPageSize + PMB_SIZE_16MB + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbCacheBit + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbCallbackFunction + NULL_PTR + + + + + CddIpmmuTlb_001 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbId + 1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbSelection + 2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbBusDomain + CDD_IPMMU_RT1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbTranslationTable + MMU2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbAddressTranslationEnable + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbASID + 0 + + + + + CddIpmmuTlb_002 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbId + 2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbSelection + 3 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbBusDomain + CDD_IPMMU_RT1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbTranslationTable + MMU3 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbAddressTranslationEnable + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbASID + 0 + + + + + CddIpmmuTlb_003 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbId + 3 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbSelection + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbBusDomain + CDD_IPMMU_DS0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbTranslationTable + PMB + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbAddressTranslationEnable + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbASID + 0 + + + + + CddIpmmuTlb_004 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbId + 4 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbSelection + 2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbBusDomain + CDD_IPMMU_DS0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbTranslationTable + MMU2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbAddressTranslationEnable + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbASID + 0 + + + + + CddIpmmuTlb_005 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbId + 5 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbSelection + 3 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbBusDomain + CDD_IPMMU_DS0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbTranslationTable + MMU3 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbAddressTranslationEnable + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuTlb/CddIpmmuTlbASID + 0 + + + + + CddIpmmuMmu_000 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuId + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuSelection + MMU2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuAArchSupport + VMSAV8_32 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTableFormat + MMU_LDTTF + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuStartLevel + MMU_SALV1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuMemoryAttributeIndirection0 + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuMemoryAttributeIndirection1 + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuAccessFlagEnable + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuCallbackFunction + CddIpmmu_MmuCallBackFunction0 + + + + + CddIpmmuMmuTranslationTable_0 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuTranslationTableId + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuUpperBaseAddress + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuLowerBaseAddress + 308257 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuTranslationSize + 1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuShareAbility + NON_SHAREABLE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuOuterCacheAbility + NON_CACHEABLE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuInnerCacheAbility + NON_CACHEABLE + + + + + CddIpmmuMmuTranslationTable_1 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuTranslationTableId + 1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuUpperBaseAddress + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuLowerBaseAddress + 308257 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuTranslationSize + 1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuShareAbility + NON_SHAREABLE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuOuterCacheAbility + NON_CACHEABLE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuInnerCacheAbility + NON_CACHEABLE + + + + + + + CddIpmmuPmb_001 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbId + 1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbSelection + PMB2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbBusDomain + CDD_IPMMU_DS0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbVirtualPageNumber + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbPhysicalPageNumber + 230 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbUpperPhysicalPageNumber + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbPageSize + PMB_SIZE_16MB + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbCacheBit + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuPmb/CddIpmmuPmbCallbackFunction + NULL_PTR + + + + + CddIpmmuMmu_001 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuId + 1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuSelection + MMU3 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuAArchSupport + VMSAV8_32 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTableFormat + MMU_LDTTF + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuStartLevel + MMU_SALV2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuMemoryAttributeIndirection0 + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuMemoryAttributeIndirection1 + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuAccessFlagEnable + true + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuCallbackFunction + NULL_PTR + + + + + CddIpmmuMmuTranslationTable_0 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuTranslationTableId + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuUpperBaseAddress + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuLowerBaseAddress + 308257 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuTranslationSize + 2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuShareAbility + NON_SHAREABLE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuOuterCacheAbility + NON_CACHEABLE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuInnerCacheAbility + NON_CACHEABLE + + + + + CddIpmmuMmuTranslationTable_1 + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuTranslationTableId + 1 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuUpperBaseAddress + 0 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuLowerBaseAddress + 308257 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuTranslationSize + 2 + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuShareAbility + NON_SHAREABLE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuOuterCacheAbility + NON_CACHEABLE + + + /Renesas/EcucDefs_CddIpmmu/Cdd/CddIpmmuMmu/CddIpmmuMmuTranslationTable/CddIpmmuMmuInnerCacheAbility + NON_CACHEABLE + + + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_RFSO_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_RFSO_V4M_Sample.arxml new file mode 100644 index 0000000..eb5b11e --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_RFSO_V4M_Sample.arxml @@ -0,0 +1,181 @@ + + + + + ActiveEcuC + + + Cdd + + + + false + + + + /Renesas/EcucDefs_CddRfso/Cdd + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_CddRfso/CddRfso_Impl + + + CddGeneral + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddInstanceId + 0 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddRfsoDevErrorDetect + false + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddRfsoVersionInfoApi + true + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddRfsoDeviceName + V4M + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddRfsoAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddRfsoRegisterWriteVerify + true + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddRfsoCriticalSectionProtection + true + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddRfsoUnintendedInterruptCheck + true + + + /Renesas/EcucDefs_CddRfso/Cdd/CddGeneral/CddRfsoVersionCheckExternalModules + true + + + + + CddRfsoChannel + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoChannelSelection + CHANNEL0 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoChannelId + 0 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoFrequencyDivision + 1000 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIntervalTimerDuration + 100000 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIndicateIntervalUnit + CDDRFSO_CYCLE + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIntervalTimerCallbackFunction + CddRfso_IntervalCbkFunc + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoTimeoutTimerMaxDuration + 120000 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoTimeoutTimerMinDuration + 0 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIndicateTimeoutUnit + CDDRFSO_CYCLE + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIntervalTimerOneShot + false + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIntervalTimerInterruptEnable + false + + + + + CddRfsoDemEventParameterRefs + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoDemEventParameterRefs + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoDemEventParameterRefs/CDDRFSO_E_WRITE_VERIFY + /ActiveEcuC/Dem/DemConfigSet/CDDRFSO_E_WRITE_VERIFY + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoDemEventParameterRefs/CDDRFSO_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDDRFSO_E_INTERRUPT_CONTROLLER_FAILURE + + + + + CddRfsoChannel_001 + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoChannelSelection + CHANNEL1 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoChannelId + 1 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoFrequencyDivision + 1000 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIntervalTimerDuration + 2000000 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIndicateIntervalUnit + CDDRFSO_MICROSECOND + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIntervalTimerCallbackFunction + CddRfso_IntervalCbkFunc + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoTimeoutTimerMaxDuration + 1000000 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoTimeoutTimerMinDuration + 50000 + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIndicateTimeoutUnit + CDDRFSO_MICROSECOND + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIntervalTimerOneShot + true + + + /Renesas/EcucDefs_CddRfso/Cdd/CddRfsoChannel/CddRfsoIntervalTimerInterruptEnable + true + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_THS_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_THS_V4M_Sample.arxml new file mode 100644 index 0000000..cc43ac4 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_CDD_THS_V4M_Sample.arxml @@ -0,0 +1,191 @@ + + + + + ActiveEcuC + + + Cdd + + + + false + + + + /Renesas/EcucDefs_CddThs/Cdd + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_CddThs/CddThs_Impl + + + CddThsDemEventParameterRefs + /Renesas/EcucDefs_CddThs/Cdd/CddThsDemEventParameterRefs + + + /Renesas/EcucDefs_CddThs/Cdd/CddThsDemEventParameterRefs/CDD_THS_E_WRITEVERIFY_FAILURE + /ActiveEcuC/Dem/DemConfigSet/CDD_THS_E_WRITEVERIFY_FAILURE + + + + + CddGeneral + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddInstanceId + 0 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsDeviceName + V4M + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsHardWareUnitOption + TSC1 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsVersionInfoApi + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsVersionCheckExternalModules + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsTemperatureInfo + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsVoltageInfo + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsAllowConfigureOperationState + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsCriticalSectionProtection + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsWriteVerifyCheck + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsDevErrorDetection + false + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsEnableThermalInterruption + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsPtat1 + 2631 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsPtat2 + 1509 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsPtat3 + 435 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThcode1 + 3397 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThcode2 + 2800 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThcode3 + 2221 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsInitialOperationState + CDD_THS_NORMAL + + + + + CddThsThermalInterruption + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption + + + CddThsThermalChannel_0 + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_0 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_0/CddThsThermalChannelEnable + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_0/CddThsThermalChannelId + CDD_THS_THERMAL_CH0 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_0/CddThsThermalInterruptionType + CDD_THS_LOWER_BOUND + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_0/CddThsThermalInterruptionValue + 20 + + + + + CddThsThermalChannel_1 + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_1 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_1/CddThsThermalChannelEnable + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_1/CddThsThermalChannelId + CDD_THS_THERMAL_CH1 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_1/CddThsThermalInterruptionType + CDD_THS_LOWER_BOUND + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_1/CddThsThermalInterruptionValue + 20 + + + + + CddThsThermalChannel_2 + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_2 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_2/CddThsThermalChannelEnable + true + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_2/CddThsThermalChannelId + CDD_THS_THERMAL_CH2 + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_2/CddThsThermalInterruptionType + CDD_THS_LOWER_BOUND + + + /Renesas/EcucDefs_CddThs/Cdd/CddGeneral/CddThsThermalInterruption/CddThsThermalChannel_2/CddThsThermalInterruptionValue + 20 + + + + + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_DIO_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_DIO_V4M_Sample.arxml new file mode 100644 index 0000000..a242917 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_DIO_V4M_Sample.arxml @@ -0,0 +1,185 @@ + + + + + ActiveEcuC + + + Dio + + + + false + + + + /Renesas/EcucDefs_Dio/Dio + VARIANT-LINK-TIME + /Renesas/BswModuleDescriptions_Dio/Dio_Impl + + + DioGeneral + /Renesas/EcucDefs_Dio/Dio/DioGeneral + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioDevErrorDetect + false + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioFlipChannelApi + true + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioVersionInfoApi + true + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioCriticalSectionProtection + true + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioDeviceName + V4M + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioMaskedWritePortApi + true + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioReadChannelGroupOutputValueApi + true + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioReadChannelOutputValueApi + true + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioExclusiveSelection + MFISLCKR1 + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioExclusiveTimeout + 256410 + + + /Renesas/EcucDefs_Dio/Dio/DioGeneral/DioExclusiveControl + false + + + + + DioConfig + /Renesas/EcucDefs_Dio/Dio/DioConfig + + + DioPort_004 + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioPortId + 4 + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioPortName + GPIO_4_BITS_00_TO_24 + + + + + DioChannelGroup4 + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannelGroup + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannelGroup/DioChannelGroupIdentification + NULL + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannelGroup/DioPortMask + 1023 + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannelGroup/DioPortOffset + 0 + + + + + DioChannel0_Gr4 + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannel + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannel/DioChannelId + 0 + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannel/DioChannelBitPosition + 0 + + + + + + + DioPort_005 + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioPortId + 5 + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioPortName + GPIO_5_BITS_00_TO_20 + + + + + DioChannelGroup5 + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannelGroup + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannelGroup/DioChannelGroupIdentification + NULL + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannelGroup/DioPortMask + 31 + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannelGroup/DioPortOffset + 0 + + + + + DioChannel0_Gr5 + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannel + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannel/DioChannelId + 0 + + + /Renesas/EcucDefs_Dio/Dio/DioConfig/DioPort/DioChannel/DioChannelBitPosition + 0 + + + + + + + + + DioDemEventParameterRefs + /Renesas/EcucDefs_Dio/Dio/DioDemEventParameterRefs + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_ETH_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_ETH_V4M_Sample.arxml new file mode 100644 index 0000000..4f547b0 --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_ETH_V4M_Sample.arxml @@ -0,0 +1,1371 @@ + + + + + ActiveEcuC + + + Eth + + + + false + + + + /Renesas/EcucDefs_Eth/Eth + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Eth/Eth_Impl + + + EthGeneral + /Renesas/EcucDefs_Eth/Eth/EthGeneral + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthDevErrorDetect + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthGlobalTimeSupport + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthIndex + 0 + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthMainFunctionPeriod + 0.1 + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthMaxCtrlsSupported + 3 + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthVersionInfoApi + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthDeviceName + V4M + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthCriticalSectionProtection + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthQosSupport + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthInputClockRefImmediateValue + 100000000 + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthIsrCategory + CAT1 + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthTimeout + 0.012 + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthGetRxStatsApi + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthGetTxErrorCounterValuesApi + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthGetCounterValuesApi + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthRegisterCheckInitTime + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthRegisterCheckRunTime + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthGetDropCountApi + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthGetEtherStatsApi + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthGetTxStatsApi + true + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthSwitchManagementSupport + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthUnintendedInterruptCheck + false + + + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthOsCounterRef + /ActiveEcuC/Os/OsCounter + + + + + EthCtrlOffloading + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthCtrlOffloading + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthCtrlOffloading/EthCtrlEnableOffloadChecksumIPv4 + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthCtrlOffloading/EthCtrlEnableOffloadChecksumICMP + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthCtrlOffloading/EthCtrlEnableOffloadChecksumTCP + false + + + /Renesas/EcucDefs_Eth/Eth/EthGeneral/EthCtrlOffloading/EthCtrlEnableOffloadChecksumUDP + false + + + + + + + EthConfigSet + /Renesas/EcucDefs_Eth/Eth/EthConfigSet + + + EthCtrlConfig + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableMii + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableRxInterrupt + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableTxInterrupt + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlIdx + 0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPhyAddress + 74:90:50:00:00:00 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDuplexMode + ETH_FULL_DUPLEX + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthInternalLoopBack + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthNwCntrlFiltering + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthStreamFiltering + ETH_AVBNMQUE0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthBeTimeStampStore + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthStreamTimeStampStore + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQuePriority + ETH_AVBDEF + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthEnableCBS + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthUnitSelection + AVB0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthSRPTalkerFiltering + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRamSize + 102400 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerType + ETH_MAC_LAYER_TYPE_XGMII + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerSpeed + ETH_MAC_LAYER_SPEED_100M + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerSubType + REDUCED + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxClockDelayMode + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxClockDelayMode + false + + + + + EthTxQueueConfig + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthTxQueueConfig_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 1 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthTxQueueConfig_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 2 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_CBS + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthCtrlTxQueueBwFraction + 33 + + + + + + + EthTxQueueConfig_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 3 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthCtrlPriority + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlTxDefaultQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + + + EthCtrlPriorityMapping + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 0 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + + + EthCtrlPriorityMapping_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 1 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_001 + + + + + EthCtrlPriorityMapping_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 2 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_002 + + + + + EthCtrlPriorityMapping_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 3 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_003 + + + + + + + EthDemEventParameterRefs + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_ACCESS + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_ALIGNMENT + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_CRC + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_002 + + + + + EthCtrlConfigEgress + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigEgressLastSchedulerRef + /AUTOSAR/EcucDefs/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + + + EthCtrlConfigScheduler + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + EthCtrlConfigSchedulerPredecessor + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor/EthCtrlConfigSchedulerPredecessorOrder + 0 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor/EthCtrlConfigSchedulerPredecessorRef + /AUTOSAR/EcucDefs/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + + + + + + + EthCtrlConfigIngress + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigIngress + + + EthRxQueueConfig + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 00:00:00:00:00:00:00:00 + + + + + EthRxQueueConfig_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 1 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 00:00:00:00:00:00:00:00 + + + + + EthRxQueueConfig_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 2 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 11:22:33:44:55:AA:00:00 + + + + + EthRxQueueConfig_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 3 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 11:22:33:44:55:00:00:00 + + + + + + + EthCtrlConfig_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableMii + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableRxInterrupt + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableTxInterrupt + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlIdx + 1 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPhyAddress + 74:90:50:00:00:00 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDuplexMode + ETH_FULL_DUPLEX + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthInternalLoopBack + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthNwCntrlFiltering + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthStreamFiltering + ETH_AVBNMQUE0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthBeTimeStampStore + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthStreamTimeStampStore + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQuePriority + ETH_AVBDEF + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthEnableCBS + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthUnitSelection + AVB1 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthSRPTalkerFiltering + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRamSize + 102400 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerType + ETH_MAC_LAYER_TYPE_XGMII + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerSpeed + ETH_MAC_LAYER_SPEED_100M + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerSubType + REDUCED + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxClockDelayMode + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxClockDelayMode + false + + + + + EthTxQueueConfig + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthTxQueueConfig_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 1 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthTxQueueConfig_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 2 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_CBS + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthCtrlTxQueueBwFraction + 33 + + + + + + + EthTxQueueConfig_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 3 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthCtrlPriority + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlTxDefaultQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + + + EthCtrlPriorityMapping + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 0 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + + + EthCtrlPriorityMapping_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 1 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_001 + + + + + EthCtrlPriorityMapping_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 2 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_002 + + + + + EthCtrlPriorityMapping_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 3 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_003 + + + + + + + EthDemEventParameterRefs + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_ACCESS + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_ALIGNMENT + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_CRC + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_002 + + + + + EthCtrlConfigEgress + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigEgressLastSchedulerRef + /AUTOSAR/EcucDefs/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + + + EthCtrlConfigScheduler + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + EthCtrlConfigSchedulerPredecessor + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor/EthCtrlConfigSchedulerPredecessorOrder + 0 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor/EthCtrlConfigSchedulerPredecessorRef + /AUTOSAR/EcucDefs/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + + + + + + + EthCtrlConfigIngress + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigIngress + + + EthRxQueueConfig + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 00:00:00:00:00:00:00:00 + + + + + EthRxQueueConfig_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 1 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 00:00:00:00:00:00:00:00 + + + + + EthRxQueueConfig_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 2 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 11:22:33:44:55:AA:00:00 + + + + + EthRxQueueConfig_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 3 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 11:22:33:44:55:00:00:00 + + + + + + + EthCtrlConfig_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableMii + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableRxInterrupt + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlEnableTxInterrupt + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlIdx + 2 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPhyAddress + 74:90:50:00:00:00 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDuplexMode + ETH_FULL_DUPLEX + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthInternalLoopBack + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthNwCntrlFiltering + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthStreamFiltering + ETH_AVBNMQUE0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthBeTimeStampStore + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthStreamTimeStampStore + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQuePriority + ETH_AVBDEF + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthEnableCBS + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthUnitSelection + AVB2 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthSRPTalkerFiltering + true + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRamSize + 102400 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerType + ETH_MAC_LAYER_TYPE_XGMII + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerSpeed + ETH_MAC_LAYER_SPEED_1G + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlMacLayerSubType + REDUCED + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxClockDelayMode + false + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxClockDelayMode + false + + + + + EthTxQueueConfig + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthTxQueueConfig_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 1 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthTxQueueConfig_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 2 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_CBS + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthCtrlTxQueueBwFraction + 33 + + + + + + + EthTxQueueConfig_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueIdx + 3 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthTxQueueBufs + 8 + + + + + EthCtrlTxQueueShaper + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig/EthCtrlTxQueueShaper/EthTxQueuePolicy + ETH_NONE + + + + + + + EthCtrlPriority + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlTxDefaultQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + + + EthCtrlPriorityMapping + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 0 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig + + + + + EthCtrlPriorityMapping_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 1 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_001 + + + + + EthCtrlPriorityMapping_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 2 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_002 + + + + + EthCtrlPriorityMapping_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlPriorityValue + 3 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlPriority/EthCtrlPriorityMapping/EthCtrlTxQueueRef + /ActiveEcuC/Eth/EthConfigSet/EthCtrlConfig/EthTxQueueConfig_003 + + + + + + + EthDemEventParameterRefs + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_ACCESS + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_ALIGNMENT + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthDemEventParameterRefs/ETH_E_CRC + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_002 + + + + + EthCtrlConfigEgress + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigEgressLastSchedulerRef + /AUTOSAR/EcucDefs/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + + + EthCtrlConfigScheduler + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + EthCtrlConfigSchedulerPredecessor + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor/EthCtrlConfigSchedulerPredecessorOrder + 0 + + + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler/EthCtrlConfigSchedulerPredecessor/EthCtrlConfigSchedulerPredecessorRef + /AUTOSAR/EcucDefs/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigEgress/EthCtrlConfigScheduler + + + + + + + + + EthCtrlConfigIngress + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthCtrlConfigIngress + + + EthRxQueueConfig + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 0 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 00:00:00:00:00:00:00:00 + + + + + EthRxQueueConfig_001 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 1 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 00:00:00:00:00:00:00:00 + + + + + EthRxQueueConfig_002 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 2 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 11:22:33:44:55:AA:00:00 + + + + + EthRxQueueConfig_003 + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueIdx + 3 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthRxQueueBufs + 8 + + + /Renesas/EcucDefs_Eth/Eth/EthConfigSet/EthCtrlConfig/EthRxQueueConfig/EthPatternStream + 11:22:33:44:55:00:00:00 + + + + + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_FLS_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_FLS_V4M_Sample.arxml new file mode 100644 index 0000000..754835f --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_FLS_V4M_Sample.arxml @@ -0,0 +1,2301 @@ + + + + + ActiveEcuC + + + Fls + + + + false + + + + /Renesas/EcucDefs_Fls/Fls + VARIANT-POST-BUILD + /Renesas/BswModuleImplementation/Fls_Implementation + + + FlsGeneral + /Renesas/EcucDefs_Fls/Fls/FlsGeneral + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsAccess + FLS_SERIAL_FLASH_DEVICE + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsAcLoadOnJobStart + false + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsBaseAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsBlankCheckApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsCancelApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsCriticalSectionProtection + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsDevErrorDetect + false + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsDeviceName + V4M + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsDriverIndex + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsExclusiveControl + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsExternalSpaceReadMode + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsGetJobResultApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsGetStatusApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsRuntimeErrorDetect + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSelectPinGroup + FLS_QSPI0_PIN_GROUP + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSemaphore + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSetModeApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsBurstLengthValue + 31 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsPageBufferWrap + FLS_PAGE_BUFFER_WRAP_256 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsTimeoutMonitoring + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsTotalSize + 67108864 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsUseInterrupts + false + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsVersionInfoApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsWriteBuffer + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsWriteVerifyCheck + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsCpgExclusiveControl + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsClockSetConfirmTimeout + 0.1 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsClockSetTendCheckTimeout + 0.1 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsExpectedHwIdMask + 0xFFFFFFFF + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsReadTime + 0.1 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsCpgWriteVerifyCheck + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsCpgExclusiveSelection + MFISLCKR2 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsCpgExclusiveTimeout + 0.1 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsEraseTimeoutValue + 3 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsExclusiveSelection + MFISLCKR6 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsExclusiveTimeout + 0.1 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSemaphoreTimeout + 0.1 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsWriteTimeoutValue + 0.0005 + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsEraseVerificationEnabled + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsTimeoutSupervisionEnabled + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsWriteVerificationEnabled + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsTransientFaultDetect + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsCompareApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSuspendApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsResumeApi + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSpecificConfigApi + true + + + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsOsCounterRef + /ActiveEcuC/Os/OsCounter + + + + + FlsSerialFlashGeneral + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSerialFlashGeneral + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSerialFlashGeneral/FlsEnableEraseErrorBit + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSerialFlashGeneral/FlsEnableProgramErrorBit + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsSerialFlashGeneral/FlsDDRCalibration + true + + + + + FlsHyperFlashGeneral + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsHyperFlashGeneral + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsHyperFlashGeneral/FlsEnableEraseErrorBit + true + + + /Renesas/EcucDefs_Fls/Fls/FlsGeneral/FlsHyperFlashGeneral/FlsEnableProgramErrorBit + true + + + + + + + FlsPublishedInformation + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsAcLocationErase + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsAcLocationWrite + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsAcSizeErase + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsAcSizeWrite + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsErasedValue + 4294967295 + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsEraseTime + 3 + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsExpectedHwId + 0x4D200201 + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsSpecifiedEraseCycles + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsPublishedInformation/FlsWriteTime + 0.0005 + + + + + FlsConfigSet + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsAcErase + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsAcWrite + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsCallCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDefaultMode + MEMIF_MODE_SLOW + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsMaxReadFastMode + 64 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsMaxReadNormalMode + 256 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsMaxWriteFastMode + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsMaxWriteNormalMode + 262144 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsProtection + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsJobEndNotification + Fee_JobEndNotification + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsJobErrorNotification + Fee_JobErrorNotification + + + + + FlsSerialFlashConfig + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig + + + FlsSerialFlashRead + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsAddressAndDataBitSize + FOUR_BITS + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsAddressAndDataRate + DDR + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsAddressLength + FOUR_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsCommand + 237 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsRpcFrequency + FREQ_40MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsDummyCycle + 9 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashRead/FlsInternalStrobeDelay + 3 + + + + + FlsSerialFlashReadStatusReg + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsCommand + 5 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsRpcFrequency + FREQ_40MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsPositionOfBusyBit + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsPositionOfEraseErrorBit + 5 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsPositionOfProgramErrorBit + 6 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadStatusReg/FlsPositionOfWriteEnableBit + 1 + + + + + FlsSerialFlashReadHwId + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId/FlsClockDelay + EIGHT_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId/FlsCommand + 159 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId/FlsDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId/FlsRpcFrequency + FREQ_40MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashReadHwId/FlsNextAccessDelay + FOUR_CYCLES + + + + + FlsSerialFlashErase + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsAddressAndDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsAddressLength + FOUR_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsClockDelay + THREE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsCommand + 216 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsRpcFrequency + FREQ_40MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsNegationDelay + EIGHT_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashErase/FlsNextAccessDelay + SEVEN_CYCLES + + + + + FlsSerialFlashProgram + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsAddressAndDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsAddressLength + FOUR_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsClockDelay + EIGHT_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsCommand + 2 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsRpcFrequency + FREQ_40MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsNegationDelay + SEVEN_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashProgram/FlsNextAccessDelay + FIVE_CYCLES + + + + + FlsSerialFlashWriteEnable + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable/FlsCommand + 6 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable/FlsDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable/FlsRpcFrequency + FREQ_40MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable/FlsNegationDelay + SIX_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashWriteEnable/FlsNextAccessDelay + SIX_CYCLES + + + + + FlsSerialFlashDDRVerify + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsAddressAndDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsAddressLength + FOUR_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsRpcFrequency + FREQ_40MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRVerify/FlsSDRReadCommand + 3 + + + + + FlsSerialFlashDDRPattern + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRPattern + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRPattern/FlsNumberOfPattern + 1 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRPattern/FlsPatternAddress + 7864320 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSerialFlashConfig/FlsSerialFlashDDRPattern/FlsPatternValue + 2774181285 + + + + + + + FlsSectorList + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSectorList + + + FlsSector + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSectorList/FlsSector + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSectorList/FlsSector/FlsNumberOfSectors + 256 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSectorList/FlsSector/FlsPageSize + 1 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSectorList/FlsSector/FlsSectorSize + 262144 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsSectorList/FlsSector/FlsSectorStartaddress + 0 + + + + + + + FlsDemEventParameterRefs + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDemEventParameterRefs + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDemEventParameterRefs/FLS_E_CLOCK_SET_FAILURE + /ActiveEcuC/Dem/DemConfigSet/FLS_E_CLOCK_SET_FAILURE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDemEventParameterRefs/FLS_E_CPG_GET_CONTROL_FAILURE + /ActiveEcuC/Dem/DemConfigSet/FLS_E_CPG_GET_CONTROL_FAILURE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDemEventParameterRefs/FLS_E_CPG_WRITE_VERIFY_FAILURE + /ActiveEcuC/Dem/DemConfigSet/FLS_E_CPG_WRITE_VERIFY_FAILURE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDemEventParameterRefs/FLS_E_GET_CONTROL_FAILURE + /ActiveEcuC/Dem/DemConfigSet/FLS_E_GET_CONTROL_FAILURE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDemEventParameterRefs/FLS_E_GET_SEMAPHORE_FAILURE + /ActiveEcuC/Dem/DemConfigSet/FLS_E_GET_SEMAPHORE_FAILURE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDemEventParameterRefs/FLS_E_RELEASE_SEMAPHORE_FAILURE + /ActiveEcuC/Dem/DemConfigSet/FLS_E_RELEASE_SEMAPHORE_FAILURE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsDemEventParameterRefs/FLS_E_WRITE_VERIFY_FAILURE + /ActiveEcuC/Dem/DemConfigSet/FLS_E_WRITE_VERIFY_FAILURE + + + + + FlsHyperFlashConfig + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig + + + FlsHyperFlashRead + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashRead + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashRead/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashRead/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashRead/FlsDummyCycle + 16 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashRead/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashRead/FlsNextAccessDelay + ONE_CYCLE + + + + + FlsHyperFlashReadStatusReg + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsDummyCycle + 16 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsPositionOfEraseErrorBit + 5 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsPositionOfProgramErrorBit + 4 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsPositionOfDeviceReadyBit + 7 + + + + + FlsReadStatusSetupCycle + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsReadStatusSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsReadStatusSetupCycle/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadStatusReg/FlsReadStatusSetupCycle/FlsTransactionData + 112 + + + + + + + FlsHyperFlashReadHwId + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsIDReadAddress0 + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsDummyCycle + 15 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsIDReadAddress1 + 1 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsIDReadAddress2 + 14 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsIDReadAddress3 + 15 + + + + + FlsEnterCFI + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsEnterCFI + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsEnterCFI/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsEnterCFI/FlsTransactionData + 152 + + + + + FlsExitCFI + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsExitCFI + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsExitCFI/FlsTransactionAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashReadHwId/FlsExitCFI/FlsTransactionData + 240 + + + + + + + FlsHyperFlashErase + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsCommand + 48 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsNextAccessDelay + ONE_CYCLE + + + + + FlsEraseSetupCycle_001 + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionData + 170 + + + + + FlsEraseSetupCycle_002 + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionAddress + 682 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionData + 85 + + + + + FlsEraseSetupCycle_003 + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionData + 128 + + + + + FlsEraseSetupCycle_004 + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionData + 170 + + + + + FlsEraseSetupCycle_005 + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionAddress + 682 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashErase/FlsEraseSetupCycle/FlsTransactionData + 85 + + + + + + + FlsHyperFlashProgram + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsNextAccessDelay + ONE_CYCLE + + + + + FlsProgramSetupCycle_001 + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle/FlsTransactionData + 170 + + + + + FlsProgramSetupCycle_002 + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle/FlsTransactionAddress + 682 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle/FlsTransactionData + 85 + + + + + FlsProgramSetupCycle_003 + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsConfigSet/FlsHyperFlashConfig/FlsHyperFlashProgram/FlsProgramSetupCycle/FlsTransactionData + 160 + + + + + + + + + + + EnterFourByteAddressMode + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_WRITE_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 183 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + ReadCR1VRegisterConfig + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_READ_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 101 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + THREE_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 8388610 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 8 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + ReadCR2VRegister4BytesConfig + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_READ_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 101 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + FOUR_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 8388611 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 8 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + ReadCR2VRegisterConfig + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_READ_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 101 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + THREE_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 8388611 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 8 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + ReadCR3VRegisterConfig + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_READ_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 101 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + THREE_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 8388612 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 8 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + ReadStatusRegConfig + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_READ_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 5 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + WriteCR1VRegister + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_WRITE_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 113 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + THREE_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 8388610 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + WriteCR2VRegister + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_WRITE_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 113 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + THREE_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 8388611 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + WriteCR2VRegister4Bytes + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_WRITE_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 113 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + FOUR_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 8388611 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + WriteCR3VRegister + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_WRITE_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 113 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + THREE_BYTES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 8388612 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + WriteEnableConfig + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOperation + FLS_WRITE_OPERATION + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommand + 6 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandEnable + false + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommand + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalData + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressAndDataRate + SDR + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsAddressBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalCommandBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsOptionalDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataBitSize + ONE_BIT + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsSerialFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + + + WriteVCR0Register + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsOperation + FLS_WRITE_OPERATION + + + + + WriteVCR0RegisterSetupCycle_000 + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionData + 170 + + + + + WriteVCR0RegisterSetupCycle_001 + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionAddress + 682 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionData + 85 + + + + + WriteVCR0RegisterSetupCycle_002 + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionData + 56 + + + + + + + ReadVCR0Register + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsDummyCycle + 16 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsOperation + FLS_READ_OPERATION + + + + + ReadVCR0RegisterSetupCycle_000 + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionData + 170 + + + + + ReadVCR0RegisterSetupCycle_001 + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionAddress + 682 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionData + 85 + + + + + ReadVCR0RegisterSetupCycle_002 + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionData + 199 + + + + + + + ReadStatusRegister + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsDataLength + ONE_UNIT_DATA + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsDummyCycle + 16 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsOperation + FLS_READ_OPERATION + + + + + ReadStatusRegisterSetupCycle + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionAddress + 1365 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionData + 112 + + + + + + + ResetDevice + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsClockDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsDataLength + NOT_USED + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsRpcFrequency + FREQ_80MHz + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsDummyCycle + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsNegationDelay + FIVE_DOT_FIVE_CYCLES + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsNextAccessDelay + ONE_CYCLE + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsOperation + FLS_WRITE_OPERATION + + + + + ResetDeviceSetupCycle + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionAddress + 0 + + + /Renesas/EcucDefs_Fls/Fls/FlsHyperFlashSpecificConfig/FlsSpecificConfigSetupCycles/FlsTransactionData + 240 + + + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_GPT_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_GPT_V4M_Sample.arxml new file mode 100644 index 0000000..f37ee2b --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_GPT_V4M_Sample.arxml @@ -0,0 +1,317 @@ + + + + + ActiveEcuC + + + Gpt + + + + false + + + + /Renesas/EcucDefs_Gpt/Gpt + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Gpt/Gpt_Impl + + + GptDriverConfiguration + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptDevErrorDetect + false + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptReportWakeupSource + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptCriticalSectionProtection + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptDeviceName + V4M + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptPredefTimer100us32bitEnable + false + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptPredefTimer1usEnablingGrade + GPT_PREDEF_TIMER_1US_16_24_32BIT_ENABLED + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptUnintendedInterruptCheck + true + + + + + GptClockReferencePoint + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptClockReferencePoint + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptClockReferencePoint/GptClockReference + /ActiveEcuC/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + + + GptPredefTimerConfiguration + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptPredefTimerConfiguration + + + GptPredefTimer1Us32BitConfiguration + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptPredefTimerConfiguration/GptPredefTimer1Us32BitConfiguration + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptPredefTimerConfiguration/GptPredefTimer1Us32BitConfiguration/GptPredefTimerClockSelection + PCLK_DIVBY_2_POWOF_02 + + + /Renesas/EcucDefs_Gpt/Gpt/GptDriverConfiguration/GptPredefTimerConfiguration/GptPredefTimer1Us32BitConfiguration/GptPredefTimerChannelSelection + TMU_CH03 + + + + + + + + + GptConfigurationOfOptApiServices + /Renesas/EcucDefs_Gpt/Gpt/GptConfigurationOfOptApiServices + + + /Renesas/EcucDefs_Gpt/Gpt/GptConfigurationOfOptApiServices/GptDeinitApi + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptConfigurationOfOptApiServices/GptEnableDisableNotificationApi + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptConfigurationOfOptApiServices/GptVersionInfoApi + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptConfigurationOfOptApiServices/GptWakeupFunctionalityApi + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptConfigurationOfOptApiServices/GptTimeElapsedApi + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptConfigurationOfOptApiServices/GptTimeRemainingApi + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptConfigurationOfOptApiServices/GptGetPredefTimerValueApi + true + + + + + GptChannelConfigSet + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet + + + GptChannelConfiguration + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelId + 0 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkEdge + RISE + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkPrescaler + PCLK_DIVBY_2_POWOF_02 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelMode + GPT_CH_MODE_CONTINUOUS + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelTickFrequency + 0 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelTickValueMax + 4294967295 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptEnableWakeup + true + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptTimerInputSelection + TMU_CH00 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptNotification + Gpt_Notification_0 + + + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkSrcRef + /ActiveEcuC/Gpt/GptDriverConfiguration/GptClockReferencePoint + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptTMUClkSrcRef + /ActiveEcuC/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk + + + + + GptWakeupConfiguration + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptWakeupConfiguration + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptWakeupConfiguration/GptWakeupSourceRef + /ActiveEcuC/EcuM/EcuMConfiguration/EcuMCommonConfiguration/EcuMWakeupSource + + + + + + + GptChannelConfiguration_001 + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelId + 1 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkEdge + RISE + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkPrescaler + PCLK_DIVBY_2_POWOF_02 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelMode + GPT_CH_MODE_CONTINUOUS + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelTickFrequency + 0 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelTickValueMax + 4294967295 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptEnableWakeup + false + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptTimerInputSelection + TMU_CH01 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptNotification + Gpt_Notification_1 + + + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkSrcRef + /ActiveEcuC/Gpt/GptDriverConfiguration/GptClockReferencePoint + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptTMUClkSrcRef + /ActiveEcuC/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk + + + + + GptChannelConfiguration_002 + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelId + 2 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkEdge + RISE + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkPrescaler + PCLK_DIVBY_2_POWOF_02 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelMode + GPT_CH_MODE_ONESHOT + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelTickFrequency + 0 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelTickValueMax + 4294967295 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptEnableWakeup + false + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptTimerInputSelection + TMU_CH02 + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptNotification + Gpt_Notification_2 + + + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelClkSrcRef + /ActiveEcuC/Gpt/GptDriverConfiguration/GptClockReferencePoint + + + /Renesas/EcucDefs_Gpt/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptTMUClkSrcRef + /ActiveEcuC/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk + + + + + + + GptDemEventParameterRefs + /Renesas/EcucDefs_Gpt/Gpt/GptDemEventParameterRefs + + + /Renesas/EcucDefs_Gpt/Gpt/GptDemEventParameterRefs/GPT_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_MCU_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_MCU_V4M_Sample.arxml new file mode 100644 index 0000000..8a898af --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_MCU_V4M_Sample.arxml @@ -0,0 +1,4485 @@ + + + + + ActiveEcuC + + + Mcu + + + + false + + + + /Renesas/EcucDefs_Mcu/Mcu + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Mcu/Mcu_Impl + + + McuGeneralConfiguration + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuDevErrorDetect + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuGetRamStateApi + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuInitClock + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuNoPll + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuPerformResetApi + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuVersionInfoApi + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuCriticalSectionProtection + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuSwResetCall + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuDeviceName + V4M + + + /Renesas/EcucDefs_Mcu/Mcu/McuGeneralConfiguration/McuIsrCategory + CAT1 + + + + + McuModuleConfiguration + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification + DISABLED + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuNumberOfMcuModes + 1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectors + 1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuResetSetting + 1 + + + + + McuModeSettingConf + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuModeType + MCU_RUN_MODE + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuPSOWakeUpFactor + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuC4PowerOn + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuTimeOutC4ModeChange + + + DV:UserDefined + + + 1400000 + + + + + McuClockSettingConfig + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockSettingId + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockStabilityWaitingTime + 0.0001 + + + + + McuSystemClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuSystemClockSetting + + + McuCpuMainSysClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuSystemClockSetting/McuCpuMainSysClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuSystemClockSetting/McuCpuMainSysClk/McuClockName + CLK_CPU + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuSystemClockSetting/McuCpuMainSysClk/McuClockValue + 1400000000 + + + + + + + McuModuleClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting + + + McuDebugTracePortClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTracePortClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTracePortClk/McuClockName + CLK_ZTR + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTracePortClk/McuClockSelection + PLL1CLK_DIV3_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTracePortClk/McuClockValue + 533333333.3 + + + + + McuDebugTraceBusClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTraceBusClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTraceBusClk/McuClockName + CLK_ZT + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTraceBusClk/McuClockSelection + PLL1CLK_DIV3_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTraceBusClk/McuClockValue + 533333333.3 + + + + + McuDebugClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugClk/McuClockName + CLK_ZS + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugClk/McuClockSelection + PLL1CLK_DIV6_ID_3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugClk/McuClockValue + 266666666.7 + + + + + McuZR0Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR0Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR0Clk/McuClockName + CLK_CPU + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR0Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR0Clk/McuClockValue + + + DV:UserDefined + + + 1400000000 + + + + + McuZR1Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk/McuClockName + CLK_CPU + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk/McuClockValue + 1400000000 + + + + + McuZR2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk/McuClockName + CLK_CPU + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk/McuClockValue + 1400000000 + + + + + McuZB3Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZB3Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZB3Clk/McuClockName + CLK_ZB3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZB3Clk/McuClockSelection + PLL3VCO_DIV2_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZB3Clk/McuClockValue + 720000000 + + + + + McuZGClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk/McuClockName + CLK_ZG + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk/McuClockDivider + 16 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk/McuClockValue + 1000000000 + + + + + McuSDSRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSDSRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSDSRCClk/McuClockName + CLK_SDSRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSDSRCClk/McuClockSelection + PLL5VCOD2_DIV2_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSDSRCClk/McuClockValue + 800000000 + + + + + McuSD0HClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk/McuClockName + CLK_SD0H + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk/McuClockSelection + CLK_SDSRC_DIV1_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk/McuClockValue + 800000000 + + + + + McuSD0Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk/McuClockName + CLK_SD0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk/McuClockSelection + CLK_SD0H_DIV4_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk/McuClockValue + 200000000 + + + + + McuRPCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk/McuClockName + CLK_RPC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk/McuClockSelection + PLL5VCOD5_DIV2_ID_17 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk/McuClockValue + 320000000 + + + + + McuRPCD2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCD2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCD2Clk/McuClockName + CLK_RPCD2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCD2Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCD2Clk/McuClockValue + 160000000 + + + + + McuMSOClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk/McuClockName + CLK_MSO + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk/McuClockDivider + 5 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk/McuClockValue + 133333333.3 + + + + + McuCANFDClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk/McuClockName + CLK_CANFD + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk/McuClockDivider + 9 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk/McuClockValue + 80000000 + + + + + McuCSIClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk/McuClockName + CLK_CSI + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk/McuClockDivider + 31 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk/McuClockValue + 25000000 + + + + + McuPOSTClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk/McuClockName + CLK_POST + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk/McuClockDivider + 11 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk/McuClockValue + 66666666.7 + + + + + McuPOST2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk/McuClockName + CLK_POST2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk/McuClockDivider + 5 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk/McuClockValue + 133333333.3 + + + + + McuPOST3Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk/McuClockName + CLK_POST3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk/McuClockDivider + 11 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk/McuClockValue + 66666666.7 + + + + + McuPOST4Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk/McuClockName + CLK_POST4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk/McuClockDivider + 11 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk/McuClockValue + 66666666.7 + + + + + McuDSIEXTClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk/McuClockName + CLK_DSIEXT + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk/McuClockValue + 800000000 + + + + + McuSASYNCRTClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk/McuClockName + CLK_SASYNCRT + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk/McuClockValue + 16666667 + + + + + McuSASYNCPERD1Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD1Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD1Clk/McuClockName + CLK_SASYNCPERD1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD1Clk/McuClockValue + 266666667 + + + + + McuSASYNCPERD2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD2Clk/McuClockName + CLK_SASYNCPERD2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD2Clk/McuClockValue + 133333333 + + + + + McuSASYNCPERD4Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD4Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD4Clk/McuClockName + CLK_SASYNCPERD4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD4Clk/McuClockValue + 66666667 + + + + + McuZXClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZXClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZXClk/McuClockName + CLK_ZX + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZXClk/McuClockValue + 800000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZXClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + + + McuSVVIPClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVVIPClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVVIPClk/McuClockName + CLK_SV_VIP + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVVIPClk/McuClockValue + 640000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVVIPClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + + + McuSVIRClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVIRClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVIRClk/McuClockName + CLK_SV_IR + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVIRClk/McuClockValue + 640000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVIRClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + + + McuS0HSCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0HSCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0HSCClk/McuClockName + CLK_S0_HSC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0HSCClk/McuClockValue + 800000000 + + + + + McuS0VCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VCClk/McuClockName + CLK_S0_VC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VCClk/McuClockValue + 800000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VCClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + + + McuS0VIOClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VIOClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VIOClk/McuClockName + CLK_S0_VIO + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VIOClk/McuClockValue + 800000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VIOClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + + + McuVCBUSClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCBUSClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCBUSClk/McuClockName + CLK_VC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCBUSClk/McuClockValue + 533330000 + + + + + McuVIOBUSClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOBUSClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOBUSClk/McuClockName + CLK_VIO + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOBUSClk/McuClockValue + 533330000 + + + + + McuRCLKClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk/McuClockName + CLK_RCLK + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk/McuClockSelection + CLK_OCO + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk/McuClockValue + 32800 + + + + + McuZC0Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk/McuClockName + CLK_ZC0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk/McuClockValue + 1000000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + + + McuZC1Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk/McuClockValue + 1000000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk/McuClockName + CLK_ZC1 + + + + + McuZC3Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk/McuClockName + CLK_ZC3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk/McuClockValue + 1000000000 + + + + + McuZDClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZDClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZDClk/McuClockName + CLK_ZD + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZDClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZDClk/McuClockValue + 800000000 + + + + + McuZC2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk/McuClockName + CLK_ZC2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk/McuClockValue + 1000000000 + + + + + McuIMPAD1Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD1Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD1Clk/McuClockName + CLK_IMPAD1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD1Clk/McuClockValue + 800000000 + + + + + McuIMPBClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBClk/McuClockName + CLK_IMPB + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBClk/McuClockValue + 800000000 + + + + + McuIMPAD4Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD4Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD4Clk/McuClockName + CLK_IMPAD4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD4Clk/McuClockValue + 200000000 + + + + + McuADGHClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuADGHClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuADGHClk/McuClockName + CLK_ADGH + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuADGHClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuADGHClk/McuClockValue + 80000000 + + + + + McuFRAYClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk/McuClockName + CLK_FRAY + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk/McuClockDivider + 9 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk/McuClockValue + 80000000 + + + + + McuIMPASRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPASRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPASRCClk/McuClockName + CLK_IMPASRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPASRCClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPASRCClk/McuClockValue + 800000000 + + + + + McuIMPBSRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBSRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBSRCClk/McuClockName + CLK_IMPBSRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBSRCClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBSRCClk/McuClockValue + 800000000 + + + + + McuVCSRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCSRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCSRCClk/McuClockName + CLK_VCSRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCSRCClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCSRCClk/McuClockValue + 533333333 + + + + + McuVIOSRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOSRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOSRCClk/McuClockName + CLK_VIOSRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOSRCClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOSRCClk/McuClockValue + 533333333 + + + + + + + McuPllClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuMainOsc + CLOCK_FREQUENCY_20_MHZ + + + + + McuPll1ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllFrequency + 3200000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3IR + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll3ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuMultiplicationRatio + 71 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuFreqDitherMode + FRACTIONAL_FIXED_FREQUENCY_MODE_ID_4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuFractionalMultiplication + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllFrequency + 2880000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll4ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuMultiplicationRatio + 99 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuFreqDitherMode + FRACTIONAL_FIXED_FREQUENCY_MODE_ID_4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuDownSpreadModuleDepth + SSDEPT_VALUE_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuFractionalMultiplication + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuSSCGModulationFreq + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllFrequency + 4000000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll5ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllFrequency + 3200000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll6ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuMultiplicationRatio + 69 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuFreqDitherMode + DITHERED_FREQUENCY_MODE_DOWN_ID_6 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuDownSpreadModuleDepth + SSDEPT_VALUE_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuFractionalMultiplication + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuSSCGModulationFreq + 6 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllFrequency + 2800000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll7ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllFrequency + 2000000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3IR + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll2ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuMultiplicationRatio + 99 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuFreqDitherMode + FRACTIONAL_FIXED_FREQUENCY_MODE_ID_4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuDownSpreadModuleDepth + SSDEPT_VALUE_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuFractionalMultiplication + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuSSCGModulationFreq + 4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllFrequency + 4000000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + + + + + + + McuClockReferencePoint + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency + 0 + + + + + McuModuleClockSupplySetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPPSCClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPDMAC0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMP1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMP0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSPMCClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPCNNClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuISP0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuUMFL0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSMPS0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSMPO0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuRGXClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuADGClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSPMIClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPSLVClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPDTAClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPDMAC1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAVB2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAVB1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAVB0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCSITOP0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCANFDClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuDSITXLINK0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuDOC2CHClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuDIS0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCSITOP1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMS1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMS0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMR1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMR0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFRAY00ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFCPVD0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFCPCSClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPWMClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI5ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI4ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIVCP1EClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuISPCS1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuISPCS0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuINTTPClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN01ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN00ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTPU0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVSPD0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN17ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN16ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN15ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN14ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN13ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN12ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN11ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN10ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN07ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN06ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN05ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN04ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN03ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN02ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPFC2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPFC1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVSPX0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFCPVX0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMTIClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCSBRGIRA2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCSBRGIRA3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTSNClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCVE3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCVE2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCVE1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCVE0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFCPRCClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSSIClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSSIUClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuADVFSCClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCR0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuINTAPClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuI2C3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuI2C2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuI2C1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuI2C0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuHSCIF3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuHSCIF2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuHSCIF1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuHSCIF0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuRTDM1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuRTDM0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuRPCClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPCIE0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIRQCClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU4ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSYDM2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSYDM1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSDHI0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSCIF4ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSCIF3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSCIF1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSCIF0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuUCMTClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPFC0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCMT3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCMT2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCMT1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCMT0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWDTClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWCRC3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWCRC2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWCRC1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWCRC0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuKCRC4ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFSOClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCRC3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCRC2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCRC1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCRC0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuKCRC7ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuKCRC6ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuKCRC5ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACCWrapperClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC4ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC5ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC6ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC7ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPAPDEBUGClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTSCClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVDSP1MSTPCR28b30ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVDSP0MSTPCR28b21ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPAPSDMACClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPAPTOPClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPAPBUSClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVDSP1MSTPCR28b02ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVDSP0MSTPCR28b01ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuDDR1DDR0ClockSupplyEnable + true + + + + + + + McuDemEventParameterRefs + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuDemEventParameterRefs + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuDemEventParameterRefs/MCU_E_CLOCK_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuDemEventParameterRefs/MCU_E_MODE_TRANSITION_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001 + + + + + McuRamSectorSettingConf + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamDefaultValue + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionBaseAddress + 3861905408 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionSize + 512 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionWriteSize + 4 + + + + + McuRamSectorSettingConf_001 + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamDefaultValue + 1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionBaseAddress + 3944742912 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionSize + 512 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionWriteSize + 4 + + + + + McuRamSectorSettingConf_002 + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamDefaultValue + 2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionBaseAddress + 3794796544 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionSize + 512 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuRamSectorSettingConf/McuRamSectionWriteSize + 4 + + + + + McuClockSettingConfig_001 + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockSettingId + 1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockStabilityWaitingTime + 0.0001 + + + + + McuSystemClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuSystemClockSetting + + + McuCpuMainSysClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuSystemClockSetting/McuCpuMainSysClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuSystemClockSetting/McuCpuMainSysClk/McuClockName + CLK_CPU + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuSystemClockSetting/McuCpuMainSysClk/McuClockValue + 1400000000 + + + + + + + McuModuleClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting + + + McuDebugTracePortClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTracePortClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTracePortClk/McuClockName + CLK_ZTR + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTracePortClk/McuClockSelection + PLL1CLK_DIV3_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTracePortClk/McuClockValue + 533333333.3 + + + + + McuDebugTraceBusClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTraceBusClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTraceBusClk/McuClockName + CLK_ZT + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTraceBusClk/McuClockSelection + PLL1CLK_DIV3_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugTraceBusClk/McuClockValue + 533333333.3 + + + + + McuDebugClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugClk/McuClockName + CLK_ZS + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugClk/McuClockSelection + PLL1CLK_DIV6_ID_3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDebugClk/McuClockValue + 266666666.7 + + + + + McuZR0Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR0Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR0Clk/McuClockName + CLK_CPU + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR0Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR0Clk/McuClockValue + 1400000000 + + + + + McuZR1Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk/McuClockName + CLK_CPU + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR1Clk/McuClockValue + 1400000000 + + + + + McuZR2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk/McuClockName + CLK_CPU + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZR2Clk/McuClockValue + 1400000000 + + + + + McuZB3Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZB3Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZB3Clk/McuClockName + CLK_ZB3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZB3Clk/McuClockSelection + PLL3VCO_DIV2_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZB3Clk/McuClockValue + 720000000 + + + + + McuZGClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk/McuClockName + CLK_ZG + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk/McuClockDivider + 16 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZGClk/McuClockValue + 1000000000 + + + + + McuSDSRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSDSRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSDSRCClk/McuClockName + CLK_SDSRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSDSRCClk/McuClockSelection + PLL5VCOD2_DIV2_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSDSRCClk/McuClockValue + 800000000 + + + + + McuSD0HClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk/McuClockName + CLK_SD0H + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk/McuClockSelection + CLK_SDSRC_DIV1_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0HClk/McuClockValue + 800000000 + + + + + McuSD0Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk/McuClockName + CLK_SD0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk/McuClockSelection + CLK_SD0H_DIV4_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSD0Clk/McuClockValue + 200000000 + + + + + McuRPCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk/McuClockName + CLK_RPC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk/McuClockSelection + PLL5VCOD5_DIV2_ID_17 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCClk/McuClockValue + 320000000 + + + + + McuRPCD2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCD2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCD2Clk/McuClockName + CLK_RPCD2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCD2Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRPCD2Clk/McuClockValue + 160000000 + + + + + McuMSOClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk/McuClockName + CLK_MSO + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk/McuClockDivider + 5 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk/McuClockValue + 133333333.3 + + + + + McuCANFDClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk/McuClockName + CLK_CANFD + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk/McuClockDivider + 9 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCANFDClk/McuClockValue + 80000000 + + + + + McuCSIClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk/McuClockName + CLK_CSI + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk/McuClockDivider + 31 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuCSIClk/McuClockValue + 25000000 + + + + + McuPOSTClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk/McuClockName + CLK_POST + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk/McuClockDivider + 11 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOSTClk/McuClockValue + 66666666.7 + + + + + McuPOST2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk/McuClockName + CLK_POST2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk/McuClockDivider + 5 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST2Clk/McuClockValue + 133333333.3 + + + + + McuPOST3Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk/McuClockName + CLK_POST3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk/McuClockDivider + 11 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST3Clk/McuClockValue + 66666666.7 + + + + + McuPOST4Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk/McuClockName + CLK_POST4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk/McuClockDivider + 11 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuPOST4Clk/McuClockValue + 66666666.7 + + + + + McuDSIEXTClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk/McuClockName + CLK_DSIEXT + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk/McuClockDivider + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuDSIEXTClk/McuClockValue + 800000000 + + + + + McuSASYNCRTClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk/McuClockName + CLK_SASYNCRT + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCRTClk/McuClockValue + 16666667 + + + + + McuSASYNCPERD1Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD1Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD1Clk/McuClockName + CLK_SASYNCPERD1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD1Clk/McuClockValue + 266666667 + + + + + McuSASYNCPERD2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD2Clk/McuClockName + CLK_SASYNCPERD2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD2Clk/McuClockValue + 133333333 + + + + + McuSASYNCPERD4Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD4Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD4Clk/McuClockName + CLK_SASYNCPERD4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSASYNCPERD4Clk/McuClockValue + 66666667 + + + + + McuZXClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZXClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZXClk/McuClockName + CLK_ZX + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZXClk/McuClockValue + 800000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZXClk/McuClockCtrlSel + STOP_ID_1 + + + + + McuSVVIPClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVVIPClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVVIPClk/McuClockName + CLK_SV_VIP + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVVIPClk/McuClockValue + 640000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVVIPClk/McuClockCtrlSel + STOP_ID_1 + + + + + McuSVIRClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVIRClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVIRClk/McuClockName + CLK_SV_IR + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVIRClk/McuClockValue + 640000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuSVIRClk/McuClockCtrlSel + STOP_ID_1 + + + + + McuS0HSCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0HSCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0HSCClk/McuClockName + CLK_S0_HSC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0HSCClk/McuClockValue + 800000000 + + + + + McuS0VCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VCClk/McuClockName + CLK_S0_VC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VCClk/McuClockValue + 800000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VCClk/McuClockCtrlSel + STOP_ID_1 + + + + + McuS0VIOClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VIOClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VIOClk/McuClockName + CLK_S0_VIO + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VIOClk/McuClockValue + 800000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuS0VIOClk/McuClockCtrlSel + STOP_ID_1 + + + + + McuVCBUSClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCBUSClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCBUSClk/McuClockName + CLK_VC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCBUSClk/McuClockValue + 533330000 + + + + + McuVIOBUSClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOBUSClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOBUSClk/McuClockName + CLK_VIO + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOBUSClk/McuClockValue + 533330000 + + + + + McuRCLKClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk/McuClockName + CLK_RCLK + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk/McuClockSelection + CLK_OCO + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk/McuClockValue + 32800 + + + + + McuZC0Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk/McuClockName + CLK_ZC0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk/McuClockDivider + 16 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk/McuClockValue + 1000000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC0Clk/McuClockCtrlSel + STOP_ID_1 + + + + + McuZC1Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk/McuClockDivider + 16 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk/McuClockValue + 1000000000 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC1Clk/McuClockName + CLK_ZC1 + + + + + McuZC3Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk/McuClockName + CLK_ZC3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk/McuClockDivider + 16 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC3Clk/McuClockValue + 1000000000 + + + + + McuZDClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZDClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZDClk/McuClockName + CLK_ZD + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZDClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZDClk/McuClockValue + 800000000 + + + + + McuZC2Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk/McuClockName + CLK_ZC2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk/McuClockDivider + 16 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuZC2Clk/McuClockValue + 1000000000 + + + + + McuIMPAD1Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD1Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD1Clk/McuClockName + CLK_IMPAD1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD1Clk/McuClockValue + 800000000 + + + + + McuIMPBClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBClk/McuClockName + CLK_IMPB + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBClk/McuClockValue + 800000000 + + + + + McuIMPAD4Clk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD4Clk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD4Clk/McuClockName + CLK_IMPAD4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPAD4Clk/McuClockValue + 200000000 + + + + + McuADGHClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuADGHClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuADGHClk/McuClockName + CLK_ADGH + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuADGHClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuADGHClk/McuClockValue + 80000000 + + + + + McuFRAYClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk/McuClockName + CLK_FRAY + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk/McuClockDivider + 9 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuFRAYClk/McuClockValue + 80000000 + + + + + McuIMPASRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPASRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPASRCClk/McuClockName + CLK_IMPASRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPASRCClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPASRCClk/McuClockValue + 800000000 + + + + + McuIMPBSRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBSRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBSRCClk/McuClockName + CLK_IMPBSRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBSRCClk/McuClockCtrlSel + ACTIVATE_ID_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuIMPBSRCClk/McuClockValue + 800000000 + + + + + McuVCSRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCSRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCSRCClk/McuClockName + CLK_VCSRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCSRCClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVCSRCClk/McuClockValue + 533333333 + + + + + McuVIOSRCClk + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOSRCClk + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOSRCClk/McuClockName + CLK_VIOSRC + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOSRCClk/McuClockCtrlSel + STOP_ID_1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuVIOSRCClk/McuClockValue + 533333333 + + + + + + + McuPllClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuMainOsc + CLOCK_FREQUENCY_20_MHZ + + + + + McuPll1ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllFrequency + 3200000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3IR + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll1ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + true + + + + + + + McuPll3ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuMultiplicationRatio + 71 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuFreqDitherMode + FRACTIONAL_FIXED_FREQUENCY_MODE_ID_4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuFractionalMultiplication + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllFrequency + 2880000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll3ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll4ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuMultiplicationRatio + 99 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuFreqDitherMode + FRACTIONAL_FIXED_FREQUENCY_MODE_ID_4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuDownSpreadModuleDepth + SSDEPT_VALUE_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuFractionalMultiplication + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuSSCGModulationFreq + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllFrequency + 4000000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll4ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll5ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllFrequency + 3200000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll5ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll6ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuMultiplicationRatio + 69 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuFreqDitherMode + DITHERED_FREQUENCY_MODE_DOWN_ID_6 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuDownSpreadModuleDepth + SSDEPT_VALUE_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuFractionalMultiplication + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuSSCGModulationFreq + 6 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllFrequency + 2800000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll6ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + false + + + + + + + McuPll7ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllFrequency + 2000000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3IR + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA2E0D1 + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll7ClockSetting/McuPllStopConditions/McuPllStopByA2E0D0 + true + + + + + + + McuPll2ClockSetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllCircuitEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuMultiplicationRatio + 99 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuFreqDitherMode + FRACTIONAL_FIXED_FREQUENCY_MODE_ID_4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuDownSpreadModuleDepth + SSDEPT_VALUE_0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuFractionalMultiplication + 0 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuSSCGModulationFreq + 4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllFrequency + 4000000000 + + + + + McuPllStopConditions + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3IR + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopBy3DGB + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3ISP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3ISP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3DUL + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3VIP0 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3VIP1 + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuPllClockSetting/McuPll2ClockSetting/McuPllStopConditions/McuPllStopByA3VIP2 + false + + + + + + + + + McuClockReferencePoint + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency + 0 + + + + + McuModuleClockSupplySetting + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPPSCClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPDMAC0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMP1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMP0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSPMCClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPCNNClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuISP0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuUMFL0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSMPS0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSMPO0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuRGXClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuADGClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSPMIClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPSLVClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPDTAClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMPDMAC1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAVB2ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAVB1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAVB0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCSITOP0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCANFDClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuDSITXLINK0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuDOC2CHClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuDIS0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCSITOP1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMS1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMS0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMR1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIMR0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFRAY00ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFCPVD0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFCPCSClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPWMClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI5ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI4ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIVCP1EClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuISPCS1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuISPCS0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuINTTPClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN01ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN00ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTPU0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVSPD0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN17ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN16ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN15ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN14ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN13ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN12ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN11ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN10ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN07ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN06ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN05ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN04ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN03ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVIN02ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPFC2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPFC1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVSPX0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFCPVX0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMTIClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCSBRGIRA2ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCSBRGIRA3ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTSNClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCVE3ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCVE2ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCVE1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCVE0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFCPRCClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSSIClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSSIUClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuADVFSCClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCR0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuINTAPClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuI2C3ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuI2C2ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuI2C1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuI2C0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuHSCIF3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuHSCIF2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuHSCIF1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuHSCIF0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuRTDM1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuRTDM0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuRPCClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPCIE0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI3ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI2ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuMSI0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuIRQCClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU4ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTMU0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSYDM2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSYDM1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSDHI0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSCIF4ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSCIF3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSCIF1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuSCIF0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuUCMTClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPFC0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCMT3ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCMT2ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCMT1ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCMT0ClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWDTClockSupplyEnable + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWCRC3ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWCRC2ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWCRC1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuWCRC0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuKCRC4ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuFSOClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCRC3ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCRC2ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCRC1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuCRC0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuKCRC7ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuKCRC6ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuKCRC5ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACCWrapperClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC0ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC1ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC2ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC3ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC4ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC5ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC6ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuAESACC7ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPAPDEBUGClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuTSCClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVDSP1MSTPCR28b30ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVDSP0MSTPCR28b21ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPAPSDMACClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPAPTOPClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuPAPBUSClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVDSP1MSTPCR28b02ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuVDSP0MSTPCR28b01ClockSupplyEnable + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSupplySetting/McuDDR1DDR0ClockSupplyEnable + true + + + + + + + McuModeSettingConf_001 + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode + 1 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuModeType + MCU_SLEEP_MODE + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuC4PowerOn + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuPSOWakeUpFactor + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuTimeOutC4ModeChange + 1400000 + + + + + McuModeSettingConf_002 + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode + 2 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuModeType + MCU_CORE_POWER_DOWN_MODE + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuPSOWakeUpFactor + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuC4PowerOn + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuTimeOutC4ModeChange + 1400000 + + + + + McuModeSettingConf_003 + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuPSOWakeUpFactor + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuC4PowerOn + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode + 3 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuModeType + MCU_C4_LOW_POWER_MODE + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuTimeOutC4ModeChange + 1400000 + + + + + McuModeSettingConf_004 + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuPSOWakeUpFactor + false + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuC4PowerOn + true + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode + 4 + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuModeType + MCU_C4_LOW_POWER_MODE + + + /Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration/McuModeSettingConf/McuTimeOutC4ModeChange + 1400000 + + + + + + + McuPublishedInformation + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation + + + McuResetReasonConf + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuResetReasonConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuResetReasonConf/McuResetReason + 0 + + + + + McuPowerOnResetConf + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuPowerOnResetConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuPowerOnResetConf/McuResetReason + 0 + + + + + McuSWDTResetConf + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuSWDTResetConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuSWDTResetConf/McuResetReason + 2 + + + + + McuRWDTResetConf + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuRWDTResetConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuRWDTResetConf/McuResetReason + 1 + + + + + McuMultiResetConf + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuMultiResetConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuMultiResetConf/McuResetReason + 5 + + + + + McuResetUndefinedConf + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuResetUndefinedConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuResetUndefinedConf/McuResetReason + 7 + + + + + McuNoneResetConf + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuNoneResetConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuNoneResetConf/McuResetReason + 6 + + + + + McuSwResetConf + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuSwResetConf + + + /Renesas/EcucDefs_Mcu/Mcu/McuPublishedInformation/McuSwResetConf/McuResetReason + 3 + + + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_PORT_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_PORT_V4M_Sample.arxml new file mode 100644 index 0000000..6d4a74c --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_PORT_V4M_Sample.arxml @@ -0,0 +1,2815 @@ + + + + + ActiveEcuC + + + Port + + + + false + + + + /Renesas/EcucDefs_Port/Port + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Port/Port_Impl + + + PortGeneral + /Renesas/EcucDefs_Port/Port/PortGeneral + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortCriticalSectionProtection + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortDevErrorDetect + false + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortDeviceName + V4M + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortMaxMode + 5 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinDefaultDirectionApi + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinDirectionApi + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinModeApi + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortSetToDioAltModeApi + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortVersionInfoApi + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveControl + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveSelection + MFISLCKR0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveTimeout + 256410 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortFUSEMonitoringApi + true + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortOTPMON0ExpectedValue + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortOTPMON3ExpectedValue + 0 + + + /Renesas/EcucDefs_Port/Port/PortGeneral/PortUnintendedModuleStopCheck + true + + + + + PortConfigSet + /Renesas/EcucDefs_Port/Port/PortConfigSet + + + PortContainer + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortNumberOfPortPins + 1 + + + + + PortPin + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinId + 1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinInitialMode + PORT_PIN_MODE_DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinMode + PORT_PIN_MODE_DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinModeChangeable + false + + + + + + + PortFilterGroupConfig + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig + + + PortChatteringFilterGroup0 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup0 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup0/PortFilterClockFrequency + 0 + + + + + PortChatteringFilterInput1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup0/PortChatteringFilterInput1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup0/PortChatteringFilterInput1/PortChatteringFilterInputOption + true + + + + + + + PortChatteringFilterGroup1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortFilterClockFrequency + 0 + + + + + PortChatteringFilterInput1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput1/PortChatteringFilterInputOption + true + + + + + + + PortChatteringFilterGroup2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup2/PortFilterClockFrequency + 0 + + + + + PortChatteringFilterInput1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup2/PortChatteringFilterInput1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup2/PortChatteringFilterInput1/PortChatteringFilterInputOption + true + + + + + + + PortChatteringFilterGroup3 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup3 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup3/PortFilterClockFrequency + 0 + + + + + PortChatteringFilterInput1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup3/PortChatteringFilterInput1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup3/PortChatteringFilterInput1/PortChatteringFilterInputOption + true + + + + + + + PortChatteringFilterGroup4 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup4 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup4/PortFilterClockFrequency + 0 + + + + + PortChatteringFilterInput1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup4/PortChatteringFilterInput1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup4/PortChatteringFilterInput1/PortChatteringFilterInputOption + true + + + + + + + PortChatteringFilterGroup5 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup5 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup5/PortFilterClockFrequency + 0 + + + + + PortChatteringFilterInput1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup5/PortChatteringFilterInput1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup5/PortChatteringFilterInput1/PortChatteringFilterInputOption + true + + + + + + + PortChatteringFilterGroup6 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup6 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup6/PortFilterClockFrequency + 0 + + + + + PortChatteringFilterInput1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup6/PortChatteringFilterInput1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup6/PortChatteringFilterInput1/PortChatteringFilterInputOption + true + + + + + + + PortChatteringFilterGroup7 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortFilterClockFrequency + 0 + + + + + PortChatteringFilterInput0 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput0 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput0/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput1/PortChatteringFilterInputOption + true + + + + + PortChatteringFilterInput2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput2/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput3 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput3 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput3/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput4 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput4 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput4/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput5 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput5 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput5/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput6 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput6 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput6/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput7 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput7 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput7/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput8 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput8 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput8/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput9 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput9 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput9/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput10 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput10 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput10/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput11 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput11 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput11/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput12 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput12 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput12/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput13 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput13 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput13/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput14 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput14 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput14/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput15 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput15 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput15/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput16 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput16 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput16/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput17 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput17 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput17/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput18 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput18 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput18/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput19 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput19 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput19/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput20 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput20 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput20/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput21 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput21 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput21/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput22 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput22 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput22/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput23 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput23 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput23/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput24 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput24 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput24/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput25 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput25 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput25/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput26 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput26 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput26/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput27 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput27 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput27/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput28 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput28 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput28/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput29 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput29 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput29/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput30 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput30 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput30/PortChatteringFilterInputOption + false + + + + + PortChatteringFilterInput31 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput31 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput31/PortChatteringFilterInputOption + false + + + + + + + + + PortGroup0 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0 + + + PortPin1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinDioAltModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinDirectionChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin1/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin14 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin14/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin15 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin15/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin16 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin16/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup0/PortPin2/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + + + PortGroup1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1 + + + PortPin1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinDioAltModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinDirectionChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin1/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin6 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin6/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin8 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin8/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin15 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin15/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin2/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + + + PortGroup2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2 + + + PortPin1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinDioAltModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinDirectionChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin1/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin9 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin9/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin10 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin10/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin12 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin12/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin13 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin13/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin17 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin17/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin2/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin3 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin3/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin4 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinInitialMode + RXDB_EXTFXR_ALT0_IN_GPSR2_BIT4_IP0SR2_BIT16 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup2/PortPin4/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + + + PortGroup3 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3 + + + PortPin1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinDioAltModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinDirectionChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin1/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin14 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinDirection + PORT_PIN_OUT + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinInitialMode + PWM2_ALT0_OUT_GPSR3_BIT14_IP1SR3_BIT24 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin14/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinLevelValue + PORT_PIN_LEVEL_HIGH + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup3/PortPin2/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + + + PortGroup4 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4 + + + PortPin1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinDioAltModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinDirectionChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin1/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin12 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin12/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin13 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin13/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin2/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin3 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup4/PortPin3/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + + + PortGroup5 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5 + + + PortPin1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinDioAltModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinDirectionChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin1/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin4 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin4/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin5 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin5/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup5/PortPin2/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + + + PortGroup6 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6 + + + PortPin1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinDioAltModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinDirectionChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin1/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin4 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin4/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin5 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin5/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinPullOption + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup6/PortPin2/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + + + PortGroup7 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7 + + + PortPin1 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinDioAltModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinDirectionChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinPullControl + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin1/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin5 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin5/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin6 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinModeChangeable + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin6/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + PortPin2 + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2 + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinDioAltModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinDirection + PORT_PIN_IN + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinDirectionChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinInitialMode + DIO + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinLevelValue + PORT_PIN_LEVEL_LOW + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinModeChangeable + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinPullOption + true + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinPullControl + false + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinPolaritySelect + PORT_PIN_POSITIVE_LOGIC + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinSensitiveInterrupt + PORT_PIN_LEVEL_SENSITIVE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinDetectionInterrupt + PORT_PIN_ONE_EDGE + + + /Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup7/PortPin2/PortPinOutDataSelect + PORT_PIN_OUTDT + + + + + + + + + PortDemEventParameterRefs + /Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs + + + /Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_FUSE_MONITORING_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter + + + /Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_UNINTENDED_MODULE_STOP_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001 + + + /Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_GET_CONTROL_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_002 + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_SPI_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_SPI_V4M_Sample.arxml new file mode 100644 index 0000000..8dafb7a --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_SPI_V4M_Sample.arxml @@ -0,0 +1,682 @@ + + + + + ActiveEcuC + + + Spi + /Renesas/EcucDefs_Spi/Spi + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Spi/Spi_Impl + + + SpiDemEventParameterRefs + /Renesas/EcucDefs_Spi/Spi/SpiDemEventParameterRefs + + + /Renesas/EcucDefs_Spi/Spi/SpiDemEventParameterRefs/SPI_E_DATA_TX_TIMEOUT_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter + + + /Renesas/EcucDefs_Spi/Spi/SpiDemEventParameterRefs/SPI_E_HARDWARE_ERROR + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001 + + + /Renesas/EcucDefs_Spi/Spi/SpiDemEventParameterRefs/SPI_E_INTERRUPT_CONTROLLER_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_003 + + + /Renesas/EcucDefs_Spi/Spi/SpiDemEventParameterRefs/SPI_E_WRITE_VERIFY_FAILURE + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_004 + + + + + SpiDriver + /Renesas/EcucDefs_Spi/Spi/SpiDriver + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiMaxChannel + 2 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiMaxJob + 3 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiMaxSequence + 3 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiClockFrequencyRefImmediateValue + 20000000 + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiClockFrequencyRef + /ActiveEcuC/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuMSOClk + + + + + SpiChannel + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiChannelId + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiChannelType + EB + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiDataWidth + 16 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiDefaultData + 170 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiEbMaxLength + 128 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiIbNBuffers + 1 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiTransferStart + MSB + + + + + SpiChannel_001 + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiChannelId + 1 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiChannelType + IB + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiDataWidth + 16 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiDefaultData + 185 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiEbMaxLength + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiIbNBuffers + 64 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiChannel/SpiTransferStart + MSB + + + + + SpiExternalDevice + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiBaudrate + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiBaudrateConfiguration + 31 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsHoldTiming + FRAME_SYNC_SIGNAL_DELAY_1 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsIdentifier + NULL + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsPolarity + LOW + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsSelection + CS_VIA_PERIPHERAL_ENGINE + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsSetupTime + DATA_PIN_BIT_DELAY_2 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiDataShiftEdge + LEADING + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiEnableCs + true + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiHwUnit + MSIOF1 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiInputClockSelect + MSO_PERE_WCLK_DIVBY_32 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiMasterMode + true + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiOutputControlSelect + HIGH + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiShiftClockIdleLevel + LOW + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiTimeClk2Cs + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiClk2CsCount + 0 + + + + + SpiExternalDevice_001 + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiBaudrate + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiBaudrateConfiguration + 31 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsHoldTiming + FRAME_SYNC_SIGNAL_DELAY_1 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsIdentifier + NULL + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsPolarity + LOW + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsSelection + CS_VIA_PERIPHERAL_ENGINE + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsSetupTime + DATA_PIN_BIT_DELAY_2 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiDataShiftEdge + LEADING + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiEnableCs + true + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiHwUnit + MSIOF2 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiInputClockSelect + MSO_PERE_WCLK_DIVBY_32 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiMasterMode + false + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiOutputControlSelect + HIGH + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiShiftClockIdleLevel + LOW + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiTimeClk2Cs + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiClk2CsCount + 0 + + + + + SpiJob + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobEndNotification + SpiJob0Notification + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobId + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobPriority + 3 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiPortPinSelect + SYNC + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiDeviceAssignment + /ActiveEcuC/Spi/SpiDriver/SpiExternalDevice + + + + + SpiChannelList + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList/SpiChannelIndex + 0 + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList/SpiChannelAssignment + /ActiveEcuC/Spi/SpiDriver/SpiChannel + + + + + + + SpiJob_001 + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobEndNotification + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobId + 1 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobPriority + 3 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiPortPinSelect + SYNC + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiDeviceAssignment + /ActiveEcuC/Spi/SpiDriver/SpiExternalDevice_001 + + + + + SpiChannelList + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList/SpiChannelIndex + 0 + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList/SpiChannelAssignment + /ActiveEcuC/Spi/SpiDriver/SpiChannel_001 + + + + + + + SpiSequence + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiInterruptibleSequence + true + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiSeqEndNotification + SpiSequence0EndNotification + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiSeqStartNotification + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiSequenceId + 0 + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiJobAssignment + /ActiveEcuC/Spi/SpiDriver/SpiJob + + + + + SpiSequence_001 + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiInterruptibleSequence + false + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiSeqEndNotification + SpiSequence0EndNotification + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiSeqStartNotification + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiSequenceId + 1 + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiJobAssignment + /ActiveEcuC/Spi/SpiDriver/SpiJob_001 + + + + + SpiJob_002 + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobEndNotification + SpiJob0Notification + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobId + 2 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiJobPriority + 3 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiPortPinSelect + SYNC + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiDeviceAssignment + /ActiveEcuC/Spi/SpiDriver/SpiExternalDevice_002 + + + + + SpiChannelList + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList/SpiChannelIndex + 0 + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiJob/SpiChannelList/SpiChannelAssignment + /ActiveEcuC/Spi/SpiDriver/SpiChannel + + + + + + + SpiSequence_002 + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiInterruptibleSequence + true + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiSequenceId + 2 + + + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiSequence/SpiJobAssignment + /ActiveEcuC/Spi/SpiDriver/SpiJob_002 + + + + + SpiExternalDevice_002 + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiBaudrate + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiBaudrateConfiguration + 31 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsHoldTiming + FRAME_SYNC_SIGNAL_DELAY_1 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsIdentifier + NULL + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsPolarity + LOW + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsSelection + CS_VIA_PERIPHERAL_ENGINE + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiCsSetupTime + DATA_PIN_BIT_DELAY_2 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiDataShiftEdge + LEADING + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiEnableCs + true + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiHwUnit + MSIOF1 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiInputClockSelect + MSO_PERE_WCLK_DIVBY_32 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiMasterMode + true + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiOutputControlSelect + HIGH + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiShiftClockIdleLevel + LOW + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiTimeClk2Cs + 0 + + + /Renesas/EcucDefs_Spi/Spi/SpiDriver/SpiExternalDevice/SpiClk2CsCount + 0 + + + + + + + SpiGeneral + /Renesas/EcucDefs_Spi/Spi/SpiGeneral + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiAlreadyInitDetCheck + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiCancelApi + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiChannelBuffersAllowed + 2 + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiCriticalSectionProtection + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiDevErrorDetect + false + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiDeviceName + V4M + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiDmaMode + false + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiEnableClkImmediateValue + false + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiEnablePersistentHwConfiguration + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiEnableSeqStartNotification + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiEnableSyncSeqEndNotification + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiForceCancelApi + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiHwStatusApi + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiInterruptibleSeqAllowed + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiIsrCategory + CAT1 + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiLevelDelivered + 2 + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiMainFunctionPeriod + 0.001 + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiSupportConcurrentAsyncTransmit + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiSupportConcurrentSyncTransmit + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiTimeoutWaitingTime + 1000000 + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiUserCallbackHeaderFile + App_SPI_Cbk.h + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiVersionInfoApi + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiDmaRedundancyCheck + false + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiUnintendedInterruptCheck + true + + + /Renesas/EcucDefs_Spi/Spi/SpiGeneral/SpiWriteVerifyCheck + true + + + + + SpiPublishedInformation + /Renesas/EcucDefs_Spi/Spi/SpiPublishedInformation + + + /Renesas/EcucDefs_Spi/Spi/SpiPublishedInformation/SpiMaxHwUnit + 6 + + + + + + + + + diff --git a/2_Branches/HKL_V4M/Arxml/EVB/App_WDG_V4M_Sample.arxml b/2_Branches/HKL_V4M/Arxml/EVB/App_WDG_V4M_Sample.arxml new file mode 100644 index 0000000..026caee --- /dev/null +++ b/2_Branches/HKL_V4M/Arxml/EVB/App_WDG_V4M_Sample.arxml @@ -0,0 +1,163 @@ + + + + + ActiveEcuC + + + Wdg + + + + false + + + + /Renesas/EcucDefs_Wdg/Wdg + VARIANT-POST-BUILD + /Renesas/BswModuleDescriptions_Wdg/Wdg_Impl + + + WdgGeneral + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgDevErrorDetect + false + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgDisableAllowed + true + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgIndex + 0 + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgInitialTimeout + 1 + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgMaxTimeout + 63 + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgRunArea + RAM + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgVersionInfoApi + true + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgCriticalSectionProtection + true + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgVersionCheckExternalModules + true + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgDeviceName + V4M + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgTimeMargin + 10 + + + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGeneral/WdgClockRef + /ActiveEcuC/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuModuleClockSetting/McuRCLKClk + + + + + WdgPublishedInformation + /Renesas/EcucDefs_Wdg/Wdg/WdgPublishedInformation + + + /Renesas/EcucDefs_Wdg/Wdg/WdgPublishedInformation/WdgTriggerMode + WDG_TOGGLE + + + + + WdgSettingsConfig_001 + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig + + + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig/WdgDefaultMode + WDGIF_SLOW_MODE + + + + + WdgSettingsFast + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig/WdgSettingsFast + + + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig/WdgSettingsFast/WdgClkSettingsFast + RCLK_DIVBY_1 + + + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig/WdgSettingsFast/WdgFastTriggerTimeout + 1800 + + + + + WdgSettingsOff + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig/WdgSettingsOff + + + WdgSettingsSlow + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig/WdgSettingsSlow + + + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig/WdgSettingsSlow/WdgClkSettingsSlow + RCLK_DIVBY_1024 + + + /Renesas/EcucDefs_Wdg/Wdg/WdgSettingsConfig/WdgSettingsSlow/WdgSlowTriggerTimeout + 1800 + + + + + + + WdgDemEventParameterRefs + /Renesas/EcucDefs_Wdg/Wdg/WdgDemEventParameterRefs + + + /Renesas/EcucDefs_Wdg/Wdg/WdgDemEventParameterRefs/WDG_E_WRITE_REGISTER_FAILED + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_005 + + + /Renesas/EcucDefs_Wdg/Wdg/WdgDemEventParameterRefs/WDG_E_MODE_FAILED + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_004 + + + /Renesas/EcucDefs_Wdg/Wdg/WdgDemEventParameterRefs/WDG_E_VALUE_COUNTER_FAILED + /ActiveEcuC/Dem/DemConfigSet/DemEventParameter_003 + + + + + WdgGptConfiguration + /Renesas/EcucDefs_Wdg/Wdg/WdgGptConfiguration + + + /Renesas/EcucDefs_Wdg/Wdg/WdgGptConfiguration/WdgGptContainerRef + /ActiveEcuC/Gpt/GptChannelConfigSet/GptChannelConfiguration_003 + + + + + + + + +