2729 lines
123 KiB
Plaintext
2729 lines
123 KiB
Plaintext
; --------------------------------------------------------------------------------
|
|
; @Title: TMPM067 On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: NEJ
|
|
; @Changelog: 2022-04-08 NEJ
|
|
; @Manufacturer: TOSHIBA - Toshiba
|
|
; @Doc: SVD generated, based on: M067.svd (Ver. 1.0)
|
|
; @Core: Cortex-M0
|
|
; @Chip: TMPM067FWQG
|
|
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: pertmpm067.per 14593 2022-04-08 10:55:11Z kwisniewski $
|
|
|
|
tree.close "Core Registers (Cortex-M0)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0x8
|
|
if (CORENAME()=="CORTEXM1")
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
else
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
endif
|
|
if (CORENAME()=="CORTEXM1")
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
|
|
bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
|
|
else
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
|
|
endif
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
|
|
hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
|
|
hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
|
|
group.long 0xd04++0x03
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
|
|
hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
group.long 0xd08++0x03
|
|
line.long 0x00 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
else
|
|
textline " "
|
|
endif
|
|
group.long 0xd0c++0x03
|
|
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
|
|
bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
|
|
bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
|
|
group.long 0xd10++0x03
|
|
line.long 0x00 "SCR,System Control Register"
|
|
bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
rgroup.long 0xd14++0x03
|
|
line.long 0x00 "CCR,Configuration and Control Register"
|
|
bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
|
|
bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
|
|
group.long 0xd1c++0x0b
|
|
line.long 0x00 "SHPR2,System Handler Priority Register 2"
|
|
bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
|
|
line.long 0x04 "SHPR3,System Handler Priority Register 3"
|
|
bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
|
|
bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
|
|
line.long 0x08 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
else
|
|
textline " "
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
autoindent.on center tree
|
|
tree "ADC (10-bit Analog/Digital Converter)"
|
|
base ad:0x400FC000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CLK,AD Conversion Clock Setting Register"
|
|
bitfld.long 0x00 6.--7. "ADCC,ADCC" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "ADCLK,ADCLK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MOD0,AD Mode Control Register 0"
|
|
rbitfld.long 0x00 7. "EOCFN,EOCFN" "0,1"
|
|
rbitfld.long 0x00 6. "ADBFN,ADBFN" "0,1"
|
|
bitfld.long 0x00 3.--4. "ITM,ITM" "0,1,2,3"
|
|
bitfld.long 0x00 2. "REPEAT,REPEAT" "0,1"
|
|
bitfld.long 0x00 1. "SCAN,SCAN" "0,1"
|
|
bitfld.long 0x00 0. "ADS,ADS" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MOD1,AD Mode Control Register 1"
|
|
bitfld.long 0x00 7. "VREFON,VREFON" "0,1"
|
|
bitfld.long 0x00 6. "I2AD,I2AD" "0,1"
|
|
bitfld.long 0x00 4.--5. "ADSCN,ADSCN" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "ADCH,ADCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "MOD2,AD Mode Control Register 2"
|
|
rbitfld.long 0x00 7. "EOCFHP,EOCFHP" "0,1"
|
|
rbitfld.long 0x00 6. "ADBFHP,ADBFHP" "0,1"
|
|
bitfld.long 0x00 5. "HPADCE,HPADCE" "0,1"
|
|
bitfld.long 0x00 0.--3. "HPADCH,HPADCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MOD3,AD Mode Control Register 3"
|
|
bitfld.long 0x00 5. "ADOBIC0,ADOBIC0" "0,1"
|
|
bitfld.long 0x00 1.--4. "ADREGS0,ADREGS0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. "ADOBSV0,ADOBSV0" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "MOD4,AD Mode Control Register 4"
|
|
bitfld.long 0x00 7. "HADHS,HADHS" "0,1"
|
|
bitfld.long 0x00 6. "HADHTG,HADHTG" "0,1"
|
|
bitfld.long 0x00 5. "ADHS,ADHS" "0,1"
|
|
bitfld.long 0x00 4. "ADHTG,ADHTG" "0,1"
|
|
bitfld.long 0x00 0.--1. "ADRST,ADRST" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MOD5,AD Mode Control Register 5"
|
|
bitfld.long 0x00 5. "ADOBIC1,ADOBIC1" "0,1"
|
|
bitfld.long 0x00 1.--4. "ADREGS1,ADREGS1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. "ADOBSV1,ADOBSV1" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "MOD6,AD Mode Control Register 6"
|
|
bitfld.long 0x00 3. "ADM1DMA,ADM1DMA" "0,1"
|
|
bitfld.long 0x00 2. "ADM0DMA,ADM0DMA" "0,1"
|
|
bitfld.long 0x00 1. "ADHPDMA,ADHPDMA" "0,1"
|
|
bitfld.long 0x00 0. "ADDMA,ADDMA" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "REG0,AD Conversion Result Register 0"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADR0,ADR0"
|
|
bitfld.long 0x00 1. "OVR0,OVR0" "0,1"
|
|
bitfld.long 0x00 0. "ADR0RF,ADR0RF" "0,1"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "REG1,AD Conversion Result Register 1"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADR1,ADR1"
|
|
bitfld.long 0x00 1. "OVR1,OVR1" "0,1"
|
|
bitfld.long 0x00 0. "ADR1RF,ADR1RF" "0,1"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "REG2,AD Conversion Result Register 2"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADR2,ADR2"
|
|
bitfld.long 0x00 1. "OVR2,OVR2" "0,1"
|
|
bitfld.long 0x00 0. "ADR2RF,ADR2RF" "0,1"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "REG3,AD Conversion Result Register 3"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADR3,ADR3"
|
|
bitfld.long 0x00 1. "OVR3,OVR3" "0,1"
|
|
bitfld.long 0x00 0. "ADR3RF,ADR3RF" "0,1"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "REG4,AD Conversion Result Register 4"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADR4,ADR4"
|
|
bitfld.long 0x00 1. "OVR4,OVR4" "0,1"
|
|
bitfld.long 0x00 0. "ADR4RF,ADR4RF" "0,1"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "REG5,AD Conversion Result Register 5"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADR5,ADR5"
|
|
bitfld.long 0x00 1. "OVR5,OVR5" "0,1"
|
|
bitfld.long 0x00 0. "ADR5RF,ADR5RF" "0,1"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "REG6,AD Conversion Result Register 6"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADR6,ADR6"
|
|
bitfld.long 0x00 1. "OVR6,OVR6" "0,1"
|
|
bitfld.long 0x00 0. "ADR6RF,ADR6RF" "0,1"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "REG7,AD Conversion Result Register 7"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADR7,ADR7"
|
|
bitfld.long 0x00 1. "OVR7,OVR7" "0,1"
|
|
bitfld.long 0x00 0. "ADR7RF,ADR7RF" "0,1"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "REGSP,AD Conversion Result Register SP"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADRSP,ADRSP"
|
|
bitfld.long 0x00 1. "OBRSP,OBRSP" "0,1"
|
|
bitfld.long 0x00 0. "ADRSPRF,ADRSPRF" "0,1"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CMP0,AD Conversion Result comparing register0"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADCOM0,ADCOM0"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CMP1,AD Conversion result comparing register1"
|
|
hexmask.long.word 0x00 6.--15. 1. "ADCOM1,ADCOM1"
|
|
tree.end
|
|
tree "AOREG (AO Area Registers)"
|
|
base ad:0x40038400
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "RSTFLG,Reset Flag register"
|
|
bitfld.byte 0x00 5. "LVDRSTF,LVDRSTF" "0,1"
|
|
bitfld.byte 0x00 3. "PINRSTF,PINRSTF" "0,1"
|
|
bitfld.byte 0x00 0. "PORF,PORF" "0,1"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "RSTFLG1,Reset Flag1 register"
|
|
bitfld.byte 0x00 2. "WDTRSTF,WDTRSTF" "0,1"
|
|
bitfld.byte 0x00 0. "SYSRSTF,SYSRSTF" "0,1"
|
|
tree.end
|
|
tree "CG (Clock Generator)"
|
|
base ad:0x400F3000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PROTECT,Protect Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PROTECT,PROTECT"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OSCCR,Oscillation Control Register"
|
|
rbitfld.long 0x00 9. "OSCF,OSCF" "0,1"
|
|
bitfld.long 0x00 8. "OSCSEL,OSCSEL" "0,1"
|
|
bitfld.long 0x00 1.--2. "EOSEN,EOSEN" "0,1,2,3"
|
|
bitfld.long 0x00 0. "IOSCEN,IOSCEN" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SYSCR,System clock control register"
|
|
rbitfld.long 0x00 24.--27. "PRCKST,PRCKST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 16.--18. "GEARST,GEARST" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. "PRCK,PRCK" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "GEAR,GEAR" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "STBYCR,Standby Control Register"
|
|
bitfld.long 0x00 0.--1. "STBY,STBY" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PLL0SEL,PLL select register for fsys"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "PLL0SET,PLL0SET"
|
|
bitfld.long 0x00 2. "PLL0ST,PLL0ST" "0,1"
|
|
bitfld.long 0x00 1. "PPL0SEL,PPL0SEL" "0,1"
|
|
bitfld.long 0x00 0. "PLL0ON,PLL0ON" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WUPHCR,Warmup register for HOSC"
|
|
hexmask.long.word 0x00 20.--31. 1. "WUPT,WUPT"
|
|
bitfld.long 0x00 8. "WUCLK,WUCLK" "0,1"
|
|
rbitfld.long 0x00 1. "WUEF,WUEF" "0,1"
|
|
bitfld.long 0x00 0. "WUON,WUON" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "FSYSENA,output control register A for fsys clock"
|
|
bitfld.long 0x00 18. "IPENA18,IPENA18" "0,1"
|
|
bitfld.long 0x00 17. "IPENA17,IPENA17" "0,1"
|
|
bitfld.long 0x00 16. "IPENA16,IPENA16" "0,1"
|
|
bitfld.long 0x00 15. "IPENA15,IPENA15" "0,1"
|
|
bitfld.long 0x00 14. "IPENA14,IPENA14" "0,1"
|
|
bitfld.long 0x00 13. "IPENA13,IPENA13" "0,1"
|
|
bitfld.long 0x00 12. "IPENA12,IPENA12" "0,1"
|
|
bitfld.long 0x00 11. "IPENA11,IPENA11" "0,1"
|
|
bitfld.long 0x00 10. "IPENA10,IPENA10" "0,1"
|
|
bitfld.long 0x00 9. "IPENA09,IPENA09" "0,1"
|
|
bitfld.long 0x00 8. "IPENA08,IPENA08" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "IPENA07,IPENA07" "0,1"
|
|
wgroup.long 0x54++0x03
|
|
line.long 0x00 "FSYSENB,output control register B for fsys clock"
|
|
bitfld.long 0x00 31. "IPENB31,IPENB31" "0,1"
|
|
bitfld.long 0x00 30. "IPENB30,IPENB30" "0,1"
|
|
bitfld.long 0x00 29. "IPENB29,IPENB29" "0,1"
|
|
bitfld.long 0x00 28. "IPENB28,IPENB28" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "SPCLKEN,Output control register for ADC and TRACE CLOCK"
|
|
bitfld.long 0x00 16. "ADCKEN,ADCKEN" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "EXTENDO0,Optional Function setting Register"
|
|
bitfld.long 0x00 5. "DCLKEN,DCLKEN" "0,1"
|
|
bitfld.long 0x00 4. "EHCLKSEL,EHCLKSEL" "0,1"
|
|
bitfld.long 0x00 1. "USBSEL,USBSEL" "0,1"
|
|
bitfld.long 0x00 0. "USBENA,USBENA" "0,1"
|
|
tree.end
|
|
tree "DMAC (DMA Controller)"
|
|
base ad:0x4004C000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "STATUS,DMA Status Register"
|
|
bitfld.long 0x00 0. "MASTER_ENABLE,MASTER_ENABLE" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. "MASTER_ENABLE,MASTER_ENABLE" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRLBASEPTR,DMA Control Data Base Pointer Register"
|
|
hexmask.long.tbyte 0x00 10.--31. 1. "CTRL_BASE_PTR,CTRL_BASE_PTR"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "ALTCTRLBASEPTR,DMA Channel Alternate Control Data Base Pointer Register"
|
|
hexmask.long 0x00 0.--31. 1. "ALT_CTRL_BASE_PTR,ALT_CTRL_BASE_PTR"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "CHNLSWREQUEST,DMA Channel Software Request Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_SW_REQUEST,CHNL_SW_REQUEST"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHNLUSEBURSTSET,DMA Channel Useburst Set Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_USEBURST_SET,CHNL_USEBURST_SET"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "CHNLUSEBURSTCLR,DMA Channel Useburst Clear Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_USEBURST_CLR,CHNL_USEBURST_CLR"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHNLREQMASKSET,DMA Channel Request Mask Set Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_REQ_MASK_SET,CHNL_REQ_MASK_SET"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "CHNLREQMASKCLR,DMA Channel Request Mask Clear Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_REQ_MASK_CLR,CHNL_REQ_MASK_CLR"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CHNLENABLESET,DMA Channel Enable Set Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_ENABLE_SET,CHNL_ENABLE_SET"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "CHNLENABLECLR,DMA Channel Enable Clear Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_ENABLE_CLR,CHNL_ENABLE_CLR"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CHNLPRIALTSET,DMA Channel Primary-Alternate Set Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_PRI_ALT_SET,CHNL_PRI_ALT_SET"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "CHNLPRIALTCLR,DMA Channel Primary-Alternate Clear Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_PRI_ALT_CLR,CHNL_PRI_ALT_CLR"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CHNLPRIORITYSET,DMA Channel Priority Set Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_PRIORITY_SET,CHNL_PRIORITY_SET"
|
|
wgroup.long 0x3C++0x03
|
|
line.long 0x00 "CHNLPRIORITYCLR,DMA Channel Priority Clear Register"
|
|
hexmask.long 0x00 0.--31. 1. "CHNL_PRIORITY_CLR,CHNL_PRIORITY_CLR"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "ERRCLR,DMA Bus Error Clear Register"
|
|
bitfld.long 0x00 0. "ERR_CLR,ERR_CLR" "0,1"
|
|
tree.end
|
|
tree "FC (Flash Control)"
|
|
base ad:0x41FFF000
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SECBIT,FC Security Bit Register"
|
|
bitfld.long 0x00 0. "SECBIT,SECBIT" "0,1"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "SR,FC Flash Status Register"
|
|
bitfld.long 0x00 0. "RDY_BSY,RDY_BSY" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "PSRA,FC Protect status register"
|
|
bitfld.long 0x00 3. "BLK3,BLK3" "0,1"
|
|
bitfld.long 0x00 2. "BLK2,BLK2" "0,1"
|
|
bitfld.long 0x00 1. "BLK1,BLK1" "0,1"
|
|
bitfld.long 0x00 0. "BLK0,BLK0" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "PMRA,FC Protect Mask register"
|
|
bitfld.long 0x00 3. "BLKM3,BLKM3" "0,1"
|
|
bitfld.long 0x00 2. "BLKM2,BLKM2" "0,1"
|
|
bitfld.long 0x00 1. "BLKM1,BLKM1" "0,1"
|
|
bitfld.long 0x00 0. "BLKM0,BLKM0" "0,1"
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
repeat 2. (list 0. 1.) (list ad:0x400A0000 ad:0x400A1000)
|
|
tree "I2C$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,I2C Control Register 1"
|
|
bitfld.long 0x00 5.--7. "BC,BC" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. "ACK,ACK" "0,1"
|
|
bitfld.long 0x00 3. "NOACK,NOACK" "0,1"
|
|
bitfld.long 0x00 0.--2. "SCK,SCK" "0,1,2,3,4,5,6,7"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DBR,Data Buffer Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DB,DB"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "AR,Bus address Register"
|
|
hexmask.long.byte 0x00 1.--7. 1. "SA,SA"
|
|
bitfld.long 0x00 0. "ALS,ALS" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "CR2,Control Register 2"
|
|
bitfld.long 0x00 7. "MST,MST" "0,1"
|
|
bitfld.long 0x00 6. "TRX,TRX" "0,1"
|
|
bitfld.long 0x00 5. "BB,BB" "0,1"
|
|
bitfld.long 0x00 4. "PIN,PIN" "0,1"
|
|
bitfld.long 0x00 3. "I2CM,I2CM" "0,1"
|
|
bitfld.long 0x00 0.--1. "SWRES,SWRES" "0,1,2,3"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "SR,Status Register"
|
|
bitfld.long 0x00 7. "MST,MST" "0,1"
|
|
bitfld.long 0x00 6. "TRX,TRX" "0,1"
|
|
bitfld.long 0x00 5. "BB,BB" "0,1"
|
|
bitfld.long 0x00 4. "PIN,PIN" "0,1"
|
|
bitfld.long 0x00 3. "AL,AL" "0,1"
|
|
bitfld.long 0x00 2. "AAS,AAS" "0,1"
|
|
bitfld.long 0x00 1. "ADO,ADO" "0,1"
|
|
bitfld.long 0x00 0. "LRB,LRB" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PRS,Prescaler clcok setting Register"
|
|
bitfld.long 0x00 0.--4. "PRSCK,PRSCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IE,Interrupt Enable Register"
|
|
bitfld.long 0x00 6. "SELPINCD,SELPINCD" "0,1"
|
|
bitfld.long 0x00 5. "DMARI2CTX,DMARI2CTX" "0,1"
|
|
bitfld.long 0x00 4. "DMARI2CRX,DMARI2CRX" "0,1"
|
|
bitfld.long 0x00 3. "INTNACK,INTNACK" "0,1"
|
|
bitfld.long 0x00 2. "INTI2CBF,INTI2CBF" "0,1"
|
|
bitfld.long 0x00 1. "INTI2CAL,INTI2CAL" "0,1"
|
|
bitfld.long 0x00 0. "INTI2C,INTI2C" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ST,Interrupt Register"
|
|
bitfld.long 0x00 3. "NACK,NACK" "0,1"
|
|
bitfld.long 0x00 2. "I2CBF,I2CBF" "0,1"
|
|
bitfld.long 0x00 1. "I2CAL,I2CAL" "0,1"
|
|
bitfld.long 0x00 0. "I2C,I2C" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "OP,Optiononal Function register"
|
|
bitfld.long 0x00 6. "SA2ST,SA2ST" "0,1"
|
|
bitfld.long 0x00 5. "SAST,SAST" "0,1"
|
|
bitfld.long 0x00 4. "NFSEL,NFSEL" "0,1"
|
|
bitfld.long 0x00 3. "RSTA,RSTA" "0,1"
|
|
bitfld.long 0x00 2. "GCDI,GCDI" "0,1"
|
|
bitfld.long 0x00 1. "SREN,SREN" "0,1"
|
|
bitfld.long 0x00 0. "MFACK,MFACK" "0,1"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "PM,Bus Monitor register"
|
|
bitfld.long 0x00 1. "SDA,SDA" "0,1"
|
|
bitfld.long 0x00 0. "SCL,SCL" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AR2,Second Slave address register"
|
|
hexmask.long.byte 0x00 1.--7. 1. "SA2,SA2"
|
|
bitfld.long 0x00 0. "SA2EN,SA2EN" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "I2CS (I2C Wakeup Function Control Registers)"
|
|
base ad:0x40038800
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "WUPCR1,I2C Wakeup control register1"
|
|
rbitfld.byte 0x00 7. "BUSY,BUSY" "0,1"
|
|
rbitfld.byte 0x00 6. "SGCDI,SGCDI" "0,1"
|
|
bitfld.byte 0x00 5. "ACK,ACK" "0,1"
|
|
bitfld.byte 0x00 4. "I2RES,I2RES" "0,1"
|
|
rbitfld.byte 0x00 3. "RW,RW" "0,1"
|
|
bitfld.byte 0x00 1. "GC,GC" "0,1"
|
|
bitfld.byte 0x00 0. "INTEND,INTEND" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "WUPCR2,I2C Wakeup control register2"
|
|
hexmask.byte 0x00 1.--7. 1. "WUPSA1,WUPSA1"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "WUPCR3,I2C Wakeup control register3"
|
|
hexmask.byte 0x00 1.--7. 1. "WUPSA2,WUPSA2"
|
|
bitfld.byte 0x00 0. "WUPSA2EN,WUPSA2EN" "0,1"
|
|
rgroup.byte 0x03++0x00
|
|
line.byte 0x00 "WUPSL,I2C Wakeup Status register"
|
|
bitfld.byte 0x00 2. "WUPSA2,WUPSA2" "0,1"
|
|
bitfld.byte 0x00 1. "WUPSA,WUPSA" "0,1"
|
|
tree.end
|
|
tree "INTIFAO (AO Area Interrupt Control)"
|
|
base ad:0x40038000
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "STOP2INT_032,STOP2INT I_F Control Register in AO Area"
|
|
bitfld.byte 0x00 7. "INT032NCLR,INT032NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT032PCLR,INT032PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT032NFLG,INT032NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT032PFLG,INT032PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT032MODE,INT032MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT032EN,INT032EN" "0,1"
|
|
group.byte 0x21++0x00
|
|
line.byte 0x00 "STOP2INT_033,STOP2INT I_F Control Register in AO Area"
|
|
bitfld.byte 0x00 7. "INT033NCLR,INT033NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT033PCLR,INT033PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT033NFLG,INT033NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT033PFLG,INT033PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT033MODE,INT033MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT033EN,INT033EN" "0,1"
|
|
group.byte 0x22++0x00
|
|
line.byte 0x00 "STOP2INT_034,STOP2INT I_F Control Register in AO Area"
|
|
bitfld.byte 0x00 7. "INT034NCLR,INT034NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT034PCLR,INT034PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT034NFLG,INT034NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT034PFLG,INT034PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT034MODE,INT034MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT034EN,INT034EN" "0,1"
|
|
group.byte 0x23++0x00
|
|
line.byte 0x00 "STOP2INT_035,STOP2INT I_F Control Register in AO Area"
|
|
bitfld.byte 0x00 7. "INT035NCLR,INT035NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT035PCLR,INT035PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT035NFLG,INT035NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT035PFLG,INT035PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT035MODE,INT035MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT035EN,INT035EN" "0,1"
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "STOP2INT_036,STOP2INT I_F Control Register in AO Area"
|
|
bitfld.byte 0x00 7. "INT036NCLR,INT036NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT036PCLR,INT036PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT036NFLG,INT036NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT036PFLG,INT036PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT036MODE,INT036MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT036EN,INT036EN" "0,1"
|
|
group.byte 0x25++0x00
|
|
line.byte 0x00 "STOP2INT_037,STOP2INT I_F Control Register in AO Area"
|
|
bitfld.byte 0x00 7. "INT037NCLR,INT037NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT037PCLR,INT037PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT037NFLG,INT037NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT037PFLG,INT037PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT037MODE,INT037MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT037EN,INT037EN" "0,1"
|
|
group.byte 0x26++0x00
|
|
line.byte 0x00 "STOP2INT_038,STOP2INT I_F Control Register in AO Area"
|
|
bitfld.byte 0x00 7. "INT038NCLR,INT038NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT038PCLR,INT038PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT038NFLG,INT038NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT038PFLG,INT038PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT038MODE,INT038MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT038EN,INT038EN" "0,1"
|
|
group.byte 0x27++0x00
|
|
line.byte 0x00 "STOP2INT_039,STOP2INT I_F Control Register in AO Area"
|
|
bitfld.byte 0x00 7. "INT039NCLR,INT039NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT039PCLR,INT039PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT039NFLG,INT039NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT039PFLG,INT039PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT039MODE,INT039MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT039EN,INT039EN" "0,1"
|
|
tree.end
|
|
tree "INTIFSD (SD Area Interrupt Control)"
|
|
base ad:0x400F4E00
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "IDLEINT_096,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT096NCLR,INT096NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT096PCLR,INT096PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT096NFLG,INT096NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT096PFLG,INT096PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT096MODE,INT096MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT096EN,INT096EN" "0,1"
|
|
group.byte 0x61++0x00
|
|
line.byte 0x00 "IDLEINT_097,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT097NCLR,INT097NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT097PCLR,INT097PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT097NFLG,INT097NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT097PFLG,INT097PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT097MODE,INT097MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT097EN,INT097EN" "0,1"
|
|
group.byte 0x62++0x00
|
|
line.byte 0x00 "IDLEINT_098,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT098NCLR,INT098NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT098PCLR,INT098PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT098NFLG,INT098NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT098PFLG,INT098PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT098MODE,INT098MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT098EN,INT098EN" "0,1"
|
|
group.byte 0x63++0x00
|
|
line.byte 0x00 "IDLEINT_099,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT099NCLR,INT099NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT099PCLR,INT099PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT099NFLG,INT099NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT099PFLG,INT099PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT099MODE,INT099MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT099EN,INT099EN" "0,1"
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "IDLEINT_100,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT100NCLR,INT100NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT100PCLR,INT100PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT100NFLG,INT100NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT100PFLG,INT100PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT100MODE,INT100MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT100EN,INT100EN" "0,1"
|
|
group.byte 0x65++0x00
|
|
line.byte 0x00 "IDLEINT_101,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT101NCLR,INT101NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT101PCLR,INT101PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT101NFLG,INT101NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT101PFLG,INT101PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT101MODE,INT101MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT101EN,INT101EN" "0,1"
|
|
group.byte 0x66++0x00
|
|
line.byte 0x00 "IDLEINT_102,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT102NCLR,INT102NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT102PCLR,INT102PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT102NFLG,INT102NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT102PFLG,INT102PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT102MODE,INT102MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT102EN,INT102EN" "0,1"
|
|
group.byte 0x67++0x00
|
|
line.byte 0x00 "IDLEINT_103,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT103NCLR,INT103NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT103PCLR,INT103PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT103NFLG,INT103NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT103PFLG,INT103PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT103MODE,INT103MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT103EN,INT103EN" "0,1"
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "IDLEINT_104,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT104NCLR,INT104NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT104PCLR,INT104PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT104NFLG,INT104NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT104PFLG,INT104PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT104MODE,INT104MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT104EN,INT104EN" "0,1"
|
|
group.byte 0x69++0x00
|
|
line.byte 0x00 "IDLEINT_105,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT105NCLR,INT105NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT105PCLR,INT105PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT105NFLG,INT105NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT105PFLG,INT105PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT105MODE,INT105MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT105EN,INT105EN" "0,1"
|
|
group.byte 0x6A++0x00
|
|
line.byte 0x00 "IDLEINT_106,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT106NCLR,INT106NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT106PCLR,INT106PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT106NFLG,INT106NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT106PFLG,INT106PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT106MODE,INT106MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT106EN,INT106EN" "0,1"
|
|
group.byte 0x6B++0x00
|
|
line.byte 0x00 "IDLEINT_107,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT107NCLR,INT107NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT107PCLR,INT107PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT107NFLG,INT107NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT107PFLG,INT107PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT107MODE,INT107MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT107EN,INT107EN" "0,1"
|
|
group.byte 0x6C++0x00
|
|
line.byte 0x00 "IDLEINT_108,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT108NCLR,INT108NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT108PCLR,INT108PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT108NFLG,INT108NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT108PFLG,INT108PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT108MODE,INT108MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT108EN,INT108EN" "0,1"
|
|
group.byte 0x6D++0x00
|
|
line.byte 0x00 "IDLEINT_109,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT109NCLR,INT109NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT109PCLR,INT109PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT109NFLG,INT109NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT109PFLG,INT109PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT109MODE,INT109MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT109EN,INT109EN" "0,1"
|
|
group.byte 0x6E++0x00
|
|
line.byte 0x00 "IDLEINT_110,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT110NCLR,INT110NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT110PCLR,INT110PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT110NFLG,INT110NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT110PFLG,INT110PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT110MODE,INT110MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT110EN,INT110EN" "0,1"
|
|
group.byte 0x6F++0x00
|
|
line.byte 0x00 "IDLEINT_111,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT111NCLR,INT111NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT111PCLR,INT111PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT111NFLG,INT111NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT111PFLG,INT111PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT111MODE,INT111MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT111EN,INT111EN" "0,1"
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "IDLEINT_112,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT112NCLR,INT112NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT112PCLR,INT112PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT112NFLG,INT112NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT112PFLG,INT112PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT112MODE,INT112MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT112EN,INT112EN" "0,1"
|
|
group.byte 0x71++0x00
|
|
line.byte 0x00 "IDLEINT_113,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT113NCLR,INT113NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT113PCLR,INT113PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT113NFLG,INT113NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT113PFLG,INT113PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT113MODE,INT113MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT113EN,INT113EN" "0,1"
|
|
group.byte 0x72++0x00
|
|
line.byte 0x00 "IDLEINT_114,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT114NCLR,INT114NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT114PCLR,INT114PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT114NFLG,INT114NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT114PFLG,INT114PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT114MODE,INT114MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT114EN,INT114EN" "0,1"
|
|
group.byte 0x73++0x00
|
|
line.byte 0x00 "IDLEINT_115,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT115NCLR,INT115NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT115PCLR,INT115PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT115NFLG,INT115NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT115PFLG,INT115PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT115MODE,INT115MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT115EN,INT115EN" "0,1"
|
|
group.byte 0x74++0x00
|
|
line.byte 0x00 "IDLEINT_116,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT116NCLR,INT116NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT116PCLR,INT116PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT116NFLG,INT116NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT116PFLG,INT116PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT116MODE,INT116MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT116EN,INT116EN" "0,1"
|
|
group.byte 0x75++0x00
|
|
line.byte 0x00 "IDLEINT_117,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT117NCLR,INT117NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT117PCLR,INT117PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT117NFLG,INT117NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT117PFLG,INT117PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT117MODE,INT117MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT117EN,INT117EN" "0,1"
|
|
group.byte 0x76++0x00
|
|
line.byte 0x00 "IDLEINT_118,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT118NCLR,INT118NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT118PCLR,INT118PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT118NFLG,INT118NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT118PFLG,INT118PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT118MODE,INT118MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT118EN,INT118EN" "0,1"
|
|
group.byte 0x77++0x00
|
|
line.byte 0x00 "IDLEINT_119,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT119NCLR,INT119NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT119PCLR,INT119PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT119NFLG,INT119NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT119PFLG,INT119PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT119MODE,INT119MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT119EN,INT119EN" "0,1"
|
|
group.byte 0x78++0x00
|
|
line.byte 0x00 "IDLEINT_120,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT120NCLR,INT120NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT120PCLR,INT120PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT120NFLG,INT120NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT120PFLG,INT120PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT120MODE,INT120MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT120EN,INT120EN" "0,1"
|
|
group.byte 0x79++0x00
|
|
line.byte 0x00 "IDLEINT_121,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT121NCLR,INT121NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT121PCLR,INT121PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT121NFLG,INT121NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT121PFLG,INT121PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT121MODE,INT121MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT121EN,INT121EN" "0,1"
|
|
group.byte 0x7A++0x00
|
|
line.byte 0x00 "IDLEINT_122,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT122NCLR,INT122NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT122PCLR,INT122PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT122NFLG,INT122NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT122PFLG,INT122PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT122MODE,INT122MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT122EN,INT122EN" "0,1"
|
|
group.byte 0x7B++0x00
|
|
line.byte 0x00 "IDLEINT_123,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT123NCLR,INT123NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT123PCLR,INT123PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT123NFLG,INT123NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT123PFLG,INT123PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT123MODE,INT123MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT123EN,INT123EN" "0,1"
|
|
group.byte 0x7C++0x00
|
|
line.byte 0x00 "IDLEINT_124,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT124NCLR,INT124NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT124PCLR,INT124PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT124NFLG,INT124NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT124PFLG,INT124PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT124MODE,INT124MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT124EN,INT124EN" "0,1"
|
|
group.byte 0x7D++0x00
|
|
line.byte 0x00 "IDLEINT_125,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT125NCLR,INT125NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT125PCLR,INT125PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT125NFLG,INT125NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT125PFLG,INT125PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT125MODE,INT125MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT125EN,INT125EN" "0,1"
|
|
group.byte 0x7E++0x00
|
|
line.byte 0x00 "IDLEINT_126,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT126NCLR,INT126NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT126PCLR,INT126PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT126NFLG,INT126NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT126PFLG,INT126PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT126MODE,INT126MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT126EN,INT126EN" "0,1"
|
|
group.byte 0x7F++0x00
|
|
line.byte 0x00 "IDLEINT_127,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT127NCLR,INT127NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT127PCLR,INT127PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT127NFLG,INT127NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT127PFLG,INT127PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT127MODE,INT127MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT127EN,INT127EN" "0,1"
|
|
group.byte 0x80++0x00
|
|
line.byte 0x00 "IDLEINT_128,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT128NCLR,INT128NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT128PCLR,INT128PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT128NFLG,INT128NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT128PFLG,INT128PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT128MODE,INT128MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT128EN,INT128EN" "0,1"
|
|
group.byte 0x81++0x00
|
|
line.byte 0x00 "IDLEINT_129,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT129NCLR,INT129NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT129PCLR,INT129PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT129NFLG,INT129NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT129PFLG,INT129PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT129MODE,INT129MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT129EN,INT129EN" "0,1"
|
|
group.byte 0x82++0x00
|
|
line.byte 0x00 "IDLEINT_130,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT130NCLR,INT130NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT130PCLR,INT130PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT130NFLG,INT130NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT130PFLG,INT130PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT130MODE,INT130MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT130EN,INT130EN" "0,1"
|
|
group.byte 0x83++0x00
|
|
line.byte 0x00 "IDLEINT_131,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT131NCLR,INT131NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT131PCLR,INT131PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT131NFLG,INT131NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT131PFLG,INT131PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT131MODE,INT131MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT131EN,INT131EN" "0,1"
|
|
group.byte 0x84++0x00
|
|
line.byte 0x00 "IDLEINT_132,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT132NCLR,INT132NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT132PCLR,INT132PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT132NFLG,INT132NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT132PFLG,INT132PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT132MODE,INT132MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT132EN,INT132EN" "0,1"
|
|
group.byte 0x85++0x00
|
|
line.byte 0x00 "IDLEINT_133,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT133NCLR,INT133NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT133PCLR,INT133PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT133NFLG,INT133NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT133PFLG,INT133PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT133MODE,INT133MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT133EN,INT133EN" "0,1"
|
|
group.byte 0x86++0x00
|
|
line.byte 0x00 "IDLEINT_134,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT134NCLR,INT134NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT134PCLR,INT134PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT134NFLG,INT134NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT134PFLG,INT134PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT134MODE,INT134MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT134EN,INT134EN" "0,1"
|
|
group.byte 0x87++0x00
|
|
line.byte 0x00 "IDLEINT_135,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT135NCLR,INT135NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT135PCLR,INT135PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT135NFLG,INT135NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT135PFLG,INT135PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT135MODE,INT135MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT135EN,INT135EN" "0,1"
|
|
group.byte 0x88++0x00
|
|
line.byte 0x00 "IDLEINT_136,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT136NCLR,INT136NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT136PCLR,INT136PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT136NFLG,INT136NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT136PFLG,INT136PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT136MODE,INT136MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT136EN,INT136EN" "0,1"
|
|
group.byte 0x89++0x00
|
|
line.byte 0x00 "IDLEINT_137,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT137NCLR,INT137NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT137PCLR,INT137PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT137NFLG,INT137NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT137PFLG,INT137PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT137MODE,INT137MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT137EN,INT137EN" "0,1"
|
|
group.byte 0x8A++0x00
|
|
line.byte 0x00 "IDLEINT_138,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT138NCLR,INT138NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT138PCLR,INT138PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT138NFLG,INT138NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT138PFLG,INT138PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT138MODE,INT138MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT138EN,INT138EN" "0,1"
|
|
group.byte 0x8B++0x00
|
|
line.byte 0x00 "IDLEINT_139,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT139NCLR,INT139NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT139PCLR,INT139PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT139NFLG,INT139NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT139PFLG,INT139PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT139MODE,INT139MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT139EN,INT139EN" "0,1"
|
|
group.byte 0x8C++0x00
|
|
line.byte 0x00 "IDLEINT_140,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT140NCLR,INT140NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT140PCLR,INT140PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT140NFLG,INT140NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT140PFLG,INT140PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT140MODE,INT140MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT140EN,INT140EN" "0,1"
|
|
group.byte 0x8D++0x00
|
|
line.byte 0x00 "IDLEINT_141,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT141NCLR,INT141NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT141PCLR,INT141PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT141NFLG,INT141NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT141PFLG,INT141PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT141MODE,INT141MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT141EN,INT141EN" "0,1"
|
|
group.byte 0x8E++0x00
|
|
line.byte 0x00 "IDLEINT_142,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT142NCLR,INT142NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT142PCLR,INT142PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT142NFLG,INT142NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT142PFLG,INT142PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT142MODE,INT142MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT142EN,INT142EN" "0,1"
|
|
group.byte 0x8F++0x00
|
|
line.byte 0x00 "IDLEINT_143,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT143NCLR,INT143NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT143PCLR,INT143PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT143NFLG,INT143NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT143PFLG,INT143PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT143MODE,INT143MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT143EN,INT143EN" "0,1"
|
|
group.byte 0x90++0x00
|
|
line.byte 0x00 "IDLEINT_144,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT144NCLR,INT144NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT144PCLR,INT144PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT144NFLG,INT144NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT144PFLG,INT144PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT144MODE,INT144MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT144EN,INT144EN" "0,1"
|
|
group.byte 0x91++0x00
|
|
line.byte 0x00 "IDLEINT_145,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT145NCLR,INT145NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT145PCLR,INT145PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT145NFLG,INT145NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT145PFLG,INT145PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT145MODE,INT145MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT145EN,INT145EN" "0,1"
|
|
group.byte 0x92++0x00
|
|
line.byte 0x00 "IDLEINT_146,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT146NCLR,INT146NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT146PCLR,INT146PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT146NFLG,INT146NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT146PFLG,INT146PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT146MODE,INT146MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT146EN,INT146EN" "0,1"
|
|
group.byte 0x93++0x00
|
|
line.byte 0x00 "IDLEINT_147,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT147NCLR,INT147NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT147PCLR,INT147PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT147NFLG,INT147NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT147PFLG,INT147PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT147MODE,INT147MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT147EN,INT147EN" "0,1"
|
|
group.byte 0x94++0x00
|
|
line.byte 0x00 "IDLEINT_148,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT148NCLR,INT148NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT148PCLR,INT148PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT148NFLG,INT148NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT148PFLG,INT148PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT148MODE,INT148MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT148EN,INT148EN" "0,1"
|
|
group.byte 0x95++0x00
|
|
line.byte 0x00 "IDLEINT_149,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT149NCLR,INT149NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT149PCLR,INT149PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT149NFLG,INT149NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT149PFLG,INT149PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT149MODE,INT149MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT149EN,INT149EN" "0,1"
|
|
group.byte 0x96++0x00
|
|
line.byte 0x00 "IDLEINT_150,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT150NCLR,INT150NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT150PCLR,INT150PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT150NFLG,INT150NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT150PFLG,INT150PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT150MODE,INT150MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT150EN,INT150EN" "0,1"
|
|
group.byte 0x97++0x00
|
|
line.byte 0x00 "IDLEINT_151,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT151NCLR,INT151NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT151PCLR,INT151PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT151NFLG,INT151NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT151PFLG,INT151PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT151MODE,INT151MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT151EN,INT151EN" "0,1"
|
|
group.byte 0x98++0x00
|
|
line.byte 0x00 "IDLEINT_152,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT152NCLR,INT152NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT152PCLR,INT152PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT152NFLG,INT152NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT152PFLG,INT152PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT152MODE,INT152MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT152EN,INT152EN" "0,1"
|
|
group.byte 0x99++0x00
|
|
line.byte 0x00 "IDLEINT_153,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT153NCLR,INT153NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT153PCLR,INT153PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT153NFLG,INT153NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT153PFLG,INT153PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT153MODE,INT153MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT153EN,INT153EN" "0,1"
|
|
group.byte 0x9A++0x00
|
|
line.byte 0x00 "IDLEINT_154,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT154NCLR,INT154NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT154PCLR,INT154PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT154NFLG,INT154NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT154PFLG,INT154PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT154MODE,INT154MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT154EN,INT154EN" "0,1"
|
|
group.byte 0x9B++0x00
|
|
line.byte 0x00 "IDLEINT_155,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT155NCLR,INT155NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT155PCLR,INT155PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT155NFLG,INT155NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT155PFLG,INT155PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT155MODE,INT155MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT155EN,INT155EN" "0,1"
|
|
group.byte 0x9C++0x00
|
|
line.byte 0x00 "IDLEINT_156,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT156NCLR,INT156NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT156PCLR,INT156PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT156NFLG,INT156NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT156PFLG,INT156PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT156MODE,INT156MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT156EN,INT156EN" "0,1"
|
|
group.byte 0x9D++0x00
|
|
line.byte 0x00 "IDLEINT_157,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT157NCLR,INT157NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT157PCLR,INT157PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT157NFLG,INT157NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT157PFLG,INT157PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT157MODE,INT157MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT157EN,INT157EN" "0,1"
|
|
group.byte 0x9E++0x00
|
|
line.byte 0x00 "IDLEINT_158,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT158NCLR,INT158NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT158PCLR,INT158PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT158NFLG,INT158NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT158PFLG,INT158PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT158MODE,INT158MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT158EN,INT158EN" "0,1"
|
|
group.byte 0x9F++0x00
|
|
line.byte 0x00 "IDLEINT_159,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT159NCLR,INT159NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT159PCLR,INT159PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT159NFLG,INT159NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT159PFLG,INT159PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT159MODE,INT159MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT159EN,INT159EN" "0,1"
|
|
group.byte 0xA0++0x00
|
|
line.byte 0x00 "IDLEINT_160,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT160NCLR,INT160NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT160PCLR,INT160PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT160NFLG,INT160NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT160PFLG,INT160PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT160MODE,INT160MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT160EN,INT160EN" "0,1"
|
|
group.byte 0xA1++0x00
|
|
line.byte 0x00 "IDLEINT_161,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT161NCLR,INT161NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT161PCLR,INT161PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT161NFLG,INT161NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT161PFLG,INT161PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT161MODE,INT161MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT161EN,INT161EN" "0,1"
|
|
group.byte 0xA2++0x00
|
|
line.byte 0x00 "IDLEINT_162,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT162NCLR,INT162NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT162PCLR,INT162PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT162NFLG,INT162NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT162PFLG,INT162PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT162MODE,INT162MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT162EN,INT162EN" "0,1"
|
|
group.byte 0xA3++0x00
|
|
line.byte 0x00 "IDLEINT_163,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT163NCLR,INT163NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT163PCLR,INT163PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT163NFLG,INT163NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT163PFLG,INT163PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT163MODE,INT163MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT163EN,INT163EN" "0,1"
|
|
group.byte 0xA4++0x00
|
|
line.byte 0x00 "IDLEINT_164,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT164NCLR,INT164NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT164PCLR,INT164PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT164NFLG,INT164NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT164PFLG,INT164PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT164MODE,INT164MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT164EN,INT164EN" "0,1"
|
|
group.byte 0xA5++0x00
|
|
line.byte 0x00 "IDLEINT_165,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT165NCLR,INT165NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT165PCLR,INT165PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT165NFLG,INT165NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT165PFLG,INT165PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT165MODE,INT165MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT165EN,INT165EN" "0,1"
|
|
group.byte 0xA6++0x00
|
|
line.byte 0x00 "IDLEINT_166,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT166NCLR,INT166NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT166PCLR,INT166PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT166NFLG,INT166NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT166PFLG,INT166PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT166MODE,INT166MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT166EN,INT166EN" "0,1"
|
|
group.byte 0xA7++0x00
|
|
line.byte 0x00 "IDLEINT_167,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT167NCLR,INT167NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT167PCLR,INT167PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT167NFLG,INT167NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT167PFLG,INT167PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT167MODE,INT167MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT167EN,INT167EN" "0,1"
|
|
group.byte 0xA8++0x00
|
|
line.byte 0x00 "IDLEINT_168,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT168NCLR,INT168NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT168PCLR,INT168PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT168NFLG,INT168NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT168PFLG,INT168PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT168MODE,INT168MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT168EN,INT168EN" "0,1"
|
|
group.byte 0xA9++0x00
|
|
line.byte 0x00 "IDLEINT_169,IDLEINT I_F Control Register in SD Area"
|
|
bitfld.byte 0x00 7. "INT169NCLR,INT169NCLR" "0,1"
|
|
bitfld.byte 0x00 6. "INT169PCLR,INT169PCLR" "0,1"
|
|
bitfld.byte 0x00 5. "INT169NFLG,INT169NFLG" "0,1"
|
|
bitfld.byte 0x00 4. "INT169PFLG,INT169PFLG" "0,1"
|
|
bitfld.byte 0x00 2. "INT169MODE,INT169MODE" "0,1"
|
|
bitfld.byte 0x00 0. "INT169EN,INT169EN" "0,1"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "FLAG0,NMI interrupt status flag register"
|
|
bitfld.long 0x00 18. "INT18FLG,INT18FLG" "0,1"
|
|
bitfld.long 0x00 17. "INT17FLG,INT17FLG" "0,1"
|
|
bitfld.long 0x00 16. "INT16FLG,INT16FLG" "0,1"
|
|
rgroup.long 0x104++0x03
|
|
line.long 0x00 "FLGA1,interrupt status flag register1 for AO area"
|
|
bitfld.long 0x00 7. "INT39FLG,INT39FLG" "0,1"
|
|
bitfld.long 0x00 6. "INT38FLG,INT38FLG" "0,1"
|
|
bitfld.long 0x00 5. "INT37FLG,INT37FLG" "0,1"
|
|
bitfld.long 0x00 4. "INT36FLG,INT36FLG" "0,1"
|
|
bitfld.long 0x00 3. "INT35FLG,INT35FLG" "0,1"
|
|
bitfld.long 0x00 2. "INT34FLG,INT34FLG" "0,1"
|
|
bitfld.long 0x00 1. "INT33FLG,INT33FLG" "0,1"
|
|
bitfld.long 0x00 0. "INT32FLG,INT32FLG" "0,1"
|
|
rgroup.long 0x10C++0x03
|
|
line.long 0x00 "FLGA3,interrupt status flag register3 for SD area"
|
|
bitfld.long 0x00 31. "INT127FLG,INT127FLG" "0,1"
|
|
bitfld.long 0x00 30. "INT126FLG,INT126FLG" "0,1"
|
|
bitfld.long 0x00 29. "INT125FLG,INT125FLG" "0,1"
|
|
bitfld.long 0x00 28. "INT124FLG,INT124FLG" "0,1"
|
|
bitfld.long 0x00 27. "INT123FLG,INT123FLG" "0,1"
|
|
bitfld.long 0x00 26. "INT122FLG,INT122FLG" "0,1"
|
|
bitfld.long 0x00 25. "INT121FLG,INT121FLG" "0,1"
|
|
bitfld.long 0x00 24. "INT120FLG,INT120FLG" "0,1"
|
|
bitfld.long 0x00 23. "INT119FLG,INT119FLG" "0,1"
|
|
bitfld.long 0x00 22. "INT118FLG,INT118FLG" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "INT117FLG,INT117FLG" "0,1"
|
|
bitfld.long 0x00 20. "INT116FLG,INT116FLG" "0,1"
|
|
bitfld.long 0x00 19. "INT115FLG,INT115FLG" "0,1"
|
|
bitfld.long 0x00 18. "INT114FLG,INT114FLG" "0,1"
|
|
bitfld.long 0x00 17. "INT113FLG,INT113FLG" "0,1"
|
|
bitfld.long 0x00 16. "INT112FLG,INT112FLG" "0,1"
|
|
bitfld.long 0x00 15. "INT111FLG,INT111FLG" "0,1"
|
|
bitfld.long 0x00 14. "INT110FLG,INT110FLG" "0,1"
|
|
bitfld.long 0x00 13. "INT109FLG,INT109FLG" "0,1"
|
|
bitfld.long 0x00 12. "INT108FLG,INT108FLG" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "INT107FLG,INT107FLG" "0,1"
|
|
bitfld.long 0x00 10. "INT106FLG,INT106FLG" "0,1"
|
|
bitfld.long 0x00 9. "INT105FLG,INT105FLG" "0,1"
|
|
bitfld.long 0x00 8. "INT104FLG,INT104FLG" "0,1"
|
|
bitfld.long 0x00 7. "INT103FLG,INT103FLG" "0,1"
|
|
bitfld.long 0x00 6. "INT102FLG,INT102FLG" "0,1"
|
|
bitfld.long 0x00 5. "INT101FLG,INT101FLG" "0,1"
|
|
bitfld.long 0x00 4. "INT100FLG,INT100FLG" "0,1"
|
|
bitfld.long 0x00 3. "INT99FLG,INT99FLG" "0,1"
|
|
bitfld.long 0x00 2. "INT98FLG,INT98FLG" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "INT97FLG,INT97FLG" "0,1"
|
|
bitfld.long 0x00 0. "INT96FLG,INT96FLG" "0,1"
|
|
rgroup.long 0x110++0x03
|
|
line.long 0x00 "FLGA4,interrupt status flag register4 for SD area"
|
|
bitfld.long 0x00 24. "INT152FLG,INT152FLG" "0,1"
|
|
bitfld.long 0x00 23. "INT151FLG,INT151FLG" "0,1"
|
|
bitfld.long 0x00 22. "INT150FLG,INT150FLG" "0,1"
|
|
bitfld.long 0x00 21. "INT149FLG,INT149FLG" "0,1"
|
|
bitfld.long 0x00 20. "INT148FLG,INT148FLG" "0,1"
|
|
bitfld.long 0x00 19. "INT147FLG,INT147FLG" "0,1"
|
|
bitfld.long 0x00 18. "INT146FLG,INT146FLG" "0,1"
|
|
bitfld.long 0x00 17. "INT145FLG,INT145FLG" "0,1"
|
|
bitfld.long 0x00 16. "INT144FLG,INT144FLG" "0,1"
|
|
bitfld.long 0x00 15. "INT143FLG,INT143FLG" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "INT142FLG,INT142FLG" "0,1"
|
|
bitfld.long 0x00 13. "INT141FLG,INT141FLG" "0,1"
|
|
bitfld.long 0x00 12. "INT140FLG,INT140FLG" "0,1"
|
|
bitfld.long 0x00 11. "INT139FLG,INT139FLG" "0,1"
|
|
bitfld.long 0x00 10. "INT138FLG,INT138FLG" "0,1"
|
|
bitfld.long 0x00 9. "INT137FLG,INT137FLG" "0,1"
|
|
bitfld.long 0x00 8. "INT136FLG,INT136FLG" "0,1"
|
|
bitfld.long 0x00 7. "INT135FLG,INT135FLG" "0,1"
|
|
bitfld.long 0x00 6. "INT134FLG,INT134FLG" "0,1"
|
|
bitfld.long 0x00 5. "INT133FLG,INT133FLG" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "INT132FLG,INT132FLG" "0,1"
|
|
bitfld.long 0x00 3. "INT131FLG,INT131FLG" "0,1"
|
|
bitfld.long 0x00 2. "INT130FLG,INT130FLG" "0,1"
|
|
bitfld.long 0x00 1. "INT129FLG,INT129FLG" "0,1"
|
|
bitfld.long 0x00 0. "INT128FLG,INT128FLG" "0,1"
|
|
rgroup.long 0x114++0x03
|
|
line.long 0x00 "FLGA5,interrupt status flag register5 for SD area"
|
|
bitfld.long 0x00 9. "INT169FLG,INT169FLG" "0,1"
|
|
bitfld.long 0x00 8. "INT168FLG,INT168FLG" "0,1"
|
|
bitfld.long 0x00 7. "INT167FLG,INT167FLG" "0,1"
|
|
bitfld.long 0x00 6. "INT166FLG,INT166FLG" "0,1"
|
|
bitfld.long 0x00 5. "INT165FLG,INT165FLG" "0,1"
|
|
bitfld.long 0x00 4. "INT164FLG,INT164FLG" "0,1"
|
|
bitfld.long 0x00 3. "INT163FLG,INT163FLG" "0,1"
|
|
bitfld.long 0x00 2. "INT162FLG,INT162FLG" "0,1"
|
|
bitfld.long 0x00 1. "INT161FLG,INT161FLG" "0,1"
|
|
bitfld.long 0x00 0. "INT160FLG,INT160FLG" "0,1"
|
|
tree.end
|
|
tree "LVD (Low-Voltage Detection Circuit)"
|
|
base ad:0x400F4000
|
|
repeat 2. (strings "0" "1" )(list 0x0 0x4 )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "CR$1,LVD Control register $1"
|
|
rbitfld.long 0x00 7. "ST,ST" "0,1"
|
|
bitfld.long 0x00 6. "RSTEN,RSTEN" "0,1"
|
|
bitfld.long 0x00 5. "INTEN,INTEN" "0,1"
|
|
bitfld.long 0x00 4. "INTSEL,INTSEL" "0,1"
|
|
bitfld.long 0x00 1.--3. "LVL,LVL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "EN,EN" "0,1"
|
|
repeat.end
|
|
tree.end
|
|
tree "PA (Port A)"
|
|
base ad:0x400C0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,PA Data Register"
|
|
bitfld.long 0x00 7. "PA7,PA7" "0,1"
|
|
bitfld.long 0x00 6. "PA6,PA6" "0,1"
|
|
bitfld.long 0x00 5. "PA5,PA5" "0,1"
|
|
bitfld.long 0x00 4. "PA4,PA4" "0,1"
|
|
bitfld.long 0x00 3. "PA3,PA3" "0,1"
|
|
bitfld.long 0x00 2. "PA2,PA2" "0,1"
|
|
bitfld.long 0x00 1. "PA1,PA1" "0,1"
|
|
bitfld.long 0x00 0. "PA0,PA0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR,PA Control Register"
|
|
bitfld.long 0x00 7. "PA7C,PA7C" "0,1"
|
|
bitfld.long 0x00 6. "PA6C,PA6C" "0,1"
|
|
bitfld.long 0x00 5. "PA5C,PA5C" "0,1"
|
|
bitfld.long 0x00 4. "PA4C,PA4C" "0,1"
|
|
bitfld.long 0x00 3. "PA3C,PA3C" "0,1"
|
|
bitfld.long 0x00 2. "PA2C,PA2C" "0,1"
|
|
bitfld.long 0x00 1. "PA1C,PA1C" "0,1"
|
|
bitfld.long 0x00 0. "PA0C,PA0C" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FR1,PA Function Register 1"
|
|
bitfld.long 0x00 7. "PA7F1,PA7F1" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "OD,PA Open Drain Control Register"
|
|
bitfld.long 0x00 7. "PA7OD,PA7OD" "0,1"
|
|
bitfld.long 0x00 6. "PA6OD,PA6OD" "0,1"
|
|
bitfld.long 0x00 5. "PA5OD,PA5OD" "0,1"
|
|
bitfld.long 0x00 4. "PA4OD,PA4OD" "0,1"
|
|
bitfld.long 0x00 3. "PA3OD,PA3OD" "0,1"
|
|
bitfld.long 0x00 2. "PA2OD,PA2OD" "0,1"
|
|
bitfld.long 0x00 1. "PA1OD,PA1OD" "0,1"
|
|
bitfld.long 0x00 0. "PA0OD,PA0OD" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PUP,PA Pull-up Control Register"
|
|
bitfld.long 0x00 7. "PA7UP,PA7UP" "0,1"
|
|
bitfld.long 0x00 6. "PA6UP,PA6UP" "0,1"
|
|
bitfld.long 0x00 5. "PA5UP,PA5UP" "0,1"
|
|
bitfld.long 0x00 4. "PA4UP,PA4UP" "0,1"
|
|
bitfld.long 0x00 3. "PA3UP,PA3UP" "0,1"
|
|
bitfld.long 0x00 2. "PA2UP,PA2UP" "0,1"
|
|
bitfld.long 0x00 1. "PA1UP,PA1UP" "0,1"
|
|
bitfld.long 0x00 0. "PA0UP,PA0UP" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PDN,PA Pull-Down Control Register"
|
|
bitfld.long 0x00 7. "PA7DN,PA7DN" "0,1"
|
|
bitfld.long 0x00 6. "PA6DN,PA6DN" "0,1"
|
|
bitfld.long 0x00 5. "PA5DN,PA5DN" "0,1"
|
|
bitfld.long 0x00 4. "PA4DN,PA4DN" "0,1"
|
|
bitfld.long 0x00 3. "PA3DN,PA3DN" "0,1"
|
|
bitfld.long 0x00 2. "PA2DN,PA2DN" "0,1"
|
|
bitfld.long 0x00 1. "PA1DN,PA1DN" "0,1"
|
|
bitfld.long 0x00 0. "PA0DN,PA0DN" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IE,PA Input Enable Control Register"
|
|
bitfld.long 0x00 7. "PA7IE,PA7IE" "0,1"
|
|
bitfld.long 0x00 6. "PA6IE,PA6IE" "0,1"
|
|
bitfld.long 0x00 5. "PA5IE,PA5IE" "0,1"
|
|
bitfld.long 0x00 4. "PA4IE,PA4IE" "0,1"
|
|
bitfld.long 0x00 3. "PA3IE,PA3IE" "0,1"
|
|
bitfld.long 0x00 2. "PA2IE,PA2IE" "0,1"
|
|
bitfld.long 0x00 1. "PA1IE,PA1IE" "0,1"
|
|
bitfld.long 0x00 0. "PA0IE,PA0IE" "0,1"
|
|
tree.end
|
|
tree "PC (Port C)"
|
|
base ad:0x400C0200
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,PC Data Register"
|
|
bitfld.long 0x00 5. "PC5,PC5" "0,1"
|
|
bitfld.long 0x00 4. "PC4,PC4" "0,1"
|
|
bitfld.long 0x00 3. "PC3,PC3" "0,1"
|
|
bitfld.long 0x00 2. "PC2,PC2" "0,1"
|
|
bitfld.long 0x00 1. "PC1,PC1" "0,1"
|
|
bitfld.long 0x00 0. "PC0,PC0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR,PC Control Register"
|
|
bitfld.long 0x00 5. "PC5C,PC5C" "0,1"
|
|
bitfld.long 0x00 4. "PC4C,PC4C" "0,1"
|
|
bitfld.long 0x00 3. "PC3C,PC3C" "0,1"
|
|
bitfld.long 0x00 2. "PC2C,PC2C" "0,1"
|
|
bitfld.long 0x00 1. "PC1C,PC1C" "0,1"
|
|
bitfld.long 0x00 0. "PC0C,PC0C" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FR1,PC Function Register 1"
|
|
bitfld.long 0x00 5. "PC5F1,PC5F1" "0,1"
|
|
bitfld.long 0x00 4. "PC4F1,PC4F1" "0,1"
|
|
bitfld.long 0x00 3. "PC3F1,PC3F1" "0,1"
|
|
bitfld.long 0x00 2. "PC2F1,PC2F1" "0,1"
|
|
bitfld.long 0x00 1. "PC1F1,PC1F1" "0,1"
|
|
bitfld.long 0x00 0. "PC0F1,PC0F1" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "OD,PC Open Drain Control Register"
|
|
bitfld.long 0x00 5. "PC5OD,PC5OD" "0,1"
|
|
bitfld.long 0x00 4. "PC4OD,PC4OD" "0,1"
|
|
bitfld.long 0x00 3. "PC3OD,PC3OD" "0,1"
|
|
bitfld.long 0x00 2. "PC2OD,PC2OD" "0,1"
|
|
bitfld.long 0x00 1. "PC1OD,PC1OD" "0,1"
|
|
bitfld.long 0x00 0. "PC0OD,PC0OD" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PUP,PC Pull-up Control Register"
|
|
bitfld.long 0x00 5. "PC5UP,PC5UP" "0,1"
|
|
bitfld.long 0x00 4. "PC4UP,PC4UP" "0,1"
|
|
bitfld.long 0x00 3. "PC3UP,PC3UP" "0,1"
|
|
bitfld.long 0x00 2. "PC2UP,PC2UP" "0,1"
|
|
bitfld.long 0x00 1. "PC1UP,PC1UP" "0,1"
|
|
bitfld.long 0x00 0. "PC0UP,PC0UP" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PDN,PC Pull-Down Control Register"
|
|
bitfld.long 0x00 5. "PC5DN,PC5DN" "0,1"
|
|
bitfld.long 0x00 4. "PC4DN,PC4DN" "0,1"
|
|
bitfld.long 0x00 3. "PC3DN,PC3DN" "0,1"
|
|
bitfld.long 0x00 2. "PC2DN,PC2DN" "0,1"
|
|
bitfld.long 0x00 1. "PC1DN,PC1DN" "0,1"
|
|
bitfld.long 0x00 0. "PC0DN,PC0DN" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SEL,PC input voltage selection Register"
|
|
bitfld.long 0x00 1. "PC1SEL,PC1SEL" "0,1"
|
|
bitfld.long 0x00 0. "PC0SEL,PC0SEL" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IE,PC Input Enable Control Register"
|
|
bitfld.long 0x00 5. "PC5IE,PC5IE" "0,1"
|
|
bitfld.long 0x00 4. "PC4IE,PC4IE" "0,1"
|
|
bitfld.long 0x00 3. "PC3IE,PC3IE" "0,1"
|
|
bitfld.long 0x00 2. "PC2IE,PC2IE" "0,1"
|
|
bitfld.long 0x00 1. "PC1IE,PC1IE" "0,1"
|
|
bitfld.long 0x00 0. "PC0IE,PC0IE" "0,1"
|
|
tree.end
|
|
tree "PD (Port D)"
|
|
base ad:0x400C0300
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,PD Data Register"
|
|
bitfld.long 0x00 5. "PD5,PD5" "0,1"
|
|
bitfld.long 0x00 4. "PD4,PD4" "0,1"
|
|
bitfld.long 0x00 3. "PD3,PD3" "0,1"
|
|
bitfld.long 0x00 2. "PD2,PD2" "0,1"
|
|
bitfld.long 0x00 1. "PD1,PD1" "0,1"
|
|
bitfld.long 0x00 0. "PD0,PD0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR,PD Control Register"
|
|
bitfld.long 0x00 5. "PD5C,PD5C" "0,1"
|
|
bitfld.long 0x00 4. "PD4C,PD4C" "0,1"
|
|
bitfld.long 0x00 3. "PD3C,PD3C" "0,1"
|
|
bitfld.long 0x00 2. "PD2C,PD2C" "0,1"
|
|
bitfld.long 0x00 1. "PD1C,PD1C" "0,1"
|
|
bitfld.long 0x00 0. "PD0C,PD0C" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FR1,PD Function Register 1"
|
|
bitfld.long 0x00 4. "PD4F1,PD4F1" "0,1"
|
|
bitfld.long 0x00 3. "PD3F1,PD3F1" "0,1"
|
|
bitfld.long 0x00 2. "PD2F1,PD2F1" "0,1"
|
|
bitfld.long 0x00 1. "PD1F1,PD1F1" "0,1"
|
|
bitfld.long 0x00 0. "PD0F1,PD0F1" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FR2,PD Function Register 2"
|
|
bitfld.long 0x00 3. "PD3F2,PD3F2" "0,1"
|
|
bitfld.long 0x00 2. "PD2F2,PD2F2" "0,1"
|
|
bitfld.long 0x00 1. "PD1F2,PD1F2" "0,1"
|
|
bitfld.long 0x00 0. "PD0F2,PD0F2" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "OD,PD Open Drain Control Register"
|
|
bitfld.long 0x00 5. "PD5OD,PD5OD" "0,1"
|
|
bitfld.long 0x00 4. "PD4OD,PD4OD" "0,1"
|
|
bitfld.long 0x00 3. "PD3OD,PD3OD" "0,1"
|
|
bitfld.long 0x00 2. "PD2OD,PD2OD" "0,1"
|
|
bitfld.long 0x00 1. "PD1OD,PD1OD" "0,1"
|
|
bitfld.long 0x00 0. "PD0OD,PD0OD" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PUP,PD Pull-up Control Register"
|
|
bitfld.long 0x00 5. "PD5UP,PD5UP" "0,1"
|
|
bitfld.long 0x00 4. "PD4UP,PD4UP" "0,1"
|
|
bitfld.long 0x00 3. "PD3UP,PD3UP" "0,1"
|
|
bitfld.long 0x00 2. "PD2UP,PD2UP" "0,1"
|
|
bitfld.long 0x00 1. "PD1UP,PD1UP" "0,1"
|
|
bitfld.long 0x00 0. "PD0UP,PD0UP" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PDN,PD Pull-Down Control Register"
|
|
bitfld.long 0x00 5. "PD5DN,PD5DN" "0,1"
|
|
bitfld.long 0x00 4. "PD4DN,PD4DN" "0,1"
|
|
bitfld.long 0x00 3. "PD3DN,PD3DN" "0,1"
|
|
bitfld.long 0x00 2. "PD2DN,PD2DN" "0,1"
|
|
bitfld.long 0x00 1. "PD1DN,PD1DN" "0,1"
|
|
bitfld.long 0x00 0. "PD0DN,PD0DN" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SEL,PD input voltage selection Register"
|
|
bitfld.long 0x00 5. "PD5SEL,PD5SEL" "0,1"
|
|
bitfld.long 0x00 4. "PD4SEL,PD4SEL" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IE,PD Input Enable Control Register"
|
|
bitfld.long 0x00 5. "PD5IE,PD5IE" "0,1"
|
|
bitfld.long 0x00 4. "PD4IE,PD4IE" "0,1"
|
|
bitfld.long 0x00 3. "PD3IE,PD3IE" "0,1"
|
|
bitfld.long 0x00 2. "PD2IE,PD2IE" "0,1"
|
|
bitfld.long 0x00 1. "PD1IE,PD1IE" "0,1"
|
|
bitfld.long 0x00 0. "PD0IE,PD0IE" "0,1"
|
|
tree.end
|
|
tree "PE (Port E)"
|
|
base ad:0x400C0400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,PE Data Register"
|
|
bitfld.long 0x00 5. "PE5,PE5" "0,1"
|
|
bitfld.long 0x00 4. "PE4,PE4" "0,1"
|
|
bitfld.long 0x00 3. "PE3,PE3" "0,1"
|
|
bitfld.long 0x00 2. "PE2,PE2" "0,1"
|
|
bitfld.long 0x00 1. "PE1,PE1" "0,1"
|
|
bitfld.long 0x00 0. "PE0,PE0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR,PE Control Register"
|
|
bitfld.long 0x00 5. "PE5C,PE5C" "0,1"
|
|
bitfld.long 0x00 4. "PE4C,PE4C" "0,1"
|
|
bitfld.long 0x00 3. "PE3C,PE3C" "0,1"
|
|
bitfld.long 0x00 2. "PE2C,PE2C" "0,1"
|
|
bitfld.long 0x00 1. "PE1C,PE1C" "0,1"
|
|
bitfld.long 0x00 0. "PE0C,PE0C" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FR1,PE Function Register 1"
|
|
bitfld.long 0x00 5. "PE5F1,PE5F1" "0,1"
|
|
bitfld.long 0x00 4. "PE4F1,PE4F1" "0,1"
|
|
bitfld.long 0x00 3. "PE3F1,PE3F1" "0,1"
|
|
bitfld.long 0x00 2. "PE2F1,PE2F1" "0,1"
|
|
bitfld.long 0x00 1. "PE1F1,PE1F1" "0,1"
|
|
bitfld.long 0x00 0. "PE0F1,PE0F1" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FR2,PE Function Register 2"
|
|
bitfld.long 0x00 1. "PE1F2,PE1F2" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "OD,PE Open Drain Control Register"
|
|
bitfld.long 0x00 5. "PE5OD,PE5OD" "0,1"
|
|
bitfld.long 0x00 4. "PE4OD,PE4OD" "0,1"
|
|
bitfld.long 0x00 3. "PE3OD,PE3OD" "0,1"
|
|
bitfld.long 0x00 2. "PE2OD,PE2OD" "0,1"
|
|
bitfld.long 0x00 1. "PE1OD,PE1OD" "0,1"
|
|
bitfld.long 0x00 0. "PE0OD,PE0OD" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PUP,PE Pull-up Control Register"
|
|
bitfld.long 0x00 5. "PE5UP,PE5UP" "0,1"
|
|
bitfld.long 0x00 4. "PE4UP,PE4UP" "0,1"
|
|
bitfld.long 0x00 3. "PE3UP,PE3UP" "0,1"
|
|
bitfld.long 0x00 2. "PE2UP,PE2UP" "0,1"
|
|
bitfld.long 0x00 1. "PE1UP,PE1UP" "0,1"
|
|
bitfld.long 0x00 0. "PE0UP,PE0UP" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PDN,PE Pull-Down Control Register"
|
|
bitfld.long 0x00 5. "PE5DN,PE5DN" "0,1"
|
|
bitfld.long 0x00 4. "PE4DN,PE4DN" "0,1"
|
|
bitfld.long 0x00 3. "PE3DN,PE3DN" "0,1"
|
|
bitfld.long 0x00 2. "PE2DN,PE2DN" "0,1"
|
|
bitfld.long 0x00 1. "PE1DN,PE1DN" "0,1"
|
|
bitfld.long 0x00 0. "PE0DN,PE0DN" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IE,PE Input Enable Control Register"
|
|
bitfld.long 0x00 5. "PE5IE,PE5IE" "0,1"
|
|
bitfld.long 0x00 4. "PE4IE,PE4IE" "0,1"
|
|
bitfld.long 0x00 3. "PE3IE,PE3IE" "0,1"
|
|
bitfld.long 0x00 2. "PE2IE,PE2IE" "0,1"
|
|
bitfld.long 0x00 1. "PE1IE,PE1IE" "0,1"
|
|
bitfld.long 0x00 0. "PE0IE,PE0IE" "0,1"
|
|
tree.end
|
|
tree "PF (Port F)"
|
|
base ad:0x400C0500
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,PF Data Register"
|
|
bitfld.long 0x00 3. "PF3,PF3" "0,1"
|
|
bitfld.long 0x00 2. "PF2,PF2" "0,1"
|
|
bitfld.long 0x00 1. "PF1,PF1" "0,1"
|
|
bitfld.long 0x00 0. "PF0,PF0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR,PF Control Register"
|
|
bitfld.long 0x00 3. "PF3C,PF3C" "0,1"
|
|
bitfld.long 0x00 2. "PF2C,PF2C" "0,1"
|
|
bitfld.long 0x00 1. "PF1C,PF1C" "0,1"
|
|
bitfld.long 0x00 0. "PF0C,PF0C" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FR1,PF Function Register 1"
|
|
bitfld.long 0x00 3. "PF3F1,PF3F1" "0,1"
|
|
bitfld.long 0x00 2. "PF2F1,PF2F1" "0,1"
|
|
bitfld.long 0x00 1. "PF1F1,PF1F1" "0,1"
|
|
bitfld.long 0x00 0. "PF0F1,PF0F1" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FR2,PF Function Register 2"
|
|
bitfld.long 0x00 0. "PF0F1,PF0F1" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "OD,PF Open Drain Control Register"
|
|
bitfld.long 0x00 3. "PF3OD,PF3OD" "0,1"
|
|
bitfld.long 0x00 2. "PF2OD,PF2OD" "0,1"
|
|
bitfld.long 0x00 1. "PF1OD,PF1OD" "0,1"
|
|
bitfld.long 0x00 0. "PF0OD,PF0OD" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PUP,PF Pull-up Control Register"
|
|
bitfld.long 0x00 3. "PF3UP,PF3UP" "0,1"
|
|
bitfld.long 0x00 2. "PF2UP,PF2UP" "0,1"
|
|
bitfld.long 0x00 1. "PF1UP,PF1UP" "0,1"
|
|
bitfld.long 0x00 0. "PF0UP,PF0UP" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PDN,PF Pull-Down Control Register"
|
|
bitfld.long 0x00 3. "PF3DN,PF3DN" "0,1"
|
|
bitfld.long 0x00 2. "PF2DN,PF2DN" "0,1"
|
|
bitfld.long 0x00 1. "PF1DN,PF1DN" "0,1"
|
|
bitfld.long 0x00 0. "PF0DN,PF0DN" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IE,PF Input Enable Control Register"
|
|
bitfld.long 0x00 3. "PF3IE,PF3IE" "0,1"
|
|
bitfld.long 0x00 2. "PF2IE,PF2IE" "0,1"
|
|
bitfld.long 0x00 1. "PF1IE,PF1IE" "0,1"
|
|
bitfld.long 0x00 0. "PF0IE,PF0IE" "0,1"
|
|
tree.end
|
|
tree "PG (Port G)"
|
|
base ad:0x400C0600
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,PG Data Register"
|
|
bitfld.long 0x00 1. "PG1,PG1" "0,1"
|
|
bitfld.long 0x00 0. "PG0,PG0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR,PG Control Register"
|
|
bitfld.long 0x00 1. "PG1C,PG1C" "0,1"
|
|
bitfld.long 0x00 0. "PG0C,PG0C" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FR1,PG Function Register 1"
|
|
bitfld.long 0x00 1. "PG1F1,PG1F1" "0,1"
|
|
bitfld.long 0x00 0. "PG0F1,PG0F1" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "OD,PG Open Drain Control Register"
|
|
bitfld.long 0x00 1. "PG1OD,PG1OD" "0,1"
|
|
bitfld.long 0x00 0. "PG0OD,PG0OD" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PUP,PG Pull-up Control Register"
|
|
bitfld.long 0x00 1. "PG1UP,PG1UP" "0,1"
|
|
bitfld.long 0x00 0. "PG0UP,PG0UP" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PDN,PG Pull-Down Control Register"
|
|
bitfld.long 0x00 1. "PG1DN,PG1DN" "0,1"
|
|
bitfld.long 0x00 0. "PG0DN,PG0DN" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SEL,PG input voltage selection Register"
|
|
bitfld.long 0x00 1. "PG1SEL,PG1SEL" "0,1"
|
|
bitfld.long 0x00 0. "PG0SEL,PG0SEL" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IE,PG Input Enable Control Register"
|
|
bitfld.long 0x00 1. "PG1IE,PG1IE" "0,1"
|
|
bitfld.long 0x00 0. "PG0IE,PG0IE" "0,1"
|
|
tree.end
|
|
tree "SC (Serial Channel)"
|
|
repeat 2. (list 0. 1.) (list ad:0x400E1000 ad:0x400E1100)
|
|
tree "SC$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EN,SC Enable Register"
|
|
bitfld.long 0x00 1. "BRCKSEL,BRCKSEL" "0,1"
|
|
bitfld.long 0x00 0. "SIOE,SIOE" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BUF,SC Buffer Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TB_RB,TB_RB"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CR,SC Control Register"
|
|
bitfld.long 0x00 12.--14. "EHOLD,EHOLD" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10. "TXDEMP,TXDEMP" "0,1"
|
|
bitfld.long 0x00 8.--9. "TIDLE,TIDLE" "0,1,2,3"
|
|
rbitfld.long 0x00 7. "RB8,RB8" "0,1"
|
|
bitfld.long 0x00 6. "EVEN,EVEN" "0,1"
|
|
bitfld.long 0x00 5. "PE,PE" "0,1"
|
|
rbitfld.long 0x00 4. "OERR,OERR" "0,1"
|
|
rbitfld.long 0x00 3. "PERR,PERR" "0,1"
|
|
rbitfld.long 0x00 2. "FERR,FERR" "0,1"
|
|
bitfld.long 0x00 1. "SCLKS,SCLKS" "0,1"
|
|
bitfld.long 0x00 0. "IOC,IOC" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "MOD0,SC Mode Control Register 0"
|
|
bitfld.long 0x00 7. "TB8,TB8" "0,1"
|
|
bitfld.long 0x00 6. "CTSE,CTSE" "0,1"
|
|
bitfld.long 0x00 5. "RXE,RXE" "0,1"
|
|
bitfld.long 0x00 4. "WU,WU" "0,1"
|
|
bitfld.long 0x00 2.--3. "SM,SM" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "SC,SC" "0,1,2,3"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BRCR,SC Baud Rate Generator Control Register"
|
|
bitfld.long 0x00 6. "BRADDE,BRADDE" "0,1"
|
|
bitfld.long 0x00 4.--5. "BRCK,BRCK" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "BRS,BRS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BRADD,SC Baud Rate Generator Control Register 2"
|
|
bitfld.long 0x00 0.--3. "BRK,BRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MOD1,SC Mode Control Register 1"
|
|
bitfld.long 0x00 5.--6. "FDPX,FDPX" "0,1,2,3"
|
|
bitfld.long 0x00 4. "TXE,TXE" "0,1"
|
|
bitfld.long 0x00 1.--3. "SINT,SINT" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "MOD2,SC Mode Control Register 2"
|
|
rbitfld.long 0x00 7. "TBEMP,TBEMP" "0,1"
|
|
rbitfld.long 0x00 6. "RBFLL,RBFLL" "0,1"
|
|
rbitfld.long 0x00 5. "TXRUN,TXRUN" "0,1"
|
|
bitfld.long 0x00 4. "SBLEN,SBLEN" "0,1"
|
|
bitfld.long 0x00 3. "DRCHG,DRCHG" "0,1"
|
|
bitfld.long 0x00 2. "WBUF,WBUF" "0,1"
|
|
bitfld.long 0x00 0.--1. "SWRST,SWRST" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RFC,SC RX FIFO Configuration Register"
|
|
bitfld.long 0x00 7. "RFCS,RFCS" "0,1"
|
|
bitfld.long 0x00 6. "RFIS,RFIS" "0,1"
|
|
bitfld.long 0x00 0.--1. "RIL,RIL" "0,1,2,3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TFC,SC TX FIFO Configuration Register"
|
|
bitfld.long 0x00 8. "TBCLR,TBCLR" "0,1"
|
|
bitfld.long 0x00 7. "TFCS,TFCS" "0,1"
|
|
bitfld.long 0x00 6. "TFIS,TFIS" "0,1"
|
|
bitfld.long 0x00 0.--1. "TIL,TIL" "0,1,2,3"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "RST,SC RX FIFO Status Register"
|
|
bitfld.long 0x00 7. "ROR,ROR" "0,1"
|
|
bitfld.long 0x00 0.--2. "RLVL,RLVL" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "TST,SC TX FIFO Status Register"
|
|
bitfld.long 0x00 7. "TUR,TUR" "0,1"
|
|
bitfld.long 0x00 0.--2. "TLVL,TLVL" "0,1,2,3,4,5,6,7"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "FCNF,SC FIFO Configuration Register"
|
|
bitfld.long 0x00 4. "RFST,RFST" "0,1"
|
|
bitfld.long 0x00 3. "TFIE,TFIE" "0,1"
|
|
bitfld.long 0x00 2. "RFIE,RFIE" "0,1"
|
|
bitfld.long 0x00 1. "RXTXCNT,RXTXCNT" "0,1"
|
|
bitfld.long 0x00 0. "CNFG,CNFG" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DMA,SC DMA Request Register"
|
|
bitfld.long 0x00 1. "DMAEN1,DMAEN1" "0,1"
|
|
bitfld.long 0x00 0. "DMAEN0,DMAEN0" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TMR16A (16-bit Timer A)"
|
|
repeat 2. (list 0. 1.) (list ad:0x4008D000 ad:0x4008E000)
|
|
tree "T16A$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EN,Enable Register"
|
|
bitfld.long 0x00 1. "HALT,HALT" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RUN,RUN Register"
|
|
bitfld.long 0x00 0. "RUN,RUN" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 7. "FFEN,FFEN" "0,1"
|
|
bitfld.long 0x00 4.--5. "FFCR,FFCR" "0,1,2,3"
|
|
bitfld.long 0x00 0. "CLK,CLK" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RG,Timer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RG,RG"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "CP,Capture Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CP,CP"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TMRB (16-bit Timer/Event Counter)"
|
|
repeat 8. (list 0. 1. 2. 3. 4. 5. 6. 7.) (list ad:0x400C4000 ad:0x400C4100 ad:0x400C4200 ad:0x400C4300 ad:0x400C4400 ad:0x400C4500 ad:0x400C4600 ad:0x400C4700)
|
|
tree "TB$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EN,TB Enable Register"
|
|
bitfld.long 0x00 7. "TBEN,TBEN" "0,1"
|
|
bitfld.long 0x00 6. "TBHALT,TBHALT" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RUN,TB RUN Register"
|
|
bitfld.long 0x00 2. "TBPRUN,TBPRUN" "0,1"
|
|
bitfld.long 0x00 0. "TBRUN,TBRUN" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CR,TB Control Register"
|
|
bitfld.long 0x00 7. "TBWBF,TBWBF" "0,1"
|
|
bitfld.long 0x00 5. "TBSYNC,TBSYNC" "0,1"
|
|
bitfld.long 0x00 1. "TRGSEL,TRGSEL" "0,1"
|
|
bitfld.long 0x00 0. "CSSEL,CSSEL" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "MOD,TB Mode Register"
|
|
bitfld.long 0x00 8.--10. "TBCPM,TBCPM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6. "TBCP,TBCP" "0,1"
|
|
bitfld.long 0x00 3. "TBCLE,TBCLE" "0,1"
|
|
bitfld.long 0x00 0.--2. "TBCLK,TBCLK" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FFCR,TB Flip-Flop Control Register"
|
|
bitfld.long 0x00 5. "TBC1T1,TBC1T1" "0,1"
|
|
bitfld.long 0x00 4. "TBC0T1,TBC0T1" "0,1"
|
|
bitfld.long 0x00 3. "TBE1T1,TBE1T1" "0,1"
|
|
bitfld.long 0x00 2. "TBE0T1,TBE0T1" "0,1"
|
|
bitfld.long 0x00 0.--1. "TBFF0C,TBFF0C" "0,1,2,3"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "ST,TB Status Register"
|
|
bitfld.long 0x00 2. "INTTBOF,INTTBOF" "0,1"
|
|
bitfld.long 0x00 1. "INTTB1,INTTB1" "0,1"
|
|
bitfld.long 0x00 0. "INTTB0,INTTB0" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IM,TB Interrupt Mask Register"
|
|
bitfld.long 0x00 2. "TBIMOF,TBIMOF" "0,1"
|
|
bitfld.long 0x00 1. "TBIM1,TBIM1" "0,1"
|
|
bitfld.long 0x00 0. "TBIM0,TBIM0" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "UC,TB Read Capture Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TBUC,TBUC"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RG0,TB RG0 Timer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TBRG0,TBRG0"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RG1,TB RG1 Timer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TBRG1,TBRG1"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "CP0,TB CP0 Capture Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TBCP0,TBCP0"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "CP1,TB CP1 Capture Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TBCP1,TBCP1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DMA,TB DMA Enable Register"
|
|
bitfld.long 0x00 2. "TBDMAEN2,TBDMAEN2" "0,1"
|
|
bitfld.long 0x00 1. "TBDMAEN1,TBDMAEN1" "0,1"
|
|
bitfld.long 0x00 0. "TBDMAEN0,TBDMAEN0" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TMRD (16-bit Timer D)"
|
|
tree "TD"
|
|
base ad:0x40058040
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BCR,Update Flag Setting Register"
|
|
bitfld.long 0x00 4. "PHSCHG,PHSCHG" "0,1"
|
|
bitfld.long 0x00 3. "TDSFT11,TDSFT11" "0,1"
|
|
bitfld.long 0x00 2. "TDSFT10,TDSFT10" "0,1"
|
|
bitfld.long 0x00 1. "TDSFT01,TDSFT01" "0,1"
|
|
bitfld.long 0x00 0. "TDSFT00,TDSFT00" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "EN,Timer Enable Register"
|
|
bitfld.long 0x00 7. "TDEN1,TDEN1" "0,1"
|
|
bitfld.long 0x00 6. "TDEN0,TDEN0" "0,1"
|
|
bitfld.long 0x00 5. "TDHALT,TDHALT" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CONF,Timer Configuration Register"
|
|
bitfld.long 0x00 0.--2. "TMRDMOD,TMRDMOD" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "TD0"
|
|
base ad:0x40058000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "RUN,Timer Run Register (Unit0)"
|
|
bitfld.long 0x00 0. "TDRUN,TDRUN" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR,Timer Control Register (Unit0)"
|
|
bitfld.long 0x00 9.--11. "TDMDCY01,TDMDCY01" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8. "TDMDPT01,TDMDPT01" "0,1"
|
|
bitfld.long 0x00 5.--7. "TDMDCY00,TDMDCY00" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. "TDMDPT00,TDMDPT00" "0,1"
|
|
bitfld.long 0x00 2. "TDRDE,TDRDE" "0,1"
|
|
bitfld.long 0x00 0.--1. "TDISO,TDISO" "0,1,2,3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MOD,Timer Mode Register (Unit0)"
|
|
bitfld.long 0x00 7. "TDIV1,TDIV1" "0,1"
|
|
bitfld.long 0x00 6. "TDIV0,TDIV0" "0,1"
|
|
bitfld.long 0x00 4. "TDCLE,TDCLE" "0,1"
|
|
bitfld.long 0x00 0.--3. "TDCLK,TDCLK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMA,DMA Request Enable Register (Unit0)"
|
|
bitfld.long 0x00 0. "DMAEN,DMAEN" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RG0,Timer Register0 (Unit0)"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDRG0,TDRG0"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "RG1,Timer Register1 (Unit0)"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDRG1,TDRG1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "RG2,Timer Register2 (Unit0)"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
hexmask.long.word 0x00 4.--19. 1. "TDRG2,TDRG2"
|
|
bitfld.long 0x00 0.--3. "TDMDRT,TDMDRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RG3,Timer Register3 (Unit0)"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDRG3,TDRG3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RG4,Timer Register4 (Unit0)"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
hexmask.long.word 0x00 4.--19. 1. "TDRG4,TDRG4"
|
|
bitfld.long 0x00 0.--3. "TDMDRT,TDMDRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "RG5,Timer Register5 (Unit0)"
|
|
hexmask.long.word 0x00 1.--16. 1. "TDRG5,TDRG5"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "HSWB0,H-SW Control Circuit Register Buffer0 (Unit0)"
|
|
bitfld.long 0x00 2. "OUTV0,OUTV0" "0,1"
|
|
bitfld.long 0x00 0.--1. "HSWMD0,HSWMD0" "0,1,2,3"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "HSWB1,H-SW Control Circuit Register Buffer1 (Unit0)"
|
|
bitfld.long 0x00 2. "OUTV1,OUTV1" "0,1"
|
|
bitfld.long 0x00 0.--1. "HSWMD1,HSWMD1" "0,1,2,3"
|
|
rgroup.long 0x114++0x03
|
|
line.long 0x00 "CP0,Compare Register0 (Unit0)"
|
|
hexmask.long.word 0x00 0.--15. 1. "CPRG0,CPRG0"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "CP1,Compare Register1 (Unit0)"
|
|
hexmask.long.word 0x00 0.--15. 1. "CPRG1,CPRG1"
|
|
rgroup.long 0x11C++0x03
|
|
line.long 0x00 "CP2,Compare Register2 (Unit0)"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
hexmask.long.word 0x00 4.--19. 1. "CPRG2,CPRG2"
|
|
bitfld.long 0x00 0.--3. "CPMDRT,CPMDRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x120++0x03
|
|
line.long 0x00 "CP3,Compare Register3 (Unit0)"
|
|
hexmask.long.word 0x00 0.--15. 1. "CPRG3,CPRG3"
|
|
rgroup.long 0x124++0x03
|
|
line.long 0x00 "CP4,Compare Register4 (Unit0)"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
hexmask.long.word 0x00 4.--19. 1. "CPRG4,CPRG4"
|
|
bitfld.long 0x00 0.--3. "CPMDRT,CPMDRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x128++0x03
|
|
line.long 0x00 "CP5,Compare Register5 (Unit0)"
|
|
hexmask.long.word 0x00 0.--15. 1. "CPRG5,CPRG5"
|
|
rgroup.long 0x160++0x03
|
|
line.long 0x00 "HSW0,H-SW Control Circuit Register (Unit0)"
|
|
bitfld.long 0x00 2. "OUTV0,OUTV0" "0,1"
|
|
bitfld.long 0x00 0.--1. "HSWMD0,HSWMD0" "0,1,2,3"
|
|
rgroup.long 0x164++0x03
|
|
line.long 0x00 "HSW1,H-SW Control Circuit Register (Unit0)"
|
|
bitfld.long 0x00 2. "OUTV1,OUTV1" "0,1"
|
|
bitfld.long 0x00 0.--1. "HSWMD1,HSWMD1" "0,1,2,3"
|
|
tree.end
|
|
tree "TD1"
|
|
base ad:0x4005802C
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RG0,Timer Register0 (Unit1)"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDRG0,TDRG0"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RG1,Timer Register1 (Unit1)"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDRG1,TDRG1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RG2,Timer Register2 (Unit1)"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
hexmask.long.word 0x00 4.--19. 1. "TDRG2,TDRG2"
|
|
bitfld.long 0x00 0.--3. "TDMDRT,TDMDRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RG3,Timer Register3 (Unit1)"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDRG3,TDRG3"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RG4,Timer Register4 (Unit1)"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
hexmask.long.word 0x00 4.--19. 1. "TDRG4,TDRG4"
|
|
bitfld.long 0x00 0.--3. "TDMDRT,TDMDRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "HSWB0,H-SW Control Circuit Register Buffer0 (Unit1)"
|
|
bitfld.long 0x00 2. "OUTV0,OUTV0" "0,1"
|
|
bitfld.long 0x00 0.--1. "HSWMD0,HSWMD0" "0,1,2,3"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "HSWB1,H-SW Control Circuit Register Buffer1 (Unit1)"
|
|
bitfld.long 0x00 2. "OUTV1,OUTV1" "0,1"
|
|
bitfld.long 0x00 0.--1. "HSWMD1,HSWMD1" "0,1,2,3"
|
|
wgroup.long 0xD4++0x03
|
|
line.long 0x00 "RUN,Timer Run Register (Unit1)"
|
|
bitfld.long 0x00 0. "TDRUN,TDRUN" "0,1"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "CR,Timer Control Register (Unit1)"
|
|
bitfld.long 0x00 9.--11. "TDMDCY11,TDMDCY11" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8. "TDMDPT11,TDMDPT11" "0,1"
|
|
bitfld.long 0x00 5.--7. "TDMDCY10,TDMDCY10" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. "TDMDPT10,TDMDPT10" "0,1"
|
|
bitfld.long 0x00 2. "TDRDE,TDRDE" "0,1"
|
|
bitfld.long 0x00 0.--1. "TDISO,TDISO" "0,1,2,3"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "MOD,Timer Mode Register (Unit1)"
|
|
bitfld.long 0x00 7. "TDIV1,TDIV1" "0,1"
|
|
bitfld.long 0x00 6. "TDIV0,TDIV0" "0,1"
|
|
bitfld.long 0x00 4. "TDCLE,TDCLE" "0,1"
|
|
bitfld.long 0x00 0.--3. "TDCLK,TDCLK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DMA,DMA Request Enable Register (Unit1)"
|
|
bitfld.long 0x00 0. "DMAEN,DMAEN" "0,1"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "CP0,Compare Register0 (Unit1)"
|
|
hexmask.long.word 0x00 0.--15. 1. "CPRG0,CPRG0"
|
|
rgroup.long 0x104++0x03
|
|
line.long 0x00 "CP1,Compare Register1 (Unit1)"
|
|
hexmask.long.word 0x00 0.--15. 1. "CPRG1,CPRG1"
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "CP2,Compare Register2 (Unit1)"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
hexmask.long.word 0x00 4.--19. 1. "CPRG2,CPRG2"
|
|
bitfld.long 0x00 0.--3. "CPMDRT,CPMDRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x10C++0x03
|
|
line.long 0x00 "CP3,Compare Register3 (Unit1)"
|
|
hexmask.long.word 0x00 0.--15. 1. "CPRG3,CPRG3"
|
|
rgroup.long 0x110++0x03
|
|
line.long 0x00 "CP4,Compare Register4 (Unit1)"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
hexmask.long.word 0x00 4.--19. 1. "CPRG4,CPRG4"
|
|
bitfld.long 0x00 0.--3. "CPMDRT,CPMDRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x13C++0x03
|
|
line.long 0x00 "HSW0,H-SW Control Circuit Register (Unit1)"
|
|
bitfld.long 0x00 2. "OUTV0,OUTV0" "0,1"
|
|
bitfld.long 0x00 0.--1. "HSWMD0,HSWMD0" "0,1,2,3"
|
|
rgroup.long 0x140++0x03
|
|
line.long 0x00 "HSW1,H-SW Control Circuit Register (Unit1)"
|
|
bitfld.long 0x00 2. "OUTV1,OUTV1" "0,1"
|
|
bitfld.long 0x00 0.--1. "HSWMD1,HSWMD1" "0,1,2,3"
|
|
tree.end
|
|
tree.end
|
|
tree "TSPI (Serial Interface)"
|
|
base ad:0x40098000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR0,TSPI Control Register 0"
|
|
bitfld.long 0x00 6.--7. "SWRST,SWRST" "0,1,2,3"
|
|
bitfld.long 0x00 0. "TSPIE,TSPIE" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR1,TSPI Control Register 1"
|
|
bitfld.long 0x00 14. "TRXE,TRXE" "0,1"
|
|
bitfld.long 0x00 13. "TSPIMS,TSPIMS" "0,1"
|
|
bitfld.long 0x00 12. "MSTR,MSTR" "0,1"
|
|
bitfld.long 0x00 10.--11. "TMMD,TMMD" "0,1,2,3"
|
|
bitfld.long 0x00 8. "CSSEL,CSSEL" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FC,FC"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CR2,TSPI Control Register 2"
|
|
bitfld.long 0x00 22.--23. "TIDLE,TIDLE" "0,1,2,3"
|
|
bitfld.long 0x00 21. "TXDEMP,TXDEMP" "0,1"
|
|
bitfld.long 0x00 12.--15. "TIL,TIL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "RIL,RIL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "INTTXFE,INTTXFE" "0,1"
|
|
bitfld.long 0x00 6. "INTTXWE,INTTXWE" "0,1"
|
|
bitfld.long 0x00 5. "INTRXFE,INTRXFE" "0,1"
|
|
bitfld.long 0x00 4. "INTRXWE,INTRXWE" "0,1"
|
|
bitfld.long 0x00 2. "INTERR,INTERR" "0,1"
|
|
bitfld.long 0x00 1. "DMATE,DMATE" "0,1"
|
|
bitfld.long 0x00 0. "DMARE,DMARE" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CR3,TSPI Control Register 3"
|
|
bitfld.long 0x00 1. "TFEMPCLR,TFEMPCLR" "0,1"
|
|
bitfld.long 0x00 0. "RFFLLCLR,RFFLLCLR" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BR,TSPI Baud Rate Generator Control Register"
|
|
bitfld.long 0x00 4.--7. "BRCK,BRCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "BRS,BRS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FMTR0,TSPI Format Control Register 0"
|
|
bitfld.long 0x00 31. "DIR,DIR" "0,1"
|
|
bitfld.long 0x00 24.--29. "FL,FL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 20.--23. "FINT,FINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14. "CKPOL,CKPOL" "0,1"
|
|
bitfld.long 0x00 10.--13. "CSINT,CSINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8. "CS0POL,CS0POL" "0,1"
|
|
bitfld.long 0x00 4.--7. "CSSCKDL,CSSCKDL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SCKCSDL,SCKCSDL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FMTR1,TSPI Format Control Register 1"
|
|
bitfld.long 0x00 4.--6. "EHOLD,EHOLD" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "VPE,VPE" "0,1"
|
|
bitfld.long 0x00 0. "VPM,VPM" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DR,TSPI Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "TSPIDR,TSPIDR"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SR,TSPI Status Register"
|
|
rbitfld.long 0x00 31. "TSPISUE,TSPISUE" "0,1"
|
|
rbitfld.long 0x00 23. "TXRUN,TXRUN" "0,1"
|
|
bitfld.long 0x00 22. "TXEND,TXEND" "0,1"
|
|
bitfld.long 0x00 21. "INTTXFF,INTTXFF" "0,1"
|
|
rbitfld.long 0x00 20. "TFEMP,TFEMP" "0,1"
|
|
rbitfld.long 0x00 16.--19. "TLVL,TLVL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 7. "RXRUN,RXRUN" "0,1"
|
|
bitfld.long 0x00 6. "RXEND,RXEND" "0,1"
|
|
bitfld.long 0x00 5. "INTRXFF,INTRXFF" "0,1"
|
|
rbitfld.long 0x00 4. "RFFLL,RFFLL" "0,1"
|
|
rbitfld.long 0x00 0.--3. "RLVL,RLVL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "ERR,TSPI Parity Error Flag Register"
|
|
bitfld.long 0x00 11. "UDRERR,UDRERR" "0,1"
|
|
bitfld.long 0x00 10. "OVRERR,OVRERR" "0,1"
|
|
bitfld.long 0x00 9. "PERR,PERR" "0,1"
|
|
tree.end
|
|
tree "USBD (USB Device Controller)"
|
|
tree "UDFS"
|
|
base ad:0x40008000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INTSTS,Interrupt Status Register"
|
|
bitfld.long 0x00 29. "INT_MW_RERROR,INT_MW_RERROR" "0,1"
|
|
bitfld.long 0x00 28. "INT_POWERDETECT,INT_POWERDETECT" "0,1"
|
|
bitfld.long 0x00 25. "INT_DMAC_REG_RD,INT_DMAC_REG_RD" "0,1"
|
|
bitfld.long 0x00 24. "INT_UDC2_REGINT__RD,INT_UDC2_REGINT__RD" "0,1"
|
|
bitfld.long 0x00 23. "INT_MR_AHBERR,INT_MR_AHBERR" "0,1"
|
|
bitfld.long 0x00 22. "INT_MR_EP_DSET,INT_MR_EP_DSET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "INT_MR_END_ADD,INT_MR_END_ADD" "0,1"
|
|
bitfld.long 0x00 20. "INT_MW_AHBERR,INT_MW_AHBERR" "0,1"
|
|
bitfld.long 0x00 19. "INT_MW_TIMEOUT,INT_MW_TIMEOUT" "0,1"
|
|
bitfld.long 0x00 18. "INT_MW_END_ADD,INT_MW_END_ADD" "0,1"
|
|
bitfld.long 0x00 17. "INT_MW_SET_ADD,INT_MW_SET_ADD" "0,1"
|
|
bitfld.long 0x00 10. "INT_USB_RESET_END,INT_USB_RESET_END" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "INT_USB_RESET,INT_USB_RESET" "0,1"
|
|
bitfld.long 0x00 8. "INT_SUSPEND_RESUME,INT_SUSPEND_RESUME" "0,1"
|
|
rbitfld.long 0x00 7. "INT_NAK,INT_NAK" "0,1"
|
|
rbitfld.long 0x00 6. "INT_EP,INT_EP" "0,1"
|
|
rbitfld.long 0x00 5. "INT_EP0,INT_EP0" "0,1"
|
|
rbitfld.long 0x00 4. "INT_SOF,INT_SOF" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 3. "INT_RX_ZERO,INT_RX_ZERO" "0,1"
|
|
rbitfld.long 0x00 2. "INT_STATUS,INT_STATUS" "0,1"
|
|
rbitfld.long 0x00 1. "INT_STATUS_NAK,INT_STATUS_NAK" "0,1"
|
|
rbitfld.long 0x00 0. "INT_SETUP,INT_SETUP" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTENB,Interrupt Enable Register"
|
|
bitfld.long 0x00 29. "MW_RERROR_EN,MW_RERROR_EN" "0,1"
|
|
bitfld.long 0x00 28. "POWER_DETECT_EN,POWER_DETECT_EN" "0,1"
|
|
bitfld.long 0x00 25. "DMAC_REG_RD_EN,DMAC_REG_RD_EN" "0,1"
|
|
bitfld.long 0x00 24. "UDC2_REG_RD,UDC2_REG_RD" "0,1"
|
|
bitfld.long 0x00 23. "MR_AHBERR,MR_AHBERR" "0,1"
|
|
bitfld.long 0x00 22. "MR_EP_DSET_EN,MR_EP_DSET_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "MR_END_ADD_EN,MR_END_ADD_EN" "0,1"
|
|
bitfld.long 0x00 20. "MW_AHBERR,MW_AHBERR" "0,1"
|
|
bitfld.long 0x00 19. "MW_TIMEOUT,MW_TIMEOUT" "0,1"
|
|
bitfld.long 0x00 18. "MW_END_ADD_EN,MW_END_ADD_EN" "0,1"
|
|
bitfld.long 0x00 17. "MW_SET_ADD_EN,MW_SET_ADD_EN" "0,1"
|
|
bitfld.long 0x00 10. "RESET_END_EN,RESET_END_EN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "RESET_EN,RESET_EN" "0,1"
|
|
bitfld.long 0x00 8. "SUSPEND_RESUME_EN,SUSPEND_RESUME_EN" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MWTOUT,Master Write Timeout Register"
|
|
hexmask.long 0x00 1.--31. 1. "TIMEOUTSET,TIMEOUTSET"
|
|
bitfld.long 0x00 0. "TIMEOUT_EN,TIMEOUT_EN" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "C2STSET,UDC2 setting"
|
|
bitfld.long 0x00 4. "EOPB_ENABLE,EOPB_ENABLE" "0,1"
|
|
bitfld.long 0x00 0. "TX0,TX0" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MSTSET,DMAC setting"
|
|
bitfld.long 0x00 8. "M_BURST_TYPE,M_BURST_TYPE" "0,1"
|
|
bitfld.long 0x00 6. "MR_RESET,MR_RESET" "0,1"
|
|
bitfld.long 0x00 5. "MR_ABORT,MR_ABORT" "0,1"
|
|
bitfld.long 0x00 4. "MR_ENABLE,MR_ENABLE" "0,1"
|
|
bitfld.long 0x00 2. "MW_RESET,MW_RESET" "0,1"
|
|
bitfld.long 0x00 1. "MW_ABORT,MW_ABORT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "MW_ENABLE,MW_ENABLE" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DMACRDREQ,DMAC Read request"
|
|
bitfld.long 0x00 31. "DMARDREQ,DMARDREQ" "0,1"
|
|
bitfld.long 0x00 30. "DMARDCLR,DMARDCLR" "0,1"
|
|
bitfld.long 0x00 2.--7. "DMARDADR,DMARDADR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DMACRDVL,DMAC Read Value"
|
|
hexmask.long 0x00 0.--31. 1. "DMARDDATA,DMARDDATA"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "UDC2RDREQ,UDC2 Read Request"
|
|
bitfld.long 0x00 31. "UDC2RDREQ,UDC2RDREQ" "0,1"
|
|
bitfld.long 0x00 30. "UDC2RDCLR,UDC2RDCLR" "0,1"
|
|
hexmask.long.byte 0x00 2.--9. 1. "UDC2RDADR,UDC2RDADR"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "UDC2RDVL,UDC2 Read Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "UDC2RDATA,UDC2RDATA"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "ARBTSET,Arbiter Setting"
|
|
bitfld.long 0x00 31. "ABT_EN,ABT_EN" "0,1"
|
|
bitfld.long 0x00 28. "ABTMOD,ABTMOD" "0,1"
|
|
bitfld.long 0x00 12.--13. "ABTPRI_W1,ABTPRI_W1" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "ABTPRI_W0,ABTPRI_W0" "0,1,2,3"
|
|
rbitfld.long 0x00 4.--5. "ABTPRI_R1,ABTPRI_R1" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "ABTPRI_R0,ABTPRI_R0" "0,1,2,3"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MWSADR,Master Write Start Address"
|
|
hexmask.long 0x00 0.--31. 1. "MWSADR,MWSADR"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "MWEADR,Master Write End Address"
|
|
hexmask.long 0x00 0.--31. 1. "MWEADR,MWEADR"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "MWCADR,Master Write Current Address"
|
|
hexmask.long 0x00 0.--31. 1. "MWCADR,MWCADR"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "MWAHBADR,Master Write AHB Address"
|
|
hexmask.long 0x00 0.--31. 1. "MWAHBADR,MWAHBADR"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MRSADR,Master Read Start Address"
|
|
hexmask.long 0x00 0.--31. 1. "MRSADR,MRSADR"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "MREADR,Master Read End Address"
|
|
hexmask.long 0x00 0.--31. 1. "MREADR,MREADR"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "MRCADR,Master Read Current Address"
|
|
hexmask.long 0x00 0.--31. 1. "MRCADR,MRCADR"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MRAHBADR,Master Read AHB Address"
|
|
hexmask.long 0x00 0.--31. 1. "MRAHBADR,MRAHBADR"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "PWCTL,Power Detect Control"
|
|
bitfld.long 0x00 7. "WAKEUP_EN,WAKEUP_EN" "0,1"
|
|
bitfld.long 0x00 6. "PHY_REMOTE_WKUP,PHY_REMOTE_WKUP" "0,1"
|
|
bitfld.long 0x00 5. "PHY_RESETB,PHY_RESETB" "0,1"
|
|
rbitfld.long 0x00 4. "SUSPEND_X,SUSPEND_X" "0,1"
|
|
bitfld.long 0x00 3. "PHY_SUSPEND,PHY_SUSPEND" "0,1"
|
|
rbitfld.long 0x00 2. "PW_DETECT,PW_DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PW_RESETB,PW_RESETB" "0,1"
|
|
rbitfld.long 0x00 0. "USB_RESET,USB_RESET" "0,1"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "MSTSTS,Master Status"
|
|
bitfld.long 0x00 4. "MREPEMPTY,MREPEMPTY" "0,1"
|
|
bitfld.long 0x00 3. "MRBFEMP,MRBFEMP" "0,1"
|
|
bitfld.long 0x00 2. "MWBFEMP,MWBFEMP" "0,1"
|
|
bitfld.long 0x00 1. "MREPDSET,MREPDSET" "0,1"
|
|
bitfld.long 0x00 0. "MWEPDSET,MWEPDSET" "0,1"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "TOUTCNT,Timeout Count"
|
|
hexmask.long 0x00 0.--31. 1. "TMOUTCNT,TMOUTCNT"
|
|
tree.end
|
|
tree "UDFS2"
|
|
base ad:0x40008200
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADR,UDC2 Address State"
|
|
bitfld.long 0x00 15. "STAGE_ERR,STAGE_ERR" "0,1"
|
|
bitfld.long 0x00 14. "EP_BI_MODE,EP_BI_MODE" "0,1"
|
|
rbitfld.long 0x00 12.--13. "CUR_SPEED,CUR_SPEED" "0,1,2,3"
|
|
rbitfld.long 0x00 11. "SUSPEND,SUSPEND" "0,1"
|
|
bitfld.long 0x00 10. "CONFIGURED,CONFIGURED" "0,1"
|
|
bitfld.long 0x00 9. "ADDRESSED,ADDRESSED" "0,1"
|
|
bitfld.long 0x00 8. "DEFAULT,DEFAULT" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "DEV_ADR,DEV_ADR"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FRM,UDC2 Frame"
|
|
bitfld.long 0x00 15. "CREATE_SOF,CREATE_SOF" "0,1"
|
|
rbitfld.long 0x00 12.--13. "F_STATUS,F_STATUS" "0,1,2,3"
|
|
hexmask.long.word 0x00 0.--10. 1. "FRAME,FRAME"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CMD,UDC2 Command"
|
|
bitfld.long 0x00 15. "INT_TOGGLE,INT_TOGGLE" "0,1"
|
|
rbitfld.long 0x00 8.--11. "RX_NULLPKT_EP,RX_NULLPKT_EP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EP,EP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COM,COM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "BRQ,UDC2 bRequest-bmRequest Type"
|
|
hexmask.long.byte 0x00 8.--15. 1. "REQUESET,REQUESET"
|
|
bitfld.long 0x00 7. "DIR,DIR" "0,1"
|
|
bitfld.long 0x00 5.--6. "REQ_TYPE,REQ_TYPE" "0,1,2,3"
|
|
bitfld.long 0x00 0.--4. "RECIPIENT,RECIPIENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "WVL,UDC2 wValue"
|
|
hexmask.long.word 0x00 0.--15. 1. "VALUE,VALUE"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "WIDX,UDC2 wIndex"
|
|
hexmask.long.word 0x00 0.--15. 1. "INDEX,INDEX"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "WLGTH,UDC2 wLength"
|
|
hexmask.long.word 0x00 0.--15. 1. "LENGTH,LENGTH"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INT,UDC2 INT"
|
|
bitfld.long 0x00 15. "M_NAK,M_NAK" "0,1"
|
|
bitfld.long 0x00 14. "M_EP,M_EP" "0,1"
|
|
bitfld.long 0x00 13. "M_EP0,M_EP0" "0,1"
|
|
bitfld.long 0x00 12. "M_SOF,M_SOF" "0,1"
|
|
bitfld.long 0x00 11. "M_RX_DATA0,M_RX_DATA0" "0,1"
|
|
bitfld.long 0x00 10. "M_STATUS,M_STATUS" "0,1"
|
|
bitfld.long 0x00 9. "M_STATUS_NAK,M_STATUS_NAK" "0,1"
|
|
bitfld.long 0x00 8. "M_SETUP,M_SETUP" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "I_NAK,I_NAK" "0,1"
|
|
bitfld.long 0x00 6. "I_EP,I_EP" "0,1"
|
|
bitfld.long 0x00 5. "I_EP0,I_EP0" "0,1"
|
|
bitfld.long 0x00 4. "I_SOF,I_SOF" "0,1"
|
|
bitfld.long 0x00 3. "I_RX_DATA0,I_RX_DATA0" "0,1"
|
|
bitfld.long 0x00 2. "I_STATUS,I_STATUS" "0,1"
|
|
bitfld.long 0x00 1. "I_STATUS_NAK,I_STATUS_NAK" "0,1"
|
|
bitfld.long 0x00 0. "I_SETUP,I_SETUP" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTEP,UDC2 INT_EP"
|
|
bitfld.long 0x00 4. "I_EP4,I_EP4" "0,1"
|
|
bitfld.long 0x00 3. "I_EP3,I_EP3" "0,1"
|
|
bitfld.long 0x00 2. "I_EP2,I_EP2" "0,1"
|
|
bitfld.long 0x00 1. "I_EP1,I_EP1" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTEPMSK,UDC2 INT_EP_MASK"
|
|
bitfld.long 0x00 4. "M_EP4,M_EP4" "0,1"
|
|
bitfld.long 0x00 3. "M_EP3,M_EP3" "0,1"
|
|
bitfld.long 0x00 2. "M_EP2,M_EP2" "0,1"
|
|
bitfld.long 0x00 1. "M_EP1,M_EP1" "0,1"
|
|
bitfld.long 0x00 0. "M_EP0,M_EP0" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTRX0,UDC2 INT RX DATA0"
|
|
bitfld.long 0x00 4. "RX_D0_EP4,RX_D0_EP4" "0,1"
|
|
bitfld.long 0x00 3. "RX_D0_EP3,RX_D0_EP3" "0,1"
|
|
bitfld.long 0x00 2. "RX_D0_EP2,RX_D0_EP2" "0,1"
|
|
bitfld.long 0x00 1. "RX_D0_EP1,RX_D0_EP1" "0,1"
|
|
bitfld.long 0x00 0. "RX_D0_EP0,RX_D0_EP0" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "EP0MSZ,UDC2 EP0 Max Packet Size"
|
|
rbitfld.long 0x00 15. "TX_0DATA,TX_0DATA" "0,1"
|
|
rbitfld.long 0x00 12. "DSET,DSET" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "MAX_PKT,MAX_PKT"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "EP0STS,UDC2 EP0 Status"
|
|
bitfld.long 0x00 15. "EP0_MASK,EP0_MASK" "0,1"
|
|
bitfld.long 0x00 12.--13. "TOGGLE,TOGGLE" "0,1,2,3"
|
|
bitfld.long 0x00 9.--11. "STATUS,STATUS" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "EP0DSZ,UDC2 EP0 Data Size"
|
|
hexmask.long.byte 0x00 0.--6. 1. "SIZE,SIZE"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "EP0FIFO,UDC2 EP0 FIFO"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATA,DATA"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "EP1MSZ,UDC2 EP1 Max Packet Size"
|
|
rbitfld.long 0x00 15. "TX_0DATA,TX_0DATA" "0,1"
|
|
rbitfld.long 0x00 12. "DSET,DSET" "0,1"
|
|
hexmask.long.word 0x00 0.--10. 1. "MAX_PKT,MAX_PKT"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "EP1STS,UDC2 EP1 Status"
|
|
bitfld.long 0x00 15. "PKT_MODE,PKT_MODE" "0,1"
|
|
bitfld.long 0x00 14. "BUS_SEL,BUS_SEL" "0,1"
|
|
rbitfld.long 0x00 12.--13. "TOGGLE,TOGGLE" "0,1,2,3"
|
|
rbitfld.long 0x00 9.--11. "STATUS,STATUS" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 8. "DISABLE,DISABLE" "0,1"
|
|
bitfld.long 0x00 7. "DIR,DIR" "0,1"
|
|
bitfld.long 0x00 2.--3. "T_TYPE,T_TYPE" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "NUM_MF,NUM_MF" "0,1,2,3"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "EP1DSZ,UDC2 EP1 Data Size"
|
|
hexmask.long.word 0x00 0.--10. 1. "SIZE,SIZE"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "EP1FIFO,UDC2 EP1 FIFO"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATA,DATA"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "EP2MSZ,UDC2 EP2 Max Packet Size"
|
|
rbitfld.long 0x00 15. "TX_0DATA,TX_0DATA" "0,1"
|
|
rbitfld.long 0x00 12. "DSET,DSET" "0,1"
|
|
hexmask.long.word 0x00 0.--10. 1. "MAX_PKT,MAX_PKT"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "EP2STS,UDC2 EP2 Status"
|
|
bitfld.long 0x00 15. "PKT_MODE,PKT_MODE" "0,1"
|
|
bitfld.long 0x00 14. "BUS_SEL,BUS_SEL" "0,1"
|
|
rbitfld.long 0x00 12.--13. "TOGGLE,TOGGLE" "0,1,2,3"
|
|
rbitfld.long 0x00 9.--11. "STATUS,STATUS" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 8. "DISABLE,DISABLE" "0,1"
|
|
bitfld.long 0x00 7. "DIR,DIR" "0,1"
|
|
bitfld.long 0x00 2.--3. "T_TYPE,T_TYPE" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "NUM_MF,NUM_MF" "0,1,2,3"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "EP2DSZ,UDC2 EP2 Data Size"
|
|
hexmask.long.word 0x00 0.--10. 1. "SIZE,SIZE"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "EP2FIFO,UDC2 EP2 FIFO"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATA,DATA"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "EP3MSZ,UDC2 EP3 Max Packet Size"
|
|
rbitfld.long 0x00 15. "TX_0DATA,TX_0DATA" "0,1"
|
|
rbitfld.long 0x00 12. "DSET,DSET" "0,1"
|
|
hexmask.long.word 0x00 0.--10. 1. "MAX_PKT,MAX_PKT"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "EP3STS,UDC2 EP3 Status"
|
|
bitfld.long 0x00 15. "PKT_MODE,PKT_MODE" "0,1"
|
|
bitfld.long 0x00 14. "BUS_SEL,BUS_SEL" "0,1"
|
|
rbitfld.long 0x00 12.--13. "TOGGLE,TOGGLE" "0,1,2,3"
|
|
rbitfld.long 0x00 9.--11. "STATUS,STATUS" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 8. "DISABLE,DISABLE" "0,1"
|
|
bitfld.long 0x00 7. "DIR,DIR" "0,1"
|
|
bitfld.long 0x00 2.--3. "T_TYPE,T_TYPE" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "NUM_MF,NUM_MF" "0,1,2,3"
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "EP3DSZ,UDC2 EP3 Data Size"
|
|
hexmask.long.word 0x00 0.--10. 1. "SIZE,SIZE"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "EP3FIFO,UDC2 EP3 FIFO"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATA,DATA"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "EP4MSZ,UDC2 EP4 Max Packet Size"
|
|
rbitfld.long 0x00 15. "TX_0DATA,TX_0DATA" "0,1"
|
|
rbitfld.long 0x00 12. "DSET,DSET" "0,1"
|
|
hexmask.long.word 0x00 0.--10. 1. "MAX_PKT,MAX_PKT"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "EP4STS,UDC2 EP4 Status"
|
|
bitfld.long 0x00 15. "PKT_MODE,PKT_MODE" "0,1"
|
|
bitfld.long 0x00 14. "BUS_SEL,BUS_SEL" "0,1"
|
|
rbitfld.long 0x00 12.--13. "TOGGLE,TOGGLE" "0,1,2,3"
|
|
rbitfld.long 0x00 9.--11. "STATUS,STATUS" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 8. "DISABLE,DISABLE" "0,1"
|
|
bitfld.long 0x00 7. "DIR,DIR" "0,1"
|
|
bitfld.long 0x00 2.--3. "T_TYPE,T_TYPE" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "NUM_MF,NUM_MF" "0,1,2,3"
|
|
rgroup.long 0x78++0x03
|
|
line.long 0x00 "EP4DSZ,UDC2 EP4 Data Size"
|
|
hexmask.long.word 0x00 0.--10. 1. "SIZE,SIZE"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "EP4FIFO,UDC2 EP4 FIFO"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATA,DATA"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "INTNAK,UDC2 INT NAK"
|
|
bitfld.long 0x00 3. "I_EP3,I_EP3" "0,1"
|
|
bitfld.long 0x00 2. "I_EP2,I_EP2" "0,1"
|
|
bitfld.long 0x00 1. "I_EP1,I_EP1" "0,1"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "INTNAKMSK,UDC2 INT NAK MASK"
|
|
bitfld.long 0x00 3. "M_EP3,M_EP3" "0,1"
|
|
bitfld.long 0x00 2. "M_EP2,M_EP2" "0,1"
|
|
bitfld.long 0x00 1. "M_EP1,M_EP1" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "WDT (Watchdog Timer)"
|
|
base ad:0x400F2000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MOD,WD Mode Register"
|
|
bitfld.long 0x00 7. "WDTE,WDTE" "0,1"
|
|
bitfld.long 0x00 4.--6. "WDTP,WDTP" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "RESCR,RESCR" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CR,WD Control Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WDCR,WDCR"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "FLG,WD Flag Register"
|
|
bitfld.long 0x00 0. "FLG,FLG" "0,1"
|
|
tree.end
|
|
autoindent.off
|
|
newline
|