4112 lines
302 KiB
Plaintext
4112 lines
302 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: TLE984x On-Chip Peripherals
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; @Props: Released
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; @Author: AST, WWE, RSA, JDU, NEJ
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; @Changelog: 2016-10-03 WWE
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; 2022-02-22 RSA
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; 2023-03-06 JDU
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; 2023-11-06 NEJ
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; @Manufacturer: INFINEON - Infineon Technologies AG
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; @Doc: Generated (TRACE32, build: 164232.), based on:
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; TLE984x.svd (Ver. 1.9.5)
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; @Core: Cortex-M0
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; @Chip: TLE98422QX, TLE9842QX, TLE98432QX, TLE9843QX, TLE98442QX, TLE9844QX,
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; TLE9845QX
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; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pertle984x.per 16952 2023-11-08 13:36:10Z kwisniewski $
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AUTOINDENT.ON CENTER TREE
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ENUMDELIMITER ","
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base ad:0x0
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tree.close "Core Registers (Cortex-M0)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 0x8
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if (CORENAME()=="CORTEXM1")
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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else
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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endif
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if (CORENAME()=="CORTEXM1")
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
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bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
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else
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
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endif
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rgroup.long 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
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hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
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textline " "
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hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
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hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
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group.long 0xd04++0x03
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
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bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
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bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
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bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
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hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
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textline " "
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hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
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if (CORENAME()=="CORTEXM0+")
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group.long 0xd08++0x03
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line.long 0x00 "VTOR,Vector Table Offset Register"
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hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
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else
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textline " "
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endif
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group.long 0xd0c++0x03
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line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
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bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
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textline " "
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bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
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bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
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group.long 0xd10++0x03
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line.long 0x00 "SCR,System Control Register"
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bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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rgroup.long 0xd14++0x03
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line.long 0x00 "CCR,Configuration and Control Register"
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bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
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bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
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group.long 0xd1c++0x0b
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
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bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
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if (CORENAME()=="CORTEXM0+")
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hgroup.long 0x08++0x03
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hide.long 0x00 "ACTLR,Auxiliary Control Register"
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else
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textline " "
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endif
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Nested Vectored Interrupt Controller (NVIC)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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tree "Interrupt Enable Registers"
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group.long 0x100++0x03
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line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
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setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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tree.end
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tree "Interrupt Pending Registers"
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group.long 0x200++0x03
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line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
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setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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tree.end
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width 6.
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tree "Interrupt Priority Registers"
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group.long 0x400++0x1F
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line.long 0x00 "INT0,Interrupt Priority Register"
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bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
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bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
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bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
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bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
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line.long 0x04 "INT1,Interrupt Priority Register"
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bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
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bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
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bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
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bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
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line.long 0x08 "INT2,Interrupt Priority Register"
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bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
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bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
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bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
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bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
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line.long 0x0C "INT3,Interrupt Priority Register"
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bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
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bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
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bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
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bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
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line.long 0x10 "INT4,Interrupt Priority Register"
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bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
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bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
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bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
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bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
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line.long 0x14 "INT5,Interrupt Priority Register"
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bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "ADC (Analog Digital Converter)"
|
|
base ad:0x0
|
|
tree "ADC1 (10-bit Analog Digital Converter)"
|
|
base ad:0x40004000
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "CAL_CH0_1,Calibration for channel 0 and 1 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CALGAIN_CH1,Gain calibration for channel 1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "CALOFFS_CH1,Offset calibration for channel 1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CALGAIN_CH0,Gain calibration for channel 0"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "CALOFFS_CH0,Offset calibration for channel 0"
|
|
group.long 0x5C++0x3
|
|
line.long 0x0 "CAL_CH10_11,Calibration for channel 10 and 11 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CALGAIN_CH11,Gain calibration for channel 11"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "CALOFFS_CH11,Offset calibration for channel 11"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CALGAIN_CH10,Gain calibration for channel 10"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "CALOFFS_CH10,Offset calibration for channel 10"
|
|
group.long 0x4C++0xF
|
|
line.long 0x0 "CAL_CH2_3,Calibration for channel 2 and 3 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CALGAIN_CH3,Gain calibration for channel 3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "CALOFFS_CH3,Offset calibration for channel 3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CALGAIN_CH2,Gain calibration for channel 2"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "CALOFFS_CH2,Offset calibration for channel 2"
|
|
line.long 0x4 "CAL_CH4_5,Calibration for channel 4 and 5 register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "CALGAIN_CH5,Gain calibration for channel 5"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--20. 1. "CALOFFS_CH5,Offset calibration for channel 5"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "CALGAIN_CH4,Gain calibration for channel 4"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--4. 1. "CALOFFS_CH4,Offset calibration for channel 4"
|
|
line.long 0x8 "CAL_CH6_7,Calibration for channel 6 and 7 register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "CALGAIN_CH7,Gain calibration for channel 7"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--20. 1. "CALOFFS_CH7,Offset calibration for channel 7"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "CALGAIN_CH6,Gain calibration for channel 6"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--4. 1. "CALOFFS_CH6,Offset calibration for channel 6"
|
|
line.long 0xC "CAL_CH8_9,Calibration for channel 8 and 9 register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "CALGAIN_CH9,Gain calibration for channel 9"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--20. 1. "CALOFFS_CH9,Offset calibration for channel 9"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "CALGAIN_CH8,Gain calibration for channel 8"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "CALOFFS_CH8,Offset calibration for channel 8"
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "CHx_EIM,Channel setting bits for exceptional interrupt measurement register"
|
|
bitfld.long 0x0 16.--18. "ADC1_EIM_TRIG_SEL,Trigger selection for exceptional interrupt measurement (EIM)" "0: None,1: COUT63,2: GPT12_T6OUT,3: GPT12_T3OUT,4: t2_adc_trigger,5: t21_adc_trigger,?,?"
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bitfld.long 0x0 11. "EIM_EN,Exceptional interrupt measurement (EIM) Trigger Event enable" "0: Start of EIM disabled,1: Start of EIM enabled"
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bitfld.long 0x0 8.--10. "EIM_REP,Repeat count for exceptional interrupt measurement (EIM)" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 64 measurements,7: 128 measurements"
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hexmask.long.byte 0x0 0.--3. 1. "EIM_CHx,Channel set for exceptional interrupt measurement (EIM)"
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line.long 0x4 "CHx_ESM,Channel setting bits for exceptional sequence measurement register"
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bitfld.long 0x4 31. "ESM_STS,Exceptional sequence measurement is finished" "0: Exceptional Sequence Measurement not done,1: Exceptional Sequence Measurement done"
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newline
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bitfld.long 0x4 30. "ESM_EN,Enable for Exceptional Sequence Measurement Trigger Event" "0: Start of ESM disabled,1: Start of ESM enabled"
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bitfld.long 0x4 16.--18. "ADC1_ESM_TRIG_SEL,Trigger selection for exceptional interrupt measurement (ESM)" "0: None,1: COUT63,2: GPT12_T6OUT,3: GPT12_T3OUT,4: t2_adc_trigger,5: t21_adc_trigger,?,?"
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hexmask.long.word 0x4 0.--11. 1. "ESM_0,Channel sequence for exceptional sequence measurement (ESM)"
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group.long 0xD8++0x3
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line.long 0x0 "CNT0_3_LOWER,Lower counter trigger level channel 0-3 register"
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bitfld.long 0x0 27.--28. "HYST_LO_CH3,Channel 3 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 24.--26. "CNT_LO_CH3,Lower timer trigger threshold channel 3" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 19.--20. "HYST_LO_CH2,Channel 2 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 16.--18. "CNT_LO_CH2,Lower timer trigger threshold channel 2" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 11.--12. "HYST_LO_CH1,Channel 1 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 8.--10. "CNT_LO_CH1,Lower timer trigger threshold channel 1" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 3.--4. "HYST_LO_CH0,Channel 0 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 0.--2. "CNT_LO_CH0,Lower timer trigger threshold channel 0" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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group.long 0xE8++0x3
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line.long 0x0 "CNT0_3_UPPER,Upper counter trigger level channel 0-3 register"
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bitfld.long 0x0 27.--28. "HYST_UP_CH3,Channel 3 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 24.--26. "CNT_UP_CH3,Upper timer trigger threshold channel 3" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 19.--20. "HYST_UP_CH2,Channel 2 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 16.--18. "CNT_UP_CH2,Upper timer trigger threshold channel 2" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 11.--12. "HYST_UP_CH1,Channel 1 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 8.--10. "CNT_UP_CH1,Upper timer trigger threshold channel 1" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 3.--4. "HYST_UP_CH0,Channel 0 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 0.--2. "CNT_UP_CH0,Upper timer trigger threshold channel 0" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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group.long 0xDC++0x3
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line.long 0x0 "CNT4_7_LOWER,Lower counter trigger level channel 4-7 register"
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bitfld.long 0x0 27.--28. "HYST_LO_CH7,Channel 7 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 24.--26. "CNT_LO_CH7,Lower timer trigger threshold channel 7" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 19.--20. "HYST_LO_CH6,Channel 6 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 16.--18. "CNT_LO_CH6,Lower timer trigger threshold channel 6" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 11.--12. "HYST_LO_CH5,Channel 5 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 8.--10. "CNT_LO_CH5,Lower timer trigger threshold channel 5" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 3.--4. "HYST_LO_CH4,Channel 4 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 0.--2. "CNT_LO_CH4,Lower timer trigger threshold channel 4" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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group.long 0xEC++0x3
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line.long 0x0 "CNT4_7_UPPER,Upper counter trigger level channel 4-7 register"
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bitfld.long 0x0 27.--28. "HYST_UP_CH7,Channel 7 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 24.--26. "CNT_UP_CH7,Upper timer trigger threshold channel 7" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 19.--20. "HYST_UP_CH6,Channel 6 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 16.--18. "CNT_UP_CH6,Upper timer trigger threshold channel 6" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 11.--12. "HYST_UP_CH5,Channel 5 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 8.--10. "CNT_UP_CH5,Upper timer trigger threshold channel 5" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 3.--4. "HYST_UP_CH4,Channel 4 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 0.--2. "CNT_UP_CH4,Upper timer trigger threshold channel 4" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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group.long 0xE0++0x3
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line.long 0x0 "CNT8_11_LOWER,Lower counter trigger level channel 8-11 register"
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bitfld.long 0x0 27.--28. "HYST_LO_CH11,Channel 11 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 24.--26. "CNT_LO_CH11,Lower timer trigger threshold channel 11" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 19.--20. "HYST_LO_CH10,Channel 10 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 16.--18. "CNT_LO_CH10,Lower timer trigger threshold channel 10" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 11.--12. "HYST_LO_CH9,Channel 9 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 8.--10. "CNT_LO_CH9,Lower timer trigger threshold channel 9" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 3.--4. "HYST_LO_CH8,Channel 8 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 0.--2. "CNT_LO_CH8,Lower timer trigger threshold channel 8" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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group.long 0xF0++0x3
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line.long 0x0 "CNT8_11_UPPER,Upper counter trigger level channel 8-11 register"
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bitfld.long 0x0 27.--28. "HYST_UP_CH11,Channel 11 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 24.--26. "CNT_UP_CH11,Upper timer trigger threshold channel 11" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 19.--20. "HYST_UP_CH10,Channel 10 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 16.--18. "CNT_UP_CH10,Upper timer trigger threshold channel 10" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 11.--12. "HYST_UP_CH9,Channel 9 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 8.--10. "CNT_UP_CH9,Upper timer trigger threshold channel 9" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 3.--4. "HYST_UP_CH8,Channel 8 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 0.--2. "CNT_UP_CH8,Upper timer trigger threshold channel 8" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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group.long 0x0++0x3
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line.long 0x0 "CTRL_STS,ADC1 control and status register"
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bitfld.long 0x0 18. "STRTUP_DIS,DPP1 startup disable" "0: DPP1 start-up enabled,1: DPP1 start-up disable"
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newline
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hexmask.long.byte 0x0 8.--11. 1. "SW_CH_SEL,Channel for software mode"
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newline
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rbitfld.long 0x0 7. "EOC,ADC1 End of Conversion (software mode)" "0: Conversion still running,1: Conversion has finished"
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newline
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rbitfld.long 0x0 5. "CAL_SIGN,Output of comparator to steer gain/offset calibration" "0,1"
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newline
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rbitfld.long 0x0 4. "READY,HVADC ready bit" "0: Module in power-down or in init phase,1: Set automatically 5 ADC clock cycles after.."
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newline
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bitfld.long 0x0 2. "SOS,ADC1 Start of sampling/conversion (software mode)" "0: No conversion is started,1: Conversion is started"
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newline
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bitfld.long 0x0 0. "PD_N,ADC1 Power-down signal" "0: ADC1 is powered down,1: ADC1 is switched on"
|
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group.long 0x14++0x7
|
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line.long 0x0 "CTRL2,Measurement unit 1 control 2 register"
|
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hexmask.long.word 0x0 0.--11. 1. "CAL_EN,Calibration enable for channels 0 to 11"
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line.long 0x4 "CTRL3,Measurement unit 1 control 3 register"
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hexmask.long.byte 0x4 16.--19. 1. "SAMPLE_TIME_LVCH,Sample time of ADC1"
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hexmask.long.byte 0x4 8.--11. 1. "SAMPLE_TIME_HVCH,Sample time of ADC1"
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newline
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rbitfld.long 0x4 7. "MCM_RDY,Ready signal for MCM (Measurement core module) after power on or reset" "0: Measurement core module in start-up phase,1: Measurement core module start-up phase finished"
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rbitfld.long 0x4 6. "EoC_FAIL,Fail of ADC end of conversion signal" "0: End of conversion signal was sent properly by ADC,1: End of conversion signal was not sent properly.."
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bitfld.long 0x4 4. "EoC_FAIL_CLR,Fail of ADC end of conversion signal clear" "0: No clear of EoC_FAIL flag,1: Clear of EoC_FAIL flag"
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bitfld.long 0x4 1. "SW_MODE,Software mode enable" "0: Sequencer running,1: Sequencer stopped"
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newline
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bitfld.long 0x4 0. "MCM_PD_N,Power-down signal for MCM" "0: Measurement core module disabled,1: Measurement core module enabled"
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group.long 0x38++0x3
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line.long 0x0 "CTRL4,Measurement unit 1 control 4 register"
|
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hexmask.long.byte 0x0 0.--3. 1. "MAX_CALTIME,Maximum ADC calibration time"
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group.long 0x1C++0x3
|
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line.long 0x0 "CTRL5,Measurement unit 1 control 5 register"
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hexmask.long.word 0x0 0.--11. 1. "FILT_OUT_SEL_11_0,Output filter selection for channels 0 to 11"
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group.long 0xE4++0x3
|
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line.long 0x0 "DCHCNT1_4_LOWER,Lower counter trigger level differential channel 1-4 register"
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bitfld.long 0x0 27.--28. "HYST_LO_DCH4,Differential Channel 4 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 24.--26. "CNT_LO_DCH4,Lower timer trigger threshold differential channel 4" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 19.--20. "HYST_LO_DCH3,Differential Channel 3 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 16.--18. "CNT_LO_DCH3,Lower timer trigger threshold differential channel 3" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 11.--12. "HYST_LO_DCH2,Differential Channel 2 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 8.--10. "CNT_LO_DCH2,Lower timer trigger threshold differential channel 2" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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bitfld.long 0x0 3.--4. "HYST_LO_DCH1,Differential Channel 1 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 0.--2. "CNT_LO_DCH1,Lower timer trigger threshold differential channel 1" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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group.long 0xF4++0x3
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line.long 0x0 "DCHCNT1_4_UPPER,Upper counter trigger level differential channel 1-4 register"
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bitfld.long 0x0 27.--28. "HYST_UP_DCH4,Differential channel 4 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 24.--26. "CNT_UP_DCH4,Upper timer trigger threshold differential channel 4" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 15 measurements,5: 15 measurements,6: 15 measurements,7: 15 measurements"
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bitfld.long 0x0 19.--20. "HYST_UP_DCH3,Differential channel 3 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 16.--18. "CNT_UP_DCH3,Upper timer trigger threshold differential channel 3" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 15 measurements,5: 15 measurements,6: 15 measurements,7: 15 measurements"
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bitfld.long 0x0 11.--12. "HYST_UP_DCH2,Differential channel 2 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 8.--10. "CNT_UP_DCH2,Upper timer trigger threshold differential channel 2" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 15 measurements,5: 15 measurements,6: 15 measurements,7: 15 measurements"
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bitfld.long 0x0 3.--4. "HYST_UP_DCH1,Differential channel 1 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
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bitfld.long 0x0 0.--2. "CNT_UP_DCH1,Upper timer trigger threshold differential channel 1" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 15 measurements,5: 15 measurements,6: 15 measurements,7: 15 measurements"
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group.long 0xC4++0x3
|
|
line.long 0x0 "DCHTH1_4_LOWER,Lower comparator trigger level differential channel 1-4 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DCH4_LOW,Differential channel 4 lower trigger level"
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|
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hexmask.long.byte 0x0 16.--23. 1. "DCH3_LOW,Differential channel 3 lower trigger level"
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newline
|
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hexmask.long.byte 0x0 8.--15. 1. "DCH2_LOW,Differential channel 2 lower trigger level"
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|
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hexmask.long.byte 0x0 0.--7. 1. "DCH1_LOW,Differential channel 1 lower trigger level"
|
|
group.long 0xD4++0x3
|
|
line.long 0x0 "DCHTH1_4_UPPER,Upper comparator trigger level differential channel 1-4 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DCH4_UP,Differential channel 4 upper trigger level"
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newline
|
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hexmask.long.byte 0x0 16.--23. 1. "DCH3_UP,Differential channel 3 upper trigger level"
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newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DCH2_UP,Differential channel 2 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "DCH1_UP,Differential channel 1 upper trigger level"
|
|
group.long 0xA0++0xF
|
|
line.long 0x0 "DIFFCH_OUT1,ADC1 differential channel output 1 register"
|
|
rbitfld.long 0x0 18. "DOF1,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
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|
newline
|
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rbitfld.long 0x0 17. "DVF1,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
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|
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|
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bitfld.long 0x0 16. "DWFR1,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "DCH1,ADC differential output value 1"
|
|
line.long 0x4 "DIFFCH_OUT2,ADC1 differential channel output 2 register"
|
|
rbitfld.long 0x4 18. "DOF2,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
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|
newline
|
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rbitfld.long 0x4 17. "DVF2,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
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newline
|
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bitfld.long 0x4 16. "DWFR2,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x4 0.--11. 1. "DCH2,ADC differential output value 2"
|
|
line.long 0x8 "DIFFCH_OUT3,ADC1 differential channel output 3 register"
|
|
rbitfld.long 0x8 18. "DOF3,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x8 17. "DVF3,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x8 16. "DWFR3,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x8 0.--11. 1. "DCH3,ADC differential output value 3"
|
|
line.long 0xC "DIFFCH_OUT4,ADC1 differential channel output 4 register"
|
|
rbitfld.long 0xC 18. "DOF4,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
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rbitfld.long 0xC 17. "DVF4,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0xC 16. "DWFR4,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0xC 0.--11. 1. "DCH4,ADC differential output value 4"
|
|
group.long 0xFC++0x3
|
|
line.long 0x0 "DUIN_SEL,Measurement unit 1 - Differential unit input selection register"
|
|
rbitfld.long 0x0 28. "DU4RES_NEG,Differential unit 4 result negative" "0: Differential unit 4 result positive after..,1: Differential unit 4 result negative after.."
|
|
newline
|
|
bitfld.long 0x0 24. "DU4_EN,Differential unit 4 enable" "0: Differential unit 4 is disabled,1: Differential unit 4 is enabled"
|
|
newline
|
|
rbitfld.long 0x0 20. "DU3RES_NEG,Differential unit 3 result negative" "0: Differential unit 3 result positive after..,1: Differential unit 3 result negative after.."
|
|
newline
|
|
bitfld.long 0x0 16. "DU3_EN,Differential unit 3 enable" "0: Differential unit 3 is disabled,1: Differential unit 3 is enabled"
|
|
newline
|
|
rbitfld.long 0x0 12. "DU2RES_NEG,Differential unit 2 result negative" "0: Differential unit 2 result positive after..,1: Differential unit 2 result negative after.."
|
|
newline
|
|
bitfld.long 0x0 8. "DU2_EN,Differential unit 2 enable" "0: Differential unit 2 is disabled,1: Differential unit 2 is enabled"
|
|
newline
|
|
rbitfld.long 0x0 4. "DU1RES_NEG,Differential unit 1 result negative" "0: Differential unit 1 result positive after..,1: Differential unit 1 result negative after.."
|
|
newline
|
|
bitfld.long 0x0 0. "DU1_EN,Differential unit 1 enable" "0: Differential unit 1 is disabled,1: Differential unit 1 is enabled"
|
|
group.long 0xB4++0x3
|
|
line.long 0x0 "FILT_LO_CTRL,Lower Threshold filter enable"
|
|
bitfld.long 0x0 11. "FL_CH11_EN,Lower threshold IIR filter enable channel 11" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 10. "FL_CH10_EN,Lower threshold IIR filter enable channel 10" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 9. "FL_CH9_EN,Lower threshold IIR filter enable channel 9" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 8. "FL_CH8_EN,Lower threshold IIR filter enable channel 8" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 7. "FL_CH7_EN,Lower threshold IIR filter enable channel 7" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "FL_CH6_EN,Lower threshold IIR filter enable channel 6" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 5. "FL_CH5_EN,Lower threshold IIR filter enable channel 5" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 4. "FL_CH4_EN,Lower threshold IIR filter enable channel 4" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "FL_CH3_EN,Lower threshold IIR filter enable channel 3" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 2. "FL_CH2_EN,Lower threshold IIR filter enable channel 2" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "FL_CH1_EN,Lower threshold IIR filter enable channel 1" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 0. "FL_CH0_EN,Lower threshold IIR filter enable channel 0" "0: Disable,1: Enable"
|
|
group.long 0x70++0x7
|
|
line.long 0x0 "FILT_OUT0,ADC1 or filter output channel 0 register"
|
|
rbitfld.long 0x0 18. "OF0,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x0 17. "VF0,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
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bitfld.long 0x0 16. "WFR0,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "FILT_OUT_CH0,ADC or filter output value channel 0"
|
|
line.long 0x4 "FILT_OUT1,ADC1 or filter output channel 1 register"
|
|
rbitfld.long 0x4 18. "OF1,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x4 17. "VF1,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x4 16. "WFR1,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x4 0.--11. 1. "FILT_OUT_CH1,ADC or filter output value channel 1"
|
|
group.long 0x98++0x7
|
|
line.long 0x0 "FILT_OUT10,ADC1 or filter output channel 10 register"
|
|
rbitfld.long 0x0 18. "OF10,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
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rbitfld.long 0x0 17. "VF10,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
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bitfld.long 0x0 16. "WFR10,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "FILT_OUT_CH10,ADC or filter output value channel 10"
|
|
line.long 0x4 "FILT_OUT11,ADC1 or filter output channel 11 register"
|
|
rbitfld.long 0x4 18. "OF11,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x4 17. "VF11,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x4 16. "WFR11,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x4 0.--11. 1. "FILT_OUT_CH11,ADC or filter output value channel 11"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "FILT_OUT12,ADC1 or filter output channel 12 register"
|
|
rbitfld.long 0x0 18. "OF12,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
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rbitfld.long 0x0 17. "VF12,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x0 16. "WFR12,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "FILT_OUT_CH12,ADC or filter output value channel 12"
|
|
group.long 0x78++0x1F
|
|
line.long 0x0 "FILT_OUT2,ADC1 or filter output channel 2 register"
|
|
rbitfld.long 0x0 18. "OF2,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x0 17. "VF2,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x0 16. "WFR2,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "FILT_OUT_CH2,ADC or filter output value channel 2"
|
|
line.long 0x4 "FILT_OUT3,ADC1 or filter output channel 3 register"
|
|
rbitfld.long 0x4 18. "OF3,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x4 17. "VF3,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x4 16. "WFR3,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x4 0.--11. 1. "FILT_OUT_CH3,ADC or filter output value channel 3"
|
|
line.long 0x8 "FILT_OUT4,ADC1 or filter output channel 4 register"
|
|
rbitfld.long 0x8 18. "OF4,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x8 17. "VF4,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x8 16. "WFR4,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x8 0.--11. 1. "FILT_OUT_CH4,ADC or filter output value channel 4"
|
|
line.long 0xC "FILT_OUT5,ADC1 or filter output channel 5 register"
|
|
rbitfld.long 0xC 18. "OF5,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0xC 17. "VF5,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0xC 16. "WFR5,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0xC 0.--11. 1. "FILT_OUT_CH5,ADC or filter output value channel 5"
|
|
line.long 0x10 "FILT_OUT6,ADC1 or filter output channel 6 register"
|
|
rbitfld.long 0x10 18. "OF6,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x10 17. "VF6,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x10 16. "WFR6,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. "FILT_OUT_CH6,ADC or filter output value channel 6"
|
|
line.long 0x14 "FILT_OUT7,ADC1 or filter output channel 7 register"
|
|
rbitfld.long 0x14 18. "OF7,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
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rbitfld.long 0x14 17. "VF7,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x14 16. "WFR7,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x14 0.--11. 1. "FILT_OUT_CH7,ADC or filter output value channel 7"
|
|
line.long 0x18 "FILT_OUT8,ADC1 or filter output channel 8 register"
|
|
rbitfld.long 0x18 18. "OF8,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x18 17. "VF8,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x18 16. "WFR8,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x18 0.--11. 1. "FILT_OUT_CH8,ADC or filter output value channel 8"
|
|
line.long 0x1C "FILT_OUT9,ADC1 or filter output channel 9 register"
|
|
rbitfld.long 0x1C 18. "OF9,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x1C 17. "VF9,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x1C 16. "WFR9,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--11. 1. "FILT_OUT_CH9,ADC or filter output value channel 9"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "FILT_OUTEIM,ADC1 or filter output of EIM register"
|
|
rbitfld.long 0x0 18. "OF_EIM,Overrun flag" "0: Result register not overwritten,1: Result register overwritten"
|
|
newline
|
|
rbitfld.long 0x0 17. "VF_EIM,Valid flag" "0: No new valid data available,1: Result register contains valid data and has not.."
|
|
newline
|
|
bitfld.long 0x0 16. "WFR_EIM,Wait for read mode" "0: Overwrite mode,1: Wait for read mode enabled"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "FILT_OUT_EIM,ADC or filter output value for last EIM measurement"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "FILT_UP_CTRL,Upper threshold filter enable"
|
|
bitfld.long 0x0 11. "FU_CH11_EN,Upper threshold IIR filter enable channel 11" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 10. "FU_CH10_EN,Upper threshold IIR filter enable channel 10" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 9. "FU_CH9_EN,Upper threshold IIR filter enable channel 9" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 8. "FU_CH8_EN,Upper threshold IIR filter enable channel 8" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 7. "FU_CH7_EN,Upper threshold IIR filter enable channel 7" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "FU_CH6_EN,Upper threshold IIR filter enable channel 6" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 5. "FU_CH5_EN,Upper threshold IIR filter enable channel 5" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 4. "FU_CH4_EN,Upper threshold IIR filter enable channel 4" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "FU_CH3_EN,Upper threshold IIR filter enable channel 3" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 2. "FU_CH2_EN,Upper threshold IIR filter enable channel 2" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "FU_CH1_EN,Upper threshold IIR filter enable channel 1" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 0. "FU_CH0_EN,Upper threshold IIR filter enable channel 0" "0: Disable,1: Enable"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "FILTCOEFF0_11,Filter coefficients measurement unit channel 0-11 register"
|
|
bitfld.long 0x0 22.--23. "CH11,Filter coefficients ADC channel 11" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "CH10,Filter coefficients ADC channel 10" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "CH9,Filter coefficients ADC channel 9" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "CH8,Filter coefficients ADC channel 8" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CH7,Filter coefficients ADC channel 7" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "CH6,Filter Coefficients ADC channel 6" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "CH5,Filter coefficients ADC channel 5" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CH4,Filter coefficients ADC channel 4" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CH3,Filter coefficients ADC channel 3" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "CH2,Filter coefficients ADC channel 2" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CH1,Filter coefficients ADC channel 1" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CH0,Filter coefficients ADC channel 0" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
wgroup.long 0x6C++0x3
|
|
line.long 0x0 "IRQCLR_1,ADC1 interrupt status clear 1 register"
|
|
bitfld.long 0x0 31. "DU4UP_ISC,Differential unit 4 lower interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 30. "DU4LO_ISC,Differential unit 4 lower interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 29. "DU3UP_ISC,Differential unit 3 lower interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 28. "DU3LO_ISC,Differential unit 3 lower interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 27. "DU2UP_ISC,Differential unit 2 lower interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 26. "DU2LO_ISC,Differential unit 2 lower interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 25. "DU1UP_ISC,Differential unit 1 lower interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 24. "DU1LO_ISC,Differential unit 1 lower interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 17. "ESM_ISC,Exceptional sequence measurement (ESM) status clear" "0: No ESM has cleared,1: ESM cleared"
|
|
newline
|
|
bitfld.long 0x0 16. "EIM_ISC,Exceptional interrupt measurement (EIM) status clear" "0: No EIM cleared,1: EIM cleared"
|
|
newline
|
|
bitfld.long 0x0 12. "P2_0_ISC,ADC1 Port 2.0 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 11. "P2_7_ISC,ADC1 Port 2.7 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 10. "P2_6_ISC,ADC1 Port 2.6 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 9. "P2_3_ISC,ADC1 Port 2.3 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 8. "P2_2_ISC,ADC1 Port 2.2 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 7. "P2_1_ISC,ADC1 Port 2.1 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 6. "MON5_ISC,ADC1 MON 5 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 5. "MON4_ISC,ADC1 MON 4 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 4. "MON3_ISC,ADC1 MON 3 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 3. "MON2_ISC,ADC1 MON 2 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 2. "MON1_ISC,ADC1 MON 1 interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 1. "VS_ISC,ADC1 VS interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 0. "VBATSEN_ISC,ADC1 VBAT_SENSE interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
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wgroup.long 0x108++0x3
|
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line.long 0x0 "IRQCLR_2,ADC1 interrupt status clear 2 register"
|
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bitfld.long 0x0 27. "P2_7_UP_ISC,ADC1 port 2.7 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
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bitfld.long 0x0 26. "P2_6_UP_ISC,ADC1 port 2.6 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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newline
|
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bitfld.long 0x0 25. "P2_3_UP_ISC,ADC1 port 2.3 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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newline
|
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bitfld.long 0x0 24. "P2_2_UP_ISC,ADC1 port 2.2 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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newline
|
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bitfld.long 0x0 23. "P2_1_UP_ISC,ADC1 port 2.1 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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newline
|
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bitfld.long 0x0 22. "MON5_UP_ISC,ADC1 MON 5 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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newline
|
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bitfld.long 0x0 21. "MON4_UP_ISC,ADC1 MON 4 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
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newline
|
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bitfld.long 0x0 20. "MON3_UP_ISC,ADC1 MON 3 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
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bitfld.long 0x0 19. "MON2_UP_ISC,ADC1 MON 2 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
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bitfld.long 0x0 18. "MON1_UP_ISC,ADC1 MON 1 upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
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bitfld.long 0x0 17. "VS_UP_ISC,ADC1 VS upper threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
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newline
|
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bitfld.long 0x0 11. "P2_7_LO_ISC,ADC1 port 2.7 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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newline
|
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bitfld.long 0x0 10. "P2_6_LO_ISC,ADC1 port 2.6 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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|
newline
|
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bitfld.long 0x0 9. "P2_3_LO_ISC,ADC1 port 2.3 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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|
newline
|
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bitfld.long 0x0 8. "P2_2_LO_ISC,ADC1 port 2.2 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
|
newline
|
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bitfld.long 0x0 7. "P2_1_LO_ISC,ADC1 port 2.1 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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|
newline
|
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bitfld.long 0x0 6. "MON5_LO_ISC,ADC1 MON 5 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
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newline
|
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bitfld.long 0x0 5. "MON4_LO_ISC,ADC1 MON 4 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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newline
|
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bitfld.long 0x0 4. "MON3_LO_ISC,ADC1 MON 3 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
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newline
|
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bitfld.long 0x0 3. "MON2_LO_ISC,ADC1 MON 2 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
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newline
|
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bitfld.long 0x0 2. "MON1_LO_ISC,ADC1 MON 1 lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
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newline
|
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bitfld.long 0x0 1. "VS_LO_ISC,ADC1 VS lower threshold interrupt status clear" "0: Interrupt status is not cleared,1: Interrupt status is cleared"
|
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group.long 0x68++0x3
|
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line.long 0x0 "IRQEN_1,ADC1 interrupt enable 1 register"
|
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bitfld.long 0x0 31. "DU4UP_IEN,Differential unit 4 upper interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 30. "DU4LO_IEN,Differential unit 4 lower interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 29. "DU3UP_IEN,Differential unit 3 upper interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 28. "DU3LO_IEN,Differential unit 3 lower interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 27. "DU2UP_IEN,Differential unit 2 upper interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 26. "DU2LO_IEN,Differential unit 2 lower interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 25. "DU1UP_IEN,Differential unit 1 upper interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
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bitfld.long 0x0 24. "DU1LO_IEN,Differential unit 1 lower interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 17. "ESM_IEN,Exceptional sequence measurement (ESM) interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 16. "EIM_IEN,Exceptional interrupt measurement (EIM) interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 12. "P2_0_IEN,ADC1 Port 2.0 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 11. "P2_7_IEN,ADC1 Port 2.7 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
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newline
|
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bitfld.long 0x0 10. "P2_6_IEN,ADC1 Port 2.6 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 9. "P2_3_IEN,ADC1 Port 2.3 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 8. "P2_2_IEN,ADC1 Port 2.2 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 7. "P2_1_IEN,ADC1 Port 2.1 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 6. "MON5_IEN,ADC1 MON 5 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 5. "MON4_IEN,ADC1 MON 4 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 4. "MON3_IEN,ADC1 MON 3 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 3. "MON2_IEN,ADC1 MON 2 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 2. "MON1_IEN,ADC1 MON 1 interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 1. "VS_IEN,ADC1 VS interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 0. "VBATSEN_IEN,ADC1 VBAT_SENSE interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
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group.long 0x10C++0x3
|
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line.long 0x0 "IRQEN_2,ADC1 interrupt enable 2 register"
|
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bitfld.long 0x0 27. "P2_7_UP_IEN,ADC1 port 2.7 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 26. "P2_6_UP_IEN,ADC1 port 2.6 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 25. "P2_3_UP_IEN,ADC1 port 2.3 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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|
newline
|
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bitfld.long 0x0 24. "P2_2_UP_IEN,ADC1 port 2.2 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 23. "P2_1_UP_IEN,ADC1 port 2.1 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 22. "MON5_UP_IEN,ADC1 MON 5 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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newline
|
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bitfld.long 0x0 21. "MON4_UP_IEN,ADC1 MON 4 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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|
newline
|
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bitfld.long 0x0 20. "MON3_UP_IEN,ADC1 MON 3 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 19. "MON2_UP_IEN,ADC1 MON 2 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 18. "MON1_UP_IEN,ADC1 MON 1 upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 17. "VS_UP_IEN,ADC1 VS upper threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 11. "P2_7_LO_IEN,ADC1 port 2.7 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
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newline
|
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bitfld.long 0x0 10. "P2_6_LO_IEN,ADC1 port 2.6 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 9. "P2_3_LO_IEN,ADC1 port 2.3 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 8. "P2_2_LO_IEN,ADC1 port 2.2 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 7. "P2_1_LO_IEN,ADC1 port 2.1 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 6. "MON5_LO_IEN,ADC1 MON 5 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 5. "MON4_LO_IEN,ADC1 MON 4 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 4. "MON3_LO_IEN,ADC1 MON 3 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 3. "MON2_LO_IEN,ADC1 MON 2 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 2. "MON1_LO_IEN,ADC1 MON 1 lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
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bitfld.long 0x0 1. "VS_LO_IEN,ADC1 VS lower threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
group.long 0x64++0x3
|
|
line.long 0x0 "IRQS_1,ADC1 interrupt status 1 register"
|
|
bitfld.long 0x0 31. "DU4UP_IS,ADC1 differential unit 4 (DU4) upper channel interrupt dtatus" "0: No DU upper channel interrupt has occurred,1: DU upper channel interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 30. "DU4LO_IS,ADC1 differential unit 4 (DU4) lower channel interrupt status" "0: No DU lower channel interrupt has occurred,1: DU lower channel interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 29. "DU3UP_IS,ADC1 differential unit 3 (DU3) upper channel interrupt status" "0: No DU upper channel interrupt has occurred,1: DU upper channel interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 28. "DU3LO_IS,ADC1 differential unit 3 (DU3) lower Channel interrupt status" "0: No DU lower channel interrupt has occurred,1: DU lower channel interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 27. "DU2UP_IS,ADC1 differential unit 2 (DU2) upper channel interrupt status" "0: No DU upper channel interrupt has occurred,1: DU upper channel interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 26. "DU2LO_IS,ADC1 differential unit 2 (DU2) lower channel interrupt status" "0: No DU lower channel interrupt has occurred,1: DU lower channel interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 25. "DU1UP_IS,ADC1 differential unit 1 (DU1) upper channel interrupt status" "0: No DU upper Channel Interrupt has occurred,1: DU upper Channel Interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 24. "DU1LO_IS,ADC1 Differential Unit 1 (DU1) lower channel interrupt status" "0: No DU lower channel Interrupt has occurred,1: DU lower channel interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 17. "ESM_IS,Exceptional sequence measurement (ESM) status" "0: No ESM has occurred,1: ESM occurred"
|
|
newline
|
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bitfld.long 0x0 16. "EIM_IS,Exceptional interrupt measurement (EIM) status" "0: No EIM occurred,1: EIM occurred"
|
|
newline
|
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bitfld.long 0x0 12. "P2_0_IS,ADC1 channel 12 interrupt status" "0: No channel 12 interrupt has occurred,1: Channel 12 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 11. "P2_7_IS,ADC1 channel 11 interrupt status" "0: No channel 11 interrupt has occurred,1: Channel 11 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 10. "P2_6_IS,ADC1 channel 10 interrupt status" "0: No channel 10 interrupt has occurred,1: Channel 10 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 9. "P2_3_IS,ADC1 channel 9 interrupt status" "0: No channel 9 interrupt has occurred,1: Channel 9 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 8. "P2_2_IS,ADC1 channel 8 interrupt status" "0: No channel 8 interrupt has occurred,1: Channel 8 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 7. "P2_1_IS,ADC1 channel 7 interrupt status" "0: No channel 7 interrupt has occurred,1: Channel 7 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 6. "MON5_IS,ADC1 channel 6 interrupt status" "0: No channel 6 interrupt has occurred,1: Channel 6 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 5. "MON4_IS,ADC1 channel 5 interrupt status" "0: No channel 5 interrupt has occurred,1: Channel 5 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 4. "MON3_IS,ADC1 channel 4 interrupt status" "0: No channel 4 interrupt has occurred,1: Channel 4 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 3. "MON2_IS,ADC1 channel 3 interrupt status" "0: No channel 3 interrupt has occurred,1: Channel 3 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 2. "MON1_IS,ADC1 channel 2 interrupt status" "0: No channel 2 interrupt has occurred,1: Channel 2 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 1. "VS_IS,ADC1 channel 0 interrupt status" "0: No channel 0 interrupt has occurred,1: Channel 0 interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 0. "VBATSEN_IS,ADC1 channel 1 interrupt status" "0: No channel 1 interrupt has occurred,1: Channel 1 interrupt has occurred"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "IRQS_2,ADC1 interrupt status 2 register"
|
|
bitfld.long 0x0 27. "P2_7_UP_IS,ADC1 port 2.7 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 26. "P2_6_UP_IS,ADC1 port 2.6 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 25. "P2_3_UP_IS,ADC1 port 2.3 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 24. "P2_2_UP_IS,ADC1 port 2.2 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 23. "P2_1_UP_IS,ADC1 port 2.1 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 22. "MON5_UP_IS,ADC1 MON 5 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 21. "MON4_UP_IS,ADC1 MON 4 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 20. "MON3_UP_IS,ADC1 MON 3 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 19. "MON2_UP_IS,ADC1 MON 2 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 18. "MON1_UP_IS,ADC1 MON 1 upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 17. "VS_UP_IS,ADC1 VS upper threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 11. "P2_7_LO_IS,ADC1 port 2.7 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 10. "P2_6_LO_IS,ADC1 port 2.6 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 9. "P2_3_LO_IS,ADC1 port 2.3 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
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bitfld.long 0x0 8. "P2_2_LO_IS,ADC1 port 2.2 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 7. "P2_1_LO_IS,ADC1 port 2.1 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 6. "MON5_LO_IS,ADC1 MON 5 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 5. "MON4_LO_IS,ADC1 MON 4 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 4. "MON3_LO_IS,ADC1 MON 3 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 3. "MON2_LO_IS,ADC1 MON 2 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 2. "MON1_LO_IS,ADC1 MON 1 lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
newline
|
|
bitfld.long 0x0 1. "VS_LO_IS,ADC1 VS lower threshold interrupt status" "0: No interrupt has occurred,1: Interrupt has occurred"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "MAX_TIME,Maximum time for software mode register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MAX_TIME,Maximum Time in software mode"
|
|
group.long 0xF8++0x3
|
|
line.long 0x0 "MMODE0_11,Overvoltage measurement mode of channel 0-11 register"
|
|
bitfld.long 0x0 30.--31. "MMODE_D4,Measurement mode differential channel 4" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
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bitfld.long 0x0 28.--29. "MMODE_D3,Measurement mode differential channel 3" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
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bitfld.long 0x0 26.--27. "MMODE_D2,Measurement mode differential channel 2" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "MMODE_D1,Measurement mode differential channel 1" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "MMODE_11,Measurement mode channel 11" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "MMODE_10,Measurement mode channel 10" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
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bitfld.long 0x0 18.--19. "MMODE_9,Measurement mode channel 9" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MMODE_8,Measurement mode channel 8" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "MMODE_7,Measurement mode channel 7" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MMODE_6,Measurement mode channel 6" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MMODE_5,Measurement mode channel 5" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "MMODE_4,Measurement mode channel 4" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "MMODE_3,Measurement mode channel 3" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "MMODE_2,Measurement mode channel 2" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MMODE_1,Measurement mode channel 1" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MMODE_0,Measurement mode channel 0" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SQ_FB,Sequencer feedback register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CHx,Current ADC1 channel"
|
|
newline
|
|
hexmask.long.byte 0x0 11.--14. 1. "SQx,Current active ADC1 sequence"
|
|
newline
|
|
bitfld.long 0x0 10. "ESM_ACTIVE,ADC1 ESM active" "0: ESM not active,1: ESM active"
|
|
newline
|
|
bitfld.long 0x0 9. "EIM_ACTIVE,ADC1 EIM active" "0: EIM not active,1: EIM active"
|
|
newline
|
|
bitfld.long 0x0 8. "SQ_STOP,ADC1 sequencer stop signal for DPP" "0: Postprocessing sequencer in running mode,1: Postprocessing sequencer stopped/software mode.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "SQ_FB,Current sequence that caused software mode"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SQ0_1,Measurement unit 1 channel enable bits for cycle 0-1 register"
|
|
hexmask.long.word 0x0 16.--27. 1. "SQ1,Sequence 1 channel enable"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "SQ0,Sequence 0 channel enable"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "SQ10_11,Measurement unit 1 channel enable bits for cycle 10-11 register"
|
|
hexmask.long.word 0x0 16.--27. 1. "SQ11,Sequence 11 channel enable"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "SQ10,Sequence 10 channel enable"
|
|
group.long 0x24++0xF
|
|
line.long 0x0 "SQ2_3,Measurement unit 1 channel enable bits for cycle 2-3 register"
|
|
hexmask.long.word 0x0 16.--27. 1. "SQ3,Sequence 3 channel enable"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "SQ2,Sequence 2 channel enable"
|
|
line.long 0x4 "SQ4_5,Measurement unit 1 channel enable bits for cycle 4-5 register"
|
|
hexmask.long.word 0x4 16.--27. 1. "SQ5,Sequence 5 channel enable"
|
|
newline
|
|
hexmask.long.word 0x4 0.--11. 1. "SQ4,Sequence 4 channel enable"
|
|
line.long 0x8 "SQ6_7,Measurement unit 1 channel enable bits for cycle 6-7 register"
|
|
hexmask.long.word 0x8 16.--27. 1. "SQ7,Sequence 7 channel enable"
|
|
newline
|
|
hexmask.long.word 0x8 0.--11. 1. "SQ6,Sequence 6 channel enable"
|
|
line.long 0xC "SQ8_9,Measurement unit 1 channel enable bits for cycle 8-9 register"
|
|
hexmask.long.word 0xC 16.--27. 1. "SQ9,Sequence 9 channel enable"
|
|
newline
|
|
hexmask.long.word 0xC 0.--11. 1. "SQ8,Sequence 8 channel enable"
|
|
group.long 0x124++0x3
|
|
line.long 0x0 "STS_1,ADC1 status 1 register"
|
|
bitfld.long 0x0 31. "DU4UP_STS,ADC1 differential unit 4 (DU4) upper channel status" "0: No DU upper channel status has occurred,1: DU upper channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 30. "DU4LO_STS,ADC1 differential unit 4 (DU4) lower channel status" "0: No DU lower channel status has occurred,1: DU lower channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 29. "DU3UP_STS,ADC1 differential unit 3 (DU3) upper channel status" "0: No DU upper channel status has occurred,1: DU upper channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 28. "DU3LO_STS,ADC1 differential unit 3 (DU3) lower channel status" "0: No DU lower channel status has occurred,1: DU lower channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 27. "DU2UP_STS,ADC1 differential unit 2 (DU2) upper channel status" "0: No DU upper channel status has occurred,1: DU upper channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 26. "DU2LO_STS,ADC1 differential unit 2 (DU2) lower channel status" "0: No DU lower channel status has occurred,1: DU lower channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 25. "DU1UP_STS,ADC1 differential unit 1 (DU1) upper channel status" "0: No DU upper channel status has occurred,1: DU upper channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 24. "DU1LO_STS,ADC1 differential unit 1 (DU1) lower channel status" "0: No DU lower channel status has occurred,1: DU lower channel status has occurred"
|
|
rgroup.long 0x104++0x3
|
|
line.long 0x0 "STS_2,ADC1 status 2 register"
|
|
bitfld.long 0x0 27. "P2_7_UP_STS,ADC1 port 2.7 upper threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 26. "P2_6_UP_STS,ADC1 port 2.6 upper threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 25. "P2_3_UP_STS,ADC1 port 2.3 upper threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 24. "P2_2_UP_STS,ADC1 port 2.2 upper threshold Status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 23. "P2_1_UP_STS,ADC1 port 2.1 upper threshold Status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 22. "MON5_UP_STS,ADC1 MON 5 upper threshold Status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 21. "MON4_UP_STS,ADC1 MON 4 upper threshold Status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 20. "MON3_UP_STS,ADC1 MON 3 upper threshold Status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 19. "MON2_UP_STS,ADC1 MON 2 upper threshold Status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 18. "MON1_UP_STS,ADC1 MON 1 upper threshold Status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 17. "VS_UP_STS,ADC1 VS upper threshold Status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 11. "P2_7_LO_STS,ADC1 port 2.7 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 10. "P2_6_LO_STS,ADC1 port 2.6 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 9. "P2_3_LO_STS,ADC1 port 2.3 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 8. "P2_2_LO_STS,ADC1 port 2.2 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 7. "P2_1_LO_STS,ADC1 port 2.1 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 6. "MON5_LO_STS,ADC1 MON 5 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 5. "MON4_LO_STS,ADC1 MON 4 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 4. "MON3_LO_STS,ADC1 MON 3 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 3. "MON2_LO_STS,ADC1 MON 2 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 2. "MON1_LO_STS,ADC1 MON 1 lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
newline
|
|
bitfld.long 0x0 1. "VS_LO_STS,ADC1 VS lower threshold status" "0: Status below upper threshold,1: Upper threshold exceeded"
|
|
wgroup.long 0x128++0x3
|
|
line.long 0x0 "STSCLR_1,ADC1 status clear 1 register"
|
|
bitfld.long 0x0 31. "DU4UP_SC,ADC1 differential unit 4 (DU4) upper channel status clear" "0: No DU upper channel status has occurred,1: DU upper channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 30. "DU4LO_SC,ADC1 differential unit 4 (DU4) lower channel status clear" "0: No DU lower channel status has occurred,1: DU lower channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 29. "DU3UP_SC,ADC1 differential unit 3 (DU3) upper channel status clear" "0: No DU upper channel status has occurred,1: DU upper channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 28. "DU3LO_SC,ADC1 differential unit 3 (DU3) lower channel status clear" "0: No DU lower channel status has occurred,1: DU lower channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 27. "DU2UP_SC,ADC1 differential unit 2 (DU2) upper channel status clear" "0: No DU upper channel status has occurred,1: DU upper channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 26. "DU2LO_SC,ADC1 differential unit 2 (DU2) lower channel status clear" "0: No DU lower channel status has occurred,1: DU lower channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 25. "DU1UP_SC,ADC1 differential unit 1 (DU1) upper channel status clear" "0: No DU upper channel status has occurred,1: DU upper channel status has occurred"
|
|
newline
|
|
bitfld.long 0x0 24. "DU1LO_SC,ADC1 differential unit 1 (DU1) lower channel status clear" "0: No DU lower channel status has occurred,1: DU lower channel status has occurred"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "TH0_3_LOWER,Lower comparator trigger level channel 0-3"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CH3_LOW,Channel 3 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "CH2_LOW,Channel 2 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CH1_LOW,Channel 1 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CH0_LOW,Channel 0 lower trigger level"
|
|
group.long 0xC8++0x3
|
|
line.long 0x0 "TH0_3_UPPER,Upper comparator trigger level channel 0-3 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CH3_UP,Channel 3 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "CH2_UP,Channel 2 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CH1_UP,Channel 1 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CH0_UP,Channel 0 upper trigger level"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "TH4_7_LOWER,Lower comparator trigger level channel 4-7"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CH7_LOW,Channel 7 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "CH6_LOW,Channel 6 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CH5_LOW,Channel 5 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CH4_LOW,Channel 4 lower trigger level"
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "TH4_7_UPPER,Upper comparator trigger level channel 4-7 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CH7_UP,Channel 7 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "CH6_UP,Channel 6 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CH5_UP,Channel 5 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CH4_UP,Channel 4 upper trigger level"
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "TH8_11_LOWER,Lower comparator trigger level channel 8-11"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CH11_LOW,Channel 11 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "CH10_LOW,Channel 10 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CH9_LOW,Channel 9 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CH8_LOW,Channel 8 lower trigger level"
|
|
group.long 0xD0++0x3
|
|
line.long 0x0 "TH8_11_UPPER,Upper comparator trigger level channel 8-11 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CH11_UP,Channel 11 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "CH10_UP,Channel 10 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CH9_UP,Channel 9 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CH8_UP,Channel 8 upper trigger level"
|
|
tree.end
|
|
tree "ADC2 (Measurement Core Module)"
|
|
base ad:0x4801C000
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "CAL_CH0_1,Calibration for channel 0 and 1 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "GAIN_CH1,Gain calibration for channel 1"
|
|
hexmask.long.byte 0x0 16.--20. 1. "OFFS_CH1,Offset calibration for channel 1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "GAIN_CH0,Gain calibration for channel 0"
|
|
hexmask.long.byte 0x0 0.--4. 1. "OFFS_CH0,Offset calibration for channel 0"
|
|
line.long 0x4 "CAL_CH2_3,Calibration for channel 2 and 3 register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "GAIN_CH3,Gain calibration for channel 3"
|
|
hexmask.long.byte 0x4 16.--20. 1. "OFFS_CH3,Offset calibration for channel 3"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "GAIN_CH2,Gain calibration for channel 2"
|
|
hexmask.long.byte 0x4 0.--4. 1. "OFFS_CH2,Offset calibration for channel 2"
|
|
line.long 0x8 "CAL_CH4_5,Calibration for channel 4 and 5 register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "GAIN_CH5,Gain calibration for channel 5"
|
|
hexmask.long.byte 0x8 16.--20. 1. "OFFS_CH5,Offset calibration for channel 5"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "GAIN_CH4,Gain calibration for channel 4"
|
|
hexmask.long.byte 0x8 0.--4. 1. "OFFS_CH4,Offset calibration for channel 4"
|
|
line.long 0xC "CAL_CH6_7,Calibration for channel 6 and 7 register"
|
|
hexmask.long.byte 0xC 8.--15. 1. "GAIN_CH6,Gain calibration for channel 6"
|
|
hexmask.long.byte 0xC 0.--4. 1. "OFFS_CH6,Offset calibration for channel 6"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CHx_EIM,Channel settings bits for exceptional interrupt measurement register"
|
|
bitfld.long 0x0 12. "SEL,Exceptional interrupt measurement (EIM) trigger select" "0: GPT12PISEL.T3_GPT12_SEL GPT12_PISEL triggers EIM,1: Not supported"
|
|
bitfld.long 0x0 11. "EN,Exceptional interrupt measurement (EIM) trigger event enable" "0: Start of EIM disabled,1: Start of EIM enabled"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "REP,Repeat count for exceptional interrupt measurement (EIM)" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 64 measurements,7: 128 measurements"
|
|
bitfld.long 0x0 0.--2. "CHx_SEL,Channel set for exceptional interrupt measurement (EIM)" "0: Channel 0 enable,1: Channel 1 enable,2: Channel 2 enable,3: Channel 3 enable,4: Channel 4 enable,5: Channel 5 enable,6: Channel 6 enable,?"
|
|
group.long 0x98++0x3
|
|
line.long 0x0 "CNT0_3_LOWER,Lower counter trigger level channel 0-3 register"
|
|
bitfld.long 0x0 27.--28. "HYST_LO_CH3,Channel 3 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 24.--26. "CNT_LO_CH3,Lower timer trigger threshold channel 3" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 19.--20. "HYST_LO_CH2,Channel 2 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 16.--18. "CNT_LO_CH2,Lower timer trigger threshold channel 2" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 11.--12. "HYST_LO_CH1,Channel 1 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 8.--10. "CNT_LO_CH1,Lower timer trigger threshold channel 1" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "HYST_LO_CH0,Channel 0 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 0.--2. "CNT_LO_CH0,Lower timer trigger threshold channel 0" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
group.long 0xA4++0x3
|
|
line.long 0x0 "CNT0_3_UPPER,Upper counter trigger level channel 0-3 register"
|
|
bitfld.long 0x0 27.--28. "HYST_UP_CH3,Channel 3 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 24.--26. "CNT_UP_CH3,Upper timer trigger threshold channel 3" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 19.--20. "HYST_UP_CH2,Channel 2 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 16.--18. "CNT_UP_CH2,Upper timer trigger threshold channel 2" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 11.--12. "HYST_UP_CH1,Channel 1 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 8.--10. "CNT_UP_CH1,Upper timer trigger threshold channel 1" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "HYST_UP_CH0,Channel 0 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 0.--2. "CNT_UP_CH0,Upper timer trigger threshold channel 0" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
group.long 0x9C++0x3
|
|
line.long 0x0 "CNT4_7_LOWER,Lower counter trigger level channel 4-7 register"
|
|
bitfld.long 0x0 27.--28. "HYST_LO_CH7,Channel 6 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 24.--26. "CNT_LO_CH7,Lower timer trigger threshold channel 6" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 19.--20. "HYST_LO_CH6,Channel 6 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 16.--18. "CNT_LO_CH6,Lower timer trigger threshold channel 6" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 11.--12. "HYST_LO_CH5,Channel 5 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 8.--10. "CNT_LO_CH5,Lower timer trigger threshold channel 5" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "HYST_LO_CH4,Channel 4 lower hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 0.--2. "CNT_LO_CH4,Lower timer trigger threshold channel 4" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
group.long 0xA8++0x3
|
|
line.long 0x0 "CNT4_7_UPPER,Upper counter trigger level channel 4-7 register"
|
|
bitfld.long 0x0 27.--28. "HYST_UP_CH7,Channel 7 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 24.--26. "CNT_UP_CH7,Upper timer trigger threshold channel 7" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
newline
|
|
bitfld.long 0x0 19.--20. "HYST_UP_CH6,Channel 6 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 16.--18. "CNT_UP_CH6,Upper timer trigger threshold channel 6" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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|
newline
|
|
bitfld.long 0x0 11.--12. "HYST_UP_CH5,Channel 5 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 8.--10. "CNT_UP_CH5,Upper timer trigger threshold channel 5" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
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|
newline
|
|
bitfld.long 0x0 3.--4. "HYST_UP_CH4,Channel 4 upper hysteresis" "0: Hysteresis switched off,1: Hysteresis = 4,2: Hysteresis = 8,3: Hysteresis = 16"
|
|
bitfld.long 0x0 0.--2. "CNT_UP_CH4,Upper timer trigger threshold channel 4" "0: 1 measurement,1: 2 measurements,2: 4 measurements,3: 8 measurements,4: 16 measurements,5: 32 measurements,6: 63 measurements,7: 63 measurements"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRL_STS,ADC2 control and status register"
|
|
hexmask.long.byte 0x0 8.--11. 1. "IN_MUX_SEL,Channel for software mode"
|
|
rbitfld.long 0x0 3. "EOC,ADC2 end of conversion (software mode)" "0: Conversion still running,1: Conversion has finished"
|
|
newline
|
|
bitfld.long 0x0 2. "SOS,ADC2 start of sampling/conversion (software mode)" "0: No conversion is started,1: Conversion is started"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "CTRL1,Measurement unit control 1 register"
|
|
hexmask.long.byte 0x0 0.--6. 1. "CALIB_EN_6_0,Calibration enable for channels 6 to 0"
|
|
line.long 0x4 "CTRL2,Measurement unit control 2 register"
|
|
hexmask.long.byte 0x4 8.--11. 1. "SAMPLE_TIME_int,Sample time of ADC2"
|
|
rbitfld.long 0x4 7. "MCM_RDY,Ready signal for MCM" "0: Measurement core module in start-up phase,1: Measurement core module start-up phase finished"
|
|
newline
|
|
bitfld.long 0x4 0. "MCM_PD_N,Power down signal for MCM" "0: Measurement core module disabled,1: Measurement core module enabled"
|
|
line.long 0x8 "CTRL4,Measurement unit control 4 register"
|
|
hexmask.long.byte 0x8 0.--6. 1. "FILT_OUT_SEL_6_0,Output filter selection for channels 0 to 6"
|
|
group.long 0x7C++0x3
|
|
line.long 0x0 "FILT_LO_CTRL,Lower threshold filter enable register"
|
|
bitfld.long 0x0 6. "LOEN_Ch6,Lower threshold IIR filter enable ch 6" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 5. "LOEN_Ch5,Lower threshold IIR filter enable ch 5" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 4. "LOEN_Ch4,Lower threshold IIR filter enable ch 4" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 3. "LOEN_Ch3,Lower threshold IIR filter enable ch 3" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 2. "LOEN_Ch2,Lower threshold IIR filter enable ch 2" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 1. "LOEN_Ch1,Lower threshold IIR filter enable ch 1" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 0. "LOEN_Ch0,Lower threshold IIR filter enable ch 0" "0: Disable,1: Enable"
|
|
rgroup.long 0x50++0x1B
|
|
line.long 0x0 "FILT_OUT0,ADC or filter output channel 0 register"
|
|
hexmask.long.word 0x0 0.--9. 1. "OUT_CH0,ADC or filter output value channel 0"
|
|
line.long 0x4 "FILT_OUT1,ADC or filter output channel 1 register"
|
|
hexmask.long.word 0x4 0.--9. 1. "OUT_CH1,ADC or filter output value channel 1"
|
|
line.long 0x8 "FILT_OUT2,ADC or filter output channel 2 register"
|
|
hexmask.long.word 0x8 0.--9. 1. "OUT_CH2,ADC or filter output value channel 2"
|
|
line.long 0xC "FILT_OUT3,ADC or filter output channel 3 register"
|
|
hexmask.long.word 0xC 0.--9. 1. "OUT_CH3,ADC or filter output value channel 3"
|
|
line.long 0x10 "FILT_OUT4,ADC or filter output channel 4 register"
|
|
hexmask.long.word 0x10 0.--9. 1. "OUT_CH4,ADC or filter output value channel 4"
|
|
line.long 0x14 "FILT_OUT5,ADC or filter output channel 5 register"
|
|
hexmask.long.word 0x14 0.--9. 1. "OUT_CH5,ADC or filter output value channel 5"
|
|
line.long 0x18 "FILT_OUT6,ADC or filter output channel 6 register"
|
|
hexmask.long.word 0x18 0.--9. 1. "OUT_CH6,ADC or filter output value channel 6"
|
|
group.long 0x78++0x3
|
|
line.long 0x0 "FILT_UP_CTRL,Upper threshold filter enable register"
|
|
bitfld.long 0x0 6. "UPEN_Ch6,Upper threshold IIR filter enable ch 6" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 5. "UPEN_Ch5,Upper threshold IIR filter enable ch 5" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 4. "UPEN_Ch4,Upper threshold IIR filter enable ch 4" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 3. "UPEN_Ch3,Upper threshold IIR filter enable ch 3" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 2. "UPEN_Ch2,Upper threshold IIR filter enable ch 2" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 1. "UPEN_Ch1,Upper threshold IIR filter enable ch 1" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 0. "UPEN_Ch0,Upper threshold IIR filter enable ch 0" "0: Disable,1: Enable"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "FILTCOEFF0_7,Filter coefficients ADC channel 0-7 register"
|
|
bitfld.long 0x0 14.--15. "A_CH7,Filter coefficient A for ADC channel 7" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
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|
bitfld.long 0x0 12.--13. "A_CH6,Filter coefficient A for ADC channel 6" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "A_CH5,Filter coefficient A for ADC channel 5" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
bitfld.long 0x0 8.--9. "A_CH4,Filter coefficient A for ADC channel 4" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "A_CH3,Filter coefficient A for ADC channel 3" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
bitfld.long 0x0 4.--5. "A_CH2,Filter coefficient A for ADC channel 2" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "A_CH1,Filter coefficient A for ADC channel 1" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
bitfld.long 0x0 0.--1. "A_CH0,Filter coefficient A for ADC channel 0" "0: 1/2 weight of current sample,1: 1/4 weight of current sample,2: 1/8 weight of current sample,3: 1/16 weight of current sample"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "MAX_TIME,Maximum time for software mode register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MAX_TIME,Maximum time in software mode"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "MMODE0_7,Overvoltage measurement mode of channel 0-7 register"
|
|
bitfld.long 0x0 14.--15. "MSEL_Ch7,Measurement mode ch 7" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
bitfld.long 0x0 12.--13. "MSEL_Ch6,Measurement mode ch 6" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MSEL_Ch5,Measurement mode ch 5" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
bitfld.long 0x0 8.--9. "MSEL_Ch4,Measurement mode ch 4" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "MSEL_Ch3,Measurement mode ch 3" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
bitfld.long 0x0 4.--5. "MSEL_Ch2,Measurement mode ch 2" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MSEL_Ch1,Measurement mode ch 1" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
bitfld.long 0x0 0.--1. "MSEL_Ch0,Measurement mode ch 0" "0: Upper & lower voltage/limit measurement,1: Undervoltage/-limit measurement,2: Overvoltage/-limit measurement,?"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SQ_FB,Sequencer feedback register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CHx_STS,Current ADC2 channel"
|
|
bitfld.long 0x0 11.--13. "SQx_STS,Current active ADC2 sequence" "0: Sequence 1 enable,1: Sequence 2 enable,2: Sequence 3 enable,3: Sequence 4 enable,4: Sequence 5 enable,5: Sequence 6 enable,6: Sequence 7 enable,?"
|
|
newline
|
|
bitfld.long 0x0 9. "EIM_ACTIVE,ADC2 EIM active" "0: EIM not active,1: EIM active"
|
|
bitfld.long 0x0 8. "SQ_STOP,ADC2 sequencer stop signal for DPP" "0: Post processing sequencer in running mode,1: Post processing sequencer stopped/software mode.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "SQ_FB,Current sequence that caused software mode"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "SQ1_4,Measurement channel enable bits for cycle 1-4 register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "SQ4,Sequence 4 channel enable"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SQ3,Sequence 3 channel enable"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "SQ2,Sequence 2 channel enable"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SQ1,Sequence 1 channel enable"
|
|
line.long 0x4 "SQ5_8,Measurement channel enable bits for cycle 5-8 register"
|
|
hexmask.long.byte 0x4 16.--22. 1. "SQ7,Sequence 7 channel enable"
|
|
hexmask.long.byte 0x4 8.--14. 1. "SQ6,Sequence 6 channel enable"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "SQ5,Sequence 5 channel enable"
|
|
rgroup.long 0xBC++0x3
|
|
line.long 0x0 "STATUS,ADC2 HV status register"
|
|
bitfld.long 0x0 1. "READY,HVADC ready bit" "0: Module in power down or in init phase,1: Set automatically 5 ADC clock cycles after.."
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "TH0_3_LOWER,Lower comparator trigger level channel 0-3 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THLO_CH3,Channel 3 lower trigger level"
|
|
hexmask.long.byte 0x0 16.--23. 1. "THLO_CH2,Channel 2 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "THLO_CH1,Channel 1 lower trigger level"
|
|
hexmask.long.byte 0x0 0.--7. 1. "THLO_CH0,Channel 0 lower trigger level"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "TH0_3_UPPER,Upper comparator trigger level channel 0-3 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THUP_CH3,Channel 3 upper trigger level"
|
|
hexmask.long.byte 0x0 16.--23. 1. "THUP_CH2,Channel 2 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "THUP_CH1,Channel 1 upper trigger level"
|
|
hexmask.long.byte 0x0 0.--7. 1. "THUP_CH0,Channel 0 upper trigger level"
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "TH4_7_LOWER,Lower comparator trigger level channel 4-7 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THLO_CH7,Channel 7 lower trigger level"
|
|
hexmask.long.byte 0x0 16.--23. 1. "THLO_CH6,Channel 6 lower trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "THLO_CH5,Channel 5 lower trigger level"
|
|
hexmask.long.byte 0x0 0.--7. 1. "THLO_CH4,Channel 4 lower trigger level"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "TH4_7_UPPER,Upper comparator trigger level channel 4-7 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THUP_CH7,Channel 7 upper trigger level"
|
|
hexmask.long.byte 0x0 16.--23. 1. "THUP_CH6,Channel 6 upper trigger level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "THUP_CH5,Channel 5 upper trigger level"
|
|
hexmask.long.byte 0x0 0.--7. 1. "THUP_CH4,Channel 4 upper trigger level"
|
|
tree.end
|
|
tree.end
|
|
tree "CCU6 (Capture/Compare Unit 6)"
|
|
base ad:0x4000C000
|
|
rgroup.word 0x34++0x1
|
|
line.word 0x0 "CC60R,Capture/compare register for channel CC60 register"
|
|
hexmask.word 0x0 0.--15. 1. "CCV,Channel 0 capture/compare value"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "CC60SR,Capture/compare shadow register for channel CC60 register"
|
|
hexmask.word 0x0 0.--15. 1. "CCS,Shadow register for channel 0 capture/compare value"
|
|
rgroup.word 0x38++0x1
|
|
line.word 0x0 "CC61R,Capture/compare register for channel CC61 register"
|
|
hexmask.word 0x0 0.--15. 1. "CCV,Channel 1 capture/compare value"
|
|
group.word 0x18++0x1
|
|
line.word 0x0 "CC61SR,Capture/compare shadow register for channel CC61 register"
|
|
hexmask.word 0x0 0.--15. 1. "CCS,Shadow register for channel 1 capture/compare value"
|
|
rgroup.word 0x3C++0x1
|
|
line.word 0x0 "CC62R,Capture/compare register for channel CC62 register"
|
|
hexmask.word 0x0 0.--15. 1. "CCV,Channel 2 capture/compare value"
|
|
group.word 0x1C++0x1
|
|
line.word 0x0 "CC62SR,Capture/compare shadow register for channel CC62 register"
|
|
hexmask.word 0x0 0.--15. 1. "CCS,Shadow register for channel 2 capture/compare value"
|
|
rgroup.word 0x0++0x1
|
|
line.word 0x0 "CC63R,Capture/compare for channel CC63 register"
|
|
hexmask.word 0x0 0.--15. 1. "CCV,Channel CC63 compare value low byte"
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "CC63SR,Capture/compare shadow for channel CC63 register"
|
|
hexmask.word 0x0 0.--15. 1. "CCS,Shadow register for channel CC63 compare value"
|
|
wgroup.word 0x10++0x1
|
|
line.word 0x0 "CMPMODIF,Compare state modification register"
|
|
bitfld.word 0x0 14. "MCC63R,Capture/compare status modification bits (reset)" "0,1"
|
|
bitfld.word 0x0 10. "MCC62R,Capture/compare status modification bit 2 (reset)" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "MCC61R,Capture/compare status modification bit 1 (reset)" "0,1"
|
|
bitfld.word 0x0 8. "MCC60R,Capture/compare status modification bit 0 (reset)" "0,1"
|
|
newline
|
|
bitfld.word 0x0 6. "MCC63S,Capture/compare status modification bits (set)" "0,1"
|
|
bitfld.word 0x0 2. "MCC62S,Capture/compare status modification bit 2 (set)" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "MCC61S,Capture/compare status modification bit 1 (set)" "0,1"
|
|
bitfld.word 0x0 0. "MCC60S,Capture/compare status modification bit 0 (set)" "0,1"
|
|
group.word 0x80++0x1
|
|
line.word 0x0 "CMPSTAT,Compare state register"
|
|
bitfld.word 0x0 15. "T13IM,T13 inverted modulation" "0: T13 output is not inverted,1: T13 output is inverted for further modulation"
|
|
bitfld.word 0x0 14. "COUT63PS,Passive state select for compare outputs" "0: The corresponding compare output drives passive..,1: The corresponding compare output drives passive.."
|
|
newline
|
|
bitfld.word 0x0 13. "COUT62PS,Passive state select for compare outputs" "0: The corresponding compare output drives passive..,1: The corresponding compare output drives passive.."
|
|
bitfld.word 0x0 12. "CC62PS,Passive state select for compare outputs" "0: The corresponding compare output drives passive..,1: The corresponding compare output drives passive.."
|
|
newline
|
|
bitfld.word 0x0 11. "COUT61PS,Passive state select for compare outputs" "0: The corresponding compare output drives passive..,1: The corresponding compare output drives passive.."
|
|
bitfld.word 0x0 10. "CC61PS,Passive state select for compare outputs" "0: The corresponding compare output drives passive..,1: The corresponding compare output drives passive.."
|
|
newline
|
|
bitfld.word 0x0 9. "COUT60PS,Passive state select for compare outputs" "0: The corresponding compare output drives passive..,1: The corresponding compare output drives passive.."
|
|
bitfld.word 0x0 8. "CC60PS,Passive state select for compare outputs" "0: The corresponding compare output drives passive..,1: The corresponding compare output drives passive.."
|
|
newline
|
|
rbitfld.word 0x0 6. "CC63ST,Capture/compare state bits" "0: In compare mode the timer count is less than the..,1: In compare mode the counter value is greater.."
|
|
rbitfld.word 0x0 5. "CCPOS2,Sampled Hall pattern bit 2" "0: The input CCPOS2 has been sampled as 0,1: The input CCPOS2 has been sampled as 1"
|
|
newline
|
|
rbitfld.word 0x0 4. "CCPOS1,Sampled Hall pattern bit 1" "0: The input CCPOS1 has been sampled as 0,1: The input CCPOS1 has been sampled as 1"
|
|
rbitfld.word 0x0 3. "CCPOS0,Sampled Hall pattern bit 0" "0: The input CCPOS0 has been sampled as 0,1: The input CCPOS0 has been sampled as 1"
|
|
newline
|
|
rbitfld.word 0x0 2. "CC62ST,Capture/compare state bits" "0: In compare mode the timer count is less than the..,1: In compare mode the counter value is greater.."
|
|
rbitfld.word 0x0 1. "CC61ST,Capture/compare state bits" "0: In compare mode the timer count is less than the..,1: In compare mode the counter value is greater.."
|
|
newline
|
|
rbitfld.word 0x0 0. "CC60ST,Capture/compare state bits" "0: In compare mode the timer count is less than the..,1: In compare mode the counter value is greater.."
|
|
group.word 0x44++0x1
|
|
line.word 0x0 "IEN,Capture/compare interrupt enable register"
|
|
bitfld.word 0x0 15. "ENSTR,Enable multi-channel mode shadow transfer interrupt" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
bitfld.word 0x0 14. "ENIDLE,Enable idle" "0: The bit IDLE is not automatically set when a..,1: The bit IDLE is automatically set when a wrong.."
|
|
newline
|
|
bitfld.word 0x0 13. "ENWHE,Enable interrupt for wrong Hall Event" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
bitfld.word 0x0 12. "ENCHE,Enable interrupt for correct Hall Event" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
newline
|
|
bitfld.word 0x0 10. "ENTRPF,Enable interrupt for trap flag" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
bitfld.word 0x0 9. "ENT13PM,Enable interrupt for T13 period-match" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
newline
|
|
bitfld.word 0x0 8. "ENT13CM,Enable interrupt for T13 compare-match" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
bitfld.word 0x0 7. "ENT12PM,Enable interrupt for T12 period-match" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
newline
|
|
bitfld.word 0x0 6. "ENT12OM,Enable interrupt for T12 one-match" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
bitfld.word 0x0 5. "ENCC62F,Capture compare-match falling edge interrupt enable for channel 2" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
newline
|
|
bitfld.word 0x0 4. "ENCC62R,Capture compare-match rising edge interrupt enable for channel 2" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
bitfld.word 0x0 3. "ENCC61F,Capture compare-match falling edge interrupt enable for channel 1" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
newline
|
|
bitfld.word 0x0 2. "ENCC61R,Capture compare-match rising edge interrupt enable for channel 1" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
bitfld.word 0x0 1. "ENCC60F,Capture compare-match falling edge interrupt enable for channel 0" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
newline
|
|
bitfld.word 0x0 0. "ENCC60R,Capture compare-match rising edge interrupt enable for channel 0" "0: No interrupt will be generated if the set..,1: An interrupt will be generated if the set.."
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "INP,Capture/compare interrupt node pointer register"
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bitfld.word 0x0 12.--13. "INPT13,Interrupt node pointer for timer T13 interrupts" "0: Interrupt output line SR0 is selected,1: Interrupt output line SR1 is selected,2: Interrupt output line SR2 is selected,3: Interrupt output line SR3 is selected"
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bitfld.word 0x0 10.--11. "INPT12,Interrupt node pointer for timer T12 interrupts" "0: Interrupt output line SR0 is selected,1: Interrupt output line SR1 is selected,2: Interrupt output line SR2 is selected,3: Interrupt output line SR3 is selected"
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bitfld.word 0x0 8.--9. "INPERR,Interrupt node pointer for error interrupts" "0: Interrupt output line SR0 is selected,1: Interrupt output line SR1 is selected,2: Interrupt output line SR2 is selected,3: Interrupt output line SR3 is selected"
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bitfld.word 0x0 6.--7. "INPCHE,Interrupt node pointer for the CHE interrupt" "0: Interrupt output line SR0 is selected,1: Interrupt output line SR1 is selected,2: Interrupt output line SR2 is selected,3: Interrupt output line SR3 is selected"
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bitfld.word 0x0 4.--5. "INPCC62,Interrupt node pointer for channel 2 interrupts" "0: Interrupt output line SR0 is selected,1: Interrupt output line SR1 is selected,2: Interrupt output line SR2 is selected,3: Interrupt output line SR3 is selected"
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bitfld.word 0x0 2.--3. "INPCC61,Interrupt node pointer for channel 1 interrupts" "0: Interrupt output line SR0 is selected,1: Interrupt output line SR1 is selected,2: Interrupt output line SR2 is selected,3: Interrupt output line SR3 is selected"
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bitfld.word 0x0 0.--1. "INPCC60,Interrupt node pointer for channel 0 interrupts" "0: Interrupt output line SR0 is selected,1: Interrupt output line SR1 is selected,2: Interrupt output line SR2 is selected,3: Interrupt output line SR3 is selected"
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rgroup.word 0x68++0x1
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line.word 0x0 "IS,Capture/compare interrupt status register"
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bitfld.word 0x0 15. "STR,Multi-channel mode shadow transfer request" "0: The shadow transfer has not yet taken place,1: The shadow transfer has taken place"
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bitfld.word 0x0 14. "IDLE,IDLE state" "0: No action,1: Bit field MCMP is cleared and held to 0 the.."
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bitfld.word 0x0 13. "WHE,Wrong Hall event" "0: A transition to a wrong Hall event (not the..,1: A transition to a wrong Hall event (not the.."
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bitfld.word 0x0 12. "CHE,Correct Hall event" "0: A transition to a correct (= expected) Hall..,1: A transition to a correct (= expected) Hall.."
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bitfld.word 0x0 11. "TRPS,Trap state" "0: The trap state is not active,1: The trap state is active. Bit TRPS is set while.."
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bitfld.word 0x0 10. "TRPF,Trap flag" "0: The trap condition has not been detected,1: The trap condition has been detected (input.."
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bitfld.word 0x0 9. "T13PM,Timer T13 period-match flag" "0: A timer T13 period-match has not yet been..,1: A timer T13 period-match has been detected"
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bitfld.word 0x0 8. "T13CM,Timer T13 compare-match flag" "0: A timer T13 compare-match has not yet been..,1: A timer T13 compare-match has been detected"
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bitfld.word 0x0 7. "T12PM,Timer T12 period-match flag" "0: A timer T12 period-match (while counting up) has..,1: A timer T12 period-match (while counting up) has.."
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bitfld.word 0x0 6. "T12OM,Timer T12 one-match flag" "0: A timer T12 one-match (while counting down) has..,1: A timer T12 one-match (while counting down) has.."
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bitfld.word 0x0 5. "ICC62F,Capture compare-match falling edge flag" "0: The event has not yet occurred since this bit..,1: The event described above has been detected"
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bitfld.word 0x0 4. "ICC62R,Capture compare-match rising edge flag" "0: The event has not yet occurred since this bit..,1: The event described above has been detected"
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bitfld.word 0x0 3. "ICC61F,Capture compare-match falling edge flag" "0: The event has not yet occurred since this bit..,1: The event described above has been detected"
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bitfld.word 0x0 2. "ICC61R,Capture compare-match rising edge flag" "0: The event has not yet occurred since this bit..,1: The event described above has been detected"
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bitfld.word 0x0 1. "ICC60F,Capture compare-match falling edge flag" "0: The event has not yet occurred since this bit..,1: The event described above has been detected"
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bitfld.word 0x0 0. "ICC60R,Capture compare-match rising edge flag" "0: The event has not yet occurred since this bit..,1: The event described above has been detected"
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wgroup.word 0xC++0x1
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line.word 0x0 "ISR,Capture/compare interrupt status reset register"
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bitfld.word 0x0 15. "RSTR,Reset STR flag" "0: No action,1: Bit STR in register IS will be reset"
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bitfld.word 0x0 14. "RIDLE,Reset IDLE flag" "0: No action,1: Bit IDLE in register IS will be reset"
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bitfld.word 0x0 13. "RWHE,Reset wrong Hall event flag" "0: No action,1: Bit WHE in register IS will be reset"
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bitfld.word 0x0 12. "RCHE,Reset correct Hall event flag" "0: No action,1: Bit CHE in register IS will be reset"
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bitfld.word 0x0 10. "RTRPF,Reset trap flag" "0: No action,1: Bit TRPF in register IS will be reset (not taken.."
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bitfld.word 0x0 9. "RT13PM,Reset timer T13 period-Match flag" "0: No action,1: Bit T13PM in register IS will be reset"
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bitfld.word 0x0 8. "RT13CM,Reset timer T13 compare-match flag" "0: No action,1: Bit T13CM in register IS will be reset"
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bitfld.word 0x0 7. "RT12PM,Reset timer T12 period-match flag" "0: No action,1: Bit T12PM in register IS will be reset"
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bitfld.word 0x0 6. "RT12OM,Reset timer T12 one-match flag" "0: No action,1: Bit T12OM in register IS will be reset"
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bitfld.word 0x0 5. "RCC62F,Reset capture compare-match falling edge flag" "0: No action,1: Bit CC62F in register IS will be reset"
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bitfld.word 0x0 4. "RCC62R,Reset capture compare-match rising edge flag" "0: No action,1: Bit CC62R in register IS will be reset"
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bitfld.word 0x0 3. "RCC61F,Reset capture compare-match falling edge flag" "0: No action,1: Bit CC61F in register IS will be reset"
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bitfld.word 0x0 2. "RCC61R,Reset capture compare-match rising edge Flag" "0: No action,1: Bit CC61R in register IS will be reset"
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bitfld.word 0x0 1. "RCC60F,Reset capture compare-match falling edge flag" "0: No action,1: Bit CC60F in register IS will be reset"
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bitfld.word 0x0 0. "RCC60R,Reset capture compare-match rising edge flag" "0: No action,1: Bit CC60R in register IS will be reset"
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wgroup.word 0x4C++0x1
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line.word 0x0 "ISS,Capture/compare interrupt status set register"
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bitfld.word 0x0 15. "SSTR,Set STR flag" "0: No action,1: Bit STR in register IS will be set"
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bitfld.word 0x0 14. "SIDLE,Set IDLE flag" "0: No action,1: Bit IDLE in register IS will be set"
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bitfld.word 0x0 13. "SWHE,Set wrong Hall event flag" "0: No action,1: Bit WHE in register IS will be set"
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bitfld.word 0x0 12. "SCHE,Set correct Hall event flag" "0: No action,1: Bit CHE in register IS will be set"
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bitfld.word 0x0 11. "SWHC,Software Hall compare" "0: No action,1: The Hall compare action is triggered"
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bitfld.word 0x0 10. "STRPF,Set trap flag" "0: No action,1: Bits TRPF and TRPS in register IS will be set"
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bitfld.word 0x0 9. "ST13PM,Set timer T13 period-match flag" "0: No action,1: Bit T13PM in register IS will be set"
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bitfld.word 0x0 8. "ST13CM,Set timer T13 compare-match flag" "0: No action,1: Bit T13CM in register IS will be set"
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bitfld.word 0x0 7. "ST12PM,Set timer T12 period-match flag" "0: No action,1: Bit T12PM in register IS will be set"
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bitfld.word 0x0 6. "ST12OM,Set timer T12 one-match flag" "0: No action,1: Bit T12OM in register IS will be set"
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bitfld.word 0x0 5. "SCC62F,Set capture compare-match falling edge flag" "0: No action,1: Bit CC62F in register IS will be set"
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bitfld.word 0x0 4. "SCC62R,Set capture compare-match rising edge flag" "0: No action,1: Bit CC62R in register IS will be set"
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bitfld.word 0x0 3. "SCC61F,Set capture compare-match falling edge flag" "0: No action,1: Bit CC61F in register IS will be set"
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bitfld.word 0x0 2. "SCC61R,Set capture compare-match rising edge flag" "0: No action,1: Bit CC61R in register IS will be set"
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bitfld.word 0x0 1. "SCC60F,Set capture compare-match falling edge flag" "0: No action,1: Bit CC60F in register IS will be set"
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bitfld.word 0x0 0. "SCC60R,Set capture compare-match rising edge flag" "0: No action,1: Bit CC60R in register IS will be set"
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group.word 0x54++0x1
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line.word 0x0 "MCMCTR,Multi-channel mode control register"
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bitfld.word 0x0 10. "STE13U,Shadow transfer enable for T13 upcounting" "0: No action,1: The T13_ST shadow transfer mechanism is enabled.."
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bitfld.word 0x0 9. "STE12D,Shadow transfer Enable for T12 downcounting" "0: No action,1: The T12_ST shadow transfer mechanism is enabled.."
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bitfld.word 0x0 8. "STE12U,Shadow transfer enable for T12 upcounting" "0: No action,1: The T12_ST shadow transfer mechanism is enabled.."
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bitfld.word 0x0 4.--5. "SWSYN,Switching Synchronization" "0: The trigger event directly causes the shadow..,1: T13 zero-match triggers the shadow transfer,2: A T12 zero-match (while counting up) triggers..,?"
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bitfld.word 0x0 0.--2. "SWSEL,Switching selection" "0: No trigger request will be generated,1: Correct hall pattern on CCPOSx detected,2: T13 period-match detected (while counting up),3: T12 one-match (while counting down),4: T12 channel 1 compare-match detected (phase..,5: T12 period match detected (while counting up)..,?,?"
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rgroup.word 0x64++0x1
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line.word 0x0 "MCMOUT,Multi-channel mode output register"
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bitfld.word 0x0 11.--13. "CURH,Current Hall pattern" "0,1,2,3,4,5,6,7"
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bitfld.word 0x0 8.--10. "EXPH,Expected Hall pattern" "0,1,2,3,4,5,6,7"
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bitfld.word 0x0 6. "R,Reminder Flag" "0: No shadow transfer currently no shadow transfer..,1: A shadow transfer from MCMPS to MCMP has been.."
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hexmask.word.byte 0x0 0.--5. 1. "MCMP,Multi-channel PWM pattern"
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group.word 0x8++0x1
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line.word 0x0 "MCMOUTS,Multi-channel mode output shadow register"
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bitfld.word 0x0 15. "STRHP,Shadow transfer request for the Hall pattern" "0: The bit fields CURH and EXPH are updated..,1: The bit fields CURH and EXPH are updated by the.."
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bitfld.word 0x0 11.--13. "CURHS,Current Hall pattern shadow" "0,1,2,3,4,5,6,7"
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bitfld.word 0x0 8.--10. "EXPHS,Expected Hall pattern shadow" "0,1,2,3,4,5,6,7"
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bitfld.word 0x0 7. "STRMCM,Shadow transfer request for MCMPS" "0: Bit field MCMP is updated according to the..,1: Bit field MCMP is updated by the value written.."
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hexmask.word.byte 0x0 0.--5. 1. "MCMPS,Multi-channel PWM pattern shadow"
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group.word 0x5C++0x1
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line.word 0x0 "MODCTR,Modulation control register"
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bitfld.word 0x0 15. "ECT13O,Enable compare timer T13 output" "0: The alternate output function COUT63 is disabled,1: The alternate output function COUT63 is enabled.."
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hexmask.word.byte 0x0 8.--13. 1. "T13MODEN,T13 modulation enable"
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bitfld.word 0x0 7. "MCMEN,Multi-channel mode enable" "0: The modulation of the corresponding output..,1: The modulation of the corresponding output.."
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hexmask.word.byte 0x0 0.--5. 1. "T12MODEN,T12 modulation enable"
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group.word 0x6C++0x1
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line.word 0x0 "PISEL0,Port input select 0 register"
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bitfld.word 0x0 14.--15. "IST12HR,Input select for T12HR" "0: Either signal T12HRA (if T12EXT = 0) or T12HRE..,1: Either signal T12HRB (if T12EXT = 0) or T12HRF..,2: Either signal T12HRC (if T12EXT = 0) or T12HRG..,3: Either signal T12HRD (if T12EXT = 0) or T12HRH.."
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bitfld.word 0x0 12.--13. "ISPOS2,Input select for CCPOS2" "0: The input pin for CCPOS2_0,1: The input pin for CCPOS2_1,2: The input pin for CCPOS2_2,3: The input pin for CCPOS2_3"
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bitfld.word 0x0 10.--11. "ISPOS1,Input select for CCPOS1" "0: The input pin for CCPOS1_0,1: The input pin for CCPOS1_1,2: The input pin for CCPOS1_2,3: The input pin for CCPOS1_3"
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bitfld.word 0x0 8.--9. "ISPOS0,Input select for CCPOS0" "0: The input pin for CCPOS0_0,1: The input pin for CCPOS0_1,2: The input pin for CCPOS0_2,3: The input pin for CCPOS0_3"
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bitfld.word 0x0 6.--7. "ISTRP,Input select for CTRAP" "0: The input pin for CTRAP_0,1: The input pin for CTRAP_1,2: The input pin for CTRAP_2,3: Signal from differential units"
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bitfld.word 0x0 4.--5. "ISCC62,Input select for CC62" "0: The input pin for CC62_0,1: The input pin for CC62_1,?,?"
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bitfld.word 0x0 2.--3. "ISCC61,Input select for CC61" "0: The input pin for CC61_0,1: The input pin for CC61_1,?,?"
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bitfld.word 0x0 0.--1. "ISCC60,Input select for CC60" "0: The input pin for CC60_0,1: The input pin for CC60_1,?,?"
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group.word 0x74++0x1
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line.word 0x0 "PISEL2,Port input select 2 register"
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bitfld.word 0x0 7. "T13EXT,Extension for T13HR inputs" "0: T13HR[D:A] one of the signals T13HR[D:A] is..,1: T13HR[H:E] one of the signals T13HR[H:E] is.."
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bitfld.word 0x0 6. "T12EXT,Extension for T12HR inputs" "0: T12HR[D:A] one of the signals T12HR[D:A] is..,1: T12HR[H:E] one of the signals T12HR[H:E] is.."
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bitfld.word 0x0 4.--5. "ISCNT13,Input select for T13 counting input" "0: The T13 prescaler generates the counting events.,1: Bit TCTR4.T13CNT written with 1 is a counting..,2: The timer T13 is counting each rising edge..,3: The timer T13 is counting each falling edge.."
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bitfld.word 0x0 2.--3. "ISCNT12,Input select for T12 counting input" "0: The T12 prescaler generates the counting events.,1: Bit TCTR4.T12CNT written with 1 is a counting..,2: The timer T12 is counting each rising edge..,3: The timer T12 is counting each falling edge.."
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bitfld.word 0x0 0.--1. "IST13HR,Input select for T13HR" "0: Either signal T13HRA (if T13EXT = 0) or T13HRE..,1: Either signal T13HRB (if T13EXT = 0) or T13HRF..,2: Either signal T13HRC (if T13EXT = 0) or T13HRG..,3: Either signal T13HRD (if T13EXT = 0) or T13HRH.."
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group.word 0x50++0x1
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line.word 0x0 "PSLR,Passive state level register"
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bitfld.word 0x0 7. "PSL63,Passive state level of output COUT63" "0: The passive level is 0,1: The passive level is 1"
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hexmask.word.byte 0x0 0.--5. 1. "PSL,Compare outputs passive state level"
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group.word 0x78++0x1
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line.word 0x0 "T12,Timer T12 counter register"
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hexmask.word 0x0 0.--15. 1. "T12CV,Timer T12 counter value"
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group.word 0x2C++0x1
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line.word 0x0 "T12DTC,Dead-time control register for timer T12 low register"
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rbitfld.word 0x0 14. "DTR2,Dead-time run indication bit 2" "0: The value of the corresponding dead-time counter..,1: The value of the corresponding dead-time counter.."
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rbitfld.word 0x0 13. "DTR1,Dead-time run indication bit 1" "0: The value of the corresponding dead-time counter..,1: The value of the corresponding dead-time counter.."
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rbitfld.word 0x0 12. "DTR0,Dead-time run indication bit 0" "0: The value of the corresponding dead-time counter..,1: The value of the corresponding dead-time counter.."
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bitfld.word 0x0 10. "DTE2,Dead-time enable bit 2" "0: Dead-time generation is disabled. The..,1: Dead-time generation is enabled. The.."
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bitfld.word 0x0 9. "DTE1,Dead-time enable bit 1" "0: Dead-time generation is disabled. The..,1: Dead-time generation is enabled. The.."
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bitfld.word 0x0 8. "DTE0,Dead-time enable bit 0" "0: Dead-time generation is disabled. The..,1: Dead-time generation is enabled. The.."
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hexmask.word.byte 0x0 0.--7. 1. "DTM,Dead-time"
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group.word 0x40++0x1
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line.word 0x0 "T12MSEL,T12 capture/compare mode select register"
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bitfld.word 0x0 15. "DBYP,Delay bypass" "0: The delay bypass is not active. The dead-time..,1: The delay bypass is active. The dead-time.."
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bitfld.word 0x0 12.--14. "HSYNC,Hall synchronization" "0: Any edge at one of the inputs CCPOSx (x = 0 1 2)..,1: A T13 compare-match triggers the sampling,2: A T13 period-match triggers the sampling,3: The Hall sampling triggered by hardware sources..,4: A T12 period-match (while counting up) triggers..,5: A T12 one-match (while counting down) triggers..,6: A T12 compare-match of channel 0 (while counting..,7: A T12 compare-match of channel 0 (while counting.."
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hexmask.word.byte 0x0 8.--11. 1. "MSEL62,Capture/compare mode selection"
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hexmask.word.byte 0x0 4.--7. 1. "MSEL61,Capture/compare mode selection"
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hexmask.word.byte 0x0 0.--3. 1. "MSEL60,Capture/compare mode selection"
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group.word 0x24++0x1
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line.word 0x0 "T12PR,Timer T12 period register"
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hexmask.word 0x0 0.--15. 1. "T12PV,T12 period value"
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group.word 0x7C++0x1
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line.word 0x0 "T13,Timer T13 counter register"
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hexmask.word 0x0 0.--15. 1. "T13CV,Timer T13 counter value"
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group.word 0x28++0x1
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line.word 0x0 "T13PR,Timer T13 period register"
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hexmask.word 0x0 0.--15. 1. "T13PV,T13 period value"
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group.word 0x30++0x1
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line.word 0x0 "TCTR0,Timer control 0 register"
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rbitfld.word 0x0 13. "STE13,Timer T13 shadow transfer enable" "0: The shadow register transfer is disabled,1: The shadow register transfer is enabled"
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rbitfld.word 0x0 12. "T13R,Timer T13 run bit" "0: Timer T13 is stopped,1: Timer T13 is running"
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bitfld.word 0x0 11. "T13PRE,Timer T13 prescaler bit" "0: The additional prescaler for T13 is disabled,1: The additional prescaler for T13 is enabled"
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bitfld.word 0x0 8.--10. "T13CLK,Timer T13 input clock Select" "0: fT13 = fCCU,1: fT13 = fCCU / 2,2: fT13 = fCCU / 4,3: fT13 = fCCU / 8,4: fT13 = fCCU / 16,5: fT13 = fCCU/ 32,6: fT13 = fCCU / 64,7: fT13 = fCCU / 128"
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bitfld.word 0x0 7. "CTM,T12 operating mode" "0: T12 always counts up and continues counting from..,1: T12 counts down after detecting a period-match.."
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rbitfld.word 0x0 6. "CDIR,Count direction of timer T12" "0: T12 counts up,1: T12 counts down"
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rbitfld.word 0x0 5. "STE12,Timer T12 shadow transfer enable" "0: The shadow register transfer is disabled,1: The shadow register transfer is enabled"
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rbitfld.word 0x0 4. "T12R,Timer T12 run bit" "0: Timer T12 is stopped,1: Timer T12 is running"
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bitfld.word 0x0 3. "T12PRE,Timer T12 prescaler bit" "0: The additional prescaler for T12 is disabled,1: The additional prescaler for T12 is enabled"
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bitfld.word 0x0 0.--2. "T12CLK,Timer T12 input clock select" "0: fT12 = fCCU,1: fT12 = fCCU / 2,2: fT12 = fCCU / 4,3: fT12 = fCCU / 8,4: fT12 = fCCU / 16,5: fT12 = fCCU / 32,6: fT12 = fCCU / 64,7: fT12 = fCCU / 128"
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group.word 0x58++0x1
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line.word 0x0 "TCTR2,Timer control 2 register"
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bitfld.word 0x0 10.--11. "T13RSEL,Timer T13 external run selection" "0: The external setting of T13R is disabled,1: Bit T13R is set if a rising edge of signal T13HR..,2: Bit T13R is set if a falling edge of signal..,3: Bit T13R is set if an edge of signal T13HR is.."
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bitfld.word 0x0 8.--9. "T12RSEL,Timer T12 external run selection" "0: The external setting of T12R is disabled,1: Bit T12R is set if a rising edge of signal T12HR..,2: Bit T12R is set if a falling edge of signal..,3: Bit T12R is set if an edge of signal T12HR is.."
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bitfld.word 0x0 5.--6. "T13TED,Timer T13 trigger event direction" "0: No action,1: While T12 is counting up,2: While T12 is counting down,3: Independent on the count direction of T12"
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bitfld.word 0x0 2.--4. "T13TEC,T13 trigger event control" "0: No action,1: Set T13R on a T12 compare event on channel 0,2: Set T13R on a T12 compare event on channel 1,3: Set T13R on a T12 compare event on channel 2,4: Set T13R on any T12 compare event on the..,5: Set T13R upon a period-match of T12,6: Set T13R upon a zero-match of T12 (while..,7: Set T13R on any edge of inputs CCPOSx"
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bitfld.word 0x0 1. "T13SSC,Timer T13 single shot control" "0: No hardware action on T13R,1: The single-shot mode is enabled the bit T13R is.."
|
|
bitfld.word 0x0 0. "T12SSC,Timer T12 single shot control" "0: The single-shot mode is disabled no hardware..,1: The single shot mode is enabled the bit T12R is.."
|
|
wgroup.word 0x4++0x1
|
|
line.word 0x0 "TCTR4,Timer control 4 register"
|
|
bitfld.word 0x0 15. "T13STD,Timer T13 shadow transfer disable" "0: No action,1: STE13 is reset without triggering the shadow.."
|
|
bitfld.word 0x0 14. "T13STR,Timer T13 shadow transfer request" "0: No action,1: STE13 is set enabling the shadow transfer"
|
|
newline
|
|
bitfld.word 0x0 13. "T13CNT,Timer T13 count event" "0: No action,1: If enabled (PISEL2) timer T13 counts one step"
|
|
bitfld.word 0x0 10. "T13RES,Timer T13 reset" "0: No effect on T13,1: The T13 counter register is reset to zero. The.."
|
|
newline
|
|
bitfld.word 0x0 9. "T13RS,Timer T13 run set" "0: T13R is not influenced,1: T13R is set T13 counts"
|
|
bitfld.word 0x0 8. "T13RR,Timer T13 run reset" "0: T13R is not influenced,1: T13R is cleared T13 stops counting"
|
|
newline
|
|
bitfld.word 0x0 7. "T12STD,Timer T12 shadow transfer disable" "0: No action,1: STE12 is reset without triggering the shadow.."
|
|
bitfld.word 0x0 6. "T12STR,Timer T12 shadow transfer request" "0: No action,1: STE12 is set enabling the shadow transfer"
|
|
newline
|
|
bitfld.word 0x0 5. "T12CNT,Timer T12 count event" "0: No action,1: If enabled (PISEL2) timer T12 counts one step"
|
|
bitfld.word 0x0 3. "DTRES,Dead-time counter reset" "0: No effect on the dead-time counters,1: The three dead-time counter channels are reset.."
|
|
newline
|
|
bitfld.word 0x0 2. "T12RES,Timer T12 reset" "0: No effect on T12,1: The T12 counter register is reset to zero. The.."
|
|
bitfld.word 0x0 1. "T12RS,Timer T12 run set" "0: T12R is not influenced,1: T12R is set T12 counts"
|
|
newline
|
|
bitfld.word 0x0 0. "T12RR,Timer T12 run reset" "0: T12R is not influenced,1: T12R is cleared T12 stops counting"
|
|
group.word 0x60++0x1
|
|
line.word 0x0 "TRPCTR,Trap control register"
|
|
bitfld.word 0x0 15. "TRPPEN,Trap pin enable" "0: The trap functionality based on the input pin..,1: The trap functionality based on the input pin.."
|
|
bitfld.word 0x0 14. "TRPEN13,Trap enable control for timer T13" "0: The trap functionality for T13 is disabled;..,1: The trap functionality for T13 is enabled; the.."
|
|
newline
|
|
hexmask.word.byte 0x0 8.--13. 1. "TRPEN,Trap enable control"
|
|
bitfld.word 0x0 2. "TRPM2,Trap mode control bit 2" "0: Hardware_reset,1: Software_reset"
|
|
newline
|
|
bitfld.word 0x0 0.--1. "TRPM10,Trap mode control bits 1 0" "0: The trap state is left (return to normal..,1: The trap state is left (return to normal..,?,3: The trap state is left (return to normal.."
|
|
tree.end
|
|
tree "CPU (CPU Processor)"
|
|
base ad:0xE000E000
|
|
group.long 0xD0C++0x3
|
|
line.long 0x0 "AIRCR,Application interrupt/reset control register"
|
|
hexmask.long.word 0x0 16.--31. 1. "VECTKEY,Vector key"
|
|
rbitfld.long 0x0 15. "ENDIANNESS,Data endianness" "0: Little endian,1: Big endian"
|
|
newline
|
|
bitfld.long 0x0 2. "SYSRESETREQ,System reset request" "0: No effect,1: Request a system level reset"
|
|
bitfld.long 0x0 1. "VECTCLRACTIVE,VECTCLRACTIVE" "0,1"
|
|
rgroup.long 0xD14++0x3
|
|
line.long 0x0 "CCR,Configuration control register"
|
|
bitfld.long 0x0 9. "STKALIGN,STKALIGN" "0,1"
|
|
bitfld.long 0x0 3. "UNALIGN_TRP,UNALIGN_TRP" "0,1"
|
|
rgroup.long 0xD00++0x3
|
|
line.long 0x0 "CPUID,CPU ID base register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IMPLEMENTER,Implementer code"
|
|
hexmask.long.byte 0x0 20.--23. 1. "VARIANT,Variant number"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "CONSTANT,Constant"
|
|
hexmask.long.word 0x0 4.--15. 1. "PARTNO,Part number"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "REVISION,Revision number"
|
|
group.long 0xD04++0x3
|
|
line.long 0x0 "ICSR,Interrupt control and state register"
|
|
bitfld.long 0x0 31. "NMIPENDSET,NMI set pending" "0: On writes has no effect. On reads NMI exception..,1: On writes changes the NMI exception state to.."
|
|
bitfld.long 0x0 28. "PENDSVSET,PendSV set pending" "0: On writes has no effect. On reads PendSV..,1: On writes changes PendSV exception state to.."
|
|
newline
|
|
bitfld.long 0x0 27. "PENDSVCLR,PendSV clear pending" "0: No effect,1: Remove pending state from the PENDSV exception"
|
|
bitfld.long 0x0 26. "PENDSTSET,SysTick exception set pending" "0: On writes has no effect. On reads SysTick..,1: On writes changes SysTick exception state to.."
|
|
newline
|
|
bitfld.long 0x0 25. "PENDSTCLR,SysTick exception clear pending" "0: No effect,1: Removes the pending state from the SysTick.."
|
|
rbitfld.long 0x0 22. "ISRPENDING,Interrupt pending flag" "0: Interrupt not pending,1: Interrupt is pending"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--17. 1. "VECTPENDING,VECTPENDING"
|
|
hexmask.long.byte 0x0 0.--5. 1. "VECTACTIVE,VECTACTIVATE"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "NVIC_ICER,Interrupt clear-enable register"
|
|
bitfld.long 0x0 23. "Int_PORT2,Interrupt Clear for PORT2" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 22. "Int_MON,Interrupt clear for MON" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 21. "Int_DU,Interrupt clear for differential unit" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 20. "Int_HS2,Interrupt clear for HS2" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 19. "Int_HS1,Interrupt clear for HS1" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 18. "Int_LS2,Interrupt clear for LS2" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 17. "Int_LS1,Interrupt clear for LS1" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 14. "Int_WAKEUP,Interrupt clear for WAKEUP" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 13. "Int_EXINT1,Interrupt clear for external Int 1" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 12. "Int_EXINT0,Interrupt clear for external Int 0" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 11. "Int_UART2,Interrupt clear for UART2" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 10. "Int_UART1,Interrupt clear for UART1" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 9. "Int_SSC2,Interrupt clear for SSC2" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 8. "Int_SSC1,Interrupt clear for SSC1" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 7. "Int_CCU6SR3,Interrupt clear for CCU6 SR3" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 6. "Int_CCU6SR2,Interrupt clear for CCU6 SR2" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 5. "Int_CCU6SR1,Interrupt clear for CCU6 SR1" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 4. "Int_CCU6SR0,Interrupt clear for CCU6 SR0" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 3. "Int_ADC1,Interrupt clear for ADC1" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 2. "Int_ADC2,Interrupt clear for MU ADC2" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
newline
|
|
bitfld.long 0x0 1. "Int_GPT2,Interrupt clear for GPT2" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
bitfld.long 0x0 0. "Int_GPT1,Interrupt clear for GPT1" "0: On reads the associated interrupt is disabled no..,1: On reads the associated interrupt is enabled on.."
|
|
group.long 0x280++0x3
|
|
line.long 0x0 "NVIC_ICPR,Interrupt clear-pending register"
|
|
bitfld.long 0x0 23. "Int_PORT2,Interrupt clear pending for PORT2" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 22. "Int_MON,Interrupt clear pending for MON" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 21. "Int_DU,Interrupt clear pending for differential unit" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 20. "Int_HS2,Interrupt clear pending for HS2" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 19. "Int_HS1,Interrupt clear pending for HS1" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 18. "Int_LS2,Interrupt clear pending for LS2" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 17. "Int_LS1,Interrupt clear pending for LS1" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 14. "Int_WAKEUP,Interrupt clear pending for WAKEUP" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 13. "Int_EXINT1,Interrupt clear pending for external Int 1" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 12. "Int_EXINT0,Interrupt clear pending for external Int 0" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 11. "Int_UART2,Interrupt clear pending for UART2" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 10. "Int_UART1,Interrupt clear pending for UART1" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 9. "Int_SSC2,Interrupt clear pending for SSC2" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 8. "Int_SSC1,Interrupt clear pending for SSC1" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 7. "Int_CCU6SR3,Interrupt clear pending for CCU6 SR3" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 6. "Int_CCU6SR2,Interrupt clear pending for CCU6 SR2" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 5. "Int_CCU6SR1,Interrupt clear pending for CCU6 SR1" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 4. "Int_CCU6SR0,Interrupt clear pending for CCU6 SR0" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 3. "Int_ADC1,Interrupt clear pending for ADC1" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 2. "Int_ADC2,Interrupt clear pending for MU ADC2" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
newline
|
|
bitfld.long 0x0 1. "Int_GPT2,Interrupt clear pending for GPT2" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
bitfld.long 0x0 0. "Int_GPT1,Interrupt clear pending for GPT1" "0: On reads the associated interrupt is not pending..,1: On reads the associated interrupt is pending on.."
|
|
group.long 0x400++0x17
|
|
line.long 0x0 "NVIC_IPR0,Interrupt priority 0 register"
|
|
bitfld.long 0x0 30.--31. "PRI_ADC1,Priority for ADC1" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "PRI_ADC2,Priority for MU ADC2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "PRI_GPT2,Priority for GPT2" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "PRI_GPT1,Priority for GPT1" "0,1,2,3"
|
|
line.long 0x4 "NVIC_IPR1,Interrupt priority 1 register"
|
|
bitfld.long 0x4 30.--31. "PRI_CCU6SR3,Priority for CCU6 SR3" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "PRI_CCU6SR2,Priority for CCU6 SR2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "PRI_CCU6SR1,Priority for CCU6 SR1" "0,1,2,3"
|
|
bitfld.long 0x4 6.--7. "PRI_CCU6SR0,Priority for CCU6 SR0" "0,1,2,3"
|
|
line.long 0x8 "NVIC_IPR2,Interrupt priority 2 register"
|
|
bitfld.long 0x8 30.--31. "PRI_UART2,Priority for CCU6 UART2" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "PRI_UART1,Priority for CCU6 UART1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 14.--15. "PRI_SSC2,Priority for CCU6 SSC2" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "PRI_SSC1,Priority for CCU6 SSC1" "0,1,2,3"
|
|
line.long 0xC "NVIC_IPR3,Interrupt priority 3 register"
|
|
bitfld.long 0xC 22.--23. "PRI_WAKEUP,Priority for WAKEUP" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PRI_EXINT1,Priority for external Int 1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 6.--7. "PRI_EXINT0,Priority for external Int 0" "0,1,2,3"
|
|
line.long 0x10 "NVIC_IPR4,Interrupt priority 4 register"
|
|
bitfld.long 0x10 30.--31. "PRI_HS1,Priority for HS1" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. "PRI_LS2,Priority for LS2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 14.--15. "PRI_LS1,Priority for LS1" "0,1,2,3"
|
|
line.long 0x14 "NVIC_IPR5,Interrupt priority 5 register"
|
|
bitfld.long 0x14 30.--31. "PRI_PORT2,Priority for PORT2" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. "PRI_MON,Priority for MON" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x14 14.--15. "PRI_DU,Priority for differential unit" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. "PRI_HS2,Priority for HS2" "0,1,2,3"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "NVIC_ISER,Interrupt set-enable register"
|
|
bitfld.long 0x0 23. "Int_PORT2,Interrupt set for PORT2" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 22. "Int_MON,Interrupt set for MON" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 21. "Int_DU,Interrupt set for differential unit" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 20. "Int_HS2,Interrupt set for HS2" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 19. "Int_HS1,Interrupt set for HS1" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 18. "Int_LS2,Interrupt set for LS2" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 17. "Int_LS1,Interrupt set for LS1" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 14. "Int_WAKEUP,Interrupt set for WAKEUP" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 13. "Int_EXINT1,Interrupt set for external Int 1" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 12. "Int_EXINT0,Interrupt set for external Int 0" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 11. "Int_UART2,Interrupt set for UART2" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 10. "Int_UART1,Interrupt set for UART1" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 9. "Int_SSC2,Interrupt set for SSC2" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 8. "Int_SSC1,Interrupt set for SSC1" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 7. "Int_CCU6SR3,Interrupt set for CCU6 SR3" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 6. "Int_CCU6SR2,Interrupt set for CCU6 SR2" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 5. "Int_CCU6SR1,Interrupt set for CCU6 SR1" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 4. "Int_CCU6SR0,Interrupt set for CCU6 SR0" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 3. "Int_ADC1,Interrupt set for ADC1" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 2. "Int_ADC2,Interrupt set for MU ADC2" "0: No effect on write,1: Enables the associated interrupt"
|
|
newline
|
|
bitfld.long 0x0 1. "Int_GPT2,Interrupt set for GPT2" "0: No effect on write,1: Enables the associated interrupt"
|
|
bitfld.long 0x0 0. "Int_GPT1,Interrupt set for GPT1" "0: No effect on write,1: Enables the associated interrupt"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "NVIC_ISPR,Interrupt set-pending register"
|
|
bitfld.long 0x0 23. "Int_PORT2,Interrupt set pending for PORT2" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 22. "Int_MON,Interrupt set pending for MON" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 21. "Int_DU,Interrupt set pending for differential unit" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 20. "Int_HS2,Interrupt set pending for HS2" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 19. "Int_HS1,Interrupt set pending for HS1" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 18. "Int_LS2,Interrupt set pending for LS2" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 17. "Int_LS1,Interrupt set pending for LS1" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 14. "Int_WAKEUP,Interrupt set pending for WAKEUP" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 13. "Int_EXINT1,Interrupt set pending for external Int 1" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 12. "Int_EXINT0,Interrupt set pending for external Int 0" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 11. "Int_UART2,Interrupt set pending for UART2" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 10. "Int_UART1,Interrupt set pending for UART1" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 9. "Int_SSC2,Interrupt set pending for SSC2" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 8. "Int_SSC1,Interrupt set pending for SSC1" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 7. "Int_CCU6SR3,Interrupt set pending for CCU6 SR3" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 6. "Int_CCU6SR2,Interrupt set pending for CCU6 SR2" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 5. "Int_CCU6SR1,Interrupt set pending for CCU6 SR1" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 4. "Int_CCU6SR0,Interrupt set pending for CCU6 SR0" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 3. "Int_ADC1,Interrupt set pending for ADC1" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 2. "Int_ADC2,Interrupt set pending for MU ADC2" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
newline
|
|
bitfld.long 0x0 1. "Int_GPT2,Interrupt set pending for GPT2" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
bitfld.long 0x0 0. "Int_GPT1,Interrupt set pending for GPT1" "0: On reads the associated interrupt is not pending..,1: The associated interrupt is pending"
|
|
group.long 0xD10++0x3
|
|
line.long 0x0 "SCR,System control register"
|
|
bitfld.long 0x0 4. "SEVONPEND,Send event on pending bit" "0: Only enabled interrupts or events can wake-up..,1: Enabled events and all interrupts including.."
|
|
bitfld.long 0x0 2. "SLEEPDEEP,Sleep deep" "0: Sleep,1: Deep sleep"
|
|
newline
|
|
bitfld.long 0x0 1. "SLEEPONEXIT,Sleep on exit" "0: Do not sleep when returning to Thread mode,1: Enter sleep or deep sleep on return from an ISR.."
|
|
group.long 0xD1C++0x7
|
|
line.long 0x0 "SHPR2,System handler priority 2 register"
|
|
bitfld.long 0x0 30.--31. "PRI_11,Priority of system handler 11 SVCall" "0,1,2,3"
|
|
line.long 0x4 "SHPR3,System handler priority 3 register"
|
|
bitfld.long 0x4 30.--31. "PRI_15,Priority of system handler 15 SysTick" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "PRI_14,Priority of system handler 14 PendSV" "0,1,2,3"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYSTICK_CALIB,SysTick calibration value register"
|
|
bitfld.long 0x0 31. "NOREF,No reference clock" "0,1"
|
|
bitfld.long 0x0 30. "SKEW,Skew" "0,1"
|
|
newline
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "TENMS,Tenms"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "SYSTICK_CSR,SysTick control and status register"
|
|
rbitfld.long 0x0 16. "COUNTFLAG,Count flag" "0,1"
|
|
bitfld.long 0x0 2. "CLKSOURCE,CLK source" "0: External reference clock (from fSYS/4),1: Core clock (from fSYS)"
|
|
newline
|
|
bitfld.long 0x0 1. "TICKINT,TICKINT" "0: Counting down to 0 does not assert the SysTick..,1: Counting down to 0 asserts the SysTick exception.."
|
|
bitfld.long 0x0 0. "ENABLE,Enable" "0: Counter disabled,1: Counter enabled"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SYSTICK_CVR,SysTick current value register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CURRENT,Current"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "SYSTICK_RVR,SysTick reload value register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "RELOAD,Reload"
|
|
tree.end
|
|
tree "GPT12E (General Purpose Timer 12)"
|
|
base ad:0x40010000
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CAPREL,Capture/reload register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CAPREL,Current reload value or captured value"
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "ID,Module identification register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "MOD_TYPE,Module identification number"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MOD_REV,Module revision number"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "PISEL,Port input select register"
|
|
bitfld.long 0x0 14.--15. "ISCAPIN,Input select for CAPIN" "0: Signal CAPINA is selected,1: Signal CAPINB is selected,2: Signal CAPINC (read trigger from T3) is selected,3: Signal CAPIND (read trigger from T2 or T3 or T4).."
|
|
bitfld.long 0x0 13. "IST6EUD,Input select for T6EUD" "0: Signal T6EUDA is selected,1: Signal T6EUDB is selected"
|
|
newline
|
|
bitfld.long 0x0 12. "IST6IN,Input select for T6IN" "0: Signal T6INA is selected,1: Signal T6INB is selected"
|
|
bitfld.long 0x0 11. "IST5EUD,Input select for T5EUD" "0: Signal T5EUDA is selected,1: Signal T5EUDB is selected"
|
|
newline
|
|
bitfld.long 0x0 10. "IST5IN,Input select for T5IN" "0: Signal T5INA is selected,1: Signal T5INB is selected"
|
|
bitfld.long 0x0 8.--9. "IST4EUD,Input select for TEUD" "0: Signal T4EUDA is selected,1: Signal T4EUDB is selected,2: Signal T4EUDC is selected,3: Signal T4EUDD is selected"
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|
newline
|
|
bitfld.long 0x0 6.--7. "IST4IN,Input select for T4IN" "0: Signal T4INA is selected,1: Signal T4INB is selected,2: Signal T4INC is selected,3: Signal T4IND is selected"
|
|
bitfld.long 0x0 4.--5. "IST3EUD,Input select for T3EUD" "0: Signal T3EUDA is selected,1: Signal T3EUDB is selected,2: Signal T3EUDC is selected,3: Signal T3EUDD is selected"
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|
newline
|
|
bitfld.long 0x0 2.--3. "IST3IN,Input select for T3IN" "0: Signal T3INA is selected,1: Signal T3INB is selected,2: Signal T3INC is selected,3: Signal T3IND is selected"
|
|
bitfld.long 0x0 1. "IST2EUD,Input select for T2EUD" "0: Signal T2EUDA is selected,1: Signal T2EUDB is selected"
|
|
newline
|
|
bitfld.long 0x0 0. "IST2IN,Input select for T2IN" "0: Signal T2INA is selected,1: Signal T2INB is selected"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "T2,Timer T2 count register"
|
|
hexmask.long.word 0x0 0.--15. 1. "T2,Timer T2 current value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "T2CON,Timer T2 control register"
|
|
rbitfld.long 0x0 15. "T2DIR,Timer T2 rotation direction" "0: Timer T2 counts up,1: Timer T2 counts down"
|
|
bitfld.long 0x0 14. "T2CHDIR,Timer T2 count direction change" "0: No change of count direction was detected,1: A change of count direction was detected"
|
|
newline
|
|
bitfld.long 0x0 13. "T2EDGE,Timer T2 edge detection" "0: No count edge was detected,1: A count edge was detected"
|
|
bitfld.long 0x0 12. "T2IRIDIS,Timer T2 interrupt disable" "0: Interrupt generation for T2CHDIR and T2EDGE..,1: Interrupt generation for T2CHDIR and T2EDGE.."
|
|
newline
|
|
bitfld.long 0x0 9. "T2RC,Timer T2 remote control" "0: Timer T2 is controlled by its own run bit T2R,1: Timer T2 is controlled by the run bit T3R of.."
|
|
bitfld.long 0x0 8. "T2UDE,Timer T2 external up/down enable" "0: Count direction is controlled by bit T2UD; input..,1: Count direction is controlled by input T2EUD"
|
|
newline
|
|
bitfld.long 0x0 7. "T2UD,Timer T2 up/down control" "0: Timer T2 counts up,1: Timer T2 counts down"
|
|
bitfld.long 0x0 6. "T2R,Timer T2 input run bit" "0: Timer T2 stops,1: Timer T2 runs"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "T2M,Timer T2 input mode control" "0: Timer mode,1: Counter mode,2: Gated timer mode with gate active low,3: Gated timer mode with gate active high,4: Reload mode,5: Capture mode,6: Rotation detection mode,7: Edge detection mode"
|
|
bitfld.long 0x0 0.--2. "T2I,Timer T2 input parameter selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "T3,Timer T3 count register"
|
|
hexmask.long.word 0x0 0.--15. 1. "T3,Timer T3 current value"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "T3CON,Timer T3 control register"
|
|
rbitfld.long 0x0 15. "T3DIR,Timer T3 rotation direction flag" "0: Timer T3 counts up,1: Timer T3 counts down"
|
|
bitfld.long 0x0 14. "T3CHDIR,Timer T3 count direction change flag" "0: No change of count direction was detected,1: A change of count direction was detected"
|
|
newline
|
|
bitfld.long 0x0 13. "T3EDGE,Timer T3 edge detection flag" "0: No count edge was detected,1: A count edge was detected"
|
|
bitfld.long 0x0 11.--12. "BPS1,GPT1 block prescaler control" "0: fGPT/8,1: fGPT/4,2: fGPT/32,3: fGPT/16"
|
|
newline
|
|
bitfld.long 0x0 10. "T3OTL,Timer T3 overflow toggle latch" "0,1"
|
|
bitfld.long 0x0 9. "T3OE,Overflow/underflow output enable" "0: Alternate output function disabled,1: State of T3 toggle latch is output on pin T3OUT"
|
|
newline
|
|
bitfld.long 0x0 8. "T3UDE,Timer T3 external up/down enable" "0: Count direction is controlled by bit T3UD; input..,1: Count direction is controlled by input T3EUD"
|
|
bitfld.long 0x0 7. "T3UD,Timer T3 up/down control" "0: Timer T3 counts up,1: Timer T3 counts down"
|
|
newline
|
|
bitfld.long 0x0 6. "T3R,Timer T3 input run bit" "0: Timer T3 stops,1: Timer T3 runs"
|
|
bitfld.long 0x0 3.--5. "T3M,Timer T3 input mode control" "0: Timer mode,1: Counter mode,2: Gated timer mode with gate active low,3: Gated timer mode with gate active high,?,?,6: Rotation detection mode,7: Edge detection mode"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "T3I,Timer T3 input parameter selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "T4,Timer T4 count register"
|
|
hexmask.long.word 0x0 0.--15. 1. "T4,Timer T4 current value"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "T4CON,Timer T4 control register"
|
|
rbitfld.long 0x0 15. "T4RDIR,Timer T4 rotation direction" "0: Timer T4 counts up,1: Timer T4 counts down"
|
|
bitfld.long 0x0 14. "T4CHDIR,Timer T4 count direction change" "0: No change in count direction was detected,1: A change in count direction was detected"
|
|
newline
|
|
bitfld.long 0x0 13. "T4EDGE,Timer T4 edge direction" "0: No count edge was detected,1: A count edge was detected"
|
|
bitfld.long 0x0 12. "T4IRDIS,Timer T4 interrupt disable" "0: Interrupt generation for T4CHDIR and T4EDGE..,1: Interrupt generation for T4CHDIR and T4EDGE.."
|
|
newline
|
|
bitfld.long 0x0 11. "CLRT3EN,Clear timer T3 enable" "0: No effect of T4IN on timer T3,1: A falling edge on T4In clears timer T3"
|
|
bitfld.long 0x0 10. "CLRT2EN,Clear timer T2 enable" "0: No effect of T4EUD on timer T2,1: A falling edge on T4EUD clears timer T2"
|
|
newline
|
|
bitfld.long 0x0 9. "T4RC,Timer T4 remote control" "0: Timer T4 is controlled by its own run bit T4R,1: Timer T4 is controlled by the run bit T3R of.."
|
|
bitfld.long 0x0 8. "T4UDE,Timer T4 external up/down enable" "0: Count direction is controlled by bit T4UD; input..,1: Count direction is controlled by input T4EUD"
|
|
newline
|
|
bitfld.long 0x0 7. "T4UD,Timer T4 up/down control" "0: Timer T4 counts up,1: Timer T4 counts down"
|
|
bitfld.long 0x0 6. "T4R,Timer T4 input run bit" "0: Timer T4 stops,1: Timer T4 runs"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "T4M,Timer T4 mode control (basic operating mode)" "0: Timer mode,1: Counter mode,2: Gated timer mode with gate active low,3: Gated timer mode with gate active high,4: Reload mode,5: Capture mode,6: Rotation detection mode,7: Edge detection mode"
|
|
bitfld.long 0x0 0.--2. "T4I,Timer T4 input parameter selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "T5,Timer 5 count register"
|
|
hexmask.long.word 0x0 0.--15. 1. "T5,Timer T5 current value"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "T5CON,Timer T5 control register"
|
|
bitfld.long 0x0 15. "T5SC,Timer T5 capture mode enable" "0: Capture into register CAPREL disabled,1: Capture into register CAPREL enabled"
|
|
bitfld.long 0x0 14. "T5CLR,Timer T5 clear enable bit" "0: Timer T5 is not cleared on a capture event,1: Timer T5 is cleared on a capture event"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "CI,Register CAPREL capture trigger selection" "0: Capture disabled,1: Positive transition (rising edge) on CAPIN,2: Negative transition (falling edge) on CAPIN or..,3: Any transition (rising or falling edge) on CAPIN.."
|
|
bitfld.long 0x0 10. "CT3,Timer T3 capture trigger enable" "0: Capture trigger from input line CAPIN,1: Capture trigger from T3 input lines T3IN and/or.."
|
|
newline
|
|
bitfld.long 0x0 9. "T5RC,Timer T5 remote control" "0: Timer T5 is controlled by its own run bit T5R,1: Timer T5 is controlled by the run bit T6R of.."
|
|
bitfld.long 0x0 8. "T5UDE,Timer T5 external up/down enable" "0: Count direction is controlled by bit T5UD; input..,1: Count direction is controlled by input T5EUD"
|
|
newline
|
|
bitfld.long 0x0 7. "T5UD,Timer T5 up/down control" "0: Timer T5 counts up,1: Timer T5 counts down"
|
|
bitfld.long 0x0 6. "T5R,Timer T5 run bit" "0: Timer T5 stops,1: Timer T5 runs"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "T5M,Timer T5 input mode control" "0: Timer mode,1: Counter mode,2: Gated timer mode with gate active low,3: Gated timer mode with gate active high"
|
|
bitfld.long 0x0 0.--2. "T5I,Timer T5 input parameter selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "T6,Timer 6 count register"
|
|
hexmask.long.word 0x0 0.--15. 1. "T6,Timer T6 current value"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "T6CON,Timer T6 control register"
|
|
bitfld.long 0x0 15. "T6SR,Timer T6 reload mode enable" "0: Reload from register CAPREL disabled,1: Reload from register CAPREL enabled"
|
|
bitfld.long 0x0 14. "T6CLR,Timer T6 clear enable bit" "0: Timer T6 is not cleared on a capture event,1: Timer T6 is cleared on a capture event"
|
|
newline
|
|
bitfld.long 0x0 11.--12. "BPS2,GPT2 block prescaler control" "0: fGPT/4,1: fGPT/2,2: fGPT/16,3: fGPT/8"
|
|
bitfld.long 0x0 10. "T6OTL,Timer T6 overflow toggle latch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "T6OE,Overflow/underflow output enable" "0: Alternate output function disabled,1: State of T6 toggle latch is output on pin T6OUT"
|
|
bitfld.long 0x0 8. "T6UDE,Timer T6 external up/down enable" "0: Count direction is controlled by bit T6UD; input..,1: Count direction is controlled by input T6EUD"
|
|
newline
|
|
bitfld.long 0x0 7. "T6UD,Timer T6 up/down control" "0: Timer T3 counts up,1: Timer T3 counts down"
|
|
bitfld.long 0x0 6. "T6R,Timer T6 input run bit" "0: Timer T3 stops,1: Timer T3 runs"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "T6M,Timer T6 mode control" "0: Timer mode,1: Counter mode,2: Gated timer mode with gate active low,3: Gated timer mode with gate active high,?,?,?,?"
|
|
bitfld.long 0x0 0.--2. "T6I,Timer T6 input parameter selection" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "HS (High-Side Switch)"
|
|
base ad:0x40024000
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CTRL,High-side driver control register"
|
|
bitfld.long 0x0 28.--29. "HS2_OC_SEL,High side 2 overcurrent threshold selection" "0: 25 mA min.,1: 50 mA min.,2: 100 mA min.,3: 150 mA min."
|
|
newline
|
|
bitfld.long 0x0 24. "HS2_SRCTL_SEL,High side 2 slew rate control select" "0: Slew rate 10 V/us is enabled,1: Slew rate 30 V/us is enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "HS2_CYC_ON_ACTIVE,High side 2 cyclic ON driver" "0: Cyclic ON driver OFF,1: Cyclic ON driver ON"
|
|
newline
|
|
bitfld.long 0x0 19. "HS2_OL_EN,High side 2 open load detection enable" "0: Disable open load detection,1: Enable open load detection"
|
|
newline
|
|
bitfld.long 0x0 18. "HS2_ON,High side 2 on" "0: HS driver off,1: HS driver on"
|
|
newline
|
|
bitfld.long 0x0 17. "HS2_PWM,High side 2 PWM enable" "0: Disables control by PWM input,1: Enables control by PWM input"
|
|
newline
|
|
bitfld.long 0x0 16. "HS2_EN,High side 2 enable" "0: HS circuit power off,1: HS circuit power on"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "HS1_OC_SEL,High side 1 overcurrent threshold selection" "0: 25 mA min.,1: 50 mA min.,2: 100 mA min.,3: 150 mA min."
|
|
newline
|
|
bitfld.long 0x0 8. "HS1_SRCTL_SEL,High side 1 slew rate control select" "0: Slew rate 10 V/us is enabled,1: Slew rate 30 V/us is enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "HS1_CYC_ON_ACTIVE,High side 1 cyclic ON driver" "0: Cyclic ON driver OFF,1: Cyclic ON driver ON"
|
|
newline
|
|
bitfld.long 0x0 3. "HS1_OL_EN,High side 1 open load detection enable" "0: Disable open load detection,1: Enable open load detection"
|
|
newline
|
|
bitfld.long 0x0 2. "HS1_ON,High side 1 on" "0: HS driver off,1: HS driver on"
|
|
newline
|
|
bitfld.long 0x0 1. "HS1_PWM,High side 1 PWM enable" "0: Disables control by PWM input,1: Enables control by PWM input"
|
|
newline
|
|
bitfld.long 0x0 0. "HS1_EN,High side 1 enable" "0: HS circuit power off,1: HS circuit power on"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "HS1_TRIM,High-side driver 1 TRIM register"
|
|
bitfld.long 0x0 8.--9. "HS1_OC_OT_BTFILT_SEL,Blanking time filter select for HS1 overcurrent/overtemperature detection" "0: 4 us filter time,1: 8 us filter time,2: 16 us filter time,3: 32 us filter time"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "HS1_OL_BTFILT_SEL,Blanking time filter select for HS1 open load detection" "0: 4 us filter time,1: 8 us filter time,2: 16 us filter time,3: 32 us filter time"
|
|
line.long 0x4 "HS2_TRIM,High-side driver 2 TRIM register"
|
|
bitfld.long 0x4 8.--9. "HS2_OC_OT_BTFILT_SEL,Blanking time/filter select for HS2 overcurrent/overtemperature detection" "0: 4 us filter time,1: 8 us filter time,2: 16 us filter time,3: 32 us filter time"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "HS2_OL_BTFILT_SEL,Blanking time filter select for HS2 open load detection" "0: 4 us filter time,1: 8 us filter time,2: 16 us filter time,3: 32 us filter time"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "IRQCLR,High-side driver interrupt status clear register"
|
|
bitfld.long 0x0 30. "HS2_OL_SC,High side 2 open load status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 29. "HS2_OT_SC,High side 2 overtemperature status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 23. "HS2_OC_ISC,High side 2 overcurrent interrupt status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 22. "HS2_OL_ISC,High side 2 open load interrupt status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 21. "HS2_OT_ISC,High side 2 overtemperature interrupt status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 14. "HS1_OL_SC,High side 1 open load status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 13. "HS1_OT_SC,High side 1 overtemperature status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 7. "HS1_OC_ISC,High side 1 overcurrent interrupt status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 6. "HS1_OL_ISC,High side 1 open load interrupt status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 5. "HS1_OT_ISC,High Side 1 overtemperature interrupt status clear" "0: No clear,1: Clear"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "IRQEN,High-side driver interrupt enable register"
|
|
bitfld.long 0x0 23. "HS2_OC_IEN,High side 2 overcurrent interrupt enable" "0: Disabled,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 22. "HS2_OL_IEN,High side 2 open load interrupt enable" "0: Disabled,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 21. "HS2_OT_IEN,High side 2 overtemperature interrupt enable" "0: Disabled,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 7. "HS1_OC_IEN,High side 1 overcurrent interrupt enable" "0: Disabled,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "HS1_OL_IEN,High side 1 open load interrupt enable" "0: Disabled,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 5. "HS1_OT_IEN,High Side 1 overtemperature interrupt enable" "0: Disabled,1: Enable"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "IRQS,High-side driver interrupt status register"
|
|
bitfld.long 0x0 30. "HS2_OL_STS,High side 2 open load interrupt status" "0: No open load condition occurred,1: Open load occurred; switch is not automatically.."
|
|
newline
|
|
bitfld.long 0x0 29. "HS2_OT_STS,High side 2 overtemperature status" "0: No overtemperature occurred,1: Overtemperature occurred; switch is.."
|
|
newline
|
|
bitfld.long 0x0 23. "HS2_OC_IS,High side 2 overcurrent interrupt status" "0: No overcurrent condition occurred,1: Overcurrent occurred; switch is automatically.."
|
|
newline
|
|
bitfld.long 0x0 22. "HS2_OL_IS,High side 2 open load interrupt status" "0: Normal load,1: Open load detected write sets status"
|
|
newline
|
|
bitfld.long 0x0 21. "HS2_OT_IS,High side 2 overtemperature interrupt status" "0: No overtemperature occurred,1: Overtemperature occurred; switch is.."
|
|
newline
|
|
bitfld.long 0x0 14. "HS1_OL_STS,High side 1 open load interrupt status" "0: No open load condition occurred,1: Open load occurred; switch is not automatically.."
|
|
newline
|
|
bitfld.long 0x0 13. "HS1_OT_STS,High side 1 overtemperature status" "0: No overtemperature occurred,1: Overtemperature occurred; switch is.."
|
|
newline
|
|
bitfld.long 0x0 7. "HS1_OC_IS,High side 1 overcurrent interrupt status" "0: No overcurrent condition occurred,1: Overcurrent occurred; switch is automatically.."
|
|
newline
|
|
bitfld.long 0x0 6. "HS1_OL_IS,High side 1 open load interrupt status" "0: Normal load,1: Open load detected write sets status"
|
|
newline
|
|
bitfld.long 0x0 5. "HS1_OT_IS,High side 1 overtemperature interrupt status" "0: No overtemperature occurred,1: Overtemperature occurred; switch is.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "PWMSRCSEL,High-side PWM source selection register"
|
|
bitfld.long 0x0 3.--5. "HS1_SRC_SEL,HS1 PWM source selection" "0: PWM output of CCU6 (CC60),1: PWM output of CCU6 (CC61),2: PWM output of CCU6 (CC62),3: PWM output of CCU6 (COUT60),4: PWM output of CCU6 (COUT61),5: PWM output of CCU6 (COUT62),6: PWM output of GPT12,?"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "HS2_SRC_SEL,HS2 PWM source selection" "0: PWM output of CCU6 (CC60),1: PWM output of CCU6 (CC61),2: PWM output of CCU6 (CC62),3: PWM output of CCU6 (COUT60),4: PWM output of CCU6 (COUT61),5: PWM output of CCU6 (COUT62),6: PWM output of GPT12,?"
|
|
tree.end
|
|
tree "LS (Low-Side Switch)"
|
|
base ad:0x4001C000
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CTRL,Low-side driver control register"
|
|
bitfld.long 0x0 24. "LS2_SRCTL_SEL,Low-side switch 2 slew rate selection" "0: Slow slew rate is selected,1: Fast slew rate is selected"
|
|
bitfld.long 0x0 19. "LS2_OL_EN,Open load detection enable" "0: Open load detection,1: Open load detection"
|
|
newline
|
|
bitfld.long 0x0 18. "LS2_ON,Low-Side switch 2 on/off" "0: Switches LS2 off,1: Turns LS2 on"
|
|
bitfld.long 0x0 17. "LS2_PWM,Low-side switch 2 PWM enable" "0: Normal mode controlled by LS2_ON,1: Enables LS2 for PWM mode"
|
|
newline
|
|
bitfld.long 0x0 16. "LS2_EN,Low-side switch 2 enable" "0: Disables LS2,1: Enables LS2"
|
|
bitfld.long 0x0 8. "LS1_SRCTL_SEL,Low-side switch 1 slew rate selection" "0: Slow slew rate is selected,1: Fast slew rate is selected"
|
|
newline
|
|
bitfld.long 0x0 3. "LS1_OL_EN,Open load detection enable" "0: Open load detection,1: Open load detection"
|
|
bitfld.long 0x0 2. "LS1_ON,Low-side switch 1 on/off" "0: Switches LS1 off,1: Turns LS1 on"
|
|
newline
|
|
bitfld.long 0x0 1. "LS1_PWM,Low-side switch 1 PWM enable" "0: Normal mode controlled by LS1_ON,1: Enables LS1 for PWM mode"
|
|
bitfld.long 0x0 0. "LS1_EN,Low-side switch 1 enable" "0: Disables LS1,1: Enables LS1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "IRQCLR,Low-side driver interrupt status clear register"
|
|
bitfld.long 0x0 30. "LS2_OL_SC,Low-side 2 open load status clear" "0: No clear,1: Clear"
|
|
bitfld.long 0x0 29. "LS2_OT_SC,Low-side switch 2 overtemperature status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 28. "LS2_OT_PREWARN_SC,Low-side 2 overtemperature prewarn status clear" "0: No clear,1: Clear"
|
|
bitfld.long 0x0 23. "LS2_OC_ISC,Low-side 2 overcurrent interrupt status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 22. "LS2_OL_ISC,Low-side 2 open load interrupt status clear" "0: No clear,1: Clear"
|
|
bitfld.long 0x0 21. "LS2_OT_ISC,Low-side 2 overtemperature interrupt status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 20. "LS2_OT_PREWARN_ISC,Low-side 2 overtemperature prewarn interrupt status clear" "0: No clear,1: Clear"
|
|
bitfld.long 0x0 14. "LS1_OL_SC,Low-side 1 open load status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 13. "LS1_OT_SC,Low-side 1 overtemperature status clear" "0: No clear,1: Clear"
|
|
bitfld.long 0x0 12. "LS1_OT_PREWARN_SC,Low-side 1 overtemperature prewarn status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 7. "LS1_OC_ISC,Low-side 1 overcurrent interrupt status clear" "0: No clear,1: Clear"
|
|
bitfld.long 0x0 6. "LS1_OL_ISC,Low-side 1 open load interrupt status clear" "0: No clear,1: Clear"
|
|
newline
|
|
bitfld.long 0x0 5. "LS1_OT_ISC,Low-side 1 overtemperature interrupt status clear" "0: No clear,1: Clear"
|
|
bitfld.long 0x0 4. "LS1_OT_PREWARN_ISC,Low-side 1 overtemperature prewarn interrupt status clear" "0: No clear,1: Clear"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "IRQEN,Low-side driver interrupt enable register"
|
|
bitfld.long 0x0 23. "LS2_OC_IEN,Low-side 2 overcurrent interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 22. "LS2_OL_IEN,Low-side 2 open load interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "LS2_OT_IEN,Low-side 2 overtemperature interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 20. "LS2_OT_PREWARN_IEN,Low-side 2 overtemperature prewarn interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "LS1_OC_IEN,Low-side 1 overcurrent interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 6. "LS1_OL_IEN,Low-side 1 open load interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "LS1_OT_IEN,Low-side 1 overtemperature interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 4. "LS1_OT_PREWARN_IEN,Low-side 1 overtemperature prewarn interrupt enable" "0: Disabled,1: Enabled"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "IRQS,Low-side driver interrupt status register"
|
|
bitfld.long 0x0 30. "LS2_OL_STS,Low-side 2 open load status" "0: No open load condition occurred,1: Open load occurred; switch is not automatically.."
|
|
bitfld.long 0x0 29. "LS2_OT_STS,Low-Side 2 overtemperature status" "0: No overtemperature occurred,1: Overtemperature occurred; switch is.."
|
|
newline
|
|
bitfld.long 0x0 28. "LS2_OT_PREWARN_STS,Low-Side 2 overtemperature prewarning status" "0: No overtemperature prewarn occurred,1: Overtemperature prewarn occurred. Write sets.."
|
|
bitfld.long 0x0 23. "LS2_OC_IS,Low-Side 2 overcurrent interrupt status" "0: No overcurrent condition occurred,1: Overcurrent occurred; switch is automatically.."
|
|
newline
|
|
bitfld.long 0x0 22. "LS2_OL_IS,Low-Side 2 open load interrupt status" "0: No open load condition occurred,1: Open load occurred; switch is not automatically.."
|
|
bitfld.long 0x0 21. "LS2_OT_IS,Low-Side 2 overtemperature interrupt status" "0: No overtemperature occurred,1: Overtemperature occurred; switch is.."
|
|
newline
|
|
bitfld.long 0x0 20. "LS2_OT_PREWARN_IS,Low-Side 2 overtemperature prewarning interrupt status" "0: No overtemperature prewarn occurred,1: Overtemperature prewarn occurred. Write sets.."
|
|
bitfld.long 0x0 14. "LS1_OL_STS,Low-Side 1 open load status" "0: No open load condition occurred,1: Open load occurred; switch is not automatically.."
|
|
newline
|
|
bitfld.long 0x0 13. "LS1_OT_STS,Low-Side 1 overtemperature status" "0: No overtemperature occurred,1: Overtemperature occurred; switch is.."
|
|
bitfld.long 0x0 12. "LS1_OT_PREWARN_STS,Low-Side 1 overtemperature prewarning status" "0: No overtemperature prewarn occurred,1: Overtemperature prewarn occurred; Write sets.."
|
|
newline
|
|
bitfld.long 0x0 7. "LS1_OC_IS,Low-Side 1 overcurrent interrupt status" "0: No overcurrent condition occurred,1: Overcurrent occurred; switch is automatically.."
|
|
bitfld.long 0x0 6. "LS1_OL_IS,Low-Side 1 open load interrupt status" "0: No open load condition occurred,1: Open load occurred; switch is not automatically.."
|
|
newline
|
|
bitfld.long 0x0 5. "LS1_OT_IS,Low-Side 1 overtemperature interrupt status" "0: No overtemperature occurred,1: Overtemperature occurred; switch is.."
|
|
bitfld.long 0x0 4. "LS1_OT_PREWARN_IS,Low-Side 1 overtemperature prewarning interrupt status" "0: No overtemperature prewarn occurred.,1: Overtemperature prewarn occurred. Write sets.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LS1_TRIM,Low-side 1 reference current trimming register"
|
|
bitfld.long 0x0 8.--9. "LS1_OC_BTFILT_SEL,Overcurrent blanktime select for LS1" "0: 4 us filter time,1: 8 us filter time,2: 16 us filter time,3: 32 us filter time"
|
|
bitfld.long 0x0 0.--1. "LS1_OL_BTFILT_SEL,Open load blank time select for LS1" "0: 4 us filter time,1: 8 us filter time,2: 16 us filter time,3: 32 us filter time"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "LS2_TRIM,Low-side 2 reference current trimming register"
|
|
bitfld.long 0x0 8.--9. "LS2_OC_BTFILT_SEL,Overcurrent blank time select for LS2" "0: 4 us filter time,1: 8 us filter time,2: 16 us filter time,3: 32 us filter time"
|
|
bitfld.long 0x0 0.--1. "LS2_OL_BTFILT_SEL,Open load blank time select for LS2" "0: 4 us filter time,1: 8 us filter time,2: 16 us filter time,3: 32 us filter time"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "PWMSRCSEL,Low-side PWM source selection register"
|
|
bitfld.long 0x0 3.--5. "LS1_SRC_SEL,LS1 PWM source selection" "0: PWM output of CCU6 (CC),1: PWM output of CCU6 (CC),2: PWM output of CCU6 (CC),3: PWM output of CCU6 (COUT),4: PWM output of CCU6 (COUT),5: PWM output of CCU6 (COUT),6: PWM output of GPT12,?"
|
|
bitfld.long 0x0 0.--2. "LS2_SRC_SEL,LS2 PWM source selection" "0: PWM output of CCU6 (CC),1: PWM output of CCU6 (CC),2: PWM output of CCU6 (CC),3: PWM output of CCU6 (COUT),4: PWM output of CCU6 (COUT),5: PWM output of CCU6 (COUT),6: PWM output of GPT12,?"
|
|
tree.end
|
|
tree "MF (Measurement Functions)"
|
|
base ad:0x48018000
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "REF1_STS,Reference 1 status register"
|
|
bitfld.long 0x0 5. "REFBG_UPTHWARN_STS,Status for overvoltage threshold measurement of internal VAREF" "0: Write clears status,1: Trigger status set"
|
|
bitfld.long 0x0 4. "REFBG_LOTHWARN_STS,Status for Undervoltage threshold measurement of internal VAREF" "0: Write clears status,1: Trigger status set"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "TEMPSENSE_CTRL,Temperature sensor control register"
|
|
rbitfld.long 0x0 7. "SYS_OT_STS,System overtemperature (MU) status" "0: Write clears status,1: Interrupt status set"
|
|
rbitfld.long 0x0 6. "SYS_OTWARN_STS,System overtemperature warning (MU) status" "0: Write clears status,1: Interrupt status set"
|
|
rbitfld.long 0x0 5. "LS_OT_STS,Low-side overtemperature (MU) status" "0: Write clears status,1: Interrupt status set"
|
|
newline
|
|
bitfld.long 0x0 4. "LS_OTWARN_STS,Low-side overtemperature warning (MU) status" "0: Write clears status,1: Interrupt status set"
|
|
tree.end
|
|
tree "PMU (Power Management Unit)"
|
|
base ad:0x50004000
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "CNF_RST_TFB,Reset blind time register"
|
|
bitfld.long 0x0 0.--1. "RST_TFB,Reset pin blind time selection bits" "0: 0.5 us typ.,1: 1 us typ.,2: 5 us typ.,3: 31 us typ."
|
|
group.long 0xAC++0x3
|
|
line.long 0x0 "CNF_WAKE_FILTER,PMU wake-up timing register"
|
|
bitfld.long 0x0 2.--3. "CNF_GPIO_FT,Wake-up filter time for general purpose IO" "0: 10 us filter time,1: 20 us filter time,2: 40 us filter time,3: 5 us filter time"
|
|
bitfld.long 0x0 1. "CNF_MON_FT,Wake-up filter time for monitoring inputs" "0: 20 us filter time,1: 40 us filter time"
|
|
newline
|
|
bitfld.long 0x0 0. "CNF_LIN_FT,Wake-up filter time for LIN WAKE" "0: 30 us filter time,1: 50 us filter time"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "GPIO_WAKE_STATUS,GPIO port wake status register"
|
|
bitfld.long 0x0 12. "GPIO1_STS_4,Wake GPIO1_4" "0: No wake-up detected,1: Wake-up detected"
|
|
bitfld.long 0x0 10. "GPIO1_STS_2,Wake GPIO1_2" "0: No wake-up detected,1: Wake-up detected"
|
|
newline
|
|
bitfld.long 0x0 9. "GPIO1_STS_1,Wake GPIO1_1" "0: No wake-up detected,1: Wake-up detected"
|
|
bitfld.long 0x0 8. "GPIO1_STS_0,Wake GPIO1_0" "0: No wake-up detected,1: Wake-up detected"
|
|
group.long 0xC0++0xB
|
|
line.long 0x0 "GPUDATA0to3,General purpose user DATA0to3 register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DATA3,DATA3 storage byte"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DATA2,DATA2 storage byte"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATA1,DATA1 storage byte"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA0,DATA0 storage byte"
|
|
line.long 0x4 "GPUDATA4to7,General purpose user DATA4to7 register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "DATA7,DATA7 storage byte"
|
|
hexmask.long.byte 0x4 16.--23. 1. "DATA6,DATA6 storage byte"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "DATA5,DATA5 storage byte"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DATA4,DATA4 storage byte"
|
|
line.long 0x8 "GPUDATA8to11,General purpose user DATA8to11 register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DATA11,DATA11 storage byte"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DATA10,DATA10 storage byte"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "DATA9,DATA9 storage byte"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DATA8,DATA8 storage byte"
|
|
group.long 0x5C++0x3
|
|
line.long 0x0 "HIGHSIDE_CTRL,High-side control register"
|
|
bitfld.long 0x0 10. "HS2_CYC_EN,High-side 2 switch enable for cyclic sense" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 2. "HS1_CYC_EN,High-side 1 switch enable for cyclic sense" "0: Disabled,1: Enabled"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "LIN_WAKE_EN,LIN wake enable register"
|
|
bitfld.long 0x0 7. "LIN_EN,Lin wake enable" "0: Disabled,1: Enabled"
|
|
group.long 0x34++0x7
|
|
line.long 0x0 "MON_CNF1,Settings monitor 1-4 register"
|
|
rbitfld.long 0x0 31. "MON4_STS,MON4 status input" "0: MON input has low status,1: MON input has high status"
|
|
bitfld.long 0x0 29. "MON4_PU,Pull-up current source for MON4 input enable" "0: Pull-up source disabled,1: Pull-up source enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "MON4_PD,Pull-down current source for MON4 input enable" "0: Pull-down source disabled,1: Pull-down source enabled"
|
|
bitfld.long 0x0 27. "MON4_CYC,MON4 for cycle sense enable" "0: Cycle sense disabled,1: Cycle sense enabled"
|
|
newline
|
|
bitfld.long 0x0 26. "MON4_RISE,MON4 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x0 25. "MON4_FALL,MON4 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
newline
|
|
bitfld.long 0x0 24. "MON4_EN,MON4 Enable" "0: MON4 disabled,1: MON4 enabled"
|
|
rbitfld.long 0x0 23. "MON3_STS,MON3 Status Input" "0: MON input has low status,1: MON input has high status"
|
|
newline
|
|
bitfld.long 0x0 21. "MON3_PU,Pull-up current source for MON3 Input enable" "0: Pull-up source disabled,1: Pull-up source enabled"
|
|
bitfld.long 0x0 20. "MON3_PD,Pull-down current source for MON3 input enable" "0: Pull-down source disabled,1: Pull-down source enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "MON3_CYC,MON3 for cycle sense enable" "0: Cycle sense disabled,1: Cycle sense enabled"
|
|
bitfld.long 0x0 18. "MON3_RISE,MON3 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "MON3_FALL,MON3 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x0 16. "MON3_EN,MON3 enable" "0: MON3 disabled,1: MON3 enabled"
|
|
newline
|
|
rbitfld.long 0x0 15. "MON2_STS,MON2 status input" "0: MON input has low status,1: MON input has high status"
|
|
bitfld.long 0x0 13. "MON2_PU,Pull-up current source for MON2 input enable" "0: Pull-up source disabled,1: Pull-up source enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "MON2_PD,Pull-down current source for MON2 Input enable" "0: Pull-down source disabled,1: Pull-down source enabled"
|
|
bitfld.long 0x0 11. "MON2_CYC,MON2 for cycle sense enable" "0: Cycle sense disabled,1: Cycle sense enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "MON2_RISE,MON2 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x0 9. "MON2_FALL,MON2 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "MON2_EN,MON2 enable" "0: MON2 disabled,1: MON2 enabled"
|
|
rbitfld.long 0x0 7. "MON1_STS,MON1 status input" "0: MON input has low status,1: MON input has high status"
|
|
newline
|
|
bitfld.long 0x0 5. "MON1_PU,Pull-up current source for MON1 input enable" "0: Pull-up source disabled,1: Pull-up source enabled"
|
|
bitfld.long 0x0 4. "MON1_PD,Pull-down current source for MON1 input enable" "0: Pull-down source disabled,1: Pull-down source enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "MON1_CYC,MON1 for cycle sense enable" "0: Cycle sense disabled,1: Cycle sense enabled"
|
|
bitfld.long 0x0 2. "MON1_RISE,MON1 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "MON1_FALL,MON1 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x0 0. "MON1_EN,MON1 enable" "0: MON1 disabled,1: MON1 enabled"
|
|
line.long 0x4 "MON_CNF2,Settings monitor 5 register"
|
|
rbitfld.long 0x4 7. "MON5_STS,MON5 status input" "0: MON input has low status,1: MON input has high status"
|
|
bitfld.long 0x4 5. "MON5_PU,Pull-up current source for MON5 input enable" "0: Pull-up source disabled,1: Pull-up source enabled"
|
|
newline
|
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bitfld.long 0x4 4. "MON5_PD,Pull-down current source for MON5 input enable" "0: Pull-down source disabled,1: Pull-down source enabled"
|
|
bitfld.long 0x4 3. "MON5_CYC,MON5 for cycle sense enable" "0: Cycle sense disabled,1: Cycle sense enabled"
|
|
newline
|
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bitfld.long 0x4 2. "MON5_RISE,MON5 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x4 1. "MON5_FALL,MON5 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
newline
|
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bitfld.long 0x4 0. "MON5_EN,MON5 enable" "0: MON5 disabled,1: MON5 enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "RESET_STS,Reset status register"
|
|
bitfld.long 0x0 10. "LOCKUP,Lockup-reset flag" "0: No lockup-reset executed,1: Lockup-reset executed"
|
|
bitfld.long 0x0 9. "PMU_SOFT,Soft-reset flag" "0: No soft-reset executed,1: Soft-reset executed"
|
|
newline
|
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bitfld.long 0x0 7. "PMU_VS_POR,Power-on reset flag" "0: No power-on reset executed,1: Power-on reset executed"
|
|
bitfld.long 0x0 6. "PMU_PIN,PIN-reset flag" "0: No PIN-reset executed,1: PIN-reset executed"
|
|
newline
|
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bitfld.long 0x0 5. "PMU_ExtWDT,External watchdog (WDT1) reset flag" "0: No external watchdog reset executed,1: External watchdog reset executed"
|
|
bitfld.long 0x0 4. "PMU_ClkWDT,Clock watchdog (CLKWDT) reset flag" "0: Noclock watchdog reset executed,1: Clock watchdog reset executed"
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|
newline
|
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bitfld.long 0x0 3. "PMU_LPR,Low priority resets" "0: Low priority-reset executed,1: Low priority executed"
|
|
bitfld.long 0x0 2. "PMU_SleepEX,Flag which indicates a reset caused by sleep-exit" "0: No reset caused by sleep-exit executed,1: Reset caused by sleep-exit executed"
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|
newline
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bitfld.long 0x0 1. "PMU_WAKE,Flag which indicates a reset caused by stop-exit" "0: No reset caused by stop-exit executed,1: Reset caused by stop-exit executed"
|
|
bitfld.long 0x0 0. "SYS_FAIL,Flag which indicates a reset caused by a system fail reported in the corresponding fail register" "0: No reset caused by system fail executed,1: Reset caused by system fail executed"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SLEEP,PMU sleep behavior register"
|
|
bitfld.long 0x0 24.--26. "CYC_SENSE_S_DEL,Sample delay in cyclic sense mode" "0: Is 10 us,1: Is 20 us,2: Is 30 us,3: Is 40 us,4: Is 60 us,5: Is 80 us,6: Is 100 us,7: Is 150 us"
|
|
bitfld.long 0x0 20.--21. "CYC_WAKE_E01,Exponent" "0: Exponent value is 0,1: Exponent value is 1,2: Exponent value is 2,3: Exponent value is 3"
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newline
|
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hexmask.long.byte 0x0 16.--19. 1. "CYC_WAKE_M03,Mantissa"
|
|
bitfld.long 0x0 12.--13. "CYC_SENSE_E01,Exponent" "0: Exponent value is 0,1: Exponent value is 1,2: Exponent value is 2,3: Exponent value is 3"
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|
newline
|
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hexmask.long.byte 0x0 8.--11. 1. "CYC_SENSE_M03,Mantissa"
|
|
bitfld.long 0x0 3. "CYC_SENSE_EN,Enabling cyclic sense" "0: Cyclic sense disabled,1: Cyclic sense enabled"
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|
newline
|
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bitfld.long 0x0 2. "CYC_WAKE_EN,Enabling cyclic wake" "0: Cyclic wake disabled,1: Cyclic wake enabled"
|
|
bitfld.long 0x0 1. "EN_0V9_N,Enables the reduction of the VDDC regulator output to reduced voltage during stop mode" "0: Output voltage reduction enabled,1: Output voltage reduction disabled"
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|
newline
|
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bitfld.long 0x0 0. "WAKE_W_RST,Wake-up with reset execution" "0: Stop-exit without reset execution,1: Stop-exit with reset execution"
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "SUPPLY_STS,Voltage reg status register"
|
|
bitfld.long 0x0 6. "PMU_5V_FAIL_EN,Enabling of VDDP status information as interrupt source" "0: No interrupts are generated,1: Interrupts are generated"
|
|
rbitfld.long 0x0 5. "PMU_5V_OVERLOAD,Overload at VDDP regulator" "0: No overload,1: Overload"
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|
newline
|
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rbitfld.long 0x0 4. "PMU_5V_OVERVOLT,Overvoltage at VDDP regulator" "0: No overvoltage,1: Overvoltage"
|
|
bitfld.long 0x0 2. "PMU_1V5_FAIL_EN,Enabling of VDDC status information as interrupt source" "0: No interrupts are generated,1: Interrupts are generated"
|
|
newline
|
|
rbitfld.long 0x0 1. "PMU_1V5_OVERLOAD,Overload at VDDC regulator" "0: No overload,1: Overload"
|
|
rbitfld.long 0x0 0. "PMU_1V5_OVERVOLT,Overvoltage at VDDC regulator" "0: No overvoltage,1: Overvoltage"
|
|
line.long 0x4 "VDDEXT_CTRL,VDDEXT control register"
|
|
bitfld.long 0x4 13. "VDDEXT_OT_SC,VDDEXT supply overtemperature status clear" "0: VDDEXT overtemperature status not cleared,1: VDDEXT overtemperature status cleared"
|
|
bitfld.long 0x4 12. "VDDEXT_UV_ISC,VDDEXT supply undervoltage interrupt status clear" "0: VDDEXT undervoltage not cleared,1: VDDEXT undervoltage cleared"
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|
newline
|
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bitfld.long 0x4 11. "VDDEXT_OT_ISC,VDDEXT supply overtemperature interrupt status clear" "0: VDDEXTovertemperature not cleared,1: VDDEXTovertemperature cleared"
|
|
rbitfld.long 0x4 7. "VDDEXT_STABLE,VDDEXT supply stable" "0: VDDEXT not in stable condition,1: VDDEXT in stable condition"
|
|
newline
|
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rbitfld.long 0x4 6. "VDDEXT_OT,VDDEXT supply overtemperature" "0: VDDEXT not in overtemperature condition,1: VDDEXT in overtemperature condition"
|
|
rbitfld.long 0x4 5. "VDDEXT_OT_STS,VDDEXT supply overtemperature status" "0: VDDEXT not in overtemperature condition,1: VDDEXT in overtemperature condition"
|
|
newline
|
|
rbitfld.long 0x4 4. "VDDEXT_UV_IS,VDDEXT supply undervoltage interrupt status" "0: VDDEXT not in undervoltage condition,1: VDDEXT in undervoltage condition"
|
|
rbitfld.long 0x4 3. "VDDEXT_OT_IS,VDDEXT supply overtemperature interrupt status" "0: VDDEXT no overtemperature condition,1: VDDEXT overtemperature condition"
|
|
newline
|
|
bitfld.long 0x4 2. "VDDEXT_FAIL_EN,Enabling of VDDEXT supply status information as interrupt source" "0: VDDEXT fail interrupts are disabled,1: VDDEXT fail Interrupts are enabled"
|
|
bitfld.long 0x4 1. "VDDEXT_CYC_EN,VDDEXT supply for cyclic sense enable" "0: VDDEXT for cyclic sense disable,1: VDDEXT for cyclic sense enable"
|
|
newline
|
|
bitfld.long 0x4 0. "VDDEXT_ENABLE,VDDEXT supply enable" "0: VDDEXT supply disabled,1: VDDEXT supply enabled"
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "WAKE_CNF_GPIO1,Wake configuration GPIO port 1 register"
|
|
bitfld.long 0x0 20. "CYC_4,GPIO1_4 input for cycle sense enable" "0: Input for cycle sense disabled,1: Input for cycle sense enabled"
|
|
bitfld.long 0x0 18. "CYC_2,GPIO1_2 input for cycle sense enable" "0: Input for cycle sense disabled,1: Input for cycle sense enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "CYC_1,GPIO1_1 input for cycle sense enable" "0: Input for cycle sense disabled,1: Input for cycle sense enabled"
|
|
bitfld.long 0x0 16. "CYC_0,GPIO1_0 input for cycle sense enable" "0: Input for cycle sense disabled,1: Input for cycle sense enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "FA_4,Port 1_4 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x0 10. "FA_2,Port 1_2 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "FA_1,Port 1_1 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x0 8. "FA_0,Port 1_0 wake-up on falling edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "RI_4,Port 1_4 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x0 2. "RI_2,Port 1_2 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "RI_1,Port 1_1 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
bitfld.long 0x0 0. "RI_0,Port 1_0 wake-up on rising edge enable" "0: Wake-up disabled,1: Wake-up enabled"
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "WAKE_STATUS,Main wake status register"
|
|
bitfld.long 0x0 18. "VDDEXT_UV,Wake VDDEXT undervoltage" "0: No wake-up detected,1: Wake-up detected"
|
|
bitfld.long 0x0 17. "VDDEXT_OT,Wake VDDEXT overtemperature" "0: No wake-up detected,1: Wake-up detected"
|
|
newline
|
|
bitfld.long 0x0 12. "MON5_WAKE_STS,Status of MON5" "0: No wake-up detected,1: Wake-up detected"
|
|
bitfld.long 0x0 11. "MON4_WAKE_STS,Status of MON4" "0: No wake-up detected,1: Wake-up detected"
|
|
newline
|
|
bitfld.long 0x0 10. "MON3_WAKE_STS,Status of MON3" "0: No wake-up detected,1: Wake-up detected"
|
|
bitfld.long 0x0 9. "MON2_WAKE_STS,Status of MON2" "0: No wake-up detected,1: Wake-up detected"
|
|
newline
|
|
bitfld.long 0x0 8. "MON1_WAKE_STS,Status of MON1" "0: No wake-up detected,1: Wake-up detected"
|
|
bitfld.long 0x0 5. "FAIL,Wake-up after VDDEXT fail" "0: No wake-up occurred,1: Wake-up occurred"
|
|
newline
|
|
bitfld.long 0x0 4. "CYC_WAKE,Wake-up caused by cyclic wake" "0: No wake-up occurred,1: Wake-up occurred"
|
|
bitfld.long 0x0 3. "GPIO1,Wake-up via GPIO1 which is a logical OR combination of all Wake_STS_GPIO1 bits" "0: No wake-up occurred,1: Wake-up occurred"
|
|
newline
|
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bitfld.long 0x0 1. "MON,Wake-up via MON which is a logical OR combination of all Wake_STS_MON bits" "0: No wake-up occurred,1: Wake-up occurred"
|
|
bitfld.long 0x0 0. "LIN_WAKE,Wake-up via LIN- Message" "0: No wake-up occurred,1: Wake-up occurred"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "WFS,WFS system fail register"
|
|
bitfld.long 0x0 7. "LP_CLKWD,LP_CLKWD" "0: Normal operation,1: LP_CLK clock failure"
|
|
bitfld.long 0x0 6. "WDT1_SEQ_FAIL,External watchdog (WDT1) sequential fail" "0: No fail system working properly,1: 5 consecutive watchdog fails"
|
|
newline
|
|
bitfld.long 0x0 5. "SYS_OT,System overtemperature indication flag" "0: Normal operation,1: Overtemperature"
|
|
bitfld.long 0x0 3. "PMU_5V_OVL,VDDP overload flag" "0: VDDP ok,1: VDDP overload"
|
|
newline
|
|
bitfld.long 0x0 2. "PMU_1V5_OVL,VDDC overload flag" "0: VDDC ok,1: Hall VDDC overload"
|
|
bitfld.long 0x0 0. "SUPP_SHORT,Supply short" "0: VDDP or VDDC are in expected range,1: VDDP or VDDC do not have stable operating point"
|
|
tree.end
|
|
tree "PORT (Port Registers)"
|
|
base ad:0x48028000
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "P0_ALTSEL0,Port 0 alternate select 0 register"
|
|
bitfld.long 0x0 5. "PP5,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x0 4. "PP4,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
newline
|
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bitfld.long 0x0 3. "PP3,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x0 2. "PP2,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x0 0. "PP0,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
line.long 0x4 "P0_ALTSEL1,Port 0 alternate select 1 register"
|
|
bitfld.long 0x4 5. "PP5,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x4 4. "PP4,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
newline
|
|
bitfld.long 0x4 3. "PP3,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x4 2. "PP2,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
newline
|
|
bitfld.long 0x4 1. "PP1,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x4 0. "PP0,Normal GPIO or alternate select 1 2 or 3 (depends on bits P0_ALTSEL0.PPx and P0_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "P0_DATA,Port 0 data register"
|
|
rbitfld.long 0x0 21. "PP5_STS,Port 0 pin 5 data value (read back of port data when IO is configured as output)" "0: Port 0 pin 5 data value = 0,1: Port 0 pin 5 data value = 1"
|
|
rbitfld.long 0x0 20. "PP4_STS,Port 0 pin 4 data value (read back of port data when IO is configured as output)" "0: Port 0 pin 4 data value = 0,1: Port 0 pin 4 data value = 1"
|
|
newline
|
|
rbitfld.long 0x0 19. "PP3_STS,Port 0 pin 3 data value (read back of port data when IO is configured as output)" "0: Port 0 pin 3 data value = 0,1: Port 0 pin 3 data value = 1"
|
|
rbitfld.long 0x0 18. "PP2_STS,Port 0 pin 2 data value (read back of port data when IO is configured as output)" "0: Port 0 pin 2 data value = 0,1: Port 0 pin 2 data value = 1"
|
|
newline
|
|
rbitfld.long 0x0 17. "PP1_STS,Port 0 pin 1 data value (read back of port data when IO is configured as output)" "0: Port 0 pin 1 data value = 0,1: Port 0 pin 1 data value = 1"
|
|
rbitfld.long 0x0 16. "PP0_STS,Port 0 pin 0 data value (read back of port data when IO is configured as output)" "0: Port 0 pin 0 data value = 0,1: Port 0 pin 0 data value = 1"
|
|
newline
|
|
bitfld.long 0x0 5. "PP5,Port 0 pin 5 data value" "0: Port 0 pin 5 data value = 0,1: Port 0 pin 5 data value = 1"
|
|
bitfld.long 0x0 4. "PP4,Port 0 pin 4 data value" "0: Port 0 pin 4 data value = 0,1: Port 0 pin 4 data value = 1"
|
|
newline
|
|
bitfld.long 0x0 3. "PP3,Port 0 pin 3 data value" "0: Port 0 pin 3 data value = 0,1: Port 0 pin 3 data value = 1"
|
|
bitfld.long 0x0 2. "PP2,Port 0 pin 2 data value" "0: Port 0 pin 2 data value = 0,1: Port 0 pin 2 data value = 1"
|
|
newline
|
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bitfld.long 0x0 1. "PP1,Port 0 pin 1 data value" "0: Port 0 pin 1 data value = 0,1: Port 0 pin 1 data value = 1"
|
|
bitfld.long 0x0 0. "PP0,Port 0 pin 0 data value" "0: Port 0 pin 0 data value = 0,1: Port 0 pin 0 data value = 1"
|
|
line.long 0x4 "P0_DIR,Port 0 direction register"
|
|
bitfld.long 0x4 21. "PP5_INEN,Port 0 pin 5 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
bitfld.long 0x4 20. "PP4_INEN,Port 0 pin 4 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
newline
|
|
bitfld.long 0x4 19. "PP3_INEN,Port 0 pin 3 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
bitfld.long 0x4 18. "PP2_INEN,Port 0 pin 2 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
newline
|
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bitfld.long 0x4 17. "PP1_INEN,Port 0 pin 1 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
bitfld.long 0x4 16. "PP0_INEN,Port 0 pin 0 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
newline
|
|
bitfld.long 0x4 5. "PP5,Port 0 pin 5 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 4. "PP4,Port 0 pin 4 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
newline
|
|
bitfld.long 0x4 3. "PP3,Port 0 pin 3 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 2. "PP2,Port 0 pin 2 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
newline
|
|
bitfld.long 0x4 1. "PP1,Port 0 pin 1 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 0. "PP0,Port 0 pin 0 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
line.long 0x8 "P0_OD,Port 0 open drain control register"
|
|
bitfld.long 0x8 5. "PP5,Port 0 pin 5 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
bitfld.long 0x8 4. "PP4,Port 0 pin 4 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
newline
|
|
bitfld.long 0x8 3. "PP3,Port 0 pin 3 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
bitfld.long 0x8 2. "PP2,Port 0 pin 2 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
newline
|
|
bitfld.long 0x8 1. "PP1,Port 0 pin 1 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
bitfld.long 0x8 0. "PP0,Port 0 pin 0 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "P0_PUDEN,Port 0 pull-up/pull-down enable register"
|
|
bitfld.long 0x0 5. "PP5,Pull-up/pull-down enable at port 0 bit 5" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 4. "PP4,Pull-up/pull-down enable at port 0 bit 4" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
newline
|
|
bitfld.long 0x0 3. "PP3,Pull-up/pull-down enable at port 0 bit 3" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 2. "PP2,Pull-up/pull-down enable at port 0 bit 2" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
newline
|
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bitfld.long 0x0 1. "PP1,Pull-up/pull-down enable at port 0 bit 1" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 0. "PP0,Pull-up/pull-down enable at port 0 bit 0" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "P0_PUDSEL,Port 0 pull-up/pull-down select register"
|
|
bitfld.long 0x0 5. "PP5,Pull-up/pull-down select port 0 bit 5" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 4. "PP4,Pull-up/pull-down select port 0 bit 4" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
newline
|
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bitfld.long 0x0 3. "PP3,Pull-up/pull-down select port 0 bit 3" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 2. "PP2,Pull-up/pull-down select port 0 bit 2" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Pull-up/pull-down select port 0 bit 1" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 0. "PP0,Pull-up/pull-down select port 0 bit 0" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
group.long 0x34++0x7
|
|
line.long 0x0 "P1_ALTSEL0,Port 1 alternate select 0 register"
|
|
bitfld.long 0x0 4. "PP4,Normal GPIO or alternate select 1 2 or 3 (depends on bits P1_ALTSEL0.PPx and P1_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x0 2. "PP2,Normal GPIO or alternate select 1 2 or 3 (depends on bits P1_ALTSEL0.PPx and P1_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Normal GPIO or alternate select 1 2 or 3 (depends on bits P1_ALTSEL0.PPx and P1_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x0 0. "PP0,Normal GPIO or alternate select 1 2 or 3 (depends on bits P1_ALTSEL0.PPx and P1_ALTSEL1.PPx)" "0: Const_0,1: Const_1"
|
|
line.long 0x4 "P1_ALTSEL1,Port 1 alternate select 1 register"
|
|
bitfld.long 0x4 4. "PP4,PP4" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x4 2. "PP2,PP2" "0: Const_0,1: Const_1"
|
|
newline
|
|
bitfld.long 0x4 1. "PP1,PP1" "0: Const_0,1: Const_1"
|
|
bitfld.long 0x4 0. "PP0,PP0" "0: Const_0,1: Const_1"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "P1_DATA,Port 1 data register"
|
|
bitfld.long 0x0 20. "PP4_STS,Port 1 pin 4 data value (read back of port data when IO is configured as output)" "0: Port 1 pin 4 data value = 0,1: Port 1 pin 4 data value = 1"
|
|
bitfld.long 0x0 18. "PP2_STS,Port 1 pin 2 data value (read back of port data when IO is configured as output)" "0: Port 1 pin 2 data value = 0,1: Port 1 pin 2 data value = 1"
|
|
newline
|
|
bitfld.long 0x0 17. "PP1_STS,Port 1 pin 1 data value (read back of port data when IO is configured as output)" "0: Port 1 pin 1 data value = 0,1: Port 1 pin 1 data value = 1"
|
|
bitfld.long 0x0 16. "PP0_STS,Port 1 pin 0 data value (read back of port data when IO is configured as output)" "0: Port 1 pin 0 data value = 0,1: Port 1 pin 0 data value = 1"
|
|
newline
|
|
bitfld.long 0x0 4. "PP4,Port 1 pin 4 data value" "0: Port 1 pin 4 data value = 0,1: Port 1 pin 4 data value = 1"
|
|
bitfld.long 0x0 2. "PP2,Port 1 pin 2 data value" "0: Port 1 pin 2 data value = 0,1: Port 1 pin 2 data value = 1"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Port 1 pin 1 data value" "0: Port 1 pin 1 data value = 0,1: Port 1 pin 1 data value = 1"
|
|
bitfld.long 0x0 0. "PP0,Port 1 pin 0 data value" "0: Port 1 pin 0 data value = 0,1: Port 1 pin 0 data value = 1"
|
|
line.long 0x4 "P1_DIR,Port 1 direction register"
|
|
bitfld.long 0x4 20. "PP3_INEN,Port 1 pin 4 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
bitfld.long 0x4 18. "PP2_INEN,Port 1 pin 2 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
newline
|
|
bitfld.long 0x4 17. "PP1_INEN,Port 1 pin 1 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
bitfld.long 0x4 16. "PP0_INEN,Port 1 pin 0 input Schmitt trigger enable (only valid if IO is configured as output)" "0: Schmitt trigger is disabled (default),1: Schmitt trigger is enabled"
|
|
newline
|
|
bitfld.long 0x4 4. "PP4,Port 1 pin 4 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 2. "PP2,Port 1 pin 2 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
newline
|
|
bitfld.long 0x4 1. "PP1,Port 1 pin 1 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 0. "PP0,Port 1 pin 0 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
line.long 0x8 "P1_OD,Port 1 open drain control register"
|
|
bitfld.long 0x8 4. "PP4,Port 1 pin 4 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
bitfld.long 0x8 2. "PP2,Port 1 pin 2 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
newline
|
|
bitfld.long 0x8 1. "PP1,Port 1 pin 1 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
bitfld.long 0x8 0. "PP0,Port 1 pin 0 open drain mode" "0: Output is actively driven for 0 and 1 state..,1: Output is actively driven only for 0 state"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "P1_PUDEN,Port 1 pull-up/pull-down enable register"
|
|
bitfld.long 0x0 4. "PP4,Pull-up/pull-down enable at port 1 bit 4" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 2. "PP2,Pull-up/pull-down enable at port 1 bit 2" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Pull-up/pull-down enable at port 1 bit 1" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 0. "PP0,Pull-up/pull-down enable at port 1 bit 0" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "P1_PUDSEL,Port 1 pull-up/pull-down select register"
|
|
bitfld.long 0x0 4. "PP4,Pull-up/pull-down select port 1 bit 4" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 2. "PP2,Pull-up/pull-down select port 1 bit 2" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Pull-up/pull-down select port 1 bit 1" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 0. "PP0,Pull-up/pull-down select port 1 bit 0" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "P2_DATA,Port 2 data register"
|
|
bitfld.long 0x0 7. "PP7,Port 2 pin 7 data value" "0: Port 2 pin 7 data value = 0,1: Port 2 pin 7 data value = 1"
|
|
bitfld.long 0x0 6. "PP6,Port 2 pin 6 data value" "0: Port 2 pin 6 data value = 0,1: Port 2 pin 6 data value = 1"
|
|
newline
|
|
bitfld.long 0x0 5. "PP5,Port 2 pin 5 data value" "0: Port 2 pin 5 data value = 0,1: Port 2 pin 5 data value = 1"
|
|
bitfld.long 0x0 4. "PP4,Port 2 pin 4 data value" "0: Port 2 pin 4 data value = 0,1: Port 2 pin 4 data value = 1"
|
|
newline
|
|
bitfld.long 0x0 3. "PP3,Port 2 pin 3 data value" "0: Port 2 pin 3 data value = 0,1: Port 2 pin 3 data value = 1"
|
|
bitfld.long 0x0 2. "PP2,Port 2 pin 2 data value" "0: Port 2 pin 2 data value = 0,1: Port 2 pin 2 data value = 1"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Port 2 pin 1 data value" "0: Port 2 pin 1 data value = 0,1: Port 2 pin 1 data value = 1"
|
|
bitfld.long 0x0 0. "PP0,Port 2 pin 0 data value" "0: Port 2 pin 0 data value = 0,1: Port 2 pin 0 data value = 1"
|
|
line.long 0x4 "P2_DIR,Port 2 direction register"
|
|
bitfld.long 0x4 7. "PP7,Port 2 pin 7 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 6. "PP6,Port 2 pin 6 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
newline
|
|
bitfld.long 0x4 5. "PP5,Port 2 pin 5 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 4. "PP4,Port 2 pin 4 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
newline
|
|
bitfld.long 0x4 3. "PP3,Port 2 pin 3 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 2. "PP2,Port 2 pin 2 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
newline
|
|
bitfld.long 0x4 1. "PP1,Port 2 pin 1 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
bitfld.long 0x4 0. "PP0,Port 2 pin 0 direction control" "0: Direction is set to input (default),1: Direction is set to output"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "P2_PUDEN,Port 2 pull-up/pull-down enable register"
|
|
bitfld.long 0x0 7. "PP7,Pull-up/pull-down enable at port 2 bit 7" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 6. "PP6,Pull-up/pull-down enable at port 2 bit 6" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
newline
|
|
bitfld.long 0x0 5. "PP5,Pull-up/pull-down enable at port 2 bit 5" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 4. "PP4,Pull-up/pull-down enable at port 2 bit 4" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
newline
|
|
bitfld.long 0x0 3. "PP3,Pull-up/pull-down enable at port 2 bit 3" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 2. "PP2,Pull-up/pull-down enable at port 2 bit 2" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Pull-up/pull-down enable at port 2 bit 1" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
bitfld.long 0x0 0. "PP0,Pull-up/pull-down enable at port 2 bit 0" "0: Pull-up or pull-down device is disabled,1: Pull-up or pull-down device is enabled (default)"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "P2_PUDSEL,Port 2 pull-up/pull-down select register"
|
|
bitfld.long 0x0 7. "PP7,Pull-up/pull-down select port 2 bit 7" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 6. "PP6,Pull-up/pull-down select port 2 bit 6" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
newline
|
|
bitfld.long 0x0 5. "PP5,Pull-up/pull-down select port 2 bit 5" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 4. "PP4,Pull-up/pull-down select port 2 bit 4" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
newline
|
|
bitfld.long 0x0 3. "PP3,Pull-up/pull-down select port 2 bit 3" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 2. "PP2,Pull-up/pull-down select port 2 bit 2" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
newline
|
|
bitfld.long 0x0 1. "PP1,Pull-up/pull-down select port 2 bit 1" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
bitfld.long 0x0 0. "PP0,Pull-up/pull-down select port 2 bit 0" "0: Pull-down device is selected,1: Pull-up device is selected (default)"
|
|
tree.end
|
|
tree "SCU (System Control Unit)"
|
|
base ad:0x0
|
|
tree "SCUDM (Digital Modules)"
|
|
base ad:0x50005000
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "ADC1_CLK,ADC1 peripheral clock register"
|
|
bitfld.long 0x0 8.--9. "DPP1_CLK_DIV,ADC1 post processing clock divider" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADC1_CLK_DIV,ADC1 clock divider"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "APCLK,Analog peripheral clock register"
|
|
bitfld.long 0x0 25. "BGCLK_DIV,Bandgap clock divider" "0: Divide by 2,1: Divide by 1"
|
|
newline
|
|
bitfld.long 0x0 24. "BGCLK_SEL,Bandgap clock selection" "0: LP_CLK is selected,1: fSYS is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "APCLK2FAC,Slow down clock divider for TFILT_CLK generation"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "APCLK1FAC,Analog module clock factor" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4"
|
|
group.long 0x54++0x3
|
|
line.long 0x0 "APCLK_CTRL,Analog peripheral clock control register"
|
|
bitfld.long 0x0 8. "CLKWDT_IE,Clock watchdog interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "APCLK_SET,Set and overtake flag for clock settings" "0: Clock settings are ignored (previous values are..,1: Clock settings are overtaken"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "APCLK_SCLR,Analog peripheral clock status clear register"
|
|
bitfld.long 0x0 24. "PLL_LOCK_SCLR,PLL lock status clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "APCLK3SCLR,Analog peripherals clock 3 status clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "APCLK2SCLR,Analog peripherals clock status clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "APCLK1SCLR,Analog peripherals clock status clear" "0,1"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "APCLK_STS,Analog peripheral clock status register"
|
|
bitfld.long 0x0 24. "PLL_LOCK,PLL LOCK status" "0: PLL has not locked,1: PLL has locked"
|
|
newline
|
|
bitfld.long 0x0 16. "APCLK3STS,Loss of clock status" "0: No loss of clock,1: Loss of lock occurred"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "APCLK2STS,Analog peripherals clock status" "0: The TFILT_CLK clock is in the required range,1: The TFILT_CLK clock exceeds the higher limit,2: The TFILT_CLK clock exceeds the lower limit,3: The TFILT_CLK clock is not inside the specified.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "APCLK1STS,Analog peripherals clock status" "0: The MI_CLK clock is in the required range,1: The MI_CLK clock exceeds the higher limit,2: The MI_CLK clock exceeds the lower limit,3: The MI_CLK clock is not inside the specified limit"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "BCON1,Baud-rate control 1 register"
|
|
bitfld.long 0x0 1.--3. "BR1_PRE,Prescaler bit" "0: fDIV = fPCLK,1: fDIV = fPCLK/2,2: fDIV = fPCLK/4,3: fDIV = fPCLK/8,4: fDIV = fPCLK/16,5: fDIV = fPCLK/32,?,?"
|
|
newline
|
|
bitfld.long 0x0 0. "BR1_R,Baud-rate generator run control bit" "0: Baud-rate generator disabled,1: Baud-rate generator enabled"
|
|
group.long 0x98++0x3
|
|
line.long 0x0 "BCON2,Baud-rate control 2 register"
|
|
bitfld.long 0x0 1.--3. "BR2_PRE,Prescaler bit" "0: fDIV = fPCLK,1: fDIV = fPCLK/2,2: fDIV = fPCLK/4,3: fDIV = fPCLK/8,4: fDIV = fPCLK/16,5: fDIV = fPCLK/32,?,?"
|
|
newline
|
|
bitfld.long 0x0 0. "BR2_R,Baud-rate generator run control bit" "0: Baud-rate generator disabled,1: Baud-rate generator enabled"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "BG1,Baud-rate timer/reload 1 register"
|
|
hexmask.long.word 0x0 0.--10. 1. "BG1_BR_VALUE,Baud-rate timer/reload value UART1"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "BG2,Baud-rate timer/reload 2 register"
|
|
hexmask.long.word 0x0 0.--10. 1. "BG2_BR_VALUE,Baud-rate timer/reload value UART2"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "BGL1,Baud-rate timer/reload. low byte 1 register"
|
|
hexmask.long.byte 0x0 0.--4. 1. "BG1_FD_SEL,Fractional divider selection"
|
|
group.long 0x9C++0x3
|
|
line.long 0x0 "BGL2,Baud-rate timer/reload. low byte 2 register"
|
|
hexmask.long.byte 0x0 0.--4. 1. "BG2_FD_SEL,Fractional divider selection"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "CMCON1,Clock control 1 register"
|
|
bitfld.long 0x0 8.--9. "PDIV,PLL PDIV-divider" "0: 4,1: 5 (default),2: 6,3: 6"
|
|
newline
|
|
bitfld.long 0x0 6. "K1DIV,PLL K1-divider" "0: K1 = 2,1: divider"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "K2DIV,PLL K2-divider" "0: K2 = 2,1: K2 = 3,2: divider,3: K2 = 5"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "CLKREL,Slow down clock divider for fCCLK generation"
|
|
line.long 0x4 "CMCON2,Clock control 2 register"
|
|
bitfld.long 0x4 0. "PBA0CLKREL,PBA0 clock divider" "0: Divide by 1,1: Divide by 2"
|
|
group.long 0xB4++0x3
|
|
line.long 0x0 "COCON,Clock output control register"
|
|
bitfld.long 0x0 7. "EN,CLKOUT enable" "0: No external clock signal is provided,1: The configured external clock signal is provided"
|
|
newline
|
|
bitfld.long 0x0 6. "COUTS1,Clock out source select bit 1" "0: fCCLK is selected,1: Based on setting of COUTS0"
|
|
newline
|
|
bitfld.long 0x0 5. "TLEN,Toggle latch enable" "0: Toggle latch is disabled. Clock output frequency..,1: Toggle latch is enabled. Clock output frequency.."
|
|
newline
|
|
bitfld.long 0x0 4. "COUTS0,Clock out source select bit 0" "0: Oscillator output frequency is selected,1: Clock output frequency is chosen by the bit.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "COREL,Clock output divider"
|
|
group.long 0xD4++0x3
|
|
line.long 0x0 "EDCCON,Error detection and correction control register"
|
|
bitfld.long 0x0 2. "NVMIE,NVM double bit ECC error interrupt enable" "0: No NMI is generated when a double bit ECC error..,1: An NMI is generated when a double bit ECC error.."
|
|
newline
|
|
bitfld.long 0x0 0. "RIE,RAM double bit ECC error interrupt enable" "0: No NMI is generated when a double bit ECC error..,1: An NMI is generated when a double bit ECC error.."
|
|
wgroup.long 0x10C++0x3
|
|
line.long 0x0 "EDCSCLR,Error detection and correction status clear register"
|
|
bitfld.long 0x0 4. "RSBEC,RAM single bit error clear" "0: A single bit error on RAM is not cleared,1: A single bit error on RAM is cleared"
|
|
newline
|
|
bitfld.long 0x0 2. "NVMDBEC,NVM double bit error clear" "0: A double bit error on NVM is not cleared,1: A double bit error on NVM is cleared"
|
|
newline
|
|
bitfld.long 0x0 0. "RDBEC,RAM double bit error clear" "0: A double bit error on RAM is not cleared,1: A double bit error on RAM is cleared"
|
|
rgroup.long 0xD8++0x3
|
|
line.long 0x0 "EDCSTAT,Error detection and correction status register"
|
|
bitfld.long 0x0 4. "RSBE,RAM single bit error" "0: No single bit error on RAM has occurred,1: A single bit error on RAM has occurred"
|
|
newline
|
|
bitfld.long 0x0 2. "NVMDBE,NVM double bit error" "0: No double bit error on NVM has occurred,1: A double bit error on NVM has occurred"
|
|
newline
|
|
bitfld.long 0x0 0. "RDBE,RAM double bit error" "0: No double bit error on RAM has occurred,1: A double bit error on RAM has occurred"
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "EMOP,Emergency and program operation status register"
|
|
bitfld.long 0x0 1. "EMPROP,Emergency program operation status bit" "0: No emergency program operation is started,1: Emergency program operation is started"
|
|
newline
|
|
bitfld.long 0x0 0. "NVMPROP,NVM program operation status bit" "0: No NVM program operation is started,1: NVM program operation is started"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "EXICON0,External interrupt control 0 register"
|
|
bitfld.long 0x0 4.--5. "EXINT2,External interrupt 2 trigger select" "0: Interrupt disabled,1: Interrupt on rising edge,2: Interrupt on falling edge,3: Interrupt on both rising and falling edge"
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bitfld.long 0x0 2.--3. "EXINT1,External interrupt 1 trigger select" "0: Interrupt disabled,1: Interrupt on rising edge,2: Interrupt on falling edge,3: Interrupt on both rising and falling edge"
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bitfld.long 0x0 0.--1. "EXINT0,External interrupt 0 trigger select" "0: Interrupt disabled,1: Interrupt on rising edge,2: Interrupt on falling edge,3: Interrupt on both rising and falling edge"
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line.long 0x4 "EXICON1,External interrupt control 1 register"
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bitfld.long 0x4 8.--9. "MON5,MON5 input trigger select" "0: External interrupt MON is disabled,1: Interrupt on rising edge,2: Interrupt on falling edge,3: Interrupt on both rising and falling edge"
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bitfld.long 0x4 6.--7. "MON4,MON4 input trigger select" "0: External interrupt MON is disabled,1: Interrupt on rising edge,2: Interrupt on falling edge,3: Interrupt on both rising and falling edge"
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bitfld.long 0x4 4.--5. "MON3,MON3 input trigger select" "0: External interrupt MON is disabled,1: Interrupt on rising edge,2: Interrupt on falling edge,3: Interrupt on both rising and falling edge"
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bitfld.long 0x4 2.--3. "MON2,MON2 input trigger select" "0: External interrupt MON is disabled,1: Interrupt on rising edge,2: Interrupt on falling edge,3: Interrupt on both rising and falling edge"
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bitfld.long 0x4 0.--1. "MON1,MON1 input trigger select" "0: External interrupt MON is disabled,1: Interrupt on rising edge,2: Interrupt on falling edge,3: Interrupt on both rising and falling edge"
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wgroup.long 0x180++0x3
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line.long 0x0 "GPT12ICLR,Timer and counter control/status clear register"
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bitfld.long 0x0 5. "GPT12CRC,GPT12 capture reload interrupt status" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 4. "GPT2T6C,GPT module 2 Timer6 interrupt status" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 3. "GPT2T5C,GPT module 2 Timer5 interrupt status" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 2. "GPT1T4C,GPT module 1 Timer4 interrupt status" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 1. "GPT1T3C,GPT module 1 Timer3 interrupt status" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 0. "GPT1T2C,GPT module 1 Timer2 interrupt status" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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group.long 0x15C++0x3
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line.long 0x0 "GPT12IEN,General purpose timer 12 interrupt enable register"
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bitfld.long 0x0 5. "CRIE,GPT12 capture and reload interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
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bitfld.long 0x0 4. "T6IE,GPT12 T6 interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
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bitfld.long 0x0 3. "T5IE,GPT12 T5 interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
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bitfld.long 0x0 2. "T4IE,GPT12 T4 interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
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bitfld.long 0x0 1. "T3IE,GPT12 T3 interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
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bitfld.long 0x0 0. "T2IE,GPT12 T2 interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
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rgroup.long 0x160++0x3
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line.long 0x0 "GPT12IRC,Timer and counter control/status register"
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bitfld.long 0x0 5. "GPT12CR,GPT12 capture reload interrupt status" "0: No capture reload interrupt has occurred,1: Capture reload interrupt has occurred"
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bitfld.long 0x0 4. "GPT2T6,GPT module 2 Timer6 interrupt status" "0: No Timer6 interrupt has occurred,1: Timer6 interrupt has occurred"
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bitfld.long 0x0 3. "GPT2T5,GPT module 2 Timer5 interrupt status" "0: No Timer5 interrupt has occurred,1: Timer5 interrupt has occurred"
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bitfld.long 0x0 2. "GPT1T4,GPT module 1 Timer4 interrupt status" "0: No Timer4 interrupt has occurred,1: Timer4 interrupt has occurred"
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bitfld.long 0x0 1. "GPT1T3,GPT module 1 Timer3 interrupt status" "0: No Timer3 interrupt has occurred,1: Timer3 interrupt has occurred"
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bitfld.long 0x0 0. "GPT1T2,GPT module 1 Timer2 interrupt status" "0: No Timer2 interrupt has occurred,1: Timer2 interrupt has occurred"
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group.long 0xD0++0x3
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line.long 0x0 "GPT12PISEL,GPT12 peripheral input select register"
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bitfld.long 0x0 5. "GPT12_SEL,CCU6 trigger configuration" "0: CCU6_INT is triggered by Timer21,1: CCU6_INT is triggered by GPT12PISEL.GPT12"
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bitfld.long 0x0 4. "TRIG_CONF,CCU6 trigger Configuration" "0: Trigger is just for one measurement (default),1: Trigger is present until next input edge.."
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hexmask.long.byte 0x0 0.--3. 1. "GPT12,GPT12 T3INB/T4IND input select"
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group.long 0xA8++0x3
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line.long 0x0 "ID,Identity register"
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hexmask.long.byte 0x0 3.--7. 1. "PRODID,Product ID"
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newline
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bitfld.long 0x0 0.--2. "VERID,Version ID" "0,1,2,3,4,5,6,7"
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group.long 0x1C++0x3
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line.long 0x0 "IEN0,Interrupt enable 0 register"
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bitfld.long 0x0 31. "EA,Global interrupt mask" "0: All pending interrupt requests (except NMI) are..,1: Pending interrupt requests are not blocked from.."
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rgroup.long 0x4++0x3
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line.long 0x0 "IRCON0,Interrupt request 0 register"
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bitfld.long 0x0 5. "EXINT2F,Interrupt flag for external interrupt 2x on falling edge" "0: Interrupt on falling edge event has not occurred,1: Interrupt on falling edge event has occurred"
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bitfld.long 0x0 4. "EXINT2R,Interrupt flag for external interrupt 2x on rising edge" "0: Interrupt on rising edge event has not occurred,1: Interrupt on rising edge event has occurred"
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bitfld.long 0x0 3. "EXINT1F,Interrupt flag for external interrupt 1x on falling edge" "0: Interrupt on falling edge event has not occurred,1: Interrupt on falling edge event has occurred"
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bitfld.long 0x0 2. "EXINT1R,Interrupt flag for external interrupt 1x on rising edge" "0: Interrupt on rising edge event has not occurred,1: Interrupt on rising edge event has occurred"
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bitfld.long 0x0 1. "EXINT0F,Interrupt flag for external interrupt 0x on falling edge" "0: Interrupt on falling edge event has not occurred,1: Interrupt on falling edge event has occurred"
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bitfld.long 0x0 0. "EXINT0R,Interrupt flag for external interrupt 0x on rising edge" "0: Interrupt on rising edge event has not occurred,1: Interrupt on rising edge event has occurred"
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wgroup.long 0x178++0x3
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line.long 0x0 "IRCON0CLR,Interrupt request 0 clear register"
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bitfld.long 0x0 5. "EXINT2FC,Interrupt flag for external interrupt 2x on falling edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
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bitfld.long 0x0 4. "EXINT2RC,Interrupt flag for external interrupt 2x on rising edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
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bitfld.long 0x0 3. "EXINT1FC,Interrupt flag for external interrupt 1x on falling edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
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bitfld.long 0x0 2. "EXINT1RC,Interrupt flag for external interrupt 1x on rising edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
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bitfld.long 0x0 1. "EXINT0FC,Interrupt flag for external interrupt 0x on falling edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
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bitfld.long 0x0 0. "EXINT0RC,Interrupt flag for external interrupt 0x on rising edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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rgroup.long 0x8++0x3
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line.long 0x0 "IRCON1,Interrupt request 1 register"
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bitfld.long 0x0 9. "MON5F,Interrupt flag for MON5x on falling edge" "0: Interrupt on falling edge event has not occurred,1: Interrupt on falling edge event has occurred"
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bitfld.long 0x0 8. "MON5R,Interrupt flag for MON5x on rising edge" "0: Interrupt on rising edge event has not occurred,1: Interrupt on rising edge event has occurred"
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newline
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bitfld.long 0x0 7. "MON4F,Interrupt flag for MON4x on falling edge" "0: Interrupt on falling edge event has not occurred,1: Interrupt on falling edge event has occurred"
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bitfld.long 0x0 6. "MON4R,Interrupt flag for MON4x on rising edge" "0: Interrupt on rising edge event has not occurred,1: Interrupt on rising edge event has occurred"
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|
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bitfld.long 0x0 5. "MON3F,Interrupt flag for MON3x on falling edge" "0: Interrupt on falling edge event has not occurred,1: Interrupt on falling edge event has occurred"
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newline
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bitfld.long 0x0 4. "MON3R,Interrupt flag for MON3x on rising edge" "0: Interrupt on rising edge event has not occurred,1: Interrupt on rising edge event has occurred"
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newline
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bitfld.long 0x0 3. "MON2F,Interrupt flag for MON2x on falling edge" "0: Interrupt on falling edge event has not occurred,1: Interrupt on falling edge event has occurred"
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newline
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bitfld.long 0x0 2. "MON2R,Interrupt flag for MON2x on rising edge" "0: Interrupt on rising edge event has not occurred,1: Interrupt on rising edge event has occurred"
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newline
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bitfld.long 0x0 1. "MON1F,Interrupt flag for MON1x on falling edge" "0: Interrupt on falling edge event has not occurred,1: Interrupt on falling edge event has occurred"
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newline
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bitfld.long 0x0 0. "MON1R,Interrupt flag for MON1x on rising edge" "0: Interrupt on rising edge event has not occurred,1: Interrupt on rising edge event has occurred"
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wgroup.long 0x17C++0x3
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line.long 0x0 "IRCON1CLR,Interrupt request 1 clear register"
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bitfld.long 0x0 9. "MON5FC,Interrupt flag for MON5x on falling edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
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bitfld.long 0x0 8. "MON5RC,Interrupt flag for MON5x on rising edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 7. "MON4FC,Interrupt flag for MON4x on falling edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 6. "MON4RC,Interrupt flag for MON4x on rising edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 5. "MON3FC,Interrupt flag for MON3x on falling edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 4. "MON3RC,Interrupt flag for MON3x on rising edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 3. "MON2FC,Interrupt flag for MON2x on falling edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 2. "MON2RC,Interrupt flag for MON2x on rising edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 1. "MON1FC,Interrupt flag for MON1x on falling edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
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bitfld.long 0x0 0. "MON1RC,Interrupt flag for MON1x on rising edge" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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rgroup.long 0xC++0x3
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line.long 0x0 "IRCON2,Interrupt request 2 register"
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bitfld.long 0x0 2. "RIR1,Receive interrupt flag for SSC1" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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newline
|
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bitfld.long 0x0 1. "TIR1,Transmit interrupt flag for SSC1" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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newline
|
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bitfld.long 0x0 0. "EIR1,Error interrupt flag for SSC1" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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wgroup.long 0x190++0x3
|
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line.long 0x0 "IRCON2CLR,Interrupt request 2 clear register"
|
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bitfld.long 0x0 2. "RIR1C,Receive interrupt flag for SSC1" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 1. "TIR1C,Transmit interrupt flag for SSC1" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 0. "EIR1C,Error interrupt flag for SSC1" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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rgroup.long 0x10++0x3
|
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line.long 0x0 "IRCON3,Interrupt request 3 register"
|
|
bitfld.long 0x0 2. "RIR2,Receive interrupt flag for SSC2" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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newline
|
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bitfld.long 0x0 1. "TIR2,Transmit interrupt flag for SSC2" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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newline
|
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bitfld.long 0x0 0. "EIR2,Error interrupt flag for SSC2" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
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wgroup.long 0x194++0x3
|
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line.long 0x0 "IRCON3CLR,Interrupt request 3 clear register"
|
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bitfld.long 0x0 2. "RIR2C,Receive interrupt flag for SSC2" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 1. "TIR2C,Transmit interrupt flag for SSC2" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 0. "EIR2C,Error interrupt flag for SSC2" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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rgroup.long 0x14++0x3
|
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line.long 0x0 "IRCON4,Interrupt request 4 register"
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bitfld.long 0x0 20. "CCU6SR3,Interrupt flag 3 for CCU6" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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newline
|
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bitfld.long 0x0 16. "CCU6SR2,Interrupt flag 2 for CCU6" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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newline
|
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bitfld.long 0x0 4. "CCU6SR1,Interrupt flag 1 for CCU6" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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newline
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bitfld.long 0x0 0. "CCU6SR0,Interrupt flag 0 for CCU6" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
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wgroup.long 0x198++0x3
|
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line.long 0x0 "IRCON4CLR,Interrupt request 4 clear register"
|
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bitfld.long 0x0 20. "CCU6SR3C,Interrupt flag 3 for CCU6" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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newline
|
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bitfld.long 0x0 16. "CCU6SR2C,Interrupt flag 2 for CCU6" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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|
newline
|
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bitfld.long 0x0 4. "CCU6SR1C,Interrupt flag 1 for CCU6" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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|
newline
|
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bitfld.long 0x0 0. "CCU6SR0C,Interrupt flag 0 for CCU6" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
|
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rgroup.long 0x7C++0x3
|
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line.long 0x0 "IRCON5,Interrupt request 5 register"
|
|
bitfld.long 0x0 0. "WAKEUP,Interrupt flag for wake-up" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
wgroup.long 0x19C++0x3
|
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line.long 0x0 "IRCON5CLR,Interrupt request 5 clear register"
|
|
bitfld.long 0x0 0. "WAKEUPC,Clear flag for wake-up interrupt" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
|
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wgroup.long 0xA4++0x3
|
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line.long 0x0 "LINSCLR,LIN status clear register"
|
|
bitfld.long 0x0 5. "ERRSYNC,SYN byte error interrupt flag" "0: Error in SYN byte not cleared,1: Error in SYN byte cleared"
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|
newline
|
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bitfld.long 0x0 4. "EOFSYNC,End of SYN byte interrupt flag clear" "0: End of SYN byte is not cleared,1: End of SYN byte is cleared"
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newline
|
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bitfld.long 0x0 3. "BRKC,Break field flag clear" "0: Break field is not cleared,1: Break field is cleared"
|
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group.long 0x94++0x3
|
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line.long 0x0 "LINST,LIN status register"
|
|
bitfld.long 0x0 6. "SYNEN,End of SYN byte and SYN byte error interrupts enable" "0: End of SYN byte and SYN byte error interrupts..,1: End of SYN byte and SYN byte error interrupts.."
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newline
|
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rbitfld.long 0x0 5. "ERRSYN,SYN byte error interrupt flag" "0: Error is not detected in SYN byte,1: Error is detected in SYN byte"
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newline
|
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rbitfld.long 0x0 4. "EOFSYN,End of SYN byte interrupt flag" "0: End of SYN byte is not detected,1: End of SYN byte is detected"
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newline
|
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rbitfld.long 0x0 3. "BRK,Break field flag" "0: Break field is not detected,1: Break field is detected"
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newline
|
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bitfld.long 0x0 1.--2. "BGSEL,Baud-rate select for detection" "0,1,2,3"
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newline
|
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bitfld.long 0x0 0. "BRDIS,Baud-rate detection disable" "0: Break/sync detection is enabled,1: Break/sync detection is disabled"
|
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rgroup.long 0xE4++0x3
|
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line.long 0x0 "MEM_ACC_STS,Memory access status register"
|
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bitfld.long 0x0 4. "ROM_PROT_ERR,ROM access protection" "0: No Protection error,1: Protection error"
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newline
|
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bitfld.long 0x0 3. "NVM_SFR_ADDR_ERR,NVM SFR address protection" "0: No Protection error,1: Protection error"
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newline
|
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bitfld.long 0x0 2. "NVM_SFR_PROT_ERR,NVM SFR access protection" "0: No Protection error,1: Protection error"
|
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newline
|
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bitfld.long 0x0 1. "NVM_ADDR_ERR,NVM address protection" "0: No Protection error,1: Protection error"
|
|
newline
|
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bitfld.long 0x0 0. "NVM_PROT_ERR,NVM access protection" "0: No Protection error,1: Protection error"
|
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group.long 0xDC++0x3
|
|
line.long 0x0 "MEMSTAT,Memory status register"
|
|
bitfld.long 0x0 6.--7. "SASTATUS,Service algorithm status" "0: Depending on SECTORINFO,1: SA execution is successful,2: SA execution is not successful. Map error exists..,3: SA execution is not successful. Map error exists.."
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newline
|
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hexmask.long.byte 0x0 0.--5. 1. "SECTORINFO,Sector information"
|
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group.long 0x30++0xF
|
|
line.long 0x0 "MODIEN1,Peripheral interrupt enable 1 register"
|
|
bitfld.long 0x0 10. "RIREN2,SSC 2 receive interrupt enable" "0: Receive interrupt is disabled,1: Receive interrupt is enabled"
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newline
|
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bitfld.long 0x0 9. "TIREN2,SSC 2 transmit interrupt enable" "0: Transmit interrupt is disabled,1: Transmit interrupt is enabled"
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|
newline
|
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bitfld.long 0x0 8. "EIREN2,SSC 2 error interrupt enable" "0: Error interrupt is disabled,1: Error interrupt is enabled"
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|
newline
|
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bitfld.long 0x0 2. "RIREN1,SSC 1 receive interrupt enable" "0: Receive interrupt is disabled,1: Receive interrupt is enabled"
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newline
|
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bitfld.long 0x0 1. "TIREN1,SSC 1 transmit interrupt enable" "0: Transmit interrupt is disabled,1: Transmit interrupt is enabled"
|
|
newline
|
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bitfld.long 0x0 0. "EIREN1,SSC 1 error interrupt enable" "0: Error interrupt is disabled,1: Error interrupt is enabled"
|
|
line.long 0x4 "MODIEN2,Peripheral interrupt enable 2 register"
|
|
bitfld.long 0x4 7. "TIEN2,UART 2 transmit interrupt enable" "0: Transmit interrupt is disabled,1: Transmit interrupt is enabled"
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newline
|
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bitfld.long 0x4 6. "RIEN2,UART 2 receive interrupt enable" "0: Receive interrupt is disabled,1: Receive interrupt is enabled"
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newline
|
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bitfld.long 0x4 5. "EXINT2_EN,External interrupt 2 enable" "0: External interrupt is disabled,1: External interrupt is enabled"
|
|
newline
|
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bitfld.long 0x4 1. "TIEN1,UART 1 transmit interrupt enable" "0: Transmit interrupt is disabled,1: Transmit interrupt is enabled"
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newline
|
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bitfld.long 0x4 0. "RIEN1,UART 1 receive interrupt enable" "0: Receive interrupt is disabled,1: Receive interrupt is enabled"
|
|
line.long 0x8 "MODIEN3,Peripheral interrupt enable 3 register"
|
|
bitfld.long 0x8 0. "IE0,External interrupt enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "MODIEN4,Peripheral interrupt enable 4 register"
|
|
bitfld.long 0xC 0. "IE1,External interrupt enable" "0: Disabled,1: Enabled"
|
|
group.long 0xB8++0xF
|
|
line.long 0x0 "MODPISEL,Peripheral input select register"
|
|
bitfld.long 0x0 18. "SSC12_S_MRST_OUTSEL,Output selection for SSC12_S_MRST" "0: SSC1_S_MRST,1: SSC2_S_MRST"
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|
newline
|
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bitfld.long 0x0 17. "SSC12_M_MTSR_OUTSEL,Output selection for SSC12_M_MTSR" "0: SSC1_M_MTSR,1: SSC2_M_MTSR"
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|
newline
|
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bitfld.long 0x0 16. "SSC12_M_SCK_OUTSEL,Output selection for SSC12_M_SCK" "0: SSC1_M_SCK,1: SSC2_M_SCK"
|
|
newline
|
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bitfld.long 0x0 7. "U_TX_CONDIS,TRX input select" "0: Transceiver TXD input connected to UART1_TXD..,1: Transceiver TXD input connected to GPIO"
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newline
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bitfld.long 0x0 6. "URIOS1,UART1 input select" "0: UART1 receiver input UART1_RXD (connected to..,1: UART1 receiver input UART1_RXD (connected to GPIO)"
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bitfld.long 0x0 4.--5. "EXINT2IS,External interrupt 2 input select" "0: External interrupt input EXINT2_0 is selected,1: External interrupt input EXINT2_1 is selected,2: External interrupt input EXINT2_2 is selected,3: External interrupt input EXINT2_3 is selected"
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bitfld.long 0x0 2.--3. "EXINT1IS,External interrupt 1 input select" "0: External interrupt input EXINT1_0 is selected,1: External interrupt input EXINT1_1 is selected,2: External interrupt input EXINT1_2 is selected,3: External interrupt input EXINT1_3 is selected"
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bitfld.long 0x0 0.--1. "EXINT0IS,External interrupt 0 input select" "0: External interrupt input EXINT0_0 is selected,1: External interrupt input EXINT0_1 is selected,2: External interrupt input EXINT0_2 is selected,3: External interrupt input EXINT0_3 is selected"
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line.long 0x4 "MODPISEL1,Peripheral input select 1 register"
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bitfld.long 0x4 7. "T21EXCON,Timer 21 external input control" "0: Timer21 input T21EX is selected by bit field..,1: Timer21 input T21EX is connected to signal from.."
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bitfld.long 0x4 6. "T2EXCON,Timer 2 external input control" "0: Timer2 input T2EX is selected by bit field..,1: Timer2 input T2EX is connected to signal from.."
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bitfld.long 0x4 0. "XTAL12EN,Pins XTAL1/2 enable bit" "0: Pins XTAL1/2 is not available. This setting..,1: Pins XTAL1/2 is available"
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line.long 0x8 "MODPISEL2,Peripheral input select 2 register"
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bitfld.long 0x8 6.--7. "T21EXIS,Timer 21 external input select" "0: Timer21 input T21EX_0 is selected,1: Timer21 input T21EX_1 is selected,2: Timer21 input T21EX_2 is selected,3: Timer21 input T21EX_3 is selected"
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bitfld.long 0x8 4.--5. "T2EXIS,Timer 2 external input select" "0: Timer2 input T2EX_0 is selected,1: Timer2 input T2EX_1 is selected,2: Timer2 input T2EX_2 i selected,3: Timer2 input T2EX_3 is selected"
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bitfld.long 0x8 2.--3. "T21IS,Timer 21 input select" "0: Timer21 input T21_0 is selected,1: Timer21 input T21_1 is selected,2: Timer21 input T21_2 is selected,?"
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bitfld.long 0x8 0.--1. "T2IS,Timer 2 input select" "0: Timer2 input T2_0 is selected,1: Timer2 input T2_1 is selected,2: Timer2 input T2_2 is selected,?"
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line.long 0xC "MODPISEL3,Peripheral input select 3 register"
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bitfld.long 0xC 6. "URIOS2,UART2 input select" "0: UART2 receiver input UART2_RXD (connected to GPIO),1: UART2 receiver input UART2_RXD (connected to GPIO)"
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group.long 0xFC++0x3
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line.long 0x0 "MODPISEL4,Peripheral input select 4 register"
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bitfld.long 0x0 24.--26. "DU4TRIGGEN,Differential unit trigger enable" "0: CC60 is selected,1: CC61 is selected,2: CC62 is selected,3: COUT60 is selected,4: COUT61 is selected,5: COUT62 is selected,6: T3OUT is selected,7: COUT63 is selected"
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bitfld.long 0x0 16.--18. "DU3TRIGGEN,Differential unit trigger enable" "0: CC60 is selected,1: CC61 is selected,2: CC62 is selected,3: COUT60 is selected,4: COUT61 is selected,5: COUT62 is selected,6: T3OUT is selected,7: COUT63 is selected"
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bitfld.long 0x0 8.--10. "DU2TRIGGEN,Differential unit trigger enable" "0: CC60 is selected,1: CC61 is selected,2: CC62 is selected,3: COUT60 is selected,4: COUT61 is selected,5: COUT62 is selected,6: T3OUT is selected,7: COUT63 is selected"
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bitfld.long 0x0 0.--2. "DU1TRIGGEN,Differential unit trigger enable" "0: CC60 is selected,1: CC61 is selected,2: CC62 is selected,3: COUT60 is selected,4: COUT61 is selected,5: COUT62 is selected,6: T3OUT is selected,7: COUT63 is selected"
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group.long 0xC8++0x3
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line.long 0x0 "MODSUSP,Module suspend control register"
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bitfld.long 0x0 10. "ADC1_SUSP,ADC1 unit debug suspend bit" "0: ADC1 will not be suspended,1: ADC1 will be suspended"
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bitfld.long 0x0 9. "MU_SUSP,Measurement unit debug suspend bit" "0: MU will not be suspended,1: MU will be suspended"
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bitfld.long 0x0 7. "WDT1SUSP,Watchdog timer 1 debug suspend bit" "0: WDT1 will not be suspended,1: WDT1 will be suspended"
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bitfld.long 0x0 6. "T21_SUSP,Timer 21 debug suspend bit" "0: Timer21 will not be suspended,1: Timer21 will be suspended"
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bitfld.long 0x0 4. "GPT12_SUSP,GPT12 debug suspend bit" "0: GPT12 will not be suspended,1: GPT12 will be suspended"
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bitfld.long 0x0 3. "T2_SUSP,Timer 2 debug suspend bit" "0: Timer2 will not be suspended,1: Timer2 will be suspended"
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bitfld.long 0x0 2. "T13SUSP,Timer 13 debug suspend bit" "0: Timer13 in capture/compare unit will not be..,1: Timer13 in capture/compare unit will be suspended"
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bitfld.long 0x0 1. "T12SUSP,Timer 12 debug suspend bit" "0: Timer12 in capture/compare unit will not be..,1: Timer12 in capture/compare unit will be suspended"
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group.long 0x18C++0x3
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line.long 0x0 "MONIEN,Monitoring input interrupt enable register"
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bitfld.long 0x0 4. "MON5IE,MON5 interrupt enable" "0: Disabled,1: Enabled"
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bitfld.long 0x0 3. "MON4IE,MON4 interrupt enable" "0: Disabled,1: Enabled"
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bitfld.long 0x0 2. "MON3IE,MON3 interrupt enable" "0: Disabled,1: Enabled"
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bitfld.long 0x0 1. "MON2IE,MON2 interrupt enable" "0: Disabled,1: Enabled"
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bitfld.long 0x0 0. "MON1IE,MON1 interrupt enable" "0: Disabled,1: Enabled"
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group.long 0x24++0x3
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line.long 0x0 "NMICON,NMI control register"
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bitfld.long 0x0 7. "NMISUP,Supply prewarning NMI enable" "0: Supply NMI is disabled,1: Supply NMI is enabled"
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bitfld.long 0x0 6. "NMIECC,ECC error NMI enable" "0: ECC Error NMI is disabled,1: ECC Error NMI is enabled"
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bitfld.long 0x0 5. "NMIMAP,NVM map error NMI enable" "0: NVM map error NMI is disabled,1: NVM map error NMI is enabled"
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bitfld.long 0x0 4. "NMIOWD,Oscillator watchdog NMI enable" "0: Oscillator watchdog NMI is disabled,1: Oscillator watchdog NMI is enabled"
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bitfld.long 0x0 3. "NMIOT,NMI OT enable" "0: NMI OT is disabled,1: NMI OT is enabled"
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bitfld.long 0x0 2. "NMINVM,NVM operation complete NMI enable" "0: NVM operation complete NMI is disabled,1: NVM operation complete NMI is enabled"
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bitfld.long 0x0 1. "NMIPLL,PLL loss of lock NMI enable" "0: PLL loss of lock NMI is disabled,1: PLL loss of lock NMI is enabled"
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rgroup.long 0x18++0x3
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line.long 0x0 "NMISR,NMI status register"
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bitfld.long 0x0 7. "FNMISUP,Supply prewarning NMI flag" "0: No supply prewarning NMI has occurred,1: Supply prewarning has occurred"
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bitfld.long 0x0 6. "FNMIECC,ECC error NMI flag" "0: No uncorrectable ECC error has occurred on NVM..,1: Uncorrectable ECC error has occurred on NVM RAM"
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bitfld.long 0x0 5. "FNMIMAP,NVM map error NMI flag" "0: No NVM map error NMI has occurred,1: NVM map error has occurred"
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bitfld.long 0x0 4. "FNMIOWD,Oscillator watchdog NMI flag" "0: No oscillator watchdog NMI has occurred,1: Oscillator watchdog event has occurred"
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bitfld.long 0x0 3. "FNMIOT,Overtemperature NMI flag" "0: No OT NMI has occurred,1: OT NMI event has occurred"
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bitfld.long 0x0 2. "FNMINVM,NVM operation complete NMI flag" "0: No NVM NMI has occurred,1: NVM operation complete event has occurred"
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bitfld.long 0x0 1. "FNMIPLL,PLL NMI flag" "0: No PLL NMI has occurred,1: PLL loss-of-lock to the external crystal has.."
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wgroup.long 0x0++0x3
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line.long 0x0 "NMISRCLR,NMI status clear register"
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bitfld.long 0x0 7. "FNMISUPC,Supply prewarning NMI flag" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 6. "FNMIECCC,ECC error NMI flag" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 5. "FNMIMAPC,NVM map error NMI flag" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 4. "FNMIOWDC,Oscillator watchdog NMI flag" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 3. "FNMIOTC,Overtemperature NMI flag" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 2. "FNMINVMC,NVM operation complete NMI flag" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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bitfld.long 0x0 1. "FNMIPLLC,PLL NMI flag" "0: Interrupt event is not cleared,1: Interrupt event is cleared"
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group.long 0xE0++0x3
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line.long 0x0 "NVM_PROT_STS,NVM protection status register"
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bitfld.long 0x0 14.--15. "NVMBSL,CBSL region size definition" "0: CBSL size is 4 K,1: CBSL size is 8 K,2: CBSL size is 12 K,3: CBSL size is 16 K"
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bitfld.long 0x0 13. "CBSL_PW,Status of CBSL region password/protection" "0: CBSL region password is not installed; CBSL..,1: CBSL region password is installed; CBSL region.."
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bitfld.long 0x0 12. "LIN_PW,Status of linear region password/protection" "0: Linear region password is not installed; linear..,1: Linear region password is installed; linear.."
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bitfld.long 0x0 11. "NL_PW,Status of non-linear region password/protection" "0: Non-linear region password is not installed;..,1: Non-linear region password is installed; linear.."
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bitfld.long 0x0 10. "DIS_RDUS_S0,Configuration of NVM read protection for sector 0 with EN_RD_S0 = 0" "0: Only active when nvm_read_S0_unsafe_i = 1 and..,1: Independent from nvm_read_S0_unsafe_i; also.."
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bitfld.long 0x0 9. "DIS_RDUS,Configuration of NVM read protection for sector 1...n with EN_RD_* = 0" "0: Only active when nvm_read_unsafe_i = 1 and not..,1: Independent from nvm_read_unsafe_i; also write.."
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bitfld.long 0x0 8. "EN_RD_S0,NVM read protection for sector 0" "0: The data in sector 0 can not be read over..,1: The data in sector 0 can be read over AHB-Lite.."
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bitfld.long 0x0 5. "EN_RD_CBSL,NVM read protection of data in CBSL region" "0: The data in region defined by NVMBSL can not be..,1: The data in region defined by NVMBSL sectors of.."
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bitfld.long 0x0 4. "EN_RD_LIN,NVM read protection of data in linear sectors" "0: The data in sectors of the linearly mapped area..,1: The data in sectors of the linearly mapped area.."
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bitfld.long 0x0 3. "EN_RD_NL,NVM read protection of data in non-linear sectors" "0: The data in sectors of the non-linearly mapped..,1: The data in sectors of the non-linearly mapped.."
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bitfld.long 0x0 2. "EN_PRG_CBSL,NVM protection of data in CBSL region" "0: The data in region defined by NVMBSL can not be..,1: The data in region defined by NVMBSL can be.."
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bitfld.long 0x0 1. "EN_PRG_LIN,NVM protection of data in linear sectors" "0: The data in sectors of the linearly mapped area..,1: The data in sectors of the linearly mapped area.."
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bitfld.long 0x0 0. "EN_PRG_NL,NVM protection of data in non-linear sectors" "0: The data in sectors of the non-linearly mapped..,1: The data in sectors of the non-linearly mapped.."
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group.long 0xB0++0x3
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line.long 0x0 "OSC_CON,OSC control register"
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bitfld.long 0x0 4. "XPD,XTAL (OSC_HP) power down control" "0: XTAL (OSC_HP) is not powered down,1: XTAL (OSC_HP) is powered down"
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rbitfld.long 0x0 3. "OSC2L,OSC-too-low condition flag" "0: fOSC is above threshold,1: fOSC is below threshold"
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bitfld.long 0x0 2. "OSCWDTRST,Oscillator watchdog reset" "0: No effect,1: Reset OSC2L flag and restart the oscillator.."
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bitfld.long 0x0 0.--1. "OSCSS,Oscillator source select" "0: PLL internal oscillator OSC_PLL (fINT) is..,1: XTAL (fOSC from OSC_HP) is selected..,2: PLL internal oscillator OSC_PLL (fINT) is..,3: PLL internal oscillator OSC_PLL (fINT) is.."
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group.long 0xE8++0x3
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line.long 0x0 "P0_POCON0,Port output control register"
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bitfld.long 0x0 20.--22. "P0_PDM5,P0.5 port driver mode" "0: Strong driver and sharp edge mode,1: Strong driver and medium edge mode,2: Strong driver and soft edge mode,3: Weak driver 1,4: Medium driver 1,5: Medium driver 2,6: Medium driver 3,7: Weak driver 2"
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bitfld.long 0x0 16.--18. "P0_PDM4,P0.4 port driver mode" "0: Strong driver and sharp edge mode,1: Strong driver and medium edge mode,2: Strong driver and soft edge mode,3: Weak driver 1,4: Medium driver 1,5: Medium driver 2,6: Medium driver 3,7: Weak driver 2"
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bitfld.long 0x0 12.--14. "P0_PDM3,P0.3 port driver mode" "0: Strong driver and sharp edge mode,1: Strong driver and medium edge mode,2: Strong driver and soft edge mode,3: Weak driver 1,4: Medium driver 1,5: Medium driver 2,6: Medium driver 3,7: Weak driver 2"
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bitfld.long 0x0 8.--10. "P0_PDM2,P0.2 port driver mode" "0: Strong driver and sharp edge mode,1: Strong driver and medium edge mode,2: Strong driver and soft edge mode,3: Weak driver 1,4: Medium driver 1,5: Medium driver 2,6: Medium driver 3,7: Weak driver 2"
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bitfld.long 0x0 4.--6. "P0_PDM1,P0.1 port driver mode" "0: Medium driver 1,?,?,3: Weak driver 1,4: Medium driver 2,5: Medium driver 3,6: Medium driver 4,7: Weak driver 2"
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bitfld.long 0x0 0.--2. "P0_PDM0,P0.0 port driver mode" "0: Medium driver 1,?,?,3: Weak driver 1,4: Medium driver 2,5: Medium driver 3,6: Medium driver 4,7: Weak driver 2"
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group.long 0xF8++0x3
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line.long 0x0 "P1_POCON0,Port output control register"
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bitfld.long 0x0 16.--18. "P1_PDM4,P1.4 port driver mode" "0: Strong driver and sharp edge mode,1: Strong driver and medium edge mode,2: Strong driver and soft edge mode,3: Weak driver 1,4: Medium driver 1,5: Medium driver 2,6: Medium driver 3,7: Weak driver 2"
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bitfld.long 0x0 8.--10. "P1_PDM2,P1.2 port driver mode" "0: Medium driver 1,?,?,3: Weak driver 1,4: Medium driver 2,5: Medium driver 3,6: Medium driver 4,7: Weak driver 2"
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bitfld.long 0x0 4.--6. "P1_PDM1,P1.1 port driver mode" "0: Medium driver 1,?,?,3: Weak driver 1,4: Medium driver 2,5: Medium driver 3,6: Medium driver 4,7: Weak driver 2"
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bitfld.long 0x0 0.--2. "P1_PDM0,P1.0 port driver mode" "0: Medium driver 1,?,?,3: Weak driver 1,4: Medium driver 2,5: Medium driver 3,6: Medium driver 4,7: Weak driver 2"
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group.long 0xAC++0x3
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line.long 0x0 "PASSWD,Password register"
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hexmask.long.byte 0x0 3.--7. 1. "PASS,Password bits"
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rbitfld.long 0x0 2. "PROTECT_S,Bit protection signal status bit" "0: Software is able to write to all protected bits,1: Software is unable to write to any protected bits"
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bitfld.long 0x0 0.--1. "PW_MODE,Bit protection scheme control bit" "0: Scheme disabled,?,?,3: Scheme enabled (default)"
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group.long 0x44++0x3
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line.long 0x0 "PLL_CON,PLL control register"
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bitfld.long 0x0 11. "UNPROT_VCOBYP,Unprotect write access of VCO_BYP" "0,1"
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bitfld.long 0x0 10. "UNPROT_OSCDISC,Unprotect write access of OSC_DISC" "0,1"
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hexmask.long.byte 0x0 4.--7. 1. "NDIV,PLL N-divider"
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bitfld.long 0x0 3. "VCOBYP,PLL VCO bypass mode select" "0: Normal (or free running) operation (default),1: Prescaler mode; VCO is bypassed (PLL output.."
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bitfld.long 0x0 2. "OSCDISC,Oscillator disconnect" "0: Oscillator is connected to the PLL,1: Oscillator is disconnected to the PLL"
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bitfld.long 0x0 1. "RESLD,Restart lock detection" "0: No effect,1: Reset lock flag and restart lock detection"
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rbitfld.long 0x0 0. "LOCK,PLL lock status flag" "0: The frequency difference of fREF and fDIV is..,1: The frequency difference of fREF and fDIV is.."
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group.long 0x60++0x3
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line.long 0x0 "PMCON,Peripheral management control register"
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bitfld.long 0x0 10. "T21_DIS,T21 disable request active high" "0: T21 is in normal operation (default),1: Request to disable the T21"
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bitfld.long 0x0 8. "SSC2_DIS,SSC2 disable request active high" "0: SSC is in normal operation (default),1: Request to disable the SSC"
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bitfld.long 0x0 4. "GPT12_DIS,General purpose timer 12 disable request active high" "0: GPT12 is in normal operation (default),1: Request to disable the GPT12"
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bitfld.long 0x0 3. "T2_DIS,T2 disable request active high" "0: T2 is in normal operation (default),1: Request to disable the T2"
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bitfld.long 0x0 2. "CCU6_DIS,CCU6 disable request active high" "0: CCU6 is in normal operation (default),1: Request to disable the CCU6"
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bitfld.long 0x0 1. "SSC1_DIS,SSC1 disable request active high" "0: SSC is in normal operation (default),1: Request to disable the SSC"
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bitfld.long 0x0 0. "ADC1_DIS,ADC1 disable request active high" "0: ADC1 is in normal operation (default),1: Request to disable the ADC"
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group.long 0x40++0x3
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line.long 0x0 "PMCON0,Power mode control 0 register"
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bitfld.long 0x0 3. "SD,Slow-down mode" "0: No change,1: Device goes into Slow-down mode"
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bitfld.long 0x0 2. "PD,Power-down mode" "0: No change,1: Device goes into Power-down mode"
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bitfld.long 0x0 1. "SL,Sleep mode" "0: No change,1: Device goes into Sleep mode"
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bitfld.long 0x0 0. "XTAL_ON,OSC_HP operation in STOP mode" "0: OSC_HP (XTAL) will be suspended by hardware in..,1: OSC_HP (XTAL) continues to operate in STOP mode.."
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group.long 0x68++0x3
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line.long 0x0 "RSTCON,Reset control register"
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bitfld.long 0x0 7. "LOCKUP_EN,Lockup reset enable flag" "0: Lockup is disabled,1: Lockup is enabled"
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bitfld.long 0x0 0. "LOCKUP,Lockup flag" "0: Lockup status not active,1: Lockup status active"
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group.long 0x74++0x3
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line.long 0x0 "SYS_STRTUP_STS,System startup status register"
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bitfld.long 0x0 2. "PG100TP_CHKS_ERR,100 TP Page checksum error" "0: Initialization of trimming parameters from NMV..,1: Initialization of trimming parameter from NMV.."
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bitfld.long 0x0 1. "MRAMINITSTS,Map RAM initialization status" "0: Map RAM initialization was successful,1: Map RAM initialization was not successful"
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bitfld.long 0x0 0. "INIT_FAIL,Initialization at startup failed" "0: No initialization error at startup,1: Initialization error at startup"
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group.long 0x70++0x3
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line.long 0x0 "SYSCON0,System control 0 register"
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bitfld.long 0x0 6.--7. "SYSCLKSEL,System clock select" "0: The PLL clock output signal fPLL is used,1: The direct clock input from fOSC is used,2: The direct low-precision clock input from..,3: The direct input from internal oscillator.."
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bitfld.long 0x0 4.--5. "NVMCLKFAC,NVM access clock factor" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4"
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group.long 0xF4++0x3
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line.long 0x0 "TCCR,Temperature compensation control register"
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bitfld.long 0x0 0.--1. "TCC,Temperature compensation control" "0: Tj: -40deg C to 0deg C,1: Tj: 0deg C to 40deg C,2: Tj: 40deg C to 80deg C,3: Tj: 80deg C to 150deg C"
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group.long 0x20++0x3
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line.long 0x0 "VTOR,Vector table reallocation register"
|
|
bitfld.long 0x0 0.--1. "VTOR_BYP,Vector table bypass mode" "0: VTOR is not remapped (ROM) (start address:..,1: VTOR is remapped to RAM (start address:..,2: VTOR is remapped to NVM (start address:..,3: VTOR is remapped to NVM (start address: begin of.."
|
|
group.long 0x78++0x3
|
|
line.long 0x0 "WAKECON,Wake-up interrupt control register"
|
|
bitfld.long 0x0 0. "WAKEUPEN,Wake-up interrupt enable" "0: Wake-up interrupt is disabled,1: Wake-up interrupt is enabled"
|
|
tree.end
|
|
tree "SCUPM (Power Modules)"
|
|
base ad:0x50006000
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "AMCLK_CTRL,Analog module clock control register"
|
|
bitfld.long 0x0 0. "CLKWDT_PD_N,Clock watchdog power down" "0: Clock watchdog disabled,1: Clock watchdog enabled"
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "AMCLK_FREQ_STS,Analog module clock frequency status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "AMCLK2_FREQ,Current frequency of analog module clock 2 (TFILT_CLK)"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "AMCLK1_FREQ,Current frequency of analog module clock system clock (MI_CLK)"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "AMCLK_TH_HYS,Analog module clock limit register"
|
|
bitfld.long 0x0 30.--31. "AMCLK2_LOW_HYS,Analog module clock 2 (TFILT_CLK) lower hysteresis" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 24.--29. 1. "AMCLK2_LOW_TH,Analog module clock 2 (TFILT_CLK) lower limit threshold"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "AMCLK2_UP_HYS,Analog module clock 2 (TFILT_CLK) upper hysteresis" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--21. 1. "AMCLK2_UP_TH,Analog module clock 2 (TFILT_CLK) upper limit threshold"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "AMCLK1_LOW_HYS,Analog module clock 1 (MI_CLK) lower hysteresis" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "AMCLK1_LOW_TH,Analog module clock 1 (MI_CLK) lower limit threshold"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "AMCLK1_UP_HYS,Analog module clock 1 (MI_CLK) upper hysteresis" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "AMCLK1_UP_TH,Analog module clock 1 (MI_CLK) upper limit threshold"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "PCU_CTRL_STS,Power control unit control status register"
|
|
bitfld.long 0x0 8. "LIN_VS_UV_SD_DIS,LIN module VS undervoltage transmitter shutdown" "0: Automatic shutdown for power modules in case of..,1: Automatic shutdown for power modules in case of.."
|
|
newline
|
|
bitfld.long 0x0 1. "CLKWDT_SD_DIS,Power modules clock watchdog shutdown disable" "0: Power devices will be switched off when clock..,1: Power devices will not be shut down when clock.."
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "STCALIB,System tick calibration register"
|
|
hexmask.long 0x0 0.--25. 1. "STCALIB,System tick calibration"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "SYS_IRQ_CTRL,System interrupt control register"
|
|
bitfld.long 0x0 11. "REFBG_UPTHWARN_IE,Reference voltage overvoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "REFBG_LOTHWARN_IE,Reference voltage undervoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "SYS_OT_IE,System overtemperature shutdown interrupt enable (leads to shutdown of system)" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "SYS_OTWARN_IE,System overtemperature warning interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SYS_IS,System interrupt status register"
|
|
bitfld.long 0x0 25. "SYS_OT_STS,System overtemperature shutdown (ADC2 channel 6) status" "0: No status set,1: At least one status set"
|
|
newline
|
|
bitfld.long 0x0 24. "SYS_OTWARN_STS,System overtemperature pre-warning (ADC2 channel 6) status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 22. "LIN_FAIL_STS,LIN fail status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 19. "HS2_FAIL_STS,High-side driver 2 fail status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 18. "HS1_FAIL_STS,High-side driver 1 fail status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 17. "LS2_FAIL_STS,Low-side driver 2 fail status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 16. "LS1_FAIL_STS,Low-side driver 1 fail status" "0: No status set,1: At least one status set"
|
|
newline
|
|
bitfld.long 0x0 11. "REFBG_UPTHWARN_IS,8-bit ADC2 reference overvoltage (ADC2 channel 3) interrupt status" "0: No interrupt status set,1: At least one interrupt status set"
|
|
newline
|
|
bitfld.long 0x0 10. "REFBG_LOTHWARN_IS,8-bit ADC2 reference undervoltage (ADC2 channel 3) interrupt status" "0: No interrupt status set,1: At least one interrupt status set"
|
|
newline
|
|
bitfld.long 0x0 9. "SYS_OT_IS,System overtemperature shutdown (ADC2 channel 6) interrupt status" "0: No interrupt status set,1: At least one interrupt status set"
|
|
newline
|
|
bitfld.long 0x0 8. "SYS_OTWARN_IS,System overtemperature prewarning (ADC2 channel 6) interrupt status" "0: No interrupt status set,1: At least one interrupt status set"
|
|
newline
|
|
rbitfld.long 0x0 6. "LIN_FAIL_IS,LIN fail interrupt status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 3. "HS2_FAIL_IS,High-side driver 2 fail interrupt status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 2. "HS1_FAIL_IS,High-side driver 1 fail interrupt status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 1. "LS2_FAIL_IS,Low-side driver 2 fail interrupt status" "0: No status set,1: At least one status set"
|
|
newline
|
|
rbitfld.long 0x0 0. "LS1_FAIL_IS,Low-side driver 1 fail interrupt status" "0: No status set,1: At least one status set"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "SYS_ISCLR,System interrupt status clear register"
|
|
bitfld.long 0x0 25. "SYS_OT_SC,System overtemperature shutdown status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 24. "SYS_OTWARN_SC,System overtemperature pre-warning status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 11. "REFBG_UPTHWARN_ISC,8-bit ADC2 reference overvoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 10. "REFBG_LOTHWARN_ISC,8-bit ADC2 reference undervoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 9. "SYS_OT_ISC,System overtemperature shutdown status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 8. "SYS_OTWARN_ISC,System overtemperature pre-warning status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "SYS_SUPPLY_IRQ_CLR,System supply interrupt status clear register"
|
|
bitfld.long 0x0 25. "VDDEXT_OV_SC,VDDEXT overvoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 24. "VDD1V5_OV_SC,VDDC overvoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 23. "VDD5V_OV_SC,VDDP overvoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 22. "VS_OV_SC,VS overvoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 21. "VBAT_OV_SC,VBAT overvoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 20. "VDDEXT_UV_SC,VDDEXT undervoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 19. "VDD1V5_UV_SC,VDDC undervoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 18. "VDD5V_UV_SC,VDDP undervoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 17. "VS_UV_SC,VS undervoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 16. "VBAT_UV_SC,VBAT undervoltage status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 9. "VDDEXT_OV_ISC,VDDEXT overvoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 8. "VDD1V5_OV_ISC,VDDC overvoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 7. "VDD5V_OV_ISC,VDDP overvoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 6. "VS_OV_ISC,VS overvoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 5. "VBAT_OV_ISC,VBAT overvoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 4. "VDDEXT_UV_ISC,VDDEXT undervoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 3. "VDD1V5_UV_ISC,VDDC undervoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 2. "VDD5V_UV_ISC,VDDP undervoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 1. "VS_UV_ISC,VS undervoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
newline
|
|
bitfld.long 0x0 0. "VBAT_UV_ISC,VBAT undervoltage interrupt status clear" "0: The interrupt status is not cleared,1: The interrupt status is cleared"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SYS_SUPPLY_IRQ_CTRL,System supply interrupt control register"
|
|
bitfld.long 0x0 9. "VDDEXT_OV_IE,VDDEXT overvoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "VDD1V5_OV_IE,VDDC overvoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "VDD5V_OV_IE,VDDP overvoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "VS_OV_IE,VS overvoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "VBAT_OV_IE,VBAT overvoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "VDDEXT_UV_IE,VDDEXT undervoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "VDD1V5_UV_IE,VDDC undervoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "VDD5V_UV_IE,VDDP undervoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "VS_UV_IE,VS undervoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "VBAT_UV_IE,VBAT undervoltage interrupt enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "SYS_SUPPLY_IRQ_STS,System supply interrupt status register"
|
|
bitfld.long 0x0 25. "VDDEXT_OV_STS,VDDEXT overvoltage status" "0: No overvoltage occurred,1: Overvoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 24. "VDD1V5_OV_STS,VDDC overvoltage status" "0: No overvoltage occurred,1: Overvoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 23. "VDD5V_OV_STS,VDDP overvoltage status" "0: No overvoltage occurred,1: Overvoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 22. "VS_OV_STS,VS overvoltage status" "0: No overvoltage occurred,1: Overvoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 21. "VBAT_OV_STS,VBAT overvoltage status" "0: No overvoltage occurred,1: Overvoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 20. "VDDEXT_UV_STS,VDDEXT undervoltage status" "0: No undervoltage occurred,1: Undervoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 19. "VDD1V5_UV_STS,VDDC undervoltage status" "0: No undervoltage occurred,1: Undervoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 18. "VDD5V_UV_STS,VDDP undervoltage status" "0: No undervoltage occurred,1: Undervoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 17. "VS_UV_STS,VS undervoltage status" "0: No undervoltage occurred,1: Undervoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 16. "VBAT_UV_STS,VBAT undervoltage status" "0: No undervoltage occurred,1: Undervoltage occurred"
|
|
newline
|
|
bitfld.long 0x0 9. "VDDEXT_OV_IS,VDDEXT overvoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 8. "VDD1V5_OV_IS,VDDC overvoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 7. "VDD5V_OV_IS,VDDP overvoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 6. "VS_OV_IS,VS overvoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 5. "VBAT_OV_IS,VBAT overvoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 4. "VDDEXT_UV_IS,VDDEXT undervoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 3. "VDD1V5_UV_IS,VDDC undervoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 2. "VDD5V_UV_IS,VDDP undervoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 1. "VS_UV_IS,VS undervoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
newline
|
|
bitfld.long 0x0 0. "VBAT_UV_IS,VBAT undervoltage interrupt status" "0: No undervoltage interrupt occurred,1: Undervoltage interrupt occurred"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "WDT1_TRIG,WDT1 watchdog control register"
|
|
bitfld.long 0x0 6.--7. "SOWCONF,Short open window configuration" "0: Short open windows disabled,1: One successive short open window allowed,2: Two successive short open windows allowed,3: Three successive short open windows allowed"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "WDP_SEL,Watchdog period selection and trigger"
|
|
tree.end
|
|
tree.end
|
|
tree "SSC (High-Speed Synchronous Serial Interface)"
|
|
base ad:0x0
|
|
tree "SSC1"
|
|
base ad:0x48024000
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "BR,Baud-rate timer reload register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BR_VALUE,Baud rate timer/reload register value"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CON,Control register"
|
|
rbitfld.long 0x0 28. "BSY,Busy flag" "0,1"
|
|
rbitfld.long 0x0 27. "BE,Baud rate error flag" "0: Error,1: More than factor 2 or 0.5 between slave's actual.."
|
|
newline
|
|
rbitfld.long 0x0 26. "PE,Phase error flag" "0: Error,1: Received data changes around sampling clock edge"
|
|
rbitfld.long 0x0 25. "RE,Receive error flag" "0: Error,1: Reception completed before the receive buffer.."
|
|
newline
|
|
rbitfld.long 0x0 24. "TE,Transmit error flag" "0: Error,1: Transfer starts with the slave's transmit buffer.."
|
|
hexmask.long.byte 0x0 16.--19. 1. "BC,Bit count field"
|
|
newline
|
|
bitfld.long 0x0 15. "EN,Enable bit" "0: Transmission and reception disabled. Access to..,1: Transmission and reception enabled. Access to.."
|
|
bitfld.long 0x0 14. "MS,Master select" "0: Slave mode. Operate on shift clock received..,1: Master mode. Generate shift clock and output it.."
|
|
newline
|
|
bitfld.long 0x0 12. "AREN,Automatic reset enable" "0: No additional action upon a baud rate error,1: The SSC is automatically reset upon a baud rate.."
|
|
bitfld.long 0x0 11. "BEN,Baud rate error enable" "0: Baud rate errors,1: Baud rate errors"
|
|
newline
|
|
bitfld.long 0x0 10. "PEN,Phase error enable" "0: Phase errors,1: Phase errors"
|
|
bitfld.long 0x0 9. "REN,Receive error enable" "0: Receive errors,1: Receive errors"
|
|
newline
|
|
bitfld.long 0x0 8. "TEN,Transmit error enable" "0: Transmit errors,1: Transmit errors"
|
|
bitfld.long 0x0 7. "LB,Loop back control" "0: Output,1: Receive input is connected with transmit output.."
|
|
newline
|
|
bitfld.long 0x0 6. "PO,Clock polarity control" "0: Idle clock line is low leading clock edge is..,1: Idle clock line is high leading clock edge is.."
|
|
bitfld.long 0x0 5. "PH,Clock phase control" "0: Transmit data on the leading clock edge latch on..,1: Receive data on leading clock edge shift on.."
|
|
newline
|
|
bitfld.long 0x0 4. "HB,Heading control" "0: Transmit/Receive LSB first,1: Transmit/Receive MSB first"
|
|
hexmask.long.byte 0x0 0.--3. 1. "BM,Data width selection"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "ISRCLR,Interrupt status register clear"
|
|
bitfld.long 0x0 11. "BECLR,Baud rate error flag clear" "0: No error clear,1: Error clear"
|
|
bitfld.long 0x0 10. "PECLR,Phase error flag clear" "0: No error clear,1: Error clear"
|
|
newline
|
|
bitfld.long 0x0 9. "RECLR,Receive error flag clear" "0: No error clear,1: Error clear"
|
|
bitfld.long 0x0 8. "TECLR,Transmit error flag clear" "0: No error clear,1: Error clear"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "PISEL,Port input select register"
|
|
bitfld.long 0x0 3. "MIS_1,Master mode input select bit 1 (master mode only)" "0: Inputs selected according to MIS_0,1: Connects to unused pins"
|
|
bitfld.long 0x0 2. "CIS,Clock input select (slave mode only)" "0: (x = 1 or 2 dependent form current SSC),1: For both SSCs"
|
|
newline
|
|
bitfld.long 0x0 1. "SIS,Slave mode input select (slave mode only)" "0: (x = 1 or 2 dependent form current SSC),1: For both SSCs"
|
|
bitfld.long 0x0 0. "MIS_0,Master mode input select bit 0 (master mode only)" "0: (x = 1 or 2 dependent form current SSC),1: For both SSCs"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "RB,Receiver buffer register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RB_VALUE,Receive data register value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TB,Transmitter buffer register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TB_VALUE,Transmit data register value"
|
|
tree.end
|
|
tree "SSC2"
|
|
base ad:0x48026000
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "BR,Baud-rate timer reload register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BR_VALUE,Baud rate timer/reload register value"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CON,Control register"
|
|
rbitfld.long 0x0 28. "BSY,Busy flag" "0,1"
|
|
rbitfld.long 0x0 27. "BE,Baud rate error flag" "0: Error,1: More than factor 2 or 0.5 between slave's actual.."
|
|
newline
|
|
rbitfld.long 0x0 26. "PE,Phase error flag" "0: Error,1: Received data changes around sampling clock edge"
|
|
rbitfld.long 0x0 25. "RE,Receive error flag" "0: Error,1: Reception completed before the receive buffer.."
|
|
newline
|
|
rbitfld.long 0x0 24. "TE,Transmit error flag" "0: Error,1: Transfer starts with the slave's transmit buffer.."
|
|
hexmask.long.byte 0x0 16.--19. 1. "BC,Bit count field"
|
|
newline
|
|
bitfld.long 0x0 15. "EN,Enable bit" "0: Transmission and reception disabled. Access to..,1: Transmission and reception enabled. Access to.."
|
|
bitfld.long 0x0 14. "MS,Master select" "0: Slave mode. Operate on shift clock received..,1: Master mode. Generate shift clock and output it.."
|
|
newline
|
|
bitfld.long 0x0 12. "AREN,Automatic reset enable" "0: No additional action upon a baud rate error,1: The SSC is automatically reset upon a baud rate.."
|
|
bitfld.long 0x0 11. "BEN,Baud rate error enable" "0: Baud rate errors,1: Baud rate errors"
|
|
newline
|
|
bitfld.long 0x0 10. "PEN,Phase error enable" "0: Phase errors,1: Phase errors"
|
|
bitfld.long 0x0 9. "REN,Receive error enable" "0: Receive errors,1: Receive errors"
|
|
newline
|
|
bitfld.long 0x0 8. "TEN,Transmit error enable" "0: Transmit errors,1: Transmit errors"
|
|
bitfld.long 0x0 7. "LB,Loop back control" "0: Output,1: Receive input is connected with transmit output.."
|
|
newline
|
|
bitfld.long 0x0 6. "PO,Clock polarity control" "0: Idle clock line is low leading clock edge is..,1: Idle clock line is high leading clock edge is.."
|
|
bitfld.long 0x0 5. "PH,Clock phase control" "0: Transmit data on the leading clock edge latch on..,1: Receive data on leading clock edge shift on.."
|
|
newline
|
|
bitfld.long 0x0 4. "HB,Heading control" "0: Transmit/Receive LSB first,1: Transmit/Receive MSB first"
|
|
hexmask.long.byte 0x0 0.--3. 1. "BM,Data width selection"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "ISRCLR,Interrupt status register clear"
|
|
bitfld.long 0x0 11. "BECLR,Baud rate error flag clear" "0: No error clear,1: Error clear"
|
|
bitfld.long 0x0 10. "PECLR,Phase error flag clear" "0: No error clear,1: Error clear"
|
|
newline
|
|
bitfld.long 0x0 9. "RECLR,Receive error flag clear" "0: No error clear,1: Error clear"
|
|
bitfld.long 0x0 8. "TECLR,Transmit error flag clear" "0: No error clear,1: Error clear"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "PISEL,Port input select register"
|
|
bitfld.long 0x0 3. "MIS_1,Master mode input select bit 1 (master mode only)" "0: Inputs selected according to MIS_0,1: Connects to unused pins"
|
|
bitfld.long 0x0 2. "CIS,Clock input select (slave mode only)" "0: (x = 1 or 2 dependent form current SSC),1: For both SSCs"
|
|
newline
|
|
bitfld.long 0x0 1. "SIS,Slave mode input select (slave mode only)" "0: (x = 1 or 2 dependent form current SSC),1: For both SSCs"
|
|
bitfld.long 0x0 0. "MIS_0,Master mode input select bit 0 (master mode only)" "0: (x = 1 or 2 dependent form current SSC),1: For both SSCs"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "RB,Receiver buffer register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RB_VALUE,Receive data register value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TB,Transmitter buffer register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TB_VALUE,Transmit data register value"
|
|
tree.end
|
|
tree.end
|
|
tree "TIMER (Timer/Counter)"
|
|
base ad:0x0
|
|
tree "TIMER2"
|
|
base ad:0x48004000
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CNT,Timer2 count register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "T2H,Timer2 value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "T2L,Timer2 value"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CON,Timer2 control register"
|
|
rbitfld.long 0x0 7. "TF2,Timer2 overflow/underflow flag" "0,1"
|
|
rbitfld.long 0x0 6. "EXF2,Timer2 external flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EXEN2,Timer2 external enable control" "0: External events are disabled,1: External events are enabled in capture/reload"
|
|
bitfld.long 0x0 2. "TR2,Timer2 start/stop control" "0: Timer2,1: Timer2"
|
|
newline
|
|
bitfld.long 0x0 1. "C_T2,Timer or counter select" "0: Function selected,1: Upon negative edge at pin T2"
|
|
bitfld.long 0x0 0. "CP_RL2,Capture/reload select" "0: Upon overflow or upon negative/positive..,1: Timer2 data register contents on the.."
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CON1,Timer2 control 1 register"
|
|
bitfld.long 0x0 1. "TF2EN,Overflow/underflow interrupt enable" "0: Overflow/underflow interrupt,1: Overflow/underflow interrupt"
|
|
bitfld.long 0x0 0. "EXF2EN,External interrupt enable" "0: External interrupt,1: External interrupt"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "ICLR,Timer2 interrupt clear register"
|
|
bitfld.long 0x0 7. "TF2CLR,Overflow/underflow interrupt clear flag" "0: Overflow/underflow interrupt is not cleared,1: Overflow/underflow interrupt"
|
|
bitfld.long 0x0 6. "EXF2CLR,External interrupt clear flag" "0: External interrupt is not cleared,1: External interrupt"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "MOD,Timer2 mode register"
|
|
bitfld.long 0x0 7. "T2REGS,Edge select for Timer2 external start" "0: The falling edge at pin T2EX is selected,1: The rising edge at Pin T2EX is selected"
|
|
bitfld.long 0x0 6. "T2RHEN,Timer2 external start enable" "0: Timer2 external start is disabled,1: Timer2 external start is enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "EDGESEL,Edge select in capture mode/reload mode" "0: The falling edge at Pin T2EX is selected,1: The rising edge at Pin T2EX is selected"
|
|
bitfld.long 0x0 4. "PREN,Prescaler enable" "0: Prescaler is disabled and the 2 or 12 divider..,1: Prescaler is enabled (see T2PRE bit) and the 2.."
|
|
newline
|
|
bitfld.long 0x0 1.--3. "T2PRE,Timer2 prescaler bit" "0: fT2=fSYS,1: fT2=fSYS/2,2: DfT2=fSYS/4,3: fT2=fSYS/8,4: fT2=fSYS/16,5: fT2=fSYS/32,6: fT2=fSYS/64,7: fT2=fSYS/128"
|
|
bitfld.long 0x0 0. "DCEN,Up/down counter enable" "0: Up/down counter function is disabled,1: Up/down counter function is enabled and.."
|
|
line.long 0x4 "RC,Timer2 reload/capture register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RCH2,Reload/capture value"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RCL2,Reload/capture value"
|
|
tree.end
|
|
tree "TIMER21"
|
|
base ad:0x48005000
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CNT,Timer2 count register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "T2H,Timer2 value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "T2L,Timer2 value"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CON,Timer2 control register"
|
|
rbitfld.long 0x0 7. "TF2,Timer2 overflow/underflow flag" "0,1"
|
|
rbitfld.long 0x0 6. "EXF2,Timer2 external flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EXEN2,Timer2 external enable control" "0: External events are disabled,1: External events are enabled in capture/reload"
|
|
bitfld.long 0x0 2. "TR2,Timer2 start/stop control" "0: Timer2,1: Timer2"
|
|
newline
|
|
bitfld.long 0x0 1. "C_T2,Timer or counter select" "0: Function selected,1: Upon negative edge at pin T2"
|
|
bitfld.long 0x0 0. "CP_RL2,Capture/reload select" "0: Upon overflow or upon negative/positive..,1: Timer2 data register contents on the.."
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CON1,Timer2 control 1 register"
|
|
bitfld.long 0x0 1. "TF2EN,Overflow/underflow interrupt enable" "0: Overflow/underflow interrupt,1: Overflow/underflow interrupt"
|
|
bitfld.long 0x0 0. "EXF2EN,External interrupt enable" "0: External interrupt,1: External interrupt"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "ICLR,Timer2 interrupt clear register"
|
|
bitfld.long 0x0 7. "TF2CLR,Overflow/underflow interrupt clear flag" "0: Overflow/underflow interrupt is not cleared,1: Overflow/underflow interrupt"
|
|
bitfld.long 0x0 6. "EXF2CLR,External interrupt clear flag" "0: External interrupt is not cleared,1: External interrupt"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "MOD,Timer2 mode register"
|
|
bitfld.long 0x0 7. "T2REGS,Edge select for Timer2 external start" "0: The falling edge at pin T2EX is selected,1: The rising edge at Pin T2EX is selected"
|
|
bitfld.long 0x0 6. "T2RHEN,Timer2 external start enable" "0: Timer2 external start is disabled,1: Timer2 external start is enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "EDGESEL,Edge select in capture mode/reload mode" "0: The falling edge at Pin T2EX is selected,1: The rising edge at Pin T2EX is selected"
|
|
bitfld.long 0x0 4. "PREN,Prescaler enable" "0: Prescaler is disabled and the 2 or 12 divider..,1: Prescaler is enabled (see T2PRE bit) and the 2.."
|
|
newline
|
|
bitfld.long 0x0 1.--3. "T2PRE,Timer2 prescaler bit" "0: fT2=fSYS,1: fT2=fSYS/2,2: DfT2=fSYS/4,3: fT2=fSYS/8,4: fT2=fSYS/16,5: fT2=fSYS/32,6: fT2=fSYS/64,7: fT2=fSYS/128"
|
|
bitfld.long 0x0 0. "DCEN,Up/down counter enable" "0: Up/down counter function is disabled,1: Up/down counter function is enabled and.."
|
|
line.long 0x4 "RC,Timer2 reload/capture register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RCH2,Reload/capture value"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RCL2,Reload/capture value"
|
|
tree.end
|
|
tree.end
|
|
tree "TRX (Transceiver)"
|
|
base ad:0x4801E000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRL,Transceiver control register"
|
|
bitfld.long 0x0 21. "HV_MODE,Transceiver high-voltage I/O mode" "0: High-voltage mode entry disabled,1: High-voltage mode entry enabled"
|
|
rbitfld.long 0x0 13.--15. "FB_SM,Feedback signal for slope mode setting [3:1]" "0: Transceiver module not enabled,1: Low slope mode,2: Normal slope mode,3: Fast slope mode,4: Flash mode,5: Slope mode error,6: Slope mode error,7: Slope mode error"
|
|
newline
|
|
bitfld.long 0x0 11.--12. "SM,Transmitter slope mode control" "0: Normal slope mode,1: Fast slope mode,2: Low slope mode,3: Flash mode"
|
|
rbitfld.long 0x0 10. "RXD,Reveiver output signal" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXD,Transmitter state (only used when HV_MODE is set)" "0: Transmitter switched on,1: Transmitter switched off"
|
|
rbitfld.long 0x0 4.--6. "MODE_FB,Transmitter feedback signals settings [2:1]" "0: Mode error,1: Transceiver Sleep mode,2: Mode error,3: Mode error,4: Mode error,5: Transceiver Receive-Only mode,6: Mode error,7: Transceiver Normal mode"
|
|
newline
|
|
bitfld.long 0x0 1.--2. "MODE,Transceiver power mode control" "0: Tranceiver module switched to Sleep mode,1: Tranceiver module switched to Receive-Only mode,?,3: Tranceiver module switched to Normal mode"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "IRQCLR,Transceiver interrupt status rclear register"
|
|
bitfld.long 0x0 11. "TXD_TMOUT_SC,Transceiver TXD timeout status clear" "0: No timeout cleared,1: Timeout cleared"
|
|
bitfld.long 0x0 9. "OT_SC,Tranceiver overtemperature status clear" "0: Overtemperature not cleared,1: Overtemperature cleared"
|
|
newline
|
|
bitfld.long 0x0 8. "M_SM_ERR_SC,Transceiver mode error - slope mode error status clear" "0: Overtemperature not cleared,1: Overtemperature cleared"
|
|
bitfld.long 0x0 6. "TXD_TMOUT_ISC,Transceiver TXD timeout interrupt status clear" "0: No timeout cleared,1: Timeout cleared"
|
|
newline
|
|
bitfld.long 0x0 5. "OC_ISC,Tranceiver overcurrent interrupt status clear" "0: Overcurrent status not cleared,1: Overcurrent status cleared"
|
|
bitfld.long 0x0 4. "OT_ISC,Tranceiver overtemperature interrupt status / status clear" "0: Overtemperature not cleared,1: Overtemperature cleared"
|
|
newline
|
|
bitfld.long 0x0 3. "M_SM_ERR_ISC,Transceiver mode error - slope mode error interrupt status clear" "0: Overtemperature not cleared,1: Overtemperature cleared"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "IRQEN,Transceiver interrupt enable register"
|
|
bitfld.long 0x0 6. "TXD_TMOUT_IEN,Transceiver TxD-timeout interrupt" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 5. "OC_IEN,Transceiver overcurrent interrupt" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "OT_IEN,Transceiver overtemperature interrupt" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 3. "M_SM_ERR_IEN,Transceiver mode error - slope mode error interrupt" "0: Disabled,1: Enabled"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "IRQS,Transceiver interrupt status register"
|
|
bitfld.long 0x0 11. "TXD_TMOUT_STS,Transceiver TXD timeout status" "0: No timeout occurred,1: Timeout occurred"
|
|
bitfld.long 0x0 9. "OT_STS,Transceiver overtemperature status" "0: No overtemperature occurred,1: Overtemperature occurred"
|
|
newline
|
|
bitfld.long 0x0 8. "M_SM_ERR_STS,Transceiver mode error - slope mode error status" "0: No mode error slope mode status occurred,1: Mode error status occurred"
|
|
bitfld.long 0x0 6. "TXD_TMOUT_IS,Transceiver TXD timeout interrupt status" "0: No timeout occurred,1: Timeout occurred"
|
|
newline
|
|
bitfld.long 0x0 5. "OC_IS,Transceiver overcurrent interrupt status" "0: No overcurrent status occurred,1: Overcurrent status occurred"
|
|
bitfld.long 0x0 4. "OT_IS,Transceiver overtemperature interrupt status" "0: No overtemperature occurred,1: Overtemperature occurred"
|
|
newline
|
|
bitfld.long 0x0 3. "M_SM_ERR_IS,Transceiver mode error - slope mode error interrupt status" "0: No mode error slope mode status occurred,1: Mode error status occurred"
|
|
tree.end
|
|
tree "UART (Universal Asynchronous Receiver/Transmitter)"
|
|
base ad:0x0
|
|
tree "UART1"
|
|
base ad:0x48020000
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "SBUF,Serial data buffer register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "VAL,Serial interface buffer register"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "SCON,Serial channel control register"
|
|
bitfld.long 0x0 7. "SM0,Serial port operating mode selection" "0,1"
|
|
bitfld.long 0x0 6. "SM1,Serial port operating mode selection" "0,1"
|
|
bitfld.long 0x0 5. "SM2,Enable serial port multiprocessor communication in modes 2 and 3" "0,1"
|
|
bitfld.long 0x0 4. "REN,Enable receiver of serial port" "0: Serial reception is disabled,1: Serial reception is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "TB8,Serial port transmitter bit 9" "0,1"
|
|
bitfld.long 0x0 2. "RB8,Serial port receiver bit 9" "0,1"
|
|
bitfld.long 0x0 1. "TI,Transmit interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "RI,Receive interrupt flag" "0,1"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "SCONCLR,Serial channel control clear register"
|
|
bitfld.long 0x0 2. "RB8CLR,SCON.RB8 clear flag" "0: RB8 flag is not cleared,1: RB8 flag is cleared"
|
|
bitfld.long 0x0 1. "TICLR,SCON.TI clear flag" "0: TI flag is not cleared,1: TI flag is cleared"
|
|
bitfld.long 0x0 0. "RICLR,SCON.RI clear flag" "0: RI flag is not cleared,1: RI flag is cleared"
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x48022000
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "SBUF,Serial data buffer register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "VAL,Serial interface buffer register"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "SCON,Serial channel control register"
|
|
bitfld.long 0x0 7. "SM0,Serial port operating mode selection" "0,1"
|
|
bitfld.long 0x0 6. "SM1,Serial port operating mode selection" "0,1"
|
|
bitfld.long 0x0 5. "SM2,Enable serial port multiprocessor communication in modes 2 and 3" "0,1"
|
|
bitfld.long 0x0 4. "REN,Enable receiver of serial port" "0: Serial reception is disabled,1: Serial reception is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "TB8,Serial port transmitter bit 9" "0,1"
|
|
bitfld.long 0x0 2. "RB8,Serial port receiver bit 9" "0,1"
|
|
bitfld.long 0x0 1. "TI,Transmit interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "RI,Receive interrupt flag" "0,1"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "SCONCLR,Serial channel control clear register"
|
|
bitfld.long 0x0 2. "RB8CLR,SCON.RB8 clear flag" "0: RB8 flag is not cleared,1: RB8 flag is cleared"
|
|
bitfld.long 0x0 1. "TICLR,SCON.TI clear flag" "0: TI flag is not cleared,1: TI flag is cleared"
|
|
bitfld.long 0x0 0. "RICLR,SCON.RI clear flag" "0: RI flag is not cleared,1: RI flag is cleared"
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.OFF
|