7008 lines
386 KiB
Plaintext
7008 lines
386 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: STR73x On-Chip Peripherals
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; @Props: Released
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; @Author: KAM
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; @Changelog: 2006-10-05 KAM
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; @Manufacturer: STM - ST Microelectronics N.V.
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; @Doc: STR730UM.pdf (2005.09); STR7-Flash.pdf (2005.07)
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; @Core: ARM7
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perstr73x.per 17449 2024-02-05 16:59:24Z kwisniewski $
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config 16. 8.
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width 20.
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base ad:0x00000000
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tree.open "Power, Reset and Clocks"
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tree "CMU (Clock Monitor Unit)"
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base ad:0xfffff600
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width 11.
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group.word 0x00++0x1
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line.word 0x00 "CMU_RCCTL,RC Oscillator Control Register"
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bitfld.word 0x00 0.--3. " RCCTL ,RC Oscillator Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.word 0x04++0x1
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line.word 0x00 "CMU_FDISP,Frequency Display Register"
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hexmask.word 0x00 0.--11. 1. " FD ,Measured Frequency"
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group.word 0x08++0x1
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line.word 0x00 "CMU_FRH,Frequency Reference High Register"
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hexmask.word 0x00 0.--11. 1. " FH ,Frequency Reference High"
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group.word 0x0c++0x1
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line.word 0x00 "CMU_FRL,Frequency Reference Low Register"
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hexmask.word 0x00 0.--11. 1. " FL ,Frequency Reference Low"
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group.word 0x10++0x1
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line.word 0x00 "CMU_CTRL,Control Register"
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bitfld.word 0x00 10. " OSCS ,Oscillator Stop" "No effect,Stopped"
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bitfld.word 0x00 9. " CRFR ,CMU Reset Flag Reset" "No effect,Cleared"
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bitfld.word 0x00 8. " RCFR ,RC oscillator Frequency in Run mode" "High,Low"
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textline " "
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bitfld.word 0x00 7. " RCFS ,RC oscillator Frequency in Stop mode" "High,Low"
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bitfld.word 0x00 6. " RCHSE ,RC oscillator Hardware Stop Enable" "No effect,Stopped"
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bitfld.word 0x00 5. " RCSS ,RC oscillator Software Stop" "No effect,Stopped"
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textline " "
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bitfld.word 0x00 4. " SFM ,Start Frequency Measurement" "Ready,Started"
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bitfld.word 0x00 3. " REN ,CMU Reset Enable" "Disabled,Enabled"
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bitfld.word 0x00 2. " CKSEL2 ,CMU clock selection" "Backup,Main"
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textline " "
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bitfld.word 0x00 1. " CKSEL1 ,Oscillator-PLL selection" "Main,PRCCU"
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bitfld.word 0x00 0. " CKSEL0 ,RC-Oscillator selection" "Backup,Main"
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rgroup.word 0x14++0x1
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line.word 0x00 "CMU_STAT,Status Register"
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bitfld.word 0x00 4. " CRF ,CMU Reset Flag" "Not CMU,CMU"
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bitfld.word 0x00 3. " RON ,CMU Reset condition ON status" "Not detected,Detected"
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bitfld.word 0x00 2. " CKON2 ,MUX2 status" "fRC,fOSC"
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textline " "
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bitfld.word 0x00 1. " CKON1 ,MUX1 status" "fPLLOUT,fOSC"
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bitfld.word 0x00 0. " CKON0 ,MUX0 status" "fRC,fOSC"
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group.word 0x18++0x1
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line.word 0x00 "CMU_IS,Interrupt Status Register"
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bitfld.word 0x00 3. " ROI ,Reset ON Interrupt pending" "Not pending,Pending"
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bitfld.word 0x00 2. " FLL ,Clock Frequency Less than Low reference pending" "Not pending,Pending"
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bitfld.word 0x00 1. " EOC ,End of Counter pending" "Not pending,Pending"
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textline " "
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bitfld.word 0x00 0. " OLR ,Oscillator frequency Less than RC frequency pending" "Not pending,Pending"
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group.word 0x1c++0x1
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line.word 0x00 "CMU_IM,Interrupt Mask Register"
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bitfld.word 0x00 3. " ROIM ,Reset ON Interrupt Mask" "Disabled,Enabled"
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bitfld.word 0x00 2. " FLLM ,Clock Frequency Less than Low reference interrupt Mask" "Disabled,Enabled"
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bitfld.word 0x00 1. " EOCM ,End of Counter interrupt Mask" "Disabled,Enabled"
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textline " "
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bitfld.word 0x00 0. " OLRM ,Oscillator frequency Less than RC frequency interrupt Mask" "Disabled,Enabled"
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group.word 0x20++0x1
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line.word 0x00 "CMU_EOCV,End Of Count Value Register"
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hexmask.word.byte 0x00 0.--7. 1. " EOCV ,End Of Count Value"
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wgroup.word 0x24++0x1
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line.word 0x00 "CMU_WE,Write Enable Register"
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width 0xb
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tree.end
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tree "PRCCU (Power, Reset and Clock Control Unit)"
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base ad:0x60000000
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width 13.
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group.long 0x00++0x3
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line.long 0x00 "PRCCU_CCR,Clock Control Register"
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bitfld.long 0x00 11. " EN_HALT ,Halt enable" "No effect,Enabled"
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bitfld.long 0x00 10. " EN_STOP ,STOP Interrupt Mask" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 9. " EN_CK2_16 ,CK2_16 Interrupt Mask" "Disabled,Enabled"
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bitfld.long 0x00 7. " EN_LOCK ,LOCK Interrupt Mask" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SRESEN ,Software Reset Enable" "Disabled,Enabled"
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bitfld.long 0x00 1. " WFI_CKSEL ,WFI Clock Select" "Clock2/16,?..."
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textline " "
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bitfld.long 0x00 0. " LPOWFI ,Low Power Wait For Interrupt mode" "Disabled,Enabled"
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group.long 0x04++0x3
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line.long 0x00 "PRCCU_VRCTR,Voltage Regulator Control Register"
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bitfld.long 0x00 4. " VRLPW ,Voltage Regulator for Low Power WFI" "Off,On"
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bitfld.long 0x00 3. " VROFF_REG ,Voltage Regulator OFF state" "On,Off"
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textline " "
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bitfld.long 0x00 2. " VROK ,Voltage Regulator OK" "Not ready,Stabilized"
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group.long 0x08++0x3
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line.long 0x00 "PRCCU_CFR,Clock Flag Register"
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bitfld.long 0x00 15. " DIV2 ,CLOCK1 Divided by 2" "No devision,Div by 2"
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bitfld.long 0x00 14. " STOP_I ,STOP Interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 13. " CK2_16_I ,CK2_16 switching Interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 11. " LOCK_I ,LOCK Interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 8. " LVD_INT ,Internal LVD reset flag" "Not occurred,Occurred"
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bitfld.long 0x00 6. " WDGRES ,Watchdog reset flag" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x00 5. " SOFTRES ,Software Reset Flag" "Not occurred,Occurred"
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bitfld.long 0x00 3. " CK2_16 ,CLOCK2/16 Selection" "CLOCK2/16,CLOCK2"
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textline " "
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bitfld.long 0x00 1. " LOCK ,PLL locked-in" "Not locked,Locked"
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bitfld.long 0x00 0. " CSU_CKSEL ,CSU Clock Select" "CLOCK2,PLL multiplier"
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group.long 0x18++0x3
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line.long 0x00 "PRCCU_PLLCR,PLL Configuration Register"
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bitfld.long 0x00 7. " FREEN ,PLL free running mode enable" "Disabled,Enabled"
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bitfld.long 0x00 6. " FREF_RANGE ,Reference Frequency Range selector" "1.5-3 MHz,3-5 MHz"
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textline " "
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bitfld.long 0x00 4.--5. " MX[1:0] ,PLL Multiplication Factor" "20,12,28,16"
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bitfld.long 0x00 0.--2. " DX[2:0] ,PLL output clock division factor" "1,2,3,4,5,6,7,CLOCK2"
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group.long 0x20++0x3
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line.long 0x00 "PRCCU_SMR,System Mode Register"
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bitfld.long 0x00 1. " HALT ,Halt" "No effect,Halted"
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bitfld.long 0x00 0. " WFI ,Wait For Interrupt Mode" "Entered,No effect"
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group.long 0x28++0x3
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line.long 0x00 "PRCCU_RTCPR,Real Time Clock Programming Register"
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bitfld.long 0x00 0.--3. " RTCP[3:0] ,Real Time Clock Programming" "fOSC/2,fOSC/4,fOSC/8,fOSC/16,fOSC/32,fOSC/64,fOSC/128,fOSC/256,fOSC/512,fOSC/1024,Stopped,Stopped,Stopped,Stopped,Stopped,Stopped"
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width 0xb
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tree.end
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tree.end
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tree "CFG (Configuration Registers)"
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base ad:0x40000000
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width 12.
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group.long 0x00++0x3 "System Configuration Registers"
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line.long 0x00 "CFG_R0,Configuration Register 0"
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bitfld.long 0x00 10. " SYS ,SystemMemory Boot Mode Flag" "No SystemMemory Boot,SystemMemory Boot"
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bitfld.long 0x00 9. " USER1 ,User1 Boot Mode Flag" "No User1 Boot,User1 Boot"
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textline " "
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bitfld.long 0x00 8. " USER2 ,User2 Boot Mode Flag" "No User2 Boot,User2 Boot"
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bitfld.long 0x00 7. " JTBT ,JTAG Boot Mode Flag" "No SystemMemory Boot,SystemMemory Boot"
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textline " "
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bitfld.long 0x00 5. " DMABSPI1 ,DMA/BSPI1 Select" "TIM8/TIM9,BSPI1"
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bitfld.long 0x00 4. " DMABSPI0 ,DMA/BSPI0 Select" "Not used,Used"
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textline " "
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bitfld.long 0x00 0. " REMAP ,Memory Remapping" "0xA0000000,Remapped to 0"
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group.long 0x30++0x3
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line.long 0x00 "CFG_R1,Configuration Register 1"
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bitfld.long 0x00 4.--7. " FLPOD ,FLASH Power-On Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. " WUP0S ,Wake Up Input Line 0 Source Select" "WUP0,Wake-Up timer"
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textline " "
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bitfld.long 0x00 2. " EIFILT ,External Interrupt Filter on Channels INT(15:0)" "Disabled,Enabled"
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bitfld.long 0x00 0.--1. " LPVRCC ,Low Power Voltage Regulator Current Capability" "6,4,4,2"
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rgroup.long 0x34++0x3
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line.long 0x00 "CFG_DIDR,Device Identification Register"
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width 12.
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group.long 0x04++0x3 "External Interrupt Request Configuration Registers"
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line.long 0x00 "CFG_EITE0,External Interrupt Trigger Event Register 0"
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hexmask.long.word 0x00 0.--15. 1. " EITE0 ,External Interrupt Channel INT[15:0] Trigger Event"
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group.long 0x24++0x3
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line.long 0x00 "CFG_EITE1,External Interrupt Trigger Event Register 1"
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hexmask.long.word 0x00 0.--15. 1. " EITE1 ,External Interrupt Channel INT[15:0] Trigger Event"
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group.long 0x28++0x3
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line.long 0x00 "CFG_EITE2,External Interrupt Trigger Event Register 2"
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hexmask.long.word 0x00 0.--15. 1. " EITE2 ,External Interrupt Channel INT[15:0] Trigger Event"
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width 12.
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group.long 0x08++0x7 "Peripheral Clock Management Registers"
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line.long 0x00 "CFG_PCGR0,Peripheral Clock Gating Register 0"
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bitfld.long 0x00 30. " PCG0[30] ,Wake-up Timer Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 29. " PCG0[29] ,EIC Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 28. " PCG0[28] ,ADC Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 27. " PCG0[27] ,BSPI2 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 26. " PCG0[26] ,BSPI1 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 25. " PCG0[25] ,BSPI0 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 24. " PCG0[24] ,Port 6 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 23. " PCG0[23] ,Port 5 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 22. " PCG0[22] ,Port 4 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 21. " PCG0[21] ,Port 3 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 20. " PCG0[20] ,Port 2 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 19. " PCG0[19] ,Port 1 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 18. " PCG0[18] ,Port 0 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 17. " PCG0[17] ,PWM 5 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 16. " PCG0[16] ,PWM 4 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 15. " PCG0[15] ,PWM 3 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 14. " PCG0[14] ,PWM 2 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 13. " PCG0[13] ,PWM 1 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 12. " PCG0[12] ,PWM 0 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 11. " PCG0[11] ,CAN 1 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 10. " PCG0[10] ,CAN 0 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 8. " PCG0[8] ,TB 0 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 7. " PCG0[7] ,TIM 1 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 6. " PCG0[6] ,TIM 0 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 5. " PCG0[5] ,UART1 Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 4. " PCG0[4] ,UART0 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 2. " PCG0[2] ,WIU Clock Gating" "Turned off,System clock"
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bitfld.long 0x00 1. " PCG0[1] ,I2C 0 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x00 0. " PCG0[0] ,RAM Clock Gating" "Turned off,System clock"
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line.long 0x04 "CFG_PCGR1,Peripheral Clock Gating Register 1"
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bitfld.long 0x04 30. " PCG1[30] ,AHB Arbiter Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 29. " PCG1[29] ,Native Bus Arbiter Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 23. " PCG1[23] ,DMA 3 Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 22. " PCG1[22] ,DMA 2 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 21. " PCG1[21] ,DMA 1 Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 20. " PCG1[20] ,DMA 0 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 19. " PCG1[19] ,RTC Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 18. " PCG1[18] ,TIM 4 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 17. " PCG1[17] ,TIM 3 Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 16. " PCG1[16] ,TIM 2 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 14. " PCG1[14] ,TB 2 Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 13. " PCG1[13] ,TB 1 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 9. " PCG1[9] ,UART3 Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 8. " PCG1[8] ,UART2 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 7. " PCG1[7] ,TIM 9 Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 6. " PCG1[6] ,TIM 8 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 5. " PCG1[5] ,TIM 7 Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 4. " PCG1[4] ,TIM 6 Clock Gating" "Turned off,System clock"
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textline " "
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bitfld.long 0x04 3. " PCG1[3] ,TIM 5 Clock Gating" "Turned off,System clock"
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bitfld.long 0x04 0. " PCG1[0] ,I2C 1 Clock Gating" "Turned off,System clock"
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group.long 0x18++0x7
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line.long 0x00 "CFG_PCGRB0,Peripheral Clock Gating Register B0"
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bitfld.long 0x00 30. " PCGB0[30] ,Wake-up Timer Clock Gating" "PCGR0[30],Switched off"
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bitfld.long 0x00 29. " PCGB0[29] ,EIC Clock Gating" "PCGR0[29],Switched off"
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textline " "
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bitfld.long 0x00 28. " PCGB0[28] ,ADC Clock Gating" "PCGR0[28],Switched off"
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bitfld.long 0x00 27. " PCGB0[27] ,BSPI2 Clock Gating" "PCGR0[27],Switched off"
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textline " "
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bitfld.long 0x00 26. " PCGB0[26] ,BSPI1 Clock Gating" "PCGR0[26],Switched off"
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bitfld.long 0x00 25. " PCGB0[25] ,BSPI0 Clock Gating" "PCGR0[25],Switched off"
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textline " "
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bitfld.long 0x00 24. " PCGB0[24] ,Port 6 Clock Gating" "PCGR0[24],Switched off"
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bitfld.long 0x00 23. " PCGB0[23] ,Port 5 Clock Gating" "PCGR0[23],Switched off"
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textline " "
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bitfld.long 0x00 22. " PCGB0[22] ,Port 4 Clock Gating" "PCGR0[22],Switched off"
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bitfld.long 0x00 21. " PCGB0[21] ,Port 3 Clock Gating" "PCGR0[21],Switched off"
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textline " "
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bitfld.long 0x00 20. " PCGB0[20] ,Port 2 Clock Gating" "PCGR0[20],Switched off"
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bitfld.long 0x00 19. " PCGB0[19] ,Port 1 Clock Gating" "PCGR0[19],Switched off"
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textline " "
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bitfld.long 0x00 18. " PCGB0[18] ,Port 0 Clock Gating" "PCGR0[18],Switched off"
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bitfld.long 0x00 17. " PCGB0[17] ,PWM 5 Clock Gating" "PCGR0[17],Switched off"
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textline " "
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bitfld.long 0x00 16. " PCGB0[16] ,PWM 4 Clock Gating" "PCGR0[16],Switched off"
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bitfld.long 0x00 15. " PCGB0[15] ,PWM 3 Clock Gating" "PCGR0[15],Switched off"
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textline " "
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bitfld.long 0x00 14. " PCGB0[14] ,PWM 2 Clock Gating" "PCGR0[14],Switched off"
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bitfld.long 0x00 13. " PCGB0[13] ,PWM 1 Clock Gating" "PCGR0[13],Switched off"
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textline " "
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bitfld.long 0x00 12. " PCGB0[12] ,PWM 0 Clock Gating" "PCGR0[12],Switched off"
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bitfld.long 0x00 11. " PCGB0[11] ,CAN 1 Clock Gating" "PCGR0[11],Switched off"
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textline " "
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bitfld.long 0x00 10. " PCGB0[10] ,CAN 0 Clock Gating" "PCGR0[10],Switched off"
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bitfld.long 0x00 8. " PCGB0[8] ,TB 0 Clock Gating" "PCGR0[8],Switched off"
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textline " "
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bitfld.long 0x00 7. " PCGB0[7] ,TIM 1 Clock Gating" "PCGR0[7],Switched off"
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bitfld.long 0x00 6. " PCGB0[6] ,TIM 0 Clock Gating" "PCGR0[6],Switched off"
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textline " "
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bitfld.long 0x00 5. " PCGB0[5] ,UART1 Clock Gating" "PCGR0[5],Switched off"
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bitfld.long 0x00 4. " PCGB0[4] ,UART0 Clock Gating" "PCGR0[4],Switched off"
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textline " "
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bitfld.long 0x00 2. " PCGB0[2] ,WIU Clock Gating" "PCGR0[2],Switched off"
|
|
bitfld.long 0x00 1. " PCGB0[1] ,I2C 0 Clock Gating" "PCGR0[1],Switched off"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PCGB0[0] ,RAM Clock Gating" "PCGR0[0],Switched off"
|
|
line.long 0x04 "CFG_PCGRB1,Peripheral Clock Gating Register B1"
|
|
bitfld.long 0x04 30. " PCGB1[30] ,AHB Arbiter Clock Gating" "PCGR1[30],Switched off"
|
|
bitfld.long 0x04 29. " PCGB1[29] ,Native Bus Arbiter Clock Gating" "PCGR1[29],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PCGB1[23] ,DMA 3 Clock Gating" "PCGR1[23],Switched off"
|
|
bitfld.long 0x04 22. " PCGB1[22] ,DMA 2 Clock Gating" "PCGR1[22],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 21. " PCGB1[21] ,DMA 1 Clock Gating" "PCGR1[21],Switched off"
|
|
bitfld.long 0x04 20. " PCGB1[20] ,DMA 0 Clock Gating" "PCGR1[20],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PCGB1[19] ,RTC Clock Gating" "PCGR1[19],Switched off"
|
|
bitfld.long 0x04 18. " PCGB1[18] ,TIM 4 Clock Gating" "PCGR1[18],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 17. " PCGB1[17] ,TIM 3 Clock Gating" "PCGR1[17],Switched off"
|
|
bitfld.long 0x04 16. " PCGB1[16] ,TIM 2 Clock Gating" "PCGR1[16],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 14. " PCGB1[14] ,TB 2 Clock Gating" "PCGR1[14],Switched off"
|
|
bitfld.long 0x04 13. " PCGB1[13] ,TB 1 Clock Gating" "PCGR1[13],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 9. " PCGB1[9] ,UART3 Clock Gating" "PCGR1[9],Switched off"
|
|
bitfld.long 0x04 8. " PCGB1[8] ,UART2 Clock Gating" "PCGR1[8],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PCGB1[7] ,TIM 9 Clock Gating" "PCGR1[7],Switched off"
|
|
bitfld.long 0x04 6. " PCGB1[6] ,TIM 8 Clock Gating" "PCGR1[6],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 5. " PCGB1[5] ,TIM 7 Clock Gating" "PCGR1[5],Switched off"
|
|
bitfld.long 0x04 4. " PCGB1[4] ,TIM 6 Clock Gating" "PCGR1[4],Switched off"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PCGB1[3] ,TIM 5 Clock Gating" "PCGR1[3],Switched off"
|
|
bitfld.long 0x04 0. " PCGB1[0] ,I2C 1 Clock Gating" "PCGR1[0],Switched off"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "CFG_TIMSR,TIM External Clock Select Register"
|
|
bitfld.long 0x00 9. " TIMECKS[9] ,TIM[9] External Clock Select" "fEXT,ICAPA9"
|
|
bitfld.long 0x00 8. " TIMECKS[8] ,TIM[8] External Clock Select" "fEXT,ICAPA8"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TIMECKS[7] ,TIM[7] External Clock Select" "fEXT,ICAPA7"
|
|
bitfld.long 0x00 6. " TIMECKS[6] ,TIM[6] External Clock Select" "fEXT,ICAPA6"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMECKS[5] ,TIM[5] External Clock Select" "fEXT,ICAPA5"
|
|
bitfld.long 0x00 4. " TIMECKS[4] ,TIM[4] External Clock Select" "fEXT,ICAPA4"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMECKS[3] ,TIM[3] External Clock Select" "fEXT,ICAPA3"
|
|
bitfld.long 0x00 2. " TIMECKS[2] ,TIM[2] External Clock Select" "fEXT,ICAPA2"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIMECKS[1] ,TIM[1] External Clock Select" "fEXT,ICAPA1"
|
|
bitfld.long 0x00 0. " TIMECKS[0] ,TIM[0] External Clock Select" "fEXT,ICAPA0"
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "CFG_PECGR0,Peripheral Emulation Clock Gating Register 0"
|
|
bitfld.long 0x00 30. " PECG0[30] ,Wake-up Timer Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 29. " PECG0[29] ,EIC Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PECG0[28] ,ADC Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 27. " PECG0[27] ,BSPI2 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PECG0[26] ,BSPI1 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 25. " PECG0[25] ,BSPI0 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PECG0[24] ,Port 6 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 23. " PECG0[23] ,Port 5 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PECG0[22] ,Port 4 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 21. " PECG0[21] ,Port 3 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PECG0[20] ,Port 2 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 19. " PECG0[19] ,Port 1 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PECG0[18] ,Port 0 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 17. " PECG0[17] ,PWM 5 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PECG0[16] ,PWM 4 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 15. " PECG0[15] ,PWM 3 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PECG0[14] ,PWM 2 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 13. " PECG0[13] ,PWM 1 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PECG0[12] ,PWM 0 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 11. " PECG0[11] ,CAN 1 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PECG0[10] ,CAN 0 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 8. " PECG0[8] ,TB 0 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PECG0[7] ,TIM 1 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 6. " PECG0[6] ,TIM 0 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PECG0[5] ,UART1 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 4. " PECG0[4] ,UART0 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PECG0[2] ,WIU Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x00 1. " PECG0[1] ,I2C 0 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PECG0[0] ,RAM Emulation Clock Gating" "Streched,Enabled"
|
|
line.long 0x04 "CFG_PECGR1,Peripheral Emulation Clock Gating Register 1"
|
|
bitfld.long 0x04 30. " PCG1[30] ,AHB Arbiter Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 29. " PCG1[29] ,Native Bus Arbiter Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PCG1[23] ,DMA 3 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 22. " PCG1[22] ,DMA 2 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " PCG1[21] ,DMA 1 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 20. " PCG1[20] ,DMA 0 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PCG1[19] ,RTC Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 18. " PCG1[18] ,TIM 4 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " PCG1[17] ,TIM 3 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 16. " PCG1[16] ,TIM 2 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14. " PCG1[14] ,TB 2 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 13. " PCG1[13] ,TB 1 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " PCG1[9] ,UART3 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 8. " PCG1[8] ,UART2 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PCG1[7] ,TIM 9 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 6. " PCG1[6] ,TIM 8 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " PCG1[5] ,TIM 7 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 4. " PCG1[4] ,TIM 6 Emulation Clock Gating" "Streched,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PCG1[3] ,TIM 5 Emulation Clock Gating" "Streched,Enabled"
|
|
bitfld.long 0x04 0. " PCG1[0] ,I2C 1 Emulation Clock Gating" "Streched,Enabled"
|
|
group.long 0x2c++0x3 "BSPI and UART Management in Emulation Mode"
|
|
line.long 0x00 "CFG_ESPR,Emulation Serial Protection Register"
|
|
bitfld.long 0x00 6. " BSPI2 ,BSPI2 configuration in emulation mode" "Not protected,Protected"
|
|
bitfld.long 0x00 5. " BSPI1 ,BSPI1 configuration in emulation mode" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BSPI0 ,BSPI0 configuration in emulation mode" "Not protected,Protected"
|
|
bitfld.long 0x00 3. " UART3 ,UART3 configuration in emulation mode" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UART2 ,UART2 configuration in emulation mode" "Not protected,Protected"
|
|
bitfld.long 0x00 1. " UART1 ,UART1 configuration in emulation mode" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UART0 ,UART0 configuration in emulation mode" "Not protected,Protected"
|
|
width 0xb
|
|
tree.end
|
|
sif ((cpu()=="STR730")||(cpu()=="STR735"))
|
|
tree.open "I/O Ports"
|
|
tree "Port 0"
|
|
base ad:0xffffd400
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 1"
|
|
base ad:0xffffd410
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 2"
|
|
base ad:0xffffd420
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 3"
|
|
base ad:0xffffd430
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 4"
|
|
base ad:0xffffd440
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 5"
|
|
base ad:0xffffd450
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 6"
|
|
base ad:0xffffd460
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
elif ((cpu()=="STR731")||(cpu()=="STR736"))
|
|
tree.open "I/O Ports"
|
|
tree "Port 0"
|
|
base ad:0xffffd400
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 1"
|
|
base ad:0xffffd410
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 2"
|
|
base ad:0xffffd420
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 3. " C03 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 3. " C13 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 3. " C23 ,Port Configuration Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
bitfld.word 0x00 3. " D3 ,Port Data Bit 3" "Low,High"
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 3"
|
|
base ad:0xffffd430
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 4"
|
|
base ad:0xffffd440
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 15. " C015 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 15. " C115 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 15. " C215 ,Port Configuration Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 15. " D15 ,Port Data Bit 15" "Low,High"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 5"
|
|
base ad:0xffffd450
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C010 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
bitfld.word 0x00 7. " C07 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C05 ,Port Configuration Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 1. " C01 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C110 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
bitfld.word 0x00 7. " C17 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C15 ,Port Configuration Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 1. " C11 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " C210 ,Port Configuration Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
bitfld.word 0x00 7. " C27 ,Port Configuration Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " C25 ,Port Configuration Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
bitfld.word 0x00 1. " C21 ,Port Configuration Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
bitfld.word 0x00 10. " D10 ,Port Data Bit 10" "Low,High"
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
bitfld.word 0x00 7. " D7 ,Port Data Bit 7" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 5. " D5 ,Port Data Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
bitfld.word 0x00 1. " D1 ,Port Data Bit 1" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 6"
|
|
base ad:0xffffd460
|
|
width 5.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PC0,Port Configuration Register 0"
|
|
bitfld.word 0x00 14. " C014 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C013 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C012 ,Port Configuration Bit 12" "Low,High"
|
|
bitfld.word 0x00 11. " C011 ,Port Configuration Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 9. " C09 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C08 ,Port Configuration Bit 8" "Low,High"
|
|
bitfld.word 0x00 6. " C06 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 4. " C04 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 2. " C02 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 0. " C00 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PC1,Port Configuration Register 1"
|
|
bitfld.word 0x00 14. " C114 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C113 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C112 ,Port Configuration Bit 12" "Low,High"
|
|
bitfld.word 0x00 11. " C111 ,Port Configuration Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 9. " C19 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C18 ,Port Configuration Bit 8" "Low,High"
|
|
bitfld.word 0x00 6. " C16 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 4. " C14 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 2. " C12 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 0. " C10 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PC2,Port Configuration Register 2"
|
|
bitfld.word 0x00 14. " C214 ,Port Configuration Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " C213 ,Port Configuration Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " C212 ,Port Configuration Bit 12" "Low,High"
|
|
bitfld.word 0x00 11. " C211 ,Port Configuration Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 9. " C29 ,Port Configuration Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " C28 ,Port Configuration Bit 8" "Low,High"
|
|
bitfld.word 0x00 6. " C26 ,Port Configuration Bit 6" "Low,High"
|
|
bitfld.word 0x00 4. " C24 ,Port Configuration Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 2. " C22 ,Port Configuration Bit 2" "Low,High"
|
|
bitfld.word 0x00 0. " C20 ,Port Configuration Bit 0" "Low,High"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PD,I/O Data Register"
|
|
bitfld.word 0x00 14. " D14 ,Port Data Bit 14" "Low,High"
|
|
bitfld.word 0x00 13. " D13 ,Port Data Bit 13" "Low,High"
|
|
bitfld.word 0x00 12. " D12 ,Port Data Bit 12" "Low,High"
|
|
bitfld.word 0x00 11. " D11 ,Port Data Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 9. " D9 ,Port Data Bit 9" "Low,High"
|
|
bitfld.word 0x00 8. " D8 ,Port Data Bit 8" "Low,High"
|
|
bitfld.word 0x00 6. " D6 ,Port Data Bit 6" "Low,High"
|
|
bitfld.word 0x00 4. " D4 ,Port Data Bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 2. " D2 ,Port Data Bit 2" "Low,High"
|
|
bitfld.word 0x00 0. " D0 ,Port Data Bit 0" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree.open "Interrupts"
|
|
tree "EIC (Enhanced Interrupt Controller)"
|
|
base ad:0xfffffc00
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "EIC_ICR,Interrupt Control Register"
|
|
bitfld.long 0x00 1. " FIQ_EN ,Global FIQ output enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQ_EN ,Global IRQ output enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "EIC_CICR,Current Interrupt Channel Register"
|
|
bitfld.long 0x00 0.--5. " CIC ,Current Interrupt Channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "EIC_CIPR,Current Interrupt Priority Register"
|
|
bitfld.long 0x00 0.--3. " CIP ,Current Interrupt Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0xf
|
|
line.long 0x00 "EIC_FIER,Fast Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " FIE[1] ,FIQ Channel 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FIE[0] ,FIQ Channel 0 Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "EIC_FIPR,Fast Interrupt Pending Register"
|
|
eventfld.long 0x04 1. " FIP[1] ,Channel 1 Fast Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 0. " FIP[0] ,Channel 0 Fast Interrupt Pending" "Not pending,Pending"
|
|
line.long 0x08 "EIC_IVR,Interrupt Vector Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " IVR[32:16] ,Interrupt Vector (High portion)"
|
|
hexmask.long.word 0x08 0.--16. 1. " IVR[15:0] ,Interrupt Vector (Low portion)"
|
|
line.long 0x0c "EIC_FIR,Fast Interrupt Register"
|
|
eventfld.long 0x0c 4. " FIP[1] ,Channel 1 Fast Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x0c 3. " FIP[0] ,Channel 0 Fast Interrupt Pending" "Not pending,Pending"
|
|
bitfld.long 0x0c 1. " FIE[1] ,FIQ Channel 1 Fast Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " FIE[0] ,FIQ Channel 0 Fast Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "EIC_IER0,Interrupt Enable Register 0"
|
|
bitfld.long 0x00 31. " IER[31] ,Channel 31 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IER[30] ,Channel 30 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IER[29] ,Channel 29 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IER[28] ,Channel 28 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IER[27] ,Channel 27 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IER[26] ,Channel 26 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IER[25] ,Channel 25 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IER[24] ,Channel 24 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IER[23] ,Channel 23 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IER[22] ,Channel 22 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IER[21] ,Channel 21 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IER[20] ,Channel 20 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IER[19] ,Channel 19 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IER[18] ,Channel 18 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IER[17] ,Channel 17 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IER[16] ,Channel 16 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IER[15] ,Channel 15 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IER[14] ,Channel 14 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IER[13] ,Channel 13 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IER[12] ,Channel 12 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IER[11] ,Channel 11 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IER[10] ,Channel 10 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IER[9] ,Channel 9 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IER[8] ,Channel 8 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IER[7] ,Channel 7 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IER[6] ,Channel 6 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IER[5] ,Channel 5 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IER[4] ,Channel 4 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IER[3] ,Channel 3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IER[2] ,Channel 2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IER[1] ,Channel 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IER[0] ,Channel 0 Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "EIC_IER1,Interrupt Enable Register 1"
|
|
bitfld.long 0x04 31. " IER[63] ,Channel 63 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " IER[62] ,Channel 62 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " IER[61] ,Channel 61 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IER[60] ,Channel 60 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " IER[59] ,Channel 59 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " IER[58] ,Channel 58 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IER[57] ,Channel 57 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " IER[56] ,Channel 56 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " IER[55] ,Channel 55 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IER[54] ,Channel 54 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " IER[53] ,Channel 53 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " IER[52] ,Channel 52 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IER[51] ,Channel 51 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " IER[50] ,Channel 50 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " IER[49] ,Channel 49 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IER[48] ,Channel 48 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " IER[47] ,Channel 47 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " IER[46] ,Channel 46 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IER[45] ,Channel 45 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " IER[44] ,Channel 44 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " IER[43] ,Channel 43 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IER[42] ,Channel 42 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " IER[41] ,Channel 41 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " IER[40] ,Channel 40 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IER[39] ,Channel 39 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " IER[38] ,Channel 38 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " IER[37] ,Channel 37 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IER[36] ,Channel 36 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " IER[35] ,Channel 35 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " IER[34] ,Channel 34 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IER[33] ,Channel 33 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " IER[32] ,Channel 32 Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x40++0x7
|
|
line.long 0x00 "EIC_IPR0,Interrupt Pending Register 0"
|
|
eventfld.long 0x00 31. " IPR[31] ,Channel 31 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " IPR[30] ,Channel 30 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " IPR[29] ,Channel 29 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " IPR[28] ,Channel 28 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " IPR[27] ,Channel 27 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " IPR[26] ,Channel 26 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " IPR[25] ,Channel 25 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " IPR[24] ,Channel 24 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " IPR[23] ,Channel 23 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " IPR[22] ,Channel 22 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " IPR[21] ,Channel 21 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " IPR[20] ,Channel 20 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " IPR[19] ,Channel 19 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " IPR[18] ,Channel 18 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " IPR[17] ,Channel 17 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " IPR[16] ,Channel 16 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " IPR[15] ,Channel 15 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " IPR[14] ,Channel 14 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " IPR[13] ,Channel 13 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " IPR[12] ,Channel 12 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " IPR[11] ,Channel 11 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " IPR[10] ,Channel 10 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " IPR[9] ,Channel 9 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " IPR[8] ,Channel 8 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " IPR[7] ,Channel 7 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " IPR[6] ,Channel 6 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " IPR[5] ,Channel 5 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " IPR[4] ,Channel 4 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " IPR[3] ,Channel 3 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " IPR[2] ,Channel 2 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " IPR[1] ,Channel 1 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " IPR[0] ,Channel 0 Interrupt Pending" "Not pending,Pending"
|
|
line.long 0x04 "EIC_IPR1,Interrupt Pending Register 1"
|
|
eventfld.long 0x04 31. " IPR[63] ,Channel 63 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " IPR[62] ,Channel 62 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 29. " IPR[61] ,Channel 61 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 28. " IPR[60] ,Channel 60 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 27. " IPR[59] ,Channel 59 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 26. " IPR[58] ,Channel 58 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 25. " IPR[57] ,Channel 57 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 24. " IPR[56] ,Channel 56 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 23. " IPR[55] ,Channel 55 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 22. " IPR[54] ,Channel 54 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 21. " IPR[53] ,Channel 53 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 20. " IPR[52] ,Channel 52 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 19. " IPR[51] ,Channel 51 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 18. " IPR[50] ,Channel 50 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 17. " IPR[49] ,Channel 49 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 16. " IPR[48] ,Channel 48 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 15. " IPR[47] ,Channel 47 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 14. " IPR[46] ,Channel 46 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 13. " IPR[45] ,Channel 45 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 12. " IPR[44] ,Channel 44 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 11. " IPR[43] ,Channel 43 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 10. " IPR[42] ,Channel 42 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 9. " IPR[41] ,Channel 41 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 8. " IPR[40] ,Channel 40 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 7. " IPR[39] ,Channel 39 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 6. " IPR[38] ,Channel 38 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 5. " IPR[37] ,Channel 37 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 4. " IPR[36] ,Channel 36 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 3. " IPR[35] ,Channel 35 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 2. " IPR[34] ,Channel 34 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 1. " IPR[33] ,Channel 33 Interrupt Pending" "Not pending,Pending"
|
|
eventfld.long 0x04 0. " IPR[32] ,Channel 32 Interrupt Pending" "Not pending,Pending"
|
|
group.long 0x60++0xff
|
|
line.long 0x0 "EIC_SIR0 ,Source Interrupt Register - Channel 0 "
|
|
hexmask.long.word 0x0 16.--31. 1. " SIV0 ,Source Interrupt Vactor for Interrupt Channel 0 "
|
|
bitfld.long 0x0 0.--3. " SILP0 ,Source Interrupt Priority Level for Interrupt Channel 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x4 "EIC_SIR1 ,Source Interrupt Register - Channel 1 "
|
|
hexmask.long.word 0x4 16.--31. 1. " SIV1 ,Source Interrupt Vactor for Interrupt Channel 1 "
|
|
bitfld.long 0x4 0.--3. " SILP1 ,Source Interrupt Priority Level for Interrupt Channel 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x8 "EIC_SIR2 ,Source Interrupt Register - Channel 2 "
|
|
hexmask.long.word 0x8 16.--31. 1. " SIV2 ,Source Interrupt Vactor for Interrupt Channel 2 "
|
|
bitfld.long 0x8 0.--3. " SILP2 ,Source Interrupt Priority Level for Interrupt Channel 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xC "EIC_SIR3 ,Source Interrupt Register - Channel 3 "
|
|
hexmask.long.word 0xC 16.--31. 1. " SIV3 ,Source Interrupt Vactor for Interrupt Channel 3 "
|
|
bitfld.long 0xC 0.--3. " SILP3 ,Source Interrupt Priority Level for Interrupt Channel 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "EIC_SIR4 ,Source Interrupt Register - Channel 4 "
|
|
hexmask.long.word 0x10 16.--31. 1. " SIV4 ,Source Interrupt Vactor for Interrupt Channel 4 "
|
|
bitfld.long 0x10 0.--3. " SILP4 ,Source Interrupt Priority Level for Interrupt Channel 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "EIC_SIR5 ,Source Interrupt Register - Channel 5 "
|
|
hexmask.long.word 0x14 16.--31. 1. " SIV5 ,Source Interrupt Vactor for Interrupt Channel 5 "
|
|
bitfld.long 0x14 0.--3. " SILP5 ,Source Interrupt Priority Level for Interrupt Channel 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x18 "EIC_SIR6 ,Source Interrupt Register - Channel 6 "
|
|
hexmask.long.word 0x18 16.--31. 1. " SIV6 ,Source Interrupt Vactor for Interrupt Channel 6 "
|
|
bitfld.long 0x18 0.--3. " SILP6 ,Source Interrupt Priority Level for Interrupt Channel 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x1C "EIC_SIR7 ,Source Interrupt Register - Channel 7 "
|
|
hexmask.long.word 0x1C 16.--31. 1. " SIV7 ,Source Interrupt Vactor for Interrupt Channel 7 "
|
|
bitfld.long 0x1C 0.--3. " SILP7 ,Source Interrupt Priority Level for Interrupt Channel 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x20 "EIC_SIR8 ,Source Interrupt Register - Channel 8 "
|
|
hexmask.long.word 0x20 16.--31. 1. " SIV8 ,Source Interrupt Vactor for Interrupt Channel 8 "
|
|
bitfld.long 0x20 0.--3. " SILP8 ,Source Interrupt Priority Level for Interrupt Channel 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x24 "EIC_SIR9 ,Source Interrupt Register - Channel 9 "
|
|
hexmask.long.word 0x24 16.--31. 1. " SIV9 ,Source Interrupt Vactor for Interrupt Channel 9 "
|
|
bitfld.long 0x24 0.--3. " SILP9 ,Source Interrupt Priority Level for Interrupt Channel 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x28 "EIC_SIR10,Source Interrupt Register - Channel 10"
|
|
hexmask.long.word 0x28 16.--31. 1. " SIV10 ,Source Interrupt Vactor for Interrupt Channel 10"
|
|
bitfld.long 0x28 0.--3. " SILP10 ,Source Interrupt Priority Level for Interrupt Channel 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x2C "EIC_SIR11,Source Interrupt Register - Channel 11"
|
|
hexmask.long.word 0x2C 16.--31. 1. " SIV11 ,Source Interrupt Vactor for Interrupt Channel 11"
|
|
bitfld.long 0x2C 0.--3. " SILP11 ,Source Interrupt Priority Level for Interrupt Channel 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x30 "EIC_SIR12,Source Interrupt Register - Channel 12"
|
|
hexmask.long.word 0x30 16.--31. 1. " SIV12 ,Source Interrupt Vactor for Interrupt Channel 12"
|
|
bitfld.long 0x30 0.--3. " SILP12 ,Source Interrupt Priority Level for Interrupt Channel 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x34 "EIC_SIR13,Source Interrupt Register - Channel 13"
|
|
hexmask.long.word 0x34 16.--31. 1. " SIV13 ,Source Interrupt Vactor for Interrupt Channel 13"
|
|
bitfld.long 0x34 0.--3. " SILP13 ,Source Interrupt Priority Level for Interrupt Channel 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x38 "EIC_SIR14,Source Interrupt Register - Channel 14"
|
|
hexmask.long.word 0x38 16.--31. 1. " SIV14 ,Source Interrupt Vactor for Interrupt Channel 14"
|
|
bitfld.long 0x38 0.--3. " SILP14 ,Source Interrupt Priority Level for Interrupt Channel 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x3C "EIC_SIR15,Source Interrupt Register - Channel 15"
|
|
hexmask.long.word 0x3C 16.--31. 1. " SIV15 ,Source Interrupt Vactor for Interrupt Channel 15"
|
|
bitfld.long 0x3C 0.--3. " SILP15 ,Source Interrupt Priority Level for Interrupt Channel 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x40 "EIC_SIR16,Source Interrupt Register - Channel 16"
|
|
hexmask.long.word 0x40 16.--31. 1. " SIV16 ,Source Interrupt Vactor for Interrupt Channel 16"
|
|
bitfld.long 0x40 0.--3. " SILP16 ,Source Interrupt Priority Level for Interrupt Channel 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x44 "EIC_SIR17,Source Interrupt Register - Channel 17"
|
|
hexmask.long.word 0x44 16.--31. 1. " SIV17 ,Source Interrupt Vactor for Interrupt Channel 17"
|
|
bitfld.long 0x44 0.--3. " SILP17 ,Source Interrupt Priority Level for Interrupt Channel 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x48 "EIC_SIR18,Source Interrupt Register - Channel 18"
|
|
hexmask.long.word 0x48 16.--31. 1. " SIV18 ,Source Interrupt Vactor for Interrupt Channel 18"
|
|
bitfld.long 0x48 0.--3. " SILP18 ,Source Interrupt Priority Level for Interrupt Channel 18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x4C "EIC_SIR19,Source Interrupt Register - Channel 19"
|
|
hexmask.long.word 0x4C 16.--31. 1. " SIV19 ,Source Interrupt Vactor for Interrupt Channel 19"
|
|
bitfld.long 0x4C 0.--3. " SILP19 ,Source Interrupt Priority Level for Interrupt Channel 19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x50 "EIC_SIR20,Source Interrupt Register - Channel 20"
|
|
hexmask.long.word 0x50 16.--31. 1. " SIV20 ,Source Interrupt Vactor for Interrupt Channel 20"
|
|
bitfld.long 0x50 0.--3. " SILP20 ,Source Interrupt Priority Level for Interrupt Channel 20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x54 "EIC_SIR21,Source Interrupt Register - Channel 21"
|
|
hexmask.long.word 0x54 16.--31. 1. " SIV21 ,Source Interrupt Vactor for Interrupt Channel 21"
|
|
bitfld.long 0x54 0.--3. " SILP21 ,Source Interrupt Priority Level for Interrupt Channel 21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x58 "EIC_SIR22,Source Interrupt Register - Channel 22"
|
|
hexmask.long.word 0x58 16.--31. 1. " SIV22 ,Source Interrupt Vactor for Interrupt Channel 22"
|
|
bitfld.long 0x58 0.--3. " SILP22 ,Source Interrupt Priority Level for Interrupt Channel 22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x5C "EIC_SIR23,Source Interrupt Register - Channel 23"
|
|
hexmask.long.word 0x5C 16.--31. 1. " SIV23 ,Source Interrupt Vactor for Interrupt Channel 23"
|
|
bitfld.long 0x5C 0.--3. " SILP23 ,Source Interrupt Priority Level for Interrupt Channel 23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x60 "EIC_SIR24,Source Interrupt Register - Channel 24"
|
|
hexmask.long.word 0x60 16.--31. 1. " SIV24 ,Source Interrupt Vactor for Interrupt Channel 24"
|
|
bitfld.long 0x60 0.--3. " SILP24 ,Source Interrupt Priority Level for Interrupt Channel 24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x64 "EIC_SIR25,Source Interrupt Register - Channel 25"
|
|
hexmask.long.word 0x64 16.--31. 1. " SIV25 ,Source Interrupt Vactor for Interrupt Channel 25"
|
|
bitfld.long 0x64 0.--3. " SILP25 ,Source Interrupt Priority Level for Interrupt Channel 25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x68 "EIC_SIR26,Source Interrupt Register - Channel 26"
|
|
hexmask.long.word 0x68 16.--31. 1. " SIV26 ,Source Interrupt Vactor for Interrupt Channel 26"
|
|
bitfld.long 0x68 0.--3. " SILP26 ,Source Interrupt Priority Level for Interrupt Channel 26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x6C "EIC_SIR27,Source Interrupt Register - Channel 27"
|
|
hexmask.long.word 0x6C 16.--31. 1. " SIV27 ,Source Interrupt Vactor for Interrupt Channel 27"
|
|
bitfld.long 0x6C 0.--3. " SILP27 ,Source Interrupt Priority Level for Interrupt Channel 27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x70 "EIC_SIR28,Source Interrupt Register - Channel 28"
|
|
hexmask.long.word 0x70 16.--31. 1. " SIV28 ,Source Interrupt Vactor for Interrupt Channel 28"
|
|
bitfld.long 0x70 0.--3. " SILP28 ,Source Interrupt Priority Level for Interrupt Channel 28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x74 "EIC_SIR29,Source Interrupt Register - Channel 29"
|
|
hexmask.long.word 0x74 16.--31. 1. " SIV29 ,Source Interrupt Vactor for Interrupt Channel 29"
|
|
bitfld.long 0x74 0.--3. " SILP29 ,Source Interrupt Priority Level for Interrupt Channel 29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x78 "EIC_SIR30,Source Interrupt Register - Channel 30"
|
|
hexmask.long.word 0x78 16.--31. 1. " SIV30 ,Source Interrupt Vactor for Interrupt Channel 30"
|
|
bitfld.long 0x78 0.--3. " SILP30 ,Source Interrupt Priority Level for Interrupt Channel 30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x7C "EIC_SIR31,Source Interrupt Register - Channel 31"
|
|
hexmask.long.word 0x7C 16.--31. 1. " SIV31 ,Source Interrupt Vactor for Interrupt Channel 31"
|
|
bitfld.long 0x7C 0.--3. " SILP31 ,Source Interrupt Priority Level for Interrupt Channel 31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x80 "EIC_SIR32,Source Interrupt Register - Channel 32"
|
|
hexmask.long.word 0x80 16.--31. 1. " SIV32 ,Source Interrupt Vactor for Interrupt Channel 32"
|
|
bitfld.long 0x80 0.--3. " SILP32 ,Source Interrupt Priority Level for Interrupt Channel 32" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x84 "EIC_SIR33,Source Interrupt Register - Channel 33"
|
|
hexmask.long.word 0x84 16.--31. 1. " SIV33 ,Source Interrupt Vactor for Interrupt Channel 33"
|
|
bitfld.long 0x84 0.--3. " SILP33 ,Source Interrupt Priority Level for Interrupt Channel 33" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x88 "EIC_SIR34,Source Interrupt Register - Channel 34"
|
|
hexmask.long.word 0x88 16.--31. 1. " SIV34 ,Source Interrupt Vactor for Interrupt Channel 34"
|
|
bitfld.long 0x88 0.--3. " SILP34 ,Source Interrupt Priority Level for Interrupt Channel 34" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x8C "EIC_SIR35,Source Interrupt Register - Channel 35"
|
|
hexmask.long.word 0x8C 16.--31. 1. " SIV35 ,Source Interrupt Vactor for Interrupt Channel 35"
|
|
bitfld.long 0x8C 0.--3. " SILP35 ,Source Interrupt Priority Level for Interrupt Channel 35" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x90 "EIC_SIR36,Source Interrupt Register - Channel 36"
|
|
hexmask.long.word 0x90 16.--31. 1. " SIV36 ,Source Interrupt Vactor for Interrupt Channel 36"
|
|
bitfld.long 0x90 0.--3. " SILP36 ,Source Interrupt Priority Level for Interrupt Channel 36" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x94 "EIC_SIR37,Source Interrupt Register - Channel 37"
|
|
hexmask.long.word 0x94 16.--31. 1. " SIV37 ,Source Interrupt Vactor for Interrupt Channel 37"
|
|
bitfld.long 0x94 0.--3. " SILP37 ,Source Interrupt Priority Level for Interrupt Channel 37" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x98 "EIC_SIR38,Source Interrupt Register - Channel 38"
|
|
hexmask.long.word 0x98 16.--31. 1. " SIV38 ,Source Interrupt Vactor for Interrupt Channel 38"
|
|
bitfld.long 0x98 0.--3. " SILP38 ,Source Interrupt Priority Level for Interrupt Channel 38" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x9C "EIC_SIR39,Source Interrupt Register - Channel 39"
|
|
hexmask.long.word 0x9C 16.--31. 1. " SIV39 ,Source Interrupt Vactor for Interrupt Channel 39"
|
|
bitfld.long 0x9C 0.--3. " SILP39 ,Source Interrupt Priority Level for Interrupt Channel 39" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xA0 "EIC_SIR40,Source Interrupt Register - Channel 40"
|
|
hexmask.long.word 0xA0 16.--31. 1. " SIV40 ,Source Interrupt Vactor for Interrupt Channel 40"
|
|
bitfld.long 0xA0 0.--3. " SILP40 ,Source Interrupt Priority Level for Interrupt Channel 40" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xA4 "EIC_SIR41,Source Interrupt Register - Channel 41"
|
|
hexmask.long.word 0xA4 16.--31. 1. " SIV41 ,Source Interrupt Vactor for Interrupt Channel 41"
|
|
bitfld.long 0xA4 0.--3. " SILP41 ,Source Interrupt Priority Level for Interrupt Channel 41" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xA8 "EIC_SIR42,Source Interrupt Register - Channel 42"
|
|
hexmask.long.word 0xA8 16.--31. 1. " SIV42 ,Source Interrupt Vactor for Interrupt Channel 42"
|
|
bitfld.long 0xA8 0.--3. " SILP42 ,Source Interrupt Priority Level for Interrupt Channel 42" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xAC "EIC_SIR43,Source Interrupt Register - Channel 43"
|
|
hexmask.long.word 0xAC 16.--31. 1. " SIV43 ,Source Interrupt Vactor for Interrupt Channel 43"
|
|
bitfld.long 0xAC 0.--3. " SILP43 ,Source Interrupt Priority Level for Interrupt Channel 43" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xB0 "EIC_SIR44,Source Interrupt Register - Channel 44"
|
|
hexmask.long.word 0xB0 16.--31. 1. " SIV44 ,Source Interrupt Vactor for Interrupt Channel 44"
|
|
bitfld.long 0xB0 0.--3. " SILP44 ,Source Interrupt Priority Level for Interrupt Channel 44" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xB4 "EIC_SIR45,Source Interrupt Register - Channel 45"
|
|
hexmask.long.word 0xB4 16.--31. 1. " SIV45 ,Source Interrupt Vactor for Interrupt Channel 45"
|
|
bitfld.long 0xB4 0.--3. " SILP45 ,Source Interrupt Priority Level for Interrupt Channel 45" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xB8 "EIC_SIR46,Source Interrupt Register - Channel 46"
|
|
hexmask.long.word 0xB8 16.--31. 1. " SIV46 ,Source Interrupt Vactor for Interrupt Channel 46"
|
|
bitfld.long 0xB8 0.--3. " SILP46 ,Source Interrupt Priority Level for Interrupt Channel 46" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xBC "EIC_SIR47,Source Interrupt Register - Channel 47"
|
|
hexmask.long.word 0xBC 16.--31. 1. " SIV47 ,Source Interrupt Vactor for Interrupt Channel 47"
|
|
bitfld.long 0xBC 0.--3. " SILP47 ,Source Interrupt Priority Level for Interrupt Channel 47" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xC0 "EIC_SIR48,Source Interrupt Register - Channel 48"
|
|
hexmask.long.word 0xC0 16.--31. 1. " SIV48 ,Source Interrupt Vactor for Interrupt Channel 48"
|
|
bitfld.long 0xC0 0.--3. " SILP48 ,Source Interrupt Priority Level for Interrupt Channel 48" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xC4 "EIC_SIR49,Source Interrupt Register - Channel 49"
|
|
hexmask.long.word 0xC4 16.--31. 1. " SIV49 ,Source Interrupt Vactor for Interrupt Channel 49"
|
|
bitfld.long 0xC4 0.--3. " SILP49 ,Source Interrupt Priority Level for Interrupt Channel 49" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xC8 "EIC_SIR50,Source Interrupt Register - Channel 50"
|
|
hexmask.long.word 0xC8 16.--31. 1. " SIV50 ,Source Interrupt Vactor for Interrupt Channel 50"
|
|
bitfld.long 0xC8 0.--3. " SILP50 ,Source Interrupt Priority Level for Interrupt Channel 50" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xCC "EIC_SIR51,Source Interrupt Register - Channel 51"
|
|
hexmask.long.word 0xCC 16.--31. 1. " SIV51 ,Source Interrupt Vactor for Interrupt Channel 51"
|
|
bitfld.long 0xCC 0.--3. " SILP51 ,Source Interrupt Priority Level for Interrupt Channel 51" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xD0 "EIC_SIR52,Source Interrupt Register - Channel 52"
|
|
hexmask.long.word 0xD0 16.--31. 1. " SIV52 ,Source Interrupt Vactor for Interrupt Channel 52"
|
|
bitfld.long 0xD0 0.--3. " SILP52 ,Source Interrupt Priority Level for Interrupt Channel 52" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xD4 "EIC_SIR53,Source Interrupt Register - Channel 53"
|
|
hexmask.long.word 0xD4 16.--31. 1. " SIV53 ,Source Interrupt Vactor for Interrupt Channel 53"
|
|
bitfld.long 0xD4 0.--3. " SILP53 ,Source Interrupt Priority Level for Interrupt Channel 53" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xD8 "EIC_SIR54,Source Interrupt Register - Channel 54"
|
|
hexmask.long.word 0xD8 16.--31. 1. " SIV54 ,Source Interrupt Vactor for Interrupt Channel 54"
|
|
bitfld.long 0xD8 0.--3. " SILP54 ,Source Interrupt Priority Level for Interrupt Channel 54" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xDC "EIC_SIR55,Source Interrupt Register - Channel 55"
|
|
hexmask.long.word 0xDC 16.--31. 1. " SIV55 ,Source Interrupt Vactor for Interrupt Channel 55"
|
|
bitfld.long 0xDC 0.--3. " SILP55 ,Source Interrupt Priority Level for Interrupt Channel 55" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xE0 "EIC_SIR56,Source Interrupt Register - Channel 56"
|
|
hexmask.long.word 0xE0 16.--31. 1. " SIV56 ,Source Interrupt Vactor for Interrupt Channel 56"
|
|
bitfld.long 0xE0 0.--3. " SILP56 ,Source Interrupt Priority Level for Interrupt Channel 56" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xE4 "EIC_SIR57,Source Interrupt Register - Channel 57"
|
|
hexmask.long.word 0xE4 16.--31. 1. " SIV57 ,Source Interrupt Vactor for Interrupt Channel 57"
|
|
bitfld.long 0xE4 0.--3. " SILP57 ,Source Interrupt Priority Level for Interrupt Channel 57" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xE8 "EIC_SIR58,Source Interrupt Register - Channel 58"
|
|
hexmask.long.word 0xE8 16.--31. 1. " SIV58 ,Source Interrupt Vactor for Interrupt Channel 58"
|
|
bitfld.long 0xE8 0.--3. " SILP58 ,Source Interrupt Priority Level for Interrupt Channel 58" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xEC "EIC_SIR59,Source Interrupt Register - Channel 59"
|
|
hexmask.long.word 0xEC 16.--31. 1. " SIV59 ,Source Interrupt Vactor for Interrupt Channel 59"
|
|
bitfld.long 0xEC 0.--3. " SILP59 ,Source Interrupt Priority Level for Interrupt Channel 59" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xF0 "EIC_SIR60,Source Interrupt Register - Channel 60"
|
|
hexmask.long.word 0xF0 16.--31. 1. " SIV60 ,Source Interrupt Vactor for Interrupt Channel 60"
|
|
bitfld.long 0xF0 0.--3. " SILP60 ,Source Interrupt Priority Level for Interrupt Channel 60" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xF4 "EIC_SIR61,Source Interrupt Register - Channel 61"
|
|
hexmask.long.word 0xF4 16.--31. 1. " SIV61 ,Source Interrupt Vactor for Interrupt Channel 61"
|
|
bitfld.long 0xF4 0.--3. " SILP61 ,Source Interrupt Priority Level for Interrupt Channel 61" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xF8 "EIC_SIR62,Source Interrupt Register - Channel 62"
|
|
hexmask.long.word 0xF8 16.--31. 1. " SIV62 ,Source Interrupt Vactor for Interrupt Channel 62"
|
|
bitfld.long 0xF8 0.--3. " SILP62 ,Source Interrupt Priority Level for Interrupt Channel 62" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0xFC "EIC_SIR63,Source Interrupt Register - Channel 63"
|
|
hexmask.long.word 0xFC 16.--31. 1. " SIV63 ,Source Interrupt Vactor for Interrupt Channel 63"
|
|
bitfld.long 0xFC 0.--3. " SILP63 ,Source Interrupt Priority Level for Interrupt Channel 63" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0xb
|
|
tree.end
|
|
sif ((cpu()=="STR730")||(cpu()=="STR735"))
|
|
tree "WIU (Wake-Up Interrupt Unit)"
|
|
base ad:0xffffb800
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "WIU_CTRL,Wake-up Control Register"
|
|
bitfld.long 0x00 2. " STOP ,Stop" "0,1"
|
|
bitfld.long 0x00 1. " INT_EN ,Global WIU Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WKUP_INT ,Global Wake-up Event Enable" "Disabled,Enabled"
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "WIU_MR,Wake-up Mask Register"
|
|
bitfld.long 0x00 31. " WUM31 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " WUM30 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " WUM29 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WUM28 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " WUM27 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " WUM26 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WUM25 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " WUM24 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " WUM23 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WUM22 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " WUM21 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " WUM20 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WUM19 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " WUM18 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " WUM17 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " WUM16 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " WUM15 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " WUM14 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " WUM13 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " WUM12 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " WUM11 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WUM10 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " WUM9 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " WUM8 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WUM7 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " WUM6 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " WUM5 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WUM4 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " WUM3 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " WUM2 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WUM1 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " WUM0 ,Wake-Up Mask" "Masked,Not masked"
|
|
line.long 0x04 "WIU_TR,Wake-up Trigger Register"
|
|
bitfld.long 0x04 31. " WUT31 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 30. " WUT30 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 29. " WUT29 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WUT28 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 27. " WUT27 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 26. " WUT26 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WUT25 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 24. " WUT24 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 23. " WUT23 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WUT22 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 21. " WUT21 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 20. " WUT20 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WUT19 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 18. " WUT18 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 17. " WUT17 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WUT16 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 15. " WUT15 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 14. " WUT14 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WUT13 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 12. " WUT12 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 11. " WUT11 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WUT10 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 9. " WUT9 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 8. " WUT8 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WUT7 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 6. " WUT6 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 5. " WUT5 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WUT4 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 3. " WUT3 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 2. " WUT2 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WUT1 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 0. " WUT0 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "WIU_INTR,Wake-up Software Interrupt Register"
|
|
bitfld.long 0x00 31. " WUINT31 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " WUINT30 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " WUINT29 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WUINT28 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. " WUINT27 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " WUINT26 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WUINT25 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " WUINT24 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " WUINT23 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WUINT22 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " WUINT21 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " WUINT20 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WUINT19 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " WUINT18 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " WUINT17 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " WUINT16 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " WUINT15 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " WUINT14 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " WUINT13 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " WUINT12 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " WUINT11 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WUINT10 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " WUINT9 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " WUINT8 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WUINT7 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " WUINT6 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " WUINT5 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WUINT4 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " WUINT3 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " WUINT2 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WUINT1 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " WUINT0 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "WIU_PR,Wake-up Pending Register"
|
|
eventfld.long 0x00 31. " WUP31 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 30. " WUP30 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 29. " WUP29 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 28. " WUP28 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 27. " WUP27 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 26. " WUP26 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 25. " WUP25 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 24. " WUP24 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 23. " WUP23 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 22. " WUP22 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 21. " WUP21 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 20. " WUP20 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 19. " WUP19 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 18. " WUP18 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 17. " WUP17 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 16. " WUP16 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 15. " WUP15 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 14. " WUP14 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 13. " WUP13 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 12. " WUP12 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 11. " WUP11 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 10. " WUP10 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 9. " WUP9 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 8. " WUP8 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 7. " WUP7 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 6. " WUP6 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 5. " WUP5 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 4. " WUP4 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 3. " WUP3 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 2. " WUP2 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 1. " WUP1 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " WUP0 ,Wake-up Pending" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
elif ((cpu()=="STR731")||(cpu()=="STR736"))
|
|
tree "WIU (Wake-Up Interrupt Unit)"
|
|
base ad:0xffffb800
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "WIU_CTRL,Wake-up Control Register"
|
|
bitfld.long 0x00 2. " STOP ,Stop" "0,1"
|
|
bitfld.long 0x00 1. " INT_EN ,Global WIU Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WKUP_INT ,Global Wake-up Event Enable" "Disabled,Enabled"
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "WIU_MR,Wake-up Mask Register"
|
|
bitfld.long 0x00 17. " WUM17 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 16. " WUM16 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " WUM15 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " WUM14 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 13. " WUM13 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " WUM12 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WUM11 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " WUM10 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " WUM9 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " WUM8 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " WUM7 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " WUM6 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " WUM5 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " WUM4 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " WUM3 ,Wake-Up Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WUM2 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " WUM1 ,Wake-Up Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " WUM0 ,Wake-Up Mask" "Masked,Not masked"
|
|
line.long 0x04 "WIU_TR,Wake-up Trigger Register"
|
|
bitfld.long 0x04 17. " WUT17 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 16. " WUT16 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 15. " WUT15 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 14. " WUT14 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 13. " WUT13 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 12. " WUT12 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 11. " WUT11 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 10. " WUT10 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 9. " WUT9 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 8. " WUT8 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 7. " WUT7 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 6. " WUT6 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 5. " WUT5 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 4. " WUT4 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 3. " WUT3 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 2. " WUT2 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 1. " WUT1 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 0. " WUT0 ,Wake-up Trigger Polarity" "Falling edge,Rising edge"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "WIU_INTR,Wake-up Software Interrupt Register"
|
|
bitfld.long 0x00 17. " WUINT17 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " WUINT16 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " WUINT15 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 14. " WUINT14 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " WUINT13 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " WUINT12 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WUINT11 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " WUINT10 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " WUINT9 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 8. " WUINT8 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " WUINT7 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " WUINT6 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " WUINT5 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " WUINT4 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " WUINT3 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WUINT2 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " WUINT1 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " WUINT0 ,WIU Software Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "WIU_PR,Wake-up Pending Register"
|
|
eventfld.long 0x00 17. " WUP17 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 16. " WUP16 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 15. " WUP15 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 14. " WUP14 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 13. " WUP13 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 12. " WUP12 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 11. " WUP11 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 10. " WUP10 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 9. " WUP9 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 8. " WUP8 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 7. " WUP7 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 6. " WUP6 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 5. " WUP5 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 4. " WUP4 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 3. " WUP3 ,Wake-up Pending" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " WUP2 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 1. " WUP1 ,Wake-up Pending" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " WUP0 ,Wake-up Pending" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree.open "DMA (Direct Memory Access Controller)"
|
|
tree "DMA 0"
|
|
base ad:0xfffff000
|
|
width 15.
|
|
group.word 0x0++0x1 "Stream 0"
|
|
line.word 0x00 "DMA0_SOURCEL0,Source Base Address Low Register"
|
|
group.word (0x0+0x04)++0x1
|
|
line.word 0x00 "DMA0_SOURCEH0,Source Base Address High Register"
|
|
group.word (0x0+0x08)++0x1
|
|
line.word 0x00 "DMA0_DESTL0,Destination Base Address Low Register"
|
|
group.word (0x0+0x0c)++0x1
|
|
line.word 0x00 "DMA0_DESTH0,Destination Base Address High Register"
|
|
group.word (0x0+0x10)++0x1
|
|
line.word 0x00 "DMA0_MAX0,Maximum Count Register"
|
|
if (0.<3.)
|
|
group.word (0x0+0x14)++0x1
|
|
line.word 0x00 "DMA0_CTRL0,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (0==3.)
|
|
group.word (0x0+0x14)++0x1
|
|
line.word 0x00 "DMA0_CTRL0,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x0+0x18)++0x1
|
|
line.word 0x00 "DMA0_SOCURRH0,Current Source Address High"
|
|
rgroup.word (0x0+0x1c)++0x1
|
|
line.word 0x00 "DMA0_SOCURRL0,Current Source Address Low"
|
|
rgroup.word (0x0+0x20)++0x1
|
|
line.word 0x00 "DMA0_DECURRH0,Current Destination Address High"
|
|
rgroup.word (0x0+0x24)++0x1
|
|
line.word 0x00 "DMA0_DECURRL0,Current Destination Address Low"
|
|
rgroup.word (0x0+0x28)++0x1
|
|
line.word 0x00 "DMA0_TCNT0,Terminal Counter Register"
|
|
group.word (0x0+0x2c)++0x1
|
|
line.word 0x00 "DMA0_LUBuff0,Last Used Buffer Location 0 Register"
|
|
group.word 0x40++0x1 "Stream 1"
|
|
line.word 0x00 "DMA0_SOURCEL1,Source Base Address Low Register"
|
|
group.word (0x40+0x04)++0x1
|
|
line.word 0x00 "DMA0_SOURCEH1,Source Base Address High Register"
|
|
group.word (0x40+0x08)++0x1
|
|
line.word 0x00 "DMA0_DESTL1,Destination Base Address Low Register"
|
|
group.word (0x40+0x0c)++0x1
|
|
line.word 0x00 "DMA0_DESTH1,Destination Base Address High Register"
|
|
group.word (0x40+0x10)++0x1
|
|
line.word 0x00 "DMA0_MAX1,Maximum Count Register"
|
|
if (0.<3.)
|
|
group.word (0x40+0x14)++0x1
|
|
line.word 0x00 "DMA0_CTRL1,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (0==3.)
|
|
group.word (0x40+0x14)++0x1
|
|
line.word 0x00 "DMA0_CTRL1,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x40+0x18)++0x1
|
|
line.word 0x00 "DMA0_SOCURRH1,Current Source Address High"
|
|
rgroup.word (0x40+0x1c)++0x1
|
|
line.word 0x00 "DMA0_SOCURRL1,Current Source Address Low"
|
|
rgroup.word (0x40+0x20)++0x1
|
|
line.word 0x00 "DMA0_DECURRH1,Current Destination Address High"
|
|
rgroup.word (0x40+0x24)++0x1
|
|
line.word 0x00 "DMA0_DECURRL1,Current Destination Address Low"
|
|
rgroup.word (0x40+0x28)++0x1
|
|
line.word 0x00 "DMA0_TCNT1,Terminal Counter Register"
|
|
group.word (0x40+0x2c)++0x1
|
|
line.word 0x00 "DMA0_LUBuff1,Last Used Buffer Location 1 Register"
|
|
group.word 0x80++0x1 "Stream 2"
|
|
line.word 0x00 "DMA0_SOURCEL2,Source Base Address Low Register"
|
|
group.word (0x80+0x04)++0x1
|
|
line.word 0x00 "DMA0_SOURCEH2,Source Base Address High Register"
|
|
group.word (0x80+0x08)++0x1
|
|
line.word 0x00 "DMA0_DESTL2,Destination Base Address Low Register"
|
|
group.word (0x80+0x0c)++0x1
|
|
line.word 0x00 "DMA0_DESTH2,Destination Base Address High Register"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "DMA0_MAX2,Maximum Count Register"
|
|
if (0.<3.)
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "DMA0_CTRL2,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (0==3.)
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "DMA0_CTRL2,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x80+0x18)++0x1
|
|
line.word 0x00 "DMA0_SOCURRH2,Current Source Address High"
|
|
rgroup.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "DMA0_SOCURRL2,Current Source Address Low"
|
|
rgroup.word (0x80+0x20)++0x1
|
|
line.word 0x00 "DMA0_DECURRH2,Current Destination Address High"
|
|
rgroup.word (0x80+0x24)++0x1
|
|
line.word 0x00 "DMA0_DECURRL2,Current Destination Address Low"
|
|
rgroup.word (0x80+0x28)++0x1
|
|
line.word 0x00 "DMA0_TCNT2,Terminal Counter Register"
|
|
group.word (0x80+0x2c)++0x1
|
|
line.word 0x00 "DMA0_LUBuff2,Last Used Buffer Location 2 Register"
|
|
group.word 0xC0++0x1 "Stream 3"
|
|
line.word 0x00 "DMA0_SOURCEL3,Source Base Address Low Register"
|
|
group.word (0xC0+0x04)++0x1
|
|
line.word 0x00 "DMA0_SOURCEH3,Source Base Address High Register"
|
|
group.word (0xC0+0x08)++0x1
|
|
line.word 0x00 "DMA0_DESTL3,Destination Base Address Low Register"
|
|
group.word (0xC0+0x0c)++0x1
|
|
line.word 0x00 "DMA0_DESTH3,Destination Base Address High Register"
|
|
group.word (0xC0+0x10)++0x1
|
|
line.word 0x00 "DMA0_MAX3,Maximum Count Register"
|
|
if (0.<3.)
|
|
group.word (0xC0+0x14)++0x1
|
|
line.word 0x00 "DMA0_CTRL3,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (0==3.)
|
|
group.word (0xC0+0x14)++0x1
|
|
line.word 0x00 "DMA0_CTRL3,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0xC0+0x18)++0x1
|
|
line.word 0x00 "DMA0_SOCURRH3,Current Source Address High"
|
|
rgroup.word (0xC0+0x1c)++0x1
|
|
line.word 0x00 "DMA0_SOCURRL3,Current Source Address Low"
|
|
rgroup.word (0xC0+0x20)++0x1
|
|
line.word 0x00 "DMA0_DECURRH3,Current Destination Address High"
|
|
rgroup.word (0xC0+0x24)++0x1
|
|
line.word 0x00 "DMA0_DECURRL3,Current Destination Address Low"
|
|
rgroup.word (0xC0+0x28)++0x1
|
|
line.word 0x00 "DMA0_TCNT3,Terminal Counter Register"
|
|
group.word (0xC0+0x2c)++0x1
|
|
line.word 0x00 "DMA0_LUBuff3,Last Used Buffer Location 3 Register"
|
|
width 15.
|
|
group.word 0xf0++0x1 "Common"
|
|
line.word 0x00 "DMA0_MASK,Interrupt Mask Register"
|
|
bitfld.word 0x00 7. " SEM3 ,Stream 3 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " SEM2 ,Stream 2 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " SEM1 ,Stream 1 Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SEM0 ,Stream 0 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 3. " SIM3 ,Stream 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 2. " SIM2 ,Stream 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SIM1 ,Stream 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 0. " SIM0 ,Stream 0 Interrupt Mask" "Masked,Not masked"
|
|
wgroup.word 0xf4++0x1
|
|
line.word 0x00 "DMA0_CLR,Interrupt Clear Register"
|
|
bitfld.word 0x00 7. " SEC3 ,Stream 3 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SEC2 ,Stream 2 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SEC1 ,Stream 1 Error Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SEC0 ,Stream 0 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 3. " SIC3 ,Stream 3 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 2. " SIC2 ,Stream 2 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SIC1 ,Stream 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 0. " SIC0 ,Stream 0 Interrupt Clear" "No effect,Cleared"
|
|
rgroup.word 0xf8++0x1
|
|
line.word 0x00 "DMA0_STATUS,Interrupt Status Register"
|
|
bitfld.word 0x00 11. " ACT3 ,Data stream 3 status" "Not active,Active"
|
|
bitfld.word 0x00 10. " ACT2 ,Data stream 2 status" "Not active,Active"
|
|
bitfld.word 0x00 9. " ACT1 ,Data stream 1 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x00 8. " ACT0 ,Data stream 0 status" "Not active,Active"
|
|
eventfld.word 0x00 7. " ERR3 ,Data stream 3 error flag" "No error,Error"
|
|
eventfld.word 0x00 6. " ERR2 ,Data stream 2 error flag" "No error,Error"
|
|
textline " "
|
|
eventfld.word 0x00 5. " ERR1 ,Data stream 1 error flag" "No error,Error"
|
|
eventfld.word 0x00 4. " ERR0 ,Data stream 0 error flag" "No error,Error"
|
|
eventfld.word 0x00 3. " INT3 ,Data stream 3 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.word 0x00 2. " INT2 ,Data stream 2 interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.word 0x00 1. " INT1 ,Data stream 1 interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.word 0x00 0. " INT0 ,Data stream 0 interrupt flag" "No interrupt,Interrupt"
|
|
group.word 0xfc++0x1
|
|
line.word 0x00 "DMA0_LAST,Last Flag Register"
|
|
bitfld.word 0x00 3. " LAST3 ,LAST buffer sweep stream 3" "Continous,Last"
|
|
bitfld.word 0x00 2. " LAST2 ,LAST buffer sweep stream 2" "Continous,Last"
|
|
bitfld.word 0x00 1. " LAST1 ,LAST buffer sweep stream 1" "Continous,Last"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LAST0 ,LAST buffer sweep stream 0" "Continous,Last"
|
|
width 0xb
|
|
tree.end
|
|
tree "DMA 1"
|
|
base ad:0xfffff100
|
|
width 15.
|
|
group.word 0x0++0x1 "Stream 0"
|
|
line.word 0x00 "DMA1_SOURCEL0,Source Base Address Low Register"
|
|
group.word (0x0+0x04)++0x1
|
|
line.word 0x00 "DMA1_SOURCEH0,Source Base Address High Register"
|
|
group.word (0x0+0x08)++0x1
|
|
line.word 0x00 "DMA1_DESTL0,Destination Base Address Low Register"
|
|
group.word (0x0+0x0c)++0x1
|
|
line.word 0x00 "DMA1_DESTH0,Destination Base Address High Register"
|
|
group.word (0x0+0x10)++0x1
|
|
line.word 0x00 "DMA1_MAX0,Maximum Count Register"
|
|
if (1.<3.)
|
|
group.word (0x0+0x14)++0x1
|
|
line.word 0x00 "DMA1_CTRL0,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (1==3.)
|
|
group.word (0x0+0x14)++0x1
|
|
line.word 0x00 "DMA1_CTRL0,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x0+0x18)++0x1
|
|
line.word 0x00 "DMA1_SOCURRH0,Current Source Address High"
|
|
rgroup.word (0x0+0x1c)++0x1
|
|
line.word 0x00 "DMA1_SOCURRL0,Current Source Address Low"
|
|
rgroup.word (0x0+0x20)++0x1
|
|
line.word 0x00 "DMA1_DECURRH0,Current Destination Address High"
|
|
rgroup.word (0x0+0x24)++0x1
|
|
line.word 0x00 "DMA1_DECURRL0,Current Destination Address Low"
|
|
rgroup.word (0x0+0x28)++0x1
|
|
line.word 0x00 "DMA1_TCNT0,Terminal Counter Register"
|
|
group.word (0x0+0x2c)++0x1
|
|
line.word 0x00 "DMA1_LUBuff0,Last Used Buffer Location 0 Register"
|
|
group.word 0x40++0x1 "Stream 1"
|
|
line.word 0x00 "DMA1_SOURCEL1,Source Base Address Low Register"
|
|
group.word (0x40+0x04)++0x1
|
|
line.word 0x00 "DMA1_SOURCEH1,Source Base Address High Register"
|
|
group.word (0x40+0x08)++0x1
|
|
line.word 0x00 "DMA1_DESTL1,Destination Base Address Low Register"
|
|
group.word (0x40+0x0c)++0x1
|
|
line.word 0x00 "DMA1_DESTH1,Destination Base Address High Register"
|
|
group.word (0x40+0x10)++0x1
|
|
line.word 0x00 "DMA1_MAX1,Maximum Count Register"
|
|
if (1.<3.)
|
|
group.word (0x40+0x14)++0x1
|
|
line.word 0x00 "DMA1_CTRL1,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (1==3.)
|
|
group.word (0x40+0x14)++0x1
|
|
line.word 0x00 "DMA1_CTRL1,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x40+0x18)++0x1
|
|
line.word 0x00 "DMA1_SOCURRH1,Current Source Address High"
|
|
rgroup.word (0x40+0x1c)++0x1
|
|
line.word 0x00 "DMA1_SOCURRL1,Current Source Address Low"
|
|
rgroup.word (0x40+0x20)++0x1
|
|
line.word 0x00 "DMA1_DECURRH1,Current Destination Address High"
|
|
rgroup.word (0x40+0x24)++0x1
|
|
line.word 0x00 "DMA1_DECURRL1,Current Destination Address Low"
|
|
rgroup.word (0x40+0x28)++0x1
|
|
line.word 0x00 "DMA1_TCNT1,Terminal Counter Register"
|
|
group.word (0x40+0x2c)++0x1
|
|
line.word 0x00 "DMA1_LUBuff1,Last Used Buffer Location 1 Register"
|
|
group.word 0x80++0x1 "Stream 2"
|
|
line.word 0x00 "DMA1_SOURCEL2,Source Base Address Low Register"
|
|
group.word (0x80+0x04)++0x1
|
|
line.word 0x00 "DMA1_SOURCEH2,Source Base Address High Register"
|
|
group.word (0x80+0x08)++0x1
|
|
line.word 0x00 "DMA1_DESTL2,Destination Base Address Low Register"
|
|
group.word (0x80+0x0c)++0x1
|
|
line.word 0x00 "DMA1_DESTH2,Destination Base Address High Register"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "DMA1_MAX2,Maximum Count Register"
|
|
if (1.<3.)
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "DMA1_CTRL2,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (1==3.)
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "DMA1_CTRL2,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x80+0x18)++0x1
|
|
line.word 0x00 "DMA1_SOCURRH2,Current Source Address High"
|
|
rgroup.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "DMA1_SOCURRL2,Current Source Address Low"
|
|
rgroup.word (0x80+0x20)++0x1
|
|
line.word 0x00 "DMA1_DECURRH2,Current Destination Address High"
|
|
rgroup.word (0x80+0x24)++0x1
|
|
line.word 0x00 "DMA1_DECURRL2,Current Destination Address Low"
|
|
rgroup.word (0x80+0x28)++0x1
|
|
line.word 0x00 "DMA1_TCNT2,Terminal Counter Register"
|
|
group.word (0x80+0x2c)++0x1
|
|
line.word 0x00 "DMA1_LUBuff2,Last Used Buffer Location 2 Register"
|
|
group.word 0xC0++0x1 "Stream 3"
|
|
line.word 0x00 "DMA1_SOURCEL3,Source Base Address Low Register"
|
|
group.word (0xC0+0x04)++0x1
|
|
line.word 0x00 "DMA1_SOURCEH3,Source Base Address High Register"
|
|
group.word (0xC0+0x08)++0x1
|
|
line.word 0x00 "DMA1_DESTL3,Destination Base Address Low Register"
|
|
group.word (0xC0+0x0c)++0x1
|
|
line.word 0x00 "DMA1_DESTH3,Destination Base Address High Register"
|
|
group.word (0xC0+0x10)++0x1
|
|
line.word 0x00 "DMA1_MAX3,Maximum Count Register"
|
|
if (1.<3.)
|
|
group.word (0xC0+0x14)++0x1
|
|
line.word 0x00 "DMA1_CTRL3,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (1==3.)
|
|
group.word (0xC0+0x14)++0x1
|
|
line.word 0x00 "DMA1_CTRL3,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0xC0+0x18)++0x1
|
|
line.word 0x00 "DMA1_SOCURRH3,Current Source Address High"
|
|
rgroup.word (0xC0+0x1c)++0x1
|
|
line.word 0x00 "DMA1_SOCURRL3,Current Source Address Low"
|
|
rgroup.word (0xC0+0x20)++0x1
|
|
line.word 0x00 "DMA1_DECURRH3,Current Destination Address High"
|
|
rgroup.word (0xC0+0x24)++0x1
|
|
line.word 0x00 "DMA1_DECURRL3,Current Destination Address Low"
|
|
rgroup.word (0xC0+0x28)++0x1
|
|
line.word 0x00 "DMA1_TCNT3,Terminal Counter Register"
|
|
group.word (0xC0+0x2c)++0x1
|
|
line.word 0x00 "DMA1_LUBuff3,Last Used Buffer Location 3 Register"
|
|
width 15.
|
|
group.word 0xf0++0x1 "Common"
|
|
line.word 0x00 "DMA1_MASK,Interrupt Mask Register"
|
|
bitfld.word 0x00 7. " SEM3 ,Stream 3 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " SEM2 ,Stream 2 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " SEM1 ,Stream 1 Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SEM0 ,Stream 0 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 3. " SIM3 ,Stream 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 2. " SIM2 ,Stream 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SIM1 ,Stream 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 0. " SIM0 ,Stream 0 Interrupt Mask" "Masked,Not masked"
|
|
wgroup.word 0xf4++0x1
|
|
line.word 0x00 "DMA1_CLR,Interrupt Clear Register"
|
|
bitfld.word 0x00 7. " SEC3 ,Stream 3 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SEC2 ,Stream 2 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SEC1 ,Stream 1 Error Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SEC0 ,Stream 0 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 3. " SIC3 ,Stream 3 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 2. " SIC2 ,Stream 2 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SIC1 ,Stream 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 0. " SIC0 ,Stream 0 Interrupt Clear" "No effect,Cleared"
|
|
rgroup.word 0xf8++0x1
|
|
line.word 0x00 "DMA1_STATUS,Interrupt Status Register"
|
|
bitfld.word 0x00 11. " ACT3 ,Data stream 3 status" "Not active,Active"
|
|
bitfld.word 0x00 10. " ACT2 ,Data stream 2 status" "Not active,Active"
|
|
bitfld.word 0x00 9. " ACT1 ,Data stream 1 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x00 8. " ACT0 ,Data stream 0 status" "Not active,Active"
|
|
eventfld.word 0x00 7. " ERR3 ,Data stream 3 error flag" "No error,Error"
|
|
eventfld.word 0x00 6. " ERR2 ,Data stream 2 error flag" "No error,Error"
|
|
textline " "
|
|
eventfld.word 0x00 5. " ERR1 ,Data stream 1 error flag" "No error,Error"
|
|
eventfld.word 0x00 4. " ERR0 ,Data stream 0 error flag" "No error,Error"
|
|
eventfld.word 0x00 3. " INT3 ,Data stream 3 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.word 0x00 2. " INT2 ,Data stream 2 interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.word 0x00 1. " INT1 ,Data stream 1 interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.word 0x00 0. " INT0 ,Data stream 0 interrupt flag" "No interrupt,Interrupt"
|
|
group.word 0xfc++0x1
|
|
line.word 0x00 "DMA1_LAST,Last Flag Register"
|
|
bitfld.word 0x00 3. " LAST3 ,LAST buffer sweep stream 3" "Continous,Last"
|
|
bitfld.word 0x00 2. " LAST2 ,LAST buffer sweep stream 2" "Continous,Last"
|
|
bitfld.word 0x00 1. " LAST1 ,LAST buffer sweep stream 1" "Continous,Last"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LAST0 ,LAST buffer sweep stream 0" "Continous,Last"
|
|
width 0xb
|
|
tree.end
|
|
tree "DMA 2"
|
|
base ad:0xfffff200
|
|
width 15.
|
|
group.word 0x0++0x1 "Stream 0"
|
|
line.word 0x00 "DMA2_SOURCEL0,Source Base Address Low Register"
|
|
group.word (0x0+0x04)++0x1
|
|
line.word 0x00 "DMA2_SOURCEH0,Source Base Address High Register"
|
|
group.word (0x0+0x08)++0x1
|
|
line.word 0x00 "DMA2_DESTL0,Destination Base Address Low Register"
|
|
group.word (0x0+0x0c)++0x1
|
|
line.word 0x00 "DMA2_DESTH0,Destination Base Address High Register"
|
|
group.word (0x0+0x10)++0x1
|
|
line.word 0x00 "DMA2_MAX0,Maximum Count Register"
|
|
if (2.<3.)
|
|
group.word (0x0+0x14)++0x1
|
|
line.word 0x00 "DMA2_CTRL0,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (2==3.)
|
|
group.word (0x0+0x14)++0x1
|
|
line.word 0x00 "DMA2_CTRL0,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x0+0x18)++0x1
|
|
line.word 0x00 "DMA2_SOCURRH0,Current Source Address High"
|
|
rgroup.word (0x0+0x1c)++0x1
|
|
line.word 0x00 "DMA2_SOCURRL0,Current Source Address Low"
|
|
rgroup.word (0x0+0x20)++0x1
|
|
line.word 0x00 "DMA2_DECURRH0,Current Destination Address High"
|
|
rgroup.word (0x0+0x24)++0x1
|
|
line.word 0x00 "DMA2_DECURRL0,Current Destination Address Low"
|
|
rgroup.word (0x0+0x28)++0x1
|
|
line.word 0x00 "DMA2_TCNT0,Terminal Counter Register"
|
|
group.word (0x0+0x2c)++0x1
|
|
line.word 0x00 "DMA2_LUBuff0,Last Used Buffer Location 0 Register"
|
|
group.word 0x40++0x1 "Stream 1"
|
|
line.word 0x00 "DMA2_SOURCEL1,Source Base Address Low Register"
|
|
group.word (0x40+0x04)++0x1
|
|
line.word 0x00 "DMA2_SOURCEH1,Source Base Address High Register"
|
|
group.word (0x40+0x08)++0x1
|
|
line.word 0x00 "DMA2_DESTL1,Destination Base Address Low Register"
|
|
group.word (0x40+0x0c)++0x1
|
|
line.word 0x00 "DMA2_DESTH1,Destination Base Address High Register"
|
|
group.word (0x40+0x10)++0x1
|
|
line.word 0x00 "DMA2_MAX1,Maximum Count Register"
|
|
if (2.<3.)
|
|
group.word (0x40+0x14)++0x1
|
|
line.word 0x00 "DMA2_CTRL1,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (2==3.)
|
|
group.word (0x40+0x14)++0x1
|
|
line.word 0x00 "DMA2_CTRL1,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x40+0x18)++0x1
|
|
line.word 0x00 "DMA2_SOCURRH1,Current Source Address High"
|
|
rgroup.word (0x40+0x1c)++0x1
|
|
line.word 0x00 "DMA2_SOCURRL1,Current Source Address Low"
|
|
rgroup.word (0x40+0x20)++0x1
|
|
line.word 0x00 "DMA2_DECURRH1,Current Destination Address High"
|
|
rgroup.word (0x40+0x24)++0x1
|
|
line.word 0x00 "DMA2_DECURRL1,Current Destination Address Low"
|
|
rgroup.word (0x40+0x28)++0x1
|
|
line.word 0x00 "DMA2_TCNT1,Terminal Counter Register"
|
|
group.word (0x40+0x2c)++0x1
|
|
line.word 0x00 "DMA2_LUBuff1,Last Used Buffer Location 1 Register"
|
|
group.word 0x80++0x1 "Stream 2"
|
|
line.word 0x00 "DMA2_SOURCEL2,Source Base Address Low Register"
|
|
group.word (0x80+0x04)++0x1
|
|
line.word 0x00 "DMA2_SOURCEH2,Source Base Address High Register"
|
|
group.word (0x80+0x08)++0x1
|
|
line.word 0x00 "DMA2_DESTL2,Destination Base Address Low Register"
|
|
group.word (0x80+0x0c)++0x1
|
|
line.word 0x00 "DMA2_DESTH2,Destination Base Address High Register"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "DMA2_MAX2,Maximum Count Register"
|
|
if (2.<3.)
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "DMA2_CTRL2,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (2==3.)
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "DMA2_CTRL2,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x80+0x18)++0x1
|
|
line.word 0x00 "DMA2_SOCURRH2,Current Source Address High"
|
|
rgroup.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "DMA2_SOCURRL2,Current Source Address Low"
|
|
rgroup.word (0x80+0x20)++0x1
|
|
line.word 0x00 "DMA2_DECURRH2,Current Destination Address High"
|
|
rgroup.word (0x80+0x24)++0x1
|
|
line.word 0x00 "DMA2_DECURRL2,Current Destination Address Low"
|
|
rgroup.word (0x80+0x28)++0x1
|
|
line.word 0x00 "DMA2_TCNT2,Terminal Counter Register"
|
|
group.word (0x80+0x2c)++0x1
|
|
line.word 0x00 "DMA2_LUBuff2,Last Used Buffer Location 2 Register"
|
|
group.word 0xC0++0x1 "Stream 3"
|
|
line.word 0x00 "DMA2_SOURCEL3,Source Base Address Low Register"
|
|
group.word (0xC0+0x04)++0x1
|
|
line.word 0x00 "DMA2_SOURCEH3,Source Base Address High Register"
|
|
group.word (0xC0+0x08)++0x1
|
|
line.word 0x00 "DMA2_DESTL3,Destination Base Address Low Register"
|
|
group.word (0xC0+0x0c)++0x1
|
|
line.word 0x00 "DMA2_DESTH3,Destination Base Address High Register"
|
|
group.word (0xC0+0x10)++0x1
|
|
line.word 0x00 "DMA2_MAX3,Maximum Count Register"
|
|
if (2.<3.)
|
|
group.word (0xC0+0x14)++0x1
|
|
line.word 0x00 "DMA2_CTRL3,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (2==3.)
|
|
group.word (0xC0+0x14)++0x1
|
|
line.word 0x00 "DMA2_CTRL3,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0xC0+0x18)++0x1
|
|
line.word 0x00 "DMA2_SOCURRH3,Current Source Address High"
|
|
rgroup.word (0xC0+0x1c)++0x1
|
|
line.word 0x00 "DMA2_SOCURRL3,Current Source Address Low"
|
|
rgroup.word (0xC0+0x20)++0x1
|
|
line.word 0x00 "DMA2_DECURRH3,Current Destination Address High"
|
|
rgroup.word (0xC0+0x24)++0x1
|
|
line.word 0x00 "DMA2_DECURRL3,Current Destination Address Low"
|
|
rgroup.word (0xC0+0x28)++0x1
|
|
line.word 0x00 "DMA2_TCNT3,Terminal Counter Register"
|
|
group.word (0xC0+0x2c)++0x1
|
|
line.word 0x00 "DMA2_LUBuff3,Last Used Buffer Location 3 Register"
|
|
width 15.
|
|
group.word 0xf0++0x1 "Common"
|
|
line.word 0x00 "DMA2_MASK,Interrupt Mask Register"
|
|
bitfld.word 0x00 7. " SEM3 ,Stream 3 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " SEM2 ,Stream 2 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " SEM1 ,Stream 1 Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SEM0 ,Stream 0 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 3. " SIM3 ,Stream 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 2. " SIM2 ,Stream 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SIM1 ,Stream 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 0. " SIM0 ,Stream 0 Interrupt Mask" "Masked,Not masked"
|
|
wgroup.word 0xf4++0x1
|
|
line.word 0x00 "DMA2_CLR,Interrupt Clear Register"
|
|
bitfld.word 0x00 7. " SEC3 ,Stream 3 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SEC2 ,Stream 2 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SEC1 ,Stream 1 Error Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SEC0 ,Stream 0 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 3. " SIC3 ,Stream 3 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 2. " SIC2 ,Stream 2 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SIC1 ,Stream 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 0. " SIC0 ,Stream 0 Interrupt Clear" "No effect,Cleared"
|
|
rgroup.word 0xf8++0x1
|
|
line.word 0x00 "DMA2_STATUS,Interrupt Status Register"
|
|
bitfld.word 0x00 11. " ACT3 ,Data stream 3 status" "Not active,Active"
|
|
bitfld.word 0x00 10. " ACT2 ,Data stream 2 status" "Not active,Active"
|
|
bitfld.word 0x00 9. " ACT1 ,Data stream 1 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x00 8. " ACT0 ,Data stream 0 status" "Not active,Active"
|
|
eventfld.word 0x00 7. " ERR3 ,Data stream 3 error flag" "No error,Error"
|
|
eventfld.word 0x00 6. " ERR2 ,Data stream 2 error flag" "No error,Error"
|
|
textline " "
|
|
eventfld.word 0x00 5. " ERR1 ,Data stream 1 error flag" "No error,Error"
|
|
eventfld.word 0x00 4. " ERR0 ,Data stream 0 error flag" "No error,Error"
|
|
eventfld.word 0x00 3. " INT3 ,Data stream 3 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.word 0x00 2. " INT2 ,Data stream 2 interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.word 0x00 1. " INT1 ,Data stream 1 interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.word 0x00 0. " INT0 ,Data stream 0 interrupt flag" "No interrupt,Interrupt"
|
|
group.word 0xfc++0x1
|
|
line.word 0x00 "DMA2_LAST,Last Flag Register"
|
|
bitfld.word 0x00 3. " LAST3 ,LAST buffer sweep stream 3" "Continous,Last"
|
|
bitfld.word 0x00 2. " LAST2 ,LAST buffer sweep stream 2" "Continous,Last"
|
|
bitfld.word 0x00 1. " LAST1 ,LAST buffer sweep stream 1" "Continous,Last"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LAST0 ,LAST buffer sweep stream 0" "Continous,Last"
|
|
width 0xb
|
|
tree.end
|
|
tree "DMA 3"
|
|
base ad:0xfffff300
|
|
width 15.
|
|
group.word 0x0++0x1 "Stream 0"
|
|
line.word 0x00 "DMA3_SOURCEL0,Source Base Address Low Register"
|
|
group.word (0x0+0x04)++0x1
|
|
line.word 0x00 "DMA3_SOURCEH0,Source Base Address High Register"
|
|
group.word (0x0+0x08)++0x1
|
|
line.word 0x00 "DMA3_DESTL0,Destination Base Address Low Register"
|
|
group.word (0x0+0x0c)++0x1
|
|
line.word 0x00 "DMA3_DESTH0,Destination Base Address High Register"
|
|
group.word (0x0+0x10)++0x1
|
|
line.word 0x00 "DMA3_MAX0,Maximum Count Register"
|
|
if (3.<3.)
|
|
group.word (0x0+0x14)++0x1
|
|
line.word 0x00 "DMA3_CTRL0,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (3==3.)
|
|
group.word (0x0+0x14)++0x1
|
|
line.word 0x00 "DMA3_CTRL0,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x0+0x18)++0x1
|
|
line.word 0x00 "DMA3_SOCURRH0,Current Source Address High"
|
|
rgroup.word (0x0+0x1c)++0x1
|
|
line.word 0x00 "DMA3_SOCURRL0,Current Source Address Low"
|
|
rgroup.word (0x0+0x20)++0x1
|
|
line.word 0x00 "DMA3_DECURRH0,Current Destination Address High"
|
|
rgroup.word (0x0+0x24)++0x1
|
|
line.word 0x00 "DMA3_DECURRL0,Current Destination Address Low"
|
|
rgroup.word (0x0+0x28)++0x1
|
|
line.word 0x00 "DMA3_TCNT0,Terminal Counter Register"
|
|
group.word (0x0+0x2c)++0x1
|
|
line.word 0x00 "DMA3_LUBuff0,Last Used Buffer Location 0 Register"
|
|
group.word 0x40++0x1 "Stream 1"
|
|
line.word 0x00 "DMA3_SOURCEL1,Source Base Address Low Register"
|
|
group.word (0x40+0x04)++0x1
|
|
line.word 0x00 "DMA3_SOURCEH1,Source Base Address High Register"
|
|
group.word (0x40+0x08)++0x1
|
|
line.word 0x00 "DMA3_DESTL1,Destination Base Address Low Register"
|
|
group.word (0x40+0x0c)++0x1
|
|
line.word 0x00 "DMA3_DESTH1,Destination Base Address High Register"
|
|
group.word (0x40+0x10)++0x1
|
|
line.word 0x00 "DMA3_MAX1,Maximum Count Register"
|
|
if (3.<3.)
|
|
group.word (0x40+0x14)++0x1
|
|
line.word 0x00 "DMA3_CTRL1,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (3==3.)
|
|
group.word (0x40+0x14)++0x1
|
|
line.word 0x00 "DMA3_CTRL1,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x40+0x18)++0x1
|
|
line.word 0x00 "DMA3_SOCURRH1,Current Source Address High"
|
|
rgroup.word (0x40+0x1c)++0x1
|
|
line.word 0x00 "DMA3_SOCURRL1,Current Source Address Low"
|
|
rgroup.word (0x40+0x20)++0x1
|
|
line.word 0x00 "DMA3_DECURRH1,Current Destination Address High"
|
|
rgroup.word (0x40+0x24)++0x1
|
|
line.word 0x00 "DMA3_DECURRL1,Current Destination Address Low"
|
|
rgroup.word (0x40+0x28)++0x1
|
|
line.word 0x00 "DMA3_TCNT1,Terminal Counter Register"
|
|
group.word (0x40+0x2c)++0x1
|
|
line.word 0x00 "DMA3_LUBuff1,Last Used Buffer Location 1 Register"
|
|
group.word 0x80++0x1 "Stream 2"
|
|
line.word 0x00 "DMA3_SOURCEL2,Source Base Address Low Register"
|
|
group.word (0x80+0x04)++0x1
|
|
line.word 0x00 "DMA3_SOURCEH2,Source Base Address High Register"
|
|
group.word (0x80+0x08)++0x1
|
|
line.word 0x00 "DMA3_DESTL2,Destination Base Address Low Register"
|
|
group.word (0x80+0x0c)++0x1
|
|
line.word 0x00 "DMA3_DESTH2,Destination Base Address High Register"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "DMA3_MAX2,Maximum Count Register"
|
|
if (3.<3.)
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "DMA3_CTRL2,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (3==3.)
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "DMA3_CTRL2,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0x80+0x18)++0x1
|
|
line.word 0x00 "DMA3_SOCURRH2,Current Source Address High"
|
|
rgroup.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "DMA3_SOCURRL2,Current Source Address Low"
|
|
rgroup.word (0x80+0x20)++0x1
|
|
line.word 0x00 "DMA3_DECURRH2,Current Destination Address High"
|
|
rgroup.word (0x80+0x24)++0x1
|
|
line.word 0x00 "DMA3_DECURRL2,Current Destination Address Low"
|
|
rgroup.word (0x80+0x28)++0x1
|
|
line.word 0x00 "DMA3_TCNT2,Terminal Counter Register"
|
|
group.word (0x80+0x2c)++0x1
|
|
line.word 0x00 "DMA3_LUBuff2,Last Used Buffer Location 2 Register"
|
|
group.word 0xC0++0x1 "Stream 3"
|
|
line.word 0x00 "DMA3_SOURCEL3,Source Base Address Low Register"
|
|
group.word (0xC0+0x04)++0x1
|
|
line.word 0x00 "DMA3_SOURCEH3,Source Base Address High Register"
|
|
group.word (0xC0+0x08)++0x1
|
|
line.word 0x00 "DMA3_DESTL3,Destination Base Address Low Register"
|
|
group.word (0xC0+0x0c)++0x1
|
|
line.word 0x00 "DMA3_DESTH3,Destination Base Address High Register"
|
|
group.word (0xC0+0x10)++0x1
|
|
line.word 0x00 "DMA3_MAX3,Maximum Count Register"
|
|
if (3.<3.)
|
|
group.word (0xC0+0x14)++0x1
|
|
line.word 0x00 "DMA3_CTRL3,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
textline " "
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
elif (3==3.)
|
|
group.word (0xC0+0x14)++0x1
|
|
line.word 0x00 "DMA3_CTRL3,Control Register"
|
|
bitfld.word 0x00 13. " DIR ,Direction transfer" "Source,Destination"
|
|
bitfld.word 0x00 11. " MEM2MEM ,Selects memory to memory trafnser" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CIRCULAR ,Circular mode" "Normal,Circular"
|
|
bitfld.word 0x00 7.--8. " DESIZE ,DMA to destination data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " SOBURST ,DMA peripheral burst size" "Single,4 incrementing,8 incrementing,16 incrementing"
|
|
bitfld.word 0x00 3.--4. " SOSIZE ,Source to DMA data width" "Byte,Half-word,Word,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " DEINC ,Increment Current Destination Register" "Unchanged,Incremented"
|
|
bitfld.word 0x00 1. " SOINC ,Increment Current Source Register" "Unchanged,Incremented"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE ,DMA enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word (0xC0+0x18)++0x1
|
|
line.word 0x00 "DMA3_SOCURRH3,Current Source Address High"
|
|
rgroup.word (0xC0+0x1c)++0x1
|
|
line.word 0x00 "DMA3_SOCURRL3,Current Source Address Low"
|
|
rgroup.word (0xC0+0x20)++0x1
|
|
line.word 0x00 "DMA3_DECURRH3,Current Destination Address High"
|
|
rgroup.word (0xC0+0x24)++0x1
|
|
line.word 0x00 "DMA3_DECURRL3,Current Destination Address Low"
|
|
rgroup.word (0xC0+0x28)++0x1
|
|
line.word 0x00 "DMA3_TCNT3,Terminal Counter Register"
|
|
group.word (0xC0+0x2c)++0x1
|
|
line.word 0x00 "DMA3_LUBuff3,Last Used Buffer Location 3 Register"
|
|
width 15.
|
|
group.word 0xf0++0x1 "Common"
|
|
line.word 0x00 "DMA3_MASK,Interrupt Mask Register"
|
|
bitfld.word 0x00 7. " SEM3 ,Stream 3 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " SEM2 ,Stream 2 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " SEM1 ,Stream 1 Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SEM0 ,Stream 0 Error Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 3. " SIM3 ,Stream 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 2. " SIM2 ,Stream 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SIM1 ,Stream 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.word 0x00 0. " SIM0 ,Stream 0 Interrupt Mask" "Masked,Not masked"
|
|
wgroup.word 0xf4++0x1
|
|
line.word 0x00 "DMA3_CLR,Interrupt Clear Register"
|
|
bitfld.word 0x00 7. " SEC3 ,Stream 3 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SEC2 ,Stream 2 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SEC1 ,Stream 1 Error Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SEC0 ,Stream 0 Error Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 3. " SIC3 ,Stream 3 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 2. " SIC2 ,Stream 2 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SIC1 ,Stream 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 0. " SIC0 ,Stream 0 Interrupt Clear" "No effect,Cleared"
|
|
rgroup.word 0xf8++0x1
|
|
line.word 0x00 "DMA3_STATUS,Interrupt Status Register"
|
|
bitfld.word 0x00 11. " ACT3 ,Data stream 3 status" "Not active,Active"
|
|
bitfld.word 0x00 10. " ACT2 ,Data stream 2 status" "Not active,Active"
|
|
bitfld.word 0x00 9. " ACT1 ,Data stream 1 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x00 8. " ACT0 ,Data stream 0 status" "Not active,Active"
|
|
eventfld.word 0x00 7. " ERR3 ,Data stream 3 error flag" "No error,Error"
|
|
eventfld.word 0x00 6. " ERR2 ,Data stream 2 error flag" "No error,Error"
|
|
textline " "
|
|
eventfld.word 0x00 5. " ERR1 ,Data stream 1 error flag" "No error,Error"
|
|
eventfld.word 0x00 4. " ERR0 ,Data stream 0 error flag" "No error,Error"
|
|
eventfld.word 0x00 3. " INT3 ,Data stream 3 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.word 0x00 2. " INT2 ,Data stream 2 interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.word 0x00 1. " INT1 ,Data stream 1 interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.word 0x00 0. " INT0 ,Data stream 0 interrupt flag" "No interrupt,Interrupt"
|
|
group.word 0xfc++0x1
|
|
line.word 0x00 "DMA3_LAST,Last Flag Register"
|
|
bitfld.word 0x00 3. " LAST3 ,LAST buffer sweep stream 3" "Continous,Last"
|
|
bitfld.word 0x00 2. " LAST2 ,LAST buffer sweep stream 2" "Continous,Last"
|
|
bitfld.word 0x00 1. " LAST1 ,LAST buffer sweep stream 1" "Continous,Last"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LAST0 ,LAST buffer sweep stream 0" "Continous,Last"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "ARB (Native Bus Arbiter)"
|
|
base ad:0x20000000
|
|
width 11.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "ARB_TOR,Time-Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,DMA TimeOut Value"
|
|
line.long 0x04 "ARB_PRIOR,Priority Register"
|
|
bitfld.long 0x04 0.--1. " PRIORITY ,DMA Priority" "Lowest,Reserved,Reserved,Highest"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "ARB_CTLR,Control Register"
|
|
bitfld.long 0x00 1. " ABORT ,Native Bus Arbiter Abort Interrupt Pending" "Not aborted,Aborted"
|
|
width 0xb
|
|
tree.end
|
|
tree "WUT (Wake-Up Timer)"
|
|
base ad:0xffffa600
|
|
width 9.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "WUT_CR,Wake-up Timer Control Register"
|
|
bitfld.word 0x00 2. " EE ,EXT_CK Enable" "fMCLK,fRC"
|
|
bitfld.word 0x00 1. " SC ,Start Counting" "Stopped,Started"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "WUT_PR,Wake-up Timer Prescaler Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PR ,Prescaler Value"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "WUT_VR,Wake-up Timer Pre-load Value Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "WUT_CNT,Wake-up Timer Counter Register"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "WUT_SR,Wake-up Timer Status Register"
|
|
bitfld.word 0x00 3. " BSYVR ,Reload Value Register Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 2. " BSYPR ,Prescaler Register Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 1. " BSYCR ,Control Register Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0. " EC ,End of Count Pending" "Not occurred,Occurred"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "WUT_MR,Wake-up Timer Mask Register"
|
|
bitfld.word 0x00 1. " BSYMSK ,Busy Bit Mask" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ECM ,End of Count Mask" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "RTC (Real Time Clock)"
|
|
base ad:0xfffff400
|
|
width 10.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "RTC_CRH,RTC Control Register High"
|
|
bitfld.word 0x00 3. " GEN ,Global interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 2. " OWEN ,Overflow interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " AEN ,Alarm interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 0. " SEN ,Second interrupt enable" "Masked,Enabled"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "RTC_CRL,RTC Control Registr Low"
|
|
bitfld.word 0x00 5. " RTOFF ,RTC operation OFF" "Not terminated,Terminated"
|
|
bitfld.word 0x00 4. " CNF ,Configuration Flag" "Exited,Entered"
|
|
bitfld.word 0x00 3. " GIR ,Global Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OWIR ,Overflow Interrupt Request" "Not requested,Requested"
|
|
bitfld.word 0x00 1. " AIR ,Alarm Interrupt Request" "Not requested,Requested"
|
|
bitfld.word 0x00 0. " SIR ,Second Interrupt Request" "Not requested,Requested"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "RTC_PRLH,RTC Prescaler Load Register High"
|
|
bitfld.word 0x00 0.--3. " PRSL ,RTC Prescaler Reload Value High" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "RTC_PRLL,RTC Prescaler Load Register Low"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "RTC_DIVH,RTC Prescaler Divider Register High"
|
|
bitfld.word 0x00 0.--3. " DIV ,RTC Clock Divider High" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "RTC_DIVL,RTC Prescaler Divider Register Low"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "RTC_CNTH,RTC Counter Register High"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "RTC_CNTL,RTC Counter Register Low"
|
|
wgroup.word 0x20++0x1
|
|
line.word 0x00 "RTC_ALRH,RTC Alarm Register High"
|
|
wgroup.word 0x24++0x1
|
|
line.word 0x00 "RTC_ALRL,RTC Alarm Register Low"
|
|
width 0xb
|
|
tree.end
|
|
tree "WDG (Watchdog Timer)"
|
|
base ad:0xffffa400
|
|
width 9.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "WDG_CR,WDG Control Register"
|
|
bitfld.word 0x00 2. " EE ,EXT_CK Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " SC ,Start Counting" "Stopped,Started"
|
|
bitfld.word 0x00 0. " WE ,Watchdog Enable" "Timer,Watchdog"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "WDG_PR,WDG Prescaler Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. 1. " PR ,Prescaler Value"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "WDG_VR,WDG Preload Value Register"
|
|
rgroup.word 0x0c++0x1
|
|
line.word 0x00 "WDG_CNT,WDG Counter Register"
|
|
if (((d.w(d:(0xffffa400)))&0x1)==0x0)
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "WDG_SR,WDG Status Register"
|
|
bitfld.word 0x00 0. " EC ,End of Count Pending" "Not occurred,Occurred"
|
|
else
|
|
hgroup.word 0x10++0x1
|
|
hide.word 0x00 "WDG_SR,WDG Status Register"
|
|
endif
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "WDG_MR,WDG Mask Register"
|
|
bitfld.word 0x00 0. " ECM ,End of Count Mask" "Disabled,Enabled"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "WDG_KR,WDG Key Register"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "TB (Timebase Timer)"
|
|
tree "TB 0"
|
|
base ad:0xffff9800
|
|
width 9.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "TB0_CR,TB Timer Control Register"
|
|
bitfld.word 0x00 2. " EE ,External Clock Source Enable" "CK,ECT_CK"
|
|
bitfld.word 0x00 1. " SC ,Start Counting" "Stopped,Started"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "TB0_PR,TB Timer Prescaler Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PR ,Prescaler Value"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TB0_VR,Timer Pre-load Value Register"
|
|
rgroup.word 0x0c++0x1
|
|
line.word 0x00 "TB0_CNT,TB Timer Counter Register"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "TB0_SR,TB Timer Status Register"
|
|
bitfld.word 0x00 0. " EC ,End of Count Pending" "Not occurred,Occurred"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TB0_MR,TB Timer Mask Register"
|
|
bitfld.word 0x00 0. " ECM ,End of Count Mask" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TB 1"
|
|
base ad:0xffff9900
|
|
width 9.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "TB1_CR,TB Timer Control Register"
|
|
bitfld.word 0x00 2. " EE ,External Clock Source Enable" "CK,ECT_CK"
|
|
bitfld.word 0x00 1. " SC ,Start Counting" "Stopped,Started"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "TB1_PR,TB Timer Prescaler Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PR ,Prescaler Value"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TB1_VR,Timer Pre-load Value Register"
|
|
rgroup.word 0x0c++0x1
|
|
line.word 0x00 "TB1_CNT,TB Timer Counter Register"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "TB1_SR,TB Timer Status Register"
|
|
bitfld.word 0x00 0. " EC ,End of Count Pending" "Not occurred,Occurred"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TB1_MR,TB Timer Mask Register"
|
|
bitfld.word 0x00 0. " ECM ,End of Count Mask" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TB 2"
|
|
base ad:0xffff9a00
|
|
width 9.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "TB2_CR,TB Timer Control Register"
|
|
bitfld.word 0x00 2. " EE ,External Clock Source Enable" "CK,ECT_CK"
|
|
bitfld.word 0x00 1. " SC ,Start Counting" "Stopped,Started"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "TB2_PR,TB Timer Prescaler Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PR ,Prescaler Value"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TB2_VR,Timer Pre-load Value Register"
|
|
rgroup.word 0x0c++0x1
|
|
line.word 0x00 "TB2_CNT,TB Timer Counter Register"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "TB2_SR,TB Timer Status Register"
|
|
bitfld.word 0x00 0. " EC ,End of Count Pending" "Not occurred,Occurred"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TB2_MR,TB Timer Mask Register"
|
|
bitfld.word 0x00 0. " ECM ,End of Count Mask" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "TIM (Timer)"
|
|
tree "TIM 0"
|
|
base ad:0xffffa800
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM0_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM0_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM0_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM0_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM0_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM0_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM0_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM0_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIM 1"
|
|
base ad:0xffffac00
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM1_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM1_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM1_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM1_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM1_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM1_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM1_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM1_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIM 2"
|
|
base ad:0xffffe400
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM2_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM2_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM2_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM2_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM2_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM2_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM2_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIM 3"
|
|
base ad:0xffffe800
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM3_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM3_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM3_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM3_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM3_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM3_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM3_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIM 4"
|
|
base ad:0xffffec00
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM4_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM4_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM4_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM4_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM4_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM4_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM4_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM4_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIM 5"
|
|
base ad:0xffffb000
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM5_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM5_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM5_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM5_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM5_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM5_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM5_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM5_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
sif ((cpu()=="STR730")||(cpu()=="STR735"))
|
|
tree "TIM 6"
|
|
base ad:0xffffb080
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM6_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM6_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM6_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM6_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM6_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM6_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM6_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM6_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIM 7"
|
|
base ad:0xffffb100
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM7_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM7_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM7_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM7_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM7_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM7_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM7_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM7_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIM 8"
|
|
base ad:0xffffb180
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM8_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM8_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM8_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM8_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM8_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM8_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM8_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM8_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIM 9"
|
|
base ad:0xffffb200
|
|
width 11.
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "TIM9_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "TIM9_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM9_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "TIM9_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "TIM9_CNTR,Counter Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TIM9_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS[1:0] ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No effect,Forced"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No effect,Forced"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "GPIO,Enabled"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "GPIO,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling,Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling,Rising"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling,Rising"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM9_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "TIM9_SR,Status Register"
|
|
bitfld.word 0x00 15. " ICFA ,Input Capture Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare Flag A" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture Flag B" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare Flag B" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree.open "PWM (Pulse Width Modulator)"
|
|
tree "PWM 0"
|
|
base ad:0xffffd000
|
|
width 10.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM0_PRS0,Prescaler 0 Register"
|
|
bitfld.word 0x00 0.--2. " PR0[2:0] ,Prescaler 0 value" "1,2,4,8,16,32,64,128"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PWM0_PRS1,Prescaler 1 Register"
|
|
bitfld.word 0x00 0.--4. " PR1[4:0] ,Prescaler 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PWM0_PEN,PWM Enable Register"
|
|
bitfld.word 0x00 0. " PE ,PWM enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PWM0_PLS,PWM Output Polarity Level Selection Register"
|
|
bitfld.word 0x00 0. " PL ,PWM output level polarity" "Not inverted,Inverted"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PWM0_CPI,PWM Compare Period Interrupt"
|
|
bitfld.word 0x00 0. " CP ,PWM compare period interrupt" "No interrupt,Interrupt"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "PWM0_IM,PWM Interrupt Mask Register"
|
|
bitfld.word 0x00 0. " IM ,PWM interrupt mask" "Disabled,Enabled"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "PWM0_DUT,PWM Output Duty Register"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "PWM0_PER,PWM Output Period Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM 1"
|
|
base ad:0xffffd040
|
|
width 10.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM1_PRS0,Prescaler 0 Register"
|
|
bitfld.word 0x00 0.--2. " PR0[2:0] ,Prescaler 0 value" "1,2,4,8,16,32,64,128"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PWM1_PRS1,Prescaler 1 Register"
|
|
bitfld.word 0x00 0.--4. " PR1[4:0] ,Prescaler 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PWM1_PEN,PWM Enable Register"
|
|
bitfld.word 0x00 0. " PE ,PWM enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PWM1_PLS,PWM Output Polarity Level Selection Register"
|
|
bitfld.word 0x00 0. " PL ,PWM output level polarity" "Not inverted,Inverted"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PWM1_CPI,PWM Compare Period Interrupt"
|
|
bitfld.word 0x00 0. " CP ,PWM compare period interrupt" "No interrupt,Interrupt"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "PWM1_IM,PWM Interrupt Mask Register"
|
|
bitfld.word 0x00 0. " IM ,PWM interrupt mask" "Disabled,Enabled"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "PWM1_DUT,PWM Output Duty Register"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "PWM1_PER,PWM Output Period Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM 2"
|
|
base ad:0xffffd080
|
|
width 10.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM2_PRS0,Prescaler 0 Register"
|
|
bitfld.word 0x00 0.--2. " PR0[2:0] ,Prescaler 0 value" "1,2,4,8,16,32,64,128"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PWM2_PRS1,Prescaler 1 Register"
|
|
bitfld.word 0x00 0.--4. " PR1[4:0] ,Prescaler 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PWM2_PEN,PWM Enable Register"
|
|
bitfld.word 0x00 0. " PE ,PWM enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PWM2_PLS,PWM Output Polarity Level Selection Register"
|
|
bitfld.word 0x00 0. " PL ,PWM output level polarity" "Not inverted,Inverted"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PWM2_CPI,PWM Compare Period Interrupt"
|
|
bitfld.word 0x00 0. " CP ,PWM compare period interrupt" "No interrupt,Interrupt"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "PWM2_IM,PWM Interrupt Mask Register"
|
|
bitfld.word 0x00 0. " IM ,PWM interrupt mask" "Disabled,Enabled"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "PWM2_DUT,PWM Output Duty Register"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "PWM2_PER,PWM Output Period Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM 3"
|
|
base ad:0xffffd0c0
|
|
width 10.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM3_PRS0,Prescaler 0 Register"
|
|
bitfld.word 0x00 0.--2. " PR0[2:0] ,Prescaler 0 value" "1,2,4,8,16,32,64,128"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PWM3_PRS1,Prescaler 1 Register"
|
|
bitfld.word 0x00 0.--4. " PR1[4:0] ,Prescaler 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PWM3_PEN,PWM Enable Register"
|
|
bitfld.word 0x00 0. " PE ,PWM enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PWM3_PLS,PWM Output Polarity Level Selection Register"
|
|
bitfld.word 0x00 0. " PL ,PWM output level polarity" "Not inverted,Inverted"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PWM3_CPI,PWM Compare Period Interrupt"
|
|
bitfld.word 0x00 0. " CP ,PWM compare period interrupt" "No interrupt,Interrupt"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "PWM3_IM,PWM Interrupt Mask Register"
|
|
bitfld.word 0x00 0. " IM ,PWM interrupt mask" "Disabled,Enabled"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "PWM3_DUT,PWM Output Duty Register"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "PWM3_PER,PWM Output Period Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM 4"
|
|
base ad:0xffffd100
|
|
width 10.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM4_PRS0,Prescaler 0 Register"
|
|
bitfld.word 0x00 0.--2. " PR0[2:0] ,Prescaler 0 value" "1,2,4,8,16,32,64,128"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PWM4_PRS1,Prescaler 1 Register"
|
|
bitfld.word 0x00 0.--4. " PR1[4:0] ,Prescaler 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PWM4_PEN,PWM Enable Register"
|
|
bitfld.word 0x00 0. " PE ,PWM enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PWM4_PLS,PWM Output Polarity Level Selection Register"
|
|
bitfld.word 0x00 0. " PL ,PWM output level polarity" "Not inverted,Inverted"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PWM4_CPI,PWM Compare Period Interrupt"
|
|
bitfld.word 0x00 0. " CP ,PWM compare period interrupt" "No interrupt,Interrupt"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "PWM4_IM,PWM Interrupt Mask Register"
|
|
bitfld.word 0x00 0. " IM ,PWM interrupt mask" "Disabled,Enabled"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "PWM4_DUT,PWM Output Duty Register"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "PWM4_PER,PWM Output Period Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM 5"
|
|
base ad:0xffffd140
|
|
width 10.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM5_PRS0,Prescaler 0 Register"
|
|
bitfld.word 0x00 0.--2. " PR0[2:0] ,Prescaler 0 value" "1,2,4,8,16,32,64,128"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PWM5_PRS1,Prescaler 1 Register"
|
|
bitfld.word 0x00 0.--4. " PR1[4:0] ,Prescaler 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PWM5_PEN,PWM Enable Register"
|
|
bitfld.word 0x00 0. " PE ,PWM enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PWM5_PLS,PWM Output Polarity Level Selection Register"
|
|
bitfld.word 0x00 0. " PL ,PWM output level polarity" "Not inverted,Inverted"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PWM5_CPI,PWM Compare Period Interrupt"
|
|
bitfld.word 0x00 0. " CP ,PWM compare period interrupt" "No interrupt,Interrupt"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "PWM5_IM,PWM Interrupt Mask Register"
|
|
bitfld.word 0x00 0. " IM ,PWM interrupt mask" "Disabled,Enabled"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "PWM5_DUT,PWM Output Duty Register"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "PWM5_PER,PWM Output Period Register"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
sif ((cpu()=="STR730")||(cpu()=="STR731"))
|
|
tree.open "CAN (Communication Area Network Controller)"
|
|
tree "CAN 0"
|
|
base ad:0xffffc400
|
|
width 15.
|
|
group.word 0x00++0x1 "CAN Protocol Related Register"
|
|
line.word 0x00 "CAN0_CR,CAN Control Register"
|
|
bitfld.word 0x00 7. " Test ,Test Mode Enable" "Normal,Test"
|
|
bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " DAR ,Disable Automatic Retransmission" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " Init ,Initialization" "Normal,Initialization"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CAN0_SR,Status Register"
|
|
bitfld.word 0x00 7. " BOff ,Busoff Status" "Not busoff,Busoff"
|
|
bitfld.word 0x00 6. " EWarn ,Warning Status" "< 96,>= 96"
|
|
textline " "
|
|
bitfld.word 0x00 5. " EPass ,Error Passive" "Active,Passive"
|
|
bitfld.word 0x00 4. " RxOk ,Received a Message Successfully" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxOk ,Transmitted a Message Successfully" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 0.--2. " LEC[2:0] ,Last Error Code" "No error,Stuff,Form,AckError,Bit1Error,Bit0Error,CRCError,?..."
|
|
rgroup.word 0x08++0x1
|
|
line.word 0x00 "CAN0_ERR,Error Counter"
|
|
bitfld.word 0x00 15. " RP ,Receive Error Pasive" "Below,Reached"
|
|
hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter"
|
|
if ((((d.w(d:0xffffc400))&0x40)==0x40)&&(((d.w(d:0xffffc400))&0x1)==0x1))
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "CAN0_BTR,Bit Timing Register"
|
|
bitfld.word 0x00 12.--14. " TSeg2 ,Time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--11. " TSeg1 ,Time segment before the sample point point minus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.word 0x0c++0x1
|
|
line.word 0x00 "CAN0_BTR,Bit Timing Register"
|
|
bitfld.word 0x00 12.--14. " TSeg2 ,Time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--11. " TSeg1 ,Time segment before the sample point point minus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
if (((d.w(d:0xffffc400))&0x80)==0x80)
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "CAN0_TESTR,Test Register"
|
|
bitfld.word 0x00 7. " Rx ,Current value of CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x00 5.--6. " Tx[1:0] ,CAN_TX pin control" "CAN core,Sample point,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LBack ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " Silent ,Silent Mode" "Normal,Silent"
|
|
bitfld.word 0x00 2. " Basic ,Basic Mode" "Disabled,Enabled"
|
|
else
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "CAN0_TESTR,Test Register"
|
|
bitfld.word 0x00 7. " Rx ,Current value of CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x00 5.--6. " Tx[1:0] ,CAN_TX pin control" "CAN core,Sample point,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LBack ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " Silent ,Silent Mode" "Normal,Silent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " Basic ,Basic Mode" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "CAN0_BRPR,BRP Extension Register"
|
|
bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 15.
|
|
group.word 0x20++0x1 "Interface 1"
|
|
line.word 0x00 "CAN0_IF1_CR,IF1 Command Request Register"
|
|
bitfld.word 0x00 15. " Busy ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x00 0.--5. 1. " MsgNum ,Message number"
|
|
if (((d.w(d:(0xffffc400+0x20+0x4)))&0x80)==0x80)
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN0_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
else
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN0_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ClrIntPnd ,Clear Interrupt Pending" "No effect,Cleared"
|
|
eventfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x20+0x8)++0x1
|
|
line.word 0x00 "CAN0_IF1_M1R,IF1 Mask 1 Register"
|
|
bitfld.word 0x00 15. " Mask[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x20+0xc)++0x1
|
|
line.word 0x00 "CAN0_IF1_M2R,IF1 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXtd ,Mask Extended Identifier" "No effect,Used"
|
|
bitfld.word 0x00 14. " MDir ,Mask Message Direction" "No effect,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " Msk[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x20+0x10)++0x1
|
|
line.word 0x00 "CAN0_IF1_A1R,IF1 Message Arbitration 1 Register"
|
|
hexmask.word 0x00 0.--15. 1. " ID[15:0] ,ID Bits 15:0"
|
|
group.word (0x20+0x14)++0x1
|
|
line.word 0x00 "CAN0_IF1_A2R,IF1 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MsgVal ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " Xtd ,Extended Identifier" "Standard,Extended"
|
|
textline " "
|
|
bitfld.word 0x00 13. " Dir ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,ID Bits 28:16"
|
|
if (((d.w(d:(0xffffc400+0x20+0x14)))&0x2000)==0x0000)
|
|
group.word (0x20+0x18)++0x1
|
|
line.word 0x00 "CAN0_IF1_MCR,IF1 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " MsgLst ,Message Lost" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x20+0x18)++0x1
|
|
line.word 0x00 "CAN0_IF1_MCR,IF1 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x20+0x1c)++0x1
|
|
line.word 0x00 "CAN0_IF1_DA1R,IF1 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x20)++0x1
|
|
line.word 0x00 "CAN0_IF1_DA2R,ID1 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x24)++0x1
|
|
line.word 0x00 "CAN0_IF1_DB1R,IF1 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x28)++0x1
|
|
line.word 0x00 "CAN0_IF1_DB2R,ID1 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word 0x80++0x1 "Interface 2"
|
|
line.word 0x00 "CAN0_IF2_CR,IF2 Command Request Register"
|
|
bitfld.word 0x00 15. " Busy ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x00 0.--5. 1. " MsgNum ,Message number"
|
|
if (((d.w(d:(0xffffc400+0x80+0x4)))&0x80)==0x80)
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN0_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
else
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN0_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ClrIntPnd ,Clear Interrupt Pending" "No effect,Cleared"
|
|
eventfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x80+0x8)++0x1
|
|
line.word 0x00 "CAN0_IF2_M1R,IF2 Mask 1 Register"
|
|
bitfld.word 0x00 15. " Mask[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x80+0xc)++0x1
|
|
line.word 0x00 "CAN0_IF2_M2R,IF2 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXtd ,Mask Extended Identifier" "No effect,Used"
|
|
bitfld.word 0x00 14. " MDir ,Mask Message Direction" "No effect,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " Msk[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "CAN0_IF2_A1R,IF2 Message Arbitration 1 Register"
|
|
hexmask.word 0x00 0.--15. 1. " ID[15:0] ,ID Bits 15:0"
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "CAN0_IF2_A2R,IF2 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MsgVal ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " Xtd ,Extended Identifier" "Standard,Extended"
|
|
textline " "
|
|
bitfld.word 0x00 13. " Dir ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,ID Bits 28:16"
|
|
if (((d.w(d:(0xffffc400+0x80+0x14)))&0x2000)==0x0000)
|
|
group.word (0x80+0x18)++0x1
|
|
line.word 0x00 "CAN0_IF2_MCR,IF2 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " MsgLst ,Message Lost" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x80+0x18)++0x1
|
|
line.word 0x00 "CAN0_IF2_MCR,IF2 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "CAN0_IF2_DA1R,IF2 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x20)++0x1
|
|
line.word 0x00 "CAN0_IF2_DA2R,ID2 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x24)++0x1
|
|
line.word 0x00 "CAN0_IF2_DB1R,IF2 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x28)++0x1
|
|
line.word 0x00 "CAN0_IF2_DB2R,ID2 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
width 15.
|
|
rgroup.word 0x10++0x1 "Message Handler Registers"
|
|
line.word 0x00 "CAN0_IDR,Interrupt Identifier Register"
|
|
rgroup.word 0x100++0x1
|
|
line.word 0x00 "CAN0_TxR1R,Transmission Request Register 1"
|
|
bitfld.word 0x00 15. " TxRqst16 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TxRqst15 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " TxRqst14 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " TxRqst13 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxRqst12 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TxRqst11 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TxRqst10 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TxRqst9 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TxRqst8 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 6. " TxRqst7 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TxRqst6 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TxRqst5 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxRqst4 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TxRqst3 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxRqst2 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 0. " TxRqst1 ,Transmission Request" "Not requested,Requested"
|
|
rgroup.word 0x104++0x1
|
|
line.word 0x00 "CAN0_TxR2R,Transmission Request Register 2"
|
|
bitfld.word 0x00 15. " TxRqst32 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TxRqst31 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " TxRqst30 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " TxRqst29 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxRqst28 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TxRqst27 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TxRqst26 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TxRqst25 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TxRqst24 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 6. " TxRqst23 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TxRqst22 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TxRqst21 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxRqst20 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TxRqst19 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxRqst18 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 0. " TxRqst17 ,Transmission Request" "Not requested,Requested"
|
|
rgroup.word 0x120++0x1
|
|
line.word 0x00 "CAN0_ND1R,New Data Register 1"
|
|
bitfld.word 0x00 15. " NewDat16 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 14. " NewDat15 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 13. " NewDat14 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 12. " NewDat13 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 11. " NewDat12 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 10. " NewDat11 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NewDat10 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 8. " NewDat9 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NewDat8 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 6. " NewDat7 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 5. " NewDat6 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 4. " NewDat5 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NewDat4 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 2. " NewDat3 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 1. " NewDat2 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 0. " NewDat1 ,New Data" "Not written,Written"
|
|
rgroup.word 0x124++0x1
|
|
line.word 0x00 "CAN0_ND2R,New Data Register 2"
|
|
bitfld.word 0x00 15. " NewDat32 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 14. " NewDat31 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 13. " NewDat30 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 12. " NewDat29 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 11. " NewDat28 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 10. " NewDat27 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NewDat26 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 8. " NewDat25 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NewDat24 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 6. " NewDat23 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 5. " NewDat22 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 4. " NewDat21 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NewDat20 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 2. " NewDat19 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 1. " NewDat18 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 0. " NewDat17 ,New Data" "Not written,Written"
|
|
rgroup.word 0x140++0x1
|
|
line.word 0x00 "CAN0_IP1R,Interrupt Pending Register 1"
|
|
bitfld.word 0x00 15. " IntPnd16 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " IntPnd15 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd14 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " IntPnd13 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 11. " IntPnd12 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " IntPnd11 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " IntPnd10 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " IntPnd9 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 7. " IntPnd8 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 6. " IntPnd7 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 5. " IntPnd6 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " IntPnd5 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " IntPnd4 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " IntPnd3 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 1. " IntPnd2 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " IntPnd1 ,Interrupt Pending" "Not pending,Pending"
|
|
rgroup.word 0x144++0x1
|
|
line.word 0x00 "CAN0_IP2R,Interrupt Pending Register 2"
|
|
bitfld.word 0x00 15. " IntPnd32 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " IntPnd31 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd30 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " IntPnd29 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 11. " IntPnd28 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " IntPnd27 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " IntPnd26 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " IntPnd25 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 7. " IntPnd24 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 6. " IntPnd23 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 5. " IntPnd22 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " IntPnd21 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " IntPnd20 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " IntPnd19 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 1. " IntPnd18 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " IntPnd17 ,Interrupt Pending" "Not pending,Pending"
|
|
rgroup.word 0x160++0x1
|
|
line.word 0x00 "CAN0_MV1R,Message Valid Register 1"
|
|
bitfld.word 0x00 15. " MsgVal16 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " MsgVal15 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MsgVal14 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 12. " MsgVal13 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 11. " MsgVal12 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 10. " MsgVal11 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MsgVal10 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 8. " MsgVal9 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MsgVal8 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 6. " MsgVal7 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MsgVal6 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 4. " MsgVal5 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MsgVal4 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 2. " MsgVal3 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MsgVal2 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 0. " MsgVal1 ,Message Valid" "Ignored,Valid"
|
|
rgroup.word 0x164++0x1
|
|
line.word 0x00 "CAN0_MV2R,Message Valid Register 2"
|
|
bitfld.word 0x00 15. " MsgVal32 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " MsgVal31 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MsgVal30 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 12. " MsgVal29 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 11. " MsgVal28 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 10. " MsgVal27 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MsgVal26 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 8. " MsgVal25 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MsgVal24 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 6. " MsgVal23 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MsgVal22 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 4. " MsgVal21 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MsgVal20 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 2. " MsgVal19 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MsgVal18 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 0. " MsgVal17 ,Message Valid" "Ignored,Valid"
|
|
width 0xb
|
|
tree.end
|
|
tree "CAN 1"
|
|
base ad:0xffffc800
|
|
width 15.
|
|
group.word 0x00++0x1 "CAN Protocol Related Register"
|
|
line.word 0x00 "CAN1_CR,CAN Control Register"
|
|
bitfld.word 0x00 7. " Test ,Test Mode Enable" "Normal,Test"
|
|
bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " DAR ,Disable Automatic Retransmission" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " Init ,Initialization" "Normal,Initialization"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CAN1_SR,Status Register"
|
|
bitfld.word 0x00 7. " BOff ,Busoff Status" "Not busoff,Busoff"
|
|
bitfld.word 0x00 6. " EWarn ,Warning Status" "< 96,>= 96"
|
|
textline " "
|
|
bitfld.word 0x00 5. " EPass ,Error Passive" "Active,Passive"
|
|
bitfld.word 0x00 4. " RxOk ,Received a Message Successfully" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxOk ,Transmitted a Message Successfully" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 0.--2. " LEC[2:0] ,Last Error Code" "No error,Stuff,Form,AckError,Bit1Error,Bit0Error,CRCError,?..."
|
|
rgroup.word 0x08++0x1
|
|
line.word 0x00 "CAN1_ERR,Error Counter"
|
|
bitfld.word 0x00 15. " RP ,Receive Error Pasive" "Below,Reached"
|
|
hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter"
|
|
if ((((d.w(d:0xffffc800))&0x40)==0x40)&&(((d.w(d:0xffffc800))&0x1)==0x1))
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "CAN1_BTR,Bit Timing Register"
|
|
bitfld.word 0x00 12.--14. " TSeg2 ,Time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--11. " TSeg1 ,Time segment before the sample point point minus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.word 0x0c++0x1
|
|
line.word 0x00 "CAN1_BTR,Bit Timing Register"
|
|
bitfld.word 0x00 12.--14. " TSeg2 ,Time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--11. " TSeg1 ,Time segment before the sample point point minus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
if (((d.w(d:0xffffc800))&0x80)==0x80)
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "CAN1_TESTR,Test Register"
|
|
bitfld.word 0x00 7. " Rx ,Current value of CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x00 5.--6. " Tx[1:0] ,CAN_TX pin control" "CAN core,Sample point,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LBack ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " Silent ,Silent Mode" "Normal,Silent"
|
|
bitfld.word 0x00 2. " Basic ,Basic Mode" "Disabled,Enabled"
|
|
else
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "CAN1_TESTR,Test Register"
|
|
bitfld.word 0x00 7. " Rx ,Current value of CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x00 5.--6. " Tx[1:0] ,CAN_TX pin control" "CAN core,Sample point,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LBack ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " Silent ,Silent Mode" "Normal,Silent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " Basic ,Basic Mode" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "CAN1_BRPR,BRP Extension Register"
|
|
bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 15.
|
|
group.word 0x20++0x1 "Interface 1"
|
|
line.word 0x00 "CAN1_IF1_CR,IF1 Command Request Register"
|
|
bitfld.word 0x00 15. " Busy ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x00 0.--5. 1. " MsgNum ,Message number"
|
|
if (((d.w(d:(0xffffc800+0x20+0x4)))&0x80)==0x80)
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN1_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
else
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN1_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ClrIntPnd ,Clear Interrupt Pending" "No effect,Cleared"
|
|
eventfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x20+0x8)++0x1
|
|
line.word 0x00 "CAN1_IF1_M1R,IF1 Mask 1 Register"
|
|
bitfld.word 0x00 15. " Mask[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x20+0xc)++0x1
|
|
line.word 0x00 "CAN1_IF1_M2R,IF1 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXtd ,Mask Extended Identifier" "No effect,Used"
|
|
bitfld.word 0x00 14. " MDir ,Mask Message Direction" "No effect,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " Msk[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x20+0x10)++0x1
|
|
line.word 0x00 "CAN1_IF1_A1R,IF1 Message Arbitration 1 Register"
|
|
hexmask.word 0x00 0.--15. 1. " ID[15:0] ,ID Bits 15:0"
|
|
group.word (0x20+0x14)++0x1
|
|
line.word 0x00 "CAN1_IF1_A2R,IF1 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MsgVal ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " Xtd ,Extended Identifier" "Standard,Extended"
|
|
textline " "
|
|
bitfld.word 0x00 13. " Dir ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,ID Bits 28:16"
|
|
if (((d.w(d:(0xffffc800+0x20+0x14)))&0x2000)==0x0000)
|
|
group.word (0x20+0x18)++0x1
|
|
line.word 0x00 "CAN1_IF1_MCR,IF1 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " MsgLst ,Message Lost" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x20+0x18)++0x1
|
|
line.word 0x00 "CAN1_IF1_MCR,IF1 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x20+0x1c)++0x1
|
|
line.word 0x00 "CAN1_IF1_DA1R,IF1 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x20)++0x1
|
|
line.word 0x00 "CAN1_IF1_DA2R,ID1 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x24)++0x1
|
|
line.word 0x00 "CAN1_IF1_DB1R,IF1 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x28)++0x1
|
|
line.word 0x00 "CAN1_IF1_DB2R,ID1 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word 0x80++0x1 "Interface 2"
|
|
line.word 0x00 "CAN1_IF2_CR,IF2 Command Request Register"
|
|
bitfld.word 0x00 15. " Busy ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x00 0.--5. 1. " MsgNum ,Message number"
|
|
if (((d.w(d:(0xffffc800+0x80+0x4)))&0x80)==0x80)
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN1_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
else
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN1_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ClrIntPnd ,Clear Interrupt Pending" "No effect,Cleared"
|
|
eventfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x80+0x8)++0x1
|
|
line.word 0x00 "CAN1_IF2_M1R,IF2 Mask 1 Register"
|
|
bitfld.word 0x00 15. " Mask[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x80+0xc)++0x1
|
|
line.word 0x00 "CAN1_IF2_M2R,IF2 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXtd ,Mask Extended Identifier" "No effect,Used"
|
|
bitfld.word 0x00 14. " MDir ,Mask Message Direction" "No effect,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " Msk[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "CAN1_IF2_A1R,IF2 Message Arbitration 1 Register"
|
|
hexmask.word 0x00 0.--15. 1. " ID[15:0] ,ID Bits 15:0"
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "CAN1_IF2_A2R,IF2 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MsgVal ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " Xtd ,Extended Identifier" "Standard,Extended"
|
|
textline " "
|
|
bitfld.word 0x00 13. " Dir ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,ID Bits 28:16"
|
|
if (((d.w(d:(0xffffc800+0x80+0x14)))&0x2000)==0x0000)
|
|
group.word (0x80+0x18)++0x1
|
|
line.word 0x00 "CAN1_IF2_MCR,IF2 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " MsgLst ,Message Lost" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x80+0x18)++0x1
|
|
line.word 0x00 "CAN1_IF2_MCR,IF2 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "CAN1_IF2_DA1R,IF2 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x20)++0x1
|
|
line.word 0x00 "CAN1_IF2_DA2R,ID2 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x24)++0x1
|
|
line.word 0x00 "CAN1_IF2_DB1R,IF2 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x28)++0x1
|
|
line.word 0x00 "CAN1_IF2_DB2R,ID2 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
width 15.
|
|
rgroup.word 0x10++0x1 "Message Handler Registers"
|
|
line.word 0x00 "CAN1_IDR,Interrupt Identifier Register"
|
|
rgroup.word 0x100++0x1
|
|
line.word 0x00 "CAN1_TxR1R,Transmission Request Register 1"
|
|
bitfld.word 0x00 15. " TxRqst16 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TxRqst15 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " TxRqst14 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " TxRqst13 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxRqst12 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TxRqst11 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TxRqst10 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TxRqst9 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TxRqst8 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 6. " TxRqst7 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TxRqst6 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TxRqst5 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxRqst4 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TxRqst3 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxRqst2 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 0. " TxRqst1 ,Transmission Request" "Not requested,Requested"
|
|
rgroup.word 0x104++0x1
|
|
line.word 0x00 "CAN1_TxR2R,Transmission Request Register 2"
|
|
bitfld.word 0x00 15. " TxRqst32 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TxRqst31 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " TxRqst30 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " TxRqst29 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxRqst28 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TxRqst27 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TxRqst26 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TxRqst25 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TxRqst24 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 6. " TxRqst23 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TxRqst22 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TxRqst21 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxRqst20 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TxRqst19 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxRqst18 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 0. " TxRqst17 ,Transmission Request" "Not requested,Requested"
|
|
rgroup.word 0x120++0x1
|
|
line.word 0x00 "CAN1_ND1R,New Data Register 1"
|
|
bitfld.word 0x00 15. " NewDat16 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 14. " NewDat15 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 13. " NewDat14 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 12. " NewDat13 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 11. " NewDat12 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 10. " NewDat11 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NewDat10 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 8. " NewDat9 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NewDat8 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 6. " NewDat7 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 5. " NewDat6 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 4. " NewDat5 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NewDat4 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 2. " NewDat3 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 1. " NewDat2 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 0. " NewDat1 ,New Data" "Not written,Written"
|
|
rgroup.word 0x124++0x1
|
|
line.word 0x00 "CAN1_ND2R,New Data Register 2"
|
|
bitfld.word 0x00 15. " NewDat32 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 14. " NewDat31 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 13. " NewDat30 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 12. " NewDat29 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 11. " NewDat28 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 10. " NewDat27 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NewDat26 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 8. " NewDat25 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NewDat24 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 6. " NewDat23 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 5. " NewDat22 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 4. " NewDat21 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NewDat20 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 2. " NewDat19 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 1. " NewDat18 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 0. " NewDat17 ,New Data" "Not written,Written"
|
|
rgroup.word 0x140++0x1
|
|
line.word 0x00 "CAN1_IP1R,Interrupt Pending Register 1"
|
|
bitfld.word 0x00 15. " IntPnd16 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " IntPnd15 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd14 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " IntPnd13 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 11. " IntPnd12 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " IntPnd11 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " IntPnd10 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " IntPnd9 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 7. " IntPnd8 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 6. " IntPnd7 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 5. " IntPnd6 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " IntPnd5 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " IntPnd4 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " IntPnd3 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 1. " IntPnd2 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " IntPnd1 ,Interrupt Pending" "Not pending,Pending"
|
|
rgroup.word 0x144++0x1
|
|
line.word 0x00 "CAN1_IP2R,Interrupt Pending Register 2"
|
|
bitfld.word 0x00 15. " IntPnd32 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " IntPnd31 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd30 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " IntPnd29 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 11. " IntPnd28 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " IntPnd27 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " IntPnd26 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " IntPnd25 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 7. " IntPnd24 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 6. " IntPnd23 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 5. " IntPnd22 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " IntPnd21 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " IntPnd20 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " IntPnd19 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 1. " IntPnd18 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " IntPnd17 ,Interrupt Pending" "Not pending,Pending"
|
|
rgroup.word 0x160++0x1
|
|
line.word 0x00 "CAN1_MV1R,Message Valid Register 1"
|
|
bitfld.word 0x00 15. " MsgVal16 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " MsgVal15 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MsgVal14 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 12. " MsgVal13 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 11. " MsgVal12 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 10. " MsgVal11 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MsgVal10 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 8. " MsgVal9 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MsgVal8 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 6. " MsgVal7 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MsgVal6 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 4. " MsgVal5 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MsgVal4 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 2. " MsgVal3 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MsgVal2 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 0. " MsgVal1 ,Message Valid" "Ignored,Valid"
|
|
rgroup.word 0x164++0x1
|
|
line.word 0x00 "CAN1_MV2R,Message Valid Register 2"
|
|
bitfld.word 0x00 15. " MsgVal32 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " MsgVal31 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MsgVal30 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 12. " MsgVal29 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 11. " MsgVal28 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 10. " MsgVal27 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MsgVal26 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 8. " MsgVal25 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MsgVal24 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 6. " MsgVal23 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MsgVal22 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 4. " MsgVal21 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MsgVal20 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 2. " MsgVal19 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MsgVal18 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 0. " MsgVal17 ,Message Valid" "Ignored,Valid"
|
|
width 0xb
|
|
tree.end
|
|
tree "CAN 2"
|
|
base ad:0xffffcc00
|
|
width 15.
|
|
group.word 0x00++0x1 "CAN Protocol Related Register"
|
|
line.word 0x00 "CAN2_CR,CAN Control Register"
|
|
bitfld.word 0x00 7. " Test ,Test Mode Enable" "Normal,Test"
|
|
bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " DAR ,Disable Automatic Retransmission" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " Init ,Initialization" "Normal,Initialization"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CAN2_SR,Status Register"
|
|
bitfld.word 0x00 7. " BOff ,Busoff Status" "Not busoff,Busoff"
|
|
bitfld.word 0x00 6. " EWarn ,Warning Status" "< 96,>= 96"
|
|
textline " "
|
|
bitfld.word 0x00 5. " EPass ,Error Passive" "Active,Passive"
|
|
bitfld.word 0x00 4. " RxOk ,Received a Message Successfully" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxOk ,Transmitted a Message Successfully" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 0.--2. " LEC[2:0] ,Last Error Code" "No error,Stuff,Form,AckError,Bit1Error,Bit0Error,CRCError,?..."
|
|
rgroup.word 0x08++0x1
|
|
line.word 0x00 "CAN2_ERR,Error Counter"
|
|
bitfld.word 0x00 15. " RP ,Receive Error Pasive" "Below,Reached"
|
|
hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter"
|
|
if ((((d.w(d:0xffffcc00))&0x40)==0x40)&&(((d.w(d:0xffffcc00))&0x1)==0x1))
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "CAN2_BTR,Bit Timing Register"
|
|
bitfld.word 0x00 12.--14. " TSeg2 ,Time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--11. " TSeg1 ,Time segment before the sample point point minus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.word 0x0c++0x1
|
|
line.word 0x00 "CAN2_BTR,Bit Timing Register"
|
|
bitfld.word 0x00 12.--14. " TSeg2 ,Time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--11. " TSeg1 ,Time segment before the sample point point minus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
if (((d.w(d:0xffffcc00))&0x80)==0x80)
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "CAN2_TESTR,Test Register"
|
|
bitfld.word 0x00 7. " Rx ,Current value of CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x00 5.--6. " Tx[1:0] ,CAN_TX pin control" "CAN core,Sample point,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LBack ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " Silent ,Silent Mode" "Normal,Silent"
|
|
bitfld.word 0x00 2. " Basic ,Basic Mode" "Disabled,Enabled"
|
|
else
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "CAN2_TESTR,Test Register"
|
|
bitfld.word 0x00 7. " Rx ,Current value of CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x00 5.--6. " Tx[1:0] ,CAN_TX pin control" "CAN core,Sample point,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LBack ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " Silent ,Silent Mode" "Normal,Silent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " Basic ,Basic Mode" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "CAN2_BRPR,BRP Extension Register"
|
|
bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 15.
|
|
group.word 0x20++0x1 "Interface 1"
|
|
line.word 0x00 "CAN2_IF1_CR,IF1 Command Request Register"
|
|
bitfld.word 0x00 15. " Busy ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x00 0.--5. 1. " MsgNum ,Message number"
|
|
if (((d.w(d:(0xffffcc00+0x20+0x4)))&0x80)==0x80)
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN2_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
else
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN2_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ClrIntPnd ,Clear Interrupt Pending" "No effect,Cleared"
|
|
eventfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x20+0x8)++0x1
|
|
line.word 0x00 "CAN2_IF1_M1R,IF1 Mask 1 Register"
|
|
bitfld.word 0x00 15. " Mask[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x20+0xc)++0x1
|
|
line.word 0x00 "CAN2_IF1_M2R,IF1 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXtd ,Mask Extended Identifier" "No effect,Used"
|
|
bitfld.word 0x00 14. " MDir ,Mask Message Direction" "No effect,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " Msk[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x20+0x10)++0x1
|
|
line.word 0x00 "CAN2_IF1_A1R,IF1 Message Arbitration 1 Register"
|
|
hexmask.word 0x00 0.--15. 1. " ID[15:0] ,ID Bits 15:0"
|
|
group.word (0x20+0x14)++0x1
|
|
line.word 0x00 "CAN2_IF1_A2R,IF1 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MsgVal ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " Xtd ,Extended Identifier" "Standard,Extended"
|
|
textline " "
|
|
bitfld.word 0x00 13. " Dir ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,ID Bits 28:16"
|
|
if (((d.w(d:(0xffffcc00+0x20+0x14)))&0x2000)==0x0000)
|
|
group.word (0x20+0x18)++0x1
|
|
line.word 0x00 "CAN2_IF1_MCR,IF1 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " MsgLst ,Message Lost" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x20+0x18)++0x1
|
|
line.word 0x00 "CAN2_IF1_MCR,IF1 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x20+0x1c)++0x1
|
|
line.word 0x00 "CAN2_IF1_DA1R,IF1 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x20)++0x1
|
|
line.word 0x00 "CAN2_IF1_DA2R,ID1 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x24)++0x1
|
|
line.word 0x00 "CAN2_IF1_DB1R,IF1 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x20+0x28)++0x1
|
|
line.word 0x00 "CAN2_IF1_DB2R,ID1 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word 0x80++0x1 "Interface 2"
|
|
line.word 0x00 "CAN2_IF2_CR,IF2 Command Request Register"
|
|
bitfld.word 0x00 15. " Busy ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x00 0.--5. 1. " MsgNum ,Message number"
|
|
if (((d.w(d:(0xffffcc00+0x80+0x4)))&0x80)==0x80)
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN2_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
else
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN2_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " Mask ,Access Mask" "Unchanged,ID+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " Arb ,Access Arbitration" "Unchanged,ID+Dir+Xtd+MsgVal"
|
|
bitfld.word 0x00 4. " Control ,Access Control" "Unchanged,Control bits"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ClrIntPnd ,Clear Interrupt Pending" "No effect,Cleared"
|
|
eventfld.word 0x00 2. " TxRqst/NewDat ,Access Transmission Request" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DataA ,Access Data Bytes 3:0" "Unchanged,Transferred"
|
|
bitfld.word 0x00 0. " DataB ,Access Data Bytes 7:4" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x80+0x8)++0x1
|
|
line.word 0x00 "CAN2_IF2_M1R,IF2 Mask 1 Register"
|
|
bitfld.word 0x00 15. " Mask[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x80+0xc)++0x1
|
|
line.word 0x00 "CAN2_IF2_M2R,IF2 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXtd ,Mask Extended Identifier" "No effect,Used"
|
|
bitfld.word 0x00 14. " MDir ,Mask Message Direction" "No effect,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " Msk[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "CAN2_IF2_A1R,IF2 Message Arbitration 1 Register"
|
|
hexmask.word 0x00 0.--15. 1. " ID[15:0] ,ID Bits 15:0"
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "CAN2_IF2_A2R,IF2 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MsgVal ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " Xtd ,Extended Identifier" "Standard,Extended"
|
|
textline " "
|
|
bitfld.word 0x00 13. " Dir ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,ID Bits 28:16"
|
|
if (((d.w(d:(0xffffcc00+0x80+0x14)))&0x2000)==0x0000)
|
|
group.word (0x80+0x18)++0x1
|
|
line.word 0x00 "CAN2_IF2_MCR,IF2 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " MsgLst ,Message Lost" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x80+0x18)++0x1
|
|
line.word 0x00 "CAN2_IF2_MCR,IF2 Message Control Register"
|
|
bitfld.word 0x00 15. " NewDat ,New Data" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " UMask ,Use Acceptance Mask" "Ignored,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RxIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RmtEn ,Remote Enable" "TxRqst unchanged,TxRqst set"
|
|
bitfld.word 0x00 8. " TxRqst ,Transmit Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EoB ,End of Buffer" "Not last,Last"
|
|
bitfld.word 0x00 0.--3. " DLC[3:0] ,Data Length Code" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "CAN2_IF2_DA1R,IF2 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x20)++0x1
|
|
line.word 0x00 "CAN2_IF2_DA2R,ID2 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x24)++0x1
|
|
line.word 0x00 "CAN2_IF2_DB1R,IF2 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
group.word (0x80+0x28)++0x1
|
|
line.word 0x00 "CAN2_IF2_DB2R,ID2 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " Data1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " Data0 ,Data 0"
|
|
width 15.
|
|
rgroup.word 0x10++0x1 "Message Handler Registers"
|
|
line.word 0x00 "CAN2_IDR,Interrupt Identifier Register"
|
|
rgroup.word 0x100++0x1
|
|
line.word 0x00 "CAN2_TxR1R,Transmission Request Register 1"
|
|
bitfld.word 0x00 15. " TxRqst16 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TxRqst15 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " TxRqst14 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " TxRqst13 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxRqst12 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TxRqst11 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TxRqst10 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TxRqst9 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TxRqst8 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 6. " TxRqst7 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TxRqst6 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TxRqst5 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxRqst4 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TxRqst3 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxRqst2 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 0. " TxRqst1 ,Transmission Request" "Not requested,Requested"
|
|
rgroup.word 0x104++0x1
|
|
line.word 0x00 "CAN2_TxR2R,Transmission Request Register 2"
|
|
bitfld.word 0x00 15. " TxRqst32 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TxRqst31 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " TxRqst30 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " TxRqst29 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TxRqst28 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TxRqst27 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TxRqst26 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TxRqst25 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TxRqst24 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 6. " TxRqst23 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TxRqst22 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TxRqst21 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TxRqst20 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TxRqst19 ,Transmission Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxRqst18 ,Transmission Request" "Not requested,Requested"
|
|
bitfld.word 0x00 0. " TxRqst17 ,Transmission Request" "Not requested,Requested"
|
|
rgroup.word 0x120++0x1
|
|
line.word 0x00 "CAN2_ND1R,New Data Register 1"
|
|
bitfld.word 0x00 15. " NewDat16 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 14. " NewDat15 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 13. " NewDat14 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 12. " NewDat13 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 11. " NewDat12 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 10. " NewDat11 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NewDat10 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 8. " NewDat9 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NewDat8 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 6. " NewDat7 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 5. " NewDat6 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 4. " NewDat5 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NewDat4 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 2. " NewDat3 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 1. " NewDat2 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 0. " NewDat1 ,New Data" "Not written,Written"
|
|
rgroup.word 0x124++0x1
|
|
line.word 0x00 "CAN2_ND2R,New Data Register 2"
|
|
bitfld.word 0x00 15. " NewDat32 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 14. " NewDat31 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 13. " NewDat30 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 12. " NewDat29 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 11. " NewDat28 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 10. " NewDat27 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NewDat26 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 8. " NewDat25 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NewDat24 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 6. " NewDat23 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 5. " NewDat22 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 4. " NewDat21 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NewDat20 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 2. " NewDat19 ,New Data" "Not written,Written"
|
|
textline " "
|
|
bitfld.word 0x00 1. " NewDat18 ,New Data" "Not written,Written"
|
|
bitfld.word 0x00 0. " NewDat17 ,New Data" "Not written,Written"
|
|
rgroup.word 0x140++0x1
|
|
line.word 0x00 "CAN2_IP1R,Interrupt Pending Register 1"
|
|
bitfld.word 0x00 15. " IntPnd16 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " IntPnd15 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd14 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " IntPnd13 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 11. " IntPnd12 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " IntPnd11 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " IntPnd10 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " IntPnd9 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 7. " IntPnd8 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 6. " IntPnd7 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 5. " IntPnd6 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " IntPnd5 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " IntPnd4 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " IntPnd3 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 1. " IntPnd2 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " IntPnd1 ,Interrupt Pending" "Not pending,Pending"
|
|
rgroup.word 0x144++0x1
|
|
line.word 0x00 "CAN2_IP2R,Interrupt Pending Register 2"
|
|
bitfld.word 0x00 15. " IntPnd32 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " IntPnd31 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 13. " IntPnd30 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 12. " IntPnd29 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 11. " IntPnd28 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " IntPnd27 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " IntPnd26 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " IntPnd25 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 7. " IntPnd24 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 6. " IntPnd23 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 5. " IntPnd22 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " IntPnd21 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " IntPnd20 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " IntPnd19 ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 1. " IntPnd18 ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " IntPnd17 ,Interrupt Pending" "Not pending,Pending"
|
|
rgroup.word 0x160++0x1
|
|
line.word 0x00 "CAN2_MV1R,Message Valid Register 1"
|
|
bitfld.word 0x00 15. " MsgVal16 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " MsgVal15 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MsgVal14 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 12. " MsgVal13 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 11. " MsgVal12 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 10. " MsgVal11 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MsgVal10 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 8. " MsgVal9 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MsgVal8 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 6. " MsgVal7 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MsgVal6 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 4. " MsgVal5 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MsgVal4 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 2. " MsgVal3 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MsgVal2 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 0. " MsgVal1 ,Message Valid" "Ignored,Valid"
|
|
rgroup.word 0x164++0x1
|
|
line.word 0x00 "CAN2_MV2R,Message Valid Register 2"
|
|
bitfld.word 0x00 15. " MsgVal32 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 14. " MsgVal31 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MsgVal30 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 12. " MsgVal29 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 11. " MsgVal28 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 10. " MsgVal27 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MsgVal26 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 8. " MsgVal25 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MsgVal24 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 6. " MsgVal23 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MsgVal22 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 4. " MsgVal21 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MsgVal20 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 2. " MsgVal19 ,Message Valid" "Ignored,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MsgVal18 ,Message Valid" "Ignored,Valid"
|
|
bitfld.word 0x00 0. " MsgVal17 ,Message Valid" "Ignored,Valid"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree.open "I2C (I2C Interface Module)"
|
|
tree "I2C 0"
|
|
base ad:0xffff8400
|
|
width 11.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C0_CR,I2C Control Register"
|
|
bitfld.byte 0x00 5. " PE ,Peripheral Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " ENGC ,Enable General Call" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " START ,Generation of a Start condition" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " ACK ,Acknowledge Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " STOP ,Generation of a Stop condition" "Not generated,Generated"
|
|
bitfld.byte 0x00 0. " ITE ,Interrupt Enable" "Disabled,Enabled"
|
|
if (((d.b(d:(0xffff8400+0x4)))&0x2)==0x2)
|
|
;Master
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C0_SR1,I2C Status Register"
|
|
bitfld.byte 0x00 7. " EVF ,Event Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 6. " ADD10 ,10-bit addressing in Master mode" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " TRA ,Transmitter/Receiver" "Received,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BUSY ,Bus busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 3. " BTF ,Byte transfer finished" "Not done,Succeeded"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M/SL ,Master/Slave" "Slave,Master"
|
|
bitfld.byte 0x00 0. " SB ,Start Bit" "Not generated,Generated"
|
|
rgroup.byte 0x08++0x0
|
|
line.byte 0x00 "I2C0_SR2,I2C Status Register 2"
|
|
bitfld.byte 0x00 5. " ENDAD ,End of address transmission" "Not ended,Ended"
|
|
bitfld.byte 0x00 4. " AF ,Acknowledge failure" "Not failed,Failed"
|
|
bitfld.byte 0x00 3. " STOPF ,Stop detection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " ARLO ,Arbitration lost" "Not detected,Detected"
|
|
bitfld.byte 0x00 1. " BERR ,Bus error" "No error,Error"
|
|
else
|
|
;Slave
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C0_SR1,I2C Status Register 1"
|
|
bitfld.byte 0x00 7. " EVF ,Event Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " TRA ,Transmitter/Receiver" "Received,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BUSY ,Bus busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 3. " BTF ,Byte transfer finished" "Not done,Succeeded"
|
|
bitfld.byte 0x00 2. " ADSL ,Address matched" "Mismatched,Matched"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M/SL ,Master/Slave" "Slave,Master"
|
|
rgroup.byte 0x08++0x0
|
|
line.byte 0x00 "I2C0_SR2,I2C Status Register 2"
|
|
bitfld.byte 0x00 5. " ENDAD ,End of address transmission" "Not ended,Ended"
|
|
bitfld.byte 0x00 4. " AF ,Acknowledge failure" "Not failed,Failed"
|
|
bitfld.byte 0x00 3. " STOPF ,Stop detection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " ARLO ,Arbitration lost" "Not detected,Detected"
|
|
bitfld.byte 0x00 1. " BERR ,Bus error" "No error,Error"
|
|
bitfld.byte 0x00 0. " GCAL ,General Call" "Not detected,Detected"
|
|
endif
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "I2C0_CCR,I2C Clock Control Register"
|
|
bitfld.byte 0x00 7. " FM/SM ,Fast/Standard I2C mode" "Standard,Fast"
|
|
hexmask.byte 0x00 0.--6. 1. " CC[6:0] ,Clock Divider"
|
|
group.byte 0x1c++0x0
|
|
line.byte 0x00 "I2C0_ECCR,I2C Extended Clock Control Register"
|
|
hexmask.byte 0x00 0.--4. 1. " CC[11:7] ,Clock Divider"
|
|
if (((d.b(d:(0xffff8400+0x4)))&0x42)==0x42)
|
|
; 10bit
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "I2C0_OAR1,I2C Own Address Register 1"
|
|
hexmask.byte 0x00 0.--7. 1. " ADD[7:0] ,Interface Address"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "I2C0_OAR2,I2C Own Address Register 2"
|
|
bitfld.byte 0x00 5.--7. " FR[2:0] ,Frequency Bits" "5-10 MHz,10-16.67 MHz,16.67-26.67 MHz,26.67-40 MHz,40-53.33 MHz,53.33-66 MHz,66-80 MHz,80-100 MHz"
|
|
bitfld.byte 0x00 1.--2. " ADD[9:8] ,Interface Address" "0,1,2,3"
|
|
else
|
|
; 7bit
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "I2C0_OAR1,I2C Own Address Register 1"
|
|
hexmask.byte 0x00 1.--7. 1. " ADD[7:1] ,Interface Address"
|
|
bitfld.byte 0x00 0. " ADD0 ,Address Direction" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "I2C0_OAR2,I2C Own Address Register 2"
|
|
bitfld.byte 0x00 5.--7. " FR[2:0] ,Frequency Bits" "5-10 MHz,10-16.67 MHz,16.67-26.67 MHz,26.67-40 MHz,40-53.33 MHz,53.33-66 MHz,66-80 MHz,80-100 MHz"
|
|
endif
|
|
group.byte 0x18++0x0
|
|
line.byte 0x00 "I2C0_DR,I2C Data Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "I2C 1"
|
|
base ad:0xffff8800
|
|
width 11.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C1_CR,I2C Control Register"
|
|
bitfld.byte 0x00 5. " PE ,Peripheral Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " ENGC ,Enable General Call" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " START ,Generation of a Start condition" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " ACK ,Acknowledge Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " STOP ,Generation of a Stop condition" "Not generated,Generated"
|
|
bitfld.byte 0x00 0. " ITE ,Interrupt Enable" "Disabled,Enabled"
|
|
if (((d.b(d:(0xffff8800+0x4)))&0x2)==0x2)
|
|
;Master
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C1_SR1,I2C Status Register"
|
|
bitfld.byte 0x00 7. " EVF ,Event Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 6. " ADD10 ,10-bit addressing in Master mode" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " TRA ,Transmitter/Receiver" "Received,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BUSY ,Bus busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 3. " BTF ,Byte transfer finished" "Not done,Succeeded"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M/SL ,Master/Slave" "Slave,Master"
|
|
bitfld.byte 0x00 0. " SB ,Start Bit" "Not generated,Generated"
|
|
rgroup.byte 0x08++0x0
|
|
line.byte 0x00 "I2C1_SR2,I2C Status Register 2"
|
|
bitfld.byte 0x00 5. " ENDAD ,End of address transmission" "Not ended,Ended"
|
|
bitfld.byte 0x00 4. " AF ,Acknowledge failure" "Not failed,Failed"
|
|
bitfld.byte 0x00 3. " STOPF ,Stop detection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " ARLO ,Arbitration lost" "Not detected,Detected"
|
|
bitfld.byte 0x00 1. " BERR ,Bus error" "No error,Error"
|
|
else
|
|
;Slave
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C1_SR1,I2C Status Register 1"
|
|
bitfld.byte 0x00 7. " EVF ,Event Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " TRA ,Transmitter/Receiver" "Received,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BUSY ,Bus busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 3. " BTF ,Byte transfer finished" "Not done,Succeeded"
|
|
bitfld.byte 0x00 2. " ADSL ,Address matched" "Mismatched,Matched"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M/SL ,Master/Slave" "Slave,Master"
|
|
rgroup.byte 0x08++0x0
|
|
line.byte 0x00 "I2C1_SR2,I2C Status Register 2"
|
|
bitfld.byte 0x00 5. " ENDAD ,End of address transmission" "Not ended,Ended"
|
|
bitfld.byte 0x00 4. " AF ,Acknowledge failure" "Not failed,Failed"
|
|
bitfld.byte 0x00 3. " STOPF ,Stop detection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " ARLO ,Arbitration lost" "Not detected,Detected"
|
|
bitfld.byte 0x00 1. " BERR ,Bus error" "No error,Error"
|
|
bitfld.byte 0x00 0. " GCAL ,General Call" "Not detected,Detected"
|
|
endif
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "I2C1_CCR,I2C Clock Control Register"
|
|
bitfld.byte 0x00 7. " FM/SM ,Fast/Standard I2C mode" "Standard,Fast"
|
|
hexmask.byte 0x00 0.--6. 1. " CC[6:0] ,Clock Divider"
|
|
group.byte 0x1c++0x0
|
|
line.byte 0x00 "I2C1_ECCR,I2C Extended Clock Control Register"
|
|
hexmask.byte 0x00 0.--4. 1. " CC[11:7] ,Clock Divider"
|
|
if (((d.b(d:(0xffff8800+0x4)))&0x42)==0x42)
|
|
; 10bit
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "I2C1_OAR1,I2C Own Address Register 1"
|
|
hexmask.byte 0x00 0.--7. 1. " ADD[7:0] ,Interface Address"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "I2C1_OAR2,I2C Own Address Register 2"
|
|
bitfld.byte 0x00 5.--7. " FR[2:0] ,Frequency Bits" "5-10 MHz,10-16.67 MHz,16.67-26.67 MHz,26.67-40 MHz,40-53.33 MHz,53.33-66 MHz,66-80 MHz,80-100 MHz"
|
|
bitfld.byte 0x00 1.--2. " ADD[9:8] ,Interface Address" "0,1,2,3"
|
|
else
|
|
; 7bit
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "I2C1_OAR1,I2C Own Address Register 1"
|
|
hexmask.byte 0x00 1.--7. 1. " ADD[7:1] ,Interface Address"
|
|
bitfld.byte 0x00 0. " ADD0 ,Address Direction" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "I2C1_OAR2,I2C Own Address Register 2"
|
|
bitfld.byte 0x00 5.--7. " FR[2:0] ,Frequency Bits" "5-10 MHz,10-16.67 MHz,16.67-26.67 MHz,26.67-40 MHz,40-53.33 MHz,53.33-66 MHz,66-80 MHz,80-100 MHz"
|
|
endif
|
|
group.byte 0x18++0x0
|
|
line.byte 0x00 "I2C1_DR,I2C Data Register"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "BSPI (Buffered Serial Peripheral Interface)"
|
|
tree "BSPI 0"
|
|
base ad:0xffffd800
|
|
width 12.
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "BSPI0_CSR1,BSPI Control/Status Register"
|
|
bitfld.word 0x00 12.--15. " RFE[3:0] ,Receive FIFO Enable" "1word,1-2 words,1-3 words,1-4 words,1-5 words,1-6 words,1-7 words,1-8 words,1-9 words,1-10 words,1-11 words,1-12 words,1-13 words,1-14 words,1-15 words,1-16 words"
|
|
bitfld.word 0x00 10.--11. " WL[1:0] ,Word Length" "8-bit,16-bit,?..."
|
|
bitfld.word 0x00 9. " CPHA ,Clock Phase Select" "First edge,Second edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CPOL ,Clock Polarity Select" "Active high,Active low"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " REIE ,Receive Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " RIE[1:0] ,BSPI Receive Interrupt Enable" "Disabled,Not empty,Reserved,Full"
|
|
bitfld.word 0x00 1. " MSTR ,Master / Slave Select" "Slave,Master"
|
|
bitfld.word 0x00 0. " BSPE ,BSPI System Enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "BSPI0_CSR2,BSPI Control/Status Register 2"
|
|
bitfld.word 0x00 14.--15. " TIE[1:0] ,BSPI Transmit Interrupt Enable" "Disabled,Empty,Underflow,Full"
|
|
bitfld.word 0x00 10.--13. " TFE[3:0] ,Transmit FIFO Enable" "1 word,1-2 words,1-3 words,1-4 words,1-5 words,1-6 words,1-7 words,1-8 words,1-9 words,1-10 words,1-11 words,1-12 words,1-13 words,1-14 words,1-15 words,1-16 words"
|
|
bitfld.word 0x00 9. " TFNE ,Transmit FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 7. " TUFL ,Transmit Underflow" "No underflow,Underflow"
|
|
bitfld.word 0x00 6. " TFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ROFL ,Receiver Overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 4. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RFNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 2. " BERR ,Bus Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DFIFO ,Disable for the FIFO" "Enabled,Disabled"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "BSPI0_CSR3,BSPI Contro/Status Register 3"
|
|
bitfld.word 0x00 7. " RREQ_EN ,Receive REQuest Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TREQ_EN ,Transmit REQuest Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4.--5. " RBURST_LEN ,Receive BURST Length" "1 word,4 words,8 words,16 words"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " TBURST_LEN ,Transmit BURST Length" "1 word,4 words,8 words,16 words"
|
|
bitfld.word 0x00 1. " DMA_EN ,DMA interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MASK_SS ,MASK Slave Select" "Used,Masked"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "BSPI0_CLK,BSPI Mater Clock Divider Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DIV[7:0] ,Divide Factor"
|
|
if (((d.w(d:(0xffffd800+0x08)))&0xc00)==0x400)
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "BSPI0_TXR,BSPI Transmit Register"
|
|
hexmask.word 0x00 0.--15. 1. " TX[15:0] ,Transmit Data"
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "BSPI0_RXR,BSPI Receive Register"
|
|
hexmask.word 0x00 0.--15. 1. " RX[15:0] ,Receive Data"
|
|
elif (((d.w(d:(0xffffd800+0x08)))&0xc00)==0x0)
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "BSPI0_TXR,BSPI Transmit Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Data"
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "BSPI0_RXR,BSPI Receive Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX[7:0] ,Receive Data"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "BSPI 1"
|
|
base ad:0xffffdc00
|
|
width 12.
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "BSPI1_CSR1,BSPI Control/Status Register"
|
|
bitfld.word 0x00 12.--15. " RFE[3:0] ,Receive FIFO Enable" "1word,1-2 words,1-3 words,1-4 words,1-5 words,1-6 words,1-7 words,1-8 words,1-9 words,1-10 words,1-11 words,1-12 words,1-13 words,1-14 words,1-15 words,1-16 words"
|
|
bitfld.word 0x00 10.--11. " WL[1:0] ,Word Length" "8-bit,16-bit,?..."
|
|
bitfld.word 0x00 9. " CPHA ,Clock Phase Select" "First edge,Second edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CPOL ,Clock Polarity Select" "Active high,Active low"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " REIE ,Receive Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " RIE[1:0] ,BSPI Receive Interrupt Enable" "Disabled,Not empty,Reserved,Full"
|
|
bitfld.word 0x00 1. " MSTR ,Master / Slave Select" "Slave,Master"
|
|
bitfld.word 0x00 0. " BSPE ,BSPI System Enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "BSPI1_CSR2,BSPI Control/Status Register 2"
|
|
bitfld.word 0x00 14.--15. " TIE[1:0] ,BSPI Transmit Interrupt Enable" "Disabled,Empty,Underflow,Full"
|
|
bitfld.word 0x00 10.--13. " TFE[3:0] ,Transmit FIFO Enable" "1 word,1-2 words,1-3 words,1-4 words,1-5 words,1-6 words,1-7 words,1-8 words,1-9 words,1-10 words,1-11 words,1-12 words,1-13 words,1-14 words,1-15 words,1-16 words"
|
|
bitfld.word 0x00 9. " TFNE ,Transmit FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 7. " TUFL ,Transmit Underflow" "No underflow,Underflow"
|
|
bitfld.word 0x00 6. " TFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ROFL ,Receiver Overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 4. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RFNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 2. " BERR ,Bus Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DFIFO ,Disable for the FIFO" "Enabled,Disabled"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "BSPI1_CSR3,BSPI Contro/Status Register 3"
|
|
bitfld.word 0x00 7. " RREQ_EN ,Receive REQuest Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TREQ_EN ,Transmit REQuest Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4.--5. " RBURST_LEN ,Receive BURST Length" "1 word,4 words,8 words,16 words"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " TBURST_LEN ,Transmit BURST Length" "1 word,4 words,8 words,16 words"
|
|
bitfld.word 0x00 1. " DMA_EN ,DMA interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MASK_SS ,MASK Slave Select" "Used,Masked"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "BSPI1_CLK,BSPI Mater Clock Divider Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DIV[7:0] ,Divide Factor"
|
|
if (((d.w(d:(0xffffdc00+0x08)))&0xc00)==0x400)
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "BSPI1_TXR,BSPI Transmit Register"
|
|
hexmask.word 0x00 0.--15. 1. " TX[15:0] ,Transmit Data"
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "BSPI1_RXR,BSPI Receive Register"
|
|
hexmask.word 0x00 0.--15. 1. " RX[15:0] ,Receive Data"
|
|
elif (((d.w(d:(0xffffdc00+0x08)))&0xc00)==0x0)
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "BSPI1_TXR,BSPI Transmit Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Data"
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "BSPI1_RXR,BSPI Receive Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX[7:0] ,Receive Data"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "BSPI 2"
|
|
base ad:0xffffe000
|
|
width 12.
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "BSPI2_CSR1,BSPI Control/Status Register"
|
|
bitfld.word 0x00 12.--15. " RFE[3:0] ,Receive FIFO Enable" "1word,1-2 words,1-3 words,1-4 words,1-5 words,1-6 words,1-7 words,1-8 words,1-9 words,1-10 words,1-11 words,1-12 words,1-13 words,1-14 words,1-15 words,1-16 words"
|
|
bitfld.word 0x00 10.--11. " WL[1:0] ,Word Length" "8-bit,16-bit,?..."
|
|
bitfld.word 0x00 9. " CPHA ,Clock Phase Select" "First edge,Second edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CPOL ,Clock Polarity Select" "Active high,Active low"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " REIE ,Receive Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " RIE[1:0] ,BSPI Receive Interrupt Enable" "Disabled,Not empty,Reserved,Full"
|
|
bitfld.word 0x00 1. " MSTR ,Master / Slave Select" "Slave,Master"
|
|
bitfld.word 0x00 0. " BSPE ,BSPI System Enable" "Disabled,Enabled"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "BSPI2_CSR2,BSPI Control/Status Register 2"
|
|
bitfld.word 0x00 14.--15. " TIE[1:0] ,BSPI Transmit Interrupt Enable" "Disabled,Empty,Underflow,Full"
|
|
bitfld.word 0x00 10.--13. " TFE[3:0] ,Transmit FIFO Enable" "1 word,1-2 words,1-3 words,1-4 words,1-5 words,1-6 words,1-7 words,1-8 words,1-9 words,1-10 words,1-11 words,1-12 words,1-13 words,1-14 words,1-15 words,1-16 words"
|
|
bitfld.word 0x00 9. " TFNE ,Transmit FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 7. " TUFL ,Transmit Underflow" "No underflow,Underflow"
|
|
bitfld.word 0x00 6. " TFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ROFL ,Receiver Overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 4. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RFNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 2. " BERR ,Bus Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DFIFO ,Disable for the FIFO" "Enabled,Disabled"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "BSPI2_CSR3,BSPI Contro/Status Register 3"
|
|
bitfld.word 0x00 7. " RREQ_EN ,Receive REQuest Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TREQ_EN ,Transmit REQuest Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4.--5. " RBURST_LEN ,Receive BURST Length" "1 word,4 words,8 words,16 words"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " TBURST_LEN ,Transmit BURST Length" "1 word,4 words,8 words,16 words"
|
|
bitfld.word 0x00 1. " DMA_EN ,DMA interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MASK_SS ,MASK Slave Select" "Used,Masked"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "BSPI2_CLK,BSPI Mater Clock Divider Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DIV[7:0] ,Divide Factor"
|
|
if (((d.w(d:(0xffffe000+0x08)))&0xc00)==0x400)
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "BSPI2_TXR,BSPI Transmit Register"
|
|
hexmask.word 0x00 0.--15. 1. " TX[15:0] ,Transmit Data"
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "BSPI2_RXR,BSPI Receive Register"
|
|
hexmask.word 0x00 0.--15. 1. " RX[15:0] ,Receive Data"
|
|
elif (((d.w(d:(0xffffe000+0x08)))&0xc00)==0x0)
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "BSPI2_TXR,BSPI Transmit Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Data"
|
|
rgroup.word 0x00++0x1
|
|
line.word 0x00 "BSPI2_RXR,BSPI Receive Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX[7:0] ,Receive Data"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "UART"
|
|
tree "UART 0"
|
|
base ad:0xffff9c00
|
|
width 14.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "UART0_BR,UART Baud Rate Register"
|
|
if (((d.w(d:(0xffff9c00+0xc)))&0x7)==0x1)
|
|
; 8-bit data
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART0_TxBUFR,UART Tx Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffff9c00+0xc)))&0x7)==0x3)
|
|
; 7-bit data + parity
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART0_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 7. " TX[7] ,Parity" "0,1"
|
|
hexmask.word.byte 0x00 0.--6. 1. " TX[6:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffff9c00+0xc)))&0x7)==0x4)
|
|
; 9-bit data
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART0_TxBUFR,UART Tx Buffer Register"
|
|
hexmask.word 0x00 0.--8. 1. " TX[8:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffff9c00+0xc)))&0x7)==0x5)
|
|
; 8-bit data + wake up
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART0_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 8. " TX[8] ,Wake-up" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffff9c00+0xc)))&0x7)==0x7)
|
|
; 8-bit data + parity
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART0_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 8. " TX[8] ,Parity" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
else
|
|
; reserved
|
|
hgroup.word 0x04++0x1
|
|
hide.word 0x00 "UART0_TxBUFR,UART Tx Buffer Register"
|
|
endif
|
|
hgroup.word 0x08++0x1
|
|
hide.word 0x00 "UART0_RxBUFR,UART Rx Buffer Register"
|
|
in
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "UART0_CR,UART Control Register"
|
|
bitfld.word 0x00 10. " FIFOEnable ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " SCEnable ,Smart Card Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RxEnable ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " Run ,Baudrate Generator Run" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " LoopBack ,LoopBack Mode Enable" "Standard,Loopback"
|
|
bitfld.word 0x00 5. " ParityOdd ,Parity Selection" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " StopBits ,Number of Stop Bits" "0.5,1,1.5,2"
|
|
bitfld.word 0x00 0.--2. " Mode ,UART Mode Control" "Reserved,8 bit data,Reserved,7 bit data + parity,9 bit data,8 bit data + wake up,Reserved,8 bit data + parity"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "UART0_IER,UART Interrupt Enable Register"
|
|
bitfld.word 0x00 8. " RxHalfFullIE ,Receiver buffer Half Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " TimeoutIdleIE ,Timeout Idle Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TimeoutNotEmptyIE ,Timeout Not Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " OverrunErrorIE ,Overrun Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FrameErrorIE ,Framing Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ParityErrorIE ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxHalfEmptyIE ,Transmitter buffer Half Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TxEmptyIE ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RxBufNotEmptyIE ,Receiver Buffer Not Empty Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "UART0_SR,UART Status Register"
|
|
bitfld.word 0x00 9. " TxFull ,TxFIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 8. " RxHalfFull ,RxFIFO Half Full" "< 8 words,>= 8 words"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TimeoutIdle ,Timeout Idle" "Not empty,Empty"
|
|
bitfld.word 0x00 6. " TimeoutNotEmpty ,Timeout Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OverrunError ,Overrun Error" "No overrun,Overrun"
|
|
bitfld.word 0x00 4. " FrameError ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ParityError ,Parity Error" "No error,Error"
|
|
bitfld.word 0x00 2. " TxHalfEmpty ,TxFIFO Half Empty" "> 8 words,<= 8 words"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxEmpty ,TxFIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " RxBufNotEmpty ,Rx Buffer Not Empty" "Empty,Not empty"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "UART0_TOR,UART Timeout Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UART0_Timeout ,Timeout Period"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "UART0_TxRST,UART Tx Reset Register"
|
|
hgroup.word 0x24++0x1
|
|
hide.word 0x00 "UART0_RxSTR,UART Rx Reset Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART 1"
|
|
base ad:0xffff9e00
|
|
width 14.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "UART1_BR,UART Baud Rate Register"
|
|
if (((d.w(d:(0xffff9e00+0xc)))&0x7)==0x1)
|
|
; 8-bit data
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART1_TxBUFR,UART Tx Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffff9e00+0xc)))&0x7)==0x3)
|
|
; 7-bit data + parity
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART1_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 7. " TX[7] ,Parity" "0,1"
|
|
hexmask.word.byte 0x00 0.--6. 1. " TX[6:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffff9e00+0xc)))&0x7)==0x4)
|
|
; 9-bit data
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART1_TxBUFR,UART Tx Buffer Register"
|
|
hexmask.word 0x00 0.--8. 1. " TX[8:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffff9e00+0xc)))&0x7)==0x5)
|
|
; 8-bit data + wake up
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART1_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 8. " TX[8] ,Wake-up" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffff9e00+0xc)))&0x7)==0x7)
|
|
; 8-bit data + parity
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART1_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 8. " TX[8] ,Parity" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
else
|
|
; reserved
|
|
hgroup.word 0x04++0x1
|
|
hide.word 0x00 "UART1_TxBUFR,UART Tx Buffer Register"
|
|
endif
|
|
hgroup.word 0x08++0x1
|
|
hide.word 0x00 "UART1_RxBUFR,UART Rx Buffer Register"
|
|
in
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "UART1_CR,UART Control Register"
|
|
bitfld.word 0x00 10. " FIFOEnable ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " SCEnable ,Smart Card Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RxEnable ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " Run ,Baudrate Generator Run" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " LoopBack ,LoopBack Mode Enable" "Standard,Loopback"
|
|
bitfld.word 0x00 5. " ParityOdd ,Parity Selection" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " StopBits ,Number of Stop Bits" "0.5,1,1.5,2"
|
|
bitfld.word 0x00 0.--2. " Mode ,UART Mode Control" "Reserved,8 bit data,Reserved,7 bit data + parity,9 bit data,8 bit data + wake up,Reserved,8 bit data + parity"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "UART1_IER,UART Interrupt Enable Register"
|
|
bitfld.word 0x00 8. " RxHalfFullIE ,Receiver buffer Half Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " TimeoutIdleIE ,Timeout Idle Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TimeoutNotEmptyIE ,Timeout Not Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " OverrunErrorIE ,Overrun Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FrameErrorIE ,Framing Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ParityErrorIE ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxHalfEmptyIE ,Transmitter buffer Half Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TxEmptyIE ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RxBufNotEmptyIE ,Receiver Buffer Not Empty Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "UART1_SR,UART Status Register"
|
|
bitfld.word 0x00 9. " TxFull ,TxFIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 8. " RxHalfFull ,RxFIFO Half Full" "< 8 words,>= 8 words"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TimeoutIdle ,Timeout Idle" "Not empty,Empty"
|
|
bitfld.word 0x00 6. " TimeoutNotEmpty ,Timeout Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OverrunError ,Overrun Error" "No overrun,Overrun"
|
|
bitfld.word 0x00 4. " FrameError ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ParityError ,Parity Error" "No error,Error"
|
|
bitfld.word 0x00 2. " TxHalfEmpty ,TxFIFO Half Empty" "> 8 words,<= 8 words"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxEmpty ,TxFIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " RxBufNotEmpty ,Rx Buffer Not Empty" "Empty,Not empty"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "UART1_TOR,UART Timeout Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UART1_Timeout ,Timeout Period"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "UART1_TxRST,UART Tx Reset Register"
|
|
hgroup.word 0x24++0x1
|
|
hide.word 0x00 "UART1_RxSTR,UART Rx Reset Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART 2"
|
|
base ad:0xffffa000
|
|
width 14.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "UART2_BR,UART Baud Rate Register"
|
|
if (((d.w(d:(0xffffa000+0xc)))&0x7)==0x1)
|
|
; 8-bit data
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART2_TxBUFR,UART Tx Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffffa000+0xc)))&0x7)==0x3)
|
|
; 7-bit data + parity
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART2_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 7. " TX[7] ,Parity" "0,1"
|
|
hexmask.word.byte 0x00 0.--6. 1. " TX[6:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffffa000+0xc)))&0x7)==0x4)
|
|
; 9-bit data
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART2_TxBUFR,UART Tx Buffer Register"
|
|
hexmask.word 0x00 0.--8. 1. " TX[8:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffffa000+0xc)))&0x7)==0x5)
|
|
; 8-bit data + wake up
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART2_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 8. " TX[8] ,Wake-up" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffffa000+0xc)))&0x7)==0x7)
|
|
; 8-bit data + parity
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART2_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 8. " TX[8] ,Parity" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
else
|
|
; reserved
|
|
hgroup.word 0x04++0x1
|
|
hide.word 0x00 "UART2_TxBUFR,UART Tx Buffer Register"
|
|
endif
|
|
hgroup.word 0x08++0x1
|
|
hide.word 0x00 "UART2_RxBUFR,UART Rx Buffer Register"
|
|
in
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "UART2_CR,UART Control Register"
|
|
bitfld.word 0x00 10. " FIFOEnable ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " SCEnable ,Smart Card Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RxEnable ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " Run ,Baudrate Generator Run" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " LoopBack ,LoopBack Mode Enable" "Standard,Loopback"
|
|
bitfld.word 0x00 5. " ParityOdd ,Parity Selection" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " StopBits ,Number of Stop Bits" "0.5,1,1.5,2"
|
|
bitfld.word 0x00 0.--2. " Mode ,UART Mode Control" "Reserved,8 bit data,Reserved,7 bit data + parity,9 bit data,8 bit data + wake up,Reserved,8 bit data + parity"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "UART2_IER,UART Interrupt Enable Register"
|
|
bitfld.word 0x00 8. " RxHalfFullIE ,Receiver buffer Half Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " TimeoutIdleIE ,Timeout Idle Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TimeoutNotEmptyIE ,Timeout Not Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " OverrunErrorIE ,Overrun Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FrameErrorIE ,Framing Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ParityErrorIE ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxHalfEmptyIE ,Transmitter buffer Half Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TxEmptyIE ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RxBufNotEmptyIE ,Receiver Buffer Not Empty Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "UART2_SR,UART Status Register"
|
|
bitfld.word 0x00 9. " TxFull ,TxFIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 8. " RxHalfFull ,RxFIFO Half Full" "< 8 words,>= 8 words"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TimeoutIdle ,Timeout Idle" "Not empty,Empty"
|
|
bitfld.word 0x00 6. " TimeoutNotEmpty ,Timeout Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OverrunError ,Overrun Error" "No overrun,Overrun"
|
|
bitfld.word 0x00 4. " FrameError ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ParityError ,Parity Error" "No error,Error"
|
|
bitfld.word 0x00 2. " TxHalfEmpty ,TxFIFO Half Empty" "> 8 words,<= 8 words"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxEmpty ,TxFIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " RxBufNotEmpty ,Rx Buffer Not Empty" "Empty,Not empty"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "UART2_TOR,UART Timeout Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UART2_Timeout ,Timeout Period"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "UART2_TxRST,UART Tx Reset Register"
|
|
hgroup.word 0x24++0x1
|
|
hide.word 0x00 "UART2_RxSTR,UART Rx Reset Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART 3"
|
|
base ad:0xffffa200
|
|
width 14.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "UART3_BR,UART Baud Rate Register"
|
|
if (((d.w(d:(0xffffa200+0xc)))&0x7)==0x1)
|
|
; 8-bit data
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART3_TxBUFR,UART Tx Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffffa200+0xc)))&0x7)==0x3)
|
|
; 7-bit data + parity
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART3_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 7. " TX[7] ,Parity" "0,1"
|
|
hexmask.word.byte 0x00 0.--6. 1. " TX[6:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffffa200+0xc)))&0x7)==0x4)
|
|
; 9-bit data
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART3_TxBUFR,UART Tx Buffer Register"
|
|
hexmask.word 0x00 0.--8. 1. " TX[8:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffffa200+0xc)))&0x7)==0x5)
|
|
; 8-bit data + wake up
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART3_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 8. " TX[8] ,Wake-up" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
elif (((d.w(d:(0xffffa200+0xc)))&0x7)==0x7)
|
|
; 8-bit data + parity
|
|
wgroup.word 0x04++0x1
|
|
line.word 0x00 "UART3_TxBUFR,UART Tx Buffer Register"
|
|
bitfld.word 0x00 8. " TX[8] ,Parity" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX[7:0] ,Transmit Buffer Data"
|
|
else
|
|
; reserved
|
|
hgroup.word 0x04++0x1
|
|
hide.word 0x00 "UART3_TxBUFR,UART Tx Buffer Register"
|
|
endif
|
|
hgroup.word 0x08++0x1
|
|
hide.word 0x00 "UART3_RxBUFR,UART Rx Buffer Register"
|
|
in
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "UART3_CR,UART Control Register"
|
|
bitfld.word 0x00 10. " FIFOEnable ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " SCEnable ,Smart Card Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RxEnable ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " Run ,Baudrate Generator Run" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " LoopBack ,LoopBack Mode Enable" "Standard,Loopback"
|
|
bitfld.word 0x00 5. " ParityOdd ,Parity Selection" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " StopBits ,Number of Stop Bits" "0.5,1,1.5,2"
|
|
bitfld.word 0x00 0.--2. " Mode ,UART Mode Control" "Reserved,8 bit data,Reserved,7 bit data + parity,9 bit data,8 bit data + wake up,Reserved,8 bit data + parity"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "UART3_IER,UART Interrupt Enable Register"
|
|
bitfld.word 0x00 8. " RxHalfFullIE ,Receiver buffer Half Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " TimeoutIdleIE ,Timeout Idle Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TimeoutNotEmptyIE ,Timeout Not Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " OverrunErrorIE ,Overrun Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FrameErrorIE ,Framing Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ParityErrorIE ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TxHalfEmptyIE ,Transmitter buffer Half Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TxEmptyIE ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RxBufNotEmptyIE ,Receiver Buffer Not Empty Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "UART3_SR,UART Status Register"
|
|
bitfld.word 0x00 9. " TxFull ,TxFIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 8. " RxHalfFull ,RxFIFO Half Full" "< 8 words,>= 8 words"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TimeoutIdle ,Timeout Idle" "Not empty,Empty"
|
|
bitfld.word 0x00 6. " TimeoutNotEmpty ,Timeout Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OverrunError ,Overrun Error" "No overrun,Overrun"
|
|
bitfld.word 0x00 4. " FrameError ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ParityError ,Parity Error" "No error,Error"
|
|
bitfld.word 0x00 2. " TxHalfEmpty ,TxFIFO Half Empty" "> 8 words,<= 8 words"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TxEmpty ,TxFIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " RxBufNotEmpty ,Rx Buffer Not Empty" "Empty,Not empty"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "UART3_TOR,UART Timeout Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UART3_Timeout ,Timeout Period"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "UART3_TxRST,UART Tx Reset Register"
|
|
hgroup.word 0x24++0x1
|
|
hide.word 0x00 "UART3_RxSTR,UART Rx Reset Register"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
sif ((cpu()=="STR730")||(cpu()=="STR735"))
|
|
tree "ADC (Analog/Digital Converter)"
|
|
base ad:0xfffff800
|
|
width 10.
|
|
rgroup.word 0x50++0x1
|
|
line.word 0x00 "ADC_D0,ADC Data Register 0"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x54++0x1
|
|
line.word 0x00 "ADC_D1,ADC Data Register 1"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x58++0x1
|
|
line.word 0x00 "ADC_D2,ADC Data Register 2"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x5c++0x1
|
|
line.word 0x00 "ADC_D3,ADC Data Register 3"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x60++0x1
|
|
line.word 0x00 "ADC_D4,ADC Data Register 4"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x64++0x1
|
|
line.word 0x00 "ADC_D5,ADC Data Register 5"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x68++0x1
|
|
line.word 0x00 "ADC_D6,ADC Data Register 6"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x6c++0x1
|
|
line.word 0x00 "ADC_D7,ADC Data Register 7"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x70++0x1
|
|
line.word 0x00 "ADC_D8,ADC Data Register 8"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x74++0x1
|
|
line.word 0x00 "ADC_D9,ADC Data Register 9"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x78++0x1
|
|
line.word 0x00 "ADC_D10,ADC Data Register 10"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x7c++0x1
|
|
line.word 0x00 "ADC_D11,ADC Data Register 11"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x80++0x1
|
|
line.word 0x00 "ADC_D12,ADC Data Register 12"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x84++0x1
|
|
line.word 0x00 "ADC_D13,ADC Data Register 13"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x88++0x1
|
|
line.word 0x00 "ADC_D14,ADC Data Register 14"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x8c++0x1
|
|
line.word 0x00 "ADC_D15,ADC Data Register 15"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "ADC_CLR0,Control Logic Register 0"
|
|
bitfld.word 0x00 1. " CAL ,Calibrate" "No calibration,Started"
|
|
bitfld.word 0x00 0. " START ,Start Conversion" "Stopped,Started"
|
|
if (((d.w(d:(0xfffff800+0x4)))&0x8000)==0x8000)
|
|
;Sampling prescaler
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "ADC_CLR1,Control Logic Register 1"
|
|
bitfld.word 0x00 15. " SPEN ,Sample Prescaler Enable" "Conversion,Sampling"
|
|
bitfld.word 0x00 0.--2. " SMPP[2:0] ,Sampling Prescaler" "MCLK,MCLK/2,MCLK/4,MCLK/6,MCLK/8,MCLK/10,MCLK/12,MCLK/14"
|
|
else
|
|
;Conversion prescaler
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "ADC_CLR1,Control Logic Register 1"
|
|
bitfld.word 0x00 15. " SPEN ,Sample Prescaler Enable" "Conversion,Sampling"
|
|
bitfld.word 0x00 5.--7. " CNVP[2:0] ,Conversion Prescaler" "MCLK,MCLK/2,MCLK/4,MCLK/6,MCLK/8,MCLK/10,MCLK/12,MCLK/14"
|
|
endif
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "ADC_CLR2,Control Logic Register 2"
|
|
bitfld.word 0x00 15. " MODE ,One-shot/Scan" "One-shot,Scan"
|
|
bitfld.word 0x00 6.--9. " NCH[3:0] ,Number of Channels to be Converted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 0.--3. " FCH[3:0] ,First Channel to be Converted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "ADC_CLR3,Control Logic Register 3"
|
|
bitfld.word 0x00 15. " JSTART ,Injection Start" "No effect,Started"
|
|
bitfld.word 0x00 6.--9. " JNCH[3:0] ,Number of Injected Channels to Convert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 0.--3. " JFCH[3:0] ,First Injected Channel to Convert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "ADC_CLR4,Control Logic Register 4"
|
|
bitfld.word 0x00 15. " PWDN ,Power Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ACKO ,Auto Clock Off Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " NOAVRG ,No Calibration Average Enable" "Enabled,Disabled"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "ADC_TRA0,Threshold Register A0"
|
|
bitfld.word 0x00 10.--13. " THRCH ,Channel Linked to Threshold Detection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.word 0x00 0.--9. 1. " THRH[9:0] ,High Threshold Value"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "ADC_TRA1,Threshold Register A1"
|
|
bitfld.word 0x00 10.--13. " THRCH ,Channel Linked to Threshold Detection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.word 0x00 0.--9. 1. " THRH[9:0] ,High Threshold Value"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "ADC_TRA2,Threshold Register A2"
|
|
bitfld.word 0x00 10.--13. " THRCH ,Channel Linked to Threshold Detection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.word 0x00 0.--9. 1. " THRH[9:0] ,High Threshold Value"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "ADC_TRA3,Threshold Register A3"
|
|
bitfld.word 0x00 10.--13. " THRCH ,Channel Linked to Threshold Detection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.word 0x00 0.--9. 1. " THRH[9:0] ,High Threshold Value"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "ADC_TRB0,Threshold Register B0"
|
|
bitfld.word 0x00 15. " THREN ,Threshold Enable" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " THRL[9:0] ,Low Threshold Value"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "ADC_TRB1,Threshold Register B1"
|
|
bitfld.word 0x00 15. " THREN ,Threshold Enable" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " THRL[9:0] ,Low Threshold Value"
|
|
group.word 0x2c++0x1
|
|
line.word 0x00 "ADC_TRB2,Threshold Register B2"
|
|
bitfld.word 0x00 15. " THREN ,Threshold Enable" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " THRL[9:0] ,Low Threshold Value"
|
|
group.word 0x30++0x1
|
|
line.word 0x00 "ADC_TRB3,Threshold Register B3"
|
|
bitfld.word 0x00 15. " THREN ,Threshold Enable" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " THRL[9:0] ,Low Threshold Value"
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "ADC_DMAR,DMA Channel Enable Register"
|
|
bitfld.word 0x00 15. " DMA15 ,Channel 15 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " DMA14 ,Channel 14 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " DMA13 ,Channel 13 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMA12 ,Channel 12 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " DMA11 ,Channel 11 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMA10 ,Channel 10 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DMA9 ,Channel 9 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " DMA8 ,Channel 8 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " DMA7 ,Channel 7 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " DMA6 ,Channel 6 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DMA5 ,Channel 5 DMA Enable" "Disalbed,Enabled"
|
|
bitfld.word 0x00 4. " DMA4 ,Channel 4 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DMA3 ,Channel 3 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " DMA2 ,Channel 2 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " DMA1 ,Channel 1 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DMA0 ,Channel 0 DMA Enable" "Disabled,Enabled"
|
|
group.word 0x44++0x1
|
|
line.word 0x00 "ADC_DMAE,DMA Global Enable Register"
|
|
bitfld.word 0x00 15. " DMAEN ,DMA Global Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--3. " DENCH ,DMA First Enabled Channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 10.
|
|
group.word 0x48++0x1
|
|
line.word 0x00 "ADC_PBR,Pending Bit Register"
|
|
bitfld.word 0x00 10.--11. " THR3[1:0] ,Threshold Detection Channel 3" "THRL <= Converted data < THRH,Converted data < THRL,Converted data >= THRH,?..."
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " THR2[1:0] ,Threshold Detection Channel 2" "THRL <= Converted data < THRH,Converted data < THRL,Converted data >= THRH,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " THR1[1:0] ,Threshold Detection Channel 1" "THRL <= Converted data < THRH,Converted data < THRL,Converted data >= THRH,?..."
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " THR0[1:0] ,Threshold Detection Channel 0" "THRL <= Converted data < THRH,Converted data < THRL,Converted data >= THRH,?..."
|
|
textline " "
|
|
bitfld.word 0x00 3. " JEOC ,End of Injected Channel Conversion" "No event,Ended"
|
|
bitfld.word 0x00 2. " JECH ,End of Injected Chain Conversion" "No event,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EOC ,End of Conversion" "No event,Ended"
|
|
bitfld.word 0x00 0. " ECH ,End of Chain Conversion" "No event,Ended"
|
|
width 10.
|
|
group.word 0x4c++0x1
|
|
line.word 0x00 "ADC_IMR,Interrupt Mask Register"
|
|
bitfld.word 0x00 11. " MSK3H ,Analog Watchdog 3 High Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " MSK3L ,Analog Watchdog 3 Low Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " MSK2H ,Analog Watchdog 2 High Threshold Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MSK2L ,Analog Watchdog 2 Low Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MSK1H ,Analog Watchdog 1 High Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MSK1L ,Analog Watchdog 1 Low Threshold Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MSK0H ,Analog Watchdog 0 High Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MSK0L ,Analog Watchdog 0 Low Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " MSKJEOC ,Injected End of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MSKJECH ,Injected End of Chain Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MSKEOC ,End of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MSKECH ,End of Chain Conversion Interrupt Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
elif ((cpu()=="STR731")||(cpu()=="STR736"))
|
|
tree "ADC (Analog/Digital Converter)"
|
|
base ad:0xfffff800
|
|
width 10.
|
|
rgroup.word 0x50++0x1
|
|
line.word 0x00 "ADC_D0,ADC Data Register 0"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x54++0x1
|
|
line.word 0x00 "ADC_D1,ADC Data Register 1"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x58++0x1
|
|
line.word 0x00 "ADC_D2,ADC Data Register 2"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x5c++0x1
|
|
line.word 0x00 "ADC_D3,ADC Data Register 3"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x60++0x1
|
|
line.word 0x00 "ADC_D4,ADC Data Register 4"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x64++0x1
|
|
line.word 0x00 "ADC_D5,ADC Data Register 5"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x68++0x1
|
|
line.word 0x00 "ADC_D6,ADC Data Register 6"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x6c++0x1
|
|
line.word 0x00 "ADC_D7,ADC Data Register 7"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x70++0x1
|
|
line.word 0x00 "ADC_D8,ADC Data Register 8"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x74++0x1
|
|
line.word 0x00 "ADC_D9,ADC Data Register 9"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x78++0x1
|
|
line.word 0x00 "ADC_D10,ADC Data Register 10"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
rgroup.word 0x7c++0x1
|
|
line.word 0x00 "ADC_D11,ADC Data Register 11"
|
|
hexmask.word 0x00 0.--9. 1. " CDATA ,Channel Converted Data"
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "ADC_CLR0,Control Logic Register 0"
|
|
bitfld.word 0x00 1. " CAL ,Calibrate" "No calibration,Started"
|
|
bitfld.word 0x00 0. " START ,Start Conversion" "Stopped,Started"
|
|
if (((d.w(d:(0xfffff800+0x4)))&0x8000)==0x8000)
|
|
;Sampling prescaler
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "ADC_CLR1,Control Logic Register 1"
|
|
bitfld.word 0x00 15. " SPEN ,Sample Prescaler Enable" "Conversion,Sampling"
|
|
bitfld.word 0x00 0.--2. " SMPP[2:0] ,Sampling Prescaler" "MCLK,MCLK/2,MCLK/4,MCLK/6,MCLK/8,MCLK/10,MCLK/12,MCLK/14"
|
|
else
|
|
;Conversion prescaler
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "ADC_CLR1,Control Logic Register 1"
|
|
bitfld.word 0x00 15. " SPEN ,Sample Prescaler Enable" "Conversion,Sampling"
|
|
bitfld.word 0x00 5.--7. " CNVP[2:0] ,Conversion Prescaler" "MCLK,MCLK/2,MCLK/4,MCLK/6,MCLK/8,MCLK/10,MCLK/12,MCLK/14"
|
|
endif
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "ADC_CLR2,Control Logic Register 2"
|
|
bitfld.word 0x00 15. " MODE ,One-shot/Scan" "One-shot,Scan"
|
|
bitfld.word 0x00 6.--9. " NCH[3:0] ,Number of Channels to be Converted" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
bitfld.word 0x00 0.--3. " FCH[3:0] ,First Channel to be Converted" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "ADC_CLR3,Control Logic Register 3"
|
|
bitfld.word 0x00 15. " JSTART ,Injection Start" "No effect,Started"
|
|
bitfld.word 0x00 6.--9. " JNCH[3:0] ,Number of Injected Channels to Convert" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
bitfld.word 0x00 0.--3. " JFCH[3:0] ,First Injected Channel to Convert" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "ADC_CLR4,Control Logic Register 4"
|
|
bitfld.word 0x00 15. " PWDN ,Power Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ACKO ,Auto Clock Off Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " NOAVRG ,No Calibration Average Enable" "Enabled,Disabled"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "ADC_TRA0,Threshold Register A0"
|
|
bitfld.word 0x00 10.--13. " THRCH ,Channel Linked to Threshold Detection" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.word 0x00 0.--9. 1. " THRH[9:0] ,High Threshold Value"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "ADC_TRA1,Threshold Register A1"
|
|
bitfld.word 0x00 10.--13. " THRCH ,Channel Linked to Threshold Detection" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.word 0x00 0.--9. 1. " THRH[9:0] ,High Threshold Value"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "ADC_TRA2,Threshold Register A2"
|
|
bitfld.word 0x00 10.--13. " THRCH ,Channel Linked to Threshold Detection" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.word 0x00 0.--9. 1. " THRH[9:0] ,High Threshold Value"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "ADC_TRA3,Threshold Register A3"
|
|
bitfld.word 0x00 10.--13. " THRCH ,Channel Linked to Threshold Detection" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.word 0x00 0.--9. 1. " THRH[9:0] ,High Threshold Value"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "ADC_TRB0,Threshold Register B0"
|
|
bitfld.word 0x00 15. " THREN ,Threshold Enable" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " THRL[9:0] ,Low Threshold Value"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "ADC_TRB1,Threshold Register B1"
|
|
bitfld.word 0x00 15. " THREN ,Threshold Enable" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " THRL[9:0] ,Low Threshold Value"
|
|
group.word 0x2c++0x1
|
|
line.word 0x00 "ADC_TRB2,Threshold Register B2"
|
|
bitfld.word 0x00 15. " THREN ,Threshold Enable" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " THRL[9:0] ,Low Threshold Value"
|
|
group.word 0x30++0x1
|
|
line.word 0x00 "ADC_TRB3,Threshold Register B3"
|
|
bitfld.word 0x00 15. " THREN ,Threshold Enable" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " THRL[9:0] ,Low Threshold Value"
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "ADC_DMAR,DMA Channel Enable Register"
|
|
bitfld.word 0x00 11. " DMA11 ,Channel 11 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMA10 ,Channel 10 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DMA9 ,Channel 9 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DMA8 ,Channel 8 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " DMA7 ,Channel 7 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " DMA6 ,Channel 6 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " DMA5 ,Channel 5 DMA Enable" "Disalbed,Enabled"
|
|
bitfld.word 0x00 4. " DMA4 ,Channel 4 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " DMA3 ,Channel 3 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " DMA2 ,Channel 2 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " DMA1 ,Channel 1 DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " DMA0 ,Channel 0 DMA Enable" "Disabled,Enabled"
|
|
group.word 0x44++0x1
|
|
line.word 0x00 "ADC_DMAE,DMA Global Enable Register"
|
|
bitfld.word 0x00 15. " DMAEN ,DMA Global Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--3. " DENCH ,DMA First Enabled Channel" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
width 10.
|
|
group.word 0x48++0x1
|
|
line.word 0x00 "ADC_PBR,Pending Bit Register"
|
|
bitfld.word 0x00 10.--11. " THR3[1:0] ,Threshold Detection Channel 3" "THRL <= Converted data < THRH,Converted data < THRL,Converted data >= THRH,?..."
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " THR2[1:0] ,Threshold Detection Channel 2" "THRL <= Converted data < THRH,Converted data < THRL,Converted data >= THRH,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " THR1[1:0] ,Threshold Detection Channel 1" "THRL <= Converted data < THRH,Converted data < THRL,Converted data >= THRH,?..."
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " THR0[1:0] ,Threshold Detection Channel 0" "THRL <= Converted data < THRH,Converted data < THRL,Converted data >= THRH,?..."
|
|
textline " "
|
|
bitfld.word 0x00 3. " JEOC ,End of Injected Channel Conversion" "No event,Ended"
|
|
bitfld.word 0x00 2. " JECH ,End of Injected Chain Conversion" "No event,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EOC ,End of Conversion" "No event,Ended"
|
|
bitfld.word 0x00 0. " ECH ,End of Chain Conversion" "No event,Ended"
|
|
width 10.
|
|
group.word 0x4c++0x1
|
|
line.word 0x00 "ADC_IMR,Interrupt Mask Register"
|
|
bitfld.word 0x00 11. " MSK3H ,Analog Watchdog 3 High Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " MSK3L ,Analog Watchdog 3 Low Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " MSK2H ,Analog Watchdog 2 High Threshold Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MSK2L ,Analog Watchdog 2 Low Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MSK1H ,Analog Watchdog 1 High Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MSK1L ,Analog Watchdog 1 Low Threshold Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MSK0H ,Analog Watchdog 0 High Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MSK0L ,Analog Watchdog 0 Low Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " MSKJEOC ,Injected End of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MSKJECH ,Injected End of Chain Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MSKEOC ,End of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MSKECH ,End of Chain Conversion Interrupt Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.open "APB Bridge"
|
|
tree "APB Bridge 0"
|
|
base ad:0xffff8000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "APB0_BSR,Brisge Status Register"
|
|
eventfld.long 0x00 5. " APBT ,APB Time-out Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x00 4. " OUTM ,Out of Memory" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " ABORT ,Abort Flag" "Not occurred,Occurred"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "APB0_TOR,Time-out Register"
|
|
bitfld.long 0x00 8. " ABTEN ,Abort Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " TOUT_CNT ,Time-out Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "APB0_OMR,Out of Memory Register"
|
|
hexmask.long.word 0x00 8.--23. 1. " PerAdd ,Peripheral Address"
|
|
bitfld.long 0x00 7. " nRW ,Read/Write Operation Flag" "Read,Write"
|
|
rgroup.long 0x0c++0x3
|
|
line.long 0x00 "APB0_TOER,Time-out Error Register"
|
|
hexmask.long.word 0x00 8.--23. 1. " PerAdd ,Peripheral Address"
|
|
bitfld.long 0x00 7. " nRW ,Read/Write Operation Flag" "Read,Write"
|
|
width 0xb
|
|
tree.end
|
|
tree "APB Bridge 1"
|
|
base ad:0xffffc000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "APB1_BSR,Brisge Status Register"
|
|
eventfld.long 0x00 5. " APBT ,APB Time-out Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x00 4. " OUTM ,Out of Memory" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " ABORT ,Abort Flag" "Not occurred,Occurred"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "APB1_TOR,Time-out Register"
|
|
bitfld.long 0x00 8. " ABTEN ,Abort Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " TOUT_CNT ,Time-out Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "APB1_OMR,Out of Memory Register"
|
|
hexmask.long.word 0x00 8.--23. 1. " PerAdd ,Peripheral Address"
|
|
bitfld.long 0x00 7. " nRW ,Read/Write Operation Flag" "Read,Write"
|
|
rgroup.long 0x0c++0x3
|
|
line.long 0x00 "APB1_TOER,Time-out Error Register"
|
|
hexmask.long.word 0x00 8.--23. 1. " PerAdd ,Peripheral Address"
|
|
bitfld.long 0x00 7. " nRW ,Read/Write Operation Flag" "Read,Write"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Flash"
|
|
base ad:0x80000000
|
|
width 14.
|
|
group.long 0x00++0x3 "Bank 0 Flash Sectors"
|
|
line.long 0x00 "B0F0,Bank 0 Flash Sector 0"
|
|
button "B0F0" "d ad:(0x80000000)--ad:(0x80000000+0x1fff) /long"
|
|
group.long 0x2000++0x3
|
|
line.long 0x00 "B0F1,Bank 0 Flash Sector 1"
|
|
button "B0F1" "d ad:(0x80000000+0x2000)--ad:(0x80000000+0x3fff) /long"
|
|
group.long 0x4000++0x3
|
|
line.long 0x00 "B0F2,Bank 0 Flash Sector 2"
|
|
button "B0F2" "d ad:(0x80000000+0x4000)--ad:(0x80000000+0x5fff) /long"
|
|
group.long 0x6000++0x3
|
|
line.long 0x00 "B0F3,Bank 0 Flash Sector 3"
|
|
button "B0F3" "d ad:(0x80000000+0x6000)--ad:(0x80000000+0x7fff) /long"
|
|
group.long 0x8000++0x3
|
|
line.long 0x00 "B0F4,Bank 0 Flash Sector 1"
|
|
button "B0F4" "d ad:(0x80000000+0x8000)--ad:(0x80000000+0xffff) /long"
|
|
group.long 0x10000++0x3
|
|
line.long 0x00 "B0F5,Bank 0 Flash Sector 5"
|
|
button "B0F5" "d ad:(0x80000000+0x10000)--ad:(0x80000000+0x1ffff) /long"
|
|
group.long 0x20000++0x3
|
|
line.long 0x00 "B0F6,Bank 0 Flash Sector 6"
|
|
button "B0F6" "d ad:(0x80000000+0x20000)--ad:(0x80000000+0x2ffff) /long"
|
|
group.long 0x30000++0x3
|
|
line.long 0x00 "B0F7,Bank 0 Flash Sector 7"
|
|
button "B0F7" "d ad:(0x80000000+0x30000)--ad:(0x80000000+0x3ffff) /long"
|
|
width 14.
|
|
group.long 0x100000++0x3 "Flash Memory Control Registers"
|
|
line.long 0x00 "FLASH_CR0,Flash Control Register 0"
|
|
bitfld.long 0x00 31. " WMS ,Write Mode Start" "No effect,Started"
|
|
bitfld.long 0x00 30. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WPG ,Word Program" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " DWPG ,Double Word Program" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SER ,Sector Erase" "Not selected,Selected"
|
|
bitfld.long 0x00 24. " SPR ,Set Protection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SMBM ,SystemMemory Boot Mode" "Normal,SystemMemory Boot"
|
|
bitfld.long 0x00 21. " INTM ,End of Write Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " INTP ,End of Write Interrupt Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " JBM ,JTAG Boot Mode" "Normal,JTAG Boot"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PWD ,Power Down Mode" "Normal,Powered down"
|
|
bitfld.long 0x00 4. " LOCK ,Flash Register Access Locked" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BSYA1 ,Bank 0 Busy" "Not busy,Busy"
|
|
group.long 0x100004++0x3
|
|
line.long 0x00 "FLASH_CR1,Flash Control Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " B0F[7:0] ,Bank 0 Flash Sector Control/Status"
|
|
group.long 0x100008++0x7
|
|
line.long 0x00 "FLASH_DR0,Flash Data Register 0"
|
|
line.long 0x04 "FLASH_DR1,Flash Data Register 1"
|
|
group.long 0x100010++0x3
|
|
line.long 0x00 "FLASH_AR,Flash Address Register"
|
|
hexmask.long 0x00 2.--20. 0x4 " ADD[20:2] ,Address"
|
|
group.long 0x100014++0x3
|
|
line.long 0x00 "FLASH_ER,Flash Error Register"
|
|
bitfld.long 0x00 8. " WPF ,Write Protection Flag" "Not protected,Protected"
|
|
bitfld.long 0x00 7. " RESER ,Resume Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SEQER ,Sequence Error" "No error,Error"
|
|
bitfld.long 0x00 3. " 10ER ,1 over 0 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PGER ,Program Error" "No error,Error"
|
|
bitfld.long 0x00 1. " ERER ,Erase Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ERR ,Write Error" "No error,Error"
|
|
width 14.
|
|
group.long 0x10dfb0++0x3 "Flash Memory Protection Registers"
|
|
line.long 0x00 "FLASH_NVWPAR,Flash Non Volatile Write Protection Register"
|
|
bitfld.long 0x00 7. " W0P[7] ,Write Protection Bank 0 Sector 7" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " W0P[6] ,Write Protection Bank 0 Sector 6" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " W0P[5] ,Write Protection Bank 0 Sector 5" "Protected,Not protected"
|
|
bitfld.long 0x00 4. " W0P[4] ,Write Protection Bank 0 Sector 4" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " W0P[3] ,Write Protection Bank 0 Sector 3" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " W0P[2] ,Write Protection Bank 0 Sector 2" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " W0P[1] ,Write Protection Bank 0 Sector 1" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " W0P[0] ,Write Protection Bank 0 Sector 0" "Protected,Not protected"
|
|
group.long 0x10dfb8++0x3
|
|
line.long 0x00 "FLASH_NVAPR0,Flash Non Volatile Write Protection Register 0"
|
|
bitfld.long 0x00 1. " DBGP ,Debug Protection" "Protected,Not protected"
|
|
group.long 0x10dfbc++0x3
|
|
line.long 0x00 "FLASH_NVAPR1,Flash Non Volatile Write Protection Register 1"
|
|
bitfld.long 0x00 31. " PEN15 ,Protection Enable 15" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. " PEN14 ,Protection Enable 14" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " PEN13 ,Protection Enable 13" "Enabled,Disabled"
|
|
bitfld.long 0x00 28. " PEN12 ,Protection Enable 12" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PEN11 ,Protection Enable 11" "Enabled,Disabled"
|
|
bitfld.long 0x00 26. " PEN10 ,Protection Enable 10" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PEN9 ,Protection Enable 9" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PEN8 ,Protection Enable 8" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PEN7 ,Protection Enable 7" "Enabled,Disabled"
|
|
bitfld.long 0x00 22. " PEN6 ,Protection Enable 6" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PEN5 ,Protection Enable 5" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PEN4 ,Protection Enable 4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PEN3 ,Protection Enable 3" "Enabled,Disabled"
|
|
bitfld.long 0x00 18. " PEN2 ,Protection Enable 2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PEN1 ,Protection Enable 1" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " PEN0 ,Protection Enable 0" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PDS15 ,Protection Disable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PDS14 ,Protection Disable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PDS13 ,Protection Disable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PDS12 ,Protection Disable 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PDS11 ,Protection Disable 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PDS10 ,Protection Disable 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDS9 ,Protection Disable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PDS8 ,Protection Disable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PDS7 ,Protection Disable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PDS6 ,Protection Disable 6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PDS5 ,Protection Disable 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PDS4 ,Protection Disable 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDS3 ,Protection Disable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PDS2 ,Protection Disable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDS1 ,Protection Disable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PDS0 ,Protection Disable 0" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
textline ""
|